Semiconductor device

Abstract

To provide a method of manufacturing a light-emitting device that comprises a thin-film transistor having good electric characteristics and a high reliability, with a high mass productivity.SOLUTION: Provided is a light-emitting device comprising a reverse stagger type thin-film transistor. In the reverse stagger type thin-film transistor, a gate insulating film is formed on a gate electrode. A microcrystal semiconductor film that functions as a channel formation region is formed on the gate insulating film. A buffer layer is formed on the microcrystal semiconductor film. A pair of a source region and a drain region is formed on the buffer layer. A pair of a source electrode and a drain electrode contacted with the source region and the drain region is formed so as to expose a part of the source region and drain region.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a light-emitting device using a thin film transistor at least in a pixel portion. [Background technology]

[0002] In recent years, semiconductor thin films (thickness of about tens to hundreds of nm) formed on substrates with insulating surfaces have been used for The technology of using the thin film transistor in the channel forming region is attracting attention. Transistors are widely used in electronic devices such as ICs and electro-optical devices, especially in image display devices. Development as a switching element is being rushed.

[0003] As a switching element for an image display device, a thin film transistor using an amorphous semiconductor film in the channel formation region is Film transistors, or thin film transistors using polycrystalline semiconductor films in the channel formation region, etc. As a method for forming a polycrystalline semiconductor film, a pulsed excimer laser beam is used. The beam is processed into a linear shape by an optical system, and the linear beam is scanned over the amorphous silicon film to illuminate it. A technique for crystallizing the material by irradiating it with light is known.

[0004] In addition, a microcrystalline semiconductor film is used in a channel formation region as a switching element of an image display device. Thin film transistors that have been used in the prior art are used (Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 4-242724 [Patent Document 2] Japanese Patent Application Laid-Open No. 2005-49832 Summary of the Invention [Problem to be solved by the invention]

[0006] A thin film transistor using a polycrystalline semiconductor film in the channel formation region uses an amorphous semiconductor film as the channel. The field-effect mobility is two orders of magnitude higher than that of the thin-film transistor used in the panel formation region, and This has the advantage that the pixel section of the display device and its peripheral driving circuit can be integrally formed on the same substrate. However, compared with the case where an amorphous semiconductor film is used for the channel formation region, The process becomes more complicated due to the crystallization of the film, which reduces yield and increases costs. There is a problem that...

[0007] In addition, there is a problem that the surfaces of the crystal grains in the microcrystalline semiconductor film are easily oxidized. When the crystal grains in the channel formation region are oxidized, an oxide film is formed on the surface of the crystal grains, The oxide film becomes an obstacle to the movement of carriers, and the electrical characteristics of the thin film transistor deteriorate. There is a problem.

[0008] In view of the above-mentioned problems, the present invention provides a thin-film transistor having good electrical characteristics and high reliability. The object of the present invention is to propose a light emitting device having a photodiode and a method for manufacturing the light emitting device in a mass-productive manner. do. [Means for solving the problem]

[0009] In a light-emitting device having an inverted staggered thin film transistor, In the case of the gate insulating film, a gate insulating film is formed on the gate electrode, and a channel forming region is formed on the gate insulating film. A functional microcrystalline semiconductor film (also called a semi-amorphous semiconductor film) is formed, and the microcrystalline semiconductor A buffer layer is formed on the conductive film, and a pair of source and drain regions is formed on the buffer layer. and forming a source region and a drain region so as to expose a portion of the source region and the drain region. A pair of source and drain electrodes are formed in contact with the source and drain regions. The source and drain regions are regions in contact with the source and drain electrodes and regions adjacent to the source and drain electrodes. The source electrode and the drain electrode are not in contact with each other. A part of the source region and the drain region and a part of the buffer layer are exposed. The ends of the source and drain regions and the vias are provided outside the ends of the source and drain electrodes. The edges of the buffer layer are formed.

[0010] The edges of the source electrode and the drain electrode do not coincide with the edges of the source region and the drain region, The ends of the source and drain regions are formed outside the ends of the source and drain electrodes. By this, the distance between the ends of the source electrode and the drain electrode becomes larger, This can prevent leakage current and short circuits between the gate and drain electrodes.

[0011] The buffer layer has a recess in a part thereof, and the side surface of the recess and the source region and the drain region are The buffer layer has a recess in a part thereof, and the edge of the source region and the edge of the drain region are aligned. The distance that carriers travel between the source and drain regions is long, so leakage current between the source and drain regions is low. The flow can be reduced.

[0012] In addition, a buffer layer is formed between the microcrystalline semiconductor film and the source and drain regions. The microcrystalline semiconductor film functions as a channel formation region. The semiconductor film is prevented from being oxidized and functions as a high-resistance region. A buffer layer is formed between the source region and the drain region using an amorphous semiconductor film having a high resistivity. For these reasons, the thin film transistor of the present invention has high field effect mobility and In the case of negative gate voltage, the leakage current is small and the drain breakdown voltage is high. stomach.

[0013] The buffer layer may be an amorphous semiconductor film, or may be a film containing nitrogen, hydrogen, or a halogen. It is preferable that the amorphous semiconductor film contains at least one of nitrogen, When the microcrystalline semiconductor film contains either hydrogen or halogen, the crystal grains contained in the microcrystalline semiconductor film It is possible to reduce oxidation.

[0014] The buffer layer can be formed by a plasma CVD method, a sputtering method, or the like. After forming the amorphous semiconductor film, the amorphous semiconductor film is irradiated with nitrogen plasma, hydrogen plasma, or hydrogen plasma. The amorphous semiconductor film can be nitrided, hydrogenated, or halogenated by treating it with halogen plasma. can.

[0015] By providing a buffer layer on the surface of the microcrystalline semiconductor film, the crystal grains contained in the microcrystalline semiconductor film can be Since oxidation can be reduced, deterioration of the electrical characteristics of thin film transistors can be reduced. This can be done.

[0016] Unlike polycrystalline semiconductor films, microcrystalline semiconductor films are formed directly on a substrate as microcrystalline semiconductor films. Specifically, silicon hydride is used as a raw material gas and a plasma CVD apparatus is used. The microcrystalline semiconductor film formed by the above method has a thickness of 0.5 nm to 2 The term "polycrystalline semiconductor" also includes a microcrystalline semiconductor film containing 0 nm crystal grains in an amorphous semiconductor. Unlike when a conductive film is used, there is no need to perform a crystallization process after forming the semiconductor film. The number of steps in manufacturing a film transistor can be reduced, and the yield of light-emitting devices can be increased. In addition, it is possible to reduce costs by using microwaves with frequencies of 1 GHz or higher. The electron density of the silicon hydride gas is high, which facilitates dissociation of the silicon hydride gas. By using the plasma CVD method using microwaves with frequencies of 1 GHz or higher, Compared to microwave plasma CVD methods with frequencies from MHz to several hundred MHz, it is possible to easily produce microcrystalline semiconductor films. Therefore, it is possible to manufacture the light-emitting device by using the above-mentioned method and to increase the film formation speed. It is possible to increase mass productivity.

[0017] In addition, a thin film transistor (TFT) was fabricated using a microcrystalline semiconductor film in the channel formation region. The thin film transistor is used in a pixel portion and further in a driver circuit to manufacture a light-emitting device. Thin film transistors that use a crystalline semiconductor film in the channel formation region have a field effect mobility of 1 to 100 Å. 20cm 2 / V·sec, and a thin-film transistor using an amorphous semiconductor film in the channel formation region. Since the field effect mobility is 2 to 20 times that of the conventional transistor, part or the entire driving circuit can be The display unit and the display section can be integrally formed on the same substrate to form a system-on-panel.

[0018] The light-emitting device also includes a light-emitting element, the luminance of which is controlled by a current or a voltage. This category includes elements that can be used in a variety of applications, specifically inorganic EL (Electro Luminescence) This includes LCDs, organic EL displays, etc.

[0019] The light emitting device includes a panel in which a light emitting element is sealed, and a controller for the panel. Furthermore, the present invention also includes a module in which an IC including a laser is mounted. In the process of manufacturing the element substrate, the element substrate corresponds to one form before the light emitting element is completed. The element substrate includes a means for supplying a current to the light-emitting element for each of the plurality of pixels. Specifically, only the pixel electrode of the light emitting element may be formed, or the pixel electrode and After forming a conductive film, the state before etching to form a pixel electrode is shown. is fine, and all forms apply.

[0020] In this specification, the term "light emitting device" refers to an image display device, a light emitting device, or a light It also refers to connectors, such as FPC (Flexible Printed Circuit) integrated circuit) or TAB (Tape Automated Bon ding) tape or TCP (Tape Carrier Package) Modules with printed wiring boards attached to the end of TAB tape or TCP or a light emitting element is mounted on an IC (integrated circuit) by the COG (Chip On Glass) method. The term "light emitting device" also includes modules in which a light emitting diode (LED) is directly mounted. [Effects of the Invention]

[0021] The present invention provides a light-emitting device having a thin film transistor with good electrical characteristics and high reliability. The device can be mass-produced. [Brief explanation of the drawings]

[0022] [Figure 1] 1A to 1C are cross-sectional views illustrating a method for manufacturing a light-emitting device of the present invention. [Figure 2] 1A to 1C are cross-sectional views illustrating a method for manufacturing a light-emitting device of the present invention. [Figure 3]1A to 1C are cross-sectional views illustrating a method for manufacturing a light-emitting device of the present invention. [Figure 4] 1A to 1C are cross-sectional views illustrating a method for manufacturing a light-emitting device of the present invention. [Figure 5] 1A to 1C are top views illustrating a method for manufacturing a light-emitting device of the present invention. [Figure 6] 1A to 1C are cross-sectional views illustrating a method for manufacturing a light-emitting device of the present invention. [Figure 7] 1A to 1C are cross-sectional views illustrating a method for manufacturing a light-emitting device of the present invention. [Figure 8] 1A to 1C are cross-sectional views illustrating a method for manufacturing a light-emitting device of the present invention. [Figure 9] 1A to 1C are top views illustrating a method for manufacturing a light-emitting device of the present invention. [Figure 10] 1 is a top view illustrating a microwave plasma CVD apparatus according to the present invention. [Figure 11] 1A and 1B are diagrams illustrating a multi-tone mask applicable to the present invention. [Figure 12] FIG. 1 is a perspective view illustrating a display panel of the present invention. [Figure 13] 1 is a perspective view illustrating an electronic device using a light-emitting device of the present invention. [Figure 14] 1A to 1C are diagrams illustrating electronic devices using light-emitting devices of the present invention. [Figure 15] 1A to 1C are cross-sectional views illustrating a method for manufacturing a light-emitting device of the present invention. [Figure 16] 1 is a cross-sectional view illustrating a pixel applicable to a light-emitting device of the present invention. [Figure 17] 1A and 1B are a top view and a cross-sectional view illustrating a light-emitting display panel of the present invention. [Figure 18] FIG. 1 is a block diagram illustrating a configuration of a light emitting device according to the present invention. [Figure 19] FIG. 2 is an equivalent circuit diagram illustrating the configuration of a drive circuit for the light emitting device of the present invention. [Figure 20] FIG. 2 is an equivalent circuit diagram illustrating the configuration of a drive circuit for the light emitting device of the present invention. [Figure 21] FIG. 2 is a top view illustrating the layout of a drive circuit of a light emitting device according to the present invention. [Figure 22]10A and 10B are diagrams showing the results of measuring a microcrystalline semiconductor film by Raman spectroscopy. [Figure 23] FIG. 1 is a diagram showing a model used in device simulation. [Figure 24] FIG. 10 is a diagram showing current-voltage characteristics obtained by device simulation. [Figure 25] FIG. 10 is a diagram showing the electron concentration distribution of a thin film transistor obtained by device simulation. DETAILED DESCRIPTION OF THE INVENTION

[0023] Hereinafter, embodiments of the present invention will be described with reference to the drawings. and the present invention may be practiced in various different ways without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications can be made to the modes and details of the present invention. Therefore, it should not be construed as being limited to the description of this embodiment mode.

[0024] (Embodiment 1) In this embodiment, a manufacturing process of a thin film transistor used in a light-emitting device will be described with reference to FIG. 1 to 4 and 6 to 8 show the manufacturing process of a thin film transistor. 5 and 9 are cross-sectional views showing the steps, and FIG. 5 and FIG. 9 are cross-sectional views showing the thin film transistor and the pixel FIG. 10 is a top view of the connection area of ​​the electrode.

[0025] In thin film transistors having a microcrystalline semiconductor film, the field-effect mobility is higher in n-type than in p-type. It is more suitable for use in the drive circuit because it has a high resistance. It is desirable to align all the capacitors with the same polarity in order to reduce the number of processes. An n-channel thin film transistor will be used for explanation.

[0026] As shown in FIG. 1A, a gate electrode 51 is formed on a substrate 50. The substrate 50 is aluminoborosilicate glass, aluminoborosilicate glass, or aluminosilicate glass Alkali-free glass substrates and ceramic substrates manufactured by the fusion method or float method. In addition, a plastic substrate or the like that has heat resistance that can withstand the processing temperature of this manufacturing process should be used. In addition, a substrate with an insulating film on the surface of a metal substrate such as a stainless steel alloy can be used. If the substrate 50 is a mother glass, the size of the substrate is 1st generation (320mm x 40 0mm), 2nd generation (400mm x 500mm), 3rd generation (550mm x 650mm) , 4th generation (680mm x 880mm or 730mm x 920mm), 5th generation (1 000mm x 1200mm or 1100mm x 1250mm), 6th generation 1500mm ×1800mm), 7th generation (1900mm × 2200mm), 8th generation (2160mm ×2460mm), 9th generation (2400mm×2800mm, 2450mm×3050mm m), 10th generation (2950mm x 3400mm), etc. can be used.

[0027] The gate electrode 51 is made of titanium, molybdenum, chromium, tantalum, tungsten, or aluminum. The gate electrode 51 is formed by sputtering. A conductive film is formed on the substrate 50 by a coating method or a vacuum deposition method, and a photolithography is performed on the conductive film. A mask is formed by a technique or an inkjet method, and the conductive film is etched using the mask. In addition, in order to improve the adhesion of the gate electrode 51 and to the underlying layer, As a barrier metal to prevent diffusion, a nitride film of the above metal material is formed between the substrate 50 and the gate electrode 5 1. Here, the resist mask formed using the first photomask The conductive film formed on the substrate 50 is etched using the etching method to form the gate electrode 51 .

[0028] In addition, since an insulating film, a semiconductor film, wiring, etc. are formed on the gate electrode 51, Therefore, it is desirable to process the end so that it is tapered. In this process, wiring connected to the gate electrode can also be formed at the same time.

[0029] Next, on the gate electrode 51, gate insulating films 52a and 52b, a microcrystalline semiconductor film 53, and a buffer layer 54 are formed. The semiconductor layer 55 is doped with an impurity element that provides one conductivity type, and the conductive films 65a to Next, a resist 80 is applied onto the conductive film 65c. In both cases, the gate insulating films 52a and 52b, the microcrystalline semiconductor film 53, and the buffer layer 54 are continuously formed. Furthermore, it is preferable to form the gate insulating films 52a and 52b and the microcrystalline semiconductor film 5 3, a buffer layer 54 and a semiconductor film 55 to which an impurity element that gives one conductivity type is added are continuously formed. It is preferable to form at least the gate insulating films 52a and 52b, the microcrystalline semiconductor The film 53 and the buffer layer 54 are successively formed without being exposed to the atmosphere, thereby preventing atmospheric deposition. The interfaces of the layers can be formed without being contaminated by impurity elements floating in the atmosphere or by chemicals. Therefore, variations in the characteristics of the thin film transistors can be reduced.

[0030] The gate insulating films 52a and 52b are formed by oxidizing the insulating film 52a using a CVD method, a sputtering method, or the like. The insulating film can be formed of a silicon film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. Here, the gate insulating films 52a and 52b are made of a silicon oxide film or a silicon oxynitride film and a nitride film. The gate insulating film is formed by laminating a silicon nitride film or a silicon nitride oxide film in this order. The film is not made into two layers, but from the substrate side, a silicon nitride film or a silicon oxynitride film and a silicon oxide film or an oxide film are It can be formed by stacking three layers in the order of a silicon nitride film and a silicon nitride film or a silicon nitride oxide film. The gate insulating film can be formed of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride film. It can be formed of a single layer of silicon dioxide film.

[0031] Here, the silicon oxynitride film is a film whose composition contains more oxygen than nitrogen. Rutherford Backscattering (RBS) ering spectrometry and hydrogen forward scattering (HFS) n Forward Scattering) as the concentration range Oxygen 50-70 atomic %, nitrogen 0.5-15 atomic %, silicon 25-35 atomic %, hydrogen The silicon nitride oxide film is a film containing silicon dioxide in a range of 0.1 to 10 atomic percent. The nitrogen content is higher than the oxygen content, and the measurement is performed using RBS and HFS. In this case, the concentration range is 5 to 30 atomic % for oxygen, 20 to 55 atomic % for nitrogen, and 25 % to 35 atomic % and hydrogen in the range of 10 to 30 atomic %. When the total number of atoms constituting silicon or silicon nitride oxide is 100 atomic %, the ratio of nitrogen, oxygen, silicon The content ratio of hydrogen and oxygen is within the above range.

[0032] The microcrystalline semiconductor film 53 has an intermediate structure between an amorphous structure and a crystalline structure (including a single crystal and a polycrystal). The semiconductor is a film containing a semiconductor that has a third state that is stable in terms of free energy. Conductive, crystalline with short-range order and lattice distortion, with a grain size of 0.5 to Columnar or needle-like crystals of 20 nm are growing in the normal direction to the substrate surface. Microcrystalline silicon is a typical example of a microcrystalline semiconductor. The Raman spectrum shows the 521 cm -1 On the lower wavenumber side than That is, the 521 cm -1 and amorphous silicon 480cm -1 The Raman spectrum of microcrystalline silicon has a peak between these two. At least 1 atomic percent of hydrogen or halogen is added to terminate dangling bonds. In addition, rare earth elements such as helium, argon, krypton, and neon are also included. By incorporating gas elements to further promote lattice distortion, stability is increased and a good microcrystalline semiconductor is obtained. Such a microcrystalline semiconductor film is described in, for example, U.S. Pat. This is disclosed in US Pat. No. 9,134.

[0033] This microcrystalline semiconductor film is produced by a high-frequency plasma CVD method with a frequency of several tens to several hundreds of MHz. Alternatively, it can be formed by a microwave plasma CVD apparatus with a frequency of 1 GHz or more. Typically, it is formed by diluting silicon hydride such as SiH4 or Si2H6 with hydrogen. In addition to silicon hydride and hydrogen, helium, argon, krypton, and neon can also be used. The microcrystalline semiconductor film can be formed by diluting the semiconductor film with one or more rare gas elements selected from the group consisting of: In these cases, the flow rate ratio of hydrogen to silicon hydride is 50 times or more and 1000 times or less, Preferably, the ratio is 50 to 200 times, more preferably 100 times. Instead of this, SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. can be used. Cut.

[0034] In addition, the microcrystalline semiconductor film requires intentional addition of impurity elements for the purpose of valence electron control. It exhibits weak n-type electrical conductivity and functions as the channel formation region of thin film transistors. For the microcrystalline semiconductor film, an impurity element imparting p-type conductivity is added simultaneously with or after the film formation. By adding impurities after the film formation, it becomes possible to control the threshold voltage. The element is typically boron, and impurity gases such as B2H6 and BF3 are added at 1 ppm to 1 It is advisable to mix it into the silicon hydride at a ratio of 0 to 100 ppm, preferably 1 to 100 ppm. and the boron concentration is, for example, 1×10 14 ~6×10 16 atoms / cm 3 It would be good to stomach.

[0035] The oxygen concentration of the microcrystalline semiconductor film is set to 5×10 19 cm -3 Below, 1×10 19 cm - 3 In the following, the concentrations of nitrogen and carbon are 3×10 18 cm -3 It is preferable to By reducing the concentrations of oxygen, nitrogen, and carbon mixed into the microcrystalline semiconductor film, This can prevent the body film from becoming n-type.

[0036] The microcrystalline semiconductor film 53 has a thickness of more than 0 nm and 200 nm or less, preferably 1 nm or more and 100 nm or less. The microcrystalline semiconductor film 53 is formed to a thickness of 5 nm or less, preferably 5 nm or more and 50 nm or less. The microcrystalline semiconductor film 53 functions as a channel formation region of a thin film transistor to be formed. By setting the thickness to 5 nm or more and 50 nm, the thin film transistor formed later will be a fully depleted type. The deposition rate of the microcrystalline semiconductor film 53 is 1 / 10 to 1 / 20 of the deposition rate of the amorphous semiconductor film. Because it is 1 / 100 slower, the throughput can be improved by making the film thinner. Since the microcrystalline semiconductor film is made of microcrystals, it has lower resistance than an amorphous semiconductor film. For this reason, a thin film transistor using a microcrystalline semiconductor film in a channel formation region has low current-voltage characteristics. The slope of the rising part of the curve showing the switching response becomes steeper, Furthermore, the channel formation region of the thin film transistor is made of microcrystalline semiconductor. By using a thin film, it is possible to suppress fluctuations in the threshold voltage of the thin film transistor. Therefore, a light-emitting device with little variation in electrical characteristics can be manufactured.

[0037] Furthermore, the microcrystalline semiconductor film has a higher mobility than the amorphous semiconductor film. For switching, a thin film transistor in which a channel formation region is formed using a microcrystalline semiconductor film By using the above, the area of ​​the channel forming region, that is, the area of ​​the thin film transistor, can be reduced. This reduces the area of ​​the thin film transistor per pixel, It is possible to increase the aperture ratio of the pixel, which makes it possible to fabricate a device with high resolution. can.

[0038] The buffer layer 54 is formed by plasma CVD using silicon hydride such as SiH4 or Si2H6. The silicon hydride can be formed by adding helium, argon, crypto Diluting with one or more rare gas elements selected from fluorine and neon to form an amorphous semiconductor film The flow rate of the silicon hydride is 1 to 20 times, preferably 1 to 10 times. Hereinafter, more preferably, hydrogen is used at a flow rate of 1 to 5 times, and the amorphous semiconductor containing hydrogen is Furthermore, by using the silicon hydride and nitrogen or ammonia, In this way, an amorphous semiconductor film containing nitrogen can be formed. Use gases containing fluorine, chlorine, bromine, or iodine (F2, Cl2, HF, HCl, etc.) By this, an amorphous semiconductor film containing fluorine, chlorine, bromine, or iodine can be formed. Instead of silicon hydride, SiH2Cl2, SiHCl3, SiCl4, SiF 4 etc. can be used.

[0039] The buffer layer 54 is formed by sputtering with hydrogen or a rare gas using an amorphous semiconductor as a target. An amorphous semiconductor film can be formed by pulverizing the ammonium, nitrogen, Alternatively, by including N2O in the atmosphere, an amorphous semiconductor film containing nitrogen can be formed. In addition, if the atmosphere contains gases containing fluorine, chlorine, bromine, or iodine (F2, C Fluorine, chlorine, bromine, or iodine can be added by adding an ion to the solution. An amorphous semiconductor film containing the amorphous semiconductor film can be formed.

[0040] The buffer layer 54 is formed on the surface of the microcrystalline semiconductor film 53 by plasma CVD or spat After forming an amorphous semiconductor film by a pulverizing method, the surface of the amorphous semiconductor film is irradiated with hydrogen plasma. , nitrogen plasma, or halogen plasma to hydrogenate the surface of the amorphous semiconductor film; The surface of the amorphous semiconductor film may be nitrided or halogenated. Treatment with fluorine, neon plasma, argon plasma, krypton plasma, etc. may also be used.

[0041] The buffer layer 54 is preferably formed of an amorphous semiconductor film that does not contain crystal grains. Therefore, high frequency plasma CVD method with a frequency of several tens to several hundreds of MHz or microwave plasma CVD method is used. When forming the film using the Zuma CVD method, the film formation conditions are adjusted so that the film becomes an amorphous semiconductor film that does not contain crystal grains. It is preferable to control the conditions.

[0042] The buffer layer 54 is partially etched in the subsequent process of forming the source and drain regions. In this case, a part of the buffer layer 54 may remain after etching. It is preferable to form the film with a thickness of 150 nm or more and 200 nm or less. It is preferable to form

[0043] The buffer layer 54 is doped with an impurity element such as phosphorus or boron that imparts one conductivity type. In particular, it is preferable that boron contained in the microcrystalline semiconductor film is not included in order to control the threshold voltage. Alternatively, phosphorus contained in a semiconductor film to which an impurity element that imparts one conductivity type is added is used as a buffer. It is preferable that the layer 54 is not mixed with the GaN layer 54. As a result, the region where leakage current occurs due to the PN junction By eliminating the impurities that give one conductivity type, the leakage current can be reduced. Between the semiconductor film to which the element is added and the microcrystalline semiconductor film, one conductivity type such as phosphorus or boron is added. By forming an amorphous semiconductor film to which no impurity elements are added, It is possible to prevent the diffusion of impurities contained in the source and drain regions. be.

[0044] The surface of the microcrystalline semiconductor film 53 is covered with an amorphous semiconductor film and a film containing hydrogen, nitrogen, or halogen. By forming an amorphous semiconductor film containing the crystal grains, the natural surface of the crystal grains contained in the microcrystalline semiconductor film 53 can be prevented. It is possible to prevent oxidation. In particular, in the region where the amorphous semiconductor and the microcrystalline grains come into contact, When these cracks come into contact with oxygen, the crystal grains are oxidized and become silicon oxide. However, by forming a buffer layer on the surface of the microcrystalline semiconductor film 53, In addition, by forming a buffer layer, it is possible to prevent oxidation of the fine crystal grains. Etching residues generated when forming the gate and drain regions are mixed into the microcrystalline semiconductor film. This can prevent this from happening.

[0045] The buffer layer 54 may be formed using an amorphous semiconductor film or a film containing hydrogen, nitrogen, or halide. The energy gap of the amorphous semiconductor film is The energy gap of amorphous semiconductor films is larger than that of conductive films (1.6 eV or more, 1.8 e V or less, and the energy gap of the microcrystalline semiconductor film is 1.1 eV or more and 1.5 eV or less), The resistance is high and the mobility is low, which is 1 / 5 to 1 / 10 of that of a microcrystalline semiconductor film. In the thin film transistor to be formed, a source region and a drain region and a microcrystalline semiconductor film The buffer layer formed between the microcrystalline semiconductor film and the substrate functions as a high resistance region, and the microcrystalline semiconductor film is This allows the off-current of the thin film transistor to be reduced. When the thin film transistor is used as a switching element of a light-emitting device, This can improve trust.

[0046] The semiconductor film 55 to which an impurity element that imparts one conductivity type is added is an n-channel thin film transistor. When forming a transistor, phosphorus is added as a typical impurity element, and hydrogenation All you need to do is add impurity gases such as PH3 to silicon. Also, p-channel thin film transistors In the case of forming silicon hydride, boron may be added as a typical impurity element. Adding impurity gas such as B2H6 is sufficient. The semiconductor film 55 can be formed of a microcrystalline semiconductor film or an amorphous semiconductor. The semiconductor film 55 to which an impurity element that imparts one conductivity type is added is An amorphous semiconductor film to which an impurity that gives one conductivity type is added, and a microcrystalline semiconductor film to which an impurity that gives one conductivity type is added. The buffer layer 54 may be doped with an impurity element that provides one conductivity type. An amorphous semiconductor film is formed on the surface of the amorphous semiconductor film, and a micro-doped film is formed on the amorphous semiconductor film to which an impurity element that gives one conductivity type is added. By forming a crystalline semiconductor film, the resistance changes stepwise, making it easier for carriers to flow. A semiconductor film to which an impurity element that imparts one conductivity type is added can be formed. The layer 55 is formed to a thickness of 2 nm to 50 nm. By reducing the thickness of the semiconductor film, the throughput can be improved.

[0047] Here, the gate insulating films 52a and 52b are doped with an impurity element that imparts one conductivity type. A plasma CVD apparatus capable of continuously depositing the semiconductor film 55 is shown in FIG. FIG. 10 is a schematic diagram showing the upper cross section of the plasma CVD apparatus, and shows the structure of the common chamber 1120. Load chamber 1110, unload chamber 1115, reaction chamber (1) to reaction chamber (4) 1111 to 1111 1120 and each chamber. Gate valves 1122 to 1127 is provided, and is configured so that the processes performed in each chamber do not interfere with each other. The substrates are loaded into cassettes 1128 and 1129 in the loading chamber 1110 and unloading chamber 1115. The reaction chambers (1) to (4) 1111 to 1112 are transferred by the transfer means 1121 of the common chamber 1120. In this system, a reaction chamber can be assigned to each deposition film type. A plurality of different coatings can be formed successively without exposure to the atmosphere.

[0048] In each of the reaction chambers (1) to (4), the gate insulating films 52a and 52b, the microcrystalline semiconductor A conductor film 53, a buffer layer 54, and a semiconductor film doped with an impurity element that imparts one conductivity type. In this case, different types of films are continuously formed by switching the source gas. In this case, after forming the gate insulating film, silane or the like is added to the reaction chamber. silicon hydride is introduced, the remaining oxygen and silicon hydride are reacted, and the reaction product is discharged outside the reaction chamber. By doing so, the residual oxygen concentration in the reaction chamber can be reduced. The oxygen concentration in the microcrystalline semiconductor film can be reduced. This can prevent the oxidation of the crystal grains.

[0049] Alternatively, the gate insulating films 52a and 52b and the microcrystalline semiconductor film 52a and 52b are formed in the reaction chamber (1) and the reaction chamber (3). 53 and a buffer layer 54 are formed, and one conductivity type is imparted in the reaction chamber (2) and the reaction chamber (4). The semiconductor film 55 is formed by adding an impurity element that gives one conductivity type. By forming the film in this way, the impurity elements that give one conductivity type remaining in the chamber are mixed into other films. This can prevent the intrusion of

[0050] In this way, in a microwave plasma CVD device with multiple chambers connected, the insulating films 52a and 52b, the microcrystalline semiconductor film 53, the buffer layer 54, and the insulating film 52b that provides one conductivity type; Since the semiconductor film 55 to which the impurity element is added can be formed, mass productivity can be improved. In addition, even if one reaction chamber is undergoing maintenance or cleaning, the remaining reaction chambers can be used. This allows film formation processing to be performed in the reception room, improving the tact time of film formation. The interface between each layer is formed without being contaminated by gas components or contaminating impurity elements floating in the air. This makes it possible to reduce variations in the characteristics of thin film transistors.

[0051] Also, gate insulating films 52a and 52b are formed in reaction chamber (1), and a microcrystalline semiconductor is formed in reaction chamber (2). The conductive film 53 and the buffer layer 54 are formed, and an impurity element that gives one conductivity type is added in the reaction chamber (3). The doped semiconductor film 55 can be formed. The gate insulating film 52b is formed of a silicon nitride film or a silicon oxynitride film. In the case of forming the gate insulating film 52a, five reaction chambers are provided. In the reaction chamber (1), silicon oxide of the gate insulating film 52a is formed. In the reaction chamber (2), the silicon nitride film or silicon oxynitride film of the gate insulating film 52b is formed. A silicon nitride oxide film is formed in the reaction chamber (3), a microcrystalline semiconductor film is formed in the reaction chamber (4), and A buffer layer is formed in the reaction chamber (5), and a semiconductor layer to which an impurity element that gives one conductivity type is added is formed. A conductive film may be formed. In addition, since the deposition rate of a microcrystalline semiconductor film is slow, a plurality of reaction chambers may be used. For example, a microcrystalline semiconductor film may be formed by depositing gate insulating films 52a and 52b in the reaction chamber (1). A microcrystalline semiconductor film 53 is formed in the reaction chambers (2) and (3), and a buffer is formed in the reaction chamber (4). The layer 54 is formed by adding an impurity element that gives one conductivity type to the semiconductor in the reaction chamber (5). In this way, the microcrystalline semiconductor film 53 may be formed simultaneously in a plurality of reaction chambers. By doing so, the throughput can be improved. It is preferable to coat with the type of film to be deposited.

[0052] By using a plasma CVD apparatus with such a configuration, it is possible to produce similar types of films or films of the same type in each reaction chamber. It is possible to form various types of films, and they can be formed continuously without exposure to the atmosphere. This allows the film to be deposited without being contaminated by residues from previous films or impurities floating in the air. , each lamination interface can be formed.

[0053] The plasma CVD apparatus shown in FIG. 10 is provided with a separate load chamber and unload chamber. However, it may be combined into one chamber and used as a load / unload chamber. A standby chamber may be provided. By preheating the substrate in the standby chamber, the time required for film formation in each reaction chamber can be reduced. Since the heating time can be shortened, the throughput can be improved.

[0054] The film forming processes are described below. These film forming processes are performed by controlling the gas supply according to the purpose. All you have to do is select the gas to be supplied from the section.

[0055] Here, a silicon oxynitride film is formed on the gate insulating film 52a, and a nitride film is formed on the gate insulating film 52b. A method for forming a silicon oxide film will be given as an example.

[0056] First, the inside of the processing vessel of the reaction chamber of the microwave plasma CVD device was filled with fluorine radicals. The fluorine radicals are generated by a plasma generator installed outside the reaction chamber. Fluorocarbon, nitrogen fluoride, or fluorine is introduced into the bioreactor, dissociated, and reacted to form fluorine radicals. By introducing the gas into the reaction chamber, the inside of the reaction chamber can be cleaned.

[0057] After cleaning with fluorine radicals, a large amount of hydrogen is introduced into the reaction chamber to The concentration of residual fluorine in the chamber can be reduced by reacting it with hydrogen. Therefore, it is possible to reduce the amount of fluorine that gets mixed into the protective film that is later formed on the inner wall of the reaction chamber. Therefore, the thickness of the protective film can be reduced.

[0058] Next, an oxynitride film is deposited as a protective film on the inner wall surface of the processing vessel of the reaction chamber. The pressure inside the container is set to 1 to 200 Pa, preferably 1 to 100 Pa, and the plasma ignition gas and and one or more rare gases such as helium, argon, xenon, krypton, etc. Furthermore, one of the rare gases and hydrogen are introduced. In particular, plasma ignition It is preferable to use helium as the gas, and more preferably helium and hydrogen.

[0059] The ionization energy of helium is as high as 24.5 eV, but it is reduced to about 20 eV. Because of the metastable state, ionization is possible at approximately 4 eV during discharge. The discharge initiation voltage is low and the discharge is easy to maintain. Therefore, it is possible to maintain a uniform plasma. This makes it possible to reduce power consumption.

[0060] In addition, rare gases such as helium, argon, xenon, and krypton can be used as plasma ignition gases. In addition to the rare gas, oxygen gas may be introduced into the treatment volume. By introducing it into the chamber, it becomes easier to ignite the plasma.

[0061] Next, turn on the power supply and set the power supply output to 500-6000W, preferably 4 Next, the source gas is supplied to the gas supply unit and plasma is generated. Specifically, dinitrogen monoxide, a rare gas, and silane are introduced into the vessel as raw material gases. By introducing the silicon oxynitride gas, a silicon oxynitride film is formed as a protective film on the inner wall surface of the processing vessel. The flow rate of silicon hydride is 50 to 300 sccm, and the flow rate of nitrous oxide is 500 to 6000 The flow rate is set to 100 sccm, and the thickness of the protective film is set to 500 to 2000 nm.

[0062] Next, the supply of the source gas is stopped, the pressure in the processing vessel is reduced, and the power supply device is turned off. After that, the substrate is introduced onto a support table in the processing chamber.

[0063] Next, a silicon oxynitride film is formed on the substrate as a gate insulating film 52a by the same process as that for the protective film. The film is deposited.

[0064] When a silicon oxynitride film of a predetermined thickness is deposited, the supply of the source gas is stopped, and the pressure in the processing vessel is power down and turn off the power supply.

[0065] Next, the pressure in the processing vessel is set to 1 to 200 Pa, preferably 1 to 100 Pa, and the plasma deposition As fire gas, one of the rare gases such as helium, argon, xenon, krypton, etc. In addition to the above, raw material gases silane, nitrous oxide, and ammonia are introduced. Nitrogen may be introduced as the gas instead of ammonia. Next, turn on the power supply. The power supply output should be 500 to 6000W, preferably 4000 to 6000W. Next, a source gas is introduced into the processing chamber from the gas supply unit, and the substrate 113 is heated. A silicon nitride oxide film is formed as a gate insulating film on the silicon oxynitride film of 0. Next, The supply of gas is stopped, the pressure in the processing chamber is reduced, and the power supply is turned off to restart the film formation process. Exit the service.

[0066] Through the above steps, the protective film on the reaction chamber wall is made of a silicon oxynitride film, and the silicon oxynitride film is formed on the substrate. By successively forming a silicon nitride oxide film and a silicon oxide film, silicon oxide, etc., is formed in the upper silicon nitride oxide film. It is possible to reduce the amount of impurities mixed in. It can generate microwaves as a power supply. By forming the above film by microwave plasma CVD using a power supply device that can The plasma density becomes high and a film with high voltage resistance can be formed. By using this, it is possible to reduce the variation in the threshold voltage of the transistor. In addition, the resistance to static electricity has been improved, and it will not break down even if a high voltage is applied. It is possible to fabricate transistors that are less likely to break down over time. In addition, a transistor with less hot carrier damage can be fabricated. It is possible.

[0067] In addition, the gate insulating film is made of silicon oxynitride formed by a microwave plasma CVD device. In the case of a single layer film, the above-mentioned method for forming a protective film and the method for forming a silicon oxynitride film are used. The flow rate ratio of nitrous oxide to ore is 50 times or more and 300 times or less, preferably 50 times or more and 200 times or less. If the thickness is 50 times or less, a silicon oxynitride film with high withstand voltage can be formed.

[0068] Next, a microcrystalline semiconductor film and an amorphous semiconductor film as a buffer layer are formed in succession by plasma CVD. First, the film is formed by the same process as the gate insulating film. The interior of the chamber is cleaned. Next, a silicon film is deposited inside the processing vessel as a protective film. The pressure in the treatment vessel is set to 1 to 200 Pa, preferably 1 to 100 Pa, and a plasma ignition As the gas, one or more of rare gases such as helium, argon, xenon, krypton, etc. Hydrogen may be introduced together with the rare gas.

[0069] Next, turn on the power supply and set the power supply output to 500-6000W, preferably 4 Next, the source gas is supplied to the gas supply unit and plasma is generated. Specifically, silicon hydride gas and hydrogen gas are introduced into the container as raw material gases. By this, a microcrystalline silicon film is formed as a protective film on the inner wall surface of the processing vessel. In addition to silicon gas and hydrogen gas, one gas selected from helium, argon, krypton, and neon A microcrystalline semiconductor film can be formed by diluting the gas with one or more rare gas elements. The flow rate ratio of hydrogen to silicon hydride is 5 times or more and 1000 times or less, preferably 50 times The protection factor is preferably from 100 to 150 times. The film thickness is set to 500 to 2000 nm. Before turning on the power supply, In addition to the rare gas, silicon hydride gas and hydrogen gas may be introduced into the vessel.

[0070] In addition to silicon hydride gas and hydrogen gas, helium, argon, krypton, and neon The amorphous semiconductor film is formed as a protective film by diluting it with one or more rare gas elements selected from the group consisting of: It can be formed.

[0071] Next, the supply of the source gas is stopped, the pressure in the processing vessel is reduced, and the power supply device is turned off. After that, the substrate is introduced onto a support table in the processing chamber.

[0072] Next, the surface of the gate insulating film 52b formed on the substrate may be subjected to hydrogen plasma treatment. By performing hydrogen plasma treatment before forming the crystalline semiconductor film, the gate insulating film and the microcrystalline It is possible to reduce the lattice distortion at the interface of the semiconductor film, and the gate insulating film and the microcrystalline semiconductor This improves the interface characteristics of the conductor film, which is then used for the thin film transistors to be formed later. The electrical characteristics of the capacitor can be improved.

[0073] In the hydrogen plasma treatment, the amorphous semiconductor protective film formed in the treatment chamber is The protective film is etched by subjecting the semiconductor film or the microcrystalline semiconductor film to hydrogen plasma treatment. A small amount of semiconductor is deposited on the surface of the gate insulating film 52b. As a result, the gate insulating film and the microcrystalline semiconductor film are deposited. It is possible to reduce the lattice distortion at the interface of the semiconductor film, and the gate insulating film and the microcrystalline semiconductor This improves the interface characteristics of the conductor film, which is then used for the thin film transistors to be formed later. The electrical characteristics of the capacitor can be improved.

[0074] Next, a microcrystalline silicon film is deposited on the substrate by the same process as that for the protective film. The thickness of the film is set to be greater than 0 nm and less than 50 nm, preferably greater than 0 nm and less than 20 nm. .

[0075] After a microcrystalline silicon film of a predetermined thickness is deposited, the supply of the source gas is stopped, and the inside of the processing chamber is The pressure is reduced, and the power supply is turned off to complete the microcrystalline semiconductor film formation process. .

[0076] Next, the pressure in the processing vessel is reduced and the flow rate of the source gas is adjusted. The flow rate of silicon hydride is significantly reduced compared to the film formation conditions for a microcrystalline semiconductor film. 1 to 20 times, preferably 1 to 10 times, more preferably 1 to 5 times Alternatively, hydrogen gas is not introduced into the processing chamber, and silicon hydride gas is introduced. By reducing the flow rate of hydrogen relative to the silicon hydride in this way, the buffer The deposition rate of the amorphous semiconductor film can be improved. In addition, one or more rare gases selected from helium, argon, krypton, and neon Then, turn on the power supply and set the output of the power supply to 500-600. 0 W, preferably 4000 to 6000 W, to generate plasma 200, and The deposition rate of an amorphous semiconductor film is higher than that of a microcrystalline semiconductor film. Therefore, the pressure inside the processing chamber can be set low. is set to 200 to 400 nm.

[0077] After the amorphous semiconductor film has been deposited to a predetermined thickness, the supply of the source gas is stopped, and the processing vessel is The pressure inside the chamber is reduced, the power supply is turned off, and the amorphous semiconductor film deposition process is completed. do.

[0078] The microcrystalline semiconductor film 53 and the amorphous semiconductor film that is the buffer layer 54 are ignited by plasma. Specifically, the microcrystalline semiconductor film 53 may be formed by using a hydrogenated gas, which is a source gas for forming the microcrystalline semiconductor film 53. The flow rate ratio of hydrogen to silicon is gradually reduced to form the microcrystalline semiconductor film 53 and the buffer layer 54. By this method, the microcrystalline semiconductor film 53 and the buffer film 54 are stacked. Impurities do not accumulate at the interface of the layer 54, and an interface with little distortion can be formed. The electrical characteristics of the thin film transistor can be improved.

[0079] When forming the microcrystalline semiconductor film 53, microwave plasma CV having a frequency of 1 GHz or more is used. It is preferable to use the D device. Microwave plasma has a high electron density and can Many radicals are formed and supplied to the substrate 1130, so that the surface reaction of the radicals on the substrate This promotes the reaction and increases the deposition rate of microcrystalline silicon. 0MHz, typically 13.56MHz, or greater than 20MHz up to 120MHz High frequency bands in the VHF band up to about 60 Hz, typically 27.12 MHz and 60 MHz, are used. A microcrystalline semiconductor film can be formed by the plasma CVD method.

[0080] In the respective processes for producing the gate insulating film and the semiconductor film, the inner wall of the reaction chamber is coated with 500 to 1000 .mu.m. If a 2000 nm protective film is formed, the above cleaning process and protective film formation process You can omit the logic.

[0081] Next, conductive films 65a to 65c are formed on the semiconductor film 55 to which an impurity element imparting one conductivity type is added. The conductive films 65a to 65c are made of aluminum, copper, silicon, or titanium. Heat resistance improving elements or hillock prevention elements such as silicon, neodymium, scandium, and molybdenum It is preferable to form the aluminum alloy with a single layer or a multilayer structure containing aluminum. The film on the side in contact with the semiconductor film to which the impurity element that gives the conductivity is added is made of titanium, tantalum, or the like. , molybdenum, tungsten, or nitrides of these elements, and aluminum is deposited on top of them. It may also be a laminated structure in which aluminum or an aluminum alloy is formed. or aluminum alloy, the upper and lower surfaces are covered with titanium, tantalum, molybdenum, tungsten Alternatively, a laminated structure in which the conductive film is sandwiched between nitrides of these elements may be used. indicates a conductive film having a structure in which three conductive films 65a to 65c are stacked, and the conductive films 65a and 65c A laminated conductive film using an aluminum film as the conductive film 65b, a molybdenum film, and a conductive film 65a, 6 The conductive film 65c is a laminated conductive film using a titanium film and the conductive film 65b is an aluminum film. The layers 65a to 65c are formed by sputtering or vacuum deposition.

[0082] The resist 80 can be a positive resist or a negative resist. , shown using a positive resist.

[0083] Next, the resist 80 is irradiated with light using the multi-tone mask 59 as a second photomask. The resist 80 is exposed to light.

[0084] Here, exposure using the multi-tone mask 59 will be described with reference to FIG.

[0085] A multi-tone mask has three exposure levels: exposed, intermediately exposed, and unexposed. It is a mask that can be used in a single exposure and development process, and multiple (typically two types) ) thickness area. By using a mask, it is possible to reduce the number of photomasks.

[0086] Typical examples of multi-tone masks include a gray-tone mask 59a as shown in FIG. 11(A), There is a halftone mask 59b as shown in FIG. 11(C).

[0087] As shown in FIG. 11(A), the gray-tone mask 59a is made of a transparent substrate 163 and a The light-shielding portion 164 and the diffraction grating 165 are formed on the light-shielding portion 164. On the other hand, the diffraction grating 165 has slits, dots, meshes, etc. By setting the spacing between the light transmitting portions of the light source, such as the lens, to be equal to or less than the resolution limit of the light used for exposure, The diffraction grating 165 can control the transmittance of the light. , mesh, or non-periodic slits, dots, mesh can be used. .

[0088] The light-transmitting substrate 163 can be a light-transmitting substrate such as quartz. The portion 164 and the diffraction grating 165 are made of a light-shielding material that absorbs light, such as chromium or chromium oxide. It can be formed.

[0089] When the gray-tone mask 59a is irradiated with exposure light, as shown in FIG. 11(B), the light-shielding portion In 164, the light transmittance 166 is 0%, and the light blocking portion 164 and the diffraction grating 165 are provided. In the unobstructed area, the light transmittance 166 is 100%. The light transmittance of the diffraction grating 165 can be adjusted in the range of 10 to 70%. This can be achieved by adjusting the spacing or pitch of the slits, dots, or meshes of the diffraction grating. It is Noh.

[0090] As shown in FIG. 11(C), the halftone mask 59b is formed on a light-transmitting substrate 163 and The semi-transmitting portion 167 and the light-shielding portion 168 are formed on the semi-transmitting portion 167. MoSiN, MoSi, MoSiO, MoSiON, CrSi, etc. can be used. The light-shielding portion 168 is formed using a light-shielding material that absorbs light, such as chromium or chromium oxide. It is possible.

[0091] When the halftone mask 59b is irradiated with exposure light, as shown in FIG. 11(D), the light-shielding portion In 168, the light transmittance 169 is 0%, and the light-shielding portion 168 and the semi-transmitting portion 167 are provided. In the unshaded area, the light transmittance 169 is 100%. The light transmittance of the semi-transparent portion 167 can be adjusted in the range of 10 to 70%. This can be adjusted by the material of the semi-transparent portion 167.

[0092] By exposing the film using a multi-tone mask and then developing it, different film thicknesses are obtained as shown in Figure 1(B). A resist mask 81 having the following regions can be formed.

[0093] Next, a resist mask 81 is used to form the microcrystalline semiconductor film 53, the buffer layer 54, and the one-conductivity type The semiconductor film 55 to which the impurity element is added and the conductive films 65a to 65c are etched. As a result, a microcrystalline semiconductor film 61, a buffer layer 62, and a The semiconductor film 63 to which an impurity element imparting one conductivity type is added and the conductive films 85a to 85c are It should be noted that FIG. 2(A) corresponds to a cross-sectional view taken along line AB in FIG. 5(A). (However, the resist mask 86 is excluded).

[0094] The side surfaces of the microcrystalline semiconductor film 61 and the buffer layer 62 are inclined, so that the buffer layer A leakage current is generated between the source and drain regions formed on the microcrystalline semiconductor film 62 and the microcrystalline semiconductor film 61. In addition, the source electrode and the drain electrode are micro-connected. Therefore, it is possible to prevent the occurrence of leakage current between the microcrystalline semiconductor film 61 and the microcrystalline semiconductor film 62. The inclination angle of the end side surfaces of the film 61 and the buffer layer 62 is 30° to 90°, preferably 45°. By setting the angle at this angle, the source electrode or drain electrode due to the step shape can be prevented from being damaged. This can prevent breakage of the inner electrode.

[0095] Next, the resist mask 81 is ashed. As a result, the area of ​​the resist is reduced and the thickness is At this time, the resist in the thin film region (which overlaps with a part of the gate electrode 51) The resist mask 86 is then removed to form a separate resist mask 86, as shown in FIG. 2(A). It is possible.

[0096] Next, a semiconductor film doped with an impurity element that gives one conductivity type is formed using a resist mask 86. 63 and the conductive films 85a to 85c are etched and separated. As a result, a pair of conductive films 85a to 85c are separated as shown in FIG. Conductive films 89a to 89c and a pair of source and drain regions 89 can be formed. In this etching step, a part of the buffer layer 62 is also etched. The partially etched buffer layer is shown as buffer layer 88. The formation process and the recessed portion of the buffer layer can be formed in the same process. Since a part of the layer 88 is etched by the resist mask 86 whose area is reduced, the conductive layer 88 is The buffer layer 88 protrudes outward from the conductive films 85a to 85c.

[0097] Next, as shown in FIG. 2(C), a part of the conductive films 89a to 89c is etched to form the source electrodes and drain electrodes 92a to 92c are formed. When the conductive films 89a to 89c are wet-etched, the ends of the conductive films 89a to 89c are selectively As a result, the resist mask 86 and the conductive films 89a to 89c are etched away from each other. Therefore, the source and drain electrodes 92a to 92c can be formed with small source voltages. The ends of the source and drain electrodes 92a to 92c and the ends of the source and drain regions 89 are The source electrodes and drain electrodes 92a to 92c are not aligned but are misaligned, and the source electrodes and drain electrodes 92a to 92c are located outside the ends of the source electrodes and drain electrodes 92a to 92c. The ends of the source and drain regions 89 are formed. After this, the resist mask 86 is removed. do.

[0098] 2(C) corresponds to a cross-sectional view taken along line AB in FIG. 5(B). , the ends of the source and drain regions 89 are connected to the ends of the source and drain electrodes 92c. The end of the buffer layer 88 is located outside the source and drain electrodes. The electrode 92c is located outside the ends of the source and drain regions 89. One of the source and drain regions is shaped to partially surround the other of the source and drain regions ( Specifically, they are U-shaped and C-shaped. This increases the area of ​​the region where carriers move. This allows the amount of current to be increased, and the surface area of ​​the thin film transistor In addition, the microcrystalline semiconductor film 87 and the silicon dioxide film 88 are formed inside the gate electrode. Since the source electrode and the drain electrode 92c are overlapped, the unevenness at the end of the gate electrode is The influence of the coating is small, and the reduction in the coverage rate and the occurrence of leakage current can be suppressed. One of the source electrode and the drain electrode also functions as a source wiring or a drain wiring. .

[0099] As shown in FIG. 2C, the ends of the source and drain electrodes 92a to 92c and the source The ends of the source electrode and the drain region 89 are not aligned but are misaligned. Since the distance between the ends of the drain electrodes 92a to 92c is large, This prevents leakage current and short circuits, resulting in high reliability and high voltage resistance. Therefore, it is possible to fabricate thin film transistors with high efficiency.

[0100] Through the above steps, a channel-etch type thin film transistor 83 can be formed. Also, a thin film transistor can be formed using two photomasks.

[0101] The thin film transistor shown in this embodiment mode has a gate insulating film and a microcrystalline semiconductor film formed over a gate electrode. a buffer layer, a source region and a drain region, a source electrode and a drain electrode are laminated. The buffer layer covers the surface of the microcrystalline semiconductor film that functions as a channel formation region. A recess (groove) is formed in a part of the buffer layer, and the area other than the recess is a source region and That is, the recess formed in the buffer layer covers the source and drain regions. The distance that carriers travel between the source and drain regions is long, In addition, by etching a part of the buffer layer, the leakage current can be reduced. In order to form the recesses by the above method, the generation of the electrons in the process of forming the source and drain regions is prevented. Since the etching residue can be removed, the source and drain regions can be easily accessed through the residue. The occurrence of leakage current (parasitic channel) can be avoided.

[0102] In addition, the microcrystalline semiconductor film serving as a channel formation region and the source and drain regions A buffer layer is formed between the microcrystalline semiconductor film and the insulating film. The buffer layer formed of a high resistivity amorphous semiconductor film is Since the thin film transistor extends between the source region and the drain region, When the gate voltage is set to a negative voltage, the leakage current can be reduced. In addition, deterioration due to application of a high voltage can be reduced. Since an amorphous semiconductor film whose surface is terminated with hydrogen is formed as a buffer layer, It is possible to prevent oxidation of the crystalline semiconductor film and to form the source and drain regions. This can prevent etching residues generated in the deposition process from being mixed into the microcrystalline semiconductor film. Therefore, the thin film transistor has high electrical characteristics and an excellent drain withstand voltage.

[0103] The edges of the source electrode and the drain electrode are aligned with the edges of the source region and the drain region. The distance between the ends of the source electrode and the drain electrode increases due to the shifted shape. This makes it possible to prevent leakage current and short circuits between the source electrode and the drain electrode.

[0104] Next, as shown in FIG. 3(A), the source and drain electrodes 92a to 92c, the source region the source and drain regions 89, the buffer layer 88, the microcrystalline semiconductor film 87, and the gate insulating film 52. The insulating film 76 is formed on the gate insulating films 52a and 52b. The insulating film 76 can be resistant to organic matter, metal matter, water vapor, and the like floating in the air. The insulating film 76 is preferably a dense film because it is intended to prevent the intrusion of contaminating impurities. By using a silicon nitride film, the oxygen concentration in the buffer layer 88 can be reduced to 5×10 19 atoms / c m 3 Less than 1 × 10 19 atoms / cm 3 It can be as follows:

[0105] Next, a contact hole is formed in the insulating film 76, and a source electrode is formed in the contact hole. The pixel electrode 77 is formed in contact with the electrode or drain electrode 92c. This corresponds to the cross section AB in 5(C).

[0106] The pixel electrode 77 is made of indium oxide containing tungsten oxide, indium oxide containing tungsten oxide, Indium zinc oxide, indium oxide with titanium oxide, indium with titanium oxide Tin oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, oxide A conductive material with light-transmitting properties, such as silicon-doped indium tin oxide, can be used. Cut.

[0107] The pixel electrode 77 is made of a conductive composition containing a conductive macromolecule (also called a conductive polymer). The pixel electrode formed using the conductive composition can be formed using a sheet resistor. It is preferable that the resistance is 10000Ω / □ or less and the light transmittance at a wavelength of 550 nm is 70% or more. It is also preferable that the resistivity of the conductive polymer contained in the conductive composition is 0.1 Ω cm or less. It is preferable that

[0108] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0109] In this manner, an element substrate that can be used in a light emitting device can be formed.

[0110] As shown in FIG. 2A, a microcrystalline semiconductor film 61, a buffer layer 62, and a layer imparting one conductivity type are provided. After forming the semiconductor film 63 to which the impurity element is added and the conductive films 85a to 85c, 4(A), the conductive films 85a to 85c are etched using a resist mask 86. Here, the conductive films 85a to 85c are wet etched using the resist mask 86. When the conductive films 85a to 85c are isotropically etched by etching, the conductive films 85a to 85c are selectively etched. As a result, the source and drain electrodes 92a to 92c, which have a smaller area than the resist mask 86, are 92c can be formed.

[0111] Next, as shown in FIG. 4B, a resist mask 86 is used to apply an impurity to impart one conductivity type. The semiconductor film 63 to which the element is added is etched. Here, the semiconductor film 63 is etched by dry etching. When the semiconductor film 63 to which the impurity element that gives the conductivity type is added is anisotropically etched, The source and drain regions 89 can be formed with an area approximately equal to that of the resist mask 86. Cut.

[0112] The ends of the source and drain electrodes 92a to 92c and the source and drain regions 89 The ends of the source and drain electrodes 92a to 92c are not aligned but are shifted. The distance between the ends of the source and drain electrodes is large, preventing leakage current and short circuits. Therefore, a thin film transistor with high reliability and high withstand voltage can be manufactured. It is possible.

[0113] As shown in FIGS. 1 to 4, the conductive film is etched by wet etching, and then by dry etching. By etching a semiconductor film to which an impurity element that gives one conductivity type is added, The edges of the source and drain electrodes and the source and drain regions are formed without using a photomask. The edges of the regions may not coincide and may be of different construction.

[0114] Next, a method for manufacturing a thin film transistor different from the above will be described with reference to FIGS. 6 to 9. Here, the source electrode or drain electrode and the source wiring or drain wiring are described. The different forms from the line are shown below.

[0115] As shown in FIG. 6A, a gate electrode 51 is formed on a substrate 50. Next, the gate electrode 51 is 1, gate insulating films 52a and 52b, a microcrystalline semiconductor film 53, a buffer layer 54, and a one-conductivity type A semiconductor film 55 to which an impurity element that imparts conductivity is added and a conductive film 65a are formed in this order. Then, a resist is applied onto the conductive film 65a, and a multi-tone mask shown in FIG. 1(A) is used to form a resist pattern of a desired thickness. A resist mask 81 having different regions is formed.

[0116] Next, a resist mask 81 is used to form the microcrystalline semiconductor film 53, the buffer layer 54, and the one-conductivity type The semiconductor film 55 to which the impurity element to be added and the conductive film 65a are etched and separated. As a result, as shown in FIG. 6B, a microcrystalline semiconductor film 61, a buffer layer 62, and a single conductivity type The semiconductor film 63 and the conductive film 85a are formed by adding an impurity element that imparts FIG. 6B corresponds to a cross-sectional view taken along line AB in FIG. 9A (however, the resist mask 86 is omitted). except).

[0117] Next, the resist mask 81 is ashed to form a separated resist mask 86 . Next, a semiconductor film doped with an impurity element that gives one conductivity type is formed using a resist mask 86. 63 and the conductive film 85a are etched and separated. The semiconductor film 63 to which the impurity element that imparts a conductivity type is added and the conductive film 85a are separated. As a result, as shown in FIG. 6(C), a pair of conductive films 89a and a pair of source and drain regions are formed. In this etching process, a buffer region 89 can be formed. A portion of layer 62 is also etched. The partially etched buffer layer is designated buffer layer 88. Here, a part of the buffer layer 88 is partially etched with a resist mask 86 having a reduced area. As a result of this chipping, the buffer layer 88 protrudes outward from the conductive film 85a. As shown in the figure, the side of the buffer layer has a stepped shape, so that the Therefore, the coverage of the insulating film on the pixel electrode and the thin film transistor is increased. This can reduce the leakage current between the transistor and the gate.

[0118] Next, the resist mask 86 is ashed. As a result, as shown in FIG. The area of ​​the resist mask is reduced and the thickness is reduced. By etching a part of the conductive film 89a using The source electrode and the drain electrode 92a are formed at the ends of the source electrode and the drain electrode 92a. The edges of the source and drain regions 89 do not coincide with each other and are misaligned. 1 is used to anisotropically etch the exposed portion of the conductive film 89a by dry etching. Thereafter, the resist mask 91 is removed.

[0119] As a result, the source electrode and drain electrode 92a having a smaller area than the conductive film 89a are formed. After that, the resist mask 91 is removed. Note that FIG. 7B shows the same pattern as that shown in FIG. 9B. As shown in FIG. 9B, the ends of the source and drain regions 89 are It can be seen that the electrodes are located outside the ends of the source and drain electrodes 92a. The ends of the phototransistor layer 88 are connected to the source and drain electrodes 92a and the source and drain regions. The source electrode and the drain electrode 92a are located outside the gate region 89. The electrodes are not connected to the electrodes formed in the adjacent pixels. The resist mask 86 is ashed to form a resist mask 91, which is used to form the source electrode and the drain electrode. The inner electrode 92a was formed, but as shown in the steps shown in FIGS. 6 may be used to form the source and drain electrodes 92a by wet etching. .

[0120] As shown in FIG. 7B, the ends of the source and drain electrodes 92a and the source and drain regions The edges of the drain region 89 are not aligned but are misaligned, so that the source electrode and the drain electrode Since the distance between the ends of the electrodes 92a is large, leakage current and short-circuit current between the source electrode and the drain electrode are reduced. This makes it possible to prevent breakdown of the thin film transistor, which is highly reliable and has a high breakdown voltage. It is possible to create a

[0121] Next, as shown in FIG. 7(C), the source and drain electrodes 92a, the source and drain regions The insulating film 76 is formed on the drain region 89, the buffer layer 88, and the gate insulating film 52b. The insulating film 76 can be formed in the same manner as the gate insulating films 52a and 52b.

[0122] Next, as shown in FIG. 8(A), a contact hole is formed in the insulating film 76, and the contact The source electrode or the drain electrode 92a is in contact with the source electrode or the drain electrode 92a at the hole, and the stacked wiring Lines 93b and 93c are formed. Note that FIG. 8A corresponds to the cross-sectional view taken along line AB in FIG. 9C. The wirings 93b and 93c are connected to the source electrodes or drain electrodes formed in the adjacent pixels. The wiring connects the electrodes.

[0123] Next, as shown in FIG. 8(B), a source electrode or a drain electrode is formed in the contact hole. The pixel electrode 77 is formed in contact with the other side of the inner electrode 92a. ) corresponds to the cross section AB of the

[0124] Through the above steps, a channel-etch type thin film transistor 84 can be formed. The channel-etch type thin film transistor requires fewer manufacturing steps and can reduce costs. In addition, by forming a channel formation region using a microcrystalline semiconductor film, the 2 / V Therefore, when this thin film transistor is used as a pixel element, a field effect mobility of 1.0 s can be obtained. As a switching element for the pixel, a driving circuit for the scanning line (gate line) is also formed. It can be used as an element.

[0125] According to this embodiment mode, a thin film transistor with highly reliable electrical characteristics can be manufactured. .

[0126] (Embodiment 2) Next, a manufacturing process of the light-emitting device will be described with reference to FIGS. Here, a light-emitting element that utilizes electroluminescence is used as an example. Light-emitting elements that utilize luminescence are either organic or inorganic compounds. Generally, the former are called organic EL elements and the latter are called inorganic EL elements. In addition, although the manufacturing process of the thin film transistor is shown in FIGS. 4 and 6 to 8 can be used as appropriate.

[0127] In an organic EL element, when a voltage is applied to the light-emitting element, electrons and positive electrodes are released from a pair of electrodes. The holes are then injected into a layer containing a light-emitting organic compound, allowing a current to flow. The recombination of carriers (electrons and holes) causes light-emitting organic compounds to form excited states. The excited state is formed, and light is emitted when the excited state returns to the ground state. Such a light-emitting element is called a current-excited light-emitting element.

[0128] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. In addition, the channel transistor shown in FIG. 2(C) is used as a thin film transistor for controlling the driving of the light emitting element. Although the present invention uses a thin film transistor of a channel-protected type, a thin film transistor of a channel-protected type may also be used. It can be used as appropriate.

[0129] 1 and 2, a thin film transistor 83 and a thin film transistor 84 are formed on the substrate 50 as shown in FIG. and 85, and an insulating film 76 that functions as a protective film is formed on the thin film transistor 83. The thin film transistor 85 is formed in the driving circuit 121. The pixel 83 is formed in the pixel section 122. Next, a planarizing film 111 is formed on the insulating film 76. and forming a source electrode or a drain electrode of the thin film transistor 83 on the planarizing film 111. The connecting pixel electrode 112 is formed.

[0130] The planarization film 111 is made of an organic resin such as acrylic, polyimide, or polyamide, or a silicon dioxide. It is preferable to form it using a son.

[0131] In FIG. 15(A), the thin film transistor of the pixel is an n-type, so the pixel electrode 112 is It is desirable to use a cathode, but conversely, in the case of p-type, it is desirable to use an anode. The cathode is made of a known material with a small work function, such as Ca, Al, CaF, or MgAg. , AlLi, etc. can be used.

[0132] Next, as shown in FIG. 15(B), a partition wall is formed on the end portion of the planarizing film 111 and the pixel electrode 112. The partition wall 113 has an opening, and the pixel electrode 112 is formed in the opening. The partition wall 113 is made of an organic resin film, an inorganic insulating film, or organic polysiloxane. In particular, a photosensitive material is used to form an opening on the pixel electrode, and the side of the opening is It is preferable that the wall be formed as an inclined surface having a continuous curvature.

[0133] Next, the light-emitting layer 114 is formed so as to contact the pixel electrode 112 in the opening of the partition wall 113. The light-emitting layer 114 may be composed of a single layer or a plurality of layers stacked together. It doesn't matter whether it's done or not.

[0134] Then, a common electrode 115 made of an anode material is formed so as to cover the light-emitting layer 114. The electrode 115 is made of the same conductive material having light transmission properties as those listed as the pixel electrode 77 in the first embodiment. The common electrode 115 can be formed of the above-mentioned transparent conductive film. Alternatively, a titanium nitride film or a titanium film may be used. The pixel electrode 112 and the light-emitting layer 114 are formed in the opening of the partition wall 113. The light emitting element 117 is formed by overlapping the common electrode 115. The common electrode 115 and the element 117 are connected to each other to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the element 117. It is preferable to form a protective film 116 on the partition wall 113. The protective film 116 is made of silicon nitride. It is possible to form a bare film, a silicon nitride oxide film, a DLC film, etc.

[0135] Furthermore, in practice, once the construction is completed up to Figure 15(B), it is necessary to make the enclosure airtight to prevent further exposure to the outside air. Highly durable and low outgassing protective film (laminate film, UV curable resin film) It is preferable to package (enclose) the product in a protective covering such as a protective film or a cover material.

[0136] Next, the configuration of the light emitting element will be described with reference to FIG. 16. Here, the driving TFT The cross-sectional structure of a pixel will be described using an n-type pixel as an example.

[0137] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is emitted from the surface opposite to the substrate. There are two types of emission: top emission, which extracts light from the surface on the substrate side, bottom emission, which extracts light from the surface on the substrate side, and There are light emitting devices with a double-sided emission structure in which light is emitted from the opposite surface. The present invention can also be applied to a light emitting device having a light emitting structure.

[0138] A light emitting element with a top emission structure will be described with reference to FIG.

[0139] In FIG. 16(A), a driving TFT 7001 is an n-type TFT, and light emitted from a light emitting element 7002 is 16A shows a cross-sectional view of a pixel in which the light emitting element 7 The cathode 7003 of the TFT 7002 is electrically connected to the driving TFT 7001. On top of that, a light-emitting layer 7004 and an anode 7005 are laminated in this order. Any known material can be used as long as it is a conductive film that is thin and reflects light. For example, Ca, Al, CaF, MgAg, AlLi, etc. are preferable. The light-emitting layer 7004 is a single It may be composed of one layer or a plurality of layers stacked together. When the cathode 7003 is composed of a plurality of layers, an electron injection layer, an electron transport layer, a light emitting layer, The hole transport layer and the hole injection layer are laminated in this order, although it is not necessary to provide all of these layers. The anode 7005 is formed using a conductive material that transmits light, such as titanium oxide. Indium oxide containing tungsten, indium zinc oxide containing tungsten oxide, oxide Indium oxide containing titanium, indium tin oxide containing titanium oxide, indium stannic acid Indium oxide (hereinafter referred to as ITO), indium zinc oxide, indium oxide with silicon oxide added A light-transmitting conductive film such as a tin oxide film may also be used.

[0140] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 is the light-emitting element 7002. In the case of the pixel shown in FIG. 16(A), the light emitted from the light emitting element 7002 corresponds to The light is emitted toward the anode 7005 as indicated by the white arrow.

[0141] Next, a light emitting element with a bottom emission structure will be described with reference to Figure 16(B). When 7011 is n-type and light emitted from the light emitting element 7012 is emitted to the cathode 7013 side FIG. 16(B) shows a cross-sectional view of the pixel. A cathode 7013 of the light-emitting element 7012 is formed on the light-transmitting conductive material 7017. A light-emitting layer 7014 and an anode 7015 are stacked in this order on the cathode 7013. When the anode 7015 is light-transmitting, a light-reflecting or light-shielding layer is formed on the anode. The cathode 7013 may be formed in the same manner as in FIG. In addition, any known material can be used as long as it is a conductive film with a small work function. The thickness is set to a level that allows light to pass through (preferably, about 5 nm to 30 nm). For example, The cathode 7013 can be made of Al having a thickness of 1000 nm. As in FIG. 16(A), even if it is composed of a single layer, it may be composed of a plurality of layers stacked. The anode 7015 does not need to transmit light, but it may be formed as shown in FIG. ) can be formed using a light-transmitting conductive material. For example, a light-reflecting metal or the like can be used for 016, but the material is not limited to a metal film. For example, a resin containing a black pigment may be used.

[0142] The region where the light-emitting layer 7014 is sandwiched between the cathode 7013 and the anode 7015 is the light-emitting element 701 In the case of the pixel shown in FIG. 16B, the light emitted from the light emitting element 7012 is , and is emitted toward the cathode 7013 as indicated by the white arrow.

[0143] Next, a light emitting device with a dual emission structure will be described with reference to FIG. 16(C). ) a transparent conductive material 7027 electrically connected to a driving TFT 7021 A cathode 7023 of the light-emitting element 7022 is formed on the cathode 7023. 24 and an anode 7025 are laminated in this order. The cathode 7023 is the same as in the case of FIG. In addition, any known material can be used as long as it is a conductive film with a small work function. For example, Al having a thickness of 20 nm is used as the cathode 7023. The light-emitting layer 7024 can be formed of a single layer, as in FIG. The anode 7 may be formed of a single layer or a plurality of layers stacked together. 025 is formed using a conductive material having light transmitting properties, similar to FIG. 16(A). It is possible.

[0144] The overlapping portion of the cathode 7023, the light-emitting layer 7024, and the anode 7025 is the light-emitting element 7 In the case of the pixel shown in FIG. 16C, the light emitted from the light emitting element 7022 Light is emitted to both the anode 7025 side and the cathode 7023 side as indicated by the white arrows.

[0145] Although organic EL elements have been described as light-emitting elements here, inorganic EL elements can also be used as light-emitting elements. It is also possible to provide an L element.

[0146] In this embodiment, a thin film transistor (driving TFT) for controlling the driving of a light emitting element In the example shown, the light emitting element is electrically connected to the driving TFT. A current control TFT may be connected.

[0147] Note that the light-emitting device shown in this embodiment mode is not limited to the configuration shown in FIG. Various modifications based on the technical concept of the present invention are possible.

[0148] Through the above steps, a light-emitting device can be manufactured. The use of thin film transistors with low current and highly reliable electrical properties allows for The light emitting device has high performance and high visibility. Since a thin film transistor using It is possible.

[0149] (Embodiment 3) Next, a structure of a light-emitting panel, which is one embodiment of a light-emitting device of the present invention, will be described below.

[0150] In FIG. 12A, only a signal line driver circuit 6013 is formed separately and is formed on a substrate 6011. 6 shows a configuration of a light-emitting panel connected to a pixel portion 6012. The driver circuit 6014 uses a thin film transistor in which a microcrystalline semiconductor film is used for a channel formation region. The thickness of the thin film transistor is higher than that of the thin film transistor using a microcrystalline semiconductor film in the channel formation region. By forming a signal line driver circuit using transistors that can obtain field effect mobility, the scanning line driver This makes it possible to stabilize the operation of the signal line driver circuit, which requires a higher drive frequency than the circuit. The signal line driver circuit 6013 is a transistor using a single crystal semiconductor for a channel forming region. thin-film transistors that use polycrystalline semiconductors in the channel formation region, or SOI The pixel portion 6012, the signal line driver circuit 6013, and the driving circuit 6014 may be the same. The power supply potential and various signals are transmitted to the scanning line driving circuit 6014 via the FPC 6015. are supplied.

[0151] The signal line driver circuit and the scanning line driver circuit may both be formed on the same substrate as the pixel portion. stomach.

[0152] In addition, when a driver circuit is formed separately, the substrate on which the driver circuit is formed is not necessarily the same as the substrate on which the pixel portion is formed. It is not necessary to attach it to the substrate on which it is formed, but it can be attached to, for example, an FPC. In FIG. 12B, only a signal line driver circuit 6023 is separately formed on a substrate 6021. A light-emitting device panel in which the formed pixel portion 6022 and the signal line driver circuit 6023 are connected The pixel portion 6022 and the scanning line driver circuit 6024 are formed by using a microcrystalline semiconductor film as a channel. The signal line driver circuit 6023 is formed by using the thin film transistors used in the filter forming region. The pixel section 6022 is connected to the signal line driver 6025. The power supply potential, various signals, etc. are supplied to the circuit 6023 and the scanning line driver circuit 6024, respectively. Supplied via PC6025.

[0153] Further, only a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed using a microcrystalline semiconductor film. The thin film transistor used in the channel forming region is formed on the same substrate as the pixel portion, and the rest It may be formed separately and electrically connected to the pixel portion. The analog switch 6033a of the circuit is connected to the pixel portion 6032 and the scanning line driver circuit 6034. The signal line driver circuit is formed on the same substrate 6031 as the shift register 6033b. The pixel portion 6032 and the light emitting device panel are formed on different substrates and bonded together. The scanning line driver circuit 6034 is a thin film transistor using a microcrystalline semiconductor film in a channel forming region. The shift register 6033b of the signal line driver circuit is formed by using an FPC 60 35. The pixel portion 6032 and the signal line driver circuit are connected to The scanning line driver circuit 6034 is connected to the power supply potential and various signals via the FPC 6035. and supplied.

[0154] As shown in FIG. 12, in the light emitting device of the present invention, a part or all of the driving circuit is arranged in the same manner as the pixel section. A thin film transistor using a microcrystalline semiconductor film in a channel formation region is formed on the same substrate. It is possible.

[0155] The method for connecting the separately formed substrate is not particularly limited, and may be a known COG method. The method of connection may be a wire bonding method, a TAB method, or the like. The positions are not limited to those shown in FIG. 12, as long as electrical connection is possible. Alternatively, a controller, a CPU, a memory, etc. may be separately formed and connected.

[0156] The signal line driver circuit used in the present invention has only a shift register and an analog switch. In addition to shift registers and analog switches, buffers, level shifters, It may have other circuits such as a gate, a source follower, etc. It is not necessary to provide a switching switch. For example, a decoder circuit may be used instead of a shift register. You can use another circuit that can select the signal line like this, or instead of an analog switch A latch or the like may also be used.

[0157] A block diagram of a light emitting device of the present invention is shown in FIG. a pixel portion 700 having a plurality of pixels, a scanning line driver circuit 702 for selecting each pixel, and a selection and a signal line driver circuit 703 for controlling input of a video signal to the selected pixel.

[0158] In FIG. 18, a signal line driver circuit 703 includes a shift register 704 and an analog switch 707. The shift register 704 has a clock signal (CLK), a start pulse The clock signal (CLK) and start pulse signal (SP) are input. ) is input, a timing signal is generated in the shift register 704, and an analog The signal is input to switch 705 .

[0159] A video signal is also applied to the analog switch 705. The analog switch 705 outputs the video signal in accordance with the input timing signal. The signal is sampled and supplied to the signal line of the subsequent stage.

[0160] Next, the configuration of the scanning line driving circuit 702 will be described. The device has a level shifter 706 and a buffer 707. In the scanning line driver circuit 702, a clock signal is input to the shift register 706. The selection signal is generated by inputting the (CLK) and start pulse signal (SP). The generated selection signal is buffered and amplified in a buffer 707 and is applied to the corresponding scanning line. The gates of the transistors of one line of pixels are connected to the scan line. And because the transistors of the pixels in one line must all be turned on at once, The ferroelectric capacitor 707 is capable of passing a large current.

[0161] A full-color light-emitting device that transmits video signals corresponding to R (red), G (green), and B (blue) in sequence. When the shift register 704 and the analog The number of terminals for connecting the analog switch 705 to the pixel section 700 is This corresponds to about one-third of the number of terminals for connecting the signal lines of the analog switch 7. By forming the analog switch 705 on the same substrate as the pixel section 700, the analog switch 705 can be connected to the pixel section 7 The number of terminals used to connect the separately formed substrate compared to when it is formed on a different substrate from 00 This can reduce the probability of connection failure and increase yield.

[0162] The scanning line driving circuit 702 in FIG. 18 includes a shift register 706 and a buffer 707. However, the scanning line driver circuit 702 may be configured with a shift register 706 .

[0163] The configuration shown in FIG. 18 is merely one example of a light emitting device of the present invention, and is not intended to be a signal line drive device. The configuration of the circuit and the scanning line driver circuit is not limited to this.

[0164] Next, a shift register including thin film transistors using microcrystalline semiconductor films all having the same polarity is An embodiment of the shifter will be described with reference to Figs. 19 and 20. Fig. 19 shows the shifter of this embodiment. The shift register shown in FIG. 19 is made up of multiple flip-flops (flip-flops). The first clock signal is a first flip-flop 701-1 to a second flip-flop 701-n. It operates when a clock signal, a start pulse signal, and a reset signal are input.

[0165] The connection relationship of the shift register in Fig. 19 will be explained. The shift register in Fig. 19 has i-stage The first flip-flop 701-i (one of the flip-flops 701-1 to 701-n) In either case, the first wiring 501 shown in FIG. 20 is connected to the seventh wiring 717-i-1, The second wiring 502 shown in FIG. 20 is connected to the seventh wiring 717-i+1, and the The third wiring 503 is connected to the seventh wiring 717-i, and the sixth wiring 50 shown in FIG. 6 is connected to the fifth wiring 715.

[0166] In addition, the fourth wiring 504 shown in FIG. 20 is connected to the second wiring 7 in the odd-numbered flip-flops. 12, and in the even-numbered flip-flops, it is connected to the third wiring 713, and The fifth wiring 505 shown in FIG.

[0167] However, the first wiring 501 shown in FIG. 20 of the first stage flip-flop 701-1 is The second wiring 711 is connected to the n-th stage flip-flop 701-n shown in FIG. 502 is connected to the sixth wiring 716 .

[0168] The first wiring 711, the second wiring 712, the third wiring 713, and the sixth wiring 716 are They may be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fourth wiring 714 and the fifth wiring 715 are respectively connected to the first power supply line and the second power supply line. You can call.

[0169] Next, the details of the flip-flop shown in FIG. 19 are shown in FIG. 20. The flip-flop includes a first thin film transistor 171, a second thin film transistor 172, a third thin film transistor 173, and a the first thin film transistor 173, the fourth thin film transistor 174, the fifth thin film transistor 1 75, the sixth thin film transistor 176, the seventh thin film transistor 177 and the eighth thin film transistor In this embodiment, the first thin film transistor 171 and the second thin film transistor 178 are The second thin film transistor 172, the third thin film transistor 173, and the fourth thin film transistor 174, the fifth thin film transistor 175, the sixth thin film transistor 176, the seventh thin film transistor The eighth thin film transistor 177 and the eighth thin film transistor 178 are n-channel transistors. When the gate-source voltage (Vgs) exceeds the threshold voltage (Vth), the transistor becomes conductive. It shall be as follows.

[0170] Next, the connection configuration of the flip-flop shown in FIG. 20 will be described below.

[0171] The first electrode (either the source electrode or the drain electrode) of the first thin film transistor 171 is The second electrode (source electrode) of the first thin film transistor 171 is connected to the fourth wiring 504. The other of the drain electrodes is connected to a third wiring 503 .

[0172] The first electrode of the second thin film transistor 172 is connected to the sixth wiring 506, and the second thin film A second electrode of the transistor 172 is connected to a third wiring 503 .

[0173] The first electrode of the third thin film transistor 173 is connected to the fifth wiring 505, and the The second electrode of the transistor 173 is connected to the gate electrode of the second thin film transistor 172. The gate electrode of the third thin film transistor 173 is connected to a fifth wiring 505 .

[0174] The first electrode of the fourth thin film transistor 174 is connected to the sixth wiring 506, and the fourth thin film The second electrode of the transistor 174 is connected to the gate electrode of the second thin film transistor 172. The gate electrode of the fourth thin film transistor 174 is connected to the gate electrode of the first thin film transistor 171. connected to the ground electrode.

[0175] The first electrode of the fifth thin film transistor 175 is connected to the fifth wiring 505, and the fifth thin film The second electrode of the transistor 175 is connected to the gate electrode of the first thin film transistor 171. The gate electrode of the fifth thin film transistor 175 is connected to the first wiring 501 .

[0176] The first electrode of the sixth thin film transistor 176 is connected to the sixth wiring 506, and the sixth thin film The second electrode of the transistor 176 is connected to the gate electrode of the first thin film transistor 171. The gate electrode of the sixth thin film transistor 176 is connected to the gate electrode of the second thin film transistor 172. connected to the ground electrode.

[0177] The first electrode of the seventh thin film transistor 177 is connected to the sixth wiring 506, and the The second electrode of the transistor 177 is connected to the gate electrode of the first thin film transistor 171. The gate electrode of the seventh thin film transistor 177 is connected to the second wiring 502. The first electrode of the thin film transistor 178 is connected to the sixth wiring 506, and the eighth thin film transistor a second electrode of the second thin film transistor 178 connected to the gate electrode of the second thin film transistor 172; The gate electrode of the eighth thin film transistor 178 is connected to the first wiring 501 .

[0178] The gate electrode of the first thin film transistor 171 and the gate electrode of the fourth thin film transistor 174 are a first electrode of the fifth thin film transistor 175; a second electrode of the sixth thin film transistor 176; The connection point of the second electrode of the seventh thin film transistor 177 and the second electrode of the seventh thin film transistor 178 is the node 143. Furthermore, the gate electrode of the second thin film transistor 172, the gate electrode of the third thin film transistor The second electrode of the fourth thin film transistor 173, the second electrode of the sixth thin film transistor 174, The connection point of the gate electrode of the eighth thin film transistor 176 and the second electrode of the eighth thin film transistor 178 is The code is 144.

[0179] The first wiring 501, the second wiring 502, the third wiring 503, and the fourth wiring 504 are , may be referred to as a first signal line, a second signal line, a third signal line, and a fourth signal line, respectively. Furthermore, the fifth wiring 505 may be called the first power supply line and the sixth wiring 506 may be called the second power supply line. good.

[0180] FIG. 21 shows an example of a top view of the flip-flop shown in FIG.

[0181] The conductive film 901 includes a portion that functions as a first electrode of the first thin film transistor 171. , and is connected to the fourth wiring 504 via a wiring 951 formed at the same time as the pixel electrode.

[0182] The conductive film 902 includes a portion that functions as a second electrode of the first thin film transistor 171. The pixel electrode is connected to the third wiring 503 via a wiring 952 formed at the same time as the pixel electrode.

[0183] The conductive film 903 is a gate electrode of the first thin film transistor 171 and a gate electrode of the fourth thin film transistor 172. The gate electrode of the gate electrode 174 is included.

[0184] The conductive film 904 is a first electrode of the second thin film transistor 172, a second electrode of the sixth thin film transistor a first electrode of the fourth thin film transistor 174; a first electrode of the eighth thin film transistor 176; The sixth wiring 506 includes a portion that functions as the first electrode of the transistor 178. .

[0185] The conductive film 905 includes a portion that functions as a second electrode of the second thin film transistor 172. The pixel electrode is connected to the third wiring 503 via a wiring 954 formed at the same time as the pixel electrode.

[0186] The conductive film 906 is a gate electrode of the second thin film transistor 172 and a gate electrode of the sixth thin film transistor 173. The gate electrode of the gate electrode 176 is included.

[0187] The conductive film 907 includes a portion that functions as a first electrode of the third thin film transistor 173. , and is connected to the fifth wiring 505 via wiring 955.

[0188] The conductive film 908 is a second electrode of the third thin film transistor 173 and a second electrode of the fourth thin film transistor 174. The wiring 9 includes a portion that functions as the second electrode of the pixel electrode 174 and is formed at the same time as the pixel electrode. It is connected to the conductive film 906 via 56.

[0189] The conductive film 909 includes a portion that functions as a gate electrode of the third thin film transistor 173. , and is connected to the fifth wiring 505 via wiring 955.

[0190] The conductive film 910 includes a portion that functions as a first electrode of the fifth thin film transistor 175. , and is connected to the fifth wiring 505 via a wiring 959 formed at the same time as the pixel electrode.

[0191] The conductive film 911 is a second electrode of the fifth thin film transistor 175 and a second electrode of the seventh thin film transistor 176. The wiring 9 includes a portion that functions as the second electrode of the pixel electrode 177 and is formed at the same time as the pixel electrode. It is connected to the conductive film 903 via 58.

[0192] The conductive film 912 includes a portion that functions as a gate electrode of the fifth thin film transistor 175. , and is connected to the first wiring 501 via a wiring 960 formed at the same time as the pixel electrode.

[0193] The conductive film 913 includes a portion that functions as a second electrode of the sixth thin film transistor 176. The pixel electrode is connected to the conductive film 903 via a wiring 957 formed at the same time as the pixel electrode.

[0194] The conductive film 914 includes a portion that functions as a gate electrode of the seventh thin film transistor 177. , and is connected to the second wiring 502 via a wiring 962 formed at the same time as the pixel electrode.

[0195] The conductive film 915 includes a portion that functions as a gate electrode of the eighth thin film transistor 178. The pixel electrodes are connected to the conductive film 912 via wirings 961 formed at the same time as the pixel electrodes.

[0196] The conductive film 916 includes a portion that functions as a second electrode of the eighth thin film transistor 178. The pixel electrode is connected to the conductive film 906 via a wiring 953 formed at the same time as the pixel electrode.

[0197] Note that parts of the microcrystalline semiconductor films 981 to 988 are the first to eighth thin film transistors, respectively. The thin film transistor functions as a channel forming region.

[0198] Note that the circuits shown in FIGS. 19 and 20 can be implemented by using a microcrystalline semiconductor in a channel formation region. By configuring the transistors, the layout area can be reduced. For example, the amorphous semiconductor film is formed into a channel-type When a microcrystalline semiconductor film is used for a channel formation region, the following is compared: When a microcrystalline semiconductor film is used for the channel formation region, the field-effect mobility of the transistor is higher. As a result, the channel width of the transistor can be reduced. As an example, the second thin film transistor 172 The channel width is preferably 3000 μm or less, more preferably 2000 μm or less. It's nice.

[0199] 20, the second thin film transistor 172 is connected to the third wiring 503 at a low level. During this period, the second thin film transistor 172 is always in an on state. Therefore, a strong stress is applied to the second thin film transistor 172. This makes the transistor characteristics more susceptible to deterioration. The voltage gradually increases, and as a result, the current decreases. A second thin-film transistor is used to ensure sufficient current can be supplied even if the first transistor deteriorates. It is desirable that the channel width of the transistor 172 is large. It is desirable that the second thin film transistor is compensated for so as not to impede the circuit operation. A transistor is arranged in parallel with the second thin film transistor 172 and is connected to the second thin film transistor 172. It is desirable to make them less susceptible to deterioration by making them turn on at the same time. stomach.

[0200] However, there is a difference between the case where an amorphous semiconductor film is used for the channel formation region and the case where a microcrystalline semiconductor film is used for the channel formation region. When compared with the case where a microcrystalline semiconductor film is used for the channel formation region, Therefore, when a microcrystalline semiconductor film is used for a channel formation region, In this case, the channel width of the transistor can be reduced. This allows the device to operate normally without the need for a dedicated circuit. The product can be made smaller.

[0201] Next, the appearance and cross section of a light-emitting display panel, which corresponds to one embodiment of the light-emitting device of the present invention, will be described. This will be explained with reference to FIG. 17. FIG. 17A shows a microcrystalline semiconductor film formed over a first substrate. The thin film transistor and the light emitting element used in the channel forming region are sealed between the second substrate. 17(B) is a top view of the panel sealed with a material, and FIG. ... This corresponds to the cross-sectional view in

[0202] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. A sealing material 4005 is provided so as to cover the pixel portion 4002. A second substrate 4006 is provided on the circuit 4004. The scanning line driving circuit 4004 is a circuit board including a first substrate 4001, a sealing material 4005, and a second substrate 400. 6, together with the filler 4007. The area surrounded by the insulating material 4005 is different from the area surrounded by the insulating material 4005. A signal line driver circuit 4003 formed of a crystalline semiconductor film is mounted on the substrate. The present invention relates to a signal line driver circuit having a thin film transistor in which a polycrystalline semiconductor film is used in a channel formation region. An example in which a channel is bonded to a first substrate 4001 will be described. The signal line driver circuit is formed using the transistors used in the filter formation area, and the circuit is then bonded together. In FIG. 17, a thin film formed of a polycrystalline semiconductor film included in the signal line driver circuit 4003 is A film transistor 4009 is illustrated.

[0203] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 17B, ​​the thin film transistor included in the pixel portion 4002 is In this embodiment, the thin film transistor 4010 is shown as an example. It is assumed that 010 is a driving TFT, while thin film transistor 4010 is a current control TFT. The thin film transistor 4010 may be a microcrystalline TFT or an erasing TFT. This corresponds to a thin film transistor in which a semiconductor film is used in a channel formation region.

[0204] The pixel electrode 4030 of the light emitting element 4011 is a thin film. The source electrode or drain electrode 4017 of the membrane transistor 4010 is electrically connected to the In this embodiment mode, the light-transmitting conductive material 4012 of the light-emitting element 4011 is The light-emitting element 4011 has the same structure as that shown in this embodiment. The direction of light extracted from the light emitting element 4011 and the thin film transistor 4010 The configuration of the light emitting element 4011 can be changed as appropriate in accordance with the polarity of the light emitting element.

[0205] In addition, a signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel driver circuit 4006 are separately formed. Various signals and potentials applied to the portion 4002 are not shown in the cross-sectional view shown in FIG. 17(B). It is not connected to the power supply, but is supplied from FPC 4018 via wiring 4014 and 4015. There are.

[0206] In this embodiment, the connection terminal 4016 is connected to the pixel electrode 4030 of the light emitting element 4011. The lead wirings 4014 and 4015 are formed from the same conductive film as the wiring 40. It is formed from the same conductive film as 17.

[0207] The connection terminal 4016 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. are electrically connected.

[0208] The substrate located in the direction of light extraction from the light emitting element 4011 must be transparent. In this case, a glass plate, a plastic plate, a polyester film or an acrylic film A light-transmitting material such as aluminum is used.

[0209] In addition to inert gases such as nitrogen and argon, filler 4007 can also be used with ultraviolet curing gas. Resin or thermosetting resin can be used, such as PVC (polyvinyl chloride), acrylic , polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV In this embodiment, the filler can be ethylene vinyl acetate (A). Nitrogen was used.

[0210] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates), color filters, etc. may be provided as needed. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. It is possible to apply an anti-glare treatment that can diffuse reflected light and reduce glare.

[0211] In FIG. 17, the signal line driver circuit 4003 is formed separately and mounted on the first substrate 4001. However, this embodiment is not limited to this configuration. It may be formed separately and mounted, or only a part of the signal line driver circuit or a part of the scanning line driver circuit may be mounted. may be formed separately and mounted.

[0212] This embodiment can be implemented in combination with the configurations described in other embodiments. be.

[0213] (Fourth embodiment) The light emitting device obtained by the present invention can be used for an active matrix EL module. That is, the present invention can be applied to all electronic devices that incorporate such a display unit. Cut.

[0214] Such electronic devices include cameras such as video cameras and digital cameras, head-mounted cameras, displays (goggle-type displays), car navigation systems, projectors, car Stereos, personal computers, personal digital assistants (mobile computers, mobile phones, etc.) Examples of such applications are shown in Figure 13.

[0215] FIG. 13(A) is a television device. The display module is as shown in FIG. The TV set can be completed by installing it in a housing. The display panel is also called a display module. 03 is formed, and other accessories include a speaker unit 2009 and an operation switch. In this way, the television device can be completed.

[0216] As shown in FIG. 13A, a display panel 2002 using light-emitting elements is mounted on a housing 2001. The receiver 2005 can receive general television broadcasts, and the modem 2004 By connecting to a wired or wireless communication network via It can also be used for two-way (between sender and receiver, or between receivers) information communication. The television set can be operated using a switch built into the housing or a separate remote control. This can be done by the remote control device 2006, and the information to be output is also displayed on this remote control device. A display unit 2007 may also be provided.

[0217] In addition to the main screen 2003, the television device also has a sub-screen 2008 for second display. It may be formed of a panel and may have a configuration for displaying the channel, volume, etc. The main screen 2003 is formed of a light-emitting display panel with an excellent viewing angle, and the sub-screen is formed of a low-power display panel. It may be formed of a light-emitting display panel that can display with electricity. To achieve this, the main screen 2003 is formed of a light-emitting display panel, and the sub-screen is formed of a light-emitting display panel. The sub-screen may be configured to be able to blink.

[0218] FIG. 14 is a block diagram showing the main components of a television device. A pixel portion 921 is formed on the display panel 920. A signal line driver circuit 922 and a scanning line driver circuit 923 are connected to the display panel 920. The display panel 900 may be mounted using the COG method.

[0219] As for the configuration of other external circuits, on the video signal input side, a signal received by a tuner 924 A video signal amplifier circuit 925 amplifies the video signal, and the signal output from the video signal amplifier circuit 925 is converted into red. a video signal processing circuit 926 that converts the video signals into color signals corresponding to the colors 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 2 It has a control circuit 927 for converting the input specifications of the driver IC. The control circuit 927 outputs signals to the scanning line side and the signal line side. In this case, a signal dividing circuit 928 is provided on the signal line side to divide the input digital signal into m parts. It may also be configured to supply the power.

[0220] Of the signals received by the tuner 924, the audio signal is sent to an audio signal amplifier circuit 929. The output is supplied to a speaker 933 via an audio signal processing circuit 930. 1 receives control information for the receiving station (receiving frequency) and volume from an input unit 932, and A signal is sent to the audio signal processing circuit 930.

[0221] Of course, the present invention is not limited to television devices, and may be applied to monitors of personal computers. In addition, it is used for large-area displays such as information display boards at train stations and airports, and advertising display boards on the street. It can also be used for a variety of purposes as a display medium.

[0222] FIG. 13(B) shows an example of a mobile phone 2201. This mobile phone 2201 has a display The display unit 2202 includes an operation unit 2203. By applying the light emitting device described in the above embodiment, mass productivity can be improved.

[0223] The portable computer shown in FIG. 13C includes a main body 2401, a display unit 2402, etc. By applying the light-emitting device described in the above embodiment to the display portion 2402, , and mass productivity can be improved.

[0224] FIG. 13(D) shows a table lamp, which includes a lighting unit 2501, a shade 2502, and an adjustable arm 2503. , a support 2504, a base 2505, and a power supply 2506. The lighting fixture is fabricated by using the above in the lighting unit 2501. This invention also includes a lighting fixture or a wall-mounted lighting fixture. This makes it possible to provide an inexpensive desk lighting fixture. [Example]

[0225] A microcrystalline silicon film was formed, and the crystallinity of the film was measured by Raman spectroscopy. The results are shown in FIG.

[0226] The conditions for forming the microcrystalline silicon film were RF power frequency of 13.56 MHz and film formation temperature of 280 The temperature was set to ℃, the ratio of hydrogen flow rate to silane gas flow rate was set to 100:1, and the film was formed at a pressure of 280 Pa. FIG. 22(A) shows the Raman scattering spectrum, and the power of the RF power supply during film formation was The results are a comparison of a microcrystalline silicon film at 100W and a microcrystalline silicon film at 300W. do.

[0227] The crystal peak position of single crystal silicon is 521 cm -1 In addition, amorphous Of course, no crystal peaks could be measured for silicon, and as shown in Figure 22(B), 0cm -1 In this specification, the microcrystalline silicon film is Measured with a Raman spectrometer at 481 cm -1 More than 520cm -1 Check the crystal peak position below It refers to what is possible.

[0228] The crystal peak position of the microcrystalline silicon film when the RF power supply power during film formation was 100 W was 518.6 cm -1 and the full width at half maximum (FWHM) is 11.9 cm -1 and crystalline / amorphous The peak intensity ratio (Ic / Ia) is 4.1.

[0229] In addition, the crystal peak position of the microcrystalline silicon film when the power of the RF power source during film formation was 300 W was 51 4.8cm -1 and the full width at half maximum (FWHM) is 18.7 cm -1 and crystalline / amorphous The first peak intensity ratio (Ic / Ia) is 4.4.

[0230] As shown in Figure 22(A), the crystal peak position and half-width vary greatly depending on the RF power. This is because high power increases ion bombardment and inhibits grain growth, resulting in a tendency for grain size to become small. This is thought to be due to the fact that the microcrystalline silicon film used in the measurement of FIG. Since the power frequency of the VD device is 13.56 MHz, the crystalline / amorphous peak intensity ratio ( Ic / Ia) is 4.1 or 4.4, but the RF power frequency is 27MHz. It was also confirmed that the crystalline / amorphous peak intensity ratio (Ic / Ia) can be set to 6 if Therefore, RF power frequencies higher than 27 MHz, e.g., 2.45 GHz, Hz RF power frequency, the crystalline / amorphous peak intensity ratio (Ic / I a) can be increased. [Example]

[0231] In this example, the transistor characteristics and electron density distribution of the thin film transistor according to the present invention are described. The results of device simulations are shown below. We use the device simulator "ATLAS" made by ilvaco.

[0232] The device structure is shown in Figure 23. The insulating substrate 2301 is mainly made of silicon oxide (dielectric constant 4.1). The thickness of the insulating substrate 2301 is assumed to be 0.5 μm. In actual manufacturing processes, 0.5mm, 0.7mm, etc. are often used, but insulating base The thickness is sufficient so that the electric field at the bottom surface of the plate 2301 does not affect the thin film transistor characteristics. is defined as follows.

[0233] A gate electrode 23 made of molybdenum (thickness: 150 nm) is formed on an insulating substrate 2301. The work function of molybdenum is 4.6 eV.

[0234] On the gate electrode 2303, a silicon nitride film (dielectric constant 7.0, thickness 110 nm) and a silicon oxynitride film are formed. A gate insulating film 2305 with a laminated structure and a base film (dielectric constant 4.1, thickness 110 nm) is laminated. There are.

[0235] A μc-Si film 2307 and an a-Si film 2309 are stacked on a gate insulating film 2305. Here, the product of the μc-Si film 2307 with a thickness of 0 nm and the a-Si film with a thickness of 100 nm is layer, a 10 nm thick μc-Si film 2307, and a 90 nm thick a-Si film 2309. layer, a 50 nm thick μc-Si film 2307, and a 50 nm thick a-Si film 2309. layer, a 90 nm thick μc-Si film 2307, and a 10 nm thick a-Si film 2309. layer, the product of the μc-Si film 2307 having a thickness of 100 nm and the a-Si film 2309 having a thickness of 0 nm Each layer has its own set of conditions.

[0236] The a-Si film 2309 is a first a-Si(n + ) film 2311 and the second a-Si(n +In the area overlapping with the a-Si film 2313, an additional 50 nm of a-Si film is formed in addition to the above thickness. That is, the first a-Si(n + ) film 2311 and the second a-Si(n + ) membrane 2 In the area where 313 is not formed, the a-Si film 2309 is partially etched by 50 nm. It has a concave shape.

[0237] On the a-Si film 2309, a first a-Si(n + ) film 2311 (thickness 50 nm) and the second a-Si(n + ) film 2313 (thickness: 50 nm) are laminated. In the transistor, the first a-Si(n + ) film 2311 and the second a-Si(n + )film The distance between the electrode 2313 and the channel length L is 6 μm. The channel width W is set to 15 μm.

[0238] First a-Si(n + ) film 2311 and the second a-Si(n + ) membrane 2313 and on top of it, The source electrode 2315 and the drain electrode 231 are made of Butan-Mo (thickness 300 nm). 7 are laminated on the source electrode 2315 and the first a-Si(n + ) membrane 2311, and the drain electrode 2317 and the second a-Si(n + ) film 2313 is ohmic It is defined as contact.

[0239] FIG. 24 shows the thickness of the μc-Si film and the a-Si film in the thin film transistor shown in FIG. When changing and performing device simulation, the DC characteristics (Vg-Id characteristics, Vd = 25 shows the results of the 14V) and the thickness of the μc-Si film 2307 is 10 nm and the a- The electron concentration distribution of the thin film transistor when the thickness of the Si film is 90 nm is shown in Figure 25( A) shows the electron concentration distribution when the thin film transistor is on (Vg is +10V, Vd is 14V). Figure 25(B) shows the results of the electron concentration distribution in the off state (Vg is -10 V, Vd is 14 V). The results for the fabric are shown.

[0240] From FIG. 24, it can be seen that the off-current decreases as the thickness of the a-Si film increases. In addition, by making the thickness of the a-Si film 50 nm or more, the drain current when Vg is -20 V is The current is 1×10 -13 It can be less than A.

[0241] It can also be seen that the on-current increases as the thickness of the μc-Si film increases. By making the μc-Si film thicker than 10 nm, the drain current at Vg of 20 V is Flow 1×10 -5 It can be A or higher.

[0242] As can be seen from FIG. 25(A), in the on-state, the electron density is higher in the μc-Si film than in the a-Si film. In other words, the electron density is high in the μc-Si film, which has high electrical conductivity. Therefore, in the on state, electrons flow easily and the drain current increases.

[0243] As shown in FIG. 25(B), in the off state, the electron density is higher in the a-Si film than in the μc-Si film. In other words, the electron density is high in the a-Si film with low electrical conductivity. In the off state, electrons do not flow easily, and the thin film using the a-Si film for the channel formation region It can be seen that the drain current is the same as that of a transistor.

[0244] From the above, as shown in Figure 23, a μc-Si film is formed on the gate insulating film, and μc An a-Si film is formed on the -Si film, and a source region and a drain region are formed on the a-Si film. The thin film transistor can reduce the off-current and increase the on-current. You will realize something.

Claims

1. having first to eighth transistors, one of the source electrode and the drain electrode of the first transistor is always electrically connected to an output signal wiring; the other of the source electrode and the drain electrode of the first transistor is always electrically connected to a first signal line; one of the source electrode and the drain electrode of the second transistor is always electrically connected to the output signal wiring; the other of the source electrode and the drain electrode of the second transistor is always electrically connected to a power supply line; one of a source electrode and a drain electrode of the third transistor is always electrically connected to a gate electrode of the second transistor; the other of the source electrode and the drain electrode of the third transistor is always electrically connected to the first wiring; a gate electrode of the third transistor is always electrically connected to the first wiring; one of a source electrode and a drain electrode of the fourth transistor is always electrically connected to a gate electrode of the second transistor; the other of the source electrode and the drain electrode of the fourth transistor is always electrically connected to the power supply line; a gate electrode of the fourth transistor is always electrically connected to a gate electrode of the first transistor; one of a source electrode and a drain electrode of the fifth transistor is always electrically connected to a gate electrode of the first transistor; a gate electrode of the fifth transistor is always electrically connected to a second signal line; one of a source electrode and a drain electrode of the sixth transistor is always electrically connected to a gate electrode of the first transistor; the other of the source electrode and the drain electrode of the sixth transistor is always electrically connected to the power supply line; a gate electrode of the sixth transistor is always electrically connected to a gate electrode of the second transistor; one of the source electrode and the drain electrode of the seventh transistor is always electrically connected to the gate electrode of the first transistor; the other of the source electrode and the drain electrode of the seventh transistor is always electrically connected to the power supply line; a gate electrode of the seventh transistor is always electrically connected to a third signal line; one of the source electrode and the drain electrode of the eighth transistor is always electrically connected to the gate electrode of the second transistor; the other of the source electrode and the drain electrode of the eighth transistor is always electrically connected to the power supply line; a gate electrode of the eighth transistor is always electrically connected to the second signal line; when the first wiring is in a state of conduction with the gate electrode of the second transistor and the gate electrode of the sixth transistor via at least a channel formation region of the third transistor, a potential at which the second transistor is turned on and a potential at which the sixth transistor is turned on are input to the gate electrode of the second transistor and the gate electrode of the sixth transistor via at least a channel formation region of the third transistor, when the other of the source electrode or the drain electrode of the fifth transistor is in a state of conduction with the gate electrode of the first transistor and the gate electrode of the fourth transistor via at least a channel formation region of the fifth transistor, a potential at which the first transistor is turned on and a potential at which the fourth transistor is turned on are input to the gate electrode of the first transistor and the gate electrode of the fourth transistor via at least a channel formation region of the fifth transistor, the first conductive layer having a region functioning as one of a source electrode or a drain electrode of the fifth transistor has a region functioning as one of a source electrode or a drain electrode of the seventh transistor; the second conductive layer having a region that functions as a gate electrode of the second transistor has a region that functions as a gate electrode of the sixth transistor; a third conductive layer having a region functioning as the other of the source electrode or the drain electrode of the second transistor, the third conductive layer having a region functioning as the other of the source electrode or the drain electrode of the fourth transistor, a region functioning as the other of the source electrode or the drain electrode of the sixth transistor, a region functioning as the other of the source electrode or the drain electrode of the seventh transistor, and a region functioning as the other of the source electrode or the drain electrode of the eighth transistor;

2. having first to eighth transistors, one of the source electrode and the drain electrode of the first transistor is always electrically connected to an output signal wiring; the other of the source electrode and the drain electrode of the first transistor is always electrically connected to a first signal line; one of the source electrode and the drain electrode of the second transistor is always electrically connected to the output signal wiring; the other of the source electrode and the drain electrode of the second transistor is always electrically connected to a power supply line; one of a source electrode and a drain electrode of the third transistor is always electrically connected to a gate electrode of the second transistor; the other of the source electrode and the drain electrode of the third transistor is always electrically connected to the first wiring; a gate electrode of the third transistor is always electrically connected to the first wiring; one of the source electrode and the drain electrode of the fourth transistor is always electrically connected to the gate electrode of the second transistor; the other of the source electrode and the drain electrode of the fourth transistor is always electrically connected to the power supply line; a gate electrode of the fourth transistor is always electrically connected to a gate electrode of the first transistor; one of a source electrode and a drain electrode of the fifth transistor is always electrically connected to a gate electrode of the first transistor; a gate electrode of the fifth transistor is always electrically connected to a second signal line; one of a source electrode and a drain electrode of the sixth transistor is always electrically connected to a gate electrode of the first transistor; the other of the source electrode and the drain electrode of the sixth transistor is always electrically connected to the power supply line; a gate electrode of the sixth transistor is always electrically connected to a gate electrode of the second transistor; one of the source electrode and the drain electrode of the seventh transistor is always electrically connected to the gate electrode of the first transistor; the other of the source electrode and the drain electrode of the seventh transistor is always electrically connected to the power supply line; a gate electrode of the seventh transistor is always electrically connected to a third signal line; one of the source electrode and the drain electrode of the eighth transistor is always electrically connected to the gate electrode of the second transistor; the other of the source electrode and the drain electrode of the eighth transistor is always electrically connected to the power supply line; a gate electrode of the eighth transistor is always electrically connected to the second signal line; when the first wiring is in a state of conduction with the gate electrode of the second transistor and the gate electrode of the sixth transistor via at least a channel formation region of the third transistor, a potential at which the second transistor is turned on and a potential at which the sixth transistor is turned on are input to the gate electrode of the second transistor and the gate electrode of the sixth transistor via at least a channel formation region of the third transistor, when the other of the source electrode or the drain electrode of the fifth transistor is in a state of conduction with the gate electrode of the first transistor and the gate electrode of the fourth transistor via at least a channel formation region of the fifth transistor, a potential at which the first transistor is turned on and a potential at which the fourth transistor is turned on are input to the gate electrode of the first transistor and the gate electrode of the fourth transistor via at least a channel formation region of the fifth transistor, the first conductive layer having a region functioning as one of a source electrode or a drain electrode of the fifth transistor has a region functioning as one of a source electrode or a drain electrode of the seventh transistor; the second conductive layer having a region that functions as a gate electrode of the second transistor has a region that functions as a gate electrode of the sixth transistor; the third conductive layer having a region functioning as the other of the source electrode and the drain electrode of the second transistor has a region functioning as the other of the source electrode and the drain electrode of the fourth transistor, a region functioning as the other of the source electrode and the drain electrode of the sixth transistor, a region functioning as the other of the source electrode and the drain electrode of the seventh transistor, and a region functioning as the other of the source electrode and the drain electrode of the eighth transistor; In a plan view, the channel length direction of the second transistor is aligned with the channel length direction of the sixth transistor.

Images