Semiconductor device

Abstract

To provide a semiconductor device having high signal detection sensitivity and a wide dynamic range, in a thin-film transistor using an oxide semiconductor layer.SOLUTION: The analog circuit is formed with the use of a thin-film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019(atoms / cm3) or less, and substantially functions as an insulator in the state where no electric field is generated, whereby this semiconductor device having high signal detection sensitivity and a wide dynamic range can be provided.SELECTED DRAWING: Figure 13

Description

[Technical Field]

[0001] One embodiment of the present invention is an analog circuit including a field-effect transistor using an oxide semiconductor. The present invention also relates to a semiconductor device having the analog circuit.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally, electro-optical devices, semiconductor circuits, and electrical devices are all semiconductor devices. [Background technology]

[0003] Thin film transistors (TFTs) are made using semiconductor thin films formed on substrates with insulating surfaces. The technology for constructing thin film transistors (TFTs) is attracting attention. Thin film transistors are used in display devices such as LCD televisions. Silicon-based semiconductor materials are well known as semiconductor thin films that can be applied to the Oxide semiconductors are attracting attention as a solution.

[0004] Known oxide semiconductor materials include zinc oxide and materials containing zinc oxide as a component. And the electron carrier concentration is 10 18 / cm 3 Amorphous metal oxides (oxide semiconductors) that are less than Thin film transistors formed from a material consisting of a thin film transistor (Patent Documents 1 to 3) are disclosed. . [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-165527 [Patent Document 2] Japanese Patent Application Laid-Open No. 2006-165528 [Patent Document 3] Japanese Patent Application Laid-Open No. 2006-165529 Summary of the Invention [Problem to be solved by the invention]

[0006] However, deviations from the stoichiometric composition occur in oxide semiconductors during the thin film formation process. For example, the electrical conductivity of oxide semiconductors changes depending on whether there is an excess or deficiency of oxygen. In addition, hydrogen mixed in during the formation of the oxide semiconductor thin film forms oxygen (O)-hydrogen (H) bonds. It acts as an electron donor and causes changes in electrical conductivity. Furthermore, OH is a polar molecule, , and characteristics for active devices such as thin film transistors made of oxide semiconductors. This is a factor that can cause fluctuations.

[0007] The electron carrier concentration is 10 18 / cm 3 Even if it is less than 100%, in the case of an oxide semiconductor, The thin film transistors disclosed in the above Patent Documents 1 to 3 are n-type, and the on-off ratio is 10 3 The reason for the low on-off ratio of such thin film transistors is the off-voltage. This is due to the high flow.

[0008] Circuits that are configured with thin film transistors with low on-off ratios tend to be unstable. In addition, it is possible to obtain a sufficient dynamic range when used in analog circuits. If the off-state current is high, the detection sensitivity for small signals cannot be improved. Furthermore, a high off-state current causes unnecessary current to flow, resulting in increased power consumption. There is a problem.

[0009] In view of the above-described problems, one embodiment of the present invention provides a thin film transistor formed using an oxide semiconductor. One object is to reduce malfunctions of circuits configured using transistors.

[0010] One embodiment of the present invention is a thin film transistor including an oxide semiconductor. One of the objectives is to increase the dynamic range of the circuit.

[0011] One embodiment of the present invention is a thin film transistor including an oxide semiconductor. One object of the present invention is to improve the signal detection sensitivity of a circuit.

[0012] One embodiment of the present invention is a thin film transistor including an oxide semiconductor. One object of the present invention is to reduce the power consumption of a circuit. [Means for solving the problem]

[0013] One embodiment of the present invention is to reduce impurities (hydrogen, moisture, By removing the oxides (hydrides, hydroxides, etc.), the semiconductor is intrinsic or substantially intrinsic. The channel region is made of oxide semiconductors, which have a larger energy gap than silicon semiconductors. The thin film transistors thus formed constitute an analog circuit.

[0014] Specifically, the hydrogen contained in the oxide semiconductor is 5×10 19 / cm 3 Below 5x, preferably 10 18 / cm 3 Less than or equal to 5 × 10 17 / cm 3 Hereinafter, oxide semiconductor Remove the hydrogen or OH groups contained in the 14 / cm 3 Below, good Preferably 5 x 10 12 / cm 3 A thin film in which a channel region is formed using an oxide semiconductor as follows: Analog circuits are made up of transistors.

[0015] The energy gap of the oxide semiconductor is set to 2 eV or more, preferably 2.5 eV or more. and preferably 3 eV or more, to minimize impurities such as hydrogen that form donors. Carrier concentration is 1×10 14 / cm 3 Less than 1 × 10 12 / cm 3 The following is true: Do so.

[0016] Such a highly purified oxide semiconductor can be used in the channel region of a thin film transistor. Even when the channel width is 10 mm, the drain voltage is 1 V and 10 V. The drain current is 1×10 when the gate voltage is in the range of -5V to -20V. -13 A It acts as follows:

[0017] Another aspect of the present invention is a semiconductor device including a reference transistor, a mirror transistor, and a detector. the reference transistor is electrically connected to the detector, The drain and gate of the reference transistor are electrically connected, and the gate of the mirror The gate of the reference transistor is electrically connected to the gate of the mirror transistor. The transistor has a channel region with a hydrogen concentration of 5×10 19 atoms / cm 3 Oxidation It is an analog circuit characterized by being made of semiconductors.

[0018] Another aspect of the present invention is a first thin-film transistor having a first terminal electrically connected to a high power supply potential. a second thin film transistor having a first terminal electrically connected to a high power supply potential; A detector is provided between a source potential and a first terminal of the first thin film transistor. a gate of the first thin film transistor electrically connected between the detector and a first terminal of the first thin film transistor; The gate of the second thin film transistor is electrically connected to the gate of the first thin film transistor. The second terminal of the first thin film transistor and the second terminal of the second thin film transistor are connected to a low power supply voltage. The first thin film transistor and the second thin film transistor are electrically connected to each other. The hydrogen concentration in the pore area is 5×10 19 atoms / cm 3 By using oxide semiconductors with The analog circuit is characterized by being configured as follows.

[0019] In this specification, the concentration is measured by secondary ion mass spectrometry (Secondary Ion Mass Spectrometry). Mass Spectrometry (hereinafter referred to as SIMS) However, this does not apply if other measurement methods are listed or if otherwise specified. do not have.

[0020] A semiconductor device including the above analog circuit is also one embodiment of the present invention. [Effects of the Invention]

[0021] According to one embodiment of the present invention, a thin film transistor using a highly purified oxide semiconductor By configuring a log circuit, a semiconductor device with high signal detection sensitivity and a wide dynamic range is achieved. can be obtained.

[0022] In addition, by using a thin film transistor that uses a highly purified oxide semiconductor, A semiconductor device that operates and consumes low power can be obtained. [Brief explanation of the drawings]

[0023] [Figure 1] FIG. 1 is a diagram showing a circuit configuration of a semiconductor device. [Figure 2] 1A and 1B are diagrams showing a cross-sectional structure of a semiconductor device. [Figure 3] 1A and 1B are diagrams illustrating a top view and a cross-sectional structure of a semiconductor device; [Figure 4] 1A to 1C illustrate a manufacturing process of a semiconductor device. [Figure 5] 1A and 1B are diagrams illustrating a top view and a cross-sectional structure of a semiconductor device; [Figure 6] 1A to 1C illustrate a manufacturing process of a semiconductor device. [Figure 7] 1A and 1B are diagrams showing a cross-sectional structure of a semiconductor device. [Figure 8] 1A to 1C illustrate a manufacturing process of a semiconductor device. [Figure 9] 1A to 1C illustrate a manufacturing process of a semiconductor device. [Figure 10] 1A to 1C illustrate a manufacturing process of a semiconductor device. [Figure 11] 1A and 1B are diagrams showing a cross-sectional structure of a semiconductor device. [Figure 12] 1A and 1B are diagrams illustrating a semiconductor device. [Figure 13] FIG. 1 is a diagram showing a pixel equivalent circuit of a semiconductor device. [Figure 14] FIG. 1 is a diagram showing a pixel equivalent circuit of a semiconductor device. [Figure 15] 1A and 1B are diagrams showing a cross-sectional structure of a semiconductor device. [Figure 16] 1A and 1B are diagrams showing semiconductor devices. [Figure 17] 1A and 1B are diagrams showing semiconductor devices. [Figure 18] 1A and 1B are diagrams showing semiconductor devices. [Figure 19] 1A and 1B are diagrams showing semiconductor devices. [Figure 20] 1A and 1B are diagrams showing semiconductor devices. [Figure 21] 1A and 1B are diagrams illustrating a semiconductor device. [Figure 22] FIG. 1 is a longitudinal cross-sectional view of an inverted staggered thin film transistor using an oxide semiconductor. [Figure 23] 23 is an energy band diagram (schematic diagram) taken along the line AA' in FIG. 22. [Figure 24] (A) shows a state in which a positive potential (+VG) is applied to the gate (G1), and (B) shows a state in which a negative potential (-VG) is applied to the gate (G1). [Figure 25] A diagram showing the relationship between the vacuum level, the work function of a metal (φM), and the electron affinity of an oxide semiconductor (χ). DETAILED DESCRIPTION OF THE INVENTION

[0024] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention is not limited to the following description, and the embodiments and methods thereof may be modified without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details. The present invention should not be construed as being limited to the following description of the embodiments.

[0025] The functions of the "source" and "drain" may differ depending on whether transistors of different polarities are used or not. However, they may be swapped when the direction of current changes during circuit operation. In this specification, the terms "source" and "drain" can be used interchangeably. It shall be possible.

[0026] The source and drain terminals of the transistor are determined by the structure and operating conditions of the transistor. It is difficult to identify which is the source terminal and which is the drain terminal because they change depending on the Therefore, in this document, one of the source terminal and the drain terminal is referred to as a first terminal, The other of the source terminal and the drain terminal will be referred to as a second terminal to distinguish it from the other.

[0027] In addition, the size, layer thickness, or area of ​​each component shown in the drawings of each embodiment may be different from the actual size, layer thickness, or area. The figures may be exaggerated for clarity. In addition, ordinal numbers such as "first," "second," and "third" used in this specification are not intended to be construed as limiting the scope of the present invention. It is added to avoid confusion of elements and is not intended to limit the number. do.

[0028] (Embodiment 1) The thin film transistor using the highly purified oxide semiconductor disclosed in this specification is A typical example of an analog circuit is a current mirror circuit. When a current mirror circuit is used as a current amplifier circuit, The dynamic range can be expanded, and the sensitivity to minute currents can be improved. can.

[0029] In this embodiment, a thin film transistor using a highly purified oxide semiconductor is used as a current As an example of application to a laser circuit, a photodetector will be described with reference to FIG.

[0030] The photodetector 1300 shown in FIG. 1 includes a detector 1301, an amplifier circuit 1302, and a high power supply potential VD a power supply terminal 1311 to which D is supplied, a power supply terminal 1312 to which a low power supply potential VSS is supplied, In the photodetector 1300, the potential of the power supply terminal 1312 is set to the ground potential. It can also be set to GND.

[0031] The protection circuit 1320 includes a diode 1321. The diode 1321 is connected to the power supply terminal 13 11 and power supply terminal 1312, and the cathode of diode 1321 is connected to power supply terminal 13 11, and its anode is electrically connected to power supply terminal 1312. If excessive voltage (such as ESD) is applied to power supply terminal 1311 and / or power supply terminal 1312, When a voltage is applied, a diode 1321 connects the power supply terminal 1311 and the power supply terminal 131 2 is shorted, and excessive voltage is applied to the amplifier circuit 1302 and the detector 1301. Prevent.

[0032] In addition, as a diode 1321, the gate terminal and the drain terminal are connected and the same as a diode. The high purity thin film transistor disclosed in this specification can be used. Thin film transistors using oxide semiconductors have the advantage of extremely low off-state current. The thin film transistor having the highly purified oxide semiconductor disclosed in this specification is used. By forming a diode with the diode, leakage current is extremely low when reverse bias is applied. In addition, a plurality of thin film transistors can be formed. The diodes may be connected in series or in parallel.

[0033] The detector 1301 uses a photoelectric conversion element that converts received light into an electrical signal. The element can be a photodiode or a phototransistor. 302 is a circuit for amplifying the output current of the detector 1301. This current mirror circuit is composed of a single transistor 1305. and a plurality of transistors 1306 connected in parallel. The transistor 1306 is a thin film transistor formed using a highly purified oxide semiconductor. do.

[0034] Transistor 1305 is a reference transistor for detecting the output current of detector 1301. The transistor 1306 reflects the current detected by the transistor 1305. It is a mirror transistor that operates in the same way.

[0035] The current flowing between the power supply terminal 1311 and the power supply terminal 1312 is determined by the number of transistors 1306. For example, the transistors 1305 and 1306 can be adjusted to the same voltage. The transistor has a current-voltage characteristic, and the current flows between the power supply terminal 1311 and the power supply terminal 1312. To make the current flowing through the detector 1301 100 times the output current, for example, one transistor 99 transistors 1306 are connected in parallel to the first transistor 1305. By configuring the amplifier circuit 1302, which is configured as a current mirror circuit, The output current of the detector 1301 can be amplified 100 times and detected. This can be done.

[0036] The above-mentioned amplifier circuit 1302 is replaced by a transistor 1305. The channel width is larger than that of the transistor 1305. For example, a configuration using a large transistor 1306 may be used. A transistor 1306 with a channel width 4.95 times that of the transistor 305 is used. A configuration in which 20 transistors 1306 are connected in parallel to the transistor 1305. Even if the gain is 100, the amplification factor of the amplifier circuit 1302 can be increased to 100 times.

[0037] The transistor 1305 has the same configuration as the transistor 1305 except for the channel width. , a transistor 1306 having a channel width 99 times that of the transistor 1305; One transistor 1306 is connected to one transistor 1305. The configuration can also be an amplifier circuit 1302 with an amplification factor of 100. Although this has the advantage of simplifying the circuit configuration, it impairs the function of the transistor 1306. If this occurs, there is a high possibility that the function of the entire amplifier circuit 1302 will be significantly impaired.

[0038] For this reason, the amplifier circuit 1302 has multiple transistors 1306 connected in parallel to provide redundancy. It is preferable to have a configuration in which a plurality of transistors 1306 are connected in parallel. By doing so, even if some of the functions of the multiple transistors 1306 are impaired, the amplifier circuit 1302 can be suppressed and the amplifier circuit 13 operates stably and reliably For example, by connecting ten transistors 1306 in parallel, Even if the function of one of the transistors 1306 is impaired, the effect is reduced to 1 / 10. It is possible.

[0039] In addition, by connecting a plurality of transistors 1306 in parallel, This reduces the characteristic variations of the amplifier 1306, resulting in a highly reliable amplifier circuit 1302 that operates stably. It can be said that:

[0040] By connecting two or more transistors 1306 in parallel, preferably five or more, the reliability is improved. In other words, a highly reliable current mirror circuit can be obtained. A photodetector can be fabricated using the above.

[0041] If the off-state current of the thin film transistor used in the amplifier circuit 1302 is large, In other words, the off-state current is smaller than the output current of the detector 1301. Since the magnitude is not negligible, the output current of the detector 1301 cannot be obtained accurately. .

[0042] In conventional thin film transistors using amorphous silicon or polycrystalline silicon, the channel width By reducing or increasing the channel length, the off-state current can be reduced to some extent. However, there is a problem that the on-state current also decreases. It is difficult to detect both small and large amounts of light, and a wide dynamic range is required. It was difficult to obtain.

[0043] The thin film transistor using the highly purified oxide semiconductor disclosed in this specification has a channel Even if the width is increased, the off-current can be made sufficiently small compared to conventional thin-film transistors. To create a current mirror circuit with good sensitivity to minute currents and a wide dynamic range. In other words, a photodetector with a wide dynamic range can be fabricated. do.

[0044] In this embodiment, a photodetector using a photoelectric conversion element as the detector 1301 has been described. However, various other detectors can be applied to the detector 1301. For example, the detector 130 By applying a temperature sensor to the detector 1, it can be used as a temperature detection device. By applying a sound sensor to the 301, it can be used not only as a sound detection device but also as a sound amplification device. You can also be there.

[0045] A thin film transistor using a highly purified oxide semiconductor disclosed in this specification The light-detecting mirror circuit is not limited to the light-detecting device described in this embodiment, but may be used in other semiconductor devices. can also be applied.

[0046] (Embodiment 2) In this embodiment, an example of the layered structure of the photodetector 1300 described in the first embodiment will be described. In this embodiment, a photodiode is used as the detector 1301. 2 is a cross-sectional view showing a part of the photodetector device 1300. As shown in FIG.

[0047] FIG. 2 is a cross-sectional view showing a detector 1301 and a transistor 1305 in a photosensor. On the substrate 601, a detector 1301 and a transistor 1305 functioning as a sensor are provided. The detector 1301 and the transistor 1305 are provided with an adhesive layer 608. A substrate 613 is provided.

[0048] The substrate used for the substrate 601 has a light-transmitting property and is strong enough to withstand heat treatment in the manufacturing process. For example, aluminosilicate glass, barium silicate glass, A glass substrate such as borosilicate glass or aluminoborosilicate glass can be used. Furthermore, a plastic substrate or the like can also be used as appropriate.

[0049] An insulating layer 631, a protective insulating layer 632, an interlayer insulating layer 633, an interlayer insulating layer 634, an interlayer insulating layer 635, an interlayer insulating layer 636, an interlayer insulating layer 637, an interlayer insulating layer 638, an interlayer insulating layer 639 ... The detector 1301 is provided on the interlayer insulating layer 633. The first semiconductor layer 606a, the second semiconductor layer 606b, and the third semiconductor layer 606c are arranged in this order from the insulating layer 633 side. The first semiconductor layer 606a is formed on the interlayer insulating layer 633. The third semiconductor layer 606c is electrically connected to the electrode layer 641 provided on the interlayer insulating layer 634. It is electrically connected to the electrode layer 642 provided thereon.

[0050] The electrode layer 641 is electrically connected to the conductive layer 643 formed on the interlayer insulating layer 634. The gate electrode 642 is electrically connected to a gate electrode layer 645 via an electrode layer 644. Layer 645 is electrically connected to the gate electrode layer of transistor 1305. The detector 1301 is electrically connected to a transistor 1305 .

[0051] Here, the first semiconductor layer 606a is a semiconductor layer having a p-type conductivity, and the second semiconductor layer 606b is a high resistance semiconductor layer (I-type semiconductor layer), and the third semiconductor layer 606c is an n-type A pin-type photodiode in which semiconductor layers having different conductivity types are stacked is shown as an example.

[0052] The first semiconductor layer 606a is a p-type semiconductor layer, and is made of amorphous silicon containing an impurity element that imparts p-type conductivity. The first semiconductor layer 606a can be formed from a group 13 silicon film. Using semiconductor material gas containing impurity elements (e.g., boron (B)), plasma CVD is used. Silane (SiH4) can be used as the semiconductor material gas. Alternatively, i2H6, SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. may be used. In addition, after forming an amorphous silicon film that does not contain impurity elements, the film is formed by diffusion or ion implantation. Impurity elements may be introduced into the amorphous silicon film by using a method such as ion implantation. It is preferable to diffuse the impurity element by heating or the like after introducing the impurity element. In this case, methods for forming an amorphous silicon film include LPCVD, vapor phase growth, Alternatively, sputtering or the like may be used. The thickness of the first semiconductor layer 606a is 10 nm or more and 5 nm or less. It is preferable to form it so that the thickness is 0 nm or less.

[0053] The second semiconductor layer 606b is an I-type semiconductor layer (intrinsic semiconductor layer) and is made of amorphous silicon. The second semiconductor layer 606b is formed by an amorphous film using a semiconductor material gas. A thick silicon film is formed by plasma CVD. The semiconductor material gas is silane. (SiH4) can be used. Alternatively, Si2H6, SiH2Cl2, SiHCl3, S The second semiconductor layer 606b may be formed by LPCVD. The second semiconductor layer 606b may be formed by vapor deposition, sputtering, or the like. It is preferable to form the intrinsic semiconductor so that the thickness is 00 nm or more and 1000 nm or less. The layer is ideally a semiconductor with no impurities and the Fermi level located approximately in the center of the forbidden band. The second semiconductor layer 606b is a semiconductor layer, but the second semiconductor layer 606b is a semiconductor layer containing impurities (for example, phosphorus (P)) that act as donors. ) or acceptor impurities (e.g., boron (B)) are added to The semiconductor may have a bell positioned approximately at the center of the forbidden band.

[0054] The third semiconductor layer 606c is an n-type semiconductor layer and is an amorphous layer containing an impurity element that imparts n-type conductivity. The third semiconductor layer 606c is formed of a thick silicon film. It is formed by the plasma CVD method using a semiconductor material gas containing silicon (e.g., phosphorus (P)). Silane (SiH4) can be used as the semiconductor material gas. SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. may also be used. After forming an amorphous silicon film that does not contain elements, the film is then doped with silicon using diffusion or ion implantation. An impurity element may be introduced into the amorphous silicon film by ion implantation or the like. After the element is introduced, the impurity element may be diffused by heating or the like. The amorphous silicon film can be formed by LPCVD, vapor phase growth, or sputtering. The thickness of the third semiconductor layer 606c is 20 nm or more and 200 nm or less. It is preferable to form it so that it faces downward.

[0055] The first semiconductor layer 606a, the second semiconductor layer 606b, and the third semiconductor layer 606c are Instead of an amorphous semiconductor, a polycrystalline semiconductor may be used. Semi-amorphous Semiconductor (SA) S) It may be formed using a semiconductor.

[0056] Considering the Gibbs free energy, microcrystalline semiconductors are metastable, intermediate between amorphous and single crystal. In other words, a semiconductor with a third state that is stable in terms of free energy It has a short-range order and lattice distortion. Microcrystalline silicon, a typical example of a microcrystalline semiconductor, is characterized by its Raman scattering. The spectrum shows single-crystal silicon at 520 cm -1 It is shifted to the lower wavenumber side. That is, 520 cm, which indicates single crystal silicon -1 and 480 cm, which indicates amorphous silicon - 1 The Raman spectrum of microcrystalline silicon has a peak between these two. Contains at least 1 atomic % or more of hydrogen or halogen to terminate the bonding bonds. Furthermore, it contains rare gas elements such as helium, argon, krypton, and neon. By increasing the lattice distortion, the stability is increased and a good microcrystalline semiconductor film can be obtained. .

[0057] This microcrystalline semiconductor film is formed by a high-frequency plasma CVD method with a frequency of several tens to several hundreds of MHz, or Alternatively, it can be formed by a microwave plasma CVD device with a frequency of 1 GHz or more. Typically, silicon hydrides such as SiH4, Si2H6, SiH2Cl2, and SiHCl3 It can be formed by diluting silicon halides such as SiCl4 and SiF4 with hydrogen. In addition to silicon hydride and hydrogen, helium, argon, krypton, and neon can be selected. A microcrystalline semiconductor film can be formed by diluting the gas with one or more rare gas elements.

[0058] The silicon hydride is preferably diluted by adjusting the flow rate of hydrogen to 5 to 200 times the flow rate of silicon hydride. Preferably, the ratio is 50 to 150 times, more preferably 100 times. In the gas containing carbide gases such as CH4 and C2H6, germanium compounds such as GeH4 and GeF4 Gases such as F2 may be mixed in.

[0059] In addition, the mobility of holes generated by the photoelectric effect is smaller than that of electrons, so the pin-type Photodiodes exhibit better characteristics when the p-type semiconductor layer side is used as the light receiving surface. The detector 1301 receives light from the surface of the substrate 601 on which the in-type photodiode is formed. This shows an example of converting light 622 into an electrical signal. Since light from the semiconductor layer side becomes disturbance light, a conductive film with light blocking properties is used for the electrode layer. In addition, the n-type semiconductor layer side can also be used as the light receiving surface.

[0060] The substrate 613 can be the same as the substrate 601. Since it is located on the opposite side of the surface, it can be used on metal substrates such as aluminum and stainless steel, or silicon A substrate having a light-shielding property, such as a semiconductor substrate, can be used.

[0061] The insulating layer 631, the protective insulating layer 632, the interlayer insulating layer 633, and the interlayer insulating layer 634 are made of insulating materials. Using a conductive material, depending on the material, sputtering, spin coating, dipping method, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc. ), roll coating, curtain coating, knife coating, etc. can be used. can.

[0062] The insulating layer 631 may be a silicon oxide layer, a silicon oxynitride layer, an aluminum oxide layer, or A single layer or stacked layer of an oxide insulating layer such as an aluminum oxynitride layer can be used.

[0063] The protective insulating layer 632 may be made of an inorganic insulating material such as a silicon nitride layer or silicon nitride oxide. a single layer of a nitride insulating layer such as an aluminum nitride layer, an aluminum nitride layer, or an aluminum nitride oxide layer; or Lamination can be used. High density plasma CVD using microwaves (2.45 GHz) is also possible. is preferable because it can form a dense, high-quality insulating layer with high dielectric strength.

[0064] The interlayer insulating layers 633 and 634 function as planarizing insulating films to reduce surface irregularities. The interlayer insulating layers 633 and 634 are preferably made of, for example, acrylic resin or polyimide. Heat-resistant organic resins such as amides, benzocyclobutene resins, polyamides, and epoxy resins In addition to the above organic materials, low-k materials can also be used. , siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. Alternatively, a laminate can be used.

[0065] By detecting the light incident on the detector 1301, information on the object to be detected can be read. It is possible to use a light source such as a backlight when reading the information of the detected object. Cut.

[0066] The transistor 1305 may be the transistor shown as an example in the above embodiment. It can oxidize impurities such as hydrogen, water, hydroxyl groups, and hydrides (also called hydrogen compounds). A transistor that includes a highly purified oxide layer intentionally removed from the oxide semiconductor layer is The fluctuation of the electrical characteristics of the transistor is suppressed, making it electrically stable. A semiconductor device can be provided.

[0067] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0068] (Embodiment 3) In this embodiment, an example of a thin film transistor included in the analog circuit described in Embodiment 1 will be described. This shows the following.

[0069] One mode of a thin film transistor and a manufacturing method thereof of this embodiment will be described with reference to FIGS. Reveal.

[0070] 3A and 3B show an example of a top view and a cross-sectional structure of a thin film transistor. The thin film transistor 410 shown in (B) is one of the thin film transistors with a top gate structure. be.

[0071] FIG. 3A is a top view of a thin film transistor 410 having a top gate structure, and FIG. FIG. 4 is a cross-sectional view taken along line C1-C2 in FIG.

[0072] The thin film transistor 410 is formed on a substrate 400 having an insulating surface, an insulating layer 407, an oxide semiconductor The conductor layer 412, the source or drain electrode layer 415a, and the source or drain electrode layer the source electrode layer 415b, the gate insulating layer 402, and the gate electrode layer 411; The drain electrode layer 415a and the source or drain electrode layer 415b are connected to the wiring layer 4 14a and a wiring layer 414b are provided in contact with each other and are electrically connected.

[0073] The thin film transistor 410 is described using a thin film transistor with a single gate structure. However, if necessary, a thin film transistor with a multi-gate structure having multiple channel regions can also be used. It can be formed.

[0074] 4A to 4E, a thin film transistor 410 is fabricated on a substrate 400. The process will be explained.

[0075] There is no significant limitation on the substrate that can be used for the substrate 400 having an insulating surface, but at least In either case, it is necessary for the barium phosphate to have sufficient heat resistance to withstand subsequent heat treatment. A glass substrate such as borosilicate glass or aluminoborosilicate glass can be used.

[0076] In addition, for glass substrates, if the temperature of the subsequent heat treatment is high, the distortion point will be 730°C or higher. For the glass substrate, for example, aluminosilicate glass, aluminum Glass materials such as lumino borosilicate glass and barium borosilicate glass are used. In addition, by containing more barium oxide (BaO) than boron oxide (B2O3), Therefore, glass containing more BaO than B2O3 is preferred. It is preferable to use a glass substrate.

[0077] Instead of the glass substrate, an insulating substrate such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. A substrate made of an insulating material may also be used. Alternatively, a substrate made of crystallized glass may also be used. A plastic substrate or the like can also be used as appropriate.

[0078] First, an insulating layer 407 is formed as a base film over a substrate 400 having an insulating surface. The insulating layer 407 in contact with the conductor layer 412 is a silicon oxide layer, a silicon oxynitride layer, an aluminum oxide layer, or the like. It is preferable to use an oxide insulating layer such as an aluminum layer or an aluminum oxynitride layer.

[0079] The insulating layer 407 may be formed by plasma CVD, sputtering, or the like. However, in order to prevent a large amount of hydrogen from being contained in the insulating layer 407, sputtering is The insulating layer 407 is preferably formed by a ring method.

[0080] In this embodiment, a silicon oxide layer is formed as the insulating layer 407 by a sputtering method. The substrate 400 is transferred to a processing chamber and subjected to a spatula containing high-purity oxygen from which hydrogen and moisture have been removed. A silicon semiconductor target is introduced and an insulating layer 407 is formed on the substrate 400. The substrate 400 may be at room temperature or may be heated. .

[0081] For example, quartz (preferably synthetic quartz) is used, the substrate temperature is 108° C., and the distance between the substrate and the target is 108° C. The distance (distance between TS) was 60 mm, the pressure was 0.4 Pa, the high frequency power supply was 1.5 kW, and oxygen and RF under argon atmosphere (oxygen flow rate 25 sccm: argon flow rate 25 sccm = 1:1) A silicon oxide layer is formed by sputtering. The film thickness is 100 nm. To deposit a silicon oxide layer, a silicon target is used instead of quartz (preferably synthetic quartz). It is to be noted that oxygen or oxygen and A mixture of argon and argon gas is used.

[0082] In this case, it is preferable to form the insulating layer 407 while removing the remaining moisture in the processing chamber. This is to prevent the insulating layer 407 from containing hydrogen, a hydroxyl group, or moisture.

[0083] To remove residual moisture from the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, a cryopump, an ion pump, or a titanium sublimation pump can be used. The exhaust means is preferably a turbo pump with a cold trap added. The film formation chamber evacuated using a cryopump may contain, for example, hydrogen atoms and water (H2 O), etc., containing hydrogen atoms, the insulating layer 407 formed in the film formation chamber The concentration of impurities contained in the

[0084] The insulating layer 407 is formed using a sputtering gas containing hydrogen, water, a hydroxyl group, or a hydrogenated High-purity gases in which impurities such as ions have been removed to concentrations of about ppm or ppb are preferred. stomach.

[0085] There are two types of sputtering methods: RF sputtering, which uses a high frequency power supply, and DC sputtering. DC sputtering using a power supply, and pulsed DC sputtering using a pulsed bias. The RF sputtering method is mainly used to form insulating films, and The C sputtering method is mainly used to form metal films.

[0086] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of materials in the same chamber. It is also possible to simultaneously discharge and deposit the same materials.

[0087] In addition, a magnetron sputtering method using a magnet mechanism inside the chamber is used. The ECR device uses a plasma generated by microwaves without glow discharge. There is a sputtering device that uses the sputtering method.

[0088] In addition, as a film formation method using a sputtering method, a target material and a sputtering gas are mixed during film formation. Reactive sputtering method to form compound thin films by chemically reacting the silicon dioxide and silicon dioxide components. There is also a bias sputtering method in which a voltage is applied to the substrate during film formation.

[0089] The insulating layer 407 may have a laminated structure, for example, a silicon nitride layer, a nitride layer, and so on from the substrate 400 side. a nitride insulating layer such as a silicon oxide layer, an aluminum nitride layer, or an aluminum oxide nitride layer; and the oxide insulating layer may have a stacked structure.

[0090] For example, a spat containing high-purity nitrogen from which hydrogen and moisture have been removed is used between the silicon oxide layer and the substrate. A silicon nitride layer is formed by introducing a target gas and using a silicon target. Even if the silicon nitride layer is formed, the remaining moisture in the processing chamber is removed, just like the silicon oxide layer. It is preferable to coat the surface.

[0091] When forming a silicon nitride layer, the substrate may also be heated during film formation.

[0092] When a silicon nitride layer and a silicon oxide layer are stacked as the insulating layer 407, the silicon nitride layer The silicon oxide layer and the silicon nitride layer are formed in the same processing chamber using a common silicon target. First, a sputtering gas containing nitrogen is introduced to the silicon substrate installed in the processing chamber. A silicon nitride layer is formed using a target, and then the sputtering gas is switched to one containing oxygen. The silicon oxide layer is formed using the same silicon target. The silicon nitride layer and the silicon nitride layer can be formed successively without exposure to the atmosphere. This can prevent impurities such as oxygen and moisture from being adsorbed.

[0093] Next, an oxide semiconductor film having a thickness of 2 nm to 200 nm is formed over the insulating layer 407. .

[0094] In order to prevent hydrogen, hydroxyl groups, and moisture from being contained in the oxide semiconductor film as much as possible, As a pretreatment for film formation, a substrate on which an insulating layer 407 is formed in a preheating chamber of a sputtering device The substrate 400 is preheated, and impurities such as hydrogen and moisture adsorbed on the substrate 400 are desorbed and exhausted. It is preferable that the exhaust means provided in the preheating chamber is a cryopump. This preheating process can be omitted. This may be performed on the substrate 400 before the insulating layer 402 is formed, or after the source electrode layer or the drain electrode layer is formed later. The substrate 4 is formed with the drain electrode layer 415a and the source or drain electrode layer 415b. You can do the same for 00.

[0095] Before the oxide semiconductor film was formed by a sputtering method, argon gas was introduced. Reverse sputtering is performed to generate plasma, and dust adhering to the surface of the insulating layer 407 is removed. Reverse sputtering is a method in which a target is sputtered in an argon atmosphere without applying a voltage to the target. A voltage is applied to the substrate side using a high frequency power supply under atmospheric pressure to form plasma near the substrate and This is a method of modifying the surface. Note that nitrogen, helium, oxygen, etc. can be used instead of the argon atmosphere. Good too.

[0096] The oxide semiconductor film is formed by sputtering. nO series, In-Sn-Zn-O series, In-Al-Zn-O series, Sn-Ga-Zn-O series , Al-Ga-Zn-O system, Sn-Al-Zn-O system, In-Sn-O system, In-Zn- O-based, Sn-Zn-O-based, Al-Zn-O-based, In-Ga-O-based, In-O-based, Sn-O In this embodiment, the oxide semiconductor film is an In-based or Zn—O-based oxide semiconductor film. The film is formed by sputtering using a Ga-Zn-O metal oxide target. The oxide semiconductor film is formed under a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or a rare gas It is formed by sputtering in an atmosphere of nitrogen (typically argon) and oxygen. In addition, when using the sputtering method, silicon oxide (SiOx (X>0)) The film may be formed using a target containing 2% by weight or more and 10% by weight or less of an oxide semiconductor. By including silicon oxide (SiOx(X>0)) in the layer, which inhibits crystallization, In the case where heat treatment is performed after the formation of the oxide semiconductor layer, crystallization of the oxide semiconductor layer is suppressed. Note that the oxide semiconductor layer is preferably in an amorphous state and is partially crystalline. It may be embodied as

[0097] The oxide semiconductor is preferably an oxide semiconductor containing In, more preferably an oxide semiconductor containing In and In order to make the oxide semiconductor layer i-type (intrinsic), The dehydration or dehydrogenation described is effective.

[0098] The sputtering gas used in forming the oxide semiconductor film is hydrogen, water, a hydroxyl group, or a hydrogenated High-purity gases in which impurities such as ions have been removed to concentrations of about ppm or ppb are preferred. stomach.

[0099] The oxide semiconductor film was prepared by sputtering using a target containing zinc oxide as the main component. A metal oxide target can be used. Other examples include In2O3:Ga2O3:ZnO=1:1:1 in molar ratio, and A metal containing In, Ga, and Zn with a composition ratio of In:Ga:Zn=1:1:0.5 Oxide targets can be used. Metal oxides containing In, Ga, and Zn can also be used. The target is In:Ga:Zn=1:1:1 in atomic ratio or In:Ga:Zn A target having a composition of 1:1:2 can also be used. The filling rate is 90% or more and 100% or less, preferably 95% or more and 99.9% or less. By using a metal oxide target with high conductivity, the deposited oxide semiconductor film is dense and become.

[0100] The substrate is held in a processing chamber maintained in a reduced pressure state, and hydrogen and A sputtering gas from which the moisture and oxygen have been removed is introduced, and a metal oxide is used as a target to deposit a metal oxide on the substrate 400. To remove residual moisture in the processing chamber, an adsorption type vacuum pump is used. For example, a cryopump, an ion pump, a titanium sublimation pump, etc. It is preferable to use a displacement pump. As an exhaust means, a turbo pump with a The deposition chamber is evacuated using a cryopump. For example, hydrogen atoms, compounds containing hydrogen atoms such as water (H2O) (more preferably compounds containing carbon atoms) Since impurities contained in the oxide semiconductor film formed in the deposition chamber are exhausted, The concentration of impurities can be reduced. The substrate may be heated during the formation of the oxide semiconductor film.

[0101] An example of the film formation conditions is as follows: substrate temperature is room temperature, the distance between the substrate and the target is 60 mm, and pressure 0.4 Pa, direct current (DC) power supply 0.5 kW, oxygen and argon (oxygen flow rate 15 sccm: The conditions were as follows: an argon gas flow rate of 30 sccm; pulsed direct current (DC) was used. By using a source, powdery substances (also called particles or dust) generated during film formation can be reduced, The thickness of the oxide semiconductor film is preferably 5 nm or more. The appropriate thickness varies depending on the oxide semiconductor material used. The thickness may be selected accordingly.

[0102] Next, the oxide semiconductor film is subjected to a first photolithography process to form an island-shaped oxide semiconductor layer 4 4A). In addition, in order to form the island-shaped oxide semiconductor layer 412, The resist mask may be formed by an ink-jet method. When the film is formed by the photolithography method, no photomask is used, and therefore the manufacturing cost can be reduced.

[0103] The etching of the oxide semiconductor film here can be performed by either dry etching or wet etching. Either one or both may be used.

[0104] The etching gas used in dry etching is a gas containing chlorine (chlorine-based gas, for example For example, chlorine (Cl2), boron chloride (BCl3), silicon chloride (SiCl4), carbon tetrachloride (CC l4) etc.) are preferred.

[0105] In addition, gases containing fluorine (fluorine-based gases, such as carbon tetrafluoride (CF4) and sulfur fluoride (SF 6), nitrogen fluoride (NF3), trifluoromethane (CHF3), etc.), hydrogen bromide (HBr ), oxygen (O2), and rare gases such as helium (He) and argon (Ar) Additive gases, etc. can be used.

[0106] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing) method and ICP (Inductively Coupled Plasma) A combined plasma etching method can be used. It is possible to etch into the desired processed shape. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) were determined as follows: The amount of power used, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0107] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Alternatively, ITO07N (manufactured by Kanto Chemical Co., Ltd.) may be used.

[0108] In addition, after wet etching, the etching solution is washed away together with the etched material. The waste etching solution containing the removed material is purified to remove the contained material. The indium and the like contained in the oxide semiconductor layer may be recycled from the waste liquid after etching. By recovering and reusing materials, resources can be used more effectively and costs can be reduced. .

[0109] The etching conditions (etching) are adjusted to suit the material so that the desired processing shape can be etched. The etching conditions (liquid, etching time, temperature, etc.) are adjusted appropriately.

[0110] In this embodiment, a wet etching solution is used, which is a mixture of phosphoric acid, acetic acid, and nitric acid. The oxide semiconductor film is processed into an island-shaped oxide semiconductor layer 412 by etching.

[0111] Next, in this embodiment, the oxide semiconductor layer 412 is subjected to first heat treatment. The treatment temperature is 400° C. or higher and 750° C. or lower, preferably 400° C. or higher and lower than the strain point of the substrate. Here, the substrate is placed in an electric furnace, which is a type of heat treatment apparatus, and a heat treatment is performed on the oxide semiconductor layer. After heat treatment at 450°C for 1 hour in a nitrogen atmosphere, This prevents water and hydrogen from re-entering the oxide semiconductor layer, thereby obtaining the oxide semiconductor layer. Through the treatment, the oxide semiconductor layer 412 can be dehydrated or dehydrogenated.

[0112] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heat source such as a resistance heating element. A device for heating the object to be treated by radiation may be provided. For example, a GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid RTA (Rapid Thermal Anneal) equipment, etc. The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure A device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a mercury lamp. The GRTA device is a device that uses high-temperature gas for heat treatment. An inert gas that does not react with the material to be treated by heat treatment, such as a rare gas such as argon or nitrogen. Sexual gases are used.

[0113] For example, as the first heat treatment, a base is placed in an inert gas heated to a high temperature of 650°C to 700°C. The plate is moved and placed in the oven, heated for several minutes, and then the substrate is moved and placed in an inert gas atmosphere heated to a high temperature. GRTA can be used to heat the food at high temperatures in a short time. become.

[0114] In the first heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain water, hydrogen, etc. Or the purity of rare gases such as helium, neon, and argon must be 6N (99.9999%) or higher. Preferably, the impurity concentration is 7N (99.99999%) or more (i.e., the impurity concentration is 1 ppm or less, It is preferable to set the concentration to 0.1 ppm or less.

[0115] As described above, by reducing impurities in the oxide semiconductor, it is possible to make the oxide semiconductor i-type or substantially i-type. An i-type oxide semiconductor (highly purified oxide semiconductor) can be obtained. The hydrogen contained in the oxide semiconductor is 5×10 19 / cm 3 Less than or equal to 5 x 10 1 8 / cm 3 Less than or equal to 5 × 10 17 / cm 3 The following are contained in oxide semiconductors: Remove the hydrogen or OH groups that are present, and reduce the carrier concentration to 5×10 14 / cm 3 The following is preferably is 5 x 10 12 / cm 3 By the following, I-type or substantially I-type oxide semiconductors can be obtained. A highly purified oxide semiconductor can be obtained.

[0116] Depending on the conditions of the first heat treatment or the material of the oxide semiconductor layer, the oxide semiconductor layer In some cases, the crystallization rate is 90% or more, resulting in a microcrystalline or polycrystalline layer. Alternatively, the oxide semiconductor layer may be 80% or more microcrystalline. Depending on the conditions or the material of the oxide semiconductor layer, an amorphous oxide semiconductor containing no crystalline components may be obtained. In some cases, it becomes a conductive layer. In addition, microcrystalline parts (grain size 1 nm or more) are present in the amorphous oxide semiconductor. In the case where an oxide semiconductor layer having a thickness of 20 nm or less (typically 2 nm or more and 4 nm or less) is formed, There are also cases where this is the case.

[0117] In addition, the first heat treatment of the oxide semiconductor layer is performed on the oxide semiconductor layer before it is processed into the island-shaped oxide semiconductor layer. In this case, after the first heat treatment, the substrate is removed from the heating device. The substrate is taken out and subjected to a photolithography process.

[0118] The heat treatment that has the effect of dehydrating and dehydrogenating the oxide semiconductor layer is performed after the oxide semiconductor layer formation. After the film formation, a source electrode and a drain electrode are laminated on the oxide semiconductor layer, and then the source electrode and After forming the gate insulating layer on the drain electrode, the insulating layer may be formed.

[0119] Next, a conductive film is formed over the insulating layer 407 and the oxide semiconductor layer 412. The conductive film may be formed by a tarpaulin method or a vacuum deposition method. l), chromium (Cr), copper (Cu), tantalum (Ta), titanium (Ti), molybdenum ( An element selected from the group consisting of Mo, tungsten (W), or a compound containing the above elements. Examples include gold (Au) and alloy films made of a combination of the above elements. Magnesium (Mg), zirconium (Zr), beryllium (Be), and thorium (Th) The metal conductive film may be formed of a single layer structure. For example, a single layer of aluminum film containing silicon may be used. Layer structure, two-layer structure with titanium film laminated on aluminum film, Ti film and Ti film laminated on top of that Ti film Examples include a three-layer structure in which an aluminum film is laminated on top of the aluminum film and a Ti film is then formed on top of that. In addition, titanium, tantalum, tungsten, molybdenum, chromium, nickel, A single or multiple combination of elements selected from neodymium (Nd) and scandium (Sc) A film, an alloy film, or a nitride film may also be used.

[0120] A resist mask is formed on the conductive film by a second photolithography process, and selective etching is performed. The source or drain electrode layer 415a is then After the electrode layer 415b is formed, the resist mask is removed (see FIG. 4(B)). When the ends of the source electrode layer and the drain electrode layer are tapered, the gate electrode layer to be stacked thereon can be formed. This is preferable because it improves the coverage of the insulating layer.

[0121] In this embodiment, the source or drain electrode layer 415a A conductive film for forming the electrode layer 415b was deposited by sputtering to a thickness of 150 nm. A titanium film is formed.

[0122] Note that when the conductive film is etched, the oxide semiconductor layer 412 is removed, and the insulating layer The materials and etching conditions are adjusted appropriately so that 407 is not exposed.

[0123] In this embodiment, a Ti film is used as the conductive film, and an In—Ga -Zn-O based oxide semiconductor is used, and ammonia hydrogen peroxide (ammonia, A mixture of water and hydrogen peroxide is used.

[0124] Note that in the second photolithography step, only a part of the oxide semiconductor layer 412 is etched. In some cases, the oxide semiconductor layer has a groove (a recess). The drain electrode layer 415a and the source or drain electrode layer 415b are formed by The resist mask may be formed by an ink-jet method. When the film is formed by this method, no photomask is used, and therefore the manufacturing cost can be reduced.

[0125] The exposure to light when forming the resist mask in the second photolithography process is done using ultraviolet light or KrF laser. The source electrode layers adjacent to each other on the oxide semiconductor layer 412 are exposed to the laser beam or ArF laser beam. The width of the gap between the end of the drain electrode layer and the lower end of the drain electrode layer determines the channel width of the thin film transistor to be formed later. The channel length L is determined. When performing exposure with a channel length L of less than 25 nm, Extreme ultraviolet rays have extremely short wavelengths ranging from 10 nm to several tens of nm. t) is used to perform exposure when forming a resist mask in the second photolithography process. UV exposure has high resolution and a large depth of focus. The channel length L of the transistor can be set to 10 nm or more and 1000 nm or less. The operating speed can be increased, and the off-current value is extremely small, so power consumption can also be reduced. This can be done.

[0126] Next, the insulating layer 407, the oxide semiconductor layer 412, the source or drain electrode layer 415 a) A gate insulating layer 402 is formed over the source or drain electrode layer 415b (FIG. 4 (See (C)).

[0127] The gate insulating layer 402 is formed by depositing silicon oxide using a plasma CVD method, a sputtering method, or the like. a silicon nitride layer, a silicon oxynitride layer, a silicon nitride oxide layer, or an aluminum oxide layer The gate insulating layer 402 can be formed as a single layer or a stacked layer. In order to prevent a large amount of the oxide from being contained, the gate insulating layer 402 is formed by sputtering. When forming a silicon oxide film by sputtering, it is preferable to A silicon target or a quartz target is used as the sputtering target, and oxygen or A mixed gas of oxygen and argon is used.

[0128] The gate insulating layer 402 is a source or drain electrode layer 415a. A silicon oxide layer and a silicon nitride layer are stacked from the rain electrode layer 415b side. For example, a silicon oxide film having a thickness of 5 nm to 300 nm can be used as the first gate insulating layer. The SiO layer x (x>0)), and a second gate insulating layer is formed on the first gate insulating layer. Then, a silicon nitride layer (SiN) with a thickness of 50 nm to 200 nm is formed by sputtering. y (y>0) may be stacked to form a gate insulating layer with a film thickness of 100 nm. The pressure was 0.4 Pa, the high frequency power was 1.5 kW, and oxygen and argon (oxygen flow rate 25 scc The film was deposited by RF sputtering under an atmosphere of argon (flow rate 25 sccm = 1:1) to a thickness of 1 Form a 00 nm silicon oxide layer.

[0129] Next, a resist mask is formed by a third photolithography process and selectively etched. The source electrode layer or the drain electrode layer 402 is removed by etching. 15a, an opening 421a reaching the source or drain electrode layer 415b, and an opening 421b (See FIG. 4(D)).

[0130] Next, a conductive film is formed over the gate insulating layer 402 and the openings 421a and 421b. A gate electrode layer 411 and wiring layers 414a and 414b are formed by the photolithography process. The resist mask may be formed by an ink-jet method. When formed by the ink jet method, no photomask is used, which reduces manufacturing costs.

[0131] The gate electrode layer 411 and the wiring layers 414a and 414b are made of molybdenum, titanium, Metals such as chromium, tantalum, tungsten, aluminum, copper, neodymium, and scandium It can be formed in a single layer or a laminated layer using a material or an alloy material containing these as the main component. Cut.

[0132] For example, a two-layer laminate structure of a gate electrode layer 411 and wiring layers 414a and 414b may be Two-layer laminate structure with a molybdenum layer on an aluminum layer, or molybdenum on a copper layer Two-layer structure with a copper layer and a titanium nitride layer or a tantalum nitride layer on top of the copper layer. Preferably, the titanium nitride layer and the molybdenum layer are laminated together to form a two-layer structure. The laminated structure is composed of a tungsten layer or tungsten nitride layer, and a layer of aluminum and silicon. A titanium nitride layer or titanium layer is laminated with an aluminum alloy or an aluminum-titanium alloy. It is preferable to form the gate electrode layer using a light-transmitting conductive film. Examples of the conductive film having a light-transmitting property include a light-transmitting conductive oxide. It is possible.

[0133] In this embodiment, the gate electrode layer 411 and the wiring layers 414a and 414b are formed by sputtering. A titanium film having a thickness of 150 nm is formed by the method.

[0134] Next, a second heat treatment (preferably 2 In this embodiment, the heating temperature is 250°C or higher and 400°C or lower, for example, 250°C or higher and 350°C or lower. Then, a second heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. This may be performed after a protective insulating layer or a planarizing insulating layer is formed over the thin film transistor 410 .

[0135] Furthermore, heat treatment is carried out in the atmosphere at 100°C to 200°C for 1 hour to 30 hours. This heat treatment may be carried out by maintaining a constant heating temperature, or by heating from room temperature to 10 Repeat the heating process from 0°C to 200°C and then cooling it down to room temperature several times. This heat treatment may be carried out under reduced pressure. By carrying out this treatment, the heating time can be shortened.

[0136] Through the above steps, the oxide semiconductor layer 41 in which the concentrations of hydrogen, moisture, hydrides, and hydroxides are reduced is obtained. 2, a thin film transistor 410 can be formed (see FIG. 4(E)). The transistor 410 is a thin-film transistor that constitutes the analog circuit shown in the first and second embodiments. It can be applied as a starter.

[0137] In addition, a protective insulating layer and a planarizing insulating layer for planarization are provided over the thin film transistor 410. For example, a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, or the like may be used as the protective insulating layer. A silicon nitride oxide layer, a silicon nitride oxide layer, or an aluminum oxide layer may be formed as a single layer or a stacked layer. can.

[0138] The planarization insulating layer may be made of polyimide, acrylic resin, benzocyclobutene resin, Heat-resistant organic materials such as polyamide and epoxy resin can be used. In addition to the above organic materials, low-k materials, siloxane resins, and PSG (phosphor silicon dioxide) are also available. Glass), BPSG (borophosphorus glass), etc. can be used. A planarization insulating layer may be formed by stacking a plurality of insulating films formed by the above method.

[0139] The siloxane resin is a Si—O— compound formed using a siloxane material as a starting material. It corresponds to a resin containing Si bonds. Siloxane resins contain organic groups (e.g., alkane) as substituents. Alternatively, an alkyl group or an aryl group, or a fluoro group may be used. It's okay to be there.

[0140] The method for forming the planarizing insulating layer is not particularly limited, and may be a sputtering method, an SOG method, or the like depending on the material. Spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen printing printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife A coater or the like can be used.

[0141] When forming the oxide semiconductor film as described above, the residual moisture in the reaction atmosphere is removed. The concentration of hydrogen and hydride in the oxide semiconductor film can be reduced. This makes it possible to stabilize the compound semiconductor film.

[0142] Note that an oxide semiconductor (high purity) that has been made i-type or substantially i-type by removing impurities is Since the gate electrode (a highly modified oxide semiconductor) is extremely sensitive to the interface state and the interface charge, The interface with the insulating film is important. Therefore, the gate insulating film that contacts the highly purified oxide semiconductor The membrane (GI) is required to be of high quality.

[0143] For example, high density plasma CVD using microwaves (2.45 GHz) produces dense, high dielectric strength films. This is preferable because it allows the formation of a high-quality insulating film. By closely contacting the insulating film, the interface state is reduced and the interface characteristics are improved. Of course, it is possible to form a high-quality insulating film as a gate insulating film. If necessary, other film formation methods such as sputtering and plasma CVD can be applied. In addition, the quality of the gate insulating film and the interface characteristics with the oxide semiconductor are improved by heat treatment after film formation. In any case, it is important that the film quality as a gate insulating film is good. Of course, it is also necessary to reduce the interface state density with the oxide semiconductor and form a good interface. That's good.

[0144] Furthermore, at 85°C, 2 × 10 6 V / cm, 12-hour gate bias thermal stress test (B In the T test, when impurities are added to an oxide semiconductor, the impurities and the oxide semiconductor The bonds between the main component of the compound are broken by a strong electric field (B: bias) and high temperature (T: temperature), The resulting bonds induce a drift in the threshold voltage (Vth). Therefore, impurities in the oxide semiconductor, especially hydrogen and water, are removed as much as possible, and the gate insulating film is formed as described above. By improving the interface characteristics, a thin film transistor that is stable even in the BT test can be obtained. This makes it possible.

[0145] By applying the above-described thin film transistor to the analog circuit shown in the first embodiment, This makes it possible to provide a highly reliable analog circuit having stable electrical characteristics.

[0146] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0147] (Fourth embodiment) In this embodiment, an example of a thin film transistor included in the analog circuit described in Embodiment 1 will be described. The same parts as those in the third embodiment or parts having similar functions and steps are shown. The same explanation as in the third embodiment will be omitted. Detailed explanations will also be omitted.

[0148] One mode of a thin film transistor and a manufacturing method thereof of this embodiment will be described with reference to FIGS. 5A to 6C. Reveal.

[0149] 5(A) and 5(B) show an example of a planar and cross-sectional structure of a thin film transistor. The thin film transistor 460 shown in (B) is one of the thin film transistors with a top gate structure. be.

[0150] FIG. 5A is a plan view of a thin film transistor 460 having a top gate structure, and FIG. FIG. 6 is a cross-sectional view taken along line D1-D2 in FIG. 5(A).

[0151] The thin film transistor 460 is formed by forming an insulating layer 457, a source electrode 458, a gate electrode 459, a gate electrode 459a, a gate electrode 459b, a gate electrode 459c, a gate electrode 459d, a gate electrode 459e, a gate electrode 459f, a gate electrode 459g ... a drain or electrode layer 465a (465a1, 465a2), an oxide semiconductor layer 462, the source or drain electrode layer 465b, the wiring layer 468, the gate insulating layer 452, and the gate The electrode layer 461 (461a, 461b) includes a source electrode layer or a drain electrode layer 465a. (465a1, 465a2) are electrically connected to the wiring layer 464 via the wiring layer 468. Although not shown, the source or drain electrode layer 465b is also formed as a gate insulating layer. An opening provided in 452 electrically connects to the wiring layer.

[0152] 6A to 6E, a thin film transistor 460 is fabricated on a substrate 450. The process will be explained.

[0153] First, an insulating layer 457 serving as a base film is formed over a substrate 450 having an insulating surface.

[0154] In this embodiment, a silicon oxide layer is formed as the insulating layer 457 by a sputtering method. The substrate 450 is transferred to a processing chamber and subjected to a spatula containing high-purity oxygen from which hydrogen and moisture have been removed. A target gas is introduced, and a silicon target or quartz (preferably synthetic quartz) is used to form a substrate 45 A silicon oxide layer is formed on the insulating layer 457. uses a mixture of oxygen and argon gas.

[0155] For example, quartz (preferably synthetic quartz) with a purity of 6N is used, the substrate temperature is 108° C., and the substrate The distance between the target and the source (TS distance) was set to 60 mm, the pressure was set to 0.4 Pa, and the high frequency power supply was set to 1 0.5kW, oxygen and argon (oxygen flow rate 25sccm: argon flow rate 25sccm = 1: 1) A silicon oxide layer is formed by RF sputtering in an atmosphere. The film thickness is 100 nm. In place of quartz (preferably synthetic quartz), the silicon target is replaced by silicon oxide. It can be used as a target for depositing a silicon layer.

[0156] In this case, it is preferable to form the insulating layer 457 while removing the remaining moisture in the processing chamber. This is to prevent the insulating layer 457 from containing hydrogen, hydroxyl groups, or moisture. The deposition chamber evacuated using an opto-pump contains, for example, hydrogen atoms and water (H2O) Since compounds containing impurities are exhausted, the concentration of impurities contained in the insulating layer 457 formed in the film formation chamber is The degree can be reduced.

[0157] The sputtering gas used in forming the insulating layer 457 is hydrogen, water, a hydroxyl group, or a hydride. High purity gas is preferred, in which impurities such as these have been removed to concentrations of ppm or ppb. .

[0158] The insulating layer 457 may have a laminated structure, for example, a silicon nitride layer, a nitride layer, and so on from the substrate 450 side. and nitride insulating layers such as silicon oxide layers, aluminum nitride layers, and aluminum oxide nitride layers. The insulating film may have a stacked structure with the oxide insulating layer.

[0159] For example, a spat containing high-purity nitrogen from which hydrogen and moisture have been removed is used between the silicon oxide layer and the substrate. A silicon nitride layer is formed by introducing a target gas and using a silicon target. Even if the silicon nitride layer is formed, the remaining moisture in the processing chamber is removed, just like the silicon oxide layer. It is preferable to coat the surface.

[0160] Next, a conductive film is formed on the insulating layer 457, and a conductive film is formed by a first photolithography process. A resist mask is formed on the film, and selective etching is performed to form a source electrode layer or a drain electrode layer. After the electrode layers 465a1 and 465a2 are formed, the resist mask is removed (see FIG. 6(A)). The source and drain electrode layers 465a1 and 465a2 are separated in the cross-sectional view. Although the source electrode layer and the drain electrode layer are shown, they are continuous films. The end portion is preferably tapered, since this improves the coverage of the gate insulating layer to be laminated thereon. .

[0161] The source electrode layer or drain electrode layer 465a1, 465a2 may be made of Al, Cr, An element selected from Cu, Ta, Ti, Mo, and W, or a compound containing the above elements Examples of the metal include gold and alloy films made of a combination of the above elements. a material selected from one or more of aluminum, zirconium, beryllium, and thorium; The metal conductive film may have a single layer structure or a laminated structure of two or more layers. For example, a single layer structure of aluminum film containing silicon, a titanium film stacked on an aluminum film, A two-layer structure is formed by laminating a Ti film and an aluminum film on top of the Ti film. There are three-layer structures, such as a titanium film on aluminum. Elements selected from the group consisting of zinc, tungsten, molybdenum, chromium, neodymium, and scandium are used alone. A number of or a combination of multiple films, alloy films, or nitride films may also be used.

[0162] In this embodiment, the source and drain electrode layers 465a1 and 465a2 are formed by sputtering. A titanium film having a thickness of 150 nm is formed by a deposition method.

[0163] Next, a conductive film is formed on the insulating layer 457 and the source and drain electrode layers 465a1 and 465a2. An oxide semiconductor film with a thickness of 2 nm to 200 nm is formed.

[0164] Next, the oxide semiconductor film is subjected to a second photolithography process to form an island-shaped oxide semiconductor layer 462 In this embodiment, the oxide semiconductor film is formed by In-Ga- The film is formed by sputtering using a Zn-O based metal oxide target.

[0165] The substrate is held in a processing chamber maintained in a reduced pressure state, and hydrogen and A sputtering gas from which the water and oxygen have been removed is introduced, and a metal oxide is used as a target to deposit a metal oxide on the substrate 450. To remove residual moisture in the processing chamber, an adsorption type vacuum pump is used. For example, a cryopump, an ion pump, a titanium sublimation pump, etc. It is preferable to use a displacement pump. As an exhaust means, a turbo pump with a The deposition chamber is evacuated using a cryopump. For example, hydrogen atoms, compounds containing hydrogen atoms such as water (H2O) (more preferably compounds containing carbon atoms) Since impurities contained in the oxide semiconductor film formed in the deposition chamber are exhausted, The concentration of impurities can be reduced. The substrate may be heated during the formation of the oxide semiconductor film.

[0166] The oxide semiconductor film is formed using a sputtering gas containing hydrogen, water, a hydroxyl group, or hydrogen. High-purity gases in which impurities such as chlorines have been removed to concentrations of about ppm or ppb are preferred. It's nice.

[0167] An example of the film formation conditions is as follows: substrate temperature is room temperature, the distance between the substrate and the target is 60 mm, and pressure 0.4 Pa, direct current (DC) power supply 0.5 kW, oxygen and argon (oxygen flow rate 15 sccm: The conditions were as follows: an argon gas flow rate of 30 sccm; pulsed direct current (DC) was used. By using a source, powdery substances (also called particles or dust) generated during film formation can be reduced, The thickness of the oxide semiconductor film is preferably 5 nm or more. The appropriate thickness varies depending on the oxide semiconductor material used. The thickness may be selected accordingly.

[0168] In this embodiment, a wet etching solution is used, which is a mixture of phosphoric acid, acetic acid, and nitric acid. The oxide semiconductor film is processed into an island-shaped oxide semiconductor layer 462 by etching.

[0169] In this embodiment, first heat treatment is performed on the oxide semiconductor layer 462. The temperature is set to 400° C. or higher and 750° C. or lower, preferably 400° C. or higher and lower than the strain point of the substrate. Here, the substrate is placed in an electric furnace, which is a type of heat treatment apparatus, and the oxide semiconductor layer is heated to a nitrogen atmosphere. After heat treatment at 450°C for 1 hour in a nitrogen atmosphere, the material was oxidized without exposure to air. This first heat treatment prevents water and hydrogen from re-entering the oxide semiconductor layer, resulting in an oxide semiconductor layer. Therefore, the oxide semiconductor layer 462 can be dehydrated or dehydrogenated.

[0170] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heat source such as a resistance heating element. A device for heating the object to be treated by radiation may be provided. For example, a GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid RTA (Rapid Thermal Anneal) equipment, etc. For example, the first heat treatment may be performed at a temperature of 650°C to 70°C. The substrate is placed in an inert gas atmosphere heated to 0°C, and after heating for several minutes, the substrate is GRTA can also be performed by moving the sample and removing it from an inert gas atmosphere heated to a high temperature. This allows high-temperature heat treatment in a short time.

[0171] In the first heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain water, hydrogen, etc. Or the purity of rare gases such as helium, neon, and argon must be 6N (99.9999%) or higher. Preferably, the impurity concentration is 7N (99.99999%) or more (i.e., the impurity concentration is 1 ppm or less, It is preferable to set the concentration to 0.1 ppm or less.

[0172] Depending on the conditions of the first heat treatment or the material of the oxide semiconductor layer, the oxide semiconductor layer may crystallize to form a microcrystalline or polycrystalline layer.

[0173] In addition, the first heat treatment of the oxide semiconductor layer is performed on the oxide semiconductor layer before it is processed into the island-shaped oxide semiconductor layer. In this case, after the first heat treatment, the substrate is removed from the heating device. The substrate is taken out and subjected to a photolithography process.

[0174] The heat treatment that has the effect of dehydrating and dehydrogenating the oxide semiconductor layer is performed after the oxide semiconductor layer formation. After the film formation, a source electrode or a drain electrode is further laminated on the oxide semiconductor layer, and then the source electrode is This may be done either after forming a gate insulating layer on the gate and drain electrodes or after forming a gate insulating layer on the gate and drain electrodes.

[0175] Next, a conductive film is formed over the insulating layer 457 and the oxide semiconductor layer 462. A resist mask is formed on the conductive film by a lithography process, and selective etching is performed. After forming the source or drain electrode layer 465b and the wiring layer 468, a resist mask The source or drain electrode layer 465b and the wiring layer 46 are removed (see FIG. 6C). 8 is formed by the same material and process as the source electrode layer or drain electrode layer 465a1, 465a2. Just do it.

[0176] In this embodiment, the source or drain electrode layer 465b and the wiring layer 468 are formed by sputtering. A titanium film having a thickness of 150 nm is formed by a deposition method. and the source or drain electrode layers 465a1 and 465a2. In this example, the same titanium film is used for the source electrode layer 465a1 and the drain electrode layer 46b. The source or drain electrode layer 465b and the source or drain electrode layer 465a2 have a selectivity in etching. Therefore, the source electrode layer 465a1 and the drain electrode layer 465a2 are not connected to the source electrode The oxide semiconductor layer 465b is not etched during etching of the drain electrode layer 465a. The wiring layer 468 is formed on the source electrode layer or the drain electrode layer 465a2 that is not covered with the dielectric layer 462. The source and drain electrode layers 465a1 and 465a2 are provided. The drain electrode layer 465b is made of a different material having a high selectivity in an etching process. When used, the source or drain electrode layer 465a2 is protected during etching. The wiring layer 468 does not necessarily have to be provided.

[0177] Note that the conductive film was etched so that the oxide semiconductor layer 462 was not removed. The material and etching conditions are adjusted appropriately.

[0178] In this embodiment, a Ti film is used as the conductive film, and an In—Ga -Zn-O based oxide semiconductor is used, and ammonia hydrogen peroxide (ammonia, A mixture of water and hydrogen peroxide is used.

[0179] Note that in the third photolithography step, only a part of the oxide semiconductor layer 462 is etched. In some cases, the oxide semiconductor layer has a groove (a recess). A resist mask for forming the drain electrode layer 465b and the wiring layer 468 is formed by inkjet printing. If the resist mask is formed by the ink-jet method, the photomask Since no additional materials are used, the manufacturing cost can be reduced.

[0180] Next, the insulating layer 457, the oxide semiconductor layer 462, the source or drain electrode layer 465 a1, 465a2, and a gate insulating layer 452 on the source or drain electrode layer 465b. Form.

[0181] The gate insulating layer 452 is formed by depositing silicon oxide using a plasma CVD method, a sputtering method, or the like. a silicon nitride layer, a silicon oxynitride layer, a silicon nitride oxide layer, or an aluminum oxide layer The gate insulating layer 452 can be formed as a single layer or a stacked layer. In order to prevent a large amount of ZnO from being contained, the gate insulating layer 452 is formed by sputtering. When forming a silicon oxide film by sputtering, it is preferable to A silicon target or a quartz target is used as the sputtering target, and oxygen or A mixed gas of oxygen and argon is used.

[0182] The gate insulating layer 452 is provided between the source and drain electrode layers 465a1 and 465a2, A silicon oxide layer and a silicon nitride layer were stacked on the source electrode layer or drain electrode layer 465b side. In this embodiment, the pressure is 0.4 Pa, the high frequency power supply is 1.5 kW, Oxygen and argon (oxygen flow rate 25 sccm: argon flow rate 25 sccm = 1:1) atmosphere A silicon oxide layer with a thickness of 100 nm is formed on the substrate by RF sputtering.

[0183] Next, a resist mask is formed by a fourth photolithography process and selectively etched. A part of the gate insulating layer 452 is removed by etching to form an opening 423 reaching the wiring layer 468. Although not shown, when the opening 423 is formed, the source electrode layer or the drain electrode layer is formed. In this embodiment, an opening reaching the source electrode layer 465b may be formed. The opening to the drain electrode layer 465b is formed after laminating an interlayer insulating layer. An example is taken in which a connecting wiring layer is formed in the opening.

[0184] Next, a conductive film is formed over the gate insulating layer 452 and the opening 423, and then a fifth photolithography is performed. A gate electrode layer 461 (461a, 461b) and a wiring layer 464 are formed by a photolithography process. The resist mask may be formed by an ink-jet method. When formed by the jet method, no photomask is used, which reduces manufacturing costs.

[0185] The gate electrode layer 461 (461a, 461b) and the wiring layer 464 are made of molybdenum. , titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium It is formed by using a metal material such as aluminum or an alloy material containing these as the main component, in a single layer or in a laminated form. It is possible.

[0186] In this embodiment, gate electrode layer 461 (461a, 461b) and wiring layer 464 are formed of silicon dioxide. A titanium film having a thickness of 150 nm is formed by a tartering method.

[0187] Next, a second heat treatment (preferably 2 In this embodiment, the heating temperature is 250°C or higher and 400°C or lower, for example, 250°C or higher and 350°C or lower. Then, a second heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. This may be performed after a protective insulating layer or a planarizing insulating layer is formed over the thin film transistor 410 .

[0188] Furthermore, heat treatment is carried out in the atmosphere at 100°C to 200°C for 1 hour to 30 hours. This heat treatment may be carried out by maintaining a constant heating temperature, or by heating from room temperature to 10 Repeat the heating process from 0°C to 200°C and then cooling it down to room temperature several times. This heat treatment may be carried out under reduced pressure. By carrying out this treatment, the heating time can be shortened.

[0189] Through the above steps, the oxide semiconductor layer 46 in which the concentrations of hydrogen, moisture, hydrides, and hydroxides are reduced is obtained. 2 can be formed (see FIG. 6E).

[0190] In addition, a protective insulating layer and a planarization insulating layer for planarization are provided over the thin film transistor 460. Although not shown, the source insulating layer 452, the protective insulating layer, and the planarizing insulating layer may be formed. An opening reaching the source or drain electrode layer 465b is formed in the opening. A wiring layer electrically connected to the drain electrode layer 465b is formed.

[0191] When forming the oxide semiconductor film as described above, the residual moisture in the reaction atmosphere is removed. The concentration of hydrogen and hydride in the oxide semiconductor film can be reduced. This makes it possible to stabilize the compound semiconductor film.

[0192] By applying the above-described thin film transistor to the analog circuit shown in the first embodiment, This makes it possible to provide a highly reliable analog circuit having stable electrical characteristics.

[0193] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0194] (Embodiment 5) In this embodiment, an example of a thin film transistor included in the analog circuit described in Embodiment 1 will be described. In addition, the same parts as those in other embodiments or parts having similar functions, The steps and processes may be the same as those in other embodiments, and a repeated description thereof will be omitted. Detailed explanations of the same parts will also be omitted.

[0195] The thin film transistor of this embodiment will be described with reference to FIG.

[0196] An example of the cross-sectional structure of a thin film transistor is shown in Figures 7(A) and 7(B). The thin film transistors 425 and 426 shown in the drawings are made of an oxide semiconductor layer as a conductive layer and a gate electrode. It is a type of thin film transistor that has a structure in which a gate electrode layer is sandwiched between the gate electrode layer and the organic thin film transistor.

[0197] In addition, in FIGS. 7(A) and 7(B), a silicon substrate is used as the substrate, and the silicon substrate 4 The thin film transistors 425 and 426 are formed on the insulating layer 422 provided on the substrate 20. are provided respectively.

[0198] In FIG. 7A, an insulating layer 422 and an insulating layer 407 are provided on a silicon substrate 420. A conductive layer 427 is provided between the oxide semiconductor layer 412 so as to overlap with at least the entire oxide semiconductor layer 412. .

[0199] 7B, the conductive layer between the insulating layer 422 and the insulating layer 407 is a conductive layer such as the conductive layer 424. The oxide semiconductor layer 412 is processed by etching as shown in FIG. This is an example of partial overlap.

[0200] The conductive layers 427 and 424 are made of a metal material that can withstand the heat treatment temperature in the subsequent process. Titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo ), chromium (Cr), neodymium (Nd), scandium (Sc), or is an alloy containing the above elements as components, an alloy film containing a combination of the above elements, or Nitrides containing the elements can be used. For example, a single tungsten layer or a stack of a tungsten nitride layer and a tungsten layer is often used. The structure can be used.

[0201] The conductive layer 427 and the conductive layer 424 are connected to the thin film transistor 425 and the thin film transistor 426. The second gate electrode layer 411 may be the same as or different from the gate electrode layer 411 of the gate electrode 426. The conductive layer 427 and the conductive layer 424 can also function as a polar layer. It can be at a fixed potential of 0V, or it can be in an electrically floating state (flow It can also be used as (ting).

[0202] The conductive layer 427 and the conductive layer 424 form the thin film transistor 425 and the thin film transistor 42 6 electrical properties can be controlled.

[0203] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0204] Here, regarding a thin film transistor including an oxide semiconductor according to one embodiment of the present invention, This will be explained using a Geeband diagram.

[0205] FIG. 22 is a longitudinal cross-sectional view of an inverted staggered thin film transistor using an oxide semiconductor. An oxide semiconductor layer (OS) is provided on a gate electrode (GE1) via a gate insulating film (GI). A source electrode (S) and a drain electrode (D) are provided thereon.

[0206] FIG. 23 shows an energy band diagram (schematic diagram) in the cross section A-A' shown in FIG. 23(A) shows the case where the voltage between the source and drain is equipotential (VD = 0 V), and Fig. 23(B) shows the case where a positive potential (VD>0) is applied to the drain relative to the source.

[0207] FIG. 24 is an energy band diagram (schematic diagram) in the cross section taken along line B-B' in FIG. 22. Figure 24(A) shows the state where a positive potential (+VG) is applied to the gate (G1), and the source The figure shows the ON state where carriers (electrons) flow between the gate and drain. , a negative potential (-VG) is applied to the gate (G1), and the transistor is in the off state (minority carry). A indicates that the signal does not flow.

[0208] Figure 25 shows the relationship between the vacuum level, the work function of a metal (φM), and the electron affinity of an oxide semiconductor (χ). Shows.

[0209] Since metals are degenerate, the Fermi level is located within the conduction band. The body is generally n-type, in which case the Fermi level (Ef) is located in the center of the band gap. The intrinsic Fermi level (Ei) is located closer to the conduction band. It is known that some hydrogen atoms in conductors act as donors and are one of the factors that cause them to become n-type. .

[0210] In contrast, the oxide semiconductor according to the present invention removes hydrogen, which is an n-type impurity, from the oxide semiconductor. By removing impurities other than the main components of the oxide semiconductor and purifying it to the utmost, It is made into an intrinsic (type I) or is intended to be made into an intrinsic type. Instead of making it into I-type, we have removed impurities such as hydrogen and water as much as possible to produce a highly purified I-type. The feature of this method is that it is an intrinsic semiconductor or close to it. The Fermi level (Ef) can be made to be the same as the intrinsic Fermi level (Ei).

[0211] When the band gap (Eg) of an oxide semiconductor is 3.15 eV, the electron affinity (χ) is The titanium (Ti) that makes up the source and drain electrodes is said to be 4.3 eV. The electron affinity function is approximately equal to the electron affinity (χ) of the oxide semiconductor. At the interface between the layers, no Schottky barrier is formed for electrons.

[0212] That is, when the work function (φM) of the metal and the electron affinity (χ) of the oxide semiconductor are equal, When a person comes into contact with the surface, an energy band diagram (schematic diagram) such as that shown in FIG. 23(A) is displayed.

[0213] In FIG. 23(B), the black circles (●) represent electrons. When a positive potential is applied to the drain, The electrons cross the barrier (h) and are injected into the oxide semiconductor, then flow toward the drain. In this case, the barrier height (h) changes depending on the gate voltage and drain voltage. When a voltage is applied, the barrier height of FIG. 23(A) without voltage application, i.e., the barrier The barrier height (h) is smaller than half the band gap (Eg).

[0214] At this time, the electrons are transferred to the gate insulating film and the highly purified oxide semiconductor as shown in FIG. The electrons move through the lowest energetically stable part on the gate insulating film side of the interface with the gate electrode.

[0215] In addition, in FIG. 24(B), a negative potential (reverse bias) is applied to the gate electrode (G1). Since the number of holes, which are minority carriers, is essentially zero, the current is close to zero. value.

[0216] For example, if the channel width W of a thin-film transistor is 1×10 4 μm and a channel length of 3 μm Even if the off-state current is 10 -13 A or less, and the subthreshold swing value (S value ) is 0.1V / dec. (gate insulating film thickness 100nm).

[0217] In this way, it is possible to purify the oxide semiconductor to the extent possible so that it does not contain impurities other than the main component. As a result, the thin film transistor can operate satisfactorily.

[0218] (Embodiment 6) In this embodiment, an example of a thin film transistor included in the analog circuit described in Embodiment 1 will be described. This shows the following.

[0219] One mode of a thin film transistor and a manufacturing method thereof of this embodiment mode will be described with reference to FIGS.

[0220] The thin film transistor 310 shown in FIG. 8D is one of the bottom gate structures and is an inverted staggered type. Also called a thin film transistor.

[0221] The thin film transistor 310 is described using a thin film transistor with a single gate structure. However, if necessary, a thin film transistor with a multi-gate structure having multiple channel regions can also be used. It can be formed.

[0222] 8A to 8E, a thin film transistor 310 is fabricated on a substrate 300. The process will be explained.

[0223] First, a conductive film is formed on a substrate 300 having an insulating surface, and then a first photolithography is performed. The gate electrode layer 311 is formed by the process. The end of the formed gate electrode layer is tapered. This is preferable because it improves the coverage of the gate insulating layer to be laminated thereon. The mask may be formed by an ink-jet method. This eliminates the need for a photomask, thereby reducing manufacturing costs.

[0224] There is no significant limitation on the substrate that can be used for the substrate 300 having an insulating surface, but at least In either case, it is necessary for the barium phosphate to have sufficient heat resistance to withstand subsequent heat treatment. A glass substrate such as borosilicate glass or aluminoborosilicate glass can be used.

[0225] In addition, for glass substrates, if the temperature of the subsequent heat treatment is high, the distortion point will be 730°C or higher. For the glass substrate, for example, aluminosilicate glass, aluminum Glass materials such as lumino borosilicate glass and barium borosilicate glass are used. In addition, by containing more barium oxide (BaO) than boron oxide (B2O3), Therefore, glass containing more BaO than B2O3 is preferred. It is preferable to use a glass substrate.

[0226] Instead of the glass substrate, an insulating substrate such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. A substrate made of an insulating material may also be used. Alternatively, crystallized glass or the like may also be used.

[0227] An insulating film serving as a base film may be provided between the substrate 300 and the gate electrode layer 311. , which has the function of preventing the diffusion of impurity elements from the substrate 300, and is a silicon nitride film, a silicon oxide film, A laminated structure of one or more films selected from a silicon nitride oxide film or a silicon oxynitride film It can be formed.

[0228] The material of the gate electrode layer 311 is selected from the group consisting of molybdenum, titanium, chromium, tantalum, and tungsten. Metallic materials such as zinc, aluminum, copper, neodymium, scandium, etc., or materials containing these as their main components The insulating film 10 can be formed as a single layer or a stacked layer using an alloy material.

[0229] For example, the gate electrode layer 311 may have a two-layer laminate structure, such as a molybdenum layer on an aluminum layer. Two-layer laminated structure with a molybdenum layer on a copper layer, two-layer laminated structure with a molybdenum layer on a copper layer, copper layer Two-layer laminated structure with titanium nitride layer or tantalum nitride layer on top, titanium nitride layer and molybdenum nitride layer Two-layer laminated structure consisting of a tungsten nitride layer and a tungsten layer, or two-layer laminated structure consisting of a tungsten nitride layer and a tungsten layer It is preferable to have a three-layer laminate structure. Tungsten nitride, an alloy of aluminum and silicon or an alloy of aluminum and titanium, and a nitride It is preferable to use a laminated layer in which a titanium oxide layer or a titanium layer is laminated. The gate electrode layer can also be formed using a conductive film. An example of such a material is a transparent conductive oxide.

[0230] Next, the gate insulating layer 302 is formed on the gate electrode layer 311 .

[0231] The gate insulating layer 302 is a silicon oxide layer formed by using a plasma CVD method, a sputtering method, or the like. a silicon nitride layer, a silicon oxynitride layer, a silicon nitride oxide layer, or an aluminum oxide layer in a single layer or For example, SiH4, oxygen, and nitrogen are used as the deposition gas. A silicon oxynitride layer may be formed by plasma CVD. The thickness is 100 nm to 500 nm. In the case of a laminate, for example, the thickness is 50 nm to 2 a first gate insulating layer having a thickness of 500 nm or less and a second gate insulating layer having a thickness of 5 nm or more and 300 nm or less on the first gate insulating layer; The second gate insulating layer is laminated to a thickness of 1 m or less.

[0232] In this embodiment, the gate insulating layer 302 is formed by plasma CVD to a thickness of 100 nm or more. A bottom silicon oxynitride layer is formed.

[0233] Next, an oxide semiconductor film 33 having a thickness of 2 nm to 200 nm is formed on the gate insulating layer 302. Form 0.

[0234] The oxide semiconductor film 330 may be an In-Ga-Zn-O based, In-Sn-Zn-O based, or In-A l-Zn-O series, Sn-Ga-Zn-O series, Al-Ga-Zn-O series, Sn-Al-Zn -O series, In-Sn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In-Ga-O, In-O, Sn-O, and Zn-O oxide semiconductor films are used. In the embodiment, the oxide semiconductor film 330 is an In—Ga—Zn—O-based metal oxide target. The cross section at this stage is shown in Figure 8(A). The oxide semiconductor film 330 is grown under a rare gas (typically, argon) atmosphere or an oxygen atmosphere. Alternatively, it is formed by sputtering in an atmosphere of rare gas (typically argon) and oxygen. In addition, when the sputtering method is used, silicon oxide (SiOx (x>0) The film may be formed using a target containing 2% by weight or more and 10% by weight or less of the above.

[0235] The oxide semiconductor film was prepared by sputtering using a target containing zinc oxide as the main component. A metal oxide target can be used. Other examples include In2O3:Ga2O3:ZnO=1:1:1 in molar ratio, and A metal containing In, Ga, and Zn with a composition ratio of In:Ga:Zn=1:1:0.5 Oxide targets can be used. Metal oxides containing In, Ga, and Zn can also be used. The target is In:Ga:Zn=1:1:1 in atomic ratio or In:Ga:Zn A target having a composition of 1:1:2 can also be used. The filling rate is 90% or more and 100% or less, preferably 95% or more and 99.9% or less. By using a metal oxide target with high conductivity, the deposited oxide semiconductor film is dense and become.

[0236] The sputtering gas used in forming the oxide semiconductor film 330 may be hydrogen, water, a hydroxyl group, or High-purity gas in which impurities such as hydrides have been removed to concentrations of ppm or ppb. preferable.

[0237] The substrate is held in a processing chamber maintained in a reduced pressure state, and the substrate temperature is preferably maintained at 100°C or higher and 600°C or lower. The temperature is preferably 200°C or higher and 400°C or lower. The concentration of impurities contained in the sputtered oxide semiconductor film can be reduced. Damage caused by heating is reduced. The removed sputtering gas is introduced, and oxide is deposited on the substrate 300 using the metal oxide as a target. A semiconductor film 330 is formed. To remove residual moisture in the processing chamber, an adsorption type vacuum pump is used. For example, a cryopump, an ion pump, or a titanium sublimator may be used. It is preferable to use a pump for exhausting the gas. The deposition chamber evacuated using a cryopump may be, for example, For example, hydrogen atoms, compounds containing hydrogen atoms such as water (H2O) (more preferably compounds containing carbon atoms) Since impurities (including compounds containing impurities) are exhausted, the impurities contained in the oxide semiconductor film formed in the film formation chamber The concentration of substances can be reduced.

[0238] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, the pressure is 0.6 Pa, DC power supply 0.5kW, oxygen (oxygen flow rate 100%) atmosphere conditions are applied. In addition, when a pulsed direct current (DC) power supply is used, the powdery substances (particles) generated during film formation are This is preferable because it can reduce dust particles (also referred to as "dust" or "dust") and provide a uniform film thickness distribution. The film thickness is set to 2 nm or more and 200 nm or less, preferably 5 nm or more and 30 nm or less. The appropriate thickness varies depending on the oxide semiconductor material used, and the thickness should be selected appropriately depending on the material. That's fine.

[0239] Next, the oxide semiconductor film 330 is subjected to a second photolithography process to form an island-shaped oxide semiconductor film. In addition, a resist mask for forming an island-shaped oxide semiconductor layer is applied to the substrate. If the resist mask is formed by the ink jet method, the photomask Since no disk is used, manufacturing costs can be reduced.

[0240] Next, the oxide semiconductor layer is subjected to first heat treatment. The conductor layer can be dehydrated or dehydrogenated. The temperature of the first heat treatment is 400°C. The temperature is set to 750° C. or higher, preferably 400° C. or higher but lower than the distortion point of the substrate. The substrate was placed in an electric furnace, which is one of the processing equipment, and the oxide semiconductor layer was heated to 450 K under a nitrogen atmosphere. After heat treatment at 20°C for 1 hour, the oxide semiconductor layer was dehydrated without being exposed to the air. The oxide semiconductor layer 331 is obtained by preventing re-entry of oxygen and hydrogen (see FIG. 8B).

[0241] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heat source such as a resistance heating element. A device for heating the object to be treated by radiation may be provided. For example, a GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid RTA (Rapid Thermal Anneal) equipment, etc. The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure A device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a mercury lamp. The GRTA device is a device that uses high-temperature gas for heat treatment. An inert gas that does not react with the material to be treated by heat treatment, such as a rare gas such as argon or nitrogen. Sexual gases are used.

[0242] For example, as the first heat treatment, a base is placed in an inert gas heated to a high temperature of 650°C to 700°C. The plate is moved and placed in the oven, heated for several minutes, and then the substrate is moved and placed in an inert gas atmosphere heated to a high temperature. GRTA can be used to heat the food at high temperatures in a short time. become.

[0243] In the first heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain water, hydrogen, etc. Or the purity of rare gases such as helium, neon, and argon must be 6N (99.9999%) or higher. Preferably, the impurity concentration is 7N (99.99999%) or more (i.e., the impurity concentration is 1 ppm or less, It is preferable to set the concentration to 0.1 ppm or less.

[0244] Depending on the conditions of the first heat treatment or the material of the oxide semiconductor layer, the oxide semiconductor layer In some cases, the crystallization rate is 90% or more, resulting in a microcrystalline or polycrystalline layer. Alternatively, the oxide semiconductor layer may be 80% or more microcrystalline. Depending on the conditions or the material of the oxide semiconductor layer, an amorphous oxide semiconductor containing no crystalline components may be obtained. In some cases, it becomes a conductive layer. In addition, microcrystalline parts (grain size 1 nm or more) are present in the amorphous oxide semiconductor. In the case where an oxide semiconductor layer having a thickness of 20 nm or less (typically 2 nm or more and 4 nm or less) is formed, There are also cases where this is the case.

[0245] In addition, the first heat treatment of the oxide semiconductor layer is performed on the oxide semiconductor layer before it is processed into the island-shaped oxide semiconductor layer. The semiconductor film 330 can also be subjected to the first heat treatment. In that case, after the first heat treatment, The substrate is removed and subjected to a photolithography process.

[0246] The heat treatment that has the effect of dehydrating and dehydrogenating the oxide semiconductor layer is performed after the oxide semiconductor layer formation. After the film formation, a source electrode and a drain electrode are laminated on the oxide semiconductor layer, and then the source electrode and After forming a protective insulating film on the drain electrode, the step may be performed at any time.

[0247] In addition, when a contact hole is formed in the gate insulating layer 302, the process is performed using an oxide semiconductor. This may be done before or after the membrane 330 has been subjected to a dehydration or dehydrogenation treatment.

[0248] Note that the etching of the oxide semiconductor film here is not limited to wet etching, but may be dry etching. Etching may also be used.

[0249] The etching conditions (etching) are adjusted to suit the material so that the desired processing shape can be etched. The etching conditions (liquid, etching time, temperature, etc.) are adjusted appropriately.

[0250] Next, a conductive film is formed over the gate insulating layer 302 and the oxide semiconductor layer 331. The conductive film can be formed by sputtering or vacuum deposition. An element selected from U, Ta, Ti, Mo, and W, or an alloy containing the above elements or an alloy film made of a combination of the above elements. The material is selected from one or more of: zirconium, beryllium, and thorium. The conductive film may have a single layer structure or a laminated structure of two or more layers. 2. A single layer structure of aluminum film containing silicon, 3. A titanium film laminated on an aluminum film. Layer structure: Ti film, aluminum film is layered on top of the Ti film, and Ti In addition, titanium, tantalum, and tantalum are used in addition to aluminum. An element selected from the group consisting of tungsten, molybdenum, chromium, neodymium, and scandium, singly or in combination. Alternatively, a film in which a plurality of layers are combined, an alloy film, or a nitride film may be used.

[0251] When a heat treatment is performed after the conductive film is formed, the conductive film must have heat resistance to withstand this heat treatment. It is preferable that

[0252] A resist mask is formed on the conductive film by a third photolithography process, and selective etching is performed. After forming the source electrode layer 315a and the drain electrode layer 315b by etching, a resist The mask is removed (see FIG. 8(C)).

[0253] The third photolithography process involves exposure to ultraviolet light or KrF laser light when forming a resist mask. The source electrode layers 31 adjacent to each other on the oxide semiconductor layer 331 are irradiated with laser light or ArF laser light. The thin film formed later is formed by the gap width between the lower end of the drain electrode layer 315a and the lower end of the drain electrode layer 315b. The channel length L of the transistor is determined. Note that exposure for channel lengths L of less than 25 nm is When doing this, extreme ultraviolet rays with extremely short wavelengths of several nm to several tens of nm are used. When forming a resist mask in the third photolithography process using the traviolet Extreme ultraviolet light exposure provides high resolution and a large depth of focus. The channel length L of the thin film transistor to be formed can be set to 10 nm or more and 1000 nm or less. This allows for faster circuit operation, and the extremely small off-state current allows for low power consumption. It is also possible to reduce power consumption.

[0254] Note that the conductive film was etched so that the oxide semiconductor layer 331 was not removed. The material and etching conditions are adjusted appropriately.

[0255] In this embodiment, a Ti film is used as the conductive film, and an In—Ga -Zn-O based oxide semiconductor is used, and ammonia hydrogen peroxide (ammonia, A mixture of water and hydrogen peroxide is used.

[0256] Note that in the third photolithography step, only a part of the oxide semiconductor layer 331 is etched. In some cases, the source electrode layer 3 is formed as an oxide semiconductor layer having a groove (a recess). 15a, a resist mask for forming the drain electrode layer 315b is formed by an ink-jet method. If the resist mask is formed by the inkjet method, a photomask can be used. Therefore, manufacturing costs can be reduced.

[0257] In addition, between the oxide semiconductor layer 331 and the source electrode layer 315a and the drain electrode layer 315b Alternatively, an oxide conductive layer may be formed between the oxide semiconductor layer 331 and the source electrode layer 315a and the drain electrode layer 315b. The metal layer for forming the rain electrode layer 315b can be continuously formed. can function as source and drain regions.

[0258] The oxide conductive layer is formed as a source region and a drain region by forming an oxide semiconductor layer and a source electrode layer. By providing the source and drain electrode layers between the source and drain regions, the resistance of the source and drain regions can be reduced. This allows the transistor to operate at high speed.

[0259] In addition, in order to reduce the number of photomasks and steps used in the photolithography process, The resist mask is formed by a multi-tone mask, which is an exposure mask that allows the incident light to have multiple intensities. The etching process may be performed using a resist mask formed using a multi-tone mask. The mask has a shape with multiple film thicknesses, and the shape can be further deformed by etching. Therefore, it can be used in multiple etching processes to process different patterns. Therefore, one multi-tone mask can handle at least two different patterns. Therefore, the number of exposure masks can be reduced. Since the corresponding photolithography process can also be eliminated, the process can be simplified.

[0260] Next, plasma treatment is performed using gases such as N2O, N2, or Ar. The treatment removes adsorbed water and other substances adhering to the exposed surface of the oxide semiconductor layer. Alternatively, the plasma treatment may be performed using a mixed gas of oxygen and argon.

[0261] After the plasma treatment, the protective insulating film in contact with a part of the oxide semiconductor layer was removed without being exposed to the air. An oxide insulating layer 316 is formed as an insulating film.

[0262] The oxide insulating layer 316 has a thickness of at least 1 nm and is formed by an oxide insulating method such as sputtering. The layer 316 can be formed by using an appropriate method that does not allow impurities such as water and hydrogen to be mixed into the layer 316 . When hydrogen is contained in the oxide insulating layer 316, the hydrogen penetrates into the oxide semiconductor layer or The oxygen in the oxide semiconductor layer is extracted by the This may cause the oxide to become resistive (N-type) and form a parasitic channel. The insulating layer 316 is formed without using hydrogen so that the film contains as little hydrogen as possible. It is important to

[0263] In this embodiment, a silicon oxide film having a thickness of 200 nm is deposited by sputtering as the oxide insulating layer 316. The substrate temperature during film formation may be set to between room temperature and 300° C. The temperature is set at 100°C in this example. The silicon oxide film is formed by sputtering using a rare gas (typically, In an atmosphere of rare gas (typically argon), oxygen, or a mixture of rare gas (typically argon) and oxygen The target may be a silicon oxide target or a silicon target. For example, a silicon target can be used in an oxygen and nitrogen atmosphere. Silicon oxide can be formed by a sputtering method under atmospheric pressure. The oxide insulating layer 316 formed by this process is resistant to moisture, hydrogen ions, and OH - Does not contain impurities such as An inorganic insulating film is used to block these substances from entering from the outside, typically silicon oxide. Silicon oxide film, silicon oxynitride film, aluminum oxide film, aluminum oxynitride film, etc. is used.

[0264] In this case, the oxide insulating layer 316 is formed while removing residual moisture in the treatment chamber. It is preferable that the oxide semiconductor layer 331 and the oxide insulating layer 316 contain hydrogen, a hydroxyl group, or moisture. This is to prevent it from being swallowed.

[0265] To remove residual moisture from the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, a cryopump, an ion pump, or a titanium sublimation pump can be used. The exhaust means is preferably a turbo pump with a cold trap added. The film formation chamber evacuated using a cryopump may contain, for example, hydrogen atoms and water (H2 O), etc., which contain hydrogen atoms, The concentration of impurities contained in 316 can be reduced.

[0266] The oxide insulating layer 316 is formed using a sputtering gas containing hydrogen, water, a hydroxyl group, or High-purity gas in which impurities such as hydrides have been removed to concentrations of ppm or ppb. preferable.

[0267] Next, a second heat treatment (preferably 2 For example, the temperature is increased by heating in a nitrogen atmosphere. The second heat treatment is carried out at 250°C for 1 hour under atmospheric pressure. A portion of the semiconductor layer (channel region) is heated in contact with the oxide insulating layer 316. When heat treatment is performed in a state where the conductor layer 331 and the oxide insulating layer 316 are in contact with each other, a first heat treatment Oxygen, one of the main components of oxide semiconductors, is simultaneously reduced by the The oxide insulating layer 316 can supply the oxide semiconductor layer 331. The semiconductor becomes more highly purified and electrically becomes type I (intrinsic).

[0268] Through the above process, hydrogen, moisture, hydrides, and water are produced by dehydration or dehydrogenation. Thin film transistor having an oxide semiconductor layer 331 in which the oxide concentration is reduced and which is made i-type 310 can be formed (see FIG. 8(D)).

[0269] Furthermore, heat treatment is carried out in the atmosphere at 100°C to 200°C for 1 hour to 30 hours. In this embodiment, heat treatment is performed at 150° C. for 10 hours. The heating temperature may be maintained, or the temperature may be increased from room temperature to 100°C or more and 200°C or less. The heating to the heating temperature and the cooling from the heating temperature to room temperature may be repeated several times. The heat treatment may be performed under reduced pressure before the formation of the oxide insulating layer. By doing so, the heating time can be shortened. A thin film transistor can be obtained.

[0270] A protective insulating layer 303 may be further formed on the oxide insulating layer 316. For example, RF sputtering may be performed. The RF sputtering method is suitable for mass production, so the protective insulating layer is formed by the RF sputtering method. The protective insulating layer is formed by the method described above. - Impurities such as The inorganic insulating film does not contain these substances and blocks their penetration from the outside. Silicon nitride film, aluminum nitride film, silicon nitride oxide film, aluminum nitride oxide film, etc. (See Figure 8(E)).

[0271] In this embodiment, the protective insulating layer 303 is formed on the substrate 3 up to the oxide insulating layer 316. 00 is heated to a temperature of 100℃ to 400℃, and high-purity nitrogen from which hydrogen and moisture have been removed is obtained. Sputtering gas is introduced and a silicon nitride film is formed using a silicon target. In the oxide insulating layer 316, the protective insulating layer 318 is formed while removing residual moisture in the treatment chamber. It is preferable to deposit 303.

[0272] A planarization insulating layer for planarization may be provided over the protective insulating layer 303.

[0273] By applying the above-described thin film transistor to the analog circuit shown in the first embodiment, This makes it possible to provide a highly reliable analog circuit having stable electrical characteristics.

[0274] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0275] (Embodiment 7) In this embodiment, an example of a thin film transistor included in the analog circuit described in Embodiment 1 will be described. This shows the following.

[0276] One mode of a thin film transistor and a manufacturing method thereof in this embodiment mode will be described with reference to FIGS.

[0277] The thin film transistor 360 shown in FIG. 9D is a channel protection type (also called a channel stop type). It is one of the bottom gate structures known as inverted staggered thin film transistors.

[0278] The thin film transistor 360 is described using a thin film transistor with a single gate structure. However, if necessary, a thin film transistor with a multi-gate structure having multiple channel regions can also be used. It can be formed.

[0279] 9A to 9D, a thin film transistor 360 is fabricated on a substrate 320. The process will be explained.

[0280] First, a conductive film is formed on a substrate 320 having an insulating surface, and then a first photolithography is performed. A gate electrode layer 361 is formed by a process. If the resist mask is formed by the inkjet method, a photomask may be used. Therefore, manufacturing costs can be reduced.

[0281] The gate electrode layer 361 may be made of molybdenum, titanium, chromium, tantalum, tungsten, Metallic materials such as aluminum, copper, neodymium, scandium, etc., or alloys containing these as their main components The material can be used to form a single layer or a laminate.

[0282] Next, the gate insulating layer 322 is formed on the gate electrode layer 361 .

[0283] In this embodiment, the gate insulating layer 322 is formed by plasma CVD to a thickness of 100 nm or more. A bottom silicon oxynitride layer is formed.

[0284] Next, an oxide semiconductor film having a thickness of 2 nm to 200 nm is formed over the gate insulating layer 322. The oxide semiconductor layer 332 is then processed into an island shape by a second photolithography step. In the embodiment, an In-Ga-Zn-O based metal oxide target is used as the oxide semiconductor film. The film is formed by sputtering using the material.

[0285] In this case, it is preferable to form the oxide semiconductor film while removing residual moisture in the treatment chamber. This is preferable in order to prevent hydrogen, a hydroxyl group, or moisture from being contained in the oxide semiconductor film.

[0286] To remove residual moisture from the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, a cryopump, an ion pump, or a titanium sublimation pump can be used. The exhaust means is preferably a turbo pump with a cold trap added. The film formation chamber evacuated using a cryopump may contain, for example, hydrogen atoms and water (H2 O), etc., which contain hydrogen atoms, are exhausted. The concentration of impurities contained in the film can be reduced.

[0287] The oxide semiconductor film is formed using a sputtering gas containing hydrogen, water, a hydroxyl group, or hydrogen. High-purity gases in which impurities such as chlorines have been removed to concentrations of about ppm or ppb are preferred. It's nice.

[0288] Next, the oxide semiconductor layer 332 is dehydrated or dehydrogenated. The temperature of the first heat treatment is 400° C. or higher and 750° C. or lower, preferably 400° C. or higher. Here, the substrate is introduced into an electric furnace, which is a type of heat treatment device, and the substrate is oxidized. The compound semiconductor layer 332 is subjected to a heat treatment at 450° C. for 1 hour in a nitrogen atmosphere, and then The oxide semiconductor layer 332 is not exposed to the air, and water or hydrogen is prevented from being recontaminated into the oxide semiconductor layer 332. A dehydrogenated oxide semiconductor layer 332 is obtained (see FIG. 9A).

[0289] Next, plasma treatment is performed using gases such as N2O, N2, or Ar. The treatment removes adsorbed water and other substances adhering to the exposed surface of the oxide semiconductor layer. Alternatively, the plasma treatment may be performed using a mixed gas of oxygen and argon.

[0290] Next, an oxide insulating layer was formed over the gate insulating layer 322 and the oxide semiconductor layer 332. After that, a resist mask is formed by a third photolithography process, and selective etching is performed. After forming an oxide insulating layer 366 that functions as a channel protective layer, By providing an oxide insulating layer 366 as a channel protection layer, the oxide The portion of the compound semiconductor layer 332 that will become the channel forming region is etched in a later process. This prevents damage such as film thinning caused by plasma or etching agents during etching.

[0291] In this embodiment, a silicon oxide film having a thickness of 200 nm is deposited by sputtering as the oxide insulating layer 366. The substrate temperature during film formation may be set to between room temperature and 300° C. The temperature is set at 100°C in this example. The silicon oxide film is formed by sputtering using a rare gas (typically, In an atmosphere of rare gas (typically argon), oxygen, or a mixture of rare gas (typically argon) and oxygen The target may be a silicon oxide target or a silicon target. For example, a silicon target can be used in an oxygen and nitrogen atmosphere. Silicon oxide can be formed by sputtering in air.

[0292] In this case, the oxide insulating layer 366 is formed while removing residual moisture in the processing chamber. It is preferable that the oxide semiconductor layer 332 and the oxide insulating layer 366 contain hydrogen, a hydroxyl group, or moisture. This is to prevent it from being swallowed.

[0293] To remove residual moisture from the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, a cryopump, an ion pump, or a titanium sublimation pump can be used. The exhaust means is preferably a turbo pump with a cold trap added. The film formation chamber evacuated using a cryopump may contain, for example, hydrogen atoms and water (H2 O), etc., which contain hydrogen atoms, The concentration of impurities contained in 366 can be reduced.

[0294] The sputtering gas used in forming the oxide insulating layer 366 is hydrogen, water, a hydroxyl group, or a water High-purity gases in which impurities such as chlorines have been removed to concentrations of ppm or ppb are preferred. I wish.

[0295] Next, a second heat treatment (preferably 2 For example, the heating may be performed at a temperature of 200°C or higher and 400°C or lower, for example, 250°C or higher and 350°C or lower. A second heat treatment is carried out at 250°C for 1 hour in a nitrogen atmosphere. A portion (channel region) of the oxide semiconductor layer is heated in contact with the oxide insulating layer 366.

[0296] Next, a conductive film is formed on the gate insulating layer 322, the oxide semiconductor layer 332, and the oxide insulating layer 366. After forming the conductive film, a resist mask is formed by a fourth photolithography process. After selectively etching the silicon dioxide film to form the source electrode layer 365a and the drain electrode layer 365b, The resist mask is removed (see FIG. 9(C)).

[0297] The source electrode layer 365a and the drain electrode layer 365b may be made of Al, Cr, Cu, or T. An element selected from the group consisting of a, Ti, Mo, and W, or an alloy containing the above elements, or Examples of such conductive metal films include alloy films that combine the above elements. The second heat treatment is performed on the source electrode layer 365a, the drain electrode layer 365b, and the gate electrode layer 365c. This may be performed in a step after the formation of the electrode layer 365b.

[0298] Through the above process, hydrogen, moisture, hydrides, and water are produced by dehydration or dehydrogenation. A thin film transistor having an oxide semiconductor layer 332 in which the oxide concentration is reduced and which is made i-type. 360 is formed.

[0299] Furthermore, heat treatment is carried out in the atmosphere at 100°C to 200°C for 1 hour to 30 hours. In this embodiment, heat treatment is performed at 150° C. for 10 hours. The heating temperature may be maintained, or the temperature may be increased from room temperature to 100°C or more and 200°C or less. The heating to the heating temperature and the cooling from the heating temperature to room temperature may be repeated several times. The heat treatment may be performed under reduced pressure before the formation of the oxide insulating layer. By doing so, the heating time can be shortened. A thin film transistor can be obtained.

[0300] In addition, a protective insulating layer is formed on the source electrode layer 365a, the drain electrode layer 365b, and the oxide insulating layer 366. In this embodiment, the protective insulating layer 323 is formed using a silicon nitride film. (See FIG. 9(D)).

[0301] Note that a thin film is further formed over the source electrode layer 365a, the drain electrode layer 365b, and the oxide insulating layer 366. An oxide insulating layer may be formed and a protective insulating layer 323 may be stacked over the oxide insulating layer.

[0302] By applying the above-described thin film transistor to the analog circuit shown in the first embodiment, This makes it possible to provide a highly reliable analog circuit having stable electrical characteristics.

[0303] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0304] (Embodiment 8) In this embodiment, an example of a thin film transistor included in the analog circuit described in Embodiment 1 will be described. This shows the following.

[0305] One mode of a thin film transistor and a manufacturing method thereof in this embodiment will be described with reference to FIGS. .

[0306] The thin film transistor 350 shown in FIG. 10(D) is a thin film transistor with a single gate structure. The following explanation will be given using a gate electrode, but if necessary, a multi-gate structure having multiple channel regions may also be used. Thin film transistors can also be formed.

[0307] 10(A) to 10(D), a thin film transistor 350 is fabricated on a substrate 340. The process will be explained.

[0308] First, a conductive film is formed on a substrate 340 having an insulating surface, and then a first photolithography is performed. In this embodiment, the gate electrode layer 351 is formed by a process. Then, a tungsten film having a thickness of 150 nm is formed by sputtering.

[0309] Next, a gate insulating layer 342 is formed over the gate electrode layer 351. A silicon oxynitride layer having a thickness of 100 nm or less is formed as the insulating layer 342 by the plasma CVD method. Form.

[0310] Next, a conductive film is formed on the gate insulating layer 342, and a second photolithography process is performed. A resist mask is formed over the conductive film, and selective etching is performed to form a source electrode layer 355a After the drain electrode layer 355b is formed, the resist mask is removed (see FIG. 10A). ).

[0311] Next, an oxide semiconductor film 345 is formed (see FIG. 10B). The semiconductor film 345 is formed by sputtering using an In-Ga-Zn-O metal oxide target. The oxide semiconductor film 345 is formed into island-like regions by a third photolithography process. The oxide semiconductor layer 346 is then processed.

[0312] In this case, the oxide semiconductor film 345 is formed while removing moisture remaining in the treatment chamber. In order to prevent hydrogen, a hydroxyl group, or moisture from being contained in the oxide semiconductor film 345, This is the case.

[0313] To remove residual moisture from the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, a cryopump, an ion pump, or a titanium sublimation pump can be used. The exhaust means is preferably a turbo pump with a cold trap added. The film formation chamber evacuated using a cryopump may contain, for example, hydrogen atoms and water (H2 O), etc., which contain hydrogen atoms, are exhausted. The concentration of impurities contained in the film 345 can be reduced.

[0314] The oxide semiconductor film 345 is formed using a sputtering gas containing hydrogen, water, a hydroxyl group, or is a high-purity gas in which impurities such as hydrides have been removed to concentrations of ppm or ppb. is preferred.

[0315] Next, the oxide semiconductor layer 346 is dehydrated or dehydrogenated. The temperature of the first heat treatment is 400° C. or higher and 750° C. or lower, preferably 400° C. or higher. Here, the substrate is introduced into an electric furnace, which is a type of heat treatment device, and the substrate is oxidized. The compound semiconductor layer 346 is subjected to a heat treatment at 450° C. for 1 hour in a nitrogen atmosphere, and then The oxide semiconductor layer 346 is prevented from being exposed to the air and from being recontaminated with water or hydrogen. A dehydrogenated oxide semiconductor layer 346 is obtained (see FIG. 10C).

[0316] In the first heat treatment, the substrate is immersed in an inert gas heated to a high temperature of 650°C to 700°C. After heating for several minutes, the substrate is removed from the inert gas atmosphere heated to a high temperature. GRTA can be used to heat the food at high temperatures in a short time. do.

[0317] An oxide insulating layer 356 serving as a protective insulating film in contact with the oxide semiconductor layer 346 is formed.

[0318] The oxide insulating layer 356 has a thickness of at least 1 nm and is formed by an oxide insulating method such as sputtering. The layer 356 can be formed by using an appropriate method that does not allow impurities such as water and hydrogen to be mixed into the layer 356. When hydrogen is contained in the oxide insulating layer 356, the hydrogen penetrates into the oxide semiconductor layer or The oxygen in the oxide semiconductor layer is extracted by the ion implantation, and the back channel of the oxide semiconductor layer becomes low resistance. Therefore, there is a risk that the oxide insulating The edge layer 356 is formed by a method that does not use hydrogen so that the edge layer 356 is a film that contains as little hydrogen as possible. is important.

[0319] In this embodiment, a silicon oxide film having a thickness of 200 nm is formed as the oxide insulating layer 356 by sputtering. The substrate temperature during film formation may be set to between room temperature and 300° C. The temperature is set at 100°C in this example. The silicon oxide film is formed by sputtering using a rare gas (typically, In an atmosphere of rare gas (typically argon), oxygen, or a mixture of rare gas (typically argon) and oxygen The target may be a silicon oxide target or a silicon target. For example, a silicon target can be used in an oxygen and nitrogen atmosphere. Silicon oxide can be formed by a sputtering method under atmospheric pressure. The oxide insulating layer 356 formed by this process is resistant to moisture, hydrogen ions, and OH - Does not contain impurities such as An inorganic insulating film is used to block these substances from entering from the outside, typically silicon oxide. Silicon oxide film, silicon oxynitride film, aluminum oxide film, aluminum oxynitride film, etc. is used.

[0320] In this case, the oxide insulating layer 356 is formed while removing residual moisture in the treatment chamber. It is preferable that the oxide semiconductor layer 346 and the oxide insulating layer 356 contain hydrogen, a hydroxyl group, or moisture. This is to prevent it from being swallowed.

[0321] To remove residual moisture from the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, a cryopump, an ion pump, or a titanium sublimation pump can be used. The exhaust means is preferably a turbo pump with a cold trap added. The film formation chamber evacuated using a cryopump may contain, for example, hydrogen atoms and water (H2 O), etc., which contain hydrogen atoms, The concentration of impurities contained in 356 can be reduced.

[0322] The sputtering gas used in forming the oxide insulating layer 356 is hydrogen, water, a hydroxyl group, or a water High-purity gases in which impurities such as chlorines have been removed to concentrations of ppm or ppb are preferred. I wish.

[0323] Next, a second heat treatment (preferably 2 For example, the temperature is increased by heating in a nitrogen atmosphere. The second heat treatment is carried out at 250°C for 1 hour under atmospheric pressure. The body layer is heated while in contact with oxide insulating layer 356.

[0324] Through the above process, hydrogen, moisture, hydrides, and water are produced by dehydration or dehydrogenation. A thin film transistor having an oxide semiconductor layer 346 in which the oxide concentration is reduced and which is made i-type. 350 is formed.

[0325] Furthermore, heat treatment is carried out in the atmosphere at 100°C to 200°C for 1 hour to 30 hours. In this embodiment, heat treatment is performed at 150° C. for 10 hours. The heating temperature may be maintained, or the temperature may be increased from room temperature to 100°C or more and 200°C or less. The heating to the heating temperature and the cooling from the heating temperature to room temperature may be repeated several times. The heat treatment may be performed under reduced pressure before the formation of the oxide insulating layer. By doing so, the heating time can be shortened. A thin film transistor can be obtained.

[0326] A protective insulating layer may be further formed on the oxide insulating layer 356. For example, a protective insulating layer may be formed by RF sputtering. In this embodiment, a protective insulating layer 343 is formed as a protective insulating layer. The insulating film is formed using a silicon nitride film (see FIG. 10(D)).

[0327] A planarization insulating layer for planarization may be provided over the protective insulating layer 343.

[0328] By applying the above-described thin film transistor to the analog circuit shown in the first embodiment, This makes it possible to provide a highly reliable analog circuit having stable electrical characteristics.

[0329] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0330] (Embodiment 9) In this embodiment, an example of a thin film transistor included in the analog circuit described in Embodiment 1 will be described. This shows the following.

[0331] In this embodiment mode, an example in which a part of the manufacturing process of a thin film transistor is different from that in Embodiment Mode 6 is shown in FIG. Figure 11 is the same as Figure 8 except for some differences in the process, so the same parts are The same reference numerals are used and detailed explanations of the same parts will be omitted.

[0332] According to the sixth embodiment, a gate electrode layer 381 is formed on the substrate 370, and a first gate insulating layer 382 is formed on the substrate 370. In this embodiment, a gate insulating layer 372a and a second gate insulating layer 372b are stacked. The first gate insulating layer 372a is a nitride insulating layer, and the second gate insulating layer 3 An oxide insulating layer is used for 72b.

[0333] The oxide insulating layer may be a silicon oxide layer, a silicon oxynitride layer, or an aluminum oxide layer. As the nitride insulating layer, an aluminum oxynitride layer, or the like can be used. a silicon nitride layer, a silicon nitride oxide layer, an aluminum nitride layer, or an aluminum nitride oxide layer A layer or the like can be used.

[0334] In this embodiment, a silicon nitride layer and a silicon oxide layer are stacked from the gate electrode layer 381 side. The first gate insulating layer 372a is formed by sputtering to a thickness of 50 nm. A silicon nitride layer (SiN y (y> 0)) is formed on the first gate insulating layer 372a, and a film is formed as a second gate insulating layer 372b on the first gate insulating layer 372a. A silicon oxide layer (SiO ) having a thickness of 5 nm to 300 nm (100 nm in this embodiment) x (x>0)) is laminated to form a gate insulating layer with a thickness of 150 nm.

[0335] Next, an oxide semiconductor film is formed, and the oxide semiconductor film is divided into islands by a photolithography process. In this embodiment, the oxide semiconductor film is processed into an In- The film is formed by sputtering using a Ga-Zn-O metal oxide target.

[0336] In this case, it is preferable to form the oxide semiconductor film while removing residual moisture in the treatment chamber. This is preferable in order to prevent hydrogen, a hydroxyl group, or moisture from being contained in the oxide semiconductor film.

[0337] To remove residual moisture from the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, a cryopump, an ion pump, or a titanium sublimation pump can be used. The exhaust means is preferably a turbo pump with a cold trap added. The film formation chamber evacuated using a cryopump may contain, for example, hydrogen atoms and water (H2 O), etc., which contain hydrogen atoms, are exhausted. The concentration of impurities contained in the film can be reduced.

[0338] The oxide semiconductor film is formed using a sputtering gas containing hydrogen, water, a hydroxyl group, or hydrogen. High-purity gases in which impurities such as chlorines have been removed to concentrations of about ppm or ppb are preferred. It's nice.

[0339] Next, the oxide semiconductor layer 382 is dehydrated or dehydrogenated. The temperature of the first heat treatment is 400° C. or higher and 750° C. or lower, preferably 425° C. or higher. If the temperature is 425°C or higher, the heat treatment time can be 1 hour or less. In this case, the heat treatment time is set to be longer than one hour. The substrate is placed in an electric furnace, and the oxide semiconductor layer is subjected to heat treatment in a nitrogen atmosphere. After this, the oxide semiconductor layer is protected from exposure to the atmosphere, preventing water and hydrogen from re-entering the oxide semiconductor layer. After that, the same furnace is filled with high-purity oxygen gas, high-purity N2O gas, or ultra-dry gas. Dry air (dew point below -40°C, preferably below -60°C) is introduced to cool the material. It is preferable that the N2O gas does not contain water, hydrogen, etc. The purity of the oxygen gas or N2O gas introduced into the device is preferably 6N (99.9999%) or more. or 7N (99.99999%) or more (i.e., impurity concentration in oxygen gas or N2O gas) It is preferable to set the concentration to 1 ppm or less, preferably 0.1 ppm or less.

[0340] The heat treatment device is not limited to an electric furnace, and may be, for example, a GRTA (Gas Rapid Th thermal annealing) equipment, LRTA (Lamp Rapid Thermal) Use an RTA (Rapid Thermal Anneal) device such as an LRTA devices can be used with halogen lamps, metal halide lamps, and xenon lamps. Arc lamps, carbon arc lamps, high-pressure sodium lamps, high-pressure mercury lamps, etc. It is a device that heats the object to be treated by radiating light (electromagnetic waves) emitted from a lamp. Heat is generated by heat conduction or heat radiation from heating elements such as TA devices, lamps, and resistance heating elements. The GRTA is a device that uses high-temperature gas to heat the object to be treated. The gas used is a rare gas such as argon or nitrogen, which is suitable for heating. The RTA method uses an inert gas that does not react with the material being treated. Heat treatment may be performed at up to 750°C for several minutes.

[0341] After the first heat treatment for dehydration or dehydrogenation, the temperature is preferably 200° C. or higher and 400° C. or lower. Or heat treatment at a temperature between 200°C and 300°C in an oxygen gas or N2O gas atmosphere. The theory may also be carried out.

[0342] In addition, the first heat treatment of the oxide semiconductor layer is performed on the oxide semiconductor layer before it is processed into the island-shaped oxide semiconductor layer. In this case, after the first heat treatment, the substrate is removed from the heating device. The substrate is taken out and subjected to a photolithography process.

[0343] By performing the above steps, impurities in the oxide semiconductor can be reduced, and the whole An i-type or substantially i-type oxide semiconductor layer 382 can be obtained.

[0344] Next, a conductive film is formed over the oxide semiconductor layer 382, ​​and a resist pattern is formed by a photolithography process. A mask is formed, and the conductive film is selectively etched to form a source electrode layer 385a and a drain electrode layer 385b. An electrode layer 385b is formed, and an oxide insulating layer 386 is formed by a sputtering method.

[0345] In this case, the oxide insulating layer 386 is formed while removing residual moisture in the processing chamber. It is preferable that the oxide semiconductor layer 382 and the oxide insulating layer 386 contain hydrogen, a hydroxyl group, or moisture. This is to prevent it from being swallowed.

[0346] To remove residual moisture from the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, a cryopump, an ion pump, or a titanium sublimation pump can be used. The exhaust means is preferably a turbo pump with a cold trap added. The film formation chamber evacuated using a cryopump may contain, for example, hydrogen atoms and water (H2 O), etc., which contain hydrogen atoms, The concentration of impurities contained in 386 can be reduced.

[0347] The oxide insulating layer 386 is formed using a sputtering gas containing hydrogen, water, a hydroxyl group, or High-purity gas in which impurities such as hydrides have been removed to concentrations of ppm or ppb. preferable.

[0348] Through the above steps, the thin film transistor 380 can be formed.

[0349] Next, in order to reduce the variation in the electrical characteristics of the thin film transistors, Alternatively, heat treatment (preferably at 150°C or higher and lower than 350°C) is carried out in a nitrogen gas atmosphere. For example, heat treatment is performed in a nitrogen atmosphere at 250° C. for 1 hour.

[0350] In addition, heat treatment is carried out in the atmosphere at 100°C to 200°C for 1 hour to 30 hours. In this embodiment, heat treatment is performed at 150° C. for 10 hours. The heating temperature may be maintained, or the temperature may be increased from room temperature to 100°C or more and 200°C or less. The heating to the heating temperature and the cooling from the heating temperature to room temperature may be repeated several times. The heat treatment may be performed under reduced pressure before the formation of the oxide insulating layer. By doing so, the heating time can be shortened. A thin film transistor can be obtained.

[0351] The protective insulating layer 373 is formed over the oxide insulating layer 386. In this embodiment, the protective insulating layer 3 As the film 73, a silicon nitride film having a thickness of 100 nm is formed by sputtering.

[0352] The protective insulating layer 373 and the first gate insulating layer 372a made of a nitride insulating layer are resistant to moisture and water. It does not contain impurities such as hydrogen, hydrides, or hydroxides, and blocks these from entering from the outside. It has the effect of checking.

[0353] Therefore, in the manufacturing process after the protective insulating layer 373 is formed, impurities such as moisture from the outside Furthermore, the device can be completely used as a semiconductor device, for example, a liquid crystal display device. Even after the device is assembled, it can prevent the intrusion of impurities such as moisture from the outside for a long period of time. Long-term reliability can be improved.

[0354] In addition, a protective insulating layer 373 made of a nitride insulating layer and a first gate insulating layer 372a are provided between the protective insulating layer 373 and the first gate insulating layer 372a. The insulating layer is removed, and the protective insulating layer 373 and the first gate insulating layer 372a are in contact with each other. The structure may be such that:

[0355] By using a structure in which the protective insulating layer 373 and the first gate insulating layer 372a are in contact with each other, Impurities such as moisture, hydrogen, hydrides, and hydroxides in the semiconductor layer are reduced to the utmost extent, Furthermore, the re-mixing of the impurities can be prevented, and the impurity concentration in the oxide semiconductor layer can be kept low. do.

[0356] A planarization insulating layer for planarization may be provided over the protective insulating layer 373.

[0357] By applying the above-described thin film transistor to the analog circuit shown in the first embodiment, This makes it possible to provide a highly reliable analog circuit having stable electrical characteristics.

[0358] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0359] (Embodiment 10) In this embodiment, an example of a semiconductor device including the analog circuit described in Embodiment 1 will be described. Specifically, the present invention will be described in detail with reference to the liquid crystal display panel having the photodetector shown in the first embodiment. The view and cross section of the thin film transistor 4010 will be described with reference to FIG. A thin film transistor 4011 and a liquid crystal element 4013 are disposed between a first substrate 4001 and a second substrate 4002. 12(B) is a top view of a panel sealed with a sealant 4005 between the panel 4006 and the panel 4006. corresponds to the cross-sectional view taken along line MN in FIG. 12(A) or FIG. 12(C).

[0360] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this way, a sealing material 4005 is provided. A second substrate 4006 is provided on the circuit 4004. The scanning line driving circuit 4004 is a circuit board including a first substrate 4001, a sealing material 4005, and a second substrate 400. 6, the liquid crystal layer 4008 is sealed together with the seal on the first substrate 4001. The area surrounded by the insulating material 4005 is different from the area surrounded by the insulating material 4005. A signal line driver circuit 4003 formed of a crystalline semiconductor film or a polycrystalline semiconductor film is mounted.

[0361] In addition, a region different from the region surrounded by the sealing material 4005 on the first substrate 4001 is The photodetector 4100 shown in the first embodiment is provided in the area. The second substrate 4001 may be formed at the same time as the pixel portion on the first substrate 4001, or may be formed on a separate substrate. The first substrate 4001 may be a light-transmitting substrate. In this case, a photodetector 4100 may be provided as a configuration for detecting light incident from the substrate side. However, when a substrate that does not transmit visible light is used as the first substrate 4001, The light receiving section must be positioned in a direction that is not affected by light blocking by the substrate.

[0362] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG method, a wire The ear bonding method, TAB method, etc. can be used. 12(C) is an example of mounting the signal line driver circuit 4003 by the TAB method. This is an example in which the signal line driver circuit 4003 is implemented by the above.

[0363] In addition, a pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 12B, the thin film transistor included in the pixel portion 4002 is a thin film transistor 4010 and a thin film transistor 401 included in a scanning line driver circuit 4004 1 is shown. An insulating layer 4041 is provided on the thin film transistors 4010 and 4011, and a protective layer An insulating layer 4042, an insulating layer 4020, and an insulating layer 4021 are provided.

[0364] The thin film transistors 4010 and 4011 are the thin film transistors shown in any of the third to ninth embodiments. Any one of the transistors can be used as appropriate and can be formed using the same process and materials. The oxide semiconductor layers of the thin film transistors 4010 and 4011 have reduced hydrogen and water. Therefore, the thin film transistors 4010 and 4011 are highly reliable thin film transistors. In this embodiment, the thin film transistors 4010 and 4011 are n-channel thin film transistors. It is a transistor.

[0365] The oxide semiconductor layer of the thin film transistor 4011 for the driver circuit is formed on the insulating layer 4021. A conductive layer 4040 is provided at a position overlapping the channel region. By placing it at a position that overlaps with the channel region of the semiconductor layer, the thin film The amount of change in the threshold voltage of the transistor 4011 can be reduced. The potential of the gate electrode layer of the thin film transistor 4011 may be the same as or different from that of the gate electrode layer of the thin film transistor 4011. The conductive layer 4040 may be formed on the insulating layer 4010, and may function as a second gate electrode layer. The potential of the conductive layer may be GND, 0V, or may be in a floating state. 4040 is not necessary.

[0366] The pixel electrode layer 4030 of the liquid crystal element 4013 is The liquid crystal element 4013 is electrically connected to the source electrode layer or the drain electrode layer. The counter electrode layer 4031 is formed on the second substrate 4006. The portion where the electrode layer 4031 and the liquid crystal layer 4008 overlap corresponds to the liquid crystal element 4013. The pixel electrode layer 4030 and the counter electrode layer 4031 are insulating layers that function as alignment films. A liquid crystal layer 40 is formed on the insulating layer 4032 and the insulating layer 4033. It holds 08.

[0367] The first substrate 4001 and the second substrate 4006 may be light-transmitting substrates. Glass, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film, or acrylic resin film Films can be used.

[0368] The spacers 4035 are columnar spacers obtained by selectively etching the insulating film. The distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031 is controlled. A spherical spacer may also be used. The layer 4031 is electrically connected to a common potential line provided on the same substrate as the thin film transistor 4010. The common connection portion is used to connect the pair of substrates to the opposite electrodes via conductive particles disposed between the pair of substrates. The electrode layer 4031 can be electrically connected to a common potential line. It is contained in the material 4005.

[0369] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so the temperature range needs to be improved. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 4008. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a response speed of 1 msec. It is optically isotropic, so alignment treatment is not required, and viewing angle dependency is small. Since there is no need to provide an alignment film, rubbing treatment is also unnecessary. This prevents electrostatic breakdown caused by the liquid crystal display device during the manufacturing process. Therefore, it is possible to improve the productivity of the liquid crystal display device. In particular, thin film transistors using oxide semiconductor layers are susceptible to static electricity. Therefore, the electrical characteristics of the capacitor may fluctuate significantly and deviate from the design range. It is possible to use a blue phase liquid crystal material in a liquid crystal display device having a thin film transistor using a layer. It is more effective.

[0370] In addition to the transmissive liquid crystal display device, the present invention can also be applied to a semi-transmissive liquid crystal display device.

[0371] In addition, in a liquid crystal display device, a polarizing plate is provided on the outer side (viewing side) of the substrate, and a colored layer and a display element are provided on the inner side. In this example, the polarizing plate is provided on the inner side of the substrate. In addition, the laminated structure of the polarizing plate and the colored layer is not limited to that of the present embodiment, and the materials of the polarizing plate and the colored layer and The conditions may be appropriately set depending on the manufacturing process conditions. A light-shielding film that functions as a light-shielding film may be provided.

[0372] An insulating layer 4041 is provided over the thin film transistors 4011 and 4010 in contact with the oxide semiconductor layer. The insulating layer 4041 is formed using the same material as the oxide insulating layer described in other embodiments. Here, the insulating layer 4041 is formed by sputtering an oxide film. A protective insulating layer 4042 is formed on and in contact with the insulating layer 4041. The protective insulating layer 4042 may be formed in a manner similar to that of the protective insulating layer described in other embodiments. For example, a silicon nitride film can be used. An insulating layer 4021 is formed as a planarization film for reducing the surface unevenness of the transistor. There are.

[0373] The insulating layer 4021 functioning as a planarizing film may be made of polyimide, acrylic resin, or Heat-resistant organic materials such as benzocyclobutene resin, polyamide, and epoxy resin are used. In addition to the above organic materials, low dielectric constant materials (low-k materials), siloxane San-based resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. can be used. Note that the insulating layer 4021 can be formed by stacking a plurality of insulating films made of these materials. may be formed.

[0374] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, a S OG method, spin coating, dip coating, spray coating, droplet ejection method (inkjet method, lean printing, offset printing, etc.), doctor knife, roll coater, curtain coater A knife coater or the like can be used. By using the semiconductor device as a gate, a semiconductor device can be manufactured efficiently.

[0375] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium tin oxide (ITO). Indium Zinc Oxide (IZO) Oxide), a conductive material made by mixing indium oxide with silicon oxide (SiOx(X>0)), Indium oxides including organoindium, organotin, and tungsten oxides, tungsten oxides Indium zinc oxide containing titanium oxide, Indium oxide containing titanium oxide A light-transmitting conductive material such as indium tin oxide can be used. In a projection type liquid crystal display device, it is not necessary to have a light-transmitting property or a reflective property. If present, tungsten (W), molybdenum (Mo), zirconium (Zr), hafnium Hf, V, Nb, Ta, Cr , Cobalt (Co), Nickel (Ni), Titanium (Ti), Platinum (Pt), Aluminum (Al), copper (Cu), silver (Ag), or other metals, or their alloys, or their metal nitrides The insulating layer may be formed using one or more of these.

[0376] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of a conductive polymer (conductive polymer The conductive composition can be used to form the conductive film. The pixel electrode has a sheet resistance of 10,000 Ω / □ or less and a light transmittance of 550 nm. It is preferable that the resistance of the conductive polymer contained in the conductive composition is 70% or more. It is preferable that the electrical conductivity is 0.1 Ω·cm or less.

[0377] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0378] In addition, a signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel portion Various signals and potentials applied to 4002 are supplied from FPC 4018.

[0379] The connection terminal electrode 4015 is made of the same conductive film as the pixel electrode layer 4030 of the liquid crystal element 4013. The terminal electrode 4016 is formed from the source electrode layers of the thin film transistors 4010 and 4011. The drain electrode layer is formed of the same conductive film as the drain electrode layer.

[0380] The connection terminal electrode 4015 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. are electrically connected.

[0381] In FIG. 12, a signal line driver circuit 4003 is formed separately and is mounted on the first substrate 4001. Although an example of mounting is shown, the present invention is not limited to this configuration. Alternatively, only a part of the signal line driver circuit or a part of the scanning line driver circuit may be separately formed. It may be implemented as follows.

[0382] In addition, optical components such as black matrices (light-shielding layers), polarizing components, phase difference components, and anti-reflection components For example, a polarizing substrate and a retardation substrate are used to generate circularly polarized light. In addition, a backlight, a sidelight, or the like may be used as the light source.

[0383] In an active matrix liquid crystal display device, pixel electrodes arranged in a matrix form By driving the selected pixels, a display pattern is formed on the screen. A voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode. The liquid crystal layer disposed between the electrode and the counter electrode is optically modulated, and this optical modulation produces a display pattern. is perceived by the observer as

[0384] When displaying moving images on a liquid crystal display device, the response of the liquid crystal molecules themselves is slow, which can cause afterimages. In order to improve the moving image characteristics of the LCD device, There is a driving technique called black insertion, which displays black every other frame.

[0385] Also, the video characteristics can be improved by increasing the vertical synchronization frequency by 1.5 times, preferably by 2 times or more. There is also a driving technology called double speed driving.

[0386] In addition, in order to improve the video characteristics of the LCD display, multiple LEDs (light emitting diodes) are used as backlights. A surface light source is formed by using a diode) light source or multiple EL light sources, etc., and a surface light source is formed. There is also a driving technology that drives each light source to light intermittently within one frame period. Therefore, three or more types of LEDs may be used, or white-emitting LEDs may be used. Since multiple LEDs can be controlled, the LE can be switched in accordance with the timing of the optical modulation of the liquid crystal layer. This driving technology can also synchronize the timing of the LEDs to be turned off. This is especially useful when displaying images with a large proportion of black areas occupying the entire screen. This can reduce power consumption.

[0387] By combining these driving technologies, the display characteristics such as the video characteristics of the LCD device can be improved. can be improved compared to the past.

[0388] Furthermore, thin film transistors are easily damaged by static electricity, so the pixel section or drive It is preferable that a protection circuit be provided over the same substrate as the operation circuit. For example, the protection circuit is configured by using a nonlinear element. In this embodiment, a plurality of protection circuits are provided between the line input terminal and the signal line input terminal. A surge voltage is applied to the scanning lines, signal lines, and capacitance bus lines due to static electricity or the like. It is designed to prevent damage to pixel transistors, etc. When a voltage is applied to the transistor, the charge is released to the common wiring. is composed of nonlinear elements arranged in parallel between the scanning lines and the common wiring. Linear elements consist of two-terminal elements such as diodes or three-terminal elements such as transistors. For example, it is possible to form the thin film transistor in the pixel portion in the same process. For example, by connecting the gate terminal and the drain terminal, it can have the same characteristics as a diode. It is possible.

[0389] The LCD module is available in TN (Twisted Nematic) mode, IP S (In-Plane-Switching) mode, FFS (Fringe Field d Switching) mode, ASM (Axially Symmetric al Ignition Micro-cell mode, OCB (Optical Compensation ated Birefringence mode, FLC (Ferroelectric Liquid Crystal mode, AFLC (AntiFerrole Electr ic Liquid Crystal) mode can be used.

[0390] As described above, the semiconductor device disclosed in the present specification is not particularly limited, and may be any of TN liquid crystal, O CB liquid crystal, STN liquid crystal, VA liquid crystal, ECB type liquid crystal, GH liquid crystal, polymer dispersed liquid crystal, Cotic liquid crystal panels can be used, among which normally black liquid crystal panels For example, it is preferable to use a transmissive liquid crystal display device that employs a vertical alignment (VA) mode. There are several types of vertical alignment modes, such as MVA (Multi-Door Alignment). main Vertical Alignment) mode, PVA(Patterne) d Vertical Alignment) mode, ASV mode, etc. can.

[0391] The present invention can also be applied to VA type liquid crystal display devices. VA type LCDs are a type of LCD panel that controls the alignment of liquid crystal molecules. This is a method in which the liquid crystal molecules are oriented perpendicular to the panel surface when no voltage is applied. In addition, a pixel is divided into several regions (subpixels), each of which is oriented in a different direction. It is called multi-domain or multi-domain design, which is designed to defeat molecules. The method can be used.

[0392] The light detector 4100 detects the illuminance around the liquid crystal display device, and the backlight emission By adjusting the light brightness, visibility can be improved and power consumption can be reduced.

[0393] In addition, the photodetector shown in Embodiment Mode 1 is provided in the pixel portion 4002, and an optical touch sensor is provided. It can also be used as a sensor.

[0394] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0395] (Embodiment 11) In this embodiment mode, an example of an active matrix light-emitting display device will be described. The following describes an example of a light-emitting display device having a light-emitting element that utilizes electroluminescence. I will explain.

[0396] Light-emitting elements that utilize electroluminescence are either organic or inorganic. Generally, the former is an organic EL element, and the latter is an inorganic EL element. It is called.

[0397] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into the layers containing the light-emitting organic compounds, causing a current to flow. Light is emitted by the recombination of electrons and holes. Such a light-emitting element is called a current-excited light-emitting element.

[0398] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0399] FIG. 13 shows an example of a pixel configuration to which digital time gray scale driving can be applied as an example of a semiconductor device. This is a diagram.

[0400] The configuration and operation of a pixel to which digital time gray scale driving can be applied will be described. In this example, two n-channel transistors using an oxide semiconductor layer for the channel region are installed in one pixel. Here is an example of using one.

[0401] The pixel 6400 includes a switching transistor 6401 and a light-emitting element driving transistor 6402. 402, a light emitting element 6404 and a capacitor element 6403. The gate of the gate electrode 6401 is connected to the scanning line 6406, and the first electrode (the source electrode and the drain electrode) The second electrode (one of the source and drain electrodes) is connected to a signal line 6405, and the second electrode (the other of the source and drain electrodes) is connected to a signal line 6405. The other end is connected to the gate of the light-emitting element driving transistor 6402. The transistor 6402 has a gate connected to a power supply line 6407 through a capacitor element 6403. The first electrode is connected to a power supply line 6407, and the second electrode is connected to a first electrode (pixel The second electrode of the light emitting element 6404 corresponds to the common electrode 6408. The common electrode 6408 is electrically connected to a common potential line formed on the same substrate.

[0402] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. The low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. Potential < High power supply potential. For example, GND, 0V, etc. are set as low power supply potential. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. Then, in order to make the light emitting element 6404 emit light by passing a current through the light emitting element 6404, a high power supply potential and the low power supply potential is set to be equal to or greater than the forward threshold voltage of the light emitting element 6404. Each potential is set.

[0403] The capacitor element 6403 is substituted for the gate capacitance of the light-emitting element driving transistor 6402. It is possible to omit it. Regarding the gate capacitance of the light-emitting element driving transistor 6402 Alternatively, a capacitance may be formed between the channel region and the gate electrode.

[0404] In the case of a voltage input voltage driving method, the gate of the light emitting element driving transistor 6402 The light emitting element driving transistor 6402 is either fully turned on or off. In other words, the light emitting element driving transistor 6402 The light emitting element driving transistor 6402 is operated in the linear region. Therefore, a voltage higher than the voltage of the power supply line 6407 is applied to the gate of the light emitting element driving transistor 6402. The signal line 6405 is connected to the power supply line voltage + transistor for driving the light emitting element. Apply a voltage higher than the Vth of 6402.

[0405] Furthermore, when analog grayscale driving is performed instead of digital time grayscale driving, the input of the signal is different. By doing so, the same pixel configuration as in FIG. 13 can be used.

[0406] When analog gradation driving is performed, a light emitting element is connected to the gate of the light emitting element driving transistor 6402. Apply a voltage equal to or greater than the forward voltage of 6404 and the Vth of the light-emitting element driving transistor 6402. The forward voltage of the light emitting element 6404 refers to the voltage required to achieve a desired luminance. At least the forward threshold voltage is included. By inputting a video signal that operates in the region, a current is passed through the light emitting element 6404. In order to operate the light emitting element driving transistor 6402 in the saturation region, The potential of the transistor 407 is set higher than the gate potential of the light emitting element driving transistor 6402. By converting the video signal into an analog signal, a current corresponding to the video signal flows to the light emitting element 6404, Analog gray scale driving is possible.

[0407] Next, an example of a pixel configuration different from that shown in FIG. 13 will be described with reference to FIG. 14. 1 is a diagram showing an example of a pixel configuration to which a current mirror circuit is applied. In this example, four n-channel transistors using a layer as the channel region are used in one pixel. vinegar.

[0408] The pixel 6510 includes a switching transistor 6511 and a switching transistor 6512. 512, a reference transistor 6513, a light-emitting element driving transistor 6502, a light-emitting element 6 The switching transistor 6511 and the capacitor element 6503 are The gate of the switching transistor 6512 is connected to the scanning line 6506. The first electrode (one of the source electrode and the drain electrode) of the switching transistor 6511 is The second electrode (the other of the source and drain electrodes) is connected to the reference transistor. The gate of the transistor 6513 and the gate of the light-emitting element driving transistor 6502 are connected to the transistor 6513. A first electrode of the switching transistor 6512 is connected to the signal line 6505, and a second electrode It is connected to the first electrode of the reference transistor 6513 .

[0409] The first electrode of the light-emitting element driving transistor 6502 is connected to a power supply line 6507, and the gate is connected to the first electrode (pixel electrode) of the light emitting element 6504 via the capacitor element 6503 In addition, although the capacitor element 6503 is connected to the first electrode of the light-emitting element 6504 in FIG. Instead of the first electrode of the light emitting element 6504, a fixed electrode such as a power line 6507 or a common electrode 6508 is used. The switching transistor 651 may be connected to an electrode having a potential. 1 and the gate of the switching transistor 6512 is a scan line different from the scan line 6506. The configuration may be such that the signal is connected to the

[0410] In addition, the second electrodes of the reference transistor 6513 and the light-emitting element driving transistor 6502 are It is connected to the first electrode (pixel electrode) of the light emitting element 6504 and the second electrode of the light emitting element 6504. The electrodes are connected to a common electrode 6508. The common electrode 6508 is formed on the same substrate. It is electrically connected to the common potential line.

[0411] A low power supply potential is set to the common electrode 6508. The potential is lower than the high power supply potential set in 07. The potential may be set to, for example, GND or 0V. The current Iout is supplied to the light emitting element 6504 via the light emitting element driving transistor 6502. In order to make the light emitting element 6504 emit light, the potential difference between the high power supply potential and the low power supply potential is Each potential is set to be equal to or higher than the forward threshold voltage of the element 6504 .

[0412] The capacitor 6503 is substituted for the gate capacitance of the light-emitting element driving transistor 6502. It is possible to omit it. Regarding the gate capacitance of the light-emitting element driving transistor 6502 Alternatively, a capacitance may be formed between the channel region and the gate electrode.

[0413] First, the potential of the scanning line 6506 is applied to the switching transistor 6511 and the switching transistor 6520. When the potential is set to a value that turns on the switching transistor 6512, Between the first electrode and the second electrode of the switching transistor 6511 and the first electrode of the switching transistor 6512 The second electrodes are electrically connected, and a current Idata is supplied from the signal line 6505 to the pixel circuit. The current Idata flows through the switching transistor 6511 to the capacitor 650 3, and the capacitor element 6503 is charged. When the potential rises to or exceeds the Vth of the reference transistor 6513, the reference transistor 6513 is turned on, and the current Idata flows through the switching transistor 6512, the reference transistor The light passes through the transistor 6513 and the light emitting element 6504 and flows to the common electrode 6508 .

[0414] The potential rise of the capacitor element 6503 occurs when the drain current of the reference transistor 6513 is a current Id That is, the potential rise of the capacitor 6503 continues until the current value becomes equal to the current ata. It stops when Idata stops flowing through the switching transistor 6511.

[0415] The gate of the reference transistor 6513 and the gate of the light-emitting element driving transistor 6502 are connected. Therefore, the gate of the light-emitting element driving transistor 6502 is connected to the reference transistor 6513 The potential is equal to that of the gate of the transistor. The transistor characteristics and the ratio of the channel width W to the channel length L (W / L ratio) is If they are the same, a current Iout having a current value equal to the current Idata flows through the power supply line 6507. is supplied to a light emitting element 6504 via a light emitting element driving transistor 6502.

[0416] Next, the potential of the scanning line 6506 is applied to the switching transistor 6511 and the switching transistor 6520. When the potential is set to a value that turns off the switching transistor 6512, 511 and 6512 are turned off, and the supply of the current Idata is stopped. Then, a current Iout is supplied to the light emitting element 6504 by the potential held in the capacitor element 6503. You can continue to do so.

[0417] The reference transistor 6513 and the light-emitting element driving transistor 6502 By devising the characteristics and the relationship between the channel width W and the channel length L, the current Iout can be reduced to the current Id For example, the reference transistor 651 Compared to 3, the transistor characteristics and channel length L are the same, but the channel width W is half. When the transistor is used as the light-emitting element driving transistor 6502, the current Iout is It can be set to 1 / 2 the data.

[0418] The transistor including an oxide semiconductor layer used in this embodiment has an extremely low off-state current. Therefore, the potential of the capacitor 6503 can be easily maintained, and the capacitor 6503 can be made smaller. In addition, when no current is supplied to the light emitting element 6504 and the light is not emitted, The occurrence of the faint light emission phenomenon can be prevented.

[0419] It should be noted that the pixel configurations shown in Figures 13 and 14 are not limited to these. The pixel shown in 14 may be newly equipped with a switch, a resistor, a capacitor, a transistor, a logic circuit, etc. may be added.

[0420] Next, the configuration of the light emitting element will be described with reference to FIG. The cross-sectional structure of a pixel will be explained using an example in which the transistor is n-type. (B) A light-emitting element driving transistor 7001 used in the semiconductor device of (C), a light-emitting element The driving transistor 7011 and the light-emitting element driving transistor 7021 are the same as those in the above embodiment. The thin film transistor can be fabricated in the same manner as the thin film transistor shown in Here is an example:

[0421] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is taken from the surface opposite to the substrate. A top-side emission structure that emits light from the surface on the substrate side, a bottom-side emission structure that emits light from the surface on the substrate side, and a structure that emits light from the substrate side and the substrate There are also light-emitting elements with a double-sided emission structure that emit light from the opposite side of the pixel. The present invention can also be applied to light emitting devices having the following structure.

[0422] A light emitting element with a bottom emission structure will be described with reference to FIG.

[0423] The light emitting element driving transistor 7011 is an n-type transistor, and the light emitted from the light emitting element 7012 is a 15A shows a cross-sectional view of a pixel when light is emitted to the first electrode 7013 side. A light-transmitting conductive layer electrically connected to the drain electrode layer of the driver transistor 7011 is A first electrode 7013 of the light emitting element 7012 is formed on the conductive film 7017. On the electrode 7013, an EL layer 7014 and a second electrode 7015 are laminated in this order.

[0424] The light-transmitting conductive film 7017 may be formed of indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Titanium-containing indium tin oxide, indium tin oxide, indium zinc oxide, oxide ketone A light-transmitting conductive film such as indium tin oxide to which indium is added can be used.

[0425] In addition, various materials can be used for the first electrode 7013 of the light-emitting element. When the electrode 7013 is used as a cathode, a material having a small work function, specifically, For example, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, and alloys containing these (Mg:Ag, Al:Li, etc.), as well as rare earth metals such as Yb and Er. In FIG. 15A, the film thickness of the first electrode 7013 is set to a thickness that allows light to pass through (preferably For example, an aluminum film having a thickness of 20 nm is used. is used as the first electrode 7013 .

[0426] After a light-transmitting conductive film and an aluminum film are stacked, the film is selectively etched. The light-transmitting conductive film 7017 and the first electrode 7013 may be formed by the same method. This is preferable because etching can be performed using the same mask.

[0427] The periphery of the first electrode 7013 is covered with a partition wall 7019. The partition wall 7019 is made of polyimide. organic resin films such as acrylic resin, polyamide, and epoxy resin, inorganic insulating films, or organic polymer films The partition wall 7019 is formed by using a photosensitive resin material. An opening is formed on the electrode 7013, and the sidewall of the opening is formed with a continuous curvature. It is preferable to form the partition wall 7019 so as to have an inclined surface. In this case, the step of forming a resist mask can be omitted.

[0428] The EL layer 7014 formed on the first electrode 7013 and the partition wall 7019 is made of at least It is sufficient to include a light-emitting layer, and it may be composed of a single layer or a plurality of layers stacked. When the EL layer 7014 is made up of multiple layers, On the first electrode 7013 functioning as a The hole injection layer is laminated in this order. Note that it is not necessary to provide all of these layers.

[0429] The stacking order is not limited to the above, and the first electrode 7013 may function as an anode. Layers of hole injection layer, hole transport layer, light emitting layer, electron transport layer, and electron injection layer are stacked on top of 7013 in this order. However, when comparing power consumption, the first electrode 7013 may function as a cathode. On the first electrode 7013, an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, a hole injection layer, and a By stacking the layers in the order of the incoming layers, it is possible to suppress the voltage rise in the drive circuit section and reduce power consumption. Therefore, it is preferable.

[0430] In addition, various materials can be used for the second electrode 7015 formed on the EL layer 7014. For example, when the second electrode 7015 is used as an anode, a material with a large work function can be used. Materials such as ZrN, Ti, W, Ni, Pt, Cr, ITO, IZO, ZnO, etc. A transparent conductive material is preferable. A shielding film 7016 is formed on the second electrode 7015 . The shielding film 7016 may be made of, for example, a metal that blocks light or a metal that reflects light. In this embodiment, an ITO film is used as the second electrode 7015, and a Ti film is used as the shielding film 7016. is used.

[0431] An EL layer 7014 including a light-emitting layer is sandwiched between a first electrode 7013 and a second electrode 7015. In the case of the element structure shown in FIG. 15(A), the light-emitting element Light emitted from 7012 is emitted to the first electrode 7013 side as shown by the arrow. Light emitted from the element 7012 passes through the color filter layer 7033 and the substrate. It can be ejected.

[0432] The color filter layer 7033 can be formed by a droplet discharge method such as an ink jet method, a printing method, or a photolithography method. Each is formed by an etching method using graphic technology.

[0433] The color filter layer 7033 is covered with an overcoat layer 7034, which is further provided with a protective insulating layer. 15A, the overcoat layer 7034 is thin. As shown in the figure, the overcoat layer 7034 has irregularities caused by the color filter layer 7033. It has the function of flattening the surface.

[0434] Also, a protective insulating layer 7035, an overcoat layer 7034, a color filter layer 7033, and a flat The planarized insulating layer 7036, the insulating layer 7032, and the insulating layer 7031 are formed, and the drain The contact holes reaching the electrode layers are arranged at positions overlapping with the partition walls 7019 .

[0435] Next, a light emitting element with a dual emission structure will be described with reference to FIG.

[0436] In FIG. 15B, the drain electrode layer of the light-emitting element driving transistor 7021 is electrically connected to the drain electrode layer of the light-emitting element driving transistor 7022. A first electrode 7023 of the light-emitting element 7022 is formed on the light-transmitting conductive film 7027 connected to the light-transmitting conductive film 7027. An EL layer 7024 and a second electrode 7025 are stacked in this order on a first electrode 7023. It is layered.

[0437] The light-transmitting conductive film 7027 may be formed of indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Titanium-containing indium tin oxide, indium tin oxide, indium zinc oxide, oxide ketone A light-transmitting conductive film such as indium tin oxide to which indium is added can be used.

[0438] In addition, various materials can be used for the first electrode 7023. For example, When 23 is used as a cathode, a material with a small work function, specifically, for example, Li or Cs Alkali metals such as Mg, Ca, Sr, and alkaline earth metals, including these In addition to alloys (Mg:Ag, Al:Li, etc.), rare earth metals such as Yb and Er are preferred. In this embodiment, the first electrode 7023 is used as a cathode, and its film thickness is set to a thickness that allows light to pass through. (Preferably, about 5 nm to 30 nm) For example, an aluminum film having a thickness of 20 nm is A ZnO film is used as the cathode.

[0439] After a light-transmitting conductive film and an aluminum film are stacked, the film is selectively etched. The light-transmitting conductive film 7027 and the first electrode 7023 may be formed by the same method. This is preferable because etching can be performed using the same mask.

[0440] The periphery of the first electrode 7023 is covered with a partition wall 7029. The partition wall 7029 is made of polyimide. organic resin films such as acrylic resin, polyamide, and epoxy resin, inorganic insulating films, or organic polymer films The partition wall 7029 is formed by using a photosensitive resin material. An opening is formed on the electrode 7023, and the sidewall of the opening is formed with a continuous curvature. It is preferable to form the partition wall 7029 so as to have an inclined surface. In this case, the step of forming a resist mask can be omitted.

[0441] The EL layer 7024 formed over the first electrode 7023 and the partition wall 7029 includes a light-emitting layer. It can be made up of a single layer or multiple layers stacked together. When the EL layer 7024 is made up of multiple layers, it functions as a cathode. On the first electrode 7023, an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer are formed. It is not necessary to provide all of these layers.

[0442] The stacking order is not limited to the above, and the first electrode 7023 may be used as an anode, and a hole may be formed on the anode. The injection layer, hole transport layer, light emitting layer, electron transport layer, and electron injection layer may be laminated in this order. When comparing power consumption, the first electrode 7023 is used as a cathode, and an electron injection layer 7024 is provided on the cathode. The power consumption is reduced by stacking the electron transport layer, light emitting layer, hole transport layer, and hole injection layer in this order. This is preferable because

[0443] In addition, various materials can be used for the second electrode 7025 formed on the EL layer 7024. For example, when the second electrode 7025 is used as an anode, a material with a large work function can be used. A transparent conductive material such as ITO, IZO, or ZnO can be preferably used. In this embodiment, the second electrode 7025 is used as an anode, and the IT containing silicon oxide is used as an anode. O film is formed.

[0444] An EL layer 7024 including a light-emitting layer is sandwiched between a first electrode 7023 and a second electrode 7025. In the case of the element structure shown in FIG. 15(B), the light-emitting element The light emitted from 7022 travels between the second electrode 7025 and the first electrode 70 as shown by the arrows. 23It is fired on both sides.

[0445] In FIG. 15B, a light-transmitting conductive film is used as a gate electrode layer and a source electrode is used as a gate electrode layer. 1 shows an example in which a light-transmitting thin film is used for the electrode layer and the drain electrode layer. The light emitted from 7022 to the first electrode 7023 passes through the color filter layer 7043. and can be projected through the substrate.

[0446] The color filter layer 7043 can be formed by a droplet discharge method such as an ink jet method, a printing method, or a photolithography method. Each is formed by an etching method using graphic technology.

[0447] The color filter layer 7043 is covered with an overcoat layer 7044, which is further provided with a protective insulating layer. Covered by layer 7045.

[0448] Also, a protective insulating layer 7045, an overcoat layer 7044, a color filter layer 7043, and a flat The planarized insulating layer 7046, the insulating layer 7042, and the insulating layer 7041 are formed, and the drain The contact holes reaching the electrode layers are arranged at positions overlapping with the partition walls 7029 .

[0449] However, if a light-emitting element with a dual-side emission structure is used and both display surfaces are full color, Since light from the second electrode 7025 side does not pass through the color filter layer 7043, a separate color filter is required. It is preferable to provide a sealing substrate with a filter layer above the second electrode 7025.

[0450] Next, a light emitting element with a top emission structure will be described with reference to FIG.

[0451] In FIG. 15C, a light-emitting element driving transistor 7001 is an n-type transistor, and a light-emitting element 7002 is This is a cross-sectional view of a pixel in the case where emitted light exits to the second electrode 7005 side. ) the drain electrode layer of the light-emitting element driving transistor 7001 and the first electrode 7003 The light-emitting element driving transistor 7001 and the first electrode 70 of the light-emitting element 7002 are in contact with each other. The EL layer 7004 and the second electrode 7003 are electrically connected to each other. 005 are stacked in order.

[0452] In addition, various materials can be used for the first electrode 7013. For example, When 13 is used as a cathode, a material with a small work function, specifically, for example, Li or Cs Alkali metals such as Mg, Ca, Sr, and alkaline earth metals, including these In addition to alloys (Mg:Ag, Al:Li, etc.), rare earth metals such as Yb and Er are preferred.

[0453] The periphery of the first electrode 7003 is covered with a partition wall 7009. The partition wall 7009 is made of polyimide. organic resin films such as acrylic resin, polyamide, and epoxy resin, inorganic insulating films, or organic polymer films The partition wall 7009 is formed by using a photosensitive resin material. An opening is formed on the electrode 7003, and the sidewall of the opening is formed with a continuous curvature. It is preferable to form the partition wall 7009 so as to have an inclined surface. In this case, the step of forming a resist mask can be omitted.

[0454] The EL layer 7004 formed on the first electrode 7003 and the partition wall 7009 is It is sufficient to include a light-emitting layer, and it may be composed of a single layer or a plurality of layers stacked. When the EL layer 7004 is made up of a plurality of layers, On the first electrode 7003 used as a light-emitting layer, an electron injection layer, an electron transport layer, a light-emitting layer, a hole transport ... The insulating layer, the insulating film, and the insulating film are laminated in this order. Note that it is not necessary to provide all of these layers.

[0455] The stacking order is not limited to the above, and the hole injection layer may be formed on the first electrode 7003 used as an anode. Alternatively, the hole transport layer, the light emitting layer, the electron transport layer, and the electron injection layer may be laminated in this order.

[0456] In Figure 15(C), hole injection is performed on a laminated film in which a Ti film, an aluminum film, and a Ti film are laminated in this order. The electron injection layer, hole transport layer, light emitting layer, electron transport layer, and electron injection layer are stacked in this order, and Mg:A A laminate of a g-alloy thin film and ITO is formed.

[0457] However, when the light-emitting element driving transistor 7001 is an n-type transistor, an electric field is applied to the first electrode 7003. It is more efficient to stack the electron injection layer, electron transport layer, light emitting layer, hole transport layer, and hole injection layer in this order. This is preferable because it can suppress a voltage rise in the operating circuit and reduce power consumption.

[0458] The second electrode 7005 is formed using a light-transmitting conductive material, for example, an acid. Indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide , indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Transparent films such as indium tin oxide, indium zinc oxide, and indium tin oxide doped with silicon oxide A conductive film having optical properties may also be used.

[0459] An EL layer 7004 including a light-emitting layer is sandwiched between a first electrode 7003 and a second electrode 7005. In the case of the pixel shown in FIG. 15(C), the light emitting element 700 Light emitted from 2 is emitted to the second electrode 7005 side as shown by the arrow.

[0460] In addition, in FIG. 15C, the drain electrode layer of the light-emitting element driving transistor 7001 is , a silicon oxide layer 7051, a protective insulating layer 7052, a planarizing insulating layer 7056, and a planarizing insulating layer 7053 and the first electrode 700 through a contact hole provided in the insulating layer 7055. 3 and electrically connected.

[0461] In addition, a partition wall 700 is provided to insulate the first electrode 7003 from the first electrode of an adjacent pixel. The partition wall 7009 is made of polyimide, acrylic resin, polyamide, epoxy resin, etc. The partition wall 7009 is formed using an organic resin film, an inorganic insulating film, or organic polysiloxane. In particular, an opening is formed on the first electrode 7003 using a photosensitive resin material, and the opening It is preferable that the sidewalls are formed as inclined surfaces having a continuous curvature. When a photosensitive resin material is used for the wall 7009, the process of forming a resist mask can be omitted. It is possible.

[0462] In the structure of FIG. 15C, when full color display is performed, for example, the light emitting element 70 02 is a green light emitting element, one of the adjacent light emitting elements is a red light emitting element, and the other The light-emitting element is a blue light-emitting element. In addition to the three types of light-emitting elements, a white element is added to make four types. A light-emitting display device capable of full-color display may be manufactured using a variety of light-emitting elements.

[0463] In the structure of FIG. 15(C), all the light emitting elements are white light emitting elements. A sealing substrate having a color filter or the like is disposed above the light emitting element 7002. A light-emitting display device capable of full color display may be manufactured. By combining a color filter and a color conversion layer, a full color display is achieved. It is possible.

[0464] The planarization insulating layers 7036, 7046, 7053, and 7056 are made of polyimide and acrylic. Resin, benzocyclobutene resin, polyamide, epoxy resin, or other resin materials are used. In addition to the above resin materials, low-dielectric constant materials (low-k materials), siloxane resins, etc. Examples of usable materials include polysilicon, polysilicon sulphide (PSG), and boron phosphorus sulphide (BPSG). By stacking a plurality of insulating films formed from these materials, a planarization insulating layer 7036, 7046, 7053, and 7056 may be formed. The method for forming 053 and 7056 is not particularly limited, and may be a sputtering method, depending on the material. SOG method, spin coating, dip coating, spray coating, droplet ejection method (inkjet method, Clean printing, offset printing, etc.), doctor knife, roll coater, curtain coater A knife coater or the like can be used.

[0465] The light emitting element driving transistors 7001, 7011, and 7021 used in the semiconductor device are In this case, any one of the thin film transistors described in the above embodiment modes can be used as appropriate. The light-emitting element driving transistors 7001 and 7002 can be formed using the same process and materials. The oxide semiconductor layers of 011 and 7021 have reduced hydrogen and water. The application transistors 7001, 7011, and 7021 are highly reliable thin film transistors.

[0466] Of course, a single-color display may be performed. For example, a lighting device may be formed using white light. Alternatively, a monochromatic light emitting device may be used to form an area color type light emitting device.

[0467] If necessary, an optical film such as a polarizing film, eg, a circular polarizing plate, may be provided.

[0468] Although organic EL elements have been described as light-emitting elements here, inorganic EL elements can also be used as light-emitting elements. It is also possible to provide an L element.

[0469] The thin film transistor (light emitting element driving transistor) that controls the driving of the light emitting element and the light emitting element Although an example in which the optical element is electrically connected has been shown, the transistor for driving the light emitting element and the light emitting element A current control transistor may be connected between the first and second electrodes.

[0470] Next, the appearance and cross section of the light-emitting display panel (also called the light-emitting panel) will be explained with reference to FIG. FIG. 16(A) shows a thin film transistor and a light emitting element formed on a first substrate. 16(B) is a top view of the panel sealed between the first substrate and the second substrate by a sealing material; corresponds to the cross-sectional view taken along line HI in FIG. 16(A).

[0471] A pixel portion 4502, a signal line driver circuit 4503a, a signal line driver circuit 4503b, a signal line driver circuit 4503c, a signal line driver circuit 4503d, a signal line driver circuit 4503e, a signal line driver circuit 4503f, a signal line driver circuit 4503g, a signal line driver circuit 4503h, a signal line driver circuit 4503m, a signal line driver circuit 4503 The driver circuit 4503b, the scanning line driver circuit 4504a, and the scanning line driver circuit 4504b are surrounded by a In this way, a sealing material 4505 is provided. A second substrate is disposed on the substrates 4503a and 4503b and the scanning line driver circuits 4504a and 4504b. Therefore, the pixel portion 4502, the signal line driver circuit 4503a, and the 3b, and the scanning line driver circuits 4504a and 4504b are formed by the first substrate 4501 and the sealing material 4 505 and a second substrate 4506, together with a filler material 4507, are sealed. A protective film (laminating film) with high airtightness and low outgassing is used to prevent exposure to the outside air. It is preferable to package (enclose) the product in a protective film (film, ultraviolet curing resin film, etc.) or a cover material. I wish.

[0472] In addition, a region different from the region surrounded by the sealant 4505 on the first substrate 4501 The photodetector 4580 shown in the first embodiment is provided in the area. The pixel portion may be formed at the same time as the pixel portion, or may be formed on a separate substrate and mounted on the first substrate 4501. In addition, when a light-transmitting substrate is used as the first substrate 4501, the light incident from the substrate side may be A photodetector 4580 can be provided as a structure for detecting light, but the first substrate 45 When a substrate that does not transmit visible light is used for 01, the light receiving part of the photodetector is shielded from light by the substrate. It is necessary to place it in a direction that is not affected by the

[0473] In addition, a pixel portion 4502, a signal line driver circuit 4503a, 4503b and the scanning line driver circuits 4504a and 4504b have a plurality of thin film transistors. In FIG. 16B, a thin film transistor 4510 included in a pixel portion 4502 and A thin film transistor 4509 included in a signal line driver circuit 4503a is illustrated.

[0474] The thin film transistors 4509 and 4510 are any of the thin film transistors described in the above embodiment modes. Any one of them can be used as appropriate, and can be formed using similar processes and materials. Hydrogen and water are reduced in the oxide semiconductor layers of the transistors 4509 and 4510 .

[0475] The thin film transistor 4509 for the driver circuit is an oxide semiconductor thin film transistor. In this embodiment, a conductive layer is provided at a position overlapping with the channel region of the semiconductor layer. The thin film transistors 4509 and 4510 are n-channel thin film transistors.

[0476] On the silicon oxide layer 4542, an oxide semiconductor of a thin film transistor 4509 for a driver circuit is formed. A conductive layer 4540 is provided at a position overlapping the channel region of the body layer. By providing the oxide semiconductor layer at a position overlapping the channel region, the The amount of change in the threshold voltage of the thin film transistor 4509 can be reduced. The potential of the gate electrode layer 4540 may be the same as that of the gate electrode layer of the thin film transistor 4509 or may be different. The conductive layer 4 may be formed of a metal or a silicon dioxide film, and may function as a second gate electrode layer. The potential of 540 may be GND, 0V, or may be in a floating state.

[0477] In addition, a silicon oxide layer 4542 covering the oxide semiconductor layer of the thin film transistor 4510 is formed. The source electrode layer or the drain electrode layer of the thin film transistor 4510 is In the opening formed in the silicon oxide layer 4542 and the insulating layer 4551 provided on the transistor, The wiring layer 4550 is electrically connected to the first electrode 4517. The thin film transistor 4510 and the first electrode 4517 are formed in contact with each other. 50.

[0478] The silicon oxide layer 4542 is formed using the same material and method as the oxide insulating layer shown in other embodiments. It is sufficient to form it.

[0479] A color filter layer 4545 is formed on the insulating layer 455 so as to overlap the light-emitting region of the light-emitting element 4511. Formed on 1.

[0480] It also functions as a planarizing insulating film to reduce the surface irregularities of the color filter layer 4545. It is covered with an overcoat layer 4543 .

[0481] In addition, an insulating layer 4544 is formed on the overcoat layer 4543. The protective insulating layer may be formed in the same manner as the protective insulating layer shown in other embodiments, for example, a silicon nitride film. can be formed by sputtering.

[0482] Further, 4511 corresponds to a light-emitting element, and a first electrode which is a pixel electrode of the light-emitting element 4511 is 4517 is a source electrode layer or drain electrode layer of the thin film transistor 4510 and a wiring layer 4 The light emitting element 4511 is electrically connected to the first electrode 45 through the first electrode 45. 17, the electroluminescent layer 4512, and the second electrode 4513 are laminated together, but are not limited to the configuration shown. The structure of the light emitting element 4511 is adjusted to suit the direction of the light to be extracted from the light emitting element 4511. The composition can be changed as appropriate.

[0483] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode 4517, and the sidewall of the opening is continuous. It is preferable to form the inclined surface with a continuous curvature.

[0484] The electroluminescent layer 4512 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's done or not.

[0485] The second electrode 45 is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light emitting element 4511. A protective film may be formed on the insulating film 13 and the partition wall 4520. Examples of the protective film include a silicon nitride film, Silicon nitride oxide film, DLC film, etc. can be formed.

[0486] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are transmitted through the FPC 4518a and the FPC 4518b. Powered by 518b.

[0487] The connection terminal electrode 4515 is made of the same conductive film as the first electrode 4517 of the light-emitting element 4511. The terminal electrode 4516 is formed on the source electrode layer and the drain electrode layer of the thin film transistor 4509. It is formed from the same conductive film as the electrode layer.

[0488] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. are electrically connected to each other.

[0489] The substrate located in the direction in which light is extracted from the light emitting element 4511 must be light-transmitting. In this case, use a glass plate, plastic plate, polyester film or acrylic resin film. A light-transmitting material such as a film is used.

[0490] In addition to inert gases such as nitrogen and argon, filler 4507 can also be used as UV-curable resin. It can be made of oil or thermosetting resin, and PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (a copolymer of ethylene and vinyl acetate) can be used. For example, Nitrogen can be used as the catalyst.

[0491] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. An optical film such as a retardation plate (λ / 4 plate, λ / 2 plate) may be provided as appropriate. Alternatively, an anti-reflection film may be provided on the circular polarizer. For example, the surface roughness can be used to diffuse reflected light, Anti-glare treatment can be applied to reduce reflections.

[0492] The sealant is applied using a screen printing method, inkjet device or dispensing device. The sealant is typically a visible light curable, ultraviolet curable or heat curable material. A material containing a resin having a high viscosity may be used. A filler may also be included.

[0493] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving circuit formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate is Alternatively, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be mounted. Only the path or only a part of the path may be separately formed and mounted, and the configuration is not limited to that of FIG.

[0494] Through the above steps, a light-emitting display device (display panel) can be manufactured as a semiconductor device. do.

[0495] The light detection device 4580 detects the illuminance around the light-emitting display device, thereby adjusting the light emission brightness. This improves visibility and also enables power saving.

[0496] In addition, the photodetector shown in Embodiment Mode 1 is provided in the pixel portion 4502, and an optical touch sensor is provided. It can be used as a sir.

[0497] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0498] (Embodiment 12) In this embodiment, one mode of a semiconductor device disclosed in this specification will be described. 1 shows an example of electronic paper as one mode of a semiconductor device disclosed in this specification.

[0499] FIG. 17 is a diagram showing an active matrix type electronic paper. The thin film transistor 581 may be any of the thin film transistors described in the above embodiment modes. Any one of them can be used as appropriate and can be formed using similar processes and materials. In this embodiment, the thin film transistor described in Embodiment 6 is used as the thin film transistor 581. The oxide semiconductor layer of the thin film transistor 581 has reduced hydrogen and water. .

[0500] The electronic paper in Figure 17 is an example of a display device that uses the twisting ball display method. The spherical display method uses black and white spherical particles as the display element, and the electrode layer is and a potential difference is applied between the first electrode layer and the second electrode layer. This is a method of displaying by controlling the orientation of spherical particles by generating a magnetic field.

[0501] The thin film transistor 581 provided on the substrate 580 is a thin film transistor of a bottom gate structure. The source electrode layer or the drain electrode layer is a silicon oxide layer 583 and a protective insulating layer 58 4. An opening formed in the insulating layer 585 is electrically connected to the first electrode layer 587. do.

[0502] Between the first electrode layer 587 and the second electrode layer 588, there are a black region 590a and a white region 590b. 0b and a spherical particle having a cavity 594 filled with liquid therearound. The spherical particles 589 are filled with a filler 595 such as a resin (see FIG. 17). In this embodiment, the first electrode layer 587 corresponds to a pixel electrode and is provided on the opposing substrate 596. The second electrode layer 588 corresponds to a common electrode.

[0503] Also, instead of the twist ball, an electrophoretic element can be used. and a diameter of 10 μm to 20 μm that contains positively charged white particles and negatively charged black particles. Microcapsules of about 0 μm in size are used. When an electric field is applied by the first and second electrode layers, the microcapsules turn white. White particles and black particles move in opposite directions, allowing the display to be white or black. The display element that applies this principle is an electrophoretic display element, which is generally called electronic paper. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not required. It also consumes little power and the display can be seen even in dimly lit places. Even if power is not supplied to the display unit, the image that has been displayed can be retained. Therefore, the semiconductor device with a display function (simply a display device, or a device equipped with a display device) is The ability to preserve the displayed image even when the device (also known as a semiconductor device) is moved away This becomes possible.

[0504] In the electronic paper of this embodiment, a voltage applied to the twist ball is controlled by a driving circuit. This is a reflective display device that displays images by controlling the above.

[0505] Through the above steps, electronic paper can be manufactured as a semiconductor device.

[0506] In addition, the photodetector shown in the first embodiment is provided in the display area, and the photodetector is used as an optical touch sensor. It can also be used.

[0507] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0508] (Embodiment 13) The semiconductor device disclosed in this specification can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television receivers), computer monitors, digital cameras, digital video cameras digital photo frames, mobile phones (also called mobile phones or mobile phone devices), portable Examples include game machines, mobile information terminals, sound reproduction devices, and large game machines such as pachinko machines. do.

[0509] 18A shows an example of a mobile phone. The mobile phone 1600 has a housing 1601. In addition to the display unit 1602 incorporated in the It is equipped with an external connection port 1604, a speaker 1605, a microphone 1606, etc.

[0510] The mobile phone 1600 shown in FIG. 18A displays information by touching the display portion 1602 with a finger or the like. In addition, operations such as making a phone call or sending an email can be performed using the display. This can be done by touching 1602 with a finger or the like.

[0511] The screen of the display unit 1602 has three main modes. The first is a display mode that mainly displays images. The first mode is a display mode, and the second mode is an input mode that mainly inputs information such as characters. This is a display + input mode that combines two modes: display mode and input mode.

[0512] For example, when making a call or creating an email, the display unit 1602 is used to input characters. This is the main character input mode, and you can input characters displayed on the screen. It is preferable to display a keyboard or number buttons on most of the screen of the display unit 1602. I wish.

[0513] In addition, the mobile phone 1600 may include a sensor for detecting tilt, such as a gyro or an acceleration sensor. By providing a detection device having the above, the orientation of the mobile phone 1600 (portrait or landscape) can be determined and the display The screen display of the display unit 1602 can be automatically switched.

[0514] The screen mode can be switched by touching the display unit 1602 or by operating the housing 1601. This is done by operating the buttons 1603a and 1603b. For example, the image to be displayed on the display unit can be switched depending on the type of image. If the image signal is video data, it switches to display mode, and if it is text data, it switches to input mode. can.

[0515] In the input mode, the optical sensor of the display unit 1602 detects a signal and displays it. If there is no input by touch operation on the part 1602 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the normal mode to the display mode.

[0516] The display unit 1602 can also function as an image sensor. By touching the palm or fingers to the sensor 02, the palm print, fingerprint, etc. can be captured and identity authentication can be performed. In addition, the display unit may be equipped with a backlight that emits near-infrared light or a sensor that emits near-infrared light. By using a scanning light source, it is also possible to capture images of finger veins, palm veins, etc.

[0517] The semiconductor device described in the above embodiment modes can be applied to the display portion 1602. For example, As the element switching element, a plurality of thin film transistors shown in the other embodiments are arranged. It is possible.

[0518] FIG. 18(B) is also an example of a mobile phone. The portable information terminal shown in FIG. 18(B) is It can have multiple functions. For example, in addition to the telephone function, it can also have a built-in computer and perform various functions. It can also have various data processing functions.

[0519] The portable information terminal shown in FIG. 18B is configured with two housings, a housing 1800 and a housing 1801. The housing 1801 contains a display panel 1802, a speaker 1803, a microphone Phone 1804, pointing device 1806, camera lens 1807, external connection The housing 1800 includes a keyboard 1810 and an external memory slot. 1811, etc. The antenna is built into the housing 1801.

[0520] The display panel 1802 is equipped with a touch panel, and in FIG. 18(B) an image is displayed. A plurality of operation keys 1805 are indicated by dotted lines.

[0521] In addition to the above configuration, a contactless IC chip, a small recording device, etc. may be built in.

[0522] The semiconductor device shown in the above embodiment mode can be used for the display panel 1802. The display direction changes accordingly. It is equipped with a microphone 1807, so it is possible to make video calls. The Crophone 1804 is not limited to voice calls, but also allows video calls, recording, playback, etc. Furthermore, the housing 1800 and the housing 1801 slide and are unfolded as shown in FIG. 18(B). The device can be folded from a folded state to a stacked state, making it possible to make the device compact and portable.

[0523] The external connection terminal 1808 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the memory slot 1811, it is possible to store and transfer a larger amount of data. do.

[0524] In addition to the above functions, even if the device has infrared communication function, TV reception function, etc. good.

[0525] FIG. 19A shows an example of a television device. The television device 9600 includes: A display unit 9603 is incorporated in a housing 9601. The display unit 9603 displays images. In this case, the housing 9601 is supported by a stand 9605. The figure shows the configuration.

[0526] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the information displayed on the display 9603 is In addition, the remote control operation device 9610 can operate the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0527] The television device 9600 is configured to include a receiver, a modem, and the like. It can receive more general TV broadcasts and can also receive them via wired or wireless modems. By connecting to a communication network, it can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0528] The semiconductor device described in the above embodiment modes can be applied to the display portion 9603. For example, As the element switching element, a plurality of thin film transistors shown in the other embodiments are arranged. It is possible.

[0529] FIG. 19(B) shows an example of a digital photo frame. The frame 9700 has a display unit 9703 built into a housing 9701. 3 is capable of displaying various images, for example, images taken with a digital camera. By displaying data, it can function like a regular photo frame.

[0530] The semiconductor device described in the above embodiment modes can be applied to the display portion 9703. For example, As the element switching element, a plurality of thin film transistors shown in the other embodiments are arranged. It is possible.

[0531] The Digital Photo Frame 9700 has an operation panel, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section. These components may be incorporated on the same surface as the display unit, but they may be incorporated on the side or back. It is preferable to have a recording medium for a digital photo frame as it improves the design. A memory that stores image data taken with a digital camera is inserted into the body insertion section. The image data can be captured and the captured image data can be displayed on the display portion 9703 .

[0532] The digital photo frame 9700 may also be configured to be capable of transmitting and receiving information wirelessly. It is also possible to configure the device so that desired image data is wirelessly acquired and displayed.

[0533] FIG. 20 shows an example of a portable gaming machine. The portable gaming machine shown in FIG. 20 includes a housing 9881 The two housings are connected by the connecting part 9893 so that they can be opened and closed. The housing 9881 incorporates a display unit 9882, and the housing 9891 incorporates a display unit 9893. 883 is built in.

[0534] The semiconductor device described in the above embodiment modes can be applied to the display portion 9883. For example, As the element switching element, a plurality of thin film transistors shown in the other embodiments are arranged. It is possible.

[0535] 20 also includes a speaker unit 9884, a recording medium insertion unit 9885, and a 886, LED lamp 9890, input means (operation key 9885, connection terminal 9887, sensor Sa9888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature Degree, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient , vibration, odor or infrared measuring functions), microphone 9889) etc. Of course, the configuration of the portable gaming machine is not limited to the above, and It is sufficient if the device is configured with the thin film transistors disclosed in the specification, and other auxiliary equipment is provided as appropriate. The portable gaming machine shown in FIG. It has the function of reading out the programs or data stored in the device and displaying them on the display, and wirelessly connecting to other portable gaming machines. It has a function to communicate and share information. The function is not limited to this and can have various functions.

[0536] (Embodiment 14) The semiconductor device disclosed in this specification can be applied as electronic paper. Par can be used in any electronic device that displays information. For example, electronic paper can be used for electronic books, posters, trains, etc. It can be used for in-car advertising, displaying on various cards such as credit cards, etc. An example of an electronic device is shown in Figure 21.

[0537] 21 shows an example of an electronic book. For example, an electronic book 2700 includes a housing 2701 and a The housing 2701 and the housing 2703 are The shaft 2711 serves as an axis for opening and closing. This configuration allows the device to function like a paper book.

[0538] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a sentence is displayed on the right display unit (display unit 2705 in FIG. 21) and An image can be displayed on the display unit 2707 in FIG.

[0539] 21 shows an example in which the housing 2701 is provided with an operation unit. 701 includes a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The keyboard and pointing device may be provided on the rear surface of the housing. On the side, there are external connection terminals (earphone terminal, USB terminal, or AC adapter and USB A configuration including a terminal that can be connected to various cables, a recording medium insertion section, etc. Furthermore, the electronic book 2700 may be configured to have the function of an electronic dictionary. That's fine.

[0540] The electronic book 2700 may also be configured to be able to send and receive information wirelessly. The desired book data can be purchased and downloaded from the e-book server. is also possible.

[0541] This embodiment mode can be implemented in appropriate combination with other embodiment modes. [Explanation of symbols]

[0542] 300 boards 302 Gate insulating layer 303 Protective Insulation Layer 310 Thin-film transistor 311 Gate electrode layer 316 Oxide insulating layer 320 board 322 Gate insulating layer 323 Protective Insulation Layer 330 Oxide semiconductor film 331 Oxide semiconductor layer 332 Oxide semiconductor layer 340 PCB 342 Gate insulating layer 343 Protective Insulation Layer 345 Oxide semiconductor film 346 Oxide semiconductor layer 350 Thin-Film Transistors 351 Gate electrode layer 356 Oxide insulating layer 360 Thin Film Transistor 361 Gate electrode layer 366 Oxide insulating layer 370 PCB 373 Protective Insulation Layer 380 Thin Film Transistors 381 Gate electrode layer 382 Oxide semiconductor layer 386 Oxide insulating layer 400 boards 402 Gate insulating layer 403 Protective Insulation Layer 407 Insulating Layer 409 Planarizing insulating layer 410 Thin Film Transistor 411 Gate electrode layer 412 Oxide semiconductor layer 416 Oxide insulating layer 420 silicon substrate 422 Insulating layer 423 Aperture 424 Conductive Layer 425 Thin-film transistor 426 Thin Film Transistor 427 Conductive Layer 430 Oxide semiconductor film 438 Wiring layer 450 board 452 Gate insulating layer 457 Insulating Layer 460 Thin Film Transistor 461 Gate electrode layer 462 Oxide semiconductor layer 464 Wiring layer 468 Wiring layer 580 board 581 Thin-film transistor 583 Silicon oxide layer 584 Protective Insulation Layer 585 Insulation Layer 587 Electrode layer 588 Electrode layer 589 Spherical particles 594 Cavity 595 Filling material 596 Opposing substrate 601 Substrate 608 Adhesive layer 613 Substrate 622 light 631 Insulating Layer 632 Protective insulation layer 633 Interlayer insulation layer 634 Interlayer insulation layer 641 Electrode layer 642 Electrode layer 643 Conductive Layer 644 Electrode layer 645 gate electrode layer 1300 Photodetector 1301 Detector 1302 Amplifier circuit 1305 Transistor 1306 Transistor 1311 Power terminal 1312 Power terminal 1320 protection circuit 1321 Diode 1600 mobile phones 1601 Case 1602 Display section 1604 External connection port 1605 Speaker 1606 Mike 1800 cabinet 1801 Case 1802 Display panel 1803 Speaker 1804 Microphone 1805 Operation Key 1806 Pointing Device 1807 Camera Lenses 1808 External connection terminal 1810 keyboard 1811 External memory slot 2700 e-books 2701 Housing 2703 Housing 2705 ​​Display section 2707 Display section 2711 Shaft 2721 Power supply 2723 Operation Key 2725 Speaker 4001 board 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 board 4008 Liquid crystal layer 4010 Thin Film Transistor 4011 Thin-film transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4019 Anisotropic conductive film 4020 Insulation layer 4021 Insulation layer 4030 Pixel electrode layer 4031 Counter electrode layer 4032 Insulation layer 4033 Insulation layer 4035 Spacer 4040 Conductive layer 4041 Insulation layer 4042 Protective insulation layer 4100 Photodetector 4501 Circuit Board 4502 Pixel section 4505 Sealing material 4506 board 4507 Filling material 4509 Thin-film transistor 4510 Thin-film transistor 4511 Light-emitting element 4512 Electroluminescent layer 4513 Electrode 4515 Connection terminal electrode 4516 Terminal electrode 4517 Electrode 4519 Anisotropic conductive film 4520 Bulkhead 4540 Conductive layer 4542 silicon oxide layer 4543 Overcoat layer 4544 Insulation layer 4545 Color filter layer 4550 wiring layer 4551 Insulation layer 4580 Photodetector 6400 pixels 6401 Switching transistor 6402 Light-emitting element driving transistor 6403 Capacitor element 6404 Light-emitting element 6405 signal line 6406 scan lines 6407 Power line 6408 Common electrode 6502 Light-emitting element driving transistor 6503 Capacitor 6504 Light-emitting element 6505 signal line 6506 scan lines 6507 Power line 6508 Common electrode 6510 pixels 6511 Switching transistor 6512 Switching transistor 6513 Reference Transistor 7001 Light-emitting element driving transistor 7002 Light-emitting element 7003 Electrode 7004 EL layer 7005 Electrode 7009 Bulkhead 7011 Light-emitting element driving transistor 7012 Light-emitting element 7013 Electrode 7014 EL layer 7015 Electrode 7016 Shielding membrane 7017 Conductive film 7019 Bulkhead 7021 Light-emitting element driving transistor 7022 Light-emitting element 7023 Electrode 7024 EL layer 7025 Electrode 7027 Conductive film 7029 Bulkhead 7031 Insulation layer 7032 Insulation layer 7033 Color filter layer 7034 Overcoat layer 7035 Protective insulation layer 7036 Planarizing insulating layer 7041 Insulation layer 7042 Insulation layer 7043 Color filter layer 7044 Overcoat layer 7045 Protective insulation layer 7046 Planarization insulating layer 7051 Silicon oxide layer 7052 Protective insulation layer 7053 Planarization insulating layer 7055 Insulation layer 7056 Planarization insulating layer 9600 Television Equipment 9601 Housing 9603 Display section 9605 Stand 9607 Display section 9609 Operation Key 9610 Remote Control Machine 9700 Digital Photo Frame 9701 Housing 9703 Display section 9881 Case 9882 Display section 9883 Display section 9884 Speaker unit 9885 Operation Key 9886 Recording medium insertion section 9887 Connection terminal 9888 Sensor 9889 Microphone 9890 LED Lamp 9891 Case 9893 Connection section 1603a Operation button 1603b Operation button 315a Source electrode layer 315b drain electrode layer 355a Source electrode layer 355b drain electrode layer 365a Source electrode layer 365b drain electrode layer 372a Gate insulating layer 372b Gate insulating layer 385a Source electrode layer 385b Drain electrode layer 414a wiring layer 414b wiring layer 415a Drain electrode layer 415b Drain electrode layer 421a aperture 421b aperture 4503a Signal line driver circuit 4503b Signal line driver circuit 4504a Scanning line driver circuit 4504b Scanning line driver circuit 4518a FPC 4518b FPC 465a Source electrode layer or drain electrode layer 465a1 Source electrode layer or drain electrode layer 465a2 Source electrode layer or drain electrode layer 465b Source electrode layer or drain electrode layer 590a black area 590b White area 606a Semiconductor layer 606b Semiconductor layer 606c Semiconductor layer

Claims

[Claim 1] a first transistor; a second transistor; and a third transistor; and a fourth transistor; and a capacitive element; A light-emitting element; A first wiring; A second wiring; a third wiring; one of a source and a drain of the first transistor is electrically connected to the first wiring; the other of the source and the drain of the first transistor is electrically connected to the gate of the third transistor; the other of the source and the drain of the first transistor is electrically connected to the gate of the fourth transistor; the other of the source and the drain of the first transistor is electrically connected to one electrode of the capacitor element; a gate of the first transistor electrically connected to the second wiring; one of a source and a drain of the second transistor is electrically connected to the first wiring; the other of the source and the drain of the second transistor is electrically connected to the one of the source and the drain of the third transistor; the other of the source and the drain of the third transistor is electrically connected to the light-emitting element; one of a source and a drain of the fourth transistor is electrically connected to the third wiring; the other of the source and the drain of the fourth transistor is electrically connected to the light-emitting element; the other electrode of the capacitance element is electrically connected to the light emitting element; the first to fourth transistors each have an oxide semiconductor in a channel formation region; The semiconductor device wherein the oxide semiconductor is In—O.

Images