Semiconductor module
The semiconductor module addresses double-sided heat dissipation restrictions by incorporating a recessed design for the second heat dissipation member, improving heat dissipation efficiency and reducing manufacturing costs through optimized pin pressing and resin handling.
Patent Information
- Application Number
- JP2024020758
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-15
- Publication Date
- 2025-08-27
AI Technical Summary
Existing semiconductor modules with double-sided heat dissipation face restrictions on the dimensions and arrangement of heat dissipation members due to the pressing process during sealing, which affects heat dissipation efficiency.
A semiconductor module design featuring a recess on the second heat dissipation member to accommodate the pressing pins, allowing for increased exposure and improved heat dissipation without burrs or manufacturing cost increases.
Eases restrictions on heat dissipation members, enhancing heat dissipation performance and reducing manufacturing costs by preventing resin intrusion and eliminating the need for additional resin application.
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Figure 2025124977000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a semiconductor module. [Background technology]
[0002] Some DIP (Dual Inline Package) type semiconductor modules have a heat dissipation member exposed on the surface of the sealing member that seals the semiconductor element. In the sealing process for manufacturing this type of semiconductor module, the heat dissipation member is pressed against a mold with a pin to prevent the sealing member from flowing into the gap between the heat dissipation member and the mold (see, for example, Patent Document 1). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Publication No. 2022-67815 Summary of the Invention [Problem to be solved by the invention]
[0004] Among the above-mentioned semiconductor modules, there is a double-sided heat dissipation type in which the heat dissipation member is exposed on both the first and second surfaces of the sealing member, which are the front and back surfaces. However, when the heat dissipation member is pressed against the mold with a pin during the sealing process in manufacturing a double-sided heat dissipation semiconductor module, significant restrictions are imposed on the dimensions, arrangement, etc. of the heat dissipation member exposed on the first surface and the heat dissipation member exposed on the second surface.
[0005] In one aspect, the present invention aims to alleviate the restrictions on heat dissipation members in a double-sided heat dissipation type semiconductor module. [Means for solving the problem]
[0006] A semiconductor module according to one embodiment comprises a sealing member that seals a semiconductor element, a first heat dissipation member exposed from a first surface of the sealing member, and a second heat dissipation member exposed from a second surface of the sealing member opposite the first surface, wherein a recess is formed on the second surface of the sealing member, the recess being located at an end of the first heat dissipation member in a planar view of the second surface and overlapping with the first heat dissipation member, and the planar shape of the second heat dissipation member in a planar view of the second surface is such that a line parallel to the edge of the first heat dissipation member that passes through a point of the recess farthest from the edge of the first heat dissipation member that is closest to the recess passes through the second heat dissipation member. [Effects of the Invention]
[0007] According to the above-described aspect, it is possible to ease the restrictions on the heat dissipation member in a double-sided heat dissipation type semiconductor module. [Brief explanation of the drawings]
[0008] [Figure 1] FIG. 1 is a plan view of a semiconductor module according to a first embodiment. [Figure 2] 2 is a cross-sectional view illustrating an example of the configuration inside a sealing member in the semiconductor module of FIG. 1. FIG. [Figure 3] 2 is a circuit diagram illustrating an example of a circuit configuration of the semiconductor module of FIG. 1. [Figure 4] FIG. 3 is a flow diagram illustrating an example of a method for manufacturing a semiconductor module according to the first embodiment. [Figure 5] FIG. 10 is a cross-sectional view illustrating the state of a molding die at the start of a sealing process. [Figure 6] 10A to 10C are cross-sectional views illustrating the state of a molding die during an injection step and a temporary curing step. [Figure 7] FIG. 10 is a cross-sectional view illustrating the state of the molding die after a pin removal step. [Figure 8] 10A to 10C are partial cross-sectional views illustrating examples of the shape of the tip of a pin and the shape of a through hole in a second heat dissipation member. [Figure 9]10A and 10B are partial cross-sectional views illustrating examples of recesses formed in the through holes of the second heat dissipation member by the main curing step. [Figure 10] 10A and 10B are plan views illustrating modified examples of the planar shape of the second heat dissipation member. [Figure 11] 10A and 10B are plan views illustrating modified examples of the arrangement of pins pressed against the first heat dissipation member. [Figure 12] 5A to 5C are diagrams illustrating features of a planar shape of a second heat dissipation member that can be employed in the semiconductor module according to the first embodiment. [Figure 13] 10A and 10B are partial cross-sectional views illustrating a modified example of a method for pressing the heat dissipation member against the mold. [Figure 14] FIG. 10 is a plan view of a semiconductor module according to a second embodiment. [Figure 15] 15 is a cross-sectional view illustrating an example of the configuration inside a sealing member in the semiconductor module of FIG. 14. [Figure 16] 10 is a cross-sectional view illustrating an example of the configuration of a molding die used in manufacturing a semiconductor module according to a second embodiment. FIG. DETAILED DESCRIPTION OF THE INVENTION
[0009] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following description, a "semiconductor module" refers to a semiconductor element (semiconductor chip) sealed with an insulating material, and is also sometimes called a "semiconductor device" or "semiconductor package."
[0010] The X-axis, Y-axis, and Z-axis in each of the referenced figures are shown for the purpose of defining planes and directions in the semiconductor module shown. The X-axis, Y-axis, and Z-axis are perpendicular to each other and form a right-handed system. In the following description, the direction parallel to the X-axis is referred to as the X-direction, the direction parallel to the Y-axis is referred to as the Y-direction, and the direction parallel to the Z-axis is referred to as the Z-direction. Furthermore, when relating the X-axis, Y-axis, and Z-axis to the arrow directions (positive and negative) of the X-axis, Y-axis, and Z-axis shown in the figures, the X-axis, Y-axis, and Z-axis directions are labeled as the "positive side" or "negative side."
[0011] In this specification, the Z direction may be referred to as the up-down direction. In this specification, "up" and "above" refer to the positive side of the Z direction relative to a reference surface, component, position, etc., while "down" and "below" refer to the negative side of the Z direction relative to a reference surface, component, position, etc. For example, when describing "component B being placed on component A," component B is placed on the positive side of component A in the Z direction. Furthermore, when describing "the top surface of component A," this surface includes the surface located at the end of component A on the positive side of the Z direction and facing the positive side of the Z direction. These directions and surfaces associated with these directions are terms used for convenience of explanation, and their correspondence with the X-axis, Y-axis, and Z-axis directions may change depending on the mounting orientation of the semiconductor module, etc. For example, in this specification, the surface located at the end of a semiconductor element, a heat dissipation component, etc. on the positive side of the Z direction is referred to as the top surface, and the surface opposite the top surface is referred to as the bottom surface. However, this is not limited to this, and the surface located at the end on the negative side of the Z direction may also be referred to as the top surface, and the surface opposite that may be referred to as the bottom surface.
[0012] The aspect ratios and relative sizes of components in each diagram are merely schematic representations and do not necessarily correspond to the relationships in an actually manufactured semiconductor module. For the sake of convenience, the relative sizes of components may be exaggerated. Furthermore, for the sake of convenience, some cross-sectional views show the cross-sectional configuration of a semiconductor module cut along an imaginary cutting line that cannot be accurately shown in a plan view.
[0013] In this specification, the terms "not shown," "not shown," "not shown," and the like are intended to mean that the components to which these terms are attached are not clearly shown in the drawings. For example, "first main electrode not shown" means, depending on the context, that a part representing the first main electrode (e.g., a shape, a line, etc.) is not shown in the drawings, and that there are no leading lines or symbols clearly indicating the part corresponding to the first main electrode in the drawings. Also, underlined symbols in the drawings indicate the entire component including multiple parts distinguished by multiple symbols.
[0014] The semiconductor module exemplified in the following description may be applied to a power conversion device such as an inverter device for industrial or electrical equipment (e.g., an in-vehicle motor). Therefore, in the following description, detailed descriptions of configurations, functions, operations, manufacturing methods, etc. that are the same as or similar to those of known semiconductor modules will be omitted.
[0015] [First embodiment] FIG. 1 is a plan view of a semiconductor module according to a first embodiment. FIG. 2 is a cross-sectional view illustrating an example of the configuration inside a sealing member of the semiconductor module of FIG. 1. The cross-sectional view of FIG. 2 illustrates an example of the cross-sectional configuration of the semiconductor module 1 taken along a virtual line A-A' connecting a dashed-dotted line passing through one lead 4A located on the negative side in the X direction of the semiconductor module 1 of FIG. 1 and another dashed-dotted line passing through another lead 4W located on the positive side in the X direction. In FIG. 1, the dashed line representing the outline of the first heat dissipation member 2 and the solid line representing the outline of the second heat dissipation member 6 may overlap in part or in whole. The solid line representing the outline of the second heat dissipation member 6 may pass outside the area surrounded by the dashed line representing the outline of the first heat dissipation member 2.
[0016] The semiconductor module 1 illustrated in FIGS. 1 and 2 includes a first heat dissipation member 2, a semiconductor element 3, leads 4 (4A-4X), a spacer 5, a second heat dissipation member 6, and a sealing member 7. The semiconductor module 1 may include a cooler 8 (see FIG. 2) located below the first heat dissipation member 2. However, in this specification, the semiconductor module 1 refers to a DIP (Dual Inline Package) type semiconductor package excluding the cooler 8 illustrated in FIG. 2. Furthermore, in this specification, when referring to a specific lead among the multiple leads 4A-4X, the reference numeral (any of 4A-4X) assigned to that specific lead in FIG. 1 is used; otherwise, the lead is simply referred to as "lead 4." Furthermore, in this specification, for other components assigned reference numerals with letters such as "A" to "D," the reference numeral with the letter is used when referring to the specific component, and the reference numeral without the letter is used otherwise.
[0017] The first heat dissipation member 2 and the second heat dissipation member 6 are members for dissipating heat generated by the semiconductor element 3 sealed with the sealing member 7 during operation to the outside of the semiconductor module 1. The first heat dissipation member 2 has an insulating substrate 200, a first conductor pattern 201 provided on the upper surface of the insulating substrate 200, and a second conductor pattern 202 provided on the lower surface of the insulating substrate 200, with the lower surface of the second conductor pattern 202 exposed from the lower surface (first surface) 711 of the sealing member 7. The lower surface of the second conductor pattern 202 of the first heat dissipation member 2 is flush with the lower surface 711 of the sealing member 7. The second heat dissipation member 6 has an insulating substrate 600, a first conductor pattern 601 provided on the upper surface of the insulating substrate 600, and a second conductor pattern 602 provided on the lower surface of the insulating substrate 600, with the upper surface of the first conductor pattern 601 exposed from the upper surface (second surface) 712 of the sealing member 7. The upper surface of the first conductor pattern 601 of the second heat dissipation member 6 is in the same plane as the upper surface 712 of the sealing member 7. In the following description, the "lower surface of the first heat dissipation member 2" refers to the lower surface of the second conductor pattern 202 of the first heat dissipation member 2, and the "upper surface of the second heat dissipation member 6" refers to the upper surface of the first conductor pattern 601 of the second heat dissipation member 6.
[0018] The insulating substrate 200 of the first heat dissipation member 2 may be, for example, a sheet of insulating resin such as epoxy resin (a resin insulating sheet). The resin insulating sheet is formed on the second conductive pattern 202 by adding insulating particles of a nitride such as boron nitride (BN) or aluminum nitride (AlN) or an oxide such as alumina (Al2O3), which have high thermal conductivity, to an epoxy resin or the like.
[0019] The first conductor pattern 201 and the second conductor pattern 202 of the first heat dissipation member 2 are formed of, for example, a metal foil such as copper or aluminum. The metal foil has a thickness of 0.1 mm to 3.0 mm. The second conductor pattern 202 may be the cooler 8 or a part thereof. The conductor pattern may also be called a conductive pattern, a conductor layer, a conductive layer, or the like.
[0020] A plurality of conductor patterns including the first conductor pattern 201 may be formed on the upper surface of the insulating substrate 200. When the insulating substrate 200 is a resin insulating sheet, a plurality of regions where the first conductor pattern 201 does not overlap are provided along the edge of the upper surface of the insulating substrate 200 in a plan view of the upper surface of the insulating substrate 200. In other words, the first conductor pattern 201 may have a smaller area and width than the insulating substrate 200, and the upper surface (front surface) of the insulating substrate 200 may be exposed to the sealing member 7. Alternatively, the insulating substrate 200 may be a ceramic substrate with high thermal conductivity, such as aluminum oxide (Al2O3) or aluminum nitride (AlN). Note that such insulating substrates 200 have a thickness of 0.1 mm to 0.4 mm. In this case, the second conductor pattern 202 may have a smaller area and width than the insulating substrate 200, and the lower surface (rear surface) of the insulating substrate 200 may be exposed to the sealing member 7. As will be described later, when through holes are provided in the first heat dissipation member 2, the insulating substrate 200 is preferably a resin insulating sheet from the standpoint of processability.
[0021] The second heat dissipation member 6 needs to dissipate heat generated from the semiconductor element 3 upward and to be electrically insulated from the leads 4. Although a laminate of "conductor layer / insulating substrate / conductor layer" is exemplified in this specification, the second heat dissipation member 6 may also be a laminate of "conductor layer / insulating substrate." The insulating substrate 600, the first conductor pattern 601, and the second conductor pattern 602 of the second heat dissipation member 6 may each be formed from the same material as the insulating substrate 200, the first conductor pattern 201, and the second conductor pattern 202 of the first heat dissipation member 2, for example. On the lower surface of the insulating substrate 600, for example, a plurality of conductor patterns including the second conductor pattern 602 may be formed, the shapes of which correspond to the shapes of the plurality of conductor patterns including the first conductor pattern 201 provided on the insulating substrate 200 of the first heat dissipation member 2. When the insulating substrate 600 is a resin insulating sheet, a plurality of regions not overlapped by the second conductor pattern 602 are provided on the lower surface of the insulating substrate 600 along the edge of the insulating substrate 600 in a plan view of the lower surface of the insulating substrate 600. In some of the plurality of regions not overlapped by the second conductor pattern 602 in the second heat dissipation member 6, through holes 610 (610A to 610D) are formed that penetrate from the lower surface of the insulating substrate 600 to the upper surface of the first conductor pattern 601. The through holes 610 of the second heat dissipation member 6 are formed so as to overlap with corners of the insulating substrate 200 of the first heat dissipation member 2 in a plan view of the upper surface 712 of the sealing member 7, in a region where the first conductor pattern 201 is not arranged. Alternatively, the second conductor pattern 602 may be approximately the same size as the insulating substrate 600, in which case a through hole 610 may be provided in a laminated portion where the first conductor pattern 601, the insulating substrate 600, and the second conductor pattern 602 are laminated. A portion of the sealing member 7 flows into the through hole 610 of the second heat dissipation member 6 so as to form a recess 720 (720A, 720B in FIG. 2 ) recessed downward from the upper surface of the first conductor pattern 601, which is in the same plane as the upper surface 712 of the sealing member 7.
[0022] A semiconductor element 3, leads 4, and spacers 5 are arranged between the first heat dissipation member 2 and the second heat dissipation member 6. A plurality of semiconductor elements 3 may be arranged. The plurality of semiconductor elements 3 may have the same function, or may include a plurality of types of semiconductor elements with different functions. The semiconductor element 3 may be called a semiconductor chip, die, etc.
[0023] The semiconductor element 3 may be, for example, an RC (Reverse Conducting)-IGBT element that integrates the functions of an IGBT (Insulated Gate Bipolar Transistor) element, which is a switching element, and a diode element such as an FWD (Free Wheeling Diode) element connected in anti-parallel to the IGBT element. This type of semiconductor element 3 has a first main electrode (not shown) on its bottom surface and a second main electrode and a control electrode (gate electrode) (not shown) on its top surface. When the switching element of the semiconductor element 3 is an IGBT element, the first main electrode on the bottom surface may be called a collector electrode, and the second main electrode on the top surface may be called an emitter electrode. The semiconductor substrate on which the switching element and diode element of the semiconductor element 3 are formed is not limited to a silicon substrate, and may be a substrate using a wide bandgap semiconductor such as a silicon carbide (SiC) substrate or a gallium nitride (GaN) substrate.
[0024] The semiconductor element 3 has a first main electrode on its bottom surface bonded to the first conductor pattern 201 of the first heat dissipation member 2 with a first bonding material (not shown), and a second main electrode on its top surface bonded to the lead 4 with a second bonding material (not shown). The control electrode on the top surface of the semiconductor element 3 is connected to a lead (not shown) separate from the lead 4 bonded to the second main electrode, either directly or via another semiconductor element (not shown). The spacer 5 is a thermally conductive member that connects the lead 4 bonded to the second main electrode of the semiconductor element 3 to the second conductor pattern 602 of the second heat dissipation member 6. The spacer 5 may be, for example, a rectangular metal member such as a copper block. Alternatively, the spacer 5 may be integrated with the second conductor pattern of the second heat dissipation member. The electrodes on the top surface of the semiconductor element 3 may be connected to the lead 4 with bonding wires. The spacer 5 may be disposed on the top surface of a conductor pattern bonded to an electrode of the semiconductor element 3, such as the first conductor pattern 201 of the first heat dissipation member 2.
[0025] The lead 4 has a portion (inner lead) that is embedded in the sealing member 7 together with the semiconductor element 3 and the spacer 5, and a portion (outer lead) that extends outward from the sealing member 7. The outer lead of the lead 4 extends outward from a pair of end faces 713, 714 of the end faces (side faces) of the sealing member 7 that are parallel to the in-plane direction of the top surface of the semiconductor element 3. The outer lead of the lead 4 is bent at a predetermined bending position so that its extension direction changes to a direction toward the top surface 712 of the sealing member 7. The inner lead is connected to an upper surface electrode (e.g., a second main electrode) of the semiconductor element 3 via a bonding material such as solder.
[0026] The sealing member 7 is a resin composition containing a resin and an inorganic filler. Epoxy resins are often used, but base resins such as bisphenol A, cresol novolac, biphenyl, and alicyclic epoxies are often used in combination with hardeners such as acid anhydrides and phenolic resins. Multiple types of these may be used in combination. Silica and alumina are commonly used as inorganic fillers, with silica being the most commonly used due to availability and cost. Multiple types of these may also be used in combination. Additives such as phosphorus compounds and metal hydroxides may also be used to improve flame retardancy. The resin of the sealing member 7 is a thermosetting resin, which is heated and melted to fill a mold and form it. A melt viscosity of 4 Pa·s to 100 Pa·s is preferred, as this reduces defects such as voids.
[0027] In the semiconductor module 1 of this embodiment, the second conductor pattern 202 of the first heat dissipation member 2 exposed from the lower surface 711 of the sealing member 7 is connected to the cooler 8 via a thermally conductive member 9 such as thermal grease or thermal compound. The cooler 8 is not limited to a specific configuration or cooling method. Some of the heat generated by the semiconductor element 3 during operation of the semiconductor module 1 illustrated in FIG. 2 is conducted to the cooler 8 via the first heat dissipation member 2 and dissipated by heat exchange or the like in the cooler 8. Another part of the heat generated by the semiconductor element 3 is conducted through the leads 4 joined to the second main electrodes and dissipated from the outer leads of the leads 4. Still another part of the heat generated by the semiconductor element 3 is conducted to the second heat dissipation member 6 via the leads 4 and the spacer 5 and dissipated from the first conductor pattern 601 of the second heat dissipation member 6.
[0028] The semiconductor module 1 described above with reference to Figures 1 and 2 may be a module including a three-phase inverter circuit and a control circuit, which may be called an IPM (Intelligent Power Module). Figure 3 is a circuit diagram illustrating an example of the circuit configuration of the semiconductor module of Figure 1. Figure 3 illustrates only a portion of the three-phase inverter circuit and control circuit included in the semiconductor module 1.
[0029] The semiconductor module 1 includes a power conversion circuit that converts DC into three-phase AC (U-, V-, and W-phase) and outputs the converted AC. FIG. 3 illustrates a half-bridge inverter circuit that converts DC into U-phase AC. The illustrated half-bridge inverter circuit includes two IGBT elements 10A and 10B connected in series between a first lead 4W and a second lead 4S, and diode elements (FWD elements) 11A and 11B connected in anti-parallel to each of the two IGBT elements 10A and 10B. The first lead 4W is a P terminal connected to the positive electrode of a DC power supply, and the second lead 4S is an N terminal connected to the negative electrode of the DC power supply. Of the two IGBT elements, the collector electrode of the IGBT element 10A in the upper arm 12A is connected to the first lead 4W, and the emitter electrode of the IGBT element 10B in the lower arm 12B is connected to the second lead 4S. An emitter electrode of IGBT element 10A of upper arm 12A and a collector electrode of IGBT element 10B of lower arm 12B are connected to third lead 4V, which is a U-phase AC output terminal. A gate of IGBT element 10A of upper arm 12A is connected to first control circuit 13A, and a gate of IGBT element 10B of lower arm 12B is connected to second control circuit 13B. Leads 4A to 4H extending from end surface 713 of sealing member 7 to the negative side in the X direction are connected to first control circuit 13A, and leads 4I to 4P extending from end surface 713 to the negative side in the X direction are connected to second control circuit 13B.
[0030] The half-bridge inverter circuit that outputs DC as V-phase AC and the half-bridge inverter circuit that outputs DC as W-phase AC may each have a circuit configuration similar to the U-phase half-bridge inverter circuit illustrated in Fig. 3. First control circuit 13A controls the voltages applied to the gates of IGBT elements 10A in upper arms 12A of U-phase, V-phase, and W-phase based on drive power supply voltages and the like input from multiple leads 4A to 4H. Second control circuit 13B controls the voltages applied to the gates of IGBT elements 10B in lower arms 12B of U-phase, V-phase, and W-phase based on drive power supply voltages and the like input from multiple leads 4I to 4P.
[0031] The circuit configuration of the semiconductor module 1 described above with reference to FIG. 3 is merely an example of a power conversion circuit including semiconductor elements 3 sealed with a sealing member 7. The power conversion circuit may be configured such that the emitter of the IGBT element 10A in the upper arm 12A is connected to a first control circuit 13A, and the emitter of the IGBT element 10A in the lower arm 12B is connected to a second control circuit 13B, and the control circuit controls the voltage applied to the gate using the emitter potential as ground. In this type of power conversion circuit, the wiring connecting the emitter and the control circuit is called an auxiliary emitter wiring, a sense emitter wiring, or the like. The power conversion circuit including the semiconductor elements 3 may be a power conversion circuit with a different circuit configuration. The semiconductor module 1 may include a circuit separate from the power conversion circuit, or may include a part of the power conversion circuit, or may include only a circuit separate from the power conversion circuit.
[0032] Fig. 4 is a flow diagram illustrating an example of a method for manufacturing a semiconductor module according to the first embodiment. The manufacturing process of the semiconductor module 1 of this embodiment includes, for example, a preparation step S1, an arrangement step S2, a sealing step S3, and a removal step S4 shown in Fig. 4. The sealing step S3 includes a pin pressing step S301, an injection step S302, a temporary curing step S303, a pin removal step S304, and a full curing step S305.
[0033] The preparation step S1 is a step of preparing a member to be sealed with the sealing member 7. In the preparation step S1, a lead frame integrally holding the semiconductor element 3 and the leads 4, a spacer 5, and a second heat dissipation member 6 are arranged on the upper surface of the first heat dissipation member 2 and fixed in place. The first heat dissipation member 2 and the second heat dissipation member 6 are manufactured, for example, according to a well-known method for manufacturing a double-sided printed wiring board using the above-mentioned resin insulating sheet as the insulating substrate. The second heat dissipation member 6 is formed with the through hole 610 described above with reference to FIGS. 1 and 2. The through hole 610 in the second heat dissipation member 6 and the through hole 210 in the first heat dissipation member 2 (see FIG. 15), which will be described later, can be formed, for example, by mechanical processing such as press working or laser processing at predetermined positions in a laminate of the first conductor pattern, the insulating substrate, and the second conductor pattern. In the preparation process S1, for example, a semiconductor element 3, a lead frame (leads 4), a spacer 5, and a second heat dissipation member 6 are stacked on the upper surface of the first conductor pattern 201 of the first heat dissipation member 2 via a bonding material such as cream solder or plate solder, and then the bonding material is melted and hardened using a reflow device to integrate them.
[0034] The placement step S2 is a step of placing the member prepared in the preparation step S1 in a cavity of a molding die and clamping the die. The molding die includes a lower die in which a recess having a bottom surface is formed with which the lower surface of the first heat dissipation member 2 comes into contact, and an upper die in which a recess having a bottom surface is formed with which the upper surface of the second heat dissipation member 6 comes into contact. As will be described later with reference to Figures 5 and 6, the upper die has a through hole formed at a position corresponding to the through hole 610 of the second heat dissipation member 6, through which a pin is inserted to press the first heat dissipation member 2 against the bottom surface of the lower die.
[0035] The sealing step S3 is a step of injecting molten insulating resin (sealing resin) as the sealing member 7 into the cavity of the clamped molding die to seal the semiconductor element 3 and the like, and includes a pin pressing step S301, an injection step S302, a temporary curing step S303, a pin removal step S304, and a full curing step S305. The pin pressing step S301 is a step of pressing the first heat dissipation member 2 against the bottom surface of the lower mold and tightly adhering the first heat dissipation member 2 by using pins inserted through the through holes of the upper mold and the through holes 610 of the second heat dissipation member 6. The injection step S302 is a step of injecting the sealing resin into the cavity of the molding die while the first heat dissipation member 2 is pressed against the bottom surface of the lower mold by the pins. The injected sealing resin may be, for example, an uncured thermosetting resin, such as an uncured epoxy resin, to which the inorganic filler or other additives described above have been added.
[0036] The pre-curing step S303 is a step for slightly promoting the curing reaction of the uncured encapsulating resin injected into the cavity of the mold. In the pre-curing step S303, the curing reaction is promoted to a degree of curing (sometimes referred to as a degree of cure or reaction rate) that ensures close contact between the lower surface of the first heat dissipation member 2 and the bottom surface of the lower mold, enough so that the encapsulating resin will not get between the first heat dissipation member 2 and the lower mold when the pin is separated from the first heat dissipation member 2 in the subsequent pin removal step S304, and that fills the space (void) created in the cavity when the pin is removed. When an epoxy resin is used as the encapsulating resin, the curing conditions (temperature and time) in the pre-curing step S303 can be, for example, 180°C and approximately 90 seconds.
[0037] The pin removal step S304 is a step of removing the pin that is pressing the first heat dissipation member 2 against the lower mold. In the pin removal step S304, for example, the pin is removed so that the tip portion of the pin is held in a state where it protrudes into the cavity by a predetermined protrusion amount (see FIGS. 7 and 9) from the bottom surface of the upper mold that contacts the second heat dissipation member 6. The protrusion amount of the pin can be, for example, about 20 μm to 100 μm, and more preferably about 20 μm to 50 μm.
[0038] The final curing step S305 is a step of curing the sealing resin in a partially cured state that fills the cavity of the molding die after the pins have been pulled out to a predetermined position. When an epoxy resin is used as the sealing resin, the curing conditions in the final curing step S305 can be, for example, 180°C and approximately 2 hours.
[0039] When the sealing resin filling the cavity of the molding die is cured in the main curing step S305, the sealing step S3 is completed, followed by the removal step S4, which involves, for example, cooling and demolding the molding die and sealing resin, as well as subsequent trimming of the lead frame and bending of the leads 4.
[0040] Fig. 5 is a cross-sectional view illustrating the state of the molding die at the start of the sealing step. Fig. 6 is a cross-sectional view illustrating the state of the molding die during the injection step and the temporary curing step. Fig. 7 is a cross-sectional view illustrating the state of the molding die after the pin removal step. Figs. 5 to 7 show examples of hypothetical cross-sectional configurations similar to the cross-sectional view of Fig. 2.
[0041] At the start of the encapsulation step S3, the leads 4 are part of the lead frame LF, and the outer leads are not bent as shown in FIG. 5. The molding die 15 has a lower die 1501 and an upper die 1502, and by clamping these together, a cavity (space) 1510 corresponding to the outer shape of the encapsulation member 7 is formed. The lower die 1501 has a recess formed therein that defines a portion of the encapsulation member 7 below the lead frame LF, and a bottom surface 1511 of the recess comes into contact with the lower surface of the second conductor pattern 202 of the first heat dissipation member 2 when the encapsulation member 7 is clamped. The upper die 1502 has a recess formed therein that defines a portion of the encapsulation member 7 above the lead frame LF, and a bottom surface 1512 of the recess comes into contact with the upper surface of the first conductor pattern 601 of the second heat dissipation member 6 when the encapsulation member 7 is clamped. Furthermore, the upper mold 1502 is formed with through holes 1520, one of whose open ends is a bottom surface 1512 of the recess, through which the pins 16 can be inserted in the through holes 610 of the second heat dissipation member 6. In the following description, the bottom surface 1511 of the recess of the lower mold 1501 will be referred to as the "lower bottom surface 1511," and the bottom surface 1512 of the recess of the upper mold 1502 will be referred to as the "upper bottom surface 1512."
[0042] 5, some of the injected sealing resin may get into the gap between the lower bottom surface 1511 of the lower mold 1501 and the lower surface of the first heat dissipation member 2, and may remain as burrs after the sealing process. The burrs remaining after the sealing process may cause poor connection between the second conductor pattern 202 of the first heat dissipation member 2 and the cooler 8, for example. Furthermore, adding a process for removing the burrs remaining after the sealing process increases the manufacturing cost of the semiconductor module.
[0043] 6 , in the manufacturing method of the semiconductor module 1 according to the present embodiment, the pins 16 are inserted through the through holes 1520 of the upper die 1502 and the through holes 610 of the second heat dissipation member 6 and advanced into the cavities 1510 of the molding die 15, and the second conductor pattern 202 of the first heat dissipation member 2 is pressed against the lower bottom surface 1511 of the lower die 1501, and then the sealing resin 7′ is injected into the cavity 1510. At this time, the pins 16 are brought into contact with the upper surface of the insulating substrate 200 of the first heat dissipation member 2 at positions that correspond to corners of the upper surface of the insulating substrate 200 in a plan view. This makes it difficult for the end portions of the lower surface of the second conductor pattern 202 to separate from the lower bottom surface 1511 of the lower die 1501. This prevents a portion of the sealing resin 7' injected into the cavity 1510 of the molding die 15 from getting between the lower bottom surface 1511 of the lower die 1501 and the lower surface of the second conductor pattern 202 of the first heat dissipation member 2 (i.e., preventing burrs from being generated after the sealing process).
[0044] Furthermore, in the manufacturing method of the semiconductor module 1 according to the present embodiment, pins are inserted into the through holes 610 formed in the second heat dissipation member 6, which makes it possible to easily increase the exposed area of the second heat dissipation member 6 (the upper surface of the first conductor pattern 601) on the upper surface 712 of the sealing member 7. Therefore, compared to the semiconductor device of Patent Document 1, the difference in heat dissipation performance from the lower surface 711 and the upper surface 712 of the sealing member 7 is smaller, and the heat generated by the semiconductor element 3 during operation can be dissipated more effectively.
[0045] Furthermore, in the manufacturing method of the semiconductor module 1 according to this embodiment, after the curing reaction of the injected sealing resin 7' has progressed slightly, the pins 16 that have been pressing the first heat dissipation member 2 against the lower bottom surface 1511 of the lower mold 1501 are pulled out, as illustrated in FIG. 7 . Because the curing reaction of the sealing resin 7' in the cavity has progressed somewhat, it is possible to prevent the sealing resin 7' from getting between the lower surface of the first heat dissipation member 2 and the lower bottom surface 1511 of the lower mold 1501 when the pins 16 are pulled out. Furthermore, because the pins 16 are pulled out before the sealing resin 7' in the cavity has completely cured, the space (void) created when the pins 16 are pulled out is filled with the sealing resin 7', as illustrated in FIG. 7 . This eliminates the need for a step of injecting additional insulating resin (sealing resin) into the space created when the pins 16 are pulled out, thereby preventing an increase in manufacturing costs.
[0046] Fig. 8 is a partial cross-sectional view illustrating an example of the shape of the tip of the pin and the shape of the through hole of the second heat dissipation member. Fig. 9 is a partial cross-sectional view illustrating an example of a recess formed in the through hole of the second heat dissipation member by this curing process. Figs. 8 and 9 show an enlarged view of the through hole 610A of the four through holes 610A to 610D of the second heat dissipation member 6 illustrated in Fig. 1. The other through holes 610B to 610D may be similar to the through hole 610A illustrated in Figs. 8 and 9.
[0047] If the tip portion of the pin 16 (the portion in contact with the first heat dissipation member 2) has a flat surface 1610 that is approximately parallel to the upper surface of the insulating substrate 200 of the first heat dissipation member 2 as illustrated in Figures 5 to 7, the pressing load is dispersed within the contact surface when the pin 16 is pressed against the upper surface of the insulating substrate 200 of the first heat dissipation member 2, making it less likely to be dented or scratched. The tip portion of the pin 16 may be tapered so that it tapers toward the flat surface 1610, as illustrated in Figure 8. Tapering the tip portion of the pin 16 makes it easier to insert the pin 16 into the through hole 610 of the second heat dissipation member 6. For example, if a misalignment occurs between the through hole 1520 of the upper mold 1502 and the through hole 610 of the second heat dissipation member 6 in the placement process S2, the inclined surface at the tip of the pin 16 will come into contact with the opening end of the through hole 610 of the second heat dissipation member 6 in the next pin pressing process S301, thereby guiding the pin 16 into the through hole 610 of the second heat dissipation member 6.
[0048] Furthermore, when the tip of the pin 16 is tapered, burrs are less likely to form at the corners where the flat surface 1610 and the inclined surface connect and at the corners where the inclined surface and the side surface connect, compared to the corners where the flat surface 1610 and the side surface connect in a cylindrical pin 16. Therefore, in the pin pressing step S301 and the pin pulling step S304, it is possible to prevent burrs at the tip of the pin 16 from scratching the wall surface of the through hole 610 in the second heat dissipation member 6 or the wall surface of the through hole 1520 in the upper mold 1502. The angle θ1 of the inclined surface is not limited to a specific angle, but is preferably within a range of 30 degrees to 60 degrees, for example. Furthermore, instead of tapering the tip of the pin 16, the outer periphery of the flat surface 1610 may be chamfered.
[0049] The relationship among the diameter D1 of the pin 16 illustrated in FIG. 8, the diameter D2 of the through-hole 1520 of the upper mold 1502, and the diameter D3 of the through-hole 610 of the second heat dissipation member 6 is D1 < D2 < D3. The diameter D1 of the pin 16 is, for example, 0.6 mm to 2 mm. The diameter D2 of the through-hole 1520 of the upper mold 1502 is preferably made to have a small difference from the diameter D1 of the pin 16 within a range that does not inhibit the vertical movement of the pin 16 so that the sealing resin 7' does not flow into the space between the pin 16 and the through-hole 1520 of the upper mold 1502. On the other hand, the diameter D3 of the through-hole 610 of the second heat dissipation member 6 is preferably, for example, about 0.2 mm to 1 mm larger than the diameter D1 of the pin 16 to facilitate the insertion of the pin 16. Note that the relationship among the diameter D1 of the pin 16, the diameter D2 of the through-hole 1520 of the upper mold 1502, and the diameter D3 of the through-hole 610 of the second heat dissipation member 6 is not limited to the relationship D1 < D2 < D3. For example, D2 = D3, D2 ≈ D3, or D2 > D3 may be acceptable.
[0050] Also, the opening end on the lower surface side of the insulating substrate 600 in the through-hole 610 of the second heat dissipation member 6 may be tapered so that the opening diameter tapers toward the upper surface as illustrated in FIG. 8. By tapering, when the pin 16 is pulled out in the pin extraction step S304, the sealing resin 7' is more likely to enter the through-hole 610 of the second heat dissipation member 6, preventing the occurrence of voids due to poor inflow of the sealing resin 7' into the through-hole 610. Also, by tapering, the stress at the interface between the second heat dissipation member 6 (insulating substrate 600) and the sealing member 7 at the lower end portion of the through-hole 610 can be relaxed (reduced). The angle θ2 of the inclined surface when tapering the through-hole 610 of the second heat dissipation member 6 is not limited to a specific angle, but is preferably within a range of, for example, 30 degrees to 60 degrees. Also, the opening end on the lower surface side of the through-hole 610 of the second heat dissipation member 6 may have a chamfered shape instead of being tapered.
[0051] The through hole 610 is not limited to a location where only the first conductor pattern 601 and the insulating substrate 600 are stacked, as illustrated in FIG. 8 , but may also be provided in a location where the first conductor pattern 601, the insulating substrate 600, and the second conductor pattern 602 are stacked. Furthermore, the inner wall surface of the through hole 610, particularly the inner wall surface of the through hole of the first conductor pattern 601, may be roughened. Etching, shot peening, or the like may be used for roughening. In particular, a surface roughness Ra (center line average roughness) in the range of 0.1 μm to 5 μm improves adhesion between the inner wall surface of the through hole of the first conductor pattern 601 and the sealing member 7, thereby reducing the penetration of moisture and corrosive gases from the outside. The surface roughness can be measured using a stylus roughness tester or an optical roughness tester.
[0052] Furthermore, if the pins 16 are pulled out to a position in the pin pulling out step S304 where the flat surfaces 1610 of the pins 16 are recessed from the upper bottom surface 1512 of the upper mold 1502, part of the sealing resin 7' will flow into the through holes 1520 of the upper mold 1502, causing portions of the sealing member 7 to protrude beyond the upper surface of the second heat dissipation member 6. In this case, for example, a step of removing the portions protruding from the upper surface of the second heat dissipation member 6 will be added, which will increase the manufacturing cost of the semiconductor module. For this reason, the main curing step S305 is preferably performed in a state in which the flat surfaces 1610 of the pins 16 protrude further into the cavity than the upper bottom surface 1512 of the upper mold 1502, as described above with reference to FIG. 7 . The protrusion amount H of the pin 16 illustrated in FIG. 9 (i.e., the distance from the upper bottom surface 1512 of the upper mold 1502 to the flat surface 1610 of the pin 16) is not limited to a specific protrusion amount. However, if the protrusion amount H of the pin 16 is too large, foreign matter may get mixed in the recess 720 formed in the through-hole 610 of the second heat dissipation member 6, or other components may get caught on the semiconductor module 1 during handling, which may damage the semiconductor module 1. Furthermore, moisture or corrosive gas may enter from the outside through the through-hole, particularly through the interface between the first conductive pattern 601 and the sealing member 7. For this reason, the protrusion amount H of the pin 16 (the recess amount from the outer surface of the module) is preferably, for example, within a range of 20 μm to 100 μm, and more preferably within a range of 20 μm to 50 μm. In particular, it is preferable that the protrusion amount H be less than 50% of the thickness of the first conductive pattern 601 from the viewpoint of corrosion resistance. When the tip of the pin 16 is tapered, the recess 720 may have a tapered shape corresponding to the shape of the tip of the pin 16. The shape and protrusion amount H of the through hole 610 are the same as those of the through hole 210 of the first heat dissipation member 2 in the second embodiment described later.
[0053] 10A and 10B are plan views illustrating modified examples of the planar shape of the second heat dissipation member. Each of FIGS. 10A and 10B shows only the area corresponding to the portion of the semiconductor module 1 illustrated in FIG. 1 where the second heat dissipation member 6 is disposed and its surroundings. In FIGS. 10A and 10B, the broken line representing the outline of the first heat dissipation member 2 and the long sides 632, 634 and the short sides 631, 633 of the solid line representing the outline of the second heat dissipation member 6 may overlap in part or in whole. A portion of the solid line representing the outline of the second heat dissipation member 6 may pass outside the area enclosed by the broken line representing the outline of the first heat dissipation member 2.
[0054] FIG. 10A shows a first modified example in which the planar shape of the insulating substrate 600 and the first conductor pattern 601 of the second heat dissipation member 6 is an octagonal shape with the corners of a rectangle cut off at an angle. This planar shape may be referred to as a shape in which tapered notches 620 (620A to 620D) are formed at the corners of a rectangle defined by lines overlapping with long sides 632 and 634 and short sides 631 and 632. When the second heat dissipation member 6 has this planar shape, the pins 16 can be pressed against portions of the first heat dissipation member 2 closer to the corners thereof while maintaining a large area of the region of the first heat dissipation member 2 that overlaps with the second heat dissipation member 6 in a planar view of the upper surface 712 of the sealing member 7. In FIG. 10A, the position of the pins 16 pressed against the first heat dissipation member 2 is represented by the position of recesses 720 formed on the upper surface 712 of the sealing member 7.
[0055] 10A , the shape of the notch 620 made in the corner of the rectangle in the planar shape of the second heat dissipation member 6 in a plan view is not limited to the shape represented by sides that are oblique to the long sides 632 and 634 and the short sides 631 and 633. The planar shape of the notch 620 made in the corner may be, for example, a shape represented by a combination of sides parallel to the long sides 632 and 634 and sides parallel to the short sides 631 and 633, or may be a shape that includes a circular arc.
[0056] 10B shows a second modified example in which the planar shape of the insulating substrate 600 and the first conductor pattern 601 of the second heat dissipation member 6 is a rectangle with notches 621 formed on the long sides 632 and 634. When the second heat dissipation member 6 is formed in this planar shape, the pins 16 can be pressed against portions closer to the edges of the first heat dissipation member 2 (edges corresponding to the long sides 632 and 634 of the second heat dissipation member 6) while maintaining a large area of the region of the first heat dissipation member 2 that overlaps with the second heat dissipation member 6 in a plan view of the upper surface 712 of the sealing member 7. In FIG. 10B, the position of the pins 16 pressed against the first heat dissipation member 2 is represented by the position of recesses 720 formed on the upper surface 712 of the sealing member 7.
[0057] The shape of the notches 621 formed in the long sides 632 and 634 of the rectangle in the planar shape of the second heat dissipation member 6 in a plan view is not limited to the U-shape as illustrated in Fig. 10B. The planar shape of the notches 621 may be, for example, a shape represented by a combination of a side parallel to the long sides 632 and 634 and a side parallel to the short sides 631 and 633, or may be an arc or a shape including an arc other than a U-shape. Furthermore, the pins 16 may be pressed against portions of the first heat dissipation member 2 near the edges corresponding to the short sides 631 and 633 of the second heat dissipation member 6, in which case the notches 621 are formed in the short sides 631 and 633 of the rectangle.
[0058] FIG. 11 is a plan view illustrating a modified arrangement of pins pressed against the first heat dissipation member. FIG. 11 shows only the area corresponding to the portion where the second heat dissipation member 6 is arranged and its surroundings in the semiconductor module 1 illustrated in FIG. 1. In FIG. 11, the dashed line representing the outline of the first heat dissipation member 2 and the long sides 632, 634 and the short sides 631, 633 of the solid line representing the outline of the second heat dissipation member 6 may overlap in part or in whole. A portion of the solid line representing the outline of the second heat dissipation member 6 may pass outside the area surrounded by the dashed line representing the outline of the first heat dissipation member 2. In FIG. 11, the arrangement of the pins 16 is represented by the arrangement of recesses 720 formed on the upper surface 712 of the sealing member 7.
[0059] As illustrated in FIG. 11 , the pins 16 used in the sealing step S3 may be arranged so as to be pressed against the center of the portion of the upper surface 712 of the sealing member 7 along each of the sides 631 to 634 of the first heat dissipation member 2 in the direction of extension of the sides. In this example, the planar shape of the second heat dissipation member 6 is not limited to the shape illustrated in FIG. 11 in which U-shaped notches 621 are formed in each of the sides 631 to 634. The shape of the notches 621 formed in each side may be a shape other than U-shaped. Furthermore, the planar shape of the second heat dissipation member 6 may have through holes 610 through which the pins 16 are inserted, as illustrated in FIG. 1 . Furthermore, the arrangement of the pins 16 is not limited to the above-described arrangement. For example, any number of pins 16 may be arranged at any position within a region along the outer periphery of the first heat dissipation member 2 in a planar view that does not overlap with the leads 4 (inner leads) in the sealing member 7.
[0060] The planar shape of the second heat dissipation member 6 that can be employed in the semiconductor module 1 according to this embodiment is not limited to the shape described above. The planar shape of the second heat dissipation member 6 can be changed as appropriate depending on the position of the pin 16 that is pressed against the first heat dissipation member 2. The planar shape of the second heat dissipation member 6 can be a shape that includes a part of the second heat dissipation member 6 closer to the edge of the first heat dissipation member 2 than a position represented by a line that passes through a point in the recess 720 that can indicate the position of the pin 16 in a plan view of the upper surface 712 of the sealing member 7 farthest from the edge of the first heat dissipation member 2 and extends in a direction parallel to that edge.
[0061] Fig. 12 is a diagram illustrating features of the planar shape of the second heat dissipation member that can be employed in the semiconductor module according to the first embodiment. Fig. 12 shows only the area where through-hole 610D of second heat dissipation member 6 is formed and the area corresponding to the surrounding area in semiconductor module 1 illustrated in Fig. 1. The other through-holes 610A to 610C may be similar to the area of through-hole 610D illustrated in Fig. 12.
[0062] In the semiconductor module 1 illustrated in FIG. 12, recesses 720D indicating the positions of the pins 16 used in the sealing step S3 in the sealing member 7 are located within the through-holes 610D of the second heat dissipation member 6. In FIG. 12, the circle representing the recesses 720D may overlap (may coincide with) the circle representing the through-holes 610D. Line L1, which passes through point P1 of the recesses 720D that is the farthest from the long side 234 of the first heat dissipation member 2 and is parallel to the long side 234, and line L2, which passes through point P2 that is the farthest from the short side 233 and is parallel to the short side 233, both pass within the second heat dissipation member 6. Furthermore, even in the case where a tapered notch 620D indicated by the two-dot chain line in FIG. 12 is formed, as in the second heat dissipation member 6 illustrated in FIG. 10A, line L1 and line L2 also pass within the second heat dissipation member 6. Furthermore, although detailed explanation will be omitted, in the case of the planar shape of the second heat dissipation member 6 described above with reference to Figures 10B and 11, the line L1 that passes through the point P1 of the recess 720D that is farthest from the long side 234 of the first heat dissipation member 2 and is parallel to the long side, and the line L2 that passes through the point P2 that is farthest from the short side 233 and is parallel to the short side 233 both pass within the second heat dissipation member 6.
[0063] In the semiconductor device of Patent Document 1, for example, the long side of the heat dissipation member corresponding to the second heat dissipation member 6 passes on the opposite side of the long side 234 of the first heat dissipation member 2 with respect to the line L1 illustrated in FIG. 12 as the boundary, resulting in a difference in exposed area between the two heat dissipation members. In contrast, in the semiconductor module 1 of the present embodiment having the characteristics described above with reference to FIG. 12, the exposed area of the second heat dissipation member 6 on the upper surface 712 of the sealing member 7 can be made as large as the exposed area of the first heat dissipation member 2 on the lower surface 711. Therefore, compared to the semiconductor device of Patent Document 1, the difference in heat dissipation performance from the lower surface 711 and the upper surface 712 of the sealing member 7 is smaller, and heat generated by the semiconductor element 3 during operation can be dissipated more effectively.
[0064] The pins 16 used in the sealing step S3 of the semiconductor module according to this embodiment are not limited to those in a cylindrical shape, but may also be in a polygonal prism shape.
[0065] Furthermore, the first heat dissipation member 2 and the second heat dissipation member 6 in the semiconductor module 1 according to this embodiment are not limited to the configurations described above. For example, the insulating substrate 200 of the first heat dissipation member 2 and the insulating substrate 600 of the second heat dissipation member 6 are not limited to resin insulating sheets and may be ceramic substrates. The ceramic substrate may be formed of a ceramic material such as aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), or a composite material of aluminum oxide (Al2O3) and zirconium oxide (ZrO2). A heat dissipation member using a ceramic substrate as the insulating substrate is sometimes called a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazing) substrate. The insulating substrate 200 of the first heat dissipation member 2 and the insulating substrate 600 of the second heat dissipation member 6 may be a substrate in which a base material such as glass fiber is impregnated with insulating resin, or a substrate in which the surface of a flat metal core is coated with insulating resin. Furthermore, the combination of materials of the insulating substrate 600, the first conductor pattern 601, and the second conductor pattern 602 of the second heat dissipation member 6 may be the same as or different from the combination of materials of the insulating substrate 200, the first conductor pattern 201, and the second conductor pattern 202 of the first heat dissipation member 2. For example, the second conductor pattern 202 may be omitted from the first heat dissipation member 2. For example, the second conductor pattern 602 may be omitted from the second heat dissipation member 6.
[0066] FIG. 13 is a partial cross-sectional view illustrating a modified example of the method for pressing the heat dissipation member against the mold.
[0067] The pin 16 illustrated in FIG. 6 is in contact with the upper surface of the insulating substrate 200 of the first heat dissipation member 2. However, the first conductor pattern 201 or another conductor pattern may be arranged at the position on the upper surface of the insulating substrate 200 of the first heat dissipation member 2 where the pin 16 is in contact. That is, in the pin pressing step S301, as illustrated in FIG. 13, the pin 16 may be pressed against the first conductor pattern 201 arranged on the upper surface of the insulating substrate 200 of the first heat dissipation member 2. In particular, when the insulating substrate 200 is a ceramic substrate, pressing the pin 16 against the ceramic substrate may cause the ceramic substrate to crack. Therefore, it is preferable to press the pin 16 against the conductor pattern arranged on the upper surface of the insulating substrate 200. The conductor pattern other than the first conductor pattern 201 against which the pin 16 is pressed may be a part of a conductor pattern used as circuit wiring, or may be formed separately from the conductor pattern used as circuit wiring.
[0068] The first heat dissipation member 2 illustrated in FIG. 6 and other figures may include an insulating substrate 200 made of a sheet-like insulating resin, and is manufactured by a well-known method for manufacturing a printed wiring board. This type of first heat dissipation member 2 may be divided (segmented) during the manufacturing process using a method sometimes called a V-cut method, in which a V-shaped groove is formed on the front and back surfaces of the member and then divided. In a first heat dissipation member 2 manufactured using the V-cut method, as illustrated in FIG. 6 and other figures, the angle formed between the in-plane end (side surface) of the upper surface of the insulating substrate 200 and the lower bottom surface 1511 of the lower mold 1501 is acute. When such a first heat dissipation member 2 is used, the sealing resin 7′ injected into the cavity 1510 is less likely to enter between the lower surface of the second conductive pattern 202 and the lower bottom surface 1511 of the lower mold 1501, compared to, for example, a case in which the angle formed between the side surface of the second conductive pattern 202 and the lower bottom surface 1511 of the lower mold 1501 is 90 degrees, as illustrated in FIG. 13. Furthermore, in the semiconductor module 1 obtained through the sealing process S3, if the angle formed between the side surface of the second conductor pattern 202 and the lower surface 711 of the sealing member 7 is an acute angle, the portion of the sealing member 7 along the side surface of the second conductor pattern 202 acts as a wedge, making it difficult for the first heat dissipation member 2 to fall off from the sealing member 7.
[0069] [Second embodiment] FIG. 14 is a plan view of a semiconductor module according to a second embodiment. FIG. 15 is a cross-sectional view illustrating an example of the configuration inside the sealing member of the semiconductor module of FIG. 14. The cross-sectional view of FIG. 15 illustrates an example of the cross-sectional configuration of the semiconductor module 1 taken along a virtual line B-B' connecting a dashed-dotted line passing through one lead 4A located on the negative side of the X-direction in the semiconductor module 1 of FIG. 14 and another dashed-dotted line passing through another lead 4W located on the positive side of the X-direction. In FIG. 14, the dashed line representing the outline of the first heat dissipation member 2 and the solid line representing the outline of the second heat dissipation member 6 may partially or entirely overlap. The solid line representing the outline of the second heat dissipation member 6 may partially or entirely pass outside the area surrounded by the dashed line representing the outline of the first heat dissipation member 2. In addition, in FIGS. 14 and 15, some of the reference numerals corresponding to the components of the semiconductor module 1 shown in FIGS. 1 and 2 are omitted.
[0070] Similar to the semiconductor module 1 according to the first embodiment, the semiconductor module 1 according to the present embodiment includes a first heat dissipation member 2, a semiconductor element 3, leads 4 (4A to 4X), a spacer 5, a second heat dissipation member 6, and a sealing member 7. The semiconductor module 1 according to the present embodiment differs from the semiconductor module 1 according to the first embodiment in that through holes 210 (210A to 210D) that penetrate the insulating substrate 200 and the second conductor pattern 202 are formed at the end of the first heat dissipation member 2 in a plan view of an upper surface 712 of the sealing member 7, at positions that do not overlap with the through holes 610 (610A to 610D) of the second heat dissipation member 6. The through hole 210 of the first heat dissipation member 2 is filled with the sealing member 7 so as to form a recess 740 (740A, 740B, etc. in Figure 15) that is recessed from the lower surface toward the upper surface of the second conductor pattern 202, similar to the sealing member 7 in the through hole 610 of the second heat dissipation member 6.
[0071] The manufacturing process of the semiconductor module 1 according to this embodiment includes the preparation step S1, arrangement step S2, sealing step S3, and removal step S4 described above with reference to Figure 4. The sealing step S3 includes a pin pressing step S301, an injection step S302, a temporary curing step S303, a pin removal step S304, and a full curing step S305. The semiconductor module 1 according to this embodiment is manufactured according to the procedure described in the first embodiment. However, the configuration of the molding die 15 used in the sealing step S3 is different from the configuration described in the first embodiment.
[0072] Fig. 16 is a cross-sectional view illustrating an example of the configuration of a molding die used in manufacturing a semiconductor module according to the second embodiment. Fig. 16 shows a hypothetical cross-sectional configuration example similar to the cross-sectional view of Fig. 15. In Fig. 16, some of the reference numerals corresponding to the same components as those in the molding die 15 shown in Figs. 5 and 6 are omitted.
[0073] The configuration of the upper die 1502 of the molding die 15 used in the sealing step S3 for manufacturing the semiconductor module 1 according to this embodiment is as described in the first embodiment, and is formed with through holes 1520 through which pins 16 for pressing the first heat dissipation member 2 against the lower bottom surface 1511 of the lower die 1501 are inserted. Furthermore, the lower die 1501 of the molding die 15 according to this embodiment is formed with through holes 1521 through which pins 17 for pressing the second heat dissipation member 6 against the upper bottom surface 1512 of the upper die 1502 are inserted. That is, the injection step S302 in the sealing step S3 according to this embodiment is performed in a state in which the first pins 16 press the first heat dissipation member 2 against the lower bottom surface 1511 of the lower die 1501 and the second pins 17 press the second heat dissipation member 6 against the upper bottom surface 1512 of the upper die 1502. Thereafter, the provisional curing step S303, the pin removal step S304, and the main curing step S305 are performed in the same order as described in the first embodiment. In the pin removal step S304, the first pins 16 that have been pressing the first heat dissipation member 2 against the lower bottom surface 1511 of the lower mold 1501 and the second pins 17 that have been pressing the second heat dissipation member 6 against the upper bottom surface 1512 of the upper mold 1502 are removed to positions where they protrude into the cavity by a protrusion amount H (see FIG. 9).
[0074] In the semiconductor module 1 of this embodiment, the planar shape of the first heat dissipation member 2 and the planar shape of the second heat dissipation member 6 in the plan view of the upper surface 712 of the sealing member 7 can be made to have the characteristics described above with reference to Fig. 12. This prevents burrs from being generated on both the lower surface 711 of the sealing member 7 where the first heat dissipation member 2 is exposed and the upper surface 712 of the sealing member 7 where the second heat dissipation member 6 is exposed, due to the sealing resin 7' flowing between the heat dissipation member and the bottom surface of the molding die 15 that comes into contact with the heat dissipation member.
[0075] In the semiconductor module 1 according to this embodiment, the planar shape of the second heat dissipation member 6 in the plan view of the upper surface 712 of the sealing member 7 can be selected from various shapes having the characteristics described above with reference to FIG. 12 , including the shape exemplified in the first embodiment. The arrangement of the pins 16 and 17 in the molding die 15 used to manufacture the semiconductor module 1 according to this embodiment can be selected from various arrangements, including the arrangement exemplified in the first embodiment. The arrangement of the first pin 16 and the second pin 17 is not limited to the arrangement represented by the through holes 610 and 210 exemplified in FIG. 14 . For example, the arrangement of the first pin 16 and the second pin 17 at one corner may be an arrangement in which these two pins are aligned along a long side of the second heat dissipation member 6. Furthermore, for example, the first pin 16 may be arranged to be pressed against a corner of the first heat dissipation member 6, and the second pin 17 may be arranged to be pressed against the center of each side of the second heat dissipation member 6 in the extension direction of the side, or vice versa. Although not described in detail, other technical features described in the first embodiment may also be applied to the semiconductor module 1 according to this embodiment.
[0076] The semiconductor module 1 according to the above-described embodiment can be applied to industrial power conversion devices, such as inverter devices that drive motors in elevators, escalators, building air conditioning systems, etc. The use of the semiconductor module 1 is not limited to a specific application. For example, the semiconductor module 1 can also be applied to power conversion devices, such as inverter devices that drive motors in vehicles such as four-wheeled automobiles and motorcycles, and railroad cars.
[0077] The switching element in the semiconductor element 3 in the semiconductor module 1 applied to the power conversion device may be configured as a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a BJT (Bipolar Junction Transistor), or the like. When the switching element is a MOSFET, the main electrode on the lower surface of the semiconductor element 3 may be called a drain electrode, and the main electrode on the upper surface may be called a source electrode. The diode element in the semiconductor element 3 may be configured as, for example, an SBD (Schottky Barrier Diode), a JBS (Junction Barrier Schottky) diode, an MPS (Merged PN Schottky) diode, or a PN diode. The control electrode provided on the upper surface of the semiconductor element 3 may include a gate electrode and an auxiliary electrode. For example, the auxiliary electrode may be an auxiliary emitter electrode or auxiliary source electrode electrically connected to the upper main electrode and serving as a reference potential for the gate potential. The auxiliary electrode may be a temperature sensing electrode electrically connected to a temperature sensing unit that may be included in an inverter device or the like equipped with the semiconductor module 1 and that measures the temperature of the semiconductor element 3.
[0078] The semiconductor element 3 of the semiconductor module 1 is not limited to the above-mentioned IGBT element and FWD element formed on a single semiconductor substrate, but may also include a semiconductor element on which an IGBT element is formed and a semiconductor element on which a diode element is formed.
[0079] Furthermore, as described above, the circuit formed in the semiconductor module 1 is not limited to a power conversion circuit that converts DC to AC, but may be or include other circuits.
[0080] Furthermore, in the above-described method for manufacturing the semiconductor module 1, the pins 16 and 17 are used to be inserted into the through-holes 1520 of the upper mold 1502 and the through-holes 1521 of the lower mold 1501 and advance into the cavity. However, this is not limiting, and the pins 16 and 17 may be fixed to the upper mold 1502 and the lower mold 1501, respectively. When the pins are fixed to the upper mold and the lower mold, for example, after the semiconductor element 3 is sealed using such a molding die, additional insulating resin (sealing) is injected into spaces corresponding to the shapes of the pins remaining in the sealing member 7 to seal the spaces. The recesses 720 in the upper surface 712 of the sealing member 7, which are traces of the pins 16 being pressed against the first heat dissipation member 2 and the sealing resin 7′ being injected, may include a portion that overlaps with the first heat dissipation member 2 and a portion that does not overlap with the first heat dissipation member 2 in a plan view of the upper surface 712. Similarly, the recess 740 on the lower surface 711 of the sealing member 7, which is the trace left by pressing the pin 17 against the second heat dissipation member 6 and injecting the sealing resin 7', may include a portion that overlaps with the second heat dissipation member 6 when viewed in plan on the upper surface 712, and a portion that does not overlap.
[0081] The features of the above-described embodiment will be summarized below. The semiconductor module according to the above-described embodiment comprises a sealing member that seals a semiconductor element, a first heat dissipation member exposed from a first surface of the sealing member, and a second heat dissipation member exposed from a second surface of the sealing member opposite the first surface, wherein a recess is formed on the second surface of the sealing member, the recess being located at an end of the first heat dissipation member in a planar view of the second surface and overlapping with the first heat dissipation member, and the planar shape of the second heat dissipation member in a planar view of the second surface is such that a line parallel to the side of the first heat dissipation member that passes through a point of the recess farthest from the side of the first heat dissipation member that is closest to the recess passes through the second heat dissipation member.
[0082] In the semiconductor module according to the above embodiment, the recess is located at a corner of the first heat dissipation member in a plan view of the second surface of the sealing member.
[0083] In the semiconductor module according to the above embodiment, the recess is located at the center of a portion of the second surface of the sealing member along a side of the first heat dissipation member in a plan view, in the direction in which the side extends.
[0084] In the semiconductor module according to the above embodiment, the second heat dissipation member has a through hole formed therein that surrounds the recess in a plan view of the second surface of the sealing member.
[0085] In the semiconductor module according to the above embodiment, the planar shape of the second heat dissipation member is a rectangular shape with notches formed at the corners.
[0086] In the semiconductor module according to the above embodiment, the planar shape of the second heat dissipation member is a rectangular shape with notches on the sides.
[0087] In the semiconductor module according to the above embodiment, a second recess is formed on the first surface of the sealing member, the second recess being recessed toward the second surface from the first surface and overlapping with the second heat dissipation member at a position that is an end of the second heat dissipation member in a planar view of the first surface and does not overlap with the recess on the second surface of the sealing member, and the planar shape of the first heat dissipation member in a planar view of the first surface is such that a line parallel to the side of the second heat dissipation member, passing through a point of the second recess that is farthest from the side of the second heat dissipation member that is closest to the second recess, passes through the second heat dissipation member.
[0088] In the semiconductor module according to the above embodiment, the sealing member 7 seals the power conversion circuit including the semiconductor element 3.
[0089] The semiconductor module according to the above embodiment further includes a lead including an inner lead portion embedded in the sealing member and an outer lead portion extending outward from an end face of the sealing member in a direction parallel to the in-plane direction of the second surface, and the outer lead portion of the lead is bent at a predetermined bending position in the extension direction so that the extension direction is toward the second surface.
[0090] The semiconductor module according to the above embodiment further includes a cooler connected to the exposed surface of the first heat dissipation member.
[0091] The present invention is not limited to the above-described embodiments, and may be variously modified, substituted, or altered without departing from the spirit of the technical idea. Furthermore, if the technical idea can be realized in a different way due to technological advances or other derived technologies, it may be implemented using that method. Therefore, the claims cover all embodiments that may fall within the scope of the technical idea. [Industrial Applicability]
[0092] As described above, the present invention can alleviate the constraints on heat dissipation members in double-sided heat dissipation semiconductor modules in which the heat dissipation members are exposed on a pair of oppositely facing surfaces of the sealing member, thereby improving heat dissipation performance, and is particularly advantageous for application to high-voltage power conversion devices. [Explanation of symbols]
[0093] 1. Semiconductor module 2. First heat dissipation member 210 through hole 3. Semiconductor elements 4, 4A~4Q Lead 5 spacers 6 Second heat dissipation member 610 through hole 620, 621 notch 7 Sealing member 711 Bottom side 712 Top surface 720, 720A~720D, 740, 740A, 740B recess 8 Cooler 10A, 10B IGBT element 11A, 11B Diode elements 13A, 13B control circuit 15 Mold 1501 Lower mold 1502 Upper mold 1510 cavity 1511 Bottom surface 1512 Upper base 1520, 1521 through holes 16, 17 pins
Claims
1. a sealing member that seals the semiconductor element; a first heat dissipation member exposed from a first surface of the sealing member; a second heat dissipation member exposed from a second surface of the sealing member opposite to the first surface, a recessed portion is formed on the second surface of the sealing member, the recessed portion being positioned at an end of the first heat dissipation member in a plan view of the second surface, the recessed portion overlapping the first heat dissipation member, and recessed from the second surface toward the first surface; a planar shape of the second heat dissipation member in a plan view of the second surface is such that a line passing through a point of the recess that is farthest from a side of the first heat dissipation member that is close to the recess and that is parallel to the side of the first heat dissipation member passes through the second heat dissipation member; Semiconductor module.
2. The semiconductor module according to claim 1 , wherein the recess is located at a corner of the first heat dissipation member when the second surface of the sealing member is seen in a plan view.
3. The semiconductor module according to claim 1 , wherein the recess is located at a center of a portion of the second surface of the sealing member along a side of the first heat dissipation member in a direction in which the side extends, in a plan view of the second surface.
4. The semiconductor module according to claim 1 , wherein the second heat dissipation member has a through hole formed therein that surrounds the recess in a plan view of the second surface of the sealing member.
5. 2. The semiconductor module according to claim 1, wherein the planar shape of the second heat dissipation member is a rectangle with notches at corners.
6. The semiconductor module according to claim 1 , wherein the planar shape of the second heat dissipation member is a rectangular shape with notches on sides thereof.
7. a second recessed portion is formed on the first surface of the sealing member, the second recessed portion being recessed toward the second surface from the first surface and overlapping with the second heat dissipation member at a position that is an end of the second heat dissipation member in a plan view of the first surface and does not overlap with the recessed portion on the second surface of the sealing member; a planar shape of the first heat dissipation member in a plan view of the first surface is such that a line passing through a point of the second recess that is farthest from a side of the second heat dissipation member that is close to the second recess and that is parallel to the side of the second heat dissipation member passes through the second heat dissipation member; The semiconductor module according to claim 1 .
8. The semiconductor module according to claim 1 , wherein a power conversion circuit including the semiconductor element is sealed in the sealing member.
9. further comprising a lead including an inner lead portion embedded in the sealing member and an outer lead portion extending outward from an end face of the sealing member in a direction parallel to an in-plane direction of the second surface, the outer lead portion of the lead is bent at a predetermined bending position in the extending direction so that the extending direction is directed toward the second surface; The semiconductor module according to any one of claims 1 to 8.
10. The semiconductor module according to claim 9 , further comprising a cooler connected to the exposed surface of the first heat dissipation member.
Citation Information
Patent Citations
Semiconductor device, power conversion device, and manufacturing method for semiconductor device
JP2022067815A