Semiconductor manufacturing apparatus and manufacturing method of semiconductor device
The semiconductor manufacturing apparatus and method address the weakened fixing force and transport issues in conventional dicing by using a hole-less dicing tape and probe pins/spring probes for electrical testing, enhancing productivity and reducing inspection frequency.
Patent Information
- Application Number
- JP2024023055
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-02-19
- Publication Date
- 2025-08-29
AI Technical Summary
Conventional methods for testing electrical characteristics of semiconductor chips after dicing face issues such as weakened fixing force during dicing due to the use of dicing tapes with holes, and require separate chip transport leading to increased capital investment and transport-related problems.
A semiconductor manufacturing apparatus and method that uses a dicing tape without holes, employing probe pins or spring probes to electrically connect with semiconductor chips while they are attached to the tape, allowing for electrical characteristic testing and reducing damage during dicing.
Enables electrical characteristic testing of individual chips while attached to the dicing tape, addressing the weakened fixing force issue and eliminating transport-related problems, thereby improving productivity and reducing the need for multiple inspections.
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Figure 2025126692000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a semiconductor manufacturing apparatus and a method for manufacturing a semiconductor device. [Background technology]
[0002] Conventionally, electrical characteristics testing of semiconductor devices with electrodes on the front and back surfaces has been performed either in wafer or chip form. However, wafer-state testing cannot take into account damage during the dicing process, which separates the chips. Chip-state testing, however, requires transporting the separated chips, which can lead to problems related to transport and increased capital investment. Patent Document 1, for example, proposes using a dicing tape with multiple holes formed to match the positions of the separated chips on the wafer, and measuring the separated chips on the dicing tape. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2014-229635 A Summary of the Invention [Problem to be solved by the invention]
[0004] However, in Patent Document 1, since dicing is performed using a dicing tape having holes, there is a concern that the force for fixing the wafer during dicing may be weakened.
[0005] The present disclosure has been made to solve the above-mentioned problems, and aims to provide a semiconductor manufacturing apparatus and a method for manufacturing a semiconductor device that can test the electrical characteristics of individualized chips while they are attached to a dicing tape. [Means for solving the problem]
[0006] The semiconductor manufacturing apparatus according to the present disclosure includes a stage on which a dicing tape having a plurality of semiconductor chips attached thereto is placed, probe pins provided on the stage and inserted into the dicing tape to contact the semiconductor chips, and a tester that inspects the electrical characteristics of the semiconductor chips via the probe pins.
[0007] The method for manufacturing a semiconductor device according to the present disclosure includes an insertion process in which a dicing tape having a plurality of semiconductor chips attached thereto is placed on a stage, and probe pins provided on the stage are inserted into the dicing tape to electrically connect to the semiconductor chips, and an inspection process in which electrical characteristics of the semiconductor chips are inspected via the probe pins. [Effects of the Invention]
[0008] According to the semiconductor manufacturing apparatus and semiconductor device manufacturing method of the present disclosure, the electrical characteristics of the individual chips can be tested while they are attached to the dicing tape. [Brief explanation of the drawings]
[0009] [Figure 1] 1 is a plan view showing a semiconductor manufacturing apparatus according to a first embodiment. [Figure 2] 1 is a cross-sectional view showing a semiconductor manufacturing apparatus according to a first embodiment. [Figure 3] 1 is a flowchart of a method for manufacturing a semiconductor device using the semiconductor manufacturing apparatus according to the first embodiment. [Figure 4] FIG. 10 is a cross-sectional view showing a semiconductor manufacturing apparatus according to a second embodiment. [Figure 5] FIG. 10 is a cross-sectional view showing a semiconductor manufacturing apparatus according to a third embodiment. [Figure 6] FIG. 10 is a cross-sectional view showing a semiconductor manufacturing apparatus according to a third embodiment. [Figure 7] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device using a modified example of the semiconductor manufacturing apparatus according to the third embodiment. [Figure 8] FIG. 10 is a flowchart showing a method for manufacturing a semiconductor device using a semiconductor manufacturing apparatus according to a comparative example. [Figure 9] 10A and 10B are diagrams showing modified examples of the dicing tape. DETAILED DESCRIPTION OF THE INVENTION
[0010] Hereinafter, embodiments will be described with reference to the drawings. The drawings are schematic illustrations, and the relative sizes and positions may be changed. In the following description, the same or corresponding components are denoted by the same reference numerals, and repeated description may be omitted.
[0011] In addition, in the following description, terms such as "above," "below," and "side" that indicate specific positions and directions may be used, but these terms are used for convenience to make it easier to understand the contents of the embodiments, and do not limit the positions and directions when implemented.
[0012] <First Embodiment> 1 and 2 show a semiconductor manufacturing apparatus according to a first embodiment. FIG. 1 is a plan view showing the semiconductor manufacturing apparatus according to the first embodiment, and is a plan view showing a semiconductor wafer 10 held by a mount frame 5. FIG. 2 is a cross-sectional view showing the semiconductor manufacturing apparatus according to the first embodiment, taken along dashed line AA in FIG. 1, when the semiconductor wafer 10 is placed on a stage 3.
[0013] The semiconductor wafer 10 has electrodes (not shown) on both the front and back surfaces, and the dicing tape 2 is attached to the semiconductor wafer 10 via the electrodes. The electrodes are made of a metal, such as gold or aluminum. The semiconductor wafer 10 may be made of a semiconductor material such as Si or a wide bandgap semiconductor such as SiC, GaN, or Ga2O3. The semiconductor wafer 10 is formed with semiconductor elements such as diodes and switching elements, such as insulated gate bipolar transistors (IGBTs) and metal-oxide-semiconductor field-effect transistors (MOSFETs).
[0014] 1 and 2 show the state after a semiconductor wafer 10 has been diced. When the semiconductor wafer 10 is diced, it is divided into a plurality of semiconductor chips 1, and the chips are arranged at regular intervals on a dicing tape 2. The dicing tape 2 is an adhesive tape having an adhesive material on the side that is attached to the semiconductor wafer 10. The adhesive material may be, for example, a material that is UV-responsive and whose adhesive strength decreases in response to UV light compared to before UV light irradiation, such as UV-curable polyolefin. The dicing tape 2 does not have any holes. A modified example of the dicing tape 2 is shown in FIG. 9. As shown in FIG. 9, the adhesive material of the dicing tape 2 may be a conductive adhesive material 9 that is electrically conductive.
[0015] The stage 3 may have a plurality of suction holes (not shown), which may be located at positions different from the probe pins 4, and the semiconductor chip 1 may be adsorbed to the stage 3 by suction from the suction holes via the dicing tape 2. The arrangement of the plurality of suction holes is preferably symmetrical with respect to the center of the wafer.
[0016] The probe pins 4 are electrically connected to a tester (not shown) and serve as probe terminals for testing electrical characteristics. The diameter of the probe pins 4 narrows toward the tips, allowing them to be inserted into the dicing tape 2 and electrically connected to the backside of the semiconductor chip 1.
[0017] The probe pin 4 may be made of any material that can penetrate the dicing tape 2, but it is preferable that the material be the same as or softer than the material of the back surface of the semiconductor wafer 10 and be able to penetrate the dicing tape 2, such as a metal that can suppress damage to the back surface of the semiconductor chip 1.
[0018] Here, there will be shown a method for manufacturing a semiconductor device using the semiconductor manufacturing apparatus according to embodiment 1. Fig. 3 is a flowchart of the method for manufacturing a semiconductor device using the semiconductor manufacturing apparatus according to embodiment 1.
[0019] In the forming step S001 for manufacturing the semiconductor wafer 10, a plurality of semiconductor elements are formed in a matrix on the semiconductor wafer 10 by ion implantation or the like.
[0020] Next, in the mounting step S002, the semiconductor wafer 10, which is the workpiece, is attached to the center of the dicing tape 2 held by the ring-shaped mounting frame 5. The mounting frame 5 is an annular frame, and may be made of, for example, a metal material that has been processed to form a passivation film on the surface, or may be made of a resin-based material.
[0021] The dicing tape 2 is, for example, an adhesive tape having an adhesive material on the side that is attached to the semiconductor wafer 10. The adhesive material is, for example, a material that is UV-responsive and whose adhesive strength decreases in response to UV light compared to before UV light irradiation. The dicing tape 2 does not have any holes.
[0022] A protective tape application step (not shown) may be performed before the mounting step S002 to apply a protective tape (not shown) for protecting the pattern for forming semiconductor elements provided on the front surface of the semiconductor wafer 10. This protects the pattern for forming the semiconductor elements in a subsequent step. In addition, in the dicing step S003, the semiconductor wafer 10 is cut with the protective tape still attached, thereby preventing the semiconductor wafer 10 from cracking or chipping during cutting. The protective tape is peeled off before the chip testing step S005.
[0023] The adhesive material of the protective tape is, for example, a material that is responsive to ultraviolet light and whose adhesive strength decreases in response to ultraviolet light compared to before ultraviolet light irradiation.
[0024] Next, in the dicing step S003, the semiconductor wafer 10 attached to the dicing tape 2 is diced from the wafer state into chips to form a plurality of semiconductor chips 1 in a grid pattern. When dicing, dicing is performed so as to cut only the semiconductor wafer 10, and not the dicing tape 2. The dicing is performed by blade dicing, laser dicing, or the like.
[0025] Next, in an insertion step S004, with the semiconductor chip 1 placed on the dicing tape 2, a probe pin 4 is inserted into the dicing tape 2 to make an electrical connection with the singulated semiconductor chip 1. The diameter of the probe pin 4 becomes thinner towards the tip, so that it can be inserted into the dicing tape 2 to make an electrical connection with the back surface of the semiconductor chip 1. The probe pin 4 is provided inside the stage 3 and protrudes above the surface of the stage 3, penetrating the dicing tape 2 to make contact with the semiconductor chip 1.
[0026] While the semiconductor chip 1 and dicing tape 2 are held by suction on the stage 3, the probe pins 4 penetrate the dicing tape 2, thereby enabling the probe pins 4 to make accurate contact with the semiconductor chip 1. Only one probe pin 4 may penetrate the dicing tape 2 and make contact with one semiconductor chip 1, or multiple probe pins 4 may make contact with one semiconductor chip 1. In other words, the number of pins that penetrate the dicing tape 2 may be changed as desired depending on the size of the semiconductor chip 1.
[0027] 9, when a conductive adhesive material 9 is provided on the surface of the dicing tape 2, the probe pins 4 do not need to penetrate the dicing tape 2. By providing the conductive adhesive material 9, electrical continuity can be established before the probe pins 4 come into contact with the back surface of the semiconductor chip 1. In other words, as long as the tips of the probe pins 4 reach the conductive adhesive material 9, there is no need for the probe pins 4 to come into contact with the back surface of the semiconductor chip 1, which prevents damage to the semiconductor chip 1 due to the pressing force of the probe pins 4 and improves productivity.
[0028] Next, in a chip test step S005, an electrical signal is applied from the probe pins 4 to the semiconductor chip 1 with the dicing tape 2 attached, and an electrical characteristic test, appearance test, etc. of the semiconductor chip 1 are performed.
[0029] Next, in the transport step S006, the individual chips are picked up from the dicing tape and transported. Note that in the pickup in which the probe pins 4 penetrate the dicing tape 2 to perform a chip test and then pick up the semiconductor chip 1, the semiconductor chip 1 may be picked up by further pushing up the probe pins 4 electrically connected to the semiconductor chip 1. Productivity is improved by pushing up the probe pins 4 to pick up the semiconductor chip 1 after the chip test. Note that, in consideration of pickup, it is preferable that the multiple probe pins 4 that penetrate the dicing tape 2 are arranged toward the chip center of one semiconductor chip 1 or arranged symmetrically with respect to the chip center.
[0030] On the other hand, FIG. 8 is a flowchart showing a method for manufacturing a semiconductor device using a semiconductor manufacturing apparatus according to a comparative example.
[0031] The semiconductor manufacturing apparatus according to the comparative example differs from the semiconductor manufacturing apparatus according to embodiment 1 in that the probe pins do not penetrate the dicing tape. That is, in the semiconductor manufacturing apparatus according to the comparative example, the probe pins are used only to pick up semiconductor chips from the dicing tape, and therefore the diameter of the probe pins does not taper toward the tip so that they can penetrate the dicing tape.
[0032] In the forming step S011 for manufacturing a semiconductor wafer, a plurality of semiconductor elements are formed in a matrix on the semiconductor wafer by ion implantation, etc. In the wafer test step S012, electrical property inspection, appearance inspection, etc. are performed on the wafer.
[0033] In the mounting step S013, a semiconductor wafer, which is the workpiece, is attached to the center of a dicing tape held by a ring-shaped mounting frame. Next, in the dicing step S014, the semiconductor wafer attached to the dicing tape is diced from the wafer state into chips. When dicing, only the wafer is diced, and the dicing tape is not cut.
[0034] Next, in a transport step S015, the individual chips are picked up from the dicing tape and transported. Next, in a chip test step S016, electrical property inspection and appearance inspection are performed on the chips.
[0035] In the comparative example, electrical characteristics were inspected in wafer form before the mounting step S013, and then in individual chip form after the transport step S015. Measuring only in wafer form does not take into account damage that may occur in the dicing step S013, in which the chips are separated into individual chips, so measurements in chip form were also required, and electrical characteristics inspections were performed twice, increasing the number of steps. Furthermore, when measuring in chip form, the individual chips must be picked up and transported on a chip tray or the like for inspection, which raises concerns about problems related to transport.
[0036] In the semiconductor device manufacturing method using the semiconductor manufacturing apparatus of the first embodiment, probe pins 4, whose diameters taper toward the tips after the dicing step S003, are used as measurement terminals. The probe pins 4 are inserted into the dicing tape 2 to establish electrical connection with the individual semiconductor chips 1. This enables electrical characteristic testing of the semiconductor chips 1 with the dicing tape 2 attached, enabling detection and discrimination of pass / fail products. This solves the above-mentioned problem, allowing electrical characteristic testing that takes into account damage during the dicing step S003 in a single pass without transport-related issues, thereby improving productivity. Furthermore, compared to the conventional technology that uses a dicing tape with holes and contacts the probe pins with the semiconductor chips through the holes, the semiconductor manufacturing apparatus of the first embodiment uses a dicing tape without holes for the dicing tape 2, eliminating concerns about weakening the fixing force of the semiconductor wafer 10 during dicing.
[0037] <Embodiment 2> The configuration of a semiconductor manufacturing apparatus according to embodiment 2 will be described with reference to Fig. 4. Fig. 4 is a cross-sectional view showing the semiconductor manufacturing apparatus according to embodiment 2. In embodiment 2, the same components as those described in embodiment 1 are denoted by the same reference numerals and description thereof will be omitted, and the same applies to the following embodiments.
[0038] 4, the semiconductor manufacturing apparatus of the second embodiment differs from the semiconductor manufacturing apparatus of the first embodiment in that the probe pins 4 are spring probes 6. The spring probes 6 have springs 7 and are structured so that their diameters become thinner toward the tips, allowing for a constant pressing force when the tips of the spring probes 6 are brought into contact with the semiconductor chip 1. The spring probes 6 are also conductive, and an electrical signal from the tips of the spring probes 6, which are electrically connected to the semiconductor chip 1, is input to a tester (not shown) via the springs 7.
[0039] When manufacturing a semiconductor device using the semiconductor manufacturing apparatus according to the second embodiment, the use of spring probes 6 makes it possible to keep the thrust force of probe pins 4 constant, preventing them from penetrating dicing tape 2 and damaging semiconductor chip 1. Furthermore, good electrical contact between semiconductor chip 1 and spring probes 6 can be maintained, preventing poor contact between semiconductor chip 1 and spring probes 6 and improving productivity.
[0040] <Third Embodiment> The configuration of a semiconductor manufacturing apparatus according to the third embodiment will be described with reference to Fig. 5. Fig. 5 is a cross-sectional view showing the semiconductor manufacturing apparatus according to the third embodiment.
[0041] The semiconductor manufacturing apparatus according to the third embodiment differs from the semiconductor manufacturing apparatus according to the first embodiment in that the probe pin 4 of the semiconductor manufacturing apparatus according to the first embodiment and the spring probe 6 of the semiconductor manufacturing apparatus according to the second embodiment are replaced with wire probes 8, as shown in FIG. 5. The wire probes 8 may be formed of a conductor such as tungsten, high-speed steel (SKH), beryllium copper (Be-Cu), or another metal, and are formed in the shape of a flexible, elastic wire. The outer circumferential surface of the wire probes 8 is provided with an insulating coating that covers the conductor. The insulating coating is formed of an insulator such as synthetic resin. The insulating coating may also be an insulating film formed by applying an insulating coating to the surface of a conductor.
[0042] One end of the wire probe 8 contacts the semiconductor chip 1 to be inspected, and the other end is fixed by a support member (not shown). The support member may be made of an insulating material as long as it can fix the wire probe 8. The multiple wire probes 8 are arranged at equal intervals on the support member, but the intervals at which the multiple wire probes 8 are arranged may be changed as desired depending on the size of the semiconductor chip 1.
[0043] The wire probes 8 are formed in the shape of thin wires, and can absorb pressure by bending them. Furthermore, because they are thin wire probes, the pitch between the probes can be narrowed. This makes it easier to configure them with more pins than the probe pins 4 and spring probes 6, and they can handle testing of larger currents. The wire probes 8 may have any shape that allows them to penetrate the dicing tape 2, but the tips may also be rounded. Having rounded tips can reduce damage to the semiconductor chip 1.
[0044] 6 is a cross-sectional view showing a modified example of the semiconductor manufacturing apparatus according to the third embodiment, which is a modified example of the semiconductor manufacturing apparatus shown in FIG. 5. In the semiconductor manufacturing apparatus according to the third embodiment, the wire probes 8 are brought into contact with the back surface of the semiconductor chip 1 from a direction perpendicular to the back surface, but in the modified example of the semiconductor manufacturing apparatus according to the third embodiment, the wire probes 8 may be brought into contact with the back surface of the semiconductor chip 1 from an oblique direction as shown in FIG. 6. By tilting the insertion angle of the wire probes 8 inserted into the dicing tape 2 into the dicing tape 2, it is possible to reduce the pressing force on the back surface of the chip when the wire probes 8 come into contact with the semiconductor chip 1, thereby suppressing damage to the semiconductor chip 1.
[0045] 7A and 7B are diagrams showing a method for manufacturing a semiconductor device using a modified example of the semiconductor manufacturing apparatus according to embodiment 3. Fig. 7A shows the initial state after the wire probes 8 are inserted and before they come into contact with the semiconductor chip 1. Fig. 7B shows the state immediately before the wire probes 8 come into contact with the chip.
[0046] As shown in FIG. 7 , after inserting the wire probe 8, before the tip of the wire probe 8 comes into contact with the semiconductor chip 1, the portion of the wire probe 8 that is not inserted into the dicing tape 2 is bent, changing the insertion angle of the wire probe 8 halfway inside the dicing tape 2. The insertion angle of the wire probe 8 may be changed in multiple stages. For example, as shown in FIG. 7 , the wire probe 8 is inserted at a first insertion angle θ1 into the dicing tape 2, which is changed to a second insertion angle θ2 that is smaller than the first insertion angle just before contact with the semiconductor chip 1. In the initial state when the wire probe 8 is first inserted into the dicing tape 2, the closer the wire probe 8 is to a direction perpendicular to the extension direction of the dicing tape, the easier it is to insert. In other words, the closer θ1 is to 90°, the easier it is to insert, but the greater the stress on the backside of the semiconductor chip 1. Therefore, by changing the insertion angle of the wire probe 8 to a second insertion angle θ2, which is smaller than the first insertion angle θ1 at the time of initial insertion, when the wire probe 8 is already inserted partway into the dicing tape 2, and continuing to insert the wire probe 8, it is possible to facilitate insertion into the dicing tape 2 while reducing the pressing force on the back surface of the semiconductor chip 1 and suppress damage to the semiconductor chip 1. Note that an angle adjustment means (not shown) may be provided to tilt the insertion angle of the wire probe 8 into the dicing tape 2. The insertion angle can be changed to any desired angle by moving the support member that supports the wire probe 8 with the angle adjustment means. Note that the angle adjustment means may be any mechanism that can change the insertion angle to any desired angle.
[0047] Although several embodiments of the present disclosure have been described, these embodiments are presented as examples. Various omissions, substitutions, and modifications can be made without departing from the spirit of the present disclosure. Furthermore, the embodiments can be combined.
[0048] Various aspects of the present disclosure are summarized below as appendices.
[0049] (Appendix 1) a stage on which a dicing tape having a plurality of semiconductor chips attached thereto is placed; a probe pin provided on the stage and inserted into the dicing tape to electrically connect to the semiconductor chip; a tester that tests electrical characteristics of the semiconductor chip via the probe pins; Semiconductor manufacturing equipment equipped with (Appendix 2) 2. The semiconductor manufacturing apparatus according to claim 1, wherein the probe pin is a wire probe. (Appendix 3) 2. The semiconductor manufacturing apparatus according to claim 1, wherein the probe pin is a spring probe. (Appendix 4) An angle adjusting means for adjusting an insertion angle of the probe pin inserted into the dicing tape; 4. The semiconductor manufacturing apparatus according to any one of claims 1 to 3, comprising: (Appendix 5) an insertion step in which, with a dicing tape having a plurality of semiconductor chips attached thereto placed on a stage, probe pins provided on the stage are inserted into the dicing tape to electrically connect to the semiconductor chips; an inspection step of inspecting electrical characteristics of the semiconductor chip via the probe pin; A method for manufacturing a semiconductor device comprising: (Appendix 6) 6. The method for manufacturing a semiconductor device according to claim 5, wherein in the inserting step, the probe pin is inserted into the dicing sheet at a first angle formed between the dicing tape and the probe pin in a cross-sectional view. (Appendix 7) 7. The method for manufacturing a semiconductor device according to claim 6, wherein in the insertion step, after starting insertion of the probe pin at the first angle, the probe pin is bent to change the angle between the dicing tape and the probe pin to a second angle smaller than the first angle formed between the dicing tape and the probe pin in a cross-sectional view. (Appendix 8) 8. The method for manufacturing a semiconductor device according to any one of claims 5 to 7, wherein the dicing tape is made of a material that hardens when irradiated with UV light. (Appendix 9) 9. The method for manufacturing a semiconductor device according to any one of claims 5 to 8, wherein the dicing tape has a conductive adhesive portion, and the probe pin comes into contact with the adhesive portion in the inserting step. [Explanation of symbols]
[0050] 1. Semiconductor chip 2 Dicing tape 3 Stages 4 probe pins 5 Mounting Frame 6 Spring Probes 7 Spring 8 wire probe 9 Conductive adhesive material 10 Semiconductor wafers
Claims
1. a stage on which a dicing tape having a plurality of semiconductor chips attached thereto is placed; a probe pin provided on the stage and inserted into the dicing tape to electrically connect to the semiconductor chip; a tester that tests electrical characteristics of the semiconductor chip via the probe pins; Semiconductor manufacturing equipment equipped with
2. 2. The semiconductor manufacturing apparatus according to claim 1, wherein the probe pin is a spring probe.
3. 2. The semiconductor manufacturing apparatus according to claim 1, wherein the probe pin is a wire probe.
4. An angle adjusting means for adjusting an insertion angle of the probe pin inserted into the dicing tape; 4. The semiconductor manufacturing apparatus according to claim 1, further comprising:
5. an insertion step in which, with a dicing tape having a plurality of semiconductor chips attached thereto placed on a stage, probe pins provided on the stage are inserted into the dicing tape to electrically connect to the semiconductor chips; an inspection step of inspecting electrical characteristics of the semiconductor chip via the probe pin; A method for manufacturing a semiconductor device comprising:
6. 6. The method for manufacturing a semiconductor device according to claim 5, wherein in the inserting step, the probe pin is inserted into the dicing sheet at a first angle formed between the dicing tape and the probe pin in a cross-sectional view.
7. 7. The method for manufacturing a semiconductor device according to claim 6, wherein in the insertion process, after starting insertion of the probe pin at the first angle, the probe pin is bent to change the angle between the dicing tape and the probe pin to a second angle smaller than the first angle formed between the dicing tape and the probe pin in a cross-sectional view.
8. 8. The method for manufacturing a semiconductor device according to claim 7, wherein the dicing tape is made of a material that hardens when irradiated with UV light.
9. 9. The method for manufacturing a semiconductor device according to claim 5, wherein the dicing tape has a conductive adhesive portion, and the probe pin comes into contact with the adhesive portion in the inserting step.
Citation Information
Patent Citations
Semiconductor inspection method and semiconductor inspection device
JP2014229635A