Electro-optical device and electronic apparatus

Abstract

To provide an electro-optical device and an electronic apparatus in which heat generation is suppressed inside a substrate.SOLUTION: An electro-optical device includes: a pixel electrode; a first wiring line having a first layer, a second layer, and a third layer; a transistor at least partially overlapping the first wiring line in plan view; and a data line which is provided in a layer between the first wiring line and the transistor, at least partially overlaps the first wiring line in plan view, and is electrically connected to the pixel electrode via the transistor. The first layer has light reflectivity and is disposed closer to the transistor than the second and third layers. The second layer is provided between the first layer and the third layer, and has light reflectance lower than that of the first layer, and the third layer has light reflectance higher than that of the second layer.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] The present invention relates to an electro-optical device and an electronic device. [Background technology]

[0002] Active-drive liquid crystal devices have been known as one type of electro-optical device, in which each pixel has a transistor that controls the switching of the pixel electrode. Such liquid crystal devices have contact holes for connecting various wirings and electrodes. For example, Patent Document 1 discloses an electro-optical device having a contact hole for connecting a shield layer and a relay layer for the shield layer, and a contact hole for connecting a third relay electrode and a second relay electrode. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-242296 Summary of the Invention [Problem to be solved by the invention]

[0004] In the electro-optical device described in Patent Document 1, if a laminated structure is adopted over the entire area of ​​each of the contact holes, shielding layer, and relay electrode, it is possible to use a material with high light absorption efficiency, such as titanium nitride, as an anti-corrosion layer. However, this creates a problem in that titanium nitride absorbs light, making it more likely to generate heat inside the substrate. [Means for solving the problem]

[0005] In order to solve the above problems, one embodiment of the electro-optical device of the present invention comprises a pixel electrode, a first wiring having a first layer, a second layer, and a third layer, a transistor at least a portion of which overlaps with the first wiring in a planar view, and a data line provided in a layer between the first wiring and the transistor, at least a portion of which overlaps with the first wiring in a planar view, and electrically connected to the pixel electrode via the transistor, wherein the first layer is optically reflective and is positioned closer to the transistor than the second and third layers, the second layer is provided between the first and third layers, and has a lower optical reflectivity than the first layer, and the third layer has a higher optical reflectivity than the second layer.

[0006] An electronic device according to another aspect of the present invention includes the electro-optical device according to the above aspect. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a schematic plan view showing the configuration of a liquid crystal device according to a first embodiment. [Figure 2] FIG. 2 is a schematic cross-sectional view showing the structure of the liquid crystal device taken along line AA' in FIG. [Figure 3] FIG. 2 is an equivalent circuit diagram showing the electrical configuration of the liquid crystal device. [Figure 4] FIG. 2 is a schematic plan view showing the arrangement of pixels. [Figure 5] 5 is a cross-sectional view showing the structure of the element substrate taken along line β1-β2 in FIG. 4. [Figure 6] 5 is a cross-sectional view showing the structure of the element substrate taken along line α1-α2 in FIG. 4. [Figure 7] 5 is a cross-sectional view showing the structure of the element substrate taken along line γ1-γ2 in FIG. 4. [Figure 8] FIG. 4 is a plan view showing the configuration of a common line and a third relay electrode. [Figure 9] FIG. 10 is a plan view showing the configuration of a third relay electrode according to the second embodiment. [Figure 10] 5 is a cross-sectional view showing the structure of the element substrate taken along line β1-β2 in FIG. 4. [Figure 11] 5 is a cross-sectional view showing the structure of the element substrate taken along line α1-α2 in FIG. 4. [Figure 12] FIG. 10 is a schematic diagram showing the configuration of a projection display device according to a third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The present invention is not limited to the following embodiments, and various modifications implemented within the scope of the present invention are also included in the present invention.

[0009] In the following figures, X, Y, and Z axes, which are mutually orthogonal coordinate axes, are added as necessary, and the direction indicated by each arrow is the + direction, and the direction opposite to the + direction is the - direction. The +Z direction is sometimes referred to as upward, and the -Z direction is sometimes referred to as downward. In this specification, the first direction is the direction along the X axis, and the second direction intersecting the first direction is the direction along the Y axis. In the following figures, the scale of each layer and each component is different from the actual scale in order to make each layer and each component large enough to be recognizable.

[0010] Furthermore, the plane containing the X-axis and Y-axis is also called the XY plane, and viewing the XY plane from the +Z direction is also called planar view or planar. Furthermore, for example, with respect to a substrate, the expression "on a substrate" refers to any of the cases where the substrate is placed in contact with the substrate, where the substrate is placed indirectly via another structure, or where a portion of the substrate is placed in contact with the substrate and where a portion of the substrate is placed via another structure.

[0011] (First embodiment) In this embodiment, an active-drive liquid crystal device 100 is exemplified as an electro-optical device, in which a thin film transistor (hereinafter abbreviated as "TFT") is provided for each pixel. The liquid crystal device 100 is suitable, for example, as a light modulation element (liquid crystal light valve) for a projection display device serving as an electronic device, which will be described later.

[0012] Fig. 1 is a schematic plan view showing the configuration of a liquid crystal device according to this embodiment, and Fig. 2 is a schematic cross-sectional view showing the structure of the liquid crystal device taken along line AA' in Fig. 1. As shown in Figures 1 and 2, a liquid crystal device 100 as an electro-optical device according to this embodiment has an element substrate 10, an opposing substrate 20 arranged opposite the element substrate 10, and a liquid crystal layer 5 containing liquid crystal sandwiched between the element substrate 10 and the opposing substrate 20.

[0013] The substrate 10a of the element substrate 10 is, for example, a glass substrate, a quartz substrate, etc. The substrate 20a of the counter substrate 20 is, for example, a transparent substrate such as a glass substrate, a quartz substrate, etc.

[0014] The element substrate 10 is larger than the counter substrate 20 in plan view. The element substrate 10 and the counter substrate 20 are joined via a sealant 6 arranged along the outer edge of the counter substrate 20. A liquid crystal having positive or negative dielectric anisotropy is sealed in the gap between the element substrate 10 and the counter substrate 20 to provide a liquid crystal layer 5. In the following description, the element substrate 10 and the counter substrate 20 may also be referred to as a pair of substrates.

[0015] An adhesive such as a thermosetting, photosetting, or electron beam curing epoxy resin is used for the sealing material 6. A spacer (not shown) is mixed into the sealing material 6 to maintain a constant gap between the pair of substrates.

[0016] A display region E including a plurality of pixels P arranged in a matrix is ​​provided inside the sealing material 6. Outside the display region E is a peripheral region F. In the peripheral region F, a parting portion 23 is provided between the sealing material 6 and the display region E, surrounding the display region E. For example, a light-blocking metal or metal oxide is used for the parting portion 23.

[0017] Although not shown in the figure, a dummy region is provided around the display region E, and a light-shielding portion is provided in the display region E. The dummy region does not contribute to the display of the liquid crystal device 100. The light-shielding portion is a so-called black matrix, and is provided on the counter substrate 20.

[0018] The element substrate 10 is provided with a terminal section in which a plurality of external connection terminals 43 are arranged. A data line driving circuit 47 is provided between a first side along the terminal section and the sealing material 6. In addition, an inspection circuit 41 is provided between the sealing material 6 and the display area E along a second side opposite to the first side.

[0019] A scanning line driving circuit 45 is provided between the sealant 6 along the third and fourth sides that are perpendicular to the first side and face each other and the display region E. A plurality of wirings 49 that connect the two scanning line driving circuits 45 are provided between the sealant 6 on the second side and the inspection circuit 41.

[0020] The wiring 49 connected to the data line driving circuit 47 and the scanning line driving circuit 45 is electrically connected to a plurality of external connection terminals 43 arranged along the first side. The arrangement of the inspection circuit 41 is not limited to the above, and it may be provided between the sealing material 6 along the data line driving circuit 47 and the display area E.

[0021] 2, on the surface of the substrate 10a facing the liquid crystal layer 5, there are provided light-transmitting pixel electrodes 11 provided for each pixel P, TFTs 30 serving as switching elements, wiring 49, and an alignment film 12 covering these. The TFTs 30 and the pixel electrodes 11 are components of the pixel P. The pixel electrodes 11 are provided corresponding to the TFTs 30. The element substrate 10 includes the substrate 10a, and the pixel electrodes 11, TFTs 30, wiring 49, and alignment film 12 provided on the substrate 10a.

[0022] Light L enters the liquid crystal device 100 from the counter substrate 20 side. The light L originates from, for example, a laser light source. The direction of incidence of the light L on the liquid crystal device 100 is not limited to the counter substrate 20 side, but may be from the element substrate 10 side. The liquid crystal device 100 may also be configured to include a focusing means such as a microlens that focuses the incident light L for each pixel P.

[0023] On the surface of the substrate 20a facing the liquid crystal layer 5, there are provided a parting portion 23, an insulating layer 25 formed to cover the parting portion 23, a counter electrode 21 provided to cover the insulating layer 25, and an alignment film 22 covering the counter electrode 21. Note that in the liquid crystal device 100, a common electrode is disposed on the counter substrate 20 side as the counter electrode 21, but the present invention is not limited to this configuration.

[0024] As shown in FIG. 1, the scanning line driving circuit 45 and the inspection circuit 41 overlap the parting portion 23 in plan view. The parting portion 23 functions as a light-shielding portion. Specifically, the parting portion 23 blocks the light L incident from the counter substrate 20 side from entering peripheral circuits such as the scanning line driving circuit 45. In other words, the parting portion 23 has the function of preventing malfunction of the peripheral circuits. The parting portion 23 also prevents unnecessary stray light from entering the display region E. This prevents a decrease in the contrast of the liquid crystal device 100.

[0025] 2, the insulating layer 25 is provided so as to cover the parting portion 23 and to flatten the surface facing the liquid crystal layer 5. The insulating layer 25 is made of, for example, an inorganic material such as silicon oxide that is optically transparent.

[0026] The counter electrode 21 covers the insulating layer 25 and is electrically connected to vertical conductive parts 7 provided at the four corners of the counter substrate 20. The vertical conductive parts 7 are electrically connected to common wiring 18 (described later) on the element substrate 10 side.

[0027] The pixel electrode 11 and the counter electrode 21 are made of a transparent conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The alignment films 12 and 22 are selected based on the optical design of the liquid crystal device 100. Materials for the alignment films 12 and 22 include inorganic alignment films such as silicon oxide and organic alignment films such as polyimide.

[0028] The liquid crystal device 100 employs optical designs for a normally white mode and a normally black mode. In the normally white mode, the transmittance of the pixel P when no voltage is applied is greater than the transmittance when a voltage is applied, and in the normally black mode, the transmittance of the pixel P when no voltage is applied is less than the transmittance when a voltage is applied. In the liquid crystal device 100, polarizing elements are arranged on both the incident side and the exit side of the light L according to the optical design.

[0029] In the present embodiment, an example will be described in which the above-mentioned inorganic alignment films are used as the alignment films 12 and 22, and liquid crystal having negative dielectric anisotropy is used, and an optical design of a normally black mode is adopted.

[0030] FIG. 3 is an equivalent circuit diagram showing the electrical configuration of the liquid crystal device. As shown in FIG. 3, the liquid crystal device 100 has scanning lines 13, data lines 16, and common wiring 18 on a substrate 10a of an element substrate 10. The scanning lines 13 extend along the X-axis. The data lines 16 and common wiring 18 extend along the Y-axis. The common wiring 18 is not limited to extending along the Y-axis. The common wiring 18 is an example of a first wiring of the present invention.

[0031] An area defined by the scanning lines 13 along the X-axis and the data lines 16 along the Y-axis is a pixel P. The pixel P includes a pixel electrode 11, a TFT 30, a first capacitance element 50, and a second capacitance element 60. The first capacitance element 50 and the second capacitance element 60 are provided corresponding to the pixel electrode 11.

[0032] The scanning lines 13 are electrically connected to the gates of the TFTs 30, and the data lines 16 are electrically connected to the sources of the TFTs 30. The scanning lines 13 have the function of simultaneously controlling the on / off of the TFTs 30 in the same row. The pixel electrodes 11 are electrically connected to the drains of the TFTs 30.

[0033] The data lines 16 are electrically connected to a data line driving circuit 47 and supply image signals D1, D2, ..., Dn supplied from the data line driving circuit 47 to the pixels P. The scanning lines 13 are electrically connected to a scanning line driving circuit 45 and supply scanning signals SC1, SC2, ..., SCm supplied from the scanning line driving circuit 45 to each pixel P.

[0034] The image signals D1 to Dn supplied from the data line driving circuit 47 to the data lines 16 may be supplied line-sequentially in this order, or may be supplied in groups to adjacent data lines 16. The scanning line driving circuit 45 supplies scanning signals SC1 to SCm to the scanning lines 13 in pulses at predetermined timings line-sequentially.

[0035] When a scanning signal SC1 is input to the TFT 30, the TFT 30 is turned on for a certain period of time. As a result, an image signal D1 supplied from the data line 16 is written to the pixel electrode 11 at a predetermined timing. The image signal D1 of a predetermined level written to the liquid crystal layer 5 via the pixel electrode 11 is held for a certain period of time between the pixel electrode 11 and the counter electrode 21 disposed opposite the pixel electrode 11 with the liquid crystal layer 5 interposed therebetween.

[0036] In order to prevent leakage of the stored image signal D1, a first capacitive element 50 and a second capacitive element 60 are electrically connected in parallel to a liquid crystal capacitance provided between the pixel electrode 11 and the counter electrode 21. One end of the first capacitive element 50 is electrically connected to the drain of the TFT 30 and the pixel electrode 11. The other end of the first capacitive element 50 is electrically connected to a common wiring 18 to which a constant potential is applied. The second capacitive element 60 is also electrically connected to the common wiring 18, similar to the first capacitive element 50.

[0037] Although not shown, a test circuit 41 is connected to the data lines 16. This allows the image signals D1, D2, ..., Dn to be detected during the manufacturing process of the liquid crystal device 100, making it possible to check for operational defects and the like in the liquid crystal device 100.

[0038] FIG. 4 is a schematic plan view showing the arrangement of pixels. As shown in Fig. 4, the pixel electrodes 11 are substantially square, and are provided in a matrix pattern corresponding to the arrangement of the pixels P. Scanning lines 13 are provided along the X axis between adjacent pixel electrodes 11, and data lines 16 and common wiring 18 are provided along the Y axis. Note that Fig. 4 shows an enlarged view of an area E1, which is a part of the display area E in Fig. 1.

[0039] In the display region E, a light-shielding region SD is provided by dividing a plurality of pixels P into two planes. The light-shielding region SD is a grid-like region indicated by the dashed lines, including a linear portion including the scanning lines 13 and a linear portion including the data lines 16 and common wiring 18. Because a light-shielding conductive material is applied to the functional layers and wiring such as the scanning lines 13 and the data lines 16, the light-shielding region SD becomes a so-called non-opening region. In other words, in the display region E, the region other than the light-shielding region SD becomes an opening region.

[0040] A second contact hole CNT12 is provided in the light-shielding region SD at the end in the -Y direction corresponding to the pixel electrode 11. The pixel electrode 11 and a third relay electrode 83, which will be described later, are electrically connected via the second contact hole CNT12. That is, the third relay electrode 83 of this embodiment corresponds to the third relay electrode of a conventional electro-optical device.

[0041] In the liquid crystal device 100, the second contact holes CNT12 are provided in the light-shielding region SD. That is, the scanning lines 13, common wiring 18, etc. are not recessed in a planar manner, so these wirings can be made thinner, which makes it easy to improve the aperture ratio. The detailed configuration of the element substrate 10, including the third relay electrodes 83, etc., will be described later.

[0042] Fig. 5 is a cross-sectional view showing the structure of the element substrate taken along line β1-β2 in Fig. 4. Fig. 6 is a cross-sectional view showing the structure of the element substrate taken along line α1-α2 in Fig. 4. Fig. 7 is a cross-sectional view showing the structure of the element substrate taken along line γ1-γ2 in Fig. 4.

[0043] 5, 6, and 7, the element substrate 10 of the liquid crystal device 100 includes a substrate 10a, a second capacitance element 60, a scanning line 13, a TFT 30 including a semiconductor layer 31 and a gate electrode 32, a first capacitance element 50, a data line 16, a common wiring 18, a third relay electrode 83, a pixel electrode 11, and a plurality of interlayer insulating layers described below. The third relay electrode 83 is an example of a relay layer of the present invention.

[0044] The element substrate 10 has a configuration in which multiple functional layers are stacked on a base substrate 10a. Specifically, on the substrate 10a, a first conductive layer including the fourth capacitance electrode 62 of the second capacitance element 60, a second conductive layer including the third capacitance electrode 61 of the second capacitance element 60, a third conductive layer including the scanning line 13, a fourth conductive layer including the semiconductor layer 31 of the TFT 30 and the gate electrode 32 of the TFT 30, a fifth conductive layer including the second capacitance electrode 52 of the first capacitance element 50, a sixth conductive layer including the first capacitance electrode 51 of the first capacitance element 50, a seventh conductive layer including the data line 16, an eighth conductive layer including the common wiring 18, and a pixel electrode 11 are stacked in this order.

[0045] A second dielectric layer 63 is provided between the fourth capacitance electrode 62 of the second capacitance element 60, which is the first conductive layer, and the third capacitance electrode 61 of the second capacitance element 60, which is the second conductive layer. A first interlayer insulating layer 71 is provided between the second conductive layer and the scanning line 13, which is the third conductive layer. A second interlayer insulating layer 72 is provided between the third conductive layer and the semiconductor layer 31 of the TFT 30. A gate insulating layer 33 is provided between the semiconductor layer 31 and the gate electrode 32. A third interlayer insulating layer 73, which serves as a second insulating layer, is provided between the TFT 30, which is the fourth conductive layer, and the second capacitance electrode 52 of the first capacitance element 50, which is the fifth conductive layer.

[0046] A first dielectric layer 53 is provided between the second capacitance electrode 52 of the first capacitance element 50, which is the fifth conductive layer, and the first capacitance electrode 51 of the first capacitance element 50, which is the sixth conductive layer. A fourth interlayer insulating layer 74, which serves as a first insulating layer, is provided between the first capacitance electrode 51, which is the sixth conductive layer, and the data line 16, which is the seventh conductive layer. A fifth interlayer insulating layer 75 is provided between the data line 16, which is the seventh conductive layer, and the common wiring 18, which is the eighth conductive layer. A sixth interlayer insulating layer 76 is provided between the common wiring 18, which is the eighth conductive layer, and the pixel electrode 11.

[0047] Examples of materials for these interlayer insulating layers include silicon oxide (Non-doped Silicate Glass: NSG), silicon nitride, etc. In this embodiment, silicon oxide is used.

[0048] The second capacitance element 60 is provided on the substrate 10a, including inside a trench (not shown). In the second capacitance element 60, a fourth capacitance electrode 62, a second dielectric layer 63, and a third capacitance electrode 61 are stacked in this order from the substrate 10a side. Examples of materials for the third capacitance electrode 61 and the fourth capacitance electrode 62 include conductive polysilicon. Examples of materials for the second dielectric layer 63 include a dielectric material. Examples of dielectric materials include silicon nitride, silicon oxide, hafnium oxide, aluminum oxide, and tantalum oxide, and these layers are used alone or in combination.

[0049] The scanning lines 13 also function as a light-shielding layer and are provided on the first interlayer insulating layer 71. A known material having light-shielding and conductive properties is used for the scanning lines 13. The scanning lines 13 mainly function to block light L incident on the semiconductor layer 31 from below. In this embodiment, tungsten silicide is used as the material for the scanning lines 13.

[0050] The TFT 30 has a semiconductor layer 31 provided on the second interlayer insulating layer 72, a gate insulating layer 33, and a gate electrode 32 provided on the third interlayer insulating layer 73. The gate electrode 32 is electrically connected to the scanning line 13.

[0051] The semiconductor layer 31 of the TFT 30 has an LDD (Lightly Doped Drain) structure. The semiconductor layer 31 is made of, for example, conductive polysilicon. The gate electrode 32 is made of, for example, conductive polysilicon. The semiconductor layer 31 extends along the Y axis.

[0052] The first capacitance element 50 is provided on the third interlayer insulating layer 73. In the first capacitance element 50, a second capacitance electrode 52, a first dielectric layer 53, and a first capacitance electrode 51 are stacked in this order from the substrate 10a side. The first capacitance electrode 51 and the second capacitance electrode 52 may be made of, for example, conductive polysilicon. The first dielectric layer 53 is made of the same dielectric material as the second capacitance element 60.

[0053] The data line 16 is provided on the fourth interlayer insulating layer 74 and extends along the Y-axis. The material of the data line 16 is not particularly limited as long as it is a conductive, low-resistance wiring material, and examples thereof include metals such as aluminum and titanium, and metal compounds thereof. The data line 16 is electrically connected to the source / drain region of the semiconductor layer 31.

[0054] The common wiring 18 and the third relay electrode 83 are provided in the same layer on the fifth interlayer insulating layer 75. The common wiring 18 and the third relay electrode 83 are electrically connected to the counter electrode 21 described above and are given a common potential. Examples of materials for the common wiring 18 and the third relay electrode 83 include metals such as aluminum and titanium, and metal compounds thereof. In the liquid crystal device 100, the common wiring 18 and the third relay electrode 83 have a laminated structure.

[0055] Specifically, the common wiring 18 has a first layer 18a having optical reflectivity, a second layer 18b stacked on the first layer 18a and having a lower optical reflectivity than the first layer 18a, and a third layer 18c stacked on the second layer 18b and having a higher optical reflectivity than the second layer 18b. The third relay electrode 83 has a first layer 83a having optical reflectivity, a second layer 83b stacked on the first layer 83a and having a lower optical reflectivity than the first layer 83a, and a third layer 83c stacked on the second layer 83b and having a higher optical reflectivity than the second layer 83b.

[0056] The first layers 18a and 83a contain aluminum, the second layers 18b and 83b contain titanium nitride, and the third layers 18c and 83c contain titanium. Specifically, in this embodiment, aluminum is used for the first layers 18a and 83a, titanium nitride is used for the second layers 18b and 83b, and titanium is used for the third layers 18c and 83c. The titanium nitride used for the second layers 18b and 83b suppresses electrolytic corrosion and oxidation of the aluminum in the first layers 18a and 83a and protects the first layers 18a and 83a from the stripping solution used in the patterning process during manufacturing. Meanwhile, aluminum not only has good electrical conductivity but also a higher optical reflectivity than titanium nitride. Therefore, in areas where the above effects are not required, the second layers 18b and 83b can be omitted to reflect light L, thereby suppressing heat generation inside the element substrate 10. Furthermore, titanium has a higher optical reflectivity than titanium nitride, and by arranging it on top of the second layers 18b, 83b, it reflects light L even in areas of the second layers 18b, 83b where the above-mentioned action is required, thereby efficiently suppressing heat generation inside the element substrate 10.

[0057] Here, when a film is formed by sputtering, at a wavelength of 550 nm in the visible range, the optical reflectance of aluminum is approximately 90%, the optical reflectance of titanium nitride is approximately 25%, and the optical reflectance of titanium is approximately XX%. The optical reflectance of such materials can be measured using a spectrophotometer or the like. In this specification, having optical reflectivity means that the optical reflectance is approximately 50% or more. This actively reflects light and prevents light absorption, thereby suppressing heat generation in the liquid crystal device 100.

[0058] In this embodiment, in a plan view, the area of ​​the third layers 18c, 83c is equal to the area of ​​the second layers 18b, 83b. In a plan view of the element substrate 10, the area of ​​the third layers 18c, 83c covering the second layers 18b, 83b is smaller than the area of ​​the corresponding first layers 18a, 83a. That is, the second layers 18b, 83b and the third layers 18c, 83c are stacked on partial regions of the corresponding first layers 18a, 83a, rather than on the entire regions. Details of the common wiring 18 and the third relay electrode 83 will be described later.

[0059] Pixel electrodes 11 are provided on the sixth interlayer insulating layer 76. Although not shown in the figure, an alignment film 12 is provided to cover the pixel electrodes 11. The alignment film 12 of the element substrate 10 and the alignment film 22 of the counter substrate 20 described above are made up of an aggregate of columns formed by depositing an inorganic material such as silicon oxide from a predetermined direction, such as an oblique direction, and growing the material into a columnar shape.

[0060] As shown in FIG. 5, the second capacitance electrode 52 of the first capacitance element 50 is electrically connected to a fifth relay electrode 85 arranged on the fourth conductive layer, and the fifth relay electrode 85 is electrically connected to the fourth capacitance electrode 62 of the second capacitance element 60.

[0061] The second layer 18b and the third layer 18c are not provided in the range of the line segment β1-β2 of the common wiring 18. The light L incident from above is reflected by the first layer 18a in the region where the second layer 18b and the third layer 18c are not stacked. Therefore, heat generation due to absorption of the light L is suppressed in the region.

[0062] 6, the common wiring 18 and the first capacitance electrode 51 of the first capacitance element 50 are electrically connected via a first relay electrode 81 arranged on the seventh conductive layer. The first relay electrode 81 is further electrically connected to a second relay electrode 82 arranged on the fourth conductive layer.

[0063] The third relay electrode 83 is electrically connected to a fourth relay electrode 84 disposed on the seventh conductive layer, and the fourth relay electrode 84 is electrically connected to the second capacitance electrode 52 of the first capacitance element 50.

[0064] The third relay electrode 83 is formed so as to extend into the first contact hole CNT11 in the region overlapping with the first contact hole CNT11. The first layer 83a, the second layer 83b, and the third layer 83c are provided along the inner surface of the first contact hole CNT11. More specifically, the first layer 83a is routed along the inner surface of the first contact hole CNT11 and is electrically connected to the fourth relay electrode 84 located on the bottom surface of the first contact hole CNT11. The second layer 83b is arranged along the surface of the first layer 83a, and the third layer 83c is arranged along the surface of the second layer 83b, and thus are arranged along the inner surface of the first contact hole CNT11.

[0065] The aluminum constituting the first layer 83a of the third relay electrode 83 is easily etched by the resist film remover used in the patterning process. The first layer 83a tends to have poor adhesion and a thin film thickness inside the contact hole. Therefore, if the first layer 83a is etched, there is a risk that the reliability of the electrical connection will be reduced. In contrast, in the present embodiment, in the process of patterning the third relay electrode 83, the first layer 83a is covered and protected by the second layer 83b and the third layer 83c, thereby suppressing etching of the first layer 83a and improving the reliability of the electrical connection.

[0066] As shown in Figures 6 and 7, the first capacitance electrode 51 of the first capacitance element 50 and the third capacitance electrode 61 of the second capacitance element 60 are electrically connected to the common wiring 18 via a first relay electrode 81 arranged on the seventh conductive layer and a second relay electrode 82 arranged on the fourth conductive layer.

[0067] The common wiring 18 is provided so as to penetrate into the third contact hole CNT13 in the region overlapping with the third contact hole CNT13. The first layer 18a, the second layer 18b, and the third layer 18c are provided along the inner surface of the third contact hole CNT13. More specifically, the first layer 18a is routed along the inner surface of the third contact hole CNT13 and is electrically connected to the first relay electrode 81 located on the bottom surface of the third contact hole CNT13. The second layer 18b is arranged along the surface of the first layer 18a, and the third layer 18c is arranged along the surface of the second layer 18b, and thus are arranged along the inner surface of the third contact hole CNT13.

[0068] The aluminum constituting the first layer 18a of the common wiring 18 is easily etched by the resist film remover used in the patterning process. The first layer 18a tends to have poor adhesion and a thin film thickness inside the contact hole. Therefore, if the first layer 18a is etched, there is a risk that the reliability of the electrical connection will be reduced. In contrast, in the present embodiment, in the process of patterning the common wiring 18, the first layer 18a is covered and protected by the second layer 18b and the third layer 18c, so that etching of the first layer 18a is suppressed and the reliability of the electrical connection is improved.

[0069] As shown in FIG. 7 , the second relay electrode 82 is electrically connected to the third capacitance electrode 61 of the second capacitance element 60. Although not shown in detail, the third capacitance electrode 61 includes a protruding portion 61a that protrudes in a planar manner. The second relay electrode 82 is electrically connected to this protruding portion 61a. The second capacitance electrode 52 of the first capacitance element 50 and the fourth capacitance electrode 62 of the second capacitance element 60 are electrically connected to the pixel electrode 11 and the drain 31d of the TFT 30. Note that, instead of the first capacitance element 50, a relay electrode may be used to electrically connect the fourth capacitance electrode 62 of the second capacitance element 60 and the drain 31d of the TFT 30.

[0070] The pixel electrode 11 is electrically connected to the third relay electrode 83 disposed on the eighth conductive layer. In particular, the pixel electrode 11 is electrically connected to the third relay electrode 83 via the second contact hole CNT12. In the third relay electrode 83, a second layer 83b and a third layer 83c are coated on the first layer 83a in a region including a region where the third relay electrode 83 overlaps with the second contact hole CNT12. In this embodiment, the second layer 83b coats the first layer 83a, and the third layer 83c coats the second layer 83b. In other words, the second layer 83b and the third layer 83c are interposed between the pixel electrode 11 and the first layer 83a.

[0071] Here, when aluminum and ITO are electrically connected directly, electrolytic corrosion is likely to occur between them, which may result in disconnection of the aluminum or insulation due to the generation of alumina. In contrast, in this embodiment, titanium and ITO are connected, so the occurrence of electrolytic corrosion in the region including the second contact hole CNT12 is suppressed, improving the reliability of the electrical connection. Note that only the second layer 83b may be coated on the first layer 83a. Even in this case, the occurrence of electrolytic corrosion is suppressed by connecting titanium nitride and ITO, so the reliability of the electrical connection can be improved.

[0072] The signal wiring such as the scanning line 13 and the common wiring 18, the TFT 30, and the first relay electrode 81, which constitute the functional layer, are provided in the light-shielding region SD that partitions the plurality of pixels P in a planar manner.

[0073] The element substrate 10 can be manufactured by known methods applied to known semiconductor processes, such as low-pressure CVD (Chemical Vapor Deposition), atmospheric CVD, plasma CVD, photolithography, sputtering, etching, and CMP (Chemical Mechanical Planarization).

[0074] FIG. 8 is a plan view showing the configuration of the common wiring and the third relay electrode. As shown in Fig. 8, the common wirings 18 are arranged in a stripe pattern along the Y axis. The element substrate 10 includes a common wiring 18 as a first wiring in the center of Fig. 8 and common wirings 18 as second wirings adjacent to each other in the direction along the X axis. In plan view, third relay electrodes 83 are provided between the adjacent common wirings 18. This allows the common wirings 18 and the third relay electrodes 83 to be arranged at a distance from each other.

[0075] 8 shows the area corresponding to that shown in FIG. 4. In addition, the area of ​​the common wiring 18 to which a laminated structure consisting of a first layer 18a, a second layer 18b, and a third layer 18c is applied is indicated by hatching. Similarly, in the third relay electrode 83, the area to which a laminated structure consisting of a first layer 83a, a second layer 83b, and a third layer 83c is applied is indicated by hatching. Furthermore, the boundary between a main body portion 18M and a protrusion portion 18P, which will be described later, is indicated by a dashed line.

[0076] The common wiring 18 has a main body 18M and a protrusion 18P. The main body 18M extends in the direction along the Y-axis. The protrusion 18P protrudes from the main body 18M in the -X direction. The main body 18M and the protrusion 18P are examples of a second main body and a second protrusion of the present invention.

[0077] The protrusion 18P has a first layer 18a and a second layer 18b provided in a region including a region that overlaps in plan with the third contact hole CNT13. More specifically, the third contact hole CNT13 is disposed in a region that includes a region that overlaps in plan with the vicinity of the end of the protrusion 18P in the −X direction.

[0078] The common wiring 18 is electrically connected to the first capacitance electrode 51 of the first capacitance element 50 described above via the third contact hole CNT13.

[0079] The second layer 18b and the third layer 18c are not provided in at least a part of the main body portion 18M. That is, in this embodiment, the second layer 18b and the third layer 18c are not provided over the entire area of ​​the main body portion 18M in plan view. Furthermore, the second layer 18b and the third layer 18c are not provided in part of the protruding portion 18P in the +X direction on the common wiring 18 side.

[0080] This arrangement is suitable when the interval along the X-axis between adjacent common wirings 18 is relatively wide. In other words, because the interval is relatively wide, the functions of the second layer 18b and the third layer 18c are sufficiently exhibited around the third contact hole CNT13 even if the areas of the second layer 18b and the third layer 18c are relatively small. This reduces the excess second layer 18b and the third layer 18c around the third contact hole CNT13. Therefore, while improving the reliability of the electrical connection around the third contact hole CNT13, the exposed area of ​​the first layer 18a is increased, further suppressing heat generation inside the element substrate 10.

[0081] The third relay electrode 83 has a main body portion 83M and a protrusion portion 83P. The main body portion 83M is island-shaped and extends in the direction along the X-axis. The protrusion portion 83P protrudes from the main body portion 83M in the +Y direction. The main body portion 83M and the protrusion portion 83P are examples of a first main body portion and a first protrusion portion of the present invention.

[0082] The third relay electrode 83 has a first layer 83a, a second layer 83b, and a third layer 83c provided in a region including a region overlapping in plan with the first contact hole CNT11 and the second contact hole CNT12. Specifically, the first contact hole CNT11 is arranged in a region including a region overlapping in plan with the vicinity of the end of the main body 83M in the -X direction. The second contact hole CNT12 is arranged in a region including a region overlapping in plan with the protrusion 83P. In the third relay electrode 83, the entire first layer 83a is covered in plan with the second layer 83b and the third layer 83c.

[0083] The protrusion 83P is electrically connected to the pixel electrode 11 through the second contact hole CNT12. The main body 83M is electrically connected to the TFT 30 through the first contact hole CNT11.

[0084] The first layers 18a, 83a, the second layers 18b, 83b, and the third layers 18c, 83c may be formed by known techniques such as sputtering. In the direction along the Z axis, the first layers 18a, 83a have a thickness of, for example, 0.35 μm, the second layers 18b, 83b have a thickness of, for example, 0.13 μm, and the third layers 18c, 83c have a thickness of, for example, 0.02 μm.

[0085] The liquid crystal device 100 of this embodiment has the following advantages.

[0086] According to the liquid crystal device 100 of this embodiment, the aperture ratio and the reliability of the electrical connections at the first contact hole CNT11, the second contact hole CNT12, and the third contact hole CNT13 are improved, and heat generation inside the element substrate 10 can be suppressed. More specifically, the third relay electrode 83 and the pixel electrode 11 are electrically connected at the second contact hole CNT12, which is arranged in a region including a region overlapping with the protrusion 83P in a planar manner. Therefore, compared to when the second contact hole CNT12 is arranged in a region including a region overlapping with the main body 83M of the third relay electrode 83 in a planar manner, it is possible to make the main body 83M thinner in a planar manner and reduce its area. This allows the aperture ratio to be improved.

[0087] Because the protrusions 18P, 83P have a laminated structure of aluminum, titanium nitride, and titanium, the first contact hole CNT11 and the third contact hole CNT13 also have a laminated structure of aluminum, titanium nitride, and titanium. Therefore, when patterning the third relay electrode 83 and the common wiring 18, the first layers 18a, 83a are protected by the second layers 18b, 83b and the third layers 18c, 83c, and etching of the first layers 18a, 83a is suppressed. This improves the reliability of the electrical connection via the first contact hole CNT11 and the third contact hole CNT13.

[0088] The third layer 18c covering the outermost surface of the common wiring 18 is highly reflective to light L, thereby suppressing heat generation inside the element substrate 10 due to absorption of light L in the common wiring 18. Furthermore, the second layer 18b and the third layer 18c are not provided in at least a portion of the common wiring 18, i.e., in a portion of the main body 18M and the protrusion 18P. The first layer 18a is more reflective to light L than the second layer 18b and the third layer 18c, thereby suppressing heat generation inside the element substrate 10 due to absorption of light L. This makes it possible to suppress heat generation in the liquid crystal device 100.

[0089] The second contact hole CNT12 is provided in a region overlapping with the protrusion 83P of the third relay electrode 83 having a laminated structure. Therefore, the second layer 83b and the third layer 83c are interposed between the first layer 83a and the pixel electrode 11, which can suppress the occurrence of electrolytic corrosion and improve the reliability of the electrical connection.

[0090] As described above, according to this embodiment, it is possible to provide a liquid crystal device 100 that improves the aperture ratio and the reliability of the electrical connection between the first contact hole CNT11 and the third contact hole CNT13, and suppresses heat generation inside the element substrate 10.

[0091] (Second embodiment) A liquid crystal device as an electro-optical device according to this embodiment will be described with reference to Figures 9 to 11. The liquid crystal device of the second embodiment is different from the liquid crystal device 100 of the above embodiment in that the region where the second layer 18b of the common wiring 18 is provided is changed. Therefore, the same components as those in the first embodiment will be denoted by the same reference numerals, and duplicated descriptions will be omitted.

[0092] Fig. 9 is a plan view showing the configuration of a third relay electrode according to the second embodiment. Similar to Fig. 8, Fig. 9 shows the region corresponding to Fig. 4. Furthermore, in the common wiring 18, the region to which a laminated structure consisting of a first layer 18a, a second layer 18b, and a third layer 18c is applied is indicated by hatching. Similarly, in the third relay electrode 83, the region to which a laminated structure consisting of a first layer 83a, a second layer 83b, and a third layer 83c is applied is indicated by hatching.

[0093] 9, the second layer 18b and the third layer 18c are not provided in at least a part of the main body portion 18M. That is, in this embodiment, the second layer 18b and the third layer 18c are provided along the X axis in a plan view over the entire area of ​​the protrusion 18P and over a part of the area of ​​the main body portion 18M.

[0094] Fig. 10 is a cross-sectional view showing the structure of the element substrate taken along line β1-β2 in Fig. 4. Fig. 11 is a cross-sectional view showing the structure of the element substrate taken along line α1-α2 in Fig. 4. More specifically, as shown in Fig. 10, in the cross section taken along line segment β1-β2, second layer 18b and third layer 18c are laminated on a portion of first layer 18a. Fig. 10 shows the region corresponding to Fig. 5. Furthermore, as shown in Fig. 11, in the cross section taken along line segment α1-α2, the entire area of ​​first layer 18a is covered with second layer 18b and third layer 18c. Fig. 11 shows the region corresponding to Fig. 6.

[0095] The above arrangement is suitable when the interval along the X-axis between adjacent common wirings 18 is relatively narrow. That is, because the interval is relatively narrow, the areas of the second layer 18b and the third layer 18c can be made relatively large around the third contact hole CNT13, so that the second layer 18b can sufficiently exhibit the function of suppressing electrolytic corrosion and oxidation, while the third layer 18c can exhibit the function of improving light reflectance.

[0096] According to this embodiment, it is possible to obtain the same effects as those of the above embodiment.

[0097] 11, in the third relay electrode 83, the first layer 83a and the second layer 83b are provided along the inner surface of the first contact hole CNT11, and the third layer 83c fills the first contact hole CNT11. This allows the third layer 83c to flatten the depression caused by the first contact hole CNT11. This facilitates the film formation process when manufacturing layers above the first contact hole CNT11. Furthermore, the first layer 18a and the second layer 18b of the common wiring 18 are provided along the inner surface of the third contact hole CNT13, and the third layer 18c fills the third contact hole CNT13. This allows the third layer 18c to flatten the depression caused by the third contact hole CNT13. This facilitates the film formation process when manufacturing layers above the third contact hole CNT13.

[0098] (Third embodiment) In this embodiment, the electronic device is exemplified by a projection display device 1000. The projection display device 1000 according to this embodiment is equipped with a liquid crystal device 100 as the electro-optical device of the above-described embodiment. The projection display device 1000 is a liquid crystal projector.

[0099] FIG. 12 is a schematic diagram showing the configuration of a projection display device according to the third embodiment. As shown in Figure 12, the projection display device 1000 includes a polarized lighting device 1100 arranged along a system optical axis LS, two dichroic mirrors 1104 and 1105 as light separation elements, three reflecting mirrors 1106, 1107, and 1108, five relay lenses 1201, 1202, 1203, 1204, and 1205, three transmissive liquid crystal light valves 1210, 1220, and 1230 as light modulation elements, a cross dichroic prism 1206 as a light combining element, and a projection lens 1207.

[0100] Polarized illumination device 1100 is generally composed of lamp unit 1101 as a light source, which is a white light source such as an extra-high pressure mercury lamp or a halogen lamp, integrator lens 1102, and polarization conversion element 1103.

[0101] Dichroic mirror 1104 reflects red light (R) and transmits green light (G) and blue light (B) out of the polarized light beam emitted from polarized lighting device 1100. Another dichroic mirror 1105 reflects green light (G) that has passed through dichroic mirror 1104 and transmits blue light (B).

[0102] Red light (R) reflected by dichroic mirror 1104 is reflected by reflecting mirror 1106 and then passes through relay lens 1205 before entering liquid crystal light valve 1210. Green light (G) reflected by dichroic mirror 1105 passes through relay lens 1204 before entering liquid crystal light valve 1220. Blue light (B) transmitted through dichroic mirror 1105 passes through a light guide system consisting of three relay lenses 1201, 1202, and 1203 and two reflecting mirrors 1107 and 1108 before entering liquid crystal light valve 1230.

[0103] Liquid crystal light valves 1210, 1220, and 1230 are disposed opposite the respective color light entrance surfaces of cross dichroic prism 1206. The color light entering liquid crystal light valves 1210, 1220, and 1230 is modulated based on video information (video signals) and emitted toward cross dichroic prism 1206.

[0104] The cross dichroic prism 1206 is made by bonding four right-angle prisms together, and on their inner surfaces, a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are arranged in a cross shape. These dielectric multilayer films combine the three colored lights to generate light that represents a color image. The combined light is projected onto a screen 1300 by a projection lens 1207, which is a projection optical system, and the image is enlarged and displayed.

[0105] The liquid crystal device 100 described above is applied to the liquid crystal light valve 1210. The other liquid crystal light valves 1220 and 1230 are similar.

[0106] According to such a projection display device 1000, since the projection display device 1000 includes the liquid crystal device 100 of the first embodiment, the reliability of the electrical connection is improved in the region including the first contact hole CNT11, the second contact hole CNT12, and the third contact hole CNT13 of the element substrate 10. Furthermore, it is possible to suppress heat generation inside the element substrate 10. Note that similar effects can be obtained when the liquid crystal device of the second embodiment is used as the liquid crystal light valves 1210, 1220, and 1230.

[0107] In addition to the projection display device 1000, the liquid crystal device 100 may be installed in various electronic devices such as an EVF (Electrical View Finder), a mobile mini projector, a head-up display, a smartphone, a mobile phone, a mobile computer, a digital camera, a digital video camera, a display, an in-vehicle device, an audio device, an exposure device, and a lighting device.

[0108] The technical scope of the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit of the present invention. Furthermore, one aspect of the present invention can be a configuration in which the characteristic portions of the above-described embodiments are appropriately combined.

[0109] Summary of this disclosure A summary of this disclosure is provided below.

[0110] (Appendix 1) A pixel electrode; a first wiring having a first layer, a second layer, and a third layer; a transistor at least partially overlapping with the first wiring in a plan view; a data line provided in a layer between the first wiring and the transistor, at least a portion of which overlaps with the first wiring in a plan view, and electrically connected to the pixel electrode via the transistor; the first layer has light reflectivity and is disposed closer to the transistor than the second layer and the third layer; the second layer is provided between the first layer and the third layer and has a lower light reflectance than the first layer; The third layer has a higher light reflectance than the second layer. Electro-optical device characterized by:

[0111] In the electro-optical device having the configuration of Appendix 1, the third layer covering the outermost surface of the first wiring is highly reflective to light, and therefore, it is possible to suppress the generation of heat caused by the first wiring absorbing light. Therefore, with this configuration, it is possible to provide an electro-optical device in which heat generation is suppressed.

[0112] (Appendix 2) a relay layer provided in the same layer as the first wiring, extending along a first direction, and electrically connected to the transistor via a first contact hole; and a first protrusion protruding from the first body portion in a second direction intersecting the first direction, and electrically connected to the pixel electrode via a second contact hole; the relay layer has the first layer, the second layer, and the third layer; 2. The electro-optical device according to claim 1,

[0113] According to the configuration of Supplementary Note 2, the relay layer that electrically connects the transistor and the pixel electrode can be configured with a stacked structure of the first layer, the second layer, and the third layer.

[0114] (Appendix 3) At least the first layer and the second layer of the relay layer are provided along the inner surface of the second contact hole. 3. The electro-optical device according to claim 2.

[0115] According to the configuration of Supplementary Note 3, the first layer provided in the second contact hole is covered with the second layer, so that the first layer in the second contact hole can be prevented from being etched when the relay layer is patterned.

[0116] (Appendix 4) the third layer of the relay layer flattens a recess formed by the second contact hole. 4. The electro-optical device according to claim 3.

[0117] According to the configuration of Supplementary Note 4, the film formation process for manufacturing the layer above the second contact hole becomes easier.

[0118] (Appendix 5) further comprising a second wiring adjacent to the first wiring, The relay layer is provided between the first wiring and the second wiring in a plan view. 5. The electro-optical device according to claim 2, wherein the first electrode is a first electrode.

[0119] According to the configuration of Supplementary Note 5, the first wiring and the second wiring can be arranged in a spaced-apart state from the relay layer.

[0120] (Appendix 6) the first wiring has a second body portion extending along the second direction, and a second protrusion portion protruding from the second body portion in the first direction and electrically connected to a capacitance element provided corresponding to the pixel electrode via a third contact hole; 5. The electro-optical device according to claim 2, wherein the first electrode is a first electrode.

[0121] According to the configuration of Supplementary Note 6, it is possible to realize a configuration in which the first wiring and the capacitive element provided corresponding to the pixel electrode are electrically connected to each other.

[0122] (Appendix 7) At least the first layer and the second layer of the first wiring are provided along the inner surface of the third contact hole. 7. The electro-optical device according to claim 6,

[0123] According to the configuration of Supplementary Note 7, the first layer provided in the third contact hole is covered with the second layer, so that the first layer in the third contact hole can be prevented from being etched when the first wiring is patterned.

[0124] (Appendix 8) the third layer of the first wiring flattens a recess formed by the third contact hole; 8. The electro-optical device according to claim 7,

[0125] According to the configuration of Supplementary Note 8, the film formation process for manufacturing the layer above the third contact hole becomes easier.

[0126] (Appendix 9) the second layer and the third layer are not provided on at least a part of the second body portion of the first wiring; 9. The electro-optical device according to claim 6, wherein the first electrode is a conductor.

[0127] According to the configuration of Supplementary Note 9, by exposing the first layer on the surface of the main body, the light reflectivity of the second main body can be increased, and heat generation due to light absorption by the first wiring can be efficiently suppressed.

[0128] (Appendix 10) In the second protruding portion of the first wiring, the second layer and the third layer are not provided in a part of the first wiring on the main body side. 10. The electro-optical device according to any one of Supplementary Note 6 to Supplementary Note 9,

[0129] According to the configuration of Supplementary Note 10, even if the areas of the second and third layers are made relatively small around the third contact hole, the functions of the second and third layers are sufficiently exhibited.

[0130] (Appendix 11) the second layer and the third layer are provided along the first direction on the second protrusion portion of the first wiring and on a part of the second main body portion of the first wiring; 10. The electro-optical device according to any one of Supplementary Note 6 to Supplementary Note 9,

[0131] According to the configuration of Supplementary Note 11, the excess second and third layers are reduced around the third contact hole, which improves the reliability of the electrical connection around the third contact hole and increases the exposed area of ​​the first layer, thereby increasing the light reflectivity.

[0132] (Appendix 12) the first layer comprises aluminum; the second layer comprises titanium nitride; the third layer comprises titanium; 12. The electro-optical device according to claim 1, wherein the first electrode is a conductor.

[0133] According to the configuration of Supplementary Note 12, the first wiring can be configured with a laminated structure of aluminum, titanium nitride, and titanium. Therefore, the first wiring can reflect light by the titanium covering the outermost surface, and heat generation due to light absorption can be efficiently suppressed.

[0134] (Appendix 13) A constant potential is applied to the first wiring. 5. The electro-optical device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

[0135] According to the configuration of Supplementary Note 13, it is possible to suppress heat generation in the first wiring to which a constant potential is applied.

[0136] (Appendix 14) An electro-optical device comprising the electro-optical device according to any one of Supplementary Note 1 to Supplementary Note 13. An electronic device characterized by:

[0137] According to the electronic device having the configuration of Supplementary Note 14, since the electronic device includes an electro-optical device that suppresses heat generation inside the substrate, it is possible to provide an electronic device that suppresses heat generation. [Explanation of symbols]

[0138] 11...pixel electrode, 18...common wiring (first wiring or second wiring), 18a, 83a...first layer, 18b, 83b...second layer, 18c, 83c...second layer, 83M...main body portion (first main body portion), 18M...main body portion (second main body portion), 83P...protrusion portion (first protrusion portion), 18P...protrusion portion (second protrusion portion), 30...TFT (transistor), 50...first capacitance element, 60...second capacitance element, 83...third relay electrode (relay layer), 100...liquid crystal device (electro-optical device), 1000...projection display device (electronic device), CNT11...first contact hole, CNT12...second contact hole, CNT13...third contact hole.

Claims

1. A pixel electrode; a first wiring having a first layer, a second layer, and a third layer; a transistor at least partially overlapping with the first wiring in a plan view; a data line provided in a layer between the first wiring and the transistor, at least a portion of which overlaps the first wiring in a plan view, and which is electrically connected to the pixel electrode via the transistor; the first layer has light reflectivity and is disposed closer to the transistor than the second layer and the third layer; the second layer is provided between the first layer and the third layer and has a lower light reflectance than the first layer; The third layer has a higher light reflectance than the second layer. Electro-optical device.

2. a relay layer provided in the same layer as the first wiring, extending along a first direction, and electrically connected to the transistor via a first contact hole; and a first protrusion protruding from the first body portion in a second direction intersecting the first direction, and electrically connected to the pixel electrode via a second contact hole, the relay layer includes the first layer, the second layer, and the third layer; 2. The electro-optical device according to claim 1.

3. At least the first layer and the second layer of the relay layer are provided along the inner surface of the second contact hole.

3. The electro-optical device according to claim 2.

4. the third layer of the relay layer flattens a recess formed by the second contact hole.

4. The electro-optical device according to claim 3.

5. further comprising a second wiring adjacent to the first wiring, The relay layer is provided between the first wiring and the second wiring in a plan view.

5. The electro-optical device according to claim 2, wherein the first and second electrodes are electrically connected to each other.

6. the first wiring has a second body portion extending along the second direction, and a second protrusion portion protruding from the second body portion in the first direction and electrically connected to a capacitance element provided corresponding to the pixel electrode via a third contact hole; 5. The electro-optical device according to claim 2, wherein the first and second electrodes are electrically connected to each other.

7. At least the first layer and the second layer of the first wiring are provided along the inner surface of the third contact hole.

7. The electro-optical device according to claim 6.

8. the third layer of the first wiring flattens a recess formed by the third contact hole; 8. The electro-optical device according to claim 7.

9. the second layer and the third layer are not provided on at least a part of the second body portion of the first wiring; 7. The electro-optical device according to claim 6.

10. In the second protruding portion of the first wiring, the second layer and the third layer are not provided in a part of the first wiring on the second main body portion side.

7. The electro-optical device according to claim 6.

11. the second layer and the third layer are provided along the first direction on the second protruding portion of the first wiring and on a part of the second main body portion of the first wiring; 7. The electro-optical device according to claim 6.

12. the first layer comprises aluminum; the second layer comprises titanium nitride; the third layer comprises titanium; 5. The electro-optical device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

13. A constant potential is applied to the first wiring.

5. The electro-optical device according to claim 1, wherein the first and second electrodes are electrically connected to each other.

14. 5. An electro-optical device comprising: an electro-optical device according to claim 1; An electronic device characterized by:

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