Wide-gap semiconductor composite substrate and method for manufacturing the same

Abstract

To reduce the manufacturing cost of SiC composite substrates.SOLUTION: A SiC composite substrate 10 includes a polycrystalline SiC substrate 11, a single-crystal SiC layer 13, a SiC interface bonding layer 12 interposed between the top surface of the polycrystalline SiC substrate 11 and the bottom surface of the single-crystal SiC layer 13, bonding the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13, and the SiC interface bonding layer 12 is formed by solidifying an organic SiC polymer 19 through heat treatment.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a wide-gap semiconductor composite substrate and a method for manufacturing the same. [Background technology]

[0002] In recent years, there has been an increasing demand for wide-gap semiconductor materials for power devices that handle high voltages, such as those used in electric vehicles and railway vehicles. In particular, SiC, a representative wide-gap semiconductor material for power devices, has been commercialized, and many products equipped with SiC power devices are now on the market both domestically and internationally.

[0003] However, the single-crystal SiC composite substrates used in these applications generally require a sublimation method, which requires high temperatures of over 2000°C, resulting in severe equipment wear and low yields, which creates a problem of high costs for devices using SiC composite substrates. Furthermore, the thickness of the single-crystal SiC layer in the SiC composite substrate required for actual device fabrication is generally around 100 μm, but currently, to prevent cracking of the single-crystal SiC layer and to ensure physical durability, it is cut out to a thickness of around 350 μm.

[0004] Therefore, various methods have been proposed to reduce costs. For example, as shown in Patent Document 1, a method has been proposed in which a brittle layer is formed in a single-crystal SiC substrate by implanting ions such as hydrogen, and then the substrate is heated to cause cracks to propagate and peel off, forming a thinned single-crystal SiC layer. Using this method, a technology exists in which a polycrystalline SiC substrate grown from a graphite substrate or the like is bonded to the substrate, replacing the mechanical properties with a cost-effective polycrystalline substrate. Furthermore, Patent Document 2 proposes a method in which polycrystalline SiC is layered on a thinned single-crystal SiC layer by chemical vapor deposition (CVD). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-015401 [Patent Document 2] International Publication No. 2017 / 047509

[0006] [overview] However, the technique of bonding thinned single-crystal SiC substrates by peeling them off at the brittle layer formed by ion implantation involves a process of irradiating the bonding surfaces of the single-crystal SiC layer and polycrystalline SiC substrate with a fast atomic beam such as Ar to amorphize them, which can introduce defects around the bonding interface. Furthermore, bonding requires the bonding surfaces to have an arithmetic mean roughness Ra of less than 1 nm, which requires chemical mechanical polishing (CMP), which can ultimately result in high costs. The method of performing CVD growth on thinned single-crystal SiC substrates requires back-grinding after growth of the polycrystalline SiC substrate, which can lead to warping of the SiC composite substrate due to the Twyman effect.

[0007] The present disclosure has been proposed in view of the above-described circumstances, and aims to provide a wide-gap semiconductor composite substrate and a manufacturing method thereof, which are formed by bonding thinned single-crystal wide-gap semiconductor substrates together, and which reduce defects around the bonding interface and do not require CMP or the like to reduce the surface roughness of the bonding surfaces.

[0008] In order to solve the above-described problems, the wide gap semiconductor composite substrate of the present disclosure includes a substrate, a single-crystal wide gap semiconductor layer, and a SiC interface adhesion layer interposed between the top surface of the substrate and the bottom surface of the single-crystal wide gap semiconductor layer to bond the substrate and the single-crystal wide gap semiconductor layer.

[0009] The method for manufacturing a wide-gap semiconductor composite substrate of the present disclosure includes the steps of applying an organic SiC polymer to the top surface of the substrate, bonding a single-crystal wide-gap semiconductor layer to the top surface of the substrate with the applied SiC organic polymer interposed therebetween to bond the top surface of the substrate and the bottom surface of the single-crystal wide-gap semiconductor layer with the SiC organic polymer, and solidifying the organic SiC polymer by heat treatment to form a SiC interfacial adhesive layer. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a cross-sectional view of a SiC composite substrate according to the first embodiment. [Figure 2A] FIG. 2A is a process diagram of the SiC composite substrate according to the first embodiment. [Figure 2B] FIG. 2B is a process diagram of the SiC composite substrate according to the first embodiment. [Figure 2C] FIG. 2C is a process diagram of the SiC composite substrate according to the first embodiment. [Figure 2D] FIG. 2D is a process diagram of the SiC composite substrate according to the first embodiment. [Figure 2E] FIG. 2E is a process diagram of the SiC composite substrate according to the first embodiment. [Figure 2F] FIG. 2F is a process diagram of the SiC composite substrate according to the first embodiment. [Figure 2G] FIG. 2G is a process diagram of the SiC composite substrate according to the first embodiment. [Figure 2H] FIG. 2H is a process diagram of the SiC composite substrate according to the first embodiment. [Figure 2I] FIG. 2I is a process diagram of the SiC composite substrate according to the first embodiment. [Figure 2J] FIG. 2J is a process diagram of the SiC composite substrate according to the first embodiment. [Figure 3] FIG. 3 is a cross-sectional view of the SiC composite substrate according to the second embodiment. [Figure 4A] FIG. 4A is a process diagram of the SiC composite substrate according to the second embodiment. [Figure 4B]FIG. 4B is a process diagram of the SiC composite substrate according to the second embodiment. [Figure 4C] FIG. 4C is a process diagram of the SiC composite substrate according to the second embodiment. [Figure 4D] FIG. 4D is a process diagram of the SiC composite substrate according to the second embodiment. [Figure 4E] FIG. 4E is a process diagram of the SiC composite substrate according to the second embodiment. [Figure 4F] FIG. 4F is a process diagram of the SiC composite substrate according to the second embodiment. [Figure 5] FIG. 5 is a cross-sectional view of the composite substrate according to the third embodiment. [Figure 6A] FIG. 6A is a process diagram of the SiC composite substrate according to the third embodiment. [Figure 6B] FIG. 6B is a process diagram of the SiC composite substrate according to the third embodiment. [Figure 6C] FIG. 6C is a process diagram of the SiC composite substrate according to the third embodiment. [Figure 6D] FIG. 6D is a process diagram of the SiC composite substrate according to the third embodiment. [Figure 6E] FIG. 6E is a process diagram of the SiC composite substrate according to the third embodiment. [Figure 6F] FIG. 6F is a process diagram of the SiC composite substrate according to the third embodiment. [Figure 6G] FIG. 6G is a process diagram of the SiC composite substrate according to the third embodiment. [Figure 7] FIG. 7 is a cross-sectional view of a Schottky barrier diode. [Figure 8] FIG. 8 is a cross-sectional view of a trench structure MOSFET.

[0011] [Detailed Description of the Invention] Hereinafter, embodiments of the wide-gap semiconductor composite substrate and its manufacturing method of the present disclosure will be described in detail with reference to the drawings. In this embodiment, the wide-gap semiconductor will be described using SiC, a semiconductor IV-IV compound semiconductor. However, the wide-gap semiconductor of the present disclosure is not limited to SiC, and can be similarly applied to other types of wide-gap semiconductors such as III-V and II-VI compound semiconductors, diamond semiconductors, and oxide semiconductors. Furthermore, the substrate in the wide-gap semiconductor composite substrate of this embodiment will be described as being composed of a polycrystalline SiC substrate. However, the substrate is not limited to a polycrystalline SiC substrate, and may be composed of a single-crystal SiC substrate, an insulator such as glass, or a semiconductor such as Si. Furthermore, the SiC crystal in this embodiment is assumed to be of the 4H crystal polytype, but is not limited to this and may be of other crystal polytypes such as 6H and 3C.

[0012] The embodiments described below are comprehensive or specific examples, and the numerical values, shapes, materials, components, installation positions, and connection forms of the components are merely examples and are not intended to limit the present disclosure. Furthermore, among the components in the following embodiments, any component not recited in an independent claim representing a superordinate concept will be described as an optional component. Furthermore, the dimensional proportions in the drawings are exaggerated for the sake of explanation and may differ from the actual proportions. Furthermore, the following embodiments and their variations may include similar components, and the same reference numerals will be used to denote similar components, and redundant explanations will be omitted.

[0013] (First embodiment) 1 is a cross-sectional view of a SiC composite substrate 10 according to a first embodiment. The SiC composite substrate 10 includes a polycrystalline SiC substrate 11, a single-crystal SiC layer 13, and a SiC interfacial adhesive layer 12 that is interposed between the top surface of the polycrystalline SiC substrate 11 and the bottom surface of the single-crystal SiC layer 13 and bonds the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13 together.

[0014] In the SiC composite substrate 10, the polycrystalline SiC substrate 11 is arranged so that its bottom surface is a C-plane and its top surface is a Si-plane, and may have a thickness of 50 μm or more. Similarly to the polycrystalline SiC substrate 11, the single-crystal SiC layer 13 is also arranged so that its bottom surface is a C-plane and its top surface is a Si-plane, and may have a thickness in the range of 10 nm to 100 μm. As will be described later, the bottom surface of the single-crystal SiC layer 13 is a peeled surface formed by cleavage, and therefore the surface is rough and uneven.

[0015] The SiC interfacial bonding layer 12 is interposed between the top surface of the polycrystalline SiC substrate 11 and the bottom surface of the single-crystal SiC layer 13, bonding the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13 together. The SiC interfacial bonding layer 12 is formed by heat-treating polycarbosilane, an organic SiC polymer that is a precursor of SiC containing at least the three elements Si, C, and H, and solidifying it into SiC through hardening and crystallization to form a ceramic. The SiC interfacial bonding layer 12 has a thickness ranging from 100 nm to 100 μm, contains particles with a diameter ranging from 10 nm to 10 μm at the interface with the single-crystal SiC layer, and may contain at least one of micropores, mesopores, and macropores with a diameter ranging from 1 nm to 10 μm. The SiC interfacial bonding layer 12 has at least one function of improving adhesion between the substrate and the single-crystal wide-gap semiconductor layer, electrical conductivity, thermal conductivity, and mechanical strength. The organic SiC polymer is not limited to polycarbosilane, and at least one of polycarbosilane, polycarbosilazane, polymetalloxane, and polysiloxane may be used.

[0016] A method for manufacturing the SiC composite substrate 10 of the first embodiment will be described with reference to the process diagrams of FIGS. 2A to 2J. First, as shown in FIG. 2A, a single-crystal SiC substrate 14 is provided. The single-crystal SiC substrate 14 has a C-plane as its bottom surface and a Si-plane as its top surface, and may be a wafer with a diameter of 4 inches. As shown in FIG. 2B, an oxide film 15 is grown on the Si-plane as its top surface of the single-crystal SiC substrate 14 by a CVD method. The thickness of the oxide film 15 may be, for example, 200 nm.

[0017] As shown in FIG. 2C, hydrogen ions are implanted toward the top surface of the single-crystal SiC substrate 14 on which the oxide film 15 is formed. The hydrogen ions have, for example, an energy of 150 keV and a dose of 7×10 16 atoms / cm 2 The implantation of hydrogen ions forms a brittle layer 14a in the single-crystal SiC substrate 14, the crystal structure of which is damaged, at a predetermined depth from the top surface. Oxide film 15 protects the top surface of single-crystal SiC substrate 14 from ion irradiation. The portion of single-crystal SiC substrate 14 from the top surface to the depth of brittle layer 14a becomes single-crystal SiC layer 13 of SiC composite substrate 10, as described below.

[0018] 2D, Si substrate 16 having oxide film 17 formed on its bottom surface was prepared as a support substrate, and oxide film 15 formed on the top surface of single-crystal SiC substrate 14 and oxide film 17 formed on the bottom surface of Si substrate 16 were each activated by irradiating them with an Ar beam in a vacuum. Oxide film 17 formed on the bottom surface of Si substrate 16 may be formed by a CVD method and may have a thickness of, for example, 200 nm.

[0019] 2E, oxide film 15 formed on the top surface of single-crystal SiC substrate 14 and oxide film 17 formed on the bottom surface of Si substrate 16 are bonded at room temperature. By room-temperature bonding, oxide film 15 formed on the top surface of single-crystal SiC substrate 14 and oxide film 17 formed on the bottom surface of Si substrate 16 form a single oxide film 18. Within oxide film 18, bonded surface 18a formed by room-temperature bonding is shown.

[0020] As shown in Figure 2F, the single crystal SiC substrate 14 is separated at the fragile layer 14a. For example, by driving a wedge into the fragile layer 14a from the edge surface of the single crystal SiC substrate 14, the portion from the top surface of the single crystal SiC substrate 14 to the fragile layer 14a can be cleaved and separated at the fragile layer 14a. By separating, the portion from the top surface to the fragile layer 14a can be separated as a thinned single crystal SiC layer 13 of the single crystal SiC substrate 14. The bottom surface of the single crystal SiC layer 13 and the top surface of the remaining single crystal SiC substrate 14 have rough, uneven surfaces due to the formation of separation surfaces caused by cleavage.

[0021] 2G, a polycrystalline SiC substrate 11 is prepared as a support substrate. The polycrystalline SiC substrate 11 may be formed by CVD growth on a graphite substrate, and may have a thickness of 350 μm.

[0022] As shown in Figure 2H, an organic SiC polymer 19 is applied to the top surface of the polycrystalline SiC substrate 11. Polycarbosilane can be used as the organic SiC polymer 19. The organic SiC polymer 19 is liquid and contains three elements: Si, C, and H.

[0023] 2I, the top surface of polycrystalline SiC substrate 11 and the bottom surface of single-crystal SiC layer 13 are laminated together with organic SiC polymer 19 interposed between them, and polycrystalline SiC substrate 11 and single-crystal SiC layer 13 are bonded together by organic SiC polymer 19. This results in first stacked body 101 in which polycrystalline SiC substrate 11, organic SiC polymer 19, single-crystal SiC layer 13, oxide film 18, and Si substrate 16 are stacked in this order.

[0024] As shown in FIG. 2J, the first laminate 101 is placed in a furnace and heat-treated to form a second laminate 102 in which the organic SiC polymer 19 of the first laminate 101 is solidified into the SiC interface adhesive layer 12. This process is carried out by filling the furnace containing the first laminate 101 with an inert gas atmosphere such as Ar or nitrogen gas, or by heating the furnace in an atmosphere of 10 ... -2 The first laminate 101 may be heat-treated in a vacuum atmosphere of 200° C. to 1700° C. at a pressure of 100 Pa or less. For example, the first laminate 101 may be heated to 300° C. to harden the organic SiC polymer 19, and then further heated to 900° C. to crystallize the hardened organic SiC polymer 19 to form the SiC interfacial adhesion layer 12.

[0025] 2J is immersed in an HF solution to remove the oxide film 18 between the single-crystal SiC layer 13 and the Si substrate 16, thereby separating the Si substrate 16 and removing the Si substrate 16. This results in a SiC composite substrate 10, as shown in FIG. 1, in which the polycrystalline SiC substrate 11, the SiC interface adhesion layer 12, and the single-crystal SiC layer 13 are stacked.

[0026] As described above, in the first embodiment, the organic SiC polymer 19 is used as an interfacial adhesive layer to bond the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13, and the organic SiC polymer 19 is solidified by heat treatment to form the SiC interfacial adhesive layer 12, thereby producing the SiC composite substrate 10. Therefore, according to the first embodiment, unlike general thermal bonding and room-temperature bonding, highly accurate polishing of the bonding surfaces by CMP or the like is not required for interfacial bonding, and manufacturing costs can be reduced.

[0027] In the first embodiment, the single-crystal SiC layer 13 is bonded with the organic SiC polymer 19 and then solidified by heat treatment to form the SiC interfacial adhesive layer 12, so that the stress exerted on the single-crystal SiC layer 13 by bonding is relatively small, and therefore the thickness of the single-crystal SiC layer 13 can be reduced.

[0028] In the first embodiment, oxide film 15 formed on the top surface of single-crystal SiC substrate 14 and oxide film 17 formed on the bottom surface of Si substrate 16 serving as a support substrate are each irradiated with an Ar beam to form an amorphous phase, and these are then bonded at room temperature to form a single oxide film 18. Since the top surface of single-crystal SiC substrate 14 is covered with oxide film 15 and protected from the Ar beam, the generation of defects on the top surface of single-crystal SiC substrate 14 due to the irradiation with the Ar beam is prevented.

[0029] In the first embodiment, the polycrystalline SiC substrate 11 bonded by the SiC interfacial bonding layer 12 can be ground on both sides, making it less likely to warp due to the Twyman effect. Furthermore, since the SiC interfacial bonding layer 12 is made of SiC, the SiC composite substrate 10 can withstand high-temperature treatment in subsequent processes. Furthermore, in the SiC composite substrate 10, the SiC interfacial bonding layer 12 is crystallized by heat treatment and contains particles with nanoscale crystal grain sizes of 10 μm or less. Therefore, the cross-section of the three-layer structure including the SiC interfacial bonding layer 12 can be easily observed using a scanning electron microscope (SEM) or a transmission electron microscope (TEM).

[0030] (Second embodiment) 3 is a cross-sectional view of a SiC composite substrate 20 according to the second embodiment. In the second embodiment, details of the configuration common to the SiC composite substrate 10 according to the first embodiment will not be described for simplicity.

[0031] SiC composite substrate 20 includes polycrystalline SiC substrate 21, single-crystal SiC layer 23, and SiC interface adhesive layer 22 interposed between the top surface of polycrystalline SiC substrate 21 and the bottom surface of single-crystal SiC layer 23 to bond polycrystalline SiC substrate 21 and single-crystal SiC layer 23. In SiC composite substrate 20, polycrystalline SiC substrate 21 is disposed so that its bottom surface is the C-plane and its top surface is the Si-plane. Similar to polycrystalline SiC substrate 21, single-crystal SiC layer 23 is also disposed so that its bottom surface is the C-plane and its top surface is the Si-plane.

[0032] The SiC interfacial adhesion layer 22 is interposed between the top surface of the polycrystalline SiC substrate 21 and the bottom surface of the single-crystal SiC layer 23, and bonds the polycrystalline SiC substrate 21 to the single-crystal SiC layer 23. The SiC interfacial adhesion layer 22 is formed by heat-treating polycarbosilane, an organic SiC polymer, and solidifying it through hardening and crystallization.

[0033] A method for manufacturing the SiC composite substrate 20 according to the second embodiment will be described with reference to the process diagrams of FIGS. 4A to 4F. First, as shown in FIG. 4A, a single-crystal SiC substrate 24 is provided. The single-crystal SiC substrate 24 has an Si-face as its bottom surface and a C-face as its top surface, and may be a wafer with a diameter of 4 inches. As shown in FIG. 4B, a graphene film 25 is formed on the C-face, the top surface of the single-crystal SiC substrate 14, by a CVD method. The thickness of the graphene film 25 may be, for example, 0.4 nm.

[0034] As shown in FIG. 4C , a single-crystal SiC layer 23 is grown by remote epitaxy on a graphene film 25 formed on the C-face of a single-crystal SiC substrate 14. The single-crystal SiC layer 23 may be grown, for example, by heating at 1600°C while supplying SiH and CH gases. The crystal structure of the top surface of the single-crystal SiC substrate 24 is transferred to the single-crystal SiC layer 23 formed by remote epitaxy via the thin graphene film 25. The single-crystal SiC layer 23 may also be grown by van der Waals epitaxy, which involves forming a thicker graphene film 25 than that formed by remote epitaxy and growing SiC crystals under the influence of van der Waals forces exerted from the top surface of the single-crystal SiC substrate 24 via the graphene film 25.

[0035] 4D, a polycrystalline SiC substrate 21 is prepared, with the Si surface of the polycrystalline SiC substrate 21 as the bottom surface. An organic SiC polymer 26 such as polycarbosilane is applied to this bottom surface and bonded to the top surface of the single-crystal SiC layer 23. As a result, the top surface of the single-crystal SiC layer 23 and the bottom surface of the polycrystalline SiC substrate 21 are bonded by the organic SiC polymer 26, resulting in a third stacked body 103 in which the single-crystal SiC substrate 24, graphene film 25, single-crystal SiC layer 23, organic SiC polymer 26, and polycrystalline SiC substrate 21 are stacked in this order. The polycrystalline SiC substrate 21 may be formed by CVD growth on a graphite substrate.

[0036] 4E, the third stack 103 is placed in a furnace and heat-treated to form a fourth stack 104 in which the organic SiC polymer 26 of the third stack 103 is solidified into the SiC interfacial adhesion layer 22. For example, the third stack 103 may be heated to 300°C to harden the organic SiC polymer 26, and then further heated to 900°C to crystallize the hardened organic SiC polymer 26 to form the SiC interfacial adhesion layer 22.

[0037] As shown in Fig. 4F, the fourth laminate 104 is cut at the graphene film 25. Because the graphene layers constituting the graphene film 25 are bonded to each other by weak van der Waals bonds, the graphene film 25 can be easily peeled off by applying an impact to the end face of the fourth laminate 104. This results in a SiC composite substrate 20, as shown in Fig. 3, in which the polycrystalline SiC substrate 21, the SiC interface adhesion layer 22, and the single-crystal SiC layer 23 are stacked.

[0038] As described above, in the second embodiment, similarly to the first embodiment, polycrystalline SiC substrate 21 and single-crystal SiC layer 23 are bonded together using organic SiC polymer 26 as an interfacial adhesive layer, and organic SiC polymer 26 is solidified by heat treatment to form SiC interfacial adhesive layer 22, thereby producing SiC composite substrate 20. Therefore, the second embodiment also has the same effects as the first embodiment.

[0039] In the second embodiment, a single crystal SiC substrate is used that is formed by remote epitaxy on the top surface of the single crystal SiC substrate 24 via a graphene film 25. According to the remote epitaxy method, the crystal structure of the single crystal SiC substrate 24 is transferred to and grown on the single crystal SiC layer 23 via the graphene film 25, so the single crystal SiC substrate 24 can be used repeatedly. Since the single crystal SiC substrate 24 is expensive, repeated use can reduce manufacturing costs.

[0040] (Third embodiment) 5 is a cross-sectional view of a SiC composite substrate 30 according to the third embodiment. In the third embodiment, detailed descriptions of the configurations common to the SiC composite substrate 10 according to the first embodiment will be omitted for simplicity.

[0041] The SiC composite substrate 30 includes a polycrystalline SiC substrate 31, a single-crystal SiC layer 33, and a SiC interfacial adhesive layer 32 interposed between the top surface of the polycrystalline SiC substrate 31 and the bottom surface of the single-crystal SiC layer 33 to bond the polycrystalline SiC substrate 31 and the single-crystal SiC layer 33. In the SiC composite substrate 30, the polycrystalline SiC substrate 31 is disposed so that its bottom surface is the C-plane and its top surface is the Si-plane. Similar to the polycrystalline SiC substrate 31, the single-crystal SiC layer 33 is also disposed so that its bottom surface is the C-plane and its top surface is the Si-plane.

[0042] The SiC interfacial adhesion layer 32 is interposed between the top surface of the polycrystalline SiC substrate 31 and the bottom surface of the single-crystal SiC layer 33, and bonds the polycrystalline SiC substrate 31 to the single-crystal SiC layer 33. The SiC interfacial adhesion layer 32 is formed by heat-treating polycarbosilane, an organic SiC polymer, and solidifying it through hardening and crystallization.

[0043] A method for manufacturing a SiC composite substrate 30 according to the third embodiment will be described with reference to the process diagrams of FIGS. 6A to 6F. First, as shown in FIG. 6A, a single-crystal SiC substrate 34 is provided. The single-crystal SiC substrate 34 has an Si-face as its bottom surface and a C-face as its top surface, and may be a wafer with a diameter of 4 inches. As shown in FIG. 6B, an oxide film 35 is grown on the C-face, the top surface of the single-crystal SiC substrate 34, by a CVD method. The thickness of the oxide film 35 may be, for example, 100 nm.

[0044] As shown in FIG. 6C, hydrogen ions are implanted toward the top surface of the single-crystal SiC substrate 34 on which the oxide film 35 is formed. The hydrogen ions have, for example, an energy of 150 keV and a dose of 7×10 16 atoms / cm 2The implantation of hydrogen ions forms a brittle layer 34a in the single crystal SiC substrate 34, with the crystal structure damaged, at a predetermined depth from the top surface. The oxide film 35 protects the top surface of the single crystal SiC substrate 34 from ion irradiation. The portion of the single crystal SiC substrate 34 from the top surface to the depth of the brittle layer 34a becomes the single crystal SiC layer 33 of the SiC composite substrate, as will be described later. After the brittle layer 34a is formed, the oxide film 35 is removed by chemical cleaning including a hydrofluoric acid treatment, as shown in FIG. 6D.

[0045] 6E, a polycrystalline SiC substrate 31 is prepared as a support substrate, an organic SiC polymer 37 is applied to the bottom Si surface, and a single-crystal SiC substrate 34 is bonded to the top surface of the polycrystalline SiC substrate 31 with the organic SiC polymer 37 interposed between them, and the single-crystal SiC substrate 34 and the polycrystalline SiC substrate 31 are bonded together by the organic SiC polymer 37. This results in a fifth stacked body 105 in which the single-crystal SiC substrate 34, the organic SiC polymer 37, and the polycrystalline SiC substrate 31 are stacked in this order.

[0046] 6F , the fifth stack 105 is placed in a furnace and heat-treated to form a sixth stack 106 in which the organic SiC polymer 37 of the fifth stack 105 is solidified into the SiC interfacial adhesion layer 32. For example, the first stack 101 may be heated to 300° C. to harden the organic SiC polymer 37, and then further heated to 900° C. to crystallize the hardened organic SiC polymer 37 to form the SiC interfacial adhesion layer 32.

[0047] As shown in FIG. 6G, the sixth stack 106 is separated at the fragile layer 34a, and the portion of the single-crystal SiC substrate 34 from its bottom surface to the height of the fragile layer 34a is removed, resulting in a SiC composite substrate 30, as shown in FIG. 5, in which the polycrystalline SiC substrate 31, the SiC interface adhesive layer 32, and the single-crystal SiC layer 33 are stacked. Because the fragile layer 34a of the single-crystal SiC substrate 34 has been cleaved by heat treatment, the fragile layer 34a can be easily peeled off by applying an impact to the end face of the fifth stack 5. The top surface of the single-crystal SiC layer 33 of the SiC composite substrate 30 shown in FIG. 5 is rough because it is formed by the peeled surface. Therefore, the top surface of the single-crystal SiC layer 33 can be polished to smooth it, if necessary.

[0048] As described above, in the third embodiment, similarly to the first embodiment, polycrystalline SiC substrate 31 and single-crystal SiC layer 33 are bonded together using organic SiC polymer 37 as an interfacial adhesive layer, and organic SiC polymer 37 is solidified by heat treatment to form SiC interfacial adhesive layer 32, thereby producing SiC composite substrate 30. Therefore, the third embodiment also has the same effects as the first embodiment.

[0049] In the third embodiment, SiC composite substrate 30 is formed by bonding polycrystalline SiC substrate 31 via organic SiC polymer 37 to thinned single-crystal SiC substrate 34 formed from the top surface of single-crystal SiC substrate 34 to a brittle layer at a predetermined depth, and therefore there is no need for a step of holding single-crystal SiC layer 13 using a holding substrate such as Si substrate 16 in the first embodiment. Therefore, the number of steps can be reduced compared to the first embodiment, and manufacturing costs can also be reduced.

[0050] (Electronic Devices) Next, embodiments of the electronic device will be described. The following describes a SiC composite substrate 10 according to a first embodiment, but the same can be applied to a SiC composite substrate 20 according to a second embodiment and a SiC composite substrate 30 according to a third embodiment.

[0051] The electronic device of this embodiment is configured using the single-crystal SiC layer 13 of the SiC composite substrate 10 as an active layer. An electronic device can be configured by forming a Schottky barrier diode (SBD), a trench-structure metal oxide field effect transistor (MOSFET), or the like on the SiC composite substrate 10 using the single-crystal SiC layer 13 as an active layer. As specific examples of electronic devices, an SBD and a trench-structure MOSFET will be described below.

[0052] 7 is a cross-sectional view of a Schottky barrier diode 40. The SBD 40 is fabricated using the SiC composite substrate 10 shown in FIG. 1. In the SBD 40, the polycrystalline SiC substrate 11, the SiC interface adhesive layer 12, and the single-crystal SiC layer 13 are stacked in the SiC composite substrate 10. The polycrystalline SiC substrate 11 and the SiC interface adhesive layer 12 are n-type. + The single-crystal SiC layer 13 is doped with n-type at a high concentration to form a substrate layer. - The polycrystalline SiC substrate 11 is lightly doped to form a drift layer. The bottom surface of the polycrystalline SiC substrate 11 is covered with a cathode electrode 41, which is connected to a cathode terminal K.

[0053] The top surface 13a of the single-crystal SiC layer 13 is provided with a contact hole 43 that exposes a portion of the single-crystal SiC layer 13 as an active region 42, and a field insulating film 45 is formed in a field region 44 surrounding the active region 42. The field insulating film 45 is made of SiO2 (silicon oxide) but may be made of other insulators such as silicon nitride (SiN). An anode electrode 46 is formed on the field insulating film 45 and is connected to an anode terminal A.

[0054] A p-type JTE (junction termination extension) structure 47 is formed in the vicinity of the top surface 13a (surface portion) of the single-crystal SiC layer 13 so as to contact the anode electrode 46. The JTE structure 47 is formed along the contour of the contact hole 43 in the field insulating film 45 so as to straddle the inside and outside of the contact hole 43.

[0055] 8 is a cross-sectional view of a trench-structure MOSFET (TMOSFET) 50. The TMOSFET 50 is fabricated using the SiC composite substrate 10 shown in FIG. 1. In the TMOSFET 50, the polycrystalline SiC substrate 11, the SiC interface adhesive layer 12, and the single-crystal SiC layer 13 are stacked in the SiC composite substrate 10. The polycrystalline SiC substrate 11 and the SiC interface adhesive layer 12 are n-type. + The single-crystal SiC layer 13 is doped with n-type at a high concentration to form a substrate layer. - The polycrystalline SiC substrate 11 is lightly doped to form a drift layer. The bottom surface of the polycrystalline SiC substrate 11 is covered with a drain electrode 51, which is connected to a drain terminal D.

[0056] A p-type body region 52 is formed on the top surface 13a of the single-crystal SiC layer 13. In the single-crystal SiC layer 13, the portion on the polycrystalline SiC substrate 11 side of the body region 52 is maintained as the single-crystal SiC layer 13 and is lightly doped n - The gate trench 54 extends from the top surface 13a of the single-crystal SiC layer 13 through the body region 52, and its deepest portion reaches the drain region 53(13).

[0057] A gate insulating film 55 is formed on the inner surface of the gate trench 54 and on the top surface 13b of the single-crystal SiC layer 13 so as to cover the entire inner surface of the gate trench 54. The inside of the gate insulating film 55 is filled with, for example, polysilicon, thereby embedding a gate electrode 56 in the gate trench 54. A gate terminal G is connected to the gate electrode 56.

[0058] The surface of the body region 52 is provided with a heavily doped n-type GaN layer that forms part of the side surface of the gate trench 54. + The single-crystal SiC layer 13 has a highly doped p-type source region 57 formed therein. The p-type source region 57 is connected to the body region 52 and extends from the top surface 13a of the single-crystal SiC layer 13 through the source region 57. + A mold body contact region 58 is formed.

[0059] An interlayer insulating film 61 made of SiO2 is formed on the single-crystal SiC layer 13. A source electrode 63 is connected to the source region 57 and the body contact region 58 via a contact hole 62 formed in the interlayer insulating film 61. A source terminal S is connected to the source electrode 63.

[0060] By applying a predetermined voltage (a voltage equal to or greater than the gate threshold voltage) to the gate electrode 56 while generating a predetermined potential difference between the source electrode 63 and the drain electrode 51 (between the source and drain), a channel can be formed in the body region 52 near the interface with the gate insulating film 55 due to the electric field from the gate electrode 56. This allows a current to flow between the source electrode 63 and the drain electrode 51, turning the TMOSFET 50 on.

[0061] The electronic device of this embodiment is fabricated using the SiC composite substrate 10 of the first embodiment. As described above, the SiC composite substrate 10 of the first embodiment uses the organic SiC polymer 19 as an interface adhesive layer to bond the polycrystalline SiC substrate 11 and the single-crystal SiC layer 13, and then solidifies the organic SiC polymer 19 by heat treatment to form the SiC interface adhesive layer 12 to fabricate the SiC composite substrate 10, thereby reducing manufacturing costs. Therefore, the device of this embodiment fabricated using the SiC composite substrate 10 of the first embodiment or the like can also reduce costs.

[0062] In SiC composite substrate 10 of the first embodiment, a portion near the top surface of single-crystal SiC substrate 14, which will constitute single-crystal SiC layer 13, is covered with oxide film 15 during room-temperature bonding, and is protected from the Ar beam, thereby preventing the occurrence of defects, etc. Therefore, single-crystal SiC layer 13, which will be the active layer of the electronic device, has few defects and ensures good characteristics.

[0063] Although the present disclosure has been described in detail above, it will be apparent to those skilled in the art that the present disclosure is not limited to the embodiments described herein. One or more elements of one embodiment can be combined with one or more elements of another embodiment. The present disclosure can be implemented in modified and altered forms without departing from the spirit and scope of the present disclosure, as defined by the claims. Therefore, the description of the present disclosure is intended to be illustrative and explanatory, and is not intended to be limiting of the present disclosure.

[0064] (Appendix 1) The SiC composite substrate 10 includes a polycrystalline SiC substrate 11, a single-crystal SiC layer 13, and a SiC interfacial adhesion layer 12 that is interposed between the top surface of the polycrystalline SiC substrate 11 and the bottom surface of the single-crystal SiC layer 13 and bonds the polycrystalline SiC substrate 11 to the single-crystal SiC layer 13. The SiC composite substrate 10 is fabricated by solidifying an organic SiC polymer 19 through heat treatment to form the SiC interfacial adhesion layer 12. This eliminates the need for high-precision polishing of the bonding surfaces required for interfacial bonding, as is required in general thermal bonding and room-temperature bonding, thereby reducing manufacturing costs.

[0065] (Appendix 2) In the SiC composite substrate 10 described in Appendix 1, the single-crystal SiC layer 13 may contain at least one of a III-V compound semiconductor, a II-VI compound semiconductor, a IV-IV compound semiconductor, a diamond semiconductor, and an oxide semiconductor. The single-crystal SiC layer 13 can be selected from a III-V compound semiconductor, a II-VI compound semiconductor, a IV-IV compound semiconductor, a diamond semiconductor, and an oxide semiconductor.

[0066] (Appendix 3) In the SiC composite substrate 10 described in Supplementary Note 2, the single-crystal SiC layer 13 includes a IV-IV compound semiconductor, and the IV-IV compound semiconductor may include SiC.

[0067] (Appendix 4) In the SiC composite substrate 10 described in any one of Supplementary Notes 1 to 3, the polycrystalline SiC substrate 11 may include any one of a single-crystal semiconductor, a polycrystalline semiconductor, and an insulator. The polycrystalline SiC substrate 11 can be selected from a single-crystal semiconductor, a polycrystalline semiconductor, and an insulator.

[0068] (Appendix 5) In SiC composite substrate 10 according to any one of Supplementary Notes 1 to 4, polycrystalline SiC substrate 11 may have a thickness of 50 μm or more.

[0069] (Appendix 6) In the SiC composite substrate 10 according to any one of Supplementary Notes 1 to 5, the single-crystal SiC layer 13 may have a thickness in the range of 10 nm to 100 μm.

[0070] (Appendix 7) In the SiC composite substrate 10 described in any one of Supplementary Notes 1 to 6, the SiC interfacial adhesion layer 12 is formed by solidifying an organic SiC polymer 19, which is a precursor of SiC, into SiC, and may have at least one function of improving adhesion between the substrate and the single-crystal wide-gap semiconductor layer, electrical conductivity, thermal conductivity, and mechanical strength. The SiC interfacial adhesion layer 12 can be formed by solidifying the organic SiC polymer 19.

[0071] (Appendix 8) In the SiC composite substrate 10 described in Supplementary Note 7, the organic SiC polymer 19 may contain at least the three elements Si, C, and H.

[0072] (Appendix 9) In the SiC composite substrate 10 described in Supplementary Note 8, the organic SiC polymer 19 may include at least one of polycarbosilane, polycarbosilazane, polymetalloxane, and polysiloxane.

[0073] (Appendix 10) In the SiC composite substrate 10 according to any one of Supplementary Notes 1 to 9, the SiC interface adhesion layer 12 may have a thickness in the range of 100 nm to 100 μm.

[0074] (Appendix 11) In the SiC composite substrate 10 described in any one of Supplementary Notes 1 to 10, the SiC interface adhesion layer 12 may contain grains with a grain size in the range of 10 nm to 10 μm.

[0075] (Appendix 12) The grain size of the SiC interface adhesion layer 12 described in Supplementary Note 11 may be the grain size at the interface in contact with the single-crystal SiC layer 13 .

[0076] (Appendix 13) In the SiC composite substrate 10 described in any one of Supplementary Notes 1 to 12, the SiC interface adhesion layer 12 may contain at least one of micropores, mesopores, and macropores in the range of 1 nm to 10 μm.

[0077] (Appendix 14) The method for manufacturing SiC composite substrate 10 includes the steps of applying organic SiC polymer 19, a precursor of SiC, to the top surface of polycrystalline SiC substrate 11, bonding single-crystal SiC layer 13 to the top surface of polycrystalline SiC substrate 11 with organic SiC polymer 19 interposed therebetween, and bonding the top surface of polycrystalline SiC substrate 11 and the bottom surface of single-crystal SiC layer 13 together with organic SiC polymer 19 to form first laminate 101, and heating first laminate 101 to solidify organic SiC polymer 19 into SiC and form SiC interfacial adhesive layer 12. Because SiC composite substrate 10 is manufactured by solidifying organic SiC polymer 19 through heat treatment to form SiC interfacial adhesive layer 12, highly precise polishing of the bonding surfaces is not required, as is the case with typical thermal bonding and room-temperature bonding, thereby reducing manufacturing costs.

[0078] (Appendix 15) In the method for manufacturing SiC composite substrate 10 described in Appendix 14, the step of heating first laminate 101 may include a step of curing organic-SiC polymer 19 and a step of crystallizing the cured organic-SiC polymer 19. The step of heating first laminate 101 can include a step of curing organic-SiC polymer 19 and a step of crystallizing the cured organic-SiC polymer 19.

[0079] (Appendix 16) In the method for manufacturing SiC composite substrate 10 described in Supplementary Note 14 or 15, the step of heating first stack 101 may heat first stack 101 at a temperature in the range of 200°C to 1700°C.

[0080] (Appendix 17) In the method for manufacturing SiC composite substrate 10 according to any one of Supplementary Notes 14 to 16, the step of heating first stacked body 101 may heat first stacked body 101 in an atmosphere of inert gas or nitrogen gas.

[0081] (Appendix 18) In the method for manufacturing the SiC composite substrate 10 according to any one of Supplementary Notes 14 to 16, the step of heating the first stack 101 includes heating the first stack 101 to 10 -2 Heating may be performed in a vacuum atmosphere at a pressure of 10 Pa or less.

[0082] (Appendix 19) The method for manufacturing SiC composite substrate 10 described in any one of Appendices 14 to 18 may further include the steps of forming brittle layer 14a by ion implantation to a predetermined depth from the top surface of single-crystal SiC substrate 14, and peeling single-crystal SiC substrate 14 from the top surface to the predetermined depth at brittle layer 14a to form single-crystal SiC layer 13. By peeling single-crystal SiC substrate 14 from the top surface to the predetermined depth at brittle layer 14a to form single-crystal SiC layer 13, single-crystal SiC substrate 14 can be thinned.

[0083] (Appendix 20) The method for manufacturing SiC composite substrate 10 described in Appendix 19 may further include, before the step of forming brittle layer 14a, a step of forming oxide film 15 on the top surface of single-crystal SiC substrate 14. Oxide film 15 can protect the top surface of single-crystal SiC substrate 14.

[0084] (Appendix 21) In the method for manufacturing SiC composite substrate 10 described in Supplementary Note 19 or 20, the step of forming the first laminate may involve bonding the exfoliated surface of single-crystal SiC layer 13, formed by peeling at brittle layer 14a, to the top surface of polycrystalline SiC substrate 11 with organic SiC polymer 19 interposed therebetween, with the exfoliated surface of single-crystal SiC layer 13, formed by peeling at brittle layer 14a, serving as the bottom surface. Alternatively, the exfoliated surface of single-crystal SiC layer 13, formed by peeling at brittle layer 14a, may be bonded to the top surface of polycrystalline SiC substrate 11 with organic SiC polymer 19 interposed therebetween.

[0085] (Appendix 22) In the method for manufacturing SiC composite substrate 10 according to any one of Appendices 19 to 20, the step of forming the first laminate may involve bonding a surface of single-crystal SiC layer 13 formed by peeling at brittle layer 14a, opposite to the peeled surface, to the top surface of polycrystalline SiC substrate 11 via organic SiC polymer 19. The surface of single-crystal SiC layer 13 formed by peeling at brittle layer 14a, opposite to the peeled surface, to the top surface of polycrystalline SiC substrate 11 via organic SiC polymer 19, may be bonded to the top surface of polycrystalline SiC substrate 11 via organic SiC polymer 19.

[0086] (Appendix 23) The method for manufacturing SiC composite substrate 10 according to any one of Supplementary Notes 14 to 18 may further include the steps of forming graphene film 25 on the top surface of single-crystal SiC substrate 24, growing single-crystal SiC layer 23 on the top surface of single-crystal SiC substrate 24 with graphene film 25 interposed therebetween, and peeling single-crystal SiC layer 23 from the top surface of single-crystal SiC substrate 24 at graphene film 25. Since single-crystal SiC layer 23 is grown on the top surface of single-crystal SiC substrate 24 with graphene film 25 interposed therebetween, the single-crystal SiC substrate can be reused.

[0087] (Appendix 24) The electronic device may be the SiC composite substrate 10 described in Supplementary Note 4, in which the polycrystalline SiC substrate 11 includes a polycrystalline wide-gap semiconductor and the single-crystalline SiC layer 13 serves as an active layer. An electronic device can be configured in which the single-crystalline SiC layer 13 serves as an active layer.

[0088] (Appendix 25) In the wide gap semiconductor device described in Supplementary Note 24, at least one of a Schottky barrier diode and a trench MOSFET may be formed in the active layer. The electronic device may be a barrier diode or a trench MOSFET. [Explanation of symbols]

[0089] 10 SiC composite substrate 11 Polycrystalline SiC substrate 12 SiC interfacial adhesive layer 13 Single crystal SiC layer 14 Single crystal SiC substrate 15 Oxide film 16 Si substrate 17, 18 Oxide film 19 Organic SiC polymer

Claims

1. A substrate; a single-crystal wide-gap semiconductor layer; a SiC interface adhesion layer interposed between the top surface of the substrate and the bottom surface of the single-crystal wide-gap semiconductor layer to bond the substrate and the single-crystal wide-gap semiconductor layer; A wide-gap semiconductor composite substrate comprising:

2. The single crystal wide gap semiconductor layer comprises at least one of a III-V group compound semiconductor, a II-VI group compound semiconductor, a IV-IV group compound semiconductor, a diamond semiconductor, and an oxide semiconductor. The wide gap semiconductor composite substrate according to claim 1.

3. 3. The wide-gap semiconductor composite substrate according to claim 2, wherein the single-crystal wide-gap semiconductor layer includes a IV-IV group compound semiconductor, and the IV-IV group compound semiconductor includes SiC.

4. The wide-gap semiconductor composite substrate according to claim 1 , wherein the substrate comprises one of a single-crystal semiconductor, a polycrystalline semiconductor, and an insulator.

5. The wide-gap semiconductor composite substrate according to claim 1 , wherein the substrate has a thickness of 50 μm or more.

6. 2. The wide-gap semiconductor composite substrate according to claim 1, wherein the single-crystal wide-gap semiconductor layer has a thickness in the range of 10 nm to 100 μm.

7. The SiC interface adhesive layer is formed by solidifying an organic SiC polymer, which is a precursor of SiC, into SiC, and has at least one function of improving adhesion between the substrate and the single-crystal wide-gap semiconductor layer, electrical conduction, thermal conduction, and mechanical strength. The wide-gap semiconductor composite substrate according to claim 1.

8. The wide-gap semiconductor composite substrate according to claim 7 , wherein the organic SiC polymer contains at least three elements: Si, C, and H.

9. 9. The method for producing a wide-gap semiconductor composite substrate according to claim 8, wherein the organic SiC polymer includes at least one of polycarbosilane, polycarbosilazane, polymetalloxane, and polysiloxane.

10. The wide-gap semiconductor composite substrate of claim 1 , wherein the SiC interfacial adhesion layer has a thickness in the range of 100 nm to 100 μm.

11. The wide-gap semiconductor composite substrate according to claim 1 , wherein the SiC interface adhesion layer contains grains with a grain size in the range of 10 nm to 10 μm.

12. 2. The wide-gap semiconductor composite substrate according to claim 1, wherein the SiC interface adhesive layer contains at least one of micropores, mesopores, and macropores having a size in the range of 1 nm to 10 μm.

13. applying a SiC precursor organic-SiC polymer to the top surface of the substrate; a step of laminating a single-crystal wide-gap semiconductor layer on the top surface of the substrate with the applied SiC organic polymer interposed therebetween, and bonding the top surface of the substrate and the bottom surface of the single-crystal wide-gap semiconductor layer with the organic SiC polymer; solidifying the organic-SiC polymer into SiC by heat treatment to form a SiC interfacial adhesion layer; The method for producing a wide-gap semiconductor composite substrate according to claim 11, comprising:

14. The method for producing a wide-gap semiconductor composite substrate according to claim 13, wherein the step of heat-treating the organic SiC polymer comprises heating at a temperature in the range of 200°C to 1700°C.

15. The method for producing a wide-gap semiconductor composite substrate according to claim 13, wherein the step of heat-treating the organic SiC polymer comprises heat-treating the organic SiC polymer in an atmosphere of an inert gas or nitrogen gas.

16. The step of heat treating the organic SiC polymer comprises: －２ The method for producing a wide-gap semiconductor composite substrate according to claim 13, wherein the heat treatment is carried out in a vacuum atmosphere at a pressure of 1000 Pa or less.

17. forming a brittle layer at a predetermined depth from a top surface of a single-crystal wide-gap semiconductor substrate by ion implantation; a step of peeling the single-crystal wide-gap semiconductor substrate from the top surface to the predetermined depth at the brittle layer to form the single-crystal wide-gap semiconductor layer; The method for producing a wide-gap semiconductor composite substrate according to claim 13, further comprising:

18. forming a graphene film on a top surface of a single-crystal wide-gap semiconductor substrate; and epitaxially growing the single-crystal wide-gap semiconductor layer on the top surface of the single-crystal wide-gap semiconductor substrate with the graphene film interposed therebetween; peeling the single-crystal wide-gap semiconductor layer from the top surface of the single-crystal wide-gap semiconductor substrate by the graphene film; The method for producing a wide-gap semiconductor composite substrate according to claim 13, further comprising:

19. 5. The wide-gap semiconductor composite substrate according to claim 4, wherein the substrate includes a polycrystalline wide-gap semiconductor, and an electronic device has the single-crystalline wide-gap semiconductor layer as an active layer.

20. 20. The electronic device according to claim 19, wherein at least one of a Schottky barrier diode and a trench MOSFET is formed in the active layer.

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