Dielectric composition and laminated electronic component

Abstract

To provide a dielectric composition that has a low relative permittivity and small dielectric loss in the high frequency band, high insulation resistance, and can be co-fired with a conductor containing Cu.SOLUTION: In a dielectric composition having a diopside phase, at least a portion of the diopside phase is a diopside crystalline phase. In any cross section, the value obtained by dividing the area of the diopside crystalline phase by the area of the diopside phase exceeds 0.80.SELECTED DRAWING: Figure 2A

Description

[Technical Field]

[0001] The present invention relates to a dielectric composition and a laminated electronic component. [Background technology]

[0002] In the field of information and communications equipment, the increasing speed of information communication has created a demand for low-loss transmission of high-frequency signals. For this reason, metal materials with low electrical resistance, such as copper and silver, are used as conductor materials in the electronic components and multilayer electronic components (such as multilayer ceramic capacitors) included in information and communications equipment.

[0003] Furthermore, there is a demand for a dielectric material that can be sintered at a low enough temperature to be co-fired with the conductor when the conductor contains Cu, and that has a low dielectric constant to be able to sufficiently reduce transmission loss.

[0004] Furthermore, the miniaturization of laminated electronic components requires thinner dielectric layers. However, thinner layers result in reduced leakage characteristics and voltage resistance. Therefore, dielectric materials with high insulation resistance are required.

[0005] Patent Document 1 describes an invention related to a glass ceramic sintered body, etc. By containing a glass component with a specific composition, a ceramic filler, and a composite oxide within specific ranges, a glass ceramic sintered body with reduced dielectric loss in the high frequency range can be obtained.

[0006] Patent Document 2 describes an invention related to dielectric porcelain. By using a mixture containing crystallized glass powder with a specific composition and Al2O3 powder within specific ranges, a dielectric porcelain can be obtained in which the relative permittivity, Q value, and three-point bending strength are within specific ranges in the frequency range of 14 GHz to 16 GHz.

[0007] Patent Document 3 describes an invention relating to a ceramic composition, etc. By incorporating SrTiO3 powder and / or CaTiO3 powder, Al component, Li component, B component, Zn component, Cu component, Ag component, and Co component within specific ranges in combination with diopside crystal powder, a ceramic composition is obtained that can be sintered at low temperatures, has low dielectric loss in the high frequency range, and is capable of producing a ceramic sintered body that has excellent plating corrosion resistance. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Patent No. 6293704 [Patent Document 2] Patent No. 5341301 [Patent Document 3] Patent No. 5887074 Summary of the Invention [Problem to be solved by the invention]

[0009] The present invention has been made in view of the above circumstances, and aims to provide a dielectric composition or the like which has a low relative permittivity and small dielectric loss in the high frequency band, a high insulation resistance, and can be co-fired with a conductor containing Cu. [Means for solving the problem]

[0010] In order to achieve the above object, the dielectric composition of the present invention is a dielectric composition having a diopside phase, At least a portion of the diopside phase is a diopside crystalline phase, In any cross section, the value obtained by dividing the area of ​​the diopside crystal phase by the area of ​​the diopside phase exceeds 0.80.

[0011] The dielectric composition may have an area ratio of the diopside crystal phase in any cross section of more than 40.0% and less than 80.0%.

[0012] The dielectric composition may further have a SrTiO3 crystalline phase and an Al2O3 crystalline phase, The area ratio of the SrTiO3 crystalline phase in an arbitrary cross section is defined as A(ST), and the area ratio of the Al2O3 crystalline phase is defined as A(Al). A(ST) may be greater than 1.0% and less than 15.0%, and A(Al) may be greater than 10.0% and less than 20.0%.

[0013] The laminated electronic component of the present invention has a laminated portion formed by alternately laminating dielectric layers and internal electrode layers, and the dielectric layers contain the above-described dielectric composition.

[0014] In the laminated electronic component, the internal electrode layers may contain one or more elements selected from Cu, Ag, Au, Ni, and Pd. [Brief explanation of the drawings]

[0015] [Figure 1] FIG. 1 is a schematic cross-sectional view of a laminated electronic component according to an embodiment of the present invention. [Figure 2A] FIG. 2A is an elemental mapping image of a cross section of the dielectric composition of sample number 2. [Figure 2B] FIG. 2B is an elemental mapping image of a cross section of the dielectric composition of sample number 2. [Figure 3A] FIG. 3A is an elemental mapping image of a cross section of the dielectric composition of sample number 6. [Figure 3B] FIG. 3B is an elemental mapping image of a cross section of the dielectric composition of sample number 6. [Figure 4A] FIG. 4A is an elemental mapping image of a cross section of the dielectric composition of sample number 8. [Figure 4B] FIG. 4B is an elemental mapping image of a cross section of the dielectric composition of sample number 8. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. In the drawings, common components are designated by common reference numerals, and their description will be partially omitted. Furthermore, the present invention is not limited to the following embodiments, and can be carried out with appropriate modifications within the scope of the object of the present invention. Furthermore, where the description overlaps, the description may be omitted as appropriate, but this does not limit the spirit of the invention.

[0017] Hereinafter, an embodiment of the present invention will be described using a laminated electronic component and a manufacturing method thereof as an example.

[0018] As shown in FIG. 1, a multilayer ceramic capacitor 1, which is one type of multilayer electronic component according to this embodiment, has a capacitor element body 10 configured with dielectric layers 2 and internal electrode layers 3 alternately stacked. A pair of external electrodes 4 is formed on both ends of this capacitor element body 10, and is electrically connected to the internal electrode layers 3 alternately arranged inside the capacitor element body 10. The capacitor element body 10 may have any shape, but is typically a rectangular parallelepiped. Its dimensions are also arbitrary and may be set to appropriate dimensions depending on the application. The portion where the dielectric layers 2 and internal electrode layers 3 are alternately stacked is referred to as the laminated portion.

[0019] The internal electrode layers 3 are laminated so that their ends are alternately exposed on the surfaces of two opposing end faces of the capacitor element body 10. A pair of external electrodes 4 are formed on both end faces of the capacitor element body 10 and connected to the exposed ends of the alternately arranged internal electrode layers 3 to form a capacitor circuit.

[0020] The thickness of the dielectric layer 2 is not particularly limited, but is preferably 50 μm or less per layer, and more preferably 30 μm or less. The lower limit of the thickness is not particularly limited, but is, for example, about 0.5 μm.

[0021] The number of laminated dielectric layers 2 is not particularly limited, but is preferably 20 or more, and more preferably 50 or more.

[0022] The dielectric layer 2 is made of a dielectric composition. The dielectric layer 2 may contain voids. There are no particular restrictions on the total area ratio of voids in any cross section of the dielectric layer 2 (hereinafter, may be referred to as porosity). For example, it may be 0% or more and 10.0% or less.

[0023] The type of conductive material contained in the internal electrode layer 3 is arbitrary. The internal electrode layer 3 may contain one or more selected from Cu, Ag, Au, Ni, and Pd. There is no particular limitation on the content ratio of one or more selected from Cu, Ag, Au, Ni, and Pd. For example, the total may be 20 atomic % or more. The internal electrode layer 3 may also contain 50 atomic % or more of Cu.

[0024] The internal electrode layers 3 may be formed using commercially available electrode paste. The thickness of the internal electrode layers 3 may be determined appropriately depending on the application, etc. For example, the thickness may be 0.2 μm or more and 20.0 μm or less per layer.

[0025] Any conductive material may be contained in the external electrodes 4. In this embodiment, for example, inexpensive Ni or Cu, highly heat-resistant Au, Ag or Pd, or an alloy of Ni, Cu, Au, Ag and / or Pd can be used. The thickness of the external electrodes 4 may be determined appropriately depending on the application, etc., but is usually preferably about 10 to 50 μm.

[0026] Next, the dielectric composition that constitutes the dielectric layer 2 according to this embodiment will be described in detail.

[0027] The dielectric composition according to this embodiment has a diopside phase. The diopside phase is a phase containing diopside (CaMgSi2O6). The crystallinity of the diopside phase in the dielectric composition exceeds 0.80.

[0028] The diopside phase consists of a diopside crystalline phase in which at least a portion of the components are crystallized, and a diopside amorphous phase in which the components are not crystallized. A method for distinguishing between the diopside crystalline phase and the diopside amorphous phase will be described later.

[0029] The crystallinity of the diopside phase refers to the value obtained by dividing the total area of ​​the diopside crystalline phase in any cross section of the dielectric layer by the total area of ​​the diopside phase (the total area of ​​the diopside crystalline phase and the diopside amorphous phase).

[0030] The area ratio of the diopside crystalline phase in any cross section of the dielectric composition is defined as A(DI), and A(DI) may be greater than 40.0% and less than 80.0%. A(DI) refers to the value obtained by dividing the total area of ​​the diopside crystalline phase by the area of ​​the dielectric composition. Note that the area of ​​the dielectric composition does not include the area of ​​voids present in the dielectric composition.

[0031] The dielectric composition may further have a SrTiO3 crystalline phase and an Al2O3 crystalline phase. The area ratio of the SrTiO3 crystalline phase in any cross section of the dielectric composition is defined as A(ST), and the area ratio of the Al2O3 crystalline phase is defined as A(Al). A(ST) may be greater than 1.0% and less than 15.0%, and A(Al) may be greater than 10.0% and less than 20.0%. A(ST) refers to the value obtained by dividing the total area of ​​the SrTiO3 crystalline phases by the area of ​​the dielectric composition. A(Al) refers to the value obtained by dividing the total area of ​​the Al2O3 crystalline phases by the area of ​​the dielectric composition. The area of ​​the dielectric composition does not include the area of ​​voids present in the dielectric composition.

[0032] When A(ST) is more than 1.0% and less than 15.0%, and A(Al) is more than 10.0% and less than 20.0%, the dielectric loss is particularly likely to decrease and the insulation resistance is likely to improve.

[0033] The dielectric composition may contain phases other than the diopside phase, SrTiO3 crystalline phase, and Al2O3 crystalline phase. For example, it may contain a SrAl2SiO8 phase, a SiO2 phase, a SrTiO3 phase, a Mg2SiO4 phase, and / or a SrCuO2 phase. These phases may be crystalline phases in which at least a portion of the contained components are crystallized, or may be amorphous phases in which the contained components are not crystallized. It may also contain an SrTiO3 amorphous phase and / or an Al2O3 amorphous phase.

[0034] There are no particular limitations on the method for confirming the microstructure of the dielectric composition, and examples include methods using devices such as SEM-EDS and STEM-EDS.

[0035] An observation range is set on an arbitrary cross section of the dielectric composition, and an elemental mapping image of the set observation range is created using the above-mentioned device. Specifically, elemental mapping images of Si, Mg, Al, Cu, Sr, and Ca are created. Then, the position and area of ​​each phase in the dielectric composition are identified from the elemental mapping image.

[0036] Tables 2A and 2B show elemental mapping images of the dielectric composition of Sample No. 2, an example described later. Tables 3A and 3B show elemental mapping images of the dielectric composition of Sample No. 6, an example described later. Tables 2A and 3A show images in which a Si mapping image, an Mg mapping image, and an Al mapping image are superimposed. Tables 2B and 3B show images in which a Cu mapping image, an Sr mapping image, and a Ca mapping image are superimposed. The type of each phase can be identified from the color of each phase in each image.

[0037] The area ratio of each phase and voids in the cross-sectional image of the dielectric composition can be determined, for example, using image analysis software. Furthermore, the area ratio of each phase to the area of ​​the dielectric composition excluding voids can also be determined.

[0038] The content of Al in the Al2O3 phase 101 may be 96 mass % or more when converted into a simple oxide of Al (Al2O3).

[0039] The diopside crystalline phase 102 may contain, for example, SrAlSiO in addition to diopside (CaMgSiO). The contents of the elements contained in the diopside crystalline phase 102, converted into the simple oxides of the elements, may be such that the MgO content is 15% by mass or more and 25% by mass or less, the CaO content is 15% by mass or more and 25% by mass or less, the SiO content is 45% by mass or more and 55% by mass or less, the SrO content is 0% by mass or more and 15% by mass or less, and the AlO content is 0% by mass or more and 5% by mass or less.

[0040] In addition to diopside (CaMgSiO), the diopside amorphous phase 103 may contain, for example, SiO and / or SrO. The contents of the elements contained in the diopside amorphous phase, calculated as simple oxides of the elements, may be such that the MgO content is 5% by mass or more and 20% by mass or less, the CaO content is 10% by mass or more and 25% by mass or less, the SiO content is 30% by mass or more and 40% by mass or less, and the SrO content is 0% by mass or more and 50% by mass or less.

[0041] The content of each element contained in the SrAl2Si2O8 phase 104 may be, in terms of the simple oxide of each element, such that the SrO content is 25 mass% or more and 45 mass% or less, the Al2O3 content is 3 mass% or more and 40 mass% or less, and the SiO2 content is 30 mass% or more and 55 mass% or less.

[0042] In addition to SrTiO3, the SrTiO3 phase 105 may contain, for example, SrO. The content of each element contained in the SrTiO3 phase 105 may be 50 mass % or more and 65 mass % or less, and the content of TiO2 may be 35 mass % or more and 50 mass % or less, converted into a simple oxide of each element.

[0043] The Si content in the SiO2 phase 106 is determined by the simple oxide of Si (SiO2 ) may be 98% by mass or more

[0044] In addition to Mg2SiO4, for example, SiO2 may be contained in the Mg2SiO4 phase 107. The content ratio of each element contained in the Mg2SiO4 phase 107, converted into a simple oxide of each element, may be such that the content ratio of MgO is 40 mass % or more and 65 mass % or less, and the content ratio of SiO2 is 35 mass % or more and 45 mass % or less.

[0045] The SrCuO2 phase 108 contains at least SrCuO2, but may contain components other than SrCuO2.

[0046] Whether each of the above phases is a crystalline phase or an amorphous phase can be identified by obtaining an electron diffraction image using a transmission microscope. If each phase is a crystalline phase, diffraction spots showing a complete crystal lattice image will be observed in the electron diffraction image. If each phase is an amorphous phase, either no diffraction spots will be observed in the electron diffraction image or only diffraction spots showing an incomplete crystal lattice image will be observed, and no diffraction spots showing a complete crystal lattice image will be observed.

[0047] Next, an example of a method for manufacturing a multilayer ceramic capacitor will be described.

[0048] The multilayer ceramic capacitor 1 of this embodiment is manufactured in the same manner as conventional multilayer ceramic capacitors by producing a green chip by a normal printing method or sheet method using a paste, firing the green chip, and then applying external electrodes and firing the chip.

[0049] Crystallized glass powder and various powders are prepared as raw material powders for the dielectric layer 2. The crystallized glass powder is a glass powder that precipitates a crystalline phase upon firing. The crystallized glass powder used as the raw material for the dielectric layer 2 of this embodiment is a glass powder that precipitates a diopside crystalline phase upon firing.

[0050] The crystallized glass powder used as the raw material powder for the dielectric layer 2 of this embodiment contains at least CaO, MgO, and SiO2. It may also contain SrO. There are no particular restrictions on the content ratio of each oxide, as long as the diopside crystal phase 102 is precipitated by firing.

[0051] There are no particular limitations on the types of powders other than the crystallized glass powder used as raw material powders for the dielectric layer 2 of this embodiment. For example, alumina filler, silica powder, and / or strontium titanate powder may be used.

[0052] The raw material powder for the dielectric layer 2 of this embodiment may also be a powder of a high dielectric material such as titanium oxide, calcium titanate, perovskite-based oxide (for example, CaTiO3-SrTiO3), or BaNdTiO-based oxide.

[0053] The proportion of the crystallized glass powder relative to the total raw material powder of the dielectric layer 2 is not particularly limited and may be 51% by mass or more and 79% by mass or less. The proportion of the alumina filler may be 16% by mass or more and 31% by mass or less, the proportion of the silica powder may be 0.5% by mass or more and 4.6% by mass or less, and the proportion of the strontium titanate powder may be 4.5% by mass or more and 13.5% by mass or less.

[0054] There is no particular limitation on the average particle size of the crystallized glass powder, and it may be 0.3 μm or more and 10 μm or less. There is no particular limitation on the average particle size of the alumina filler, and it may be 0.3 μm or more and 10 μm or less. There is no particular limitation on the average particle size of the silica powder, and it may be 0.1 μm or more and 2 μm or less. There is no particular limitation on the average particle size of the strontium titanate powder, and it may be 0.1 μm or more and 4 μm or less.

[0055] Separately, an organic vehicle is prepared. There are no particular limitations on the type of organic vehicle, and any organic vehicle commonly used in this technical field may be prepared.

[0056] Next, the raw material powders are appropriately weighed and blended with the prepared organic vehicle to prepare a dielectric layer paste for forming the dielectric layer 2.

[0057] The organic vehicle is a binder dissolved in an organic solvent. The type of binder used in the organic vehicle is arbitrary and may be appropriately selected from various binders commonly used in this technical field, such as ethyl cellulose and polyvinyl butyral. The type of organic solvent is also arbitrary. Depending on the method for manufacturing the multilayer ceramic capacitor (e.g., a printing method or a sheet method), the type of organic solvent may be appropriately selected from various organic solvents, such as terpineol, butyl carbitol, and acetone.

[0058] Alternatively, the dielectric layer paste may be prepared using an aqueous vehicle instead of an organic vehicle. An aqueous vehicle is a vehicle in which a water-soluble binder, dispersant, etc. are dissolved in water. Any type of water-soluble binder may be used in the aqueous vehicle. For example, polyvinyl alcohol, cellulose, water-soluble acrylic resin, etc. may be used.

[0059] Next, a paste for internal electrode layers is prepared separately from the paste for dielectric layers by kneading the conductive material described above, or various oxides, organometallic compounds, resinates, etc. that become the conductive material after firing, with the organic vehicle described above.

[0060] The external electrode paste may be prepared in the same manner as the internal electrode layer paste described above.

[0061] There are no particular limitations on the content of the organic vehicle in each of the above pastes, and typical contents, such as approximately 1% to 5% by mass for the binder and approximately 10% to 50% by mass for the solvent, may be used. In addition to the raw material powder and organic vehicle, each paste may contain additives selected from various dispersants and plasticizers, as needed. The internal electrode paste and / or external electrode paste may further contain a co-material selected from dielectric materials and insulating materials. The total content of the additives and co-materials is preferably 10% by mass or less.

[0062] Any type of dispersant can be used. For example, surfactant-type dispersants and polymer-type dispersants can be used. Any type of plasticizer can be used. For example, dioctyl phthalate and dibutyl phthalate can be used. Any type of dielectric material can be used. For example, BaTiO3-based and CaZrO3-based dielectric materials can be used. Any type of insulator material can be used. For example, Al2O3 and SiO2 can be used.

[0063] When the printing method is used, the dielectric layer paste and the internal electrode layer paste are printed and laminated on a substrate such as PET, cut into a predetermined shape, and then peeled off from the substrate to form a green chip.

[0064] When the sheet method is used, a green sheet is formed using a dielectric layer paste, and then the internal electrode layer paste is printed on the green sheet, and these are then laminated to form a green chip.

[0065] Before firing, the green chip may be subjected to a binder removal treatment. The conditions for the binder removal treatment are arbitrary. The temperature rise rate may be 5°C / hour to 6000°C / hour, the holding temperature may be 400°C to 700°C, and the holding time may be 0.5 hours to 24 hours. The atmosphere during the binder removal treatment may be air or a reducing atmosphere.

[0066] In particular, when the conductive material of the internal electrode layer contains a material that is easily oxidized, such as Cu, it is preferable to use a reducing atmosphere (for example, an N2-H2 gas atmosphere, an H2 concentration of 10 ppm to 3.0%, and a dew point of 20°C to 90°C). In particular, when the conductive material of the internal electrode layer contains a material that is easily oxidized, such as Cu, if the binder removal treatment is performed in air, delamination is likely to occur between the internal electrode layer and the dielectric layer during firing, and when delamination occurs, the dielectric loss tanδ is likely to increase.

[0067] The firing conditions for the green chip are arbitrary. The temperature rise rate may be 2000°C / hour to 50000°C / hour, the holding temperature may be 800°C to 1050°C, the holding time may be 30 minutes to 600 minutes, and the temperature drop rate may be 2000°C / hour to 50000°C / hour. The firing atmosphere may be air or a reducing atmosphere.

[0068] In particular, when the conductive material of the internal electrode layer contains a material that is easily oxidized, such as Cu, it is preferable to use a reducing atmosphere (for example, an N2-H2 gas atmosphere, H2 concentration 10 ppm to 3.0%, dew point 10°C to 50°C). In particular, when the conductive material of the internal electrode layer contains a material that is easily oxidized, such as Cu, if firing is performed in air, delamination is likely to occur between the internal electrode layer and the dielectric layer, and when delamination occurs, the dielectric loss tan δ is likely to increase. In addition, there is no particular limitation on the oxygen partial pressure of the atmospheric gas, but it is preferable to use a pressure of 2.9 x 10 -15 atm~7.2×10 -15 It can also be called ATM.

[0069] In the firing, the longer the holding time, the more easily the crystallization of diopside in the dielectric composition progresses, and the more easily the crystallinity of the diopside phase increases. The higher the crystallinity of the diopside phase in the dielectric composition, the more easily the Q value of the dielectric composition increases, and the more easily the dielectric loss tanδ decreases.

[0070] Furthermore, the temperature increase and decrease rates during the firing are significantly faster than those used in conventional green chip firing. This facilitates the crystallinity of the diopside phase to exceed 0.80. Furthermore, A(ST) tends to be less than 15.0%, A(Al) tends to be less than 20.0%, and A(DI) tends to be greater than 40.0%. This also facilitates an improvement in the Q value of the dielectric composition, and a reduction in the dielectric loss tan δ.

[0071] This is because the crystallization of diopside proceeds more slowly than that of SrTiO3 and Al2O3. With conventional heating and cooling rates, the crystallization of SrTiO3 and Al2O3 tends to proceed preferentially, making it difficult for diopside to crystallize. By using the above heating and cooling rates, diopside crystallizes more easily.

[0072] Although a preferred embodiment of the laminated electronic component according to one embodiment of the present invention has been described above, the present invention is not limited to the above embodiment. [Example]

[0073] The present invention will be described in more detail below with reference to examples and comparative examples, but the present invention is not limited to the following examples.

[0074] (Experimental Example 1) As the glass powder, a crystallized glass powder containing 40-50 mass% SiO2, 10-30 mass% CaO, 10-30 mass% MgO, and 10-30 mass% SrO was prepared. In addition to the crystallized glass powder, alumina filler, strontium titanate powder, and silica powder were also prepared. The composition of the crystallized glass powder was controlled, and each powder was weighed, so that a dielectric layer having the composition shown in each table below could be obtained.

[0075] Next, 19.4 parts by mass of acrylic resin, 59.1 parts by mass of toluene, 3 parts by mass of ethanol, and 6.5 parts by mass of a plasticizer (butylphthalyl butyl glycolate) were mixed together to prepare an organic vehicle.

[0076] Then, the weighed raw material powders were blended with the prepared organic vehicle and mixed for 24 hours using a ball mill to prepare a dielectric layer paste for forming the dielectric layer.

[0077] Separately from the dielectric layer paste, an internal electrode layer paste for forming the internal electrode layer was prepared. Specifically, copper powder, which is a conductive material, and the organic vehicle were mixed and mixed for 24 hours using a ball mill to prepare the internal electrode layer paste for forming the internal electrode layer.

[0078] The external electrode paste was prepared in the same manner as the internal electrode layer paste.

[0079] The prepared dielectric layer paste was then applied to a PET film to form a green sheet. At this time, the thickness of the dielectric layer in the multilayer ceramic capacitor obtained by firing was set to 20 μm. Next, a predetermined pattern of internal electrode layers was printed on the green sheet using the internal electrode layer paste. At this time, the thickness of the internal electrode layers in the multilayer ceramic capacitor obtained by firing was set to 2 μm. The green sheet was then peeled off from the PET film to produce a green sheet on which the internal electrode layers were printed in the predetermined pattern. Next, multiple green sheets on which the internal electrode layers were printed in the predetermined pattern were stacked and pressure-bonded to form a green laminate. Furthermore, the green laminate was cut into a predetermined shape to obtain a green chip. The number of dielectric layers stacked was 5.

[0080] The obtained green chip was subjected to a debindering process. The heat treatment conditions for the debindering process were a temperature increase rate of 200°C / hour, a holding temperature of 700°C, a holding time of 42 hours, and a temperature decrease rate of 200°C / hour. The atmospheric gas used during the debindering process was N2-H2 gas (H2 concentration 100 ppm) with a dew point of 70°C.

[0081] After the binder removal process, the green chip was fired. The firing conditions were a holding temperature of 880°C. The temperature rise rate, holding time, and temperature drop rate are shown in Table 1. The atmospheric gas used during firing was N2-H2 gas (H2 concentration 0.1%) with a dew point of 15°C. The oxygen partial pressure of the atmospheric gas was 7.2 x 10 -15 It was an ATM.

[0082] Furthermore, external electrode paste was applied to two of the side surfaces of the green chip that faced each other and on which the internal electrode layers were exposed, and baked to form external electrodes, thereby producing a multilayer ceramic capacitor sample.

[0083] The composition of the dielectric layer of the multilayer ceramic capacitor sample was confirmed using a Hitachi High-Tech FESEM-EDS (S4800) to be the composition shown in Table 1. More specifically, the green chip after firing was cut along the lamination direction to obtain a cross section, and the approximate center of the dielectric layer (the part roughly equidistant from the upper and lower internal electrode layers) was observed at a magnification of 3000x, and composition analysis was performed to confirm this.

[0084] In addition, each of the tables described below, such as Table 1, shows values ​​obtained by averaging the results of composition analysis at three to five different locations.

[0085] The relative permittivity (εr) and dielectric loss (tanδ) at frequencies of 1 GHz and 3 GHz were measured for the multilayer ceramic capacitor samples using a KEYSIGHT E4991B impedance analyzer.

[0086] The relative permittivity (εr) and dielectric loss (tanδ) at a frequency of 14 GHz were measured for a dielectric pellet sample separately prepared using the dielectric layer paste under the same binder removal treatment and firing conditions, using the both-end short-circuit method in accordance with JIS R 1627. This measurement method is the same as that used to measure the relative permittivity and dielectric loss of an Al2O3 single crystal using the both-end short-circuit method.

[0087] The relative permittivity (εr) was rated as good if it was 10.0 or less at all frequencies. The dielectric loss (tan δ) was rated as good if it was less than 0.020% at a frequency of 1 GHz, less than 0.060% at a frequency of 3 GHz, and less than 0.300% at a frequency of 14 GHz.

[0088] The insulation resistance (IR) of the multilayer ceramic capacitor samples was measured using an IR meter (R8340 manufactured by ADVAJNTEST Co., Ltd.) Specifically, a DC voltage of 200 V was applied to the multilayer ceramic capacitor samples, and the insulation resistance was measured for 60 seconds.

[0089] Insulation resistance (IR) is 1.00 x 10 10 A value of 1.00×10 Ωm or more is considered good. 11 Ωm or more is considered better, and 1.00×10 12 Ω or more was considered particularly good. In the table, the notation "AE+B" means "A x 10 +B " means.

[0090] The microstructure of the dielectric layer of each sample was observed using the above-mentioned FESEM-EDS on a cross section of the multilayer ceramic capacitor sample cut along the lamination direction. More specifically, in a cross section obtained by cutting the sintered green chip along the lamination direction, the approximate center of the dielectric layer (the part roughly equidistant from the upper and lower internal electrode layers) was observed at a magnification of 3000x to obtain an SEM-EDS mapping image.

[0091] Figure 2A shows a Si-Mg-Al mapping image (a superimposed image of Si, Mg, and Al mapping images) of the dielectric layer of sample No. 2. Figure 2B shows a Cu-Sr-Ca mapping image (a superimposed image of Cu, Sr, and Ca mapping images) of the same measurement area as Figure 2A. Using both mapping images, the positions of the Al2O3 phase 101, diopside crystalline phase 102, diopside amorphous phase 103, SrAl2SiO8 phase 104, SrTiO3 phase 105, SiO2 phase 106, Mg2SiO4 phase 107, and SrCuO2 phase 108 were identified. Phases without symbols in Figure 2A or 2B were not observed in the dielectric layer of sample No. 2.

[0092] Furthermore, we confirmed whether each phase was crystalline or amorphous. Specifically, we identified each phase by acquiring an electron diffraction image using a JEOL JSM-2200FS transmission microscope. If each phase is crystalline, diffraction spots showing a complete crystal lattice image are observed in the electron diffraction image. If each phase is amorphous, either no diffraction spots are observed in the electron diffraction image or only diffraction spots showing an incomplete crystal lattice image are observed, and no diffraction spots showing a complete crystal lattice image are observed.

[0093] In this experimental example, it was confirmed that only the diopside amorphous phase 103 was an amorphous phase, and all the other phases were crystalline phases.

[0094] The crystallinity of the diopside phase was calculated from the elemental mapping image, and A(DI), A(ST), and A(Al) were calculated. Each parameter was calculated using image analysis software. The results are shown in Table 1.

[0095] Each table described later, such as Table 1, shows a value obtained by averaging each parameter in element mapping images of three to five different locations.

[0096] [Table 1]

[0097] [Table 2]

[0098] As can be seen from Tables 1 and 2, all of Samples 1 to 3, in which the crystallinity of the diopside phase exceeds 0.80, including Sample 2, whose element mapping images are shown in Figures 2A and 2B, had good εr and tanδ, and also good insulation resistance IR.

[0099] (Experimental Example 2) The same experiment as in Experimental Example 1 was carried out except that the holding time during sintering was changed. The results are shown in Tables 3 and 4. Elemental mapping images of sample number 6 (holding time 150 minutes) are shown in Figures 3A and 3B, and elemental mapping images of sample number 8 (holding time 2 minutes) are shown in Figures 4A and 4B, respectively. Figures 3A and 4A are Si-Mg-Al mapping images, and Figures 3B and 4B are Cu-Sr-Ca mapping images.

[0100] [Table 3]

[0101] [Table 4]

[0102] As shown in Tables 3 and 4, sample numbers 6, 9 to 11, which have a diopside phase crystallinity greater than 0.80, such as sample number 6, whose elemental mapping images are shown in Figures 3A and 3B, all had good εr and tan δ, and also had good insulation resistance IR. In contrast, sample numbers 7 and 8, which have a diopside phase crystallinity of 0.80 or less, such as sample number 8, whose elemental mapping images are shown in Figures 4A and 4B, had significantly poor tan δ.

[0103] (Experimental Example 3) Sample number 12 is an example in which the proportion of silica powder added is reduced compared to other examples. Sample number 13 is an example in which the proportion of strontium titanate powder added is increased compared to other examples. Sample number 14 is an example in which the proportion of alumina filler added is increased compared to other examples. Sample number 18 is an example in which the proportion of CaO in the crystallized glass powder is increased compared to other examples. Sample number 19 is an example in which the proportion of MgO in the crystallized glass powder is increased compared to other examples. Sample number 20 is an example in which the proportion of SrO in the crystallized glass is increased compared to other examples. The conditions other than the composition of the dielectric layer were the same as in Experimental Example 1. The results are shown in Tables 5 and 6. In Experimental Example 3 and subsequent examples, it was confirmed that all samples had a porosity of 0% or more and 10.0% or less.

[0104] [Table 5]

[0105] [Table 6]

[0106] As can be seen from Tables 5 and 6, all of Sample Nos. 12 to 14 and 18 to 20, in which the crystallinity of the diopside phase exceeded 0.80, had good εr and tan δ, and also had good insulation resistance IR.

[0107] (Experimental Example 4) Sample No. 21 is an example in which the proportion of strontium titanate powder added was reduced compared to other examples, and titanium oxide powder and strontium oxide powder were added instead. Sample No. 22 is an example in which the proportion of strontium titanate powder added was increased compared to other examples, and the proportion of SrO in the crystallized glass powder was reduced compared to other examples. Sample No. 23 is an example in which the proportion of strontium titanate powder added was reduced compared to other examples, and titanium oxide powder and strontium oxide powder were added instead. Furthermore, by lowering the firing temperature compared to other samples, the crystallization of the diopside phase and the formation of strontium titanate were suppressed, thereby increasing A(Al) relatively compared to other examples. Sample No. 24 is an example in which the proportion of alumina filler added was reduced compared to other examples, and A(Al) was reduced compared to other examples. Sample No. 25 is an example in which the proportions of strontium titanate powder and alumina filler added were increased compared to other examples, the proportion of MgO in the crystallized glass powder was decreased compared to other examples, and the proportion of SrO in the crystallized glass powder was increased compared to other examples. Sample No. 26 is a comparative example in which the holding time during firing was shortened compared to other samples, thereby reducing the crystallinity of the diopside phase. Sample No. 27 is an example in which the proportion of strontium titanate powder added was decreased compared to other examples, and instead the proportions of CaO and SrO in the crystallized glass were increased compared to other examples. Sample No. 28 is a comparative example in which the proportions of MgO and CaO in the crystallized glass powder were decreased compared to other examples, and the proportion of silica powder was increased compared to other examples. Other aspects were the same as in Experimental Example 1. Samples Nos. 29 and 30 were the same as in Experimental Example 1 except for the changes in composition. The results are shown in Tables 7 and 8.

[0108] [Table 7]

[0109] [Table 8]

[0110] As can be seen from Tables 7 and 8, sample numbers 21 to 25, 27, 29, and 30, which have a crystallinity of the diopside phase exceeding 0.80, all had good εr and tanδ, and also had good insulation resistance IR. In contrast, sample numbers 26 and 28, which have a crystallinity of the diopside phase of 0.80 or less, had poor tanδ.

[0111] (Experimental Example 5) For samples 31 to 35, the composition of the glass-ceramics powder was changed from that of Experimental Example 1. Specifically, for sample 31, CaO was not included in the glass-ceramics powder, so that the forsterite phase (Mg2SiO4 phase) was mainly formed instead of the diopside phase. For sample 32, CaO was not included in the glass-ceramics powder, so that the enstatite phase (MgSiO3 phase) was mainly formed instead of the diopside phase. For sample 33, CaO was not included in the glass-ceramics powder, so that the MgTiO3 phase was mainly formed instead of the diopside phase. For sample 34, MgO was not included in the glass-ceramics powder, so that the CaTiO3 phase was mainly formed instead of the diopside phase. For sample 35, MgO was not included in the glass-ceramics powder, so that the (Ca,Sr)TiO3 phase was mainly formed instead of the diopside phase. The results are shown in Tables 9 and 10. The crystallinity of sample 31 to 35 is the crystallinity of each of the phases mentioned above. The molar ratio of Ca to Sr in the (Ca,Sr)TiO3 phase is 1.0:1.0.

[0112] For sample numbers 36 to 41, unlike Experimental Example 1, the conductive material used to prepare the internal electrode layer paste was changed from copper to another metal. Other points were the same as in Experimental Example 1. The results are shown in Tables 9 and 10. The conductive material for sample number 41 was an alloy containing Ag and Pd in ​​a molar ratio of 1.0:1.0.

[0113] [Table 9]

[0114] [Table 10]

[0115] Samples 31 to 35, which do not contain a diopside phase, exhibited significantly lower insulation resistance (IR) than the Examples. In particular, samples 33 to 35 exhibited significantly higher relative permittivity (εr) and dielectric loss (tanδ). Samples 36 to 41, which used internal electrode materials different from those of the other Examples, also exhibited favorable characteristics.

[0116] The results of measuring the microstructure of samples 2, 6 and 8 will be explained in more detail below.

[0117] 2A and 2B, it was confirmed that the dielectric layer of sample number 2 contained an Al2O3 phase 101, a diopside crystalline phase 102, a diopside amorphous phase 103, a SrAl2Si2O8 phase 104, a SrTiO3 phase 105, an SiO2 phase 106, and an Mg2SiO4 phase 107. No SrCuO2 phase 108 was confirmed in the dielectric layer of sample number 2.

[0118] One to five measurement points were set for each of the above phases, and point analysis was performed on the composition at each measurement point. The results are shown in Table 11. The unit is wt%.

[0119] 3A and 3B, it was confirmed that sample No. 6 contained an Al2O3 phase 101, a diopside crystalline phase 102, a SrAl2Si2O8 phase 104, a SrTiO3 phase 105, a Mg2SiO4 phase 107, and a SrCuO2 phase 108. The presence of a diopside amorphous phase 103 was not confirmed.

[0120] Four to five measurement points were set for each phase except for the SrCuO2 phase 108, and point analysis was performed on the composition at each measurement point. The results are shown in Table 12. The unit is wt%.

[0121] 4A and 4B, it was confirmed that the dielectric layer of sample No. 8 contained an Al2O3 phase 101, a diopside crystalline phase 102, a diopside amorphous phase 103, a SrTiO3 phase 105, and an SiO2 phase 106. The dielectric layer of sample No. 2 did not contain a SrAl2Si2O8 phase 104, a Mg2SiO4 phase 107, or a SrCuO2 phase 108.

[0122] For each of the above phases, 1 to 5 measurement points were set, and point analysis was performed on the composition at each measurement point. The results are shown in Table 13. The unit is wt%.

[0123] [Table 11]

[0124] [Table 12]

[0125] [Table 13]

[0126] From Tables 11 to 13, it was confirmed that the Al2O3 phase 101 mainly contains Al2O3. It was confirmed that the SrAl2Si2O8 phase 104 mainly contains SrAl2Si2O8. It was confirmed that the SrTiO3 phase 105 mainly contains SrTiO3, and also contains SrO. It was confirmed that the SiO2 phase 106 mainly contains SiO2. It was confirmed that the Mg2SiO4 phase 107 mainly contains Mg2SiO4, and also contains SiO2.

[0127] It was also confirmed that both the diopside crystalline phase 102 and the diopside amorphous phase 103 mainly contained diopside (CaMgSiO). It was also confirmed that the diopside crystalline phase 102 further contained SrAlSiO. It was also confirmed that the diopside amorphous phase 103 further contained SiO and SrO. [Explanation of symbols]

[0128] 1. Multilayer ceramic capacitors 2. Dielectric layer 3 Internal electrode layer 4 External electrode 10 Capacitor element body 101 Al2O3 phase 102 Diopside crystalline phase 103 Diopside amorphous phase 104 SrAl2Si2O8 phase 105 SrTiO3 phase 106 SiO2 phase 107 Mg2SiO4 phase 108 SrCuO2 phase

Claims

1. A dielectric composition having a diopside phase, At least a portion of the diopside phase is a diopside crystalline phase, A dielectric composition, wherein the value of the area of ​​the diopside crystal phase divided by the area of ​​the diopside phase in any cross section exceeds 0.

80.

2. 2. The dielectric composition according to claim 1, wherein the area ratio of the diopside crystal phase in any cross section is more than 40.0% and less than 80.0%.

3. Furthermore, SrTiO 3 Crystalline phase and Al 2 O 3 having a crystalline phase, The SrTiO 3 The area ratio of the crystalline phase is A(ST), 2 O 3 3. The dielectric composition according to claim 2, wherein A(ST) is greater than 1.0% and less than 15.0%, and A(Al) is greater than 10.0% and less than 20.0%, where A(Al) is the area ratio of the crystalline phase.

4. A laminated electronic component having a laminated portion in which dielectric layers and internal electrode layers are alternately laminated, said dielectric layers comprising the dielectric composition according to any one of claims 1 to 3.

5. 5. The multilayer electronic component according to claim 4, wherein the internal electrode layers contain at least one material selected from the group consisting of Cu, Ag, Au, Ni, and Pd.

Images