Method for manufacturing semiconductor device

Abstract

To easily dope a part including a two-dimensional material mainly containing tellurium.SOLUTION: A method for manufacturing a transistor 1, which is a semiconductor device, includes a step S1 of preparing an intermediate object 10 including a substrate 2 and a two-dimensional material layer 4U, which is unprocessed, mainly containing tellurium formed on an insulating layer main surface 22a, which is a main surface of the substrate 2, a step S21 of preparing a compound process liquid 53 for doping the unprocessed two-dimensional material layer 4U with impurities, and a step S22 of impregnating the intermediate object 10 with the compound process liquid 53. The process liquid is a solution containing amino alcohol.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a semiconductor device. [Background technology]

[0002] Field-effect transistors (FETs) are widely used in logic circuits and driver circuits. For example, logic circuits and driver circuits composed of field-effect transistors are used in processors and displays. In recent years, field-effect transistors employing organic materials have been reported. These field-effect transistors can be fabricated by simple, low-temperature thin-film processing using inexpensive techniques such as spin coating, inkjet printing, thermal evaporation, and stamping. In other words, field-effect transistors employing organic materials have the advantage of being fabricated at low cost.

[0003] Furthermore, field-effect transistors made from two-dimensional materials, such as chalcogenides, are attracting attention as new materials to replace silicon (Non-Patent Document 1). Manufacturing semiconductor devices using two-dimensional materials requires application-based technologies such as wafer-scale synthesis processes, and these application-based technologies are rapidly being developed. As with conventional electronics, carrier doping is recognized as an important basic technology for two-dimensional materials, and many methodologies have been reported. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2005-51224 [Non-patent literature]

[0005] [Non-Patent Document 1] Yixiu Wang, Gang Qiu, Ruoxing Wang, Shouyuan Huang, Qingxiao Wang, Yuanyue Liu, Yuchen Du, William A. Goddard III, Moon J. Kim, Xianfan Xu, Peide D. Ye & Wenzhuo Wu, "Field-effect transistors made from solution-grown two-dimensional tellurene", Nature Electronics, Germany, Springer Nature, April 17, 2018, Vol.1, No.4, p.228-236. [Non-Patent Document 2] Mengge Li, Jiadong Yao, Yali Liu, Xiaoxiang Wu, Ying Yu, Boran Xing, Xiaoyuan Yan, Wenxuan Guo, Mingqiu Tan, Jian Sha and Yewu Wang, "Air stable and reversible n-type surface functionalization of MoS2 monolayer using Arg and Lys amino acids", Journal of Materials Chemistry C, United Kingdom, Royal Society of Chemistry, 2020, Vol.8, No.35, p.12181-12188. [Non-Patent Document 3] Swapnil D. Deshmukh, Caleb K. Miskin, Apurva A. Pradhan, KimKisslinger, and Rakesh Agrawal、"Solution Processed Fabrication of Se-Te Alloy Thin Films forApplication in PV Devices"、ACS Applied Energy Materials, USA Checal American Society、2022、Vol. 5、No. 3、 Page. 3275-3281。

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[0006] One major group of two-dimensional materials is single-element materials, such as graphene. Recently, tellurium has been fabricated into two-dimensional thin films, and the resulting two-dimensional crystals, known as tellurine (tellurene), have attracted attention. Field-effect transistors based on tellurine are comparable to other two-dimensional materials and are superior in several respects, including atmospheric stability (Non-Patent Document 1). However, doping processes for tellurine are still in development. These methods are limited to accidental doping during device fabrication (Non-Patent Document 1) or doping utilizing the concentration and energy levels of accidental fixed charges in dielectrics (Non-Patent Documents 4 and 5).

[0007] The present invention provides a method for fabricating semiconductor devices that allows for easy doping of sites containing tellurium-based two-dimensional materials. [Means for solving the problem]

[0008] A method for manufacturing a semiconductor device according to one embodiment of the present invention includes the steps of preparing an intermediate product including a substrate and an untreated two-dimensional material layer having tellurium as a main component formed on a main surface of the substrate, preparing a treatment liquid for doping impurities into the untreated two-dimensional material layer, and immersing the intermediate product in the treatment liquid, wherein the treatment liquid is a solution containing an amino alcohol.

[0009] According to this method, an intermediate product containing an untreated two-dimensional material layer is immersed in a treatment liquid containing an amino alcohol. This treatment dopes the two-dimensional material layer with nitrogen in the treatment liquid as an impurity. As a result, the two-dimensional material layer functions as an n-type semiconductor containing free electrons. In other words, the two-dimensional material layer can be easily doped by a simple process of immersion in the treatment liquid.

[0010] In the method for manufacturing a semiconductor device described above, the treatment liquid may contain dipropylene glycol monomethyl ether as a solvent and 1-amino-2-propanol as a solute. This configuration allows the two-dimensional material layer containing tellurium as a main component to be suitably doped.

[0011] In the method for manufacturing the semiconductor device described above, in the step of immersing the intermediate, the untreated two-dimensional material layer is transformed into a treated two-dimensional material layer by etching and doping the untreated two-dimensional material layer, and the treated two-dimensional material layer may have a thickness thinner than that of the untreated two-dimensional material layer, and the treated two-dimensional material layer may be an n-type semiconductor doped with impurities. By performing this process of immersing the intermediate, a semiconductor device having a predetermined film thickness and a portion that functions as an n-type semiconductor doped with impurities can be obtained by performing one process.

[0012] The method for manufacturing the semiconductor device described above further includes a step of, before the step of immersing the intermediate, performing an etching process on the unprocessed two-dimensional material layer to change the unprocessed two-dimensional material layer into a two-dimensional material layer being processed, wherein the film thickness of the two-dimensional material layer being processed is thinner than the film thickness of the unprocessed two-dimensional material layer, and in the step of immersing the intermediate, performing a doping process on the two-dimensional material layer being processed to change the two-dimensional material layer being processed into a processed two-dimensional material layer, wherein the processed two-dimensional material layer may be an n-type semiconductor doped with impurities. According to this method, the etching process and the doping process can be carried out as separate processes.

[0013] In the method for manufacturing a semiconductor device described above, the step of preparing an intermediate may include the steps of preparing a solution containing tellurium, dropping the solution onto the main surface of the substrate, and evaporating a solvent from the solution dropped onto the main surface of the substrate. This process of preparing an intermediate product makes it possible to easily form a two-dimensional material layer containing tellurium as a main component.

[0014] In the method for manufacturing the above-mentioned semiconductor device, the step of preparing an intermediate may include the steps of preparing a substrate including a substrate layer having electrical conductivity and an insulating layer having electrical insulation properties, forming an untreated two-dimensional material layer by dropping a solution containing tellurium onto a main surface of the insulating layer, which is a main surface of the substrate, and forming a pair of electrode layers on the main surface of the insulating layer in contact with the untreated two-dimensional material layer. According to this process for preparing an intermediate, a semiconductor device, which is a so-called field effect transistor, can be obtained. [Effects of the Invention]

[0015] According to the method for manufacturing a semiconductor device of the present invention, it is possible to easily dope a portion containing a two-dimensional material containing tellurium as a main component. [Brief explanation of the drawings]

[0016] [Figure 1]FIG. 1 is a diagram schematically showing the structure of a field effect transistor obtained by a method for manufacturing a semiconductor device according to an embodiment. [Figure 2] FIG. 2 is a flowchart showing the main steps of the method for manufacturing the semiconductor device according to the embodiment. [Figure 3] 3(a), 3(b), 3(c) and 3(d) are diagrams for explaining the steps for obtaining an intermediate. [Figure 4] 4(a), 4(b) and 4(c) are diagrams for explaining the steps for obtaining an intermediate subsequent to FIG. [Figure 5] 5(a), 5(b) and 5(c) are diagrams for explaining the steps of performing a treatment on an untreated two-dimensional material layer. [Figure 6] FIG. 6 is a flowchart showing the main steps of a method for manufacturing a semiconductor device according to a modified example. [Figure 7] 7(a) and 7(b) are diagrams for explaining a process for performing a process on an unprocessed two-dimensional material layer in the modified example. [Figure 8] FIG. 8 is a graph showing the results of the experimental example. DETAILED DESCRIPTION OF THE INVENTION

[0017] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are designated by the same reference numerals, and duplicated explanations will be omitted.

[0018] <Semiconductor device> First, a semiconductor device that can be manufactured by the method for manufacturing a semiconductor device of this embodiment will be described. As shown in FIG. 1, an example of a semiconductor device is a field effect transistor (hereinafter simply referred to as "transistor 1"). The semiconductor device of this embodiment may be a field effect transistor itself, or may be an electronic circuit module such as an integrated circuit that includes a field effect transistor as a component. Furthermore, the semiconductor device is not limited to a field effect transistor. The method for manufacturing a semiconductor device of this embodiment can be used to manufacture a semiconductor device having a pn junction.

[0019] The transistor 1 includes a substrate 2, a pair of electrode layers 3S, 3D, and a processed two-dimensional material layer 4E. The substrate 2 includes a substrate layer 21 and an insulating layer 22. The substrate layer 21 functions as a gate. The substrate layer 21 is formed of, for example, silicon containing a dopant. An insulating layer 22 is provided on a substrate layer main surface 21a of the substrate layer 21. The insulating layer 22 is formed of, for example, silicon oxide (SiO2). The insulating layer main surface 22a of the insulating layer 22 is the main surface of the substrate 2. The structure of the transistor 1 shown in FIG. 1 is called a bottom gate-top contact structure.

[0020] A pair of electrode layers 3S, 3D and a two-dimensional material layer 4E are provided on the insulating layer main surface 22a. The electrode layer 3S functions as a source. The electrode layer 3D functions as a drain. The pair of electrode layers 3S, 3D are each a multilayer film containing titanium (Ti), nickel (Ni), and gold (Au). For example, the nickel layer may have a thickness of 30 nanometers, and the gold layer may have a thickness of 50 nanometers. The electrode layers 3S, 3D are spaced apart from each other on the insulating layer main surface 22a. A two-dimensional material layer 4E is formed between the electrode layers 3S, 3D.

[0021] The two-dimensional material layer 4E is formed of a material whose main component is tellurium. More specifically, the two-dimensional material layer 4E is formed of tellurium, which is in a two-dimensional crystalline state made of a single material. Tellurium, which is a two-dimensional thin film crystal, is called tellurene. The two-dimensional material layer 4E is an n-type semiconductor in which current is generated by free electrons.

[0022] The above-mentioned transistor 1 switches between a state in which it allows current to flow from the source electrode layer 3S to the drain electrode layer 3S and a state in which it prohibits current to flow from the source electrode layer 3S to the drain electrode layer 3D, depending on the voltage applied to the gate substrate layer 21.

[0023] <Method for manufacturing a semiconductor device> Next, a method for manufacturing a semiconductor device will be described with reference to the flowchart shown in FIG.

[0024] First, an intermediate 10 (see FIG. 4(c)) is prepared (S1). The intermediate 10 refers to the transistor 1 shown in FIG. 1 in which the two-dimensional material layer 4U has not been subjected to doping treatment. In other words, the intermediate 10 physically includes a substrate 2, a pair of electrode layers 3S, 3D, and a two-dimensional material layer 4U that has not been subjected to doping treatment.

[0025] First, a substrate 2 is prepared (S10: see FIG. 3(a)). The substrate 2 includes a gate dielectric (insulating layer 22) having a thickness of, for example, 300 nanometers. Next, a tellurium solution 51 is prepared (S11: see FIG. 3(b)). The tellurium solution 51 is prepared by dispersing washed tellurium thin film crystals in ethanol. The tellurium thin film crystals can be prepared using the method described in Non-Patent Document 1. Next, the tellurium solution 51 is dropped onto the main surface of the substrate 2 (S12: see FIG. 3(c)). Next, the solvent (ethanol) in the dropped tellurium solution 51 is evaporated (S13: see FIG. 3(d)). As a result, an unprocessed two-dimensional material layer 4U containing tellurium as a main component is formed on the main surface of the substrate 2. Note that after step S13, a process may be performed to adjust the planar shape of the unprocessed two-dimensional material layer 4U to a predetermined shape.

[0026] Next, a resist 52 is applied (step S14: see FIG. 4(a)). For example, a first resist layer (LOR1A) and a second resist layer (AZ1500) are applied to the substrate surface. Then, each resist layer is sintered in a vacuum environment. A maskless exposure system (DDB-701-DL (NEOARK)) can be used to expose the resist layer. Furthermore, AZ 300MIF Developer can be used to expose the resist layer.

[0027] Next, the electrode layers 3S and 3D are formed (S15: see FIG. 4(b)). For example, the electrode layers 3S and 3D are obtained by depositing a material on the insulating layer main surface 22a by electron beam evaporation. Then, the resist 52 is removed (S16: see FIG. 4(c)). For example, acetone may be used for lifting off the resist. As a result of performing the above steps S10 to S16, an intermediate 10 is obtained.

[0028] Next, the unprocessed two-dimensional material layer 4U is subjected to a process (S2). The process for the unprocessed two-dimensional material layer 4U includes an etching process for thinning the film thickness of the unprocessed two-dimensional material layer 4U and a doping process for introducing impurities into the unprocessed two-dimensional material layer 4U.

[0029] First, a composite treatment liquid 53 is prepared (S21: see FIG. 5(a)). The composite treatment liquid 53 is used to perform the above-described etching process and doping process in a single step. The composite treatment liquid 53 is a solution containing an amino alcohol. Specifically, the composite treatment liquid 53 is a solution containing ethanolamine with a concentration of 10% as a solute and dipropylene glycol monomethyl ether as a solvent. Ethanolamine is also called 2-aminoethanol, ethanolamine, 2-hydroxyethylamine, or monoethanolamine. For example, the concentration of ethanolamine is preferably 20% or less, and more preferably 10% or less. The higher the concentration of ethanolamine, the higher the etching rate tends to be.

[0030] Alternatively, composite treatment liquid 53 may be a mixture of dipropylene glycol monomethyl ether (solvent 53a) and 1-amino-2-propanol (concentration 10%), which is an example of a secondary amino alcohol (solute 53b). Composite treatment liquid 53 is prepared in a fume hood and placed in a vial.

[0031] As the solute, organic amine compounds such as 2-amino-1-ethanol, 2-amino-1-propanol, 3-amino-1-propanol, 2-amino-1-butanol, 4-amino-1-butanol, 2-(2-aminoethoxy)ethanol, monoethanolamine, isopropanolamine, N-methylethanolamine, N-ethylethanolamine, diethanolamine, dimethylethanolamine, and triethanolamine may be used.

[0032] Next, the intermediate 10 is immersed in the composite processing solution 53 (S22: see FIG. 5(b)). This process may be performed in a room temperature environment. In this step S22, a process (etching process) for thinning the film thickness of the two-dimensional material layer 4 to a predetermined value and a process (doping process) for introducing impurities 50 (e.g., nitrogen) into the two-dimensional material layer 4 occur.

[0033] The timing for removing the intermediate 10 from the composite processing solution 53 can be determined by any method. For example, as the etching of the two-dimensional material layer 4U progresses, the film thickness of the two-dimensional material layer 4 changes, causing the metallic luster of the two-dimensional material layer 4 to disappear. In the case of a two-dimensional material layer 4U whose main component is tellurium, the film thickness at which the metallic luster disappears is typically 10 nanometers or more and 20 nanometers or less. The disappearance of the metallic luster can be determined by observing the surface of the two-dimensional material layer 4U with an optical microscope at predetermined intervals (e.g., every 2 to 3 hours). The timing for removing the intermediate 10 from the composite processing solution 53 may be determined based on the change in appearance of the two-dimensional material layer 4U. This immersion process (S22) results in a transistor 1 including a two-dimensional material layer 4E that has been subjected to a doping process. The transistor 1 is then washed (S3: see FIG. 5(c)).

[0034] <Action and effect> A method for manufacturing a transistor 1, which is a semiconductor device, includes a step S1 of preparing an intermediate 10 including a substrate 2 and an untreated two-dimensional material layer 4U containing tellurium as a main component and formed on an insulating layer main surface 22a, which is a main surface of the substrate 2, a step S21 of preparing a composite treatment liquid 53 for doping the untreated two-dimensional material layer 4U with an impurity 50, and a step S22 of immersing the intermediate 10 in the composite treatment liquid 53. The composite treatment liquid 53 is a solution containing an amino alcohol.

[0035] According to this method, an intermediate 10 including an unprocessed two-dimensional material layer 4U is immersed in a composite processing solution 53, which is a solution containing an amino alcohol. This process causes nitrogen in the composite processing solution 53 to be doped into the two-dimensional material layer 4 as impurities 50. As a result, the two-dimensional material layer 4 is endowed with the functionality of an n-type semiconductor containing free electrons. In other words, the two-dimensional material layer 4 can be easily doped by a simple process of immersion using the composite processing solution 53, which is a solution containing an amino alcohol.

[0036] In step S22 of immersing the intermediate 10, the unprocessed two-dimensional material layer 4U is transformed into a processed two-dimensional material layer 4E by etching and doping the unprocessed two-dimensional material layer 4U. The processed two-dimensional material layer 4E has a thickness smaller than that of the unprocessed two-dimensional material layer 4U. The processed two-dimensional material layer 4E is an n-type semiconductor doped with impurities 50. By performing the step S22 of immersing this intermediate 10, a transistor 1 having a two-dimensional material layer 4 of a predetermined thickness and functioning as an n-type semiconductor doped with impurities 50 can be obtained by performing one step.

[0037] Step S1 of preparing an intermediate includes step S11 of preparing a tellurium solution 51, step S12 of dropping the tellurium solution 51 onto the insulating layer main surface 22a, which is the main surface of the substrate 2, and step S13 of evaporating ethanol, which is the solvent of the solution dropped onto the insulating layer main surface 22a. According to the step S1 of preparing the intermediate 10, the two-dimensional material layer 4 containing tellurium as a main component can be easily formed.

[0038] The process S1 for preparing an intermediate includes a process S10 for preparing a substrate 2 including a conductive substrate layer 21 and an electrically insulating insulating layer 22, a process S12 for forming an untreated two-dimensional material layer 4U by dropping a tellurium solution 51 onto the insulating layer main surface 22a, which is the main surface of the substrate, and a process S15 for forming a pair of electrode layers 3S, 3D on the insulating layer main surface 22a in contact with the untreated two-dimensional material layer 4U. According to the step S1 of preparing this intermediate, a semiconductor device, which is a so-called field effect transistor, can be obtained.

[0039] The characteristics of the transistor 1 obtained by the semiconductor device manufacturing method of this embodiment are comparable to those of a transistor obtained by dielectric doping. However, the semiconductor device manufacturing method of this embodiment has several technical advantages over dielectric doping.

[0040] First, dielectric doping utilizes accidental fixed charges in the dielectric. Therefore, adjusting and reproducing the doping amount is difficult. The semiconductor device manufacturing method of this embodiment can eliminate such accidental charges by controlling the amino alcohol concentration and immersion time. Second, the atomic layer deposition equipment used in dielectric doping is expensive, which poses a cost problem. Furthermore, dielectric doping requires the use of pyrophoric substances as raw materials. Therefore, safety issues may arise. The semiconductor device manufacturing method of this embodiment employs an immersion process. The amino alcohol used in the immersion process can be obtained by blending reagents in a predetermined ratio. This is advantageous in terms of cost. Furthermore, electron doping can be achieved by the simple process of immersing the substrate in a solution containing amyl alcohol. This is also advantageous in terms of safety.

[0041] As described above, no prior art technology has been reported for immersion processing of two-dimensional materials primarily composed of tellurium, which achieves electron doping while simultaneously improving the on / off ratio of the drain current and improving the stability of the transfer characteristics.

[0042] Furthermore, immersion processes using solutions containing amino alcohols can be used to dope layers of two-dimensional materials based on so-called chalcogenides, which are compounds containing at least one chalcogen element ion and at least one metal element.

[0043] <Modification> The present invention may be embodied in various forms, including the above-described embodiment, with various modifications and improvements made based on the knowledge of those skilled in the art. Furthermore, modified examples may be constructed by utilizing the technical matters described in the above-described embodiment.

[0044] In the method for manufacturing a semiconductor device according to the embodiment, the etching process and the doping process of the two-dimensional material layer 4U are performed in a single step. As shown in the flowchart of FIG. 6, the etching process and the doping process may be performed as separate steps. The method for manufacturing a semiconductor device according to the modified embodiment includes at least a step (S1) of obtaining an intermediate product and a step (S2A) of processing the unprocessed two-dimensional material layer 4U. The step (S1) of obtaining an intermediate product is the same as that in the above-described embodiment, and therefore a detailed description thereof will be omitted.

[0045] The process (S2A) of processing the unprocessed two-dimensional material layer 4U includes a process (S23) of preparing an etching process liquid 55, a process (S24) of immersing an intermediate in the etching process liquid 55, a process (S25) of preparing a doping process liquid 56, and a process (S26) of immersing the intermediate in the doping process liquid 56.

[0046] By immersing the intermediate 10 having an unprocessed two-dimensional material layer 4U in an etching treatment liquid 55 (S24), an intermediate 10U can be obtained that has a two-dimensional material layer 4P (see FIG. 7(a)) in process that has a film thickness smaller than that of the unprocessed two-dimensional material layer 4U. The two-dimensional material layer 4P in process may not contain impurities 50 involved in electron doping, as with the unprocessed two-dimensional material layer 4U, or may contain small amounts of impurities 50 involved in electron doping. When the two-dimensional material layer 4P in process contains impurities 50, the concentration of the impurities 50 is lower than the concentration of impurities 50 in the processed two-dimensional material layer 4E (see FIG. 7(b)) that constitutes the intermediate 10P obtained by the step (S26) of immersing the intermediate in a doping treatment liquid 56.

[0047] The etching solution 55 may be, for example, a solution containing 1-amino-2-propanol with a concentration of 20%. The doping solution 56 may be, for example, 1-amino-2-propanol with a concentration of 5%. By selecting such a solution, the etching conditions and the doping conditions can be determined independently. For example, by selecting an etching solution 55 that can process the two-dimensional material layer 4U at a high etching rate, the time required for the etching process can be shortened. Furthermore, by selecting a doping solution 56 for the doping process that allows easy control of the doping level, a two-dimensional material layer 4E with a desired impurity 50 concentration can be obtained.

[0048] That is, the method for manufacturing a semiconductor device of the modified example further includes a step (S24) of etching the unprocessed two-dimensional material layer 4U to transform the unprocessed two-dimensional material layer 4U into a two-dimensional material layer 4P being processed, before the step (S26) of immersing the intermediate 10P in a doping treatment solution 56. The film thickness of the two-dimensional material layer 4P being processed is thinner than the film thickness of the unprocessed two-dimensional material layer 4U. In the step (S26) of immersing the intermediate 10P in a doping treatment solution 56, the two-dimensional material layer 4P being processed is doped to transform the two-dimensional material layer 4P into a processed two-dimensional material layer 4E. The processed two-dimensional material layer 4E is an n-type semiconductor doped with impurities 50. According to this method, the etching step (S24) and the doping step (S26) can be performed as separate steps.

[0049] <Experimental Example> Previously proposed field-effect transistors obtained by doping two-dimensional material layers mainly composed of tellurium have been reported to exhibit large hysteresis loops in their transfer characteristic curves (Non-Patent Document 5). This means that the transfer characteristics are unstable, resulting in a drift phenomenon in the drain current. Furthermore, the on-off ratio of the drain current remains low at around 2x (Non-Patent Document 6).

[0050] On the other hand, the electron doping treatment of the two-dimensional material layer 4 using a solution containing an amino alcohol, as carried out in this embodiment, results in a transistor 1 having characteristics such as a high on-off ratio for the drain current and highly stable transfer characteristics. Experimental examples have confirmed that a transistor 1 having such characteristics can be obtained.

[0051] In an experimental example, in order to verify the above-mentioned effects, the transfer characteristics of the transistor 1 obtained by the method of the embodiment were measured. First, the drain current along the c-axis direction of the tellurium was measured with a drain voltage applied along the c-axis direction of the tellurium. To measure the drain current with high precision, a pulse gate application method was used. A source measure unit 2636B (Keithley) was used to apply a gate voltage pulse with a time width of 1 millisecond at a duty cycle of 1%. Furthermore, the source measure unit 2636B was used to measure the DC drain current with a DC drain voltage applied. The measurements were carried out at room temperature and in a vacuum (up to 5×10 -4 The experiment was carried out under 100 Pa.

[0052] Figure 8 shows the transfer characteristics of the transistor 1 obtained by the method of the embodiment. As shown in graph G8, the hysteresis curve of the transistor 1 was found to be smaller than those reported in References 5 and 6. Furthermore, the on-off ratio was found to be improved by at least 100 times. It was also confirmed that the drain current began to increase again when the gate voltage was 10 V or higher. This directly indicates that the two-dimensional material layer 4 was electron-doped. [Explanation of symbols]

[0053] 1...transistor (semiconductor device), 2...substrate, 21...substrate layer, 22...insulating layer, 3S, 3D...electrode layer, 4U...unprocessed two-dimensional material layer, 4E...processed two-dimensional material layer, 50...impurities, S1...step of preparing intermediate, S2...step of processing unprocessed two-dimensional material layer, S21...step of preparing processing solution, S22...step of immersing intermediate.

Claims

1. providing an intermediate article including a substrate and a layer of a green two-dimensional tellurium-based material formed on a major surface of the substrate; providing a treatment solution for doping the untreated two-dimensional material layer with impurities; and immersing the intermediate in the treatment liquid, The method for manufacturing a semiconductor device, wherein the processing liquid is a solution containing an amino alcohol.

2. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the treatment liquid contains dipropylene glycol monomethyl ether as a solvent and 1-amino-2-propanol as a solute.

3. In the step of immersing the intermediate, the untreated two-dimensional material layer is transformed into a treated two-dimensional material layer by etching and doping the untreated two-dimensional material layer; a thickness of the processed two-dimensional material layer that is thinner than a thickness of the unprocessed two-dimensional material layer; 2. The method for manufacturing a semiconductor device according to claim 1, wherein the processed two-dimensional material layer is an n-type semiconductor doped with the impurity.

4. before the step of immersing the intermediate object, an etching process is performed on the untreated two-dimensional material layer, thereby transforming the untreated two-dimensional material layer into a two-dimensional material layer in process; a thickness of the two-dimensional material layer during processing is smaller than a thickness of the unprocessed two-dimensional material layer; In the step of immersing the intermediate object, the two-dimensional material layer in the process is transformed into a processed two-dimensional material layer by a doping process on the two-dimensional material layer in the process; 2. The method for manufacturing a semiconductor device according to claim 1, wherein the processed two-dimensional material layer is an n-type semiconductor doped with the impurity.

5. The step of preparing the intermediate includes: providing a solution containing the tellurium; dropping the solution onto a main surface of the substrate; 3. The method for manufacturing a semiconductor device according to claim 2, further comprising the step of: evaporating the solvent of said solution dropped onto the main surface of said substrate.

6. The step of preparing the intermediate includes: providing a substrate including a substrate layer having electrical conductivity and an insulating layer having electrical insulation properties; forming the green two-dimensional material layer by dropping the tellurium-containing solution onto a major surface of the insulating layer, the major surface being a major surface of the substrate; The method for manufacturing a semiconductor device according to any one of claims 1 to 4, further comprising the step of forming a pair of electrode layers on a main surface of the insulating layer in contact with the untreated two-dimensional material layer.

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