Frequency converter

Abstract

To reduce the power consumption of a frequency converter that performs frequency conversion to upconvert a transmission signal and frequency conversion to downconvert a reception signal.SOLUTION: A frequency converter includes a transistor constituting a double balanced mixer, a load circuit provided on the drain side of the transistor, a first terminal connected to the load circuit, an impedance circuit provided on the source side of the transistor, a second terminal connected to the source of the transistor, a driver circuit that provides a local oscillator signal to the gate of the transistor, and a current control circuit. The current control circuit controls the current flowing from the load circuit to the impedance circuit via the transistor, or the current flowing from the impedance circuit to the load circuit via the transistor.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a frequency converter for use in wireless communications. [Background technology]

[0002] A base station for wireless communication is often equipped with a function for upconverting a transmission signal from the baseband domain or the intermediate frequency domain to the radio frequency domain, and a function for downconverting a reception signal from the radio frequency domain to the baseband domain or the intermediate frequency domain, i.e., a base station is equipped with a frequency converter.

[0003] In fifth-generation mobile communications (5G or NR (New Radio)) or post-5G communications, the use of millimeter wave frequencies is being considered to support ultra-high speed communications, ultra-low latency, and multiple simultaneous connections. For example, the International Telecommunication Union (ITU) has designated the 45.5-48.2 GHz and 66-71 GHz bands as frequencies for 5G wireless communications, in addition to the 28 GHz and 39 GHz bands. Furthermore, the use of millimeter waves makes it possible to realize high-gain directional antennas, which can provide high throughput.

[0004] However, because millimeter-wave radio waves have a tendency to propagate in a straight line, it is necessary to install a large number of base stations to expand the user area. In order to install a large number of base stations while keeping the overall cost of the wireless communication system down, it is necessary to reduce the power consumption and size of base stations (especially RUs (Radio Units)).

[0005] A bidirectional variable gain amplifier for a radio frequency communication system has been proposed (for example, Patent Document 1). A receiver circuit for receiving a radio frequency signal has also been proposed (for example, Patent Document 2). Furthermore, a bidirectional frequency converter for converting the frequency of a signal, which is used in a radio circuit of a wireless communication device such as a mobile communication device, has also been proposed (for example, Patent Document 3). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2022-138125 [Patent Document 2] Japanese Patent Application Publication No. 2023-544445 [Patent Document 3] Patent No. 4881596 Summary of the Invention [Problem to be solved by the invention]

[0007] The radio circuit of a wireless communication device (e.g., a base station device) includes a transmitting system and a receiving system. That is, the wireless communication device has a frequency conversion function for upconverting a transmission signal and a frequency conversion function for downconverting a reception signal. Attempts have also been made to simplify, miniaturize, and reduce the cost of the radio circuit by partially sharing the transmitting system and the receiving system. In this case, the wireless communication device includes a bidirectional frequency converter. However, in conventional technology, communication equipment (here, a wireless communication device) including a bidirectional frequency converter consumes a lot of power.

[0008] An object of one aspect of the present invention is to reduce the power consumption of a communication device that includes a frequency converter that performs frequency conversion to upconvert a transmission signal and frequency conversion to downconvert a reception signal. [Means for solving the problem]

[0009] A frequency converter according to one aspect of the present invention comprises a transistor constituting a double balanced mixer, a load circuit provided on the drain side of the transistor, a first terminal connected to the load circuit, an impedance circuit provided on the source side of the transistor, a second terminal connected to the source of the transistor, a drive circuit that provides a local oscillator signal to the gate of the transistor, and a current control circuit that controls the current flowing from the load circuit toward the impedance circuit via the transistor, or the current flowing from the impedance circuit toward the load circuit via the transistor. [Effects of the Invention]

[0010] According to the above-described aspect, the power consumption of a communication device including a frequency converter that performs frequency conversion to up-convert a transmission signal and frequency conversion to down-convert a reception signal is reduced. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 illustrates an example of a frequency converter. [Figure 2] FIG. 10 is a diagram illustrating another example of a frequency converter. [Figure 3] FIG. 1 is a diagram illustrating an example of a frequency converter according to a first embodiment of the present invention. [Figure 4] FIG. 2 is a diagram illustrating the operation of the frequency converter. [Figure 5] 1 is a diagram (part 1) for explaining the effect of the embodiment of the present invention. [Figure 6] FIG. 10 is a diagram (part 2) for explaining the effect of the embodiment of the present invention. [Figure 7] FIG. 10 is a diagram illustrating an example of a frequency converter according to a second embodiment of the present invention. [Figure 8] 10A and 10B are diagrams illustrating LO leakage power leaking from an RF terminal. [Figure 9] FIG. 10 is a diagram illustrating a method for suppressing LO leakage power. [Figure 10]FIG. 10 is a diagram illustrating an example of a frequency converter according to a first variation. [Figure 11] FIG. 10 is a diagram illustrating an example of a frequency converter according to a second variation. [Figure 12] FIG. 10 is a diagram illustrating an example of a frequency converter according to a third variation. [Figure 13] FIG. 10 is a diagram illustrating an example of a frequency converter according to a fourth variation. [Figure 14] FIG. 10 is a diagram illustrating an example of a frequency converter according to a fifth variation. [Figure 15] FIG. 10 is a diagram illustrating an example of a frequency converter according to a sixth variation. [Figure 16] FIG. 13 is a diagram illustrating an example of a frequency converter according to a seventh variation. [Figure 17] FIG. 1 illustrates an example of a communication device that uses a frequency converter. DETAILED DESCRIPTION OF THE INVENTION

[0012] FIG. 1 shows an example of a frequency converter. The frequency converter shown in FIG. 1 has a function of converting an intermediate frequency signal into a radio frequency signal, and a function of converting a radio frequency signal into an intermediate frequency signal. The intermediate frequency is not particularly limited, but in this specification it represents 1 to 10 GHz. The radio frequency is not particularly limited, but in this specification it represents a frequency higher than 10 GHz.

[0013] In the following description, intermediate frequency signals may be referred to as "IF (Intermediate Frequency) signals." Radio frequency signals may be referred to as "RF (Radio Frequency) signals." Local oscillator signals used for frequency conversion may be referred to as "LO (Local Oscillator) signals." When differential signals are processed by a frequency converter, the pair of signals that make up the differential signal may be identified by "P (Positive)" and "N (Negative)."

[0014] During up-conversion, an IF signal (IF_P) is provided to transistors M3 and M4 via a direction controller, and an IF signal (IF_N) is provided to transistors M1 and M2 via a direction controller. An LO signal (LO_P) is provided to the gates of transistors M1 and M3, and an LO signal (LO_N) is provided to the gates of transistors M2 and M4. An RF signal (RF_P) is output via a terminal connected to transistors M1 and M4, and an RF signal (RF_N) is output via a terminal connected to transistors M2 and M3.

[0015] During down-conversion, an RF signal (RF_P) is applied to transistors M1 and M4, and an RF signal (RF_N) is applied to transistors M2 and M3. Also, an LO signal (LO_P) is applied to the gates of transistors M1 and M3, and an LO signal (LO_N) is applied to the gates of transistors M2 and M4. Then, an IF signal (IF_P) is output from transistors M3 and M4 via the direction controller, and an IF signal (IF_N) is output from transistors M1 and M2 via the direction controller.

[0016] As described above, in the frequency converter shown in FIG. 1, each of the transistors M1 to M4 is driven by a signal without being supplied with a direct current. In other words, this frequency converter operates as a passive mixer. For this reason, the configuration shown in FIG. 1 has a large conversion loss. Furthermore, to generate an RF signal having a predetermined output level (for example, the transmission power required for a base station to achieve a predetermined communication coverage), the power of the LO signal needs to be increased. The gain of the amplifier that amplifies the signals (RF, IF, LO) input to the frequency converter and / or the signals (RF, IF) output from the frequency converter needs to be increased. This results in increased power consumption in communication equipment that includes a frequency converter.

[0017] Fig. 2 shows another example of a frequency converter. The frequency converter shown in Fig. 2 is a double balanced mixer (DBM) frequency converter that includes a DBM. The double balanced mixer includes four transistors M1 to M4. This frequency converter converts an IF signal into an RF signal.

[0018] The double balanced mixer includes two transistor pairs. One transistor pair consists of transistors M1 and M2. Transistors M1 and M2 are connected in parallel to each other. The other transistor pair consists of transistors M3 and M4. Transistors M3 and M4 are connected in parallel to each other. The sources of transistors M1 and M2 are connected to the drain of transistor M5. The sources of transistors M3 and M4 are connected to the drain of transistor M6. The sources of transistors M5 and M6 are connected to ground.

[0019] The gates of transistors M2 and M3 are connected to one terminal of the secondary winding of transformer T1, and the gates of transistors M1 and M4 are connected to the other terminal of the secondary winding of transformer T1. One terminal of the primary winding of transformer T1 is used to input an LO signal. The other terminal of the primary winding of transformer T1 is connected to ground. A capacitor for cutting DC components may be provided between the transformer T1 and the double balanced mixer. A bias voltage is applied to the gates of each of transistors M1 to M4 by a power supply VG_LO and resistor R. This bias voltage is set so that each of transistors M1 to M4 operates in the saturation region.

[0020] The drains of transistors M1 and M3 are connected to one terminal of a primary winding of a transformer T2, and the drains of transistors M2 and M4 are connected to the other terminal of the primary winding of the transformer T2. The midpoint (i.e., center tap) of the primary winding of the transformer T2 is connected to a power supply AVD. The power supply AVD generates a predetermined DC voltage. One terminal of the secondary winding of the transformer T2 is used to output an RF signal, and the other terminal of the secondary winding of the transformer T2 is connected to ground.

[0021] In the frequency converter configured as described above, an IF signal is provided to transistors M5 and M6. Here, the IF signal is a differential signal composed of signals IF_P and IF_N. Signal IF_P is provided to the gate of transistor M5, and signal IF_N is provided to the gate of transistor M6. In addition, an LO signal is provided to the double balanced mixer via transformer T1. That is, the LO signal is provided to the gates of each of transistors M1 to M4.

[0022] Then, an RF signal is output via the RF terminal connected to the transformer T2. The RF signal contains components of the input signal (i.e., the IF signal). The frequency of the RF signal essentially corresponds to the sum of the frequencies of the IF signal and the LO signal. In other words, the input IF signal is converted into an RF signal and then output.

[0023] In the frequency converter shown in FIG. 2, during operation, a direct current flows from the power supply AVD to the ground via the transistors M1 to M6. That is, the transistors M1 to M4 that constitute the double balanced mixer are maintained in an active state, and the frequency converter operates as an active mixer. Therefore, the conversion loss of the frequency converter shown in FIG. 2 is smaller than that of the configuration shown in FIG. 1. However, the frequency converter shown in FIG. 2 is a unidirectional converter.

[0024] Furthermore, if the transformer T2 is an ideal transformer and the characteristics of the transistors M1 to M4 constituting the double balanced mixer are uniform, the power of the LO signal component output from the RF terminal will be zero. However, the characteristics of the transistors M1 to M4 generally vary. Therefore, not only the RF signal but also the LO signal component is output via the RF terminal. In other words, the power of the LO signal component may occur as a spurious component. Note that the new 5G radio frequency band (FR2: Frequency Range 2) requires spurious components to be -13 dBm or less.

[0025] First Embodiment Fig. 3 shows an example of a frequency converter according to a first embodiment of the present invention. Similar to the frequency converter shown in Fig. 2, the frequency converter 1 according to the first embodiment of the present invention includes transistors M1 to M4 and transformers T1 to T2 that form a double balanced mixer. The frequency converter 1 also includes an RF terminal, an LO terminal, and IF (IF_P, IF_N) terminals.

[0026] The LO terminal is electrically connected to the primary winding of the transformer T1, similar to the frequency converter shown in FIG. 2. That is, the LO signal is input to the double balanced mixer via the transformer T1. Here, one terminal of the secondary winding of the transformer T1 is connected to the gates of the transistors M2 and M3, and the other terminal of the secondary winding of the transformer T1 is connected to the gates of the transistors M1 and M4. Therefore, for example, when the transistors M2 and M3 are driven by the LO signal, the transistors M1 and M4 are driven by the LO signal with the opposite phase.

[0027] The RF terminal is electrically connected to the secondary winding of the transformer T2. The primary winding of the transformer T2 is electrically connected to the drain side of the double balanced mixer, similar to the frequency converter shown in Fig. 2. However, in the frequency converter 1, the midpoint of the primary winding of the transformer T2 is electrically connected to the switch SW1.

[0028] When transmitting a radio signal, the transformer T2 transmits the signal from the double balanced mixer to the RF terminal, and when receiving a radio signal, it transmits the signal from the RF terminal to the double balanced mixer. That is, the transformer T2 can transmit signals in both directions. However, in the following description, for convenience, one winding of the transformer T2 (in FIG. 3, the winding connected to the transistors M1 to M4) may be referred to as the "primary winding," and the other winding (in FIG. 3, the winding connected to the RF terminal) may be referred to as the "secondary winding."

[0029] The IF terminal is electrically connected to the source side of the double balanced mixer. Specifically, the IF_P terminal is electrically connected to the sources of the transistors M1 and M2, and the IF_N terminal is electrically connected to the sources of the transistors M3 and M4. The frequency converter 1 also includes an impedance circuit 11 on the source side of the double balanced mixer. The impedance circuit 11 includes impedance circuits Z1 and Z2.

[0030] The impedance circuit Z1 is provided between the switch SW2 and the IF_P terminal. That is, the impedance circuit Z1 is provided between the switch SW2 and the sources of the transistors M1 and M2. Similarly, the impedance circuit Z2 is provided between the switch SW2 and the IF_N terminal. That is, the impedance circuit Z2 is provided between the switch SW2 and the sources of the transistors M3 and M4.

[0031] The impedance circuits 11 (Z1, Z2) have a small resistance in the DC region and a high impedance in the mid-frequency region. Therefore, each of the impedance circuits Z1, Z2 is configured, for example, by connecting a resistance element and an inductance element in series, although this is not particularly limited. Alternatively, each of the impedance circuits Z1, Z2 may be realized by a resonant circuit.

[0032] The switch SW1 has two input terminals and one output terminal. One input terminal is connected to a power supply AVD, and the other input terminal is connected to ground. The output terminal is electrically connected to the midpoint of the primary winding of the transformer T2. The switch SW1 connects the midpoint of the primary winding of the transformer T2 to the power supply AVD or ground in response to a control signal Cont1.

[0033] The switch SW2 has two input terminals and one output terminal. One input terminal is connected to a power supply AVD, and the other input terminal is connected to ground. The output terminal is electrically connected to an impedance circuit 11. Specifically, the output terminal of the switch SW2 is connected to the sources of the transistors M1 and M2 via an impedance circuit Z1, and to the sources of the transistors M3 and M4 via an impedance circuit Z2. The switch SW2 connects the impedance circuit 11 to the power supply AVD or ground in response to a control signal Cont2.

[0034] In this way, the switch SW2 connects the impedance circuit 11 (Z1, Z2) to the power supply AVD or ground. Therefore, the resistance value of each impedance circuit Z1, Z2 is determined so that the source potential of the transistors M1 to M4 has an appropriate value. Furthermore, since each impedance circuit Z1, Z2 has a high impedance in the intermediate frequency range, the IF signal component is less likely to reach the power supply AVD.

[0035] The control signals (Cont1, Cont2) control the direction of the DC current flowing through the frequency converter 1, thereby indicating the operating mode of the frequency converter 1. That is, the control signals (Cont1, Cont2) indicate whether the frequency converter 1 operates in a transmission mode or a reception mode. The control signals Cont1 and Cont2 are synchronized with each other. Specifically, when the frequency converter 1 operates in a transmission mode, the control signal Cont1 controls the switch SW1 to connect the midpoint of the primary winding of the transformer T2 to the power supply AVD, and the control signal Cont2 controls the switch SW2 to connect the impedance circuit 11 to the ground. When the frequency converter 1 operates in a reception mode, the control signal Cont1 controls the switch SW1 to connect the midpoint of the primary winding of the transformer T2 to the ground, and the control signal Cont2 controls the switch SW2 to connect the impedance circuit 11 to the power supply AVD.

[0036] Fig. 4 is a diagram illustrating the operation of the frequency converter 1. In Fig. 4, for ease of viewing, the wiring between the transformer T2 and the transistors M1 to M4 is depicted schematically. In other words, the transformer T2 and the transistors M1 to M4 are actually connected as shown in Fig. 3.

[0037] An LO signal is applied to transistors M1 to M4 constituting the double balanced mixer via a transformer T1 shown in FIG. 3. In this embodiment, the LO signal is a differential signal composed of signals LO_P and LO_N. For example, signal LO_P is applied to the gates of transistors M2 and M3, and signal LO_N is applied to the gates of transistors M1 and M4. That is, transistors M2 and M3 are driven by the same signal (e.g., LO_P), and transistors M1 and M4 are driven by the same signal (e.g., LO_N).

[0038] When the frequency converter 1 operates in the transmission mode, as shown in Fig. 4A, the switch SW1 is controlled by the control signal Cont1, and the midpoint of the primary winding of the transformer T2 is connected to the power supply AVD. The switch SW2 is controlled by the control signal Cont2, and the impedance circuit 11 (Z1, Z2) is connected to ground. Then, IF signals (IF_P ​​and IF_N) are input via the IF terminals.

[0039] In this case, current flows from the power supply AVD to the ground via the transformer T2, the transistors M1 to M4, and the impedance circuit 11 (Z1, Z2). A bias voltage is applied to the transistors M1 to M4 so that they operate in the saturation region. In the example shown in FIG. 3, the bias voltage is generated by the power supply VG_LO and the resistor R. Therefore, the transistors M1 to M4 operate as an active circuit.

[0040] The transistors M1 to M4 are driven by an LO signal. Therefore, the signal IF_P is multiplied by the LO signal in the transistors M1 and M2. Furthermore, the signal IF_N is multiplied by the LO signal in the transistors M3 and M4. That is, the input IF signal is multiplied by the LO signal. Therefore, the IF signal is up-converted by the LO signal. Then, the signal generated by the up-conversion (i.e., the RF signal) is output via the RF terminal.

[0041] When the frequency converter 1 operates in the receive mode, as shown in Fig. 4B, the switch SW1 is controlled by the control signal Cont1 to connect the midpoint of the primary winding of the transformer T2 to ground. The switch SW2 is controlled by the control signal Cont2 to connect the impedance circuit 11 (Z1, Z2) to the power supply AVD. An RF signal is then input via the RF terminal.

[0042] In this case, current flows from the power supply AVD to ground via the impedance circuit 11 (Z1, Z2), the transistors M1 to M4, and the transformer T2. Therefore, the transistors M1 to M4 operate as an active circuit, similar to when the frequency converter 1 operates in the transmission mode.

[0043] The transistors M1 to M4 are driven by an LO signal. Therefore, the RF signal is multiplied by the LO signal in the transistors M1 and M2. The RF signal is also multiplied by the LO signal in the transistors M3 and M4. Therefore, the RF signal is down-converted by the LO signal. Then, the signal generated by the down-conversion (i.e., the IF signal) is output via the IF terminal.

[0044] In this way, the frequency converter 1 achieves bidirectional frequency conversion by switching the direction of the DC current flowing within the frequency converter 1. Specifically, by configuring a state in which a DC current flows from the RF terminal side to the IF terminal side, conversion from an IF signal to an RF signal is achieved. Also, by configuring a state in which a DC current flows from the IF terminal side to the RF terminal side, conversion from an RF signal to an IF signal is achieved. In this case, the transistors M1 to M4 constituting the double balanced mixer operate as active circuits, so conversion loss is small. Alternatively, an RF signal having a predetermined output level (for example, the transmission power required for a base station to achieve a predetermined communication coverage) can be generated without increasing the power of the LO signal. Therefore, the configuration shown in FIG. 3 can reduce the power consumption of a communication device including a frequency converter.

[0045] Figures 5 and 6 are diagrams illustrating the effects of the embodiment of the present invention. Here, the passive mixer shown in Figure 1 is compared with the embodiment shown in Figure 3. Figures 5 and 6 show the results of a simulation performed under the following conditions: IF signal frequency: 7GHz LO signal frequency: 40GHz RF signal frequency: 47GHz

[0046] 5A shows the conversion gain in the transmit mode. In the transmit mode, the frequency converter up-converts the IF signal using the LO signal to output the RF signal. Therefore, the conversion gain in the transmit mode represents the ratio of the output power of the RF signal to the input power of the IF signal.

[0047] According to this simulation, the conversion gain in the transmission mode is improved by about 3 dB compared to the passive mixer shown in Fig. 1. Therefore, when an RF signal of a predetermined power is output, the power gain of the amplifier that amplifies the RF signal can be reduced in a communication device that uses the frequency converter 1 according to the embodiment. Therefore, for example, the power consumption of the amplifier that amplifies the RF signal can be reduced.

[0048] 5B shows the conversion gain in receive mode. In receive mode, the frequency converter downconverts the RF signal using the LO signal to output an IF signal. Therefore, the conversion gain in receive mode represents the ratio of the output power of the IF signal to the received power of the RF signal.

[0049] According to this simulation, the conversion gain in receive mode is improved by about 2 dB compared to the passive mixer shown in Figure 1. Therefore, in this case too, the power consumption of the amplifier that amplifies the IF signal can be reduced.

[0050] Figure 6A shows the relationship between the LO signal power and the conversion gain in the transmit mode. Figure 6B shows the relationship between the LO signal power and the conversion gain in the receive mode. That is, this simulation shows the LO signal power required to obtain a predetermined conversion gain.

[0051] According to this simulation, the power of the LO signal required to obtain a predetermined conversion gain is smaller than that of the passive mixer shown in FIG. 1. For example, assume that the required conversion gain in the transmission mode is -10 dB. In this case, the passive mixer shown in FIG. 1 needs to generate an LO signal of 2 dBm. In contrast, the frequency converter 1 according to the embodiment only needs to generate an LO signal of -6 dBm. Therefore, according to the configuration according to the embodiment, the power consumption of the communication device (for example, the power consumption of the amplifier that amplifies the LO signal) can be reduced. Note that the power of the LO signal generated in the communication device is 0 dBm or less in many cases.

[0052] 3, the transformer T2 is an example of a load circuit provided on the drain side of the transistors M1 to M4. The transformer T1 is an example of a drive circuit that provides an LO signal to the gates of the transistors M1 to M4. The switches SW1 and SW2 are examples of a current control circuit that controls the current flowing from the load circuit to the impedance circuit via the transistors, or the current flowing from the impedance circuit to the load circuit via the transistors.

[0053] <Second embodiment> Fig. 7 shows an example of a frequency converter according to a second embodiment of the present invention. The configuration of the frequency converter 2 according to the second embodiment of the present invention is almost the same as that of the frequency converter 1 according to the first embodiment shown in Fig. 3. However, the frequency converter 2 includes voltage control circuits 12 and 13 in addition to the configuration shown in Fig. 3.

[0054] Voltage control circuits 12 and 13 each include a digital-to-analog converter (DAC). A voltage instruction is given to the DAC. The voltage instruction is, for example, digital data representing a voltage value. The voltage instruction is generated, for example, by a microcomputer (not shown). Alternatively, the manufacturer or user of frequency converter 2 may generate the voltage instruction using a computer. The DAC then converts the voltage instruction into an analog signal, thereby outputting a DC voltage represented by the voltage instruction. That is, voltage control circuits 12 and 13 can each output a DC voltage represented by the voltage instruction. Note that the configuration including a DAC is just an example, and voltage control circuits 12 and 13 may also be configured without a DAC.

[0055] The DC voltage output from the voltage control circuit 12 is applied to the sources of the transistors M1 and M2. That is, the voltage control circuit 12 controls the potential of the sources of the transistors M1 and M2. In the following description, the sources of the transistors M1 and M2 may be referred to as "point P1." Furthermore, the potential of the sources of the transistors M1 and M2 may be referred to as "Vs1."

[0056] Similarly, the DC voltage output from the voltage control circuit 13 is applied to the sources of the transistors M3 and M4. That is, the voltage control circuit 13 controls the potential of the sources of the transistors M3 and M4. In the following description, the sources of the transistors M3 and M4 may be referred to as "point P2." Furthermore, the potential of the sources of the transistors M3 and M4 may be referred to as "Vs2."

[0057] Voltage control circuits 12 and 13 control the DC voltages to be applied to points P1 and P2 so as to reduce the LO leakage power leaking from the RF terminal. That is, voltage control circuits 12 and 13 control the potentials at points P1 and P2 so as to reduce the LO leakage power leaking from the RF terminal. Therefore, first, the LO leakage power leaking from the RF terminal will be described. Note that the LO leakage power represents the power of the LO signal component appearing at the RF terminal via transformer T2.

[0058] FIG. 8 is a diagram illustrating LO leakage power leaking from the RF terminal. In FIG. 8, the drains of transistors M1 and M2 are sometimes referred to as "point P3," and the drains of transistors M3 and M4 are sometimes referred to as "point P4." Also in FIG. 8, the wiring between the transformer T2 and the transistors M1 to M4 is depicted schematically to make the drawing easier to understand. That is, the transformer T2 and the transistors M1 to M4 are actually connected as shown in FIG. 7.

[0059] 7 or 8, the LO leakage power leaking from the RF terminal is determined based on the amplitude and phase of the LO signal at point P3 and the amplitude and phase of the LO signal at point P4. For example, if transformer T2 is an ideal transformer, and the amplitudes of the LO signals at points P3 and P4 are the same and the phases of the LO signals at points P3 and P4 are the same, the power of the LO signal output via the RF terminal (i.e., the LO leakage power) is zero.

[0060] Here, the amplitude and phase of the LO signal at point P3 can be adjusted by controlling the potential Vs1 at point P1. The amplitude and phase of the LO signal at point P4 can be adjusted by controlling the potential Vs2 at point P2. Therefore, if the potentials Vs1 and Vs2 are controlled so that the amplitudes of the LO signals at points P3 and P4 are the same and the phases of the LO signals at points P3 and P4 are the same, the LO leakage power becomes zero.

[0061] However, in the procedure for reducing the LO leakage power, it is not necessary to control both the potential Vs1 and the potential Vs2. For example, the LO leakage power can be reduced by fixing either the potential Vs1 or the potential Vs2 at a predetermined value and controlling the other potential.

[0062] FIG. 9 is a diagram illustrating a method for suppressing LO leakage power. In this embodiment, either the potential Vs1 or the potential Vs2 is fixed to a predetermined value. As an example, it is assumed that the potential Vs1 is fixed to a predetermined value. In this case, the horizontal axis of the graph shown in FIG. 9 represents the potential Vs2.

[0063] In this embodiment, in the procedure for reducing the LO leakage power, the potential Vs1 is fixed to a predetermined value. For example, the voltage control circuit 12 outputs a predetermined fixed value (for example, zero). Alternatively, the frequency converter 2 may not include the voltage control circuit 12.

[0064] Next, the output voltage of the voltage control circuit 13 is swept. Here, it is assumed that a microcomputer (not shown) generates a voltage command. In this case, the microcomputer changes the value represented by the voltage command at a predetermined interval (for example, 1 mV). As a result, the potential Vs2 at point P2 shown in FIG. 7 or FIG. 8 changes little by little. As a result, the LO leakage power appearing at the RF terminal changes as shown in FIG. 9. At this time, the LO leakage power has a minimum point. In the example shown in FIG. 9, the LO leakage power is minimized when the potential Vs2 is V0. Therefore, in this case, the microcomputer maintains the voltage command that keeps the potential Vs2 at V0. As a result, the LO leakage power output via the RF terminal is reduced.

[0065] Note that the characteristics of the transistors M1 to M4 may depend on temperature. Furthermore, the characteristics of the transistors M1 to M4 may change over time. Therefore, the voltage instructions given to the voltage control circuits 12 and 13 may be feedback-controlled while monitoring the LO leakage power.

[0066] As described above, in the second embodiment, the LO leakage power output via the RF terminal is suppressed. That is, spurious signals are suppressed, improving the quality of wireless communication. Note that spurious signals can be suppressed by providing a filter that removes the frequency components of the LO signal. However, in this case, the filter also reduces the power of the RF signal, which increases the power consumption of the amplifier that amplifies the RF signal. Therefore, the second embodiment also contributes to reducing power consumption. In addition, a configuration that uses a filter to remove spurious signals requires a large number of components, which is disadvantageous in terms of miniaturizing communication devices.

[0067] <Variations> FIG. 10 shows an example of a frequency converter according to the first variation. Similar to the frequency converter 1 shown in FIG. 3, the frequency converter 1B according to the first variation includes a double-balanced mixer (i.e., transistors M1 to M4), transformers T1 and T2, an impedance circuit 11, and a switch SW1. However, frequency converter 1B does not include switch SW2 shown in FIG. 3, and impedance circuit 11 is connected to ground. Specifically, the sources of transistors M1 and M2 are connected to ground via impedance circuit Z1, and the sources of transistors M3 and M4 are connected to ground via impedance circuit Z2. In frequency converter 1B, a current control circuit that controls the DC current flowing through transistors M1 to M4 is implemented by switch SW1.

[0068] When the frequency converter 1B operates in the transmission mode, the switch SW1 connects the midpoint of the primary winding of the transformer T2 to the power supply AVD. In this case, current flows from the power supply AVD to ground via the transformer T2, the transistors M1 to M4, and the impedance circuit 11 (Z1, Z2). In other words, the transistors M1 to M4 are maintained in an active state. Therefore, the frequency converter 1B operates as an active frequency converter in the transmission mode, converting an IF signal into an RF signal and outputting it.

[0069] When the frequency converter 1B operates in the receive mode, the switch SW1 connects the midpoint of the primary winding of the transformer T2 to ground. In this case, substantially no DC current flows through the transistors M1 to M4. That is, the double balanced mixer operates as a passive circuit.

[0070] FIG. 11 shows an example of a frequency converter according to the second variation. Similar to the frequency converter 1 shown in FIG. 3, the frequency converter 1C according to the second variation includes a double-balanced mixer (i.e., transistors M1 to M4), transformers T1 and T2, an impedance circuit 11, and a switch SW2. However, the frequency converter 1C does not include the switch SW1 shown in FIG. 3, and the midpoint of the primary winding of the transformer T2 is connected to ground. In the frequency converter 1C, a current control circuit that controls the DC current flowing through the transistors M1 to M4 is implemented by the switch SW2.

[0071] When the frequency converter 1C operates in the receive mode, the switch SW2 connects the impedance circuit 11 to the power supply AVD. In this case, a current flows from the power supply AVD to the ground via the impedance circuit 11 (Z1, Z2), the transistors M1 to M4, and the transformer T2. That is, the transistors M1 to M4 are maintained in an active state. Therefore, the frequency converter 1C operates as an active frequency converter in the receive / transmit mode in which it converts a received RF signal into an IF signal.

[0072] When the frequency converter 1C operates in the transmission mode, the switch SW2 connects the impedance circuit 11 to ground. In this case, substantially no direct current flows through the transistors M1 to M4. That is, the double balanced mixer operates as a passive circuit.

[0073] 12 shows an example of a frequency converter according to the third variation. Similar to the frequency converter 1 shown in FIG. 3, the frequency converter 1D according to the third variation includes a double balanced mixer (transistors M1 to M4), a transformer T1, an impedance circuit 11, and switches SW1 and SW2. However, the RF signal processed by the frequency converter 1D is a differential signal. Therefore, the configuration of the drain side of the double balanced mixer differs from that of the frequency converter 1 shown in FIG. 3.

[0074] In the frequency converter 1D, an RF_P terminal is connected to the drains of the transistors M1 and M3, and an RF_N terminal is connected to the drains of the transistors M2 and M4. A switch SW1 is connected to the drains of the transistors M1 and M3 via an inductor L1, and is also connected to the drains of the transistors M2 and M4 via an inductor L2.

[0075] The control of the switches SW1 and SW2 is substantially the same in the frequency converter 1 shown in FIG. 3 and the frequency converter 1D shown in FIG. 12. That is, when the frequency converter 1D operates in the transmission mode, the switch SW1 connects the inductors L1 and L2 to the power supply AVD, and the switch SW2 connects the impedance circuit 11 to the ground. In this case, a current flows from the power supply AVD to the ground via the inductors L1 and L2, the transistors M1 to M4, and the impedance circuit 11 (Z1, Z2). On the other hand, when the frequency converter 1D operates in the reception mode, the switch SW1 connects the inductors L1 and L2 to the ground, and the switch SW2 connects the impedance circuit 11 to the power supply AVD. In this case, a current flows from the power supply AVD to the ground via the impedance circuit 11 (Z1, Z2), the transistors M1 to M4, and the inductors L1 to L2.

[0076] In this way, in both the transmission mode and the reception mode, frequency conversion is performed while the transistors M1 to M4 are kept active. Furthermore, since the frequency converter 1D processes differential RF signals, noise resistance within the communication device (for example, the path between the antenna and the frequency converter) is enhanced.

[0077] FIG. 13 shows an example of a frequency converter according to the fourth variation. Similar to the frequency converter 1D shown in FIG. 12, the frequency converter 1E according to the fourth variation processes differential RF signals. However, the frequency converter 1E performs active operation in the transmit mode and passive operation in the receive mode. Therefore, the configuration of the drain side of the double balanced mixer is the same as that of the frequency converter 1B shown in FIG. 10.

[0078] FIG. 14 shows an example of a frequency converter according to the fifth variation. Similar to the frequency converter 1D shown in FIG. 12, the frequency converter 1F according to the fifth variation processes differential RF signals. However, the frequency converter 1F performs active operation in the receive mode and passive operation in the transmit mode. Therefore, the configuration of the source side of the double balanced mixer differs from that of the frequency converter 1D. Specifically, the drains of the transistors M1 and M3 are connected to ground via the inductor L1, and the drains of the transistors M2 and M4 are connected to ground via the inductor L2.

[0079] FIG. 15 shows an example of a frequency converter according to a sixth variation. Similar to the frequency converter 2 shown in FIG. 7, the frequency converter 2B according to the sixth variation includes voltage control circuits 12 and 13, and is capable of suppressing LO leakage power. However, the frequency converter 2B performs active operation in the transmit mode and passive operation in the receive mode. Therefore, the configuration of the drain side of the double balanced mixer is the same as that of the frequency converter 1B shown in FIG. 10.

[0080] FIG. 16 shows an example of a frequency converter according to the seventh variation. Similar to the frequency converter 2 shown in FIG. 7, the frequency converter 2C according to the seventh variation includes voltage control circuits 12 and 13, and is capable of suppressing LO leakage power. However, the frequency converter 2C performs active operation in the receive mode and passive operation in the transmit mode. Therefore, the configuration of the drain side of the double balanced mixer is the same as that of the frequency converter 1C shown in FIG. 11.

[0081] <Application example> A frequency converter according to an embodiment of the present invention is used in, for example, a base station device. The base station device includes, for example, an E2 node and an RU (Radio Unit) module. For example, as shown in FIG. 17 , the RU module 50 includes an optical unit 51, a digital unit 52, and an RF module 53. The optical unit 51 includes an optical device including an optical receiver and an optical transmitter. The optical receiver receives an optical signal transmitted from the E2 node. The optical transmitter transmits an optical signal to the E2 node. The digital unit 52 includes a signal processing unit. The signal processing unit generates a transmission signal to be transmitted from the base station to a terminal. This transmission signal is guided to the RF module 53 as an IF signal. The signal processing unit also processes a signal received by the base station from the terminal. This signal is output from the RF module 53.

[0082] The RF module 53 includes a plurality of BFICs (Beam Forming Integrated Circuits). Each BFIC includes a frequency converter according to an embodiment of the present invention. That is, the BFIC can upconvert a transmission signal generated by the digital unit 52 from the IF band to the RF band and output the upconverted signal. The BFIC also downconverts a signal received via an antenna from the RF band to the IF band and guides the downconverted signal to the digital unit 52.

[0083] Here, by using a frequency converter according to an embodiment of the present invention, power savings in the RU module 50 are realized. Furthermore, the conversion efficiency of the frequency converter according to an embodiment of the present invention is high. Therefore, the gain of the amplifier that amplifies the transmit signal and / or receive signal can be reduced. In other words, a signal with sufficient power can be obtained with a small amplifier, which allows the RU module 50 to be made smaller. Furthermore, spurious signals (LO leakage power) are suppressed, improving the quality of communications between the base station and the terminal. [Explanation of symbols]

[0084] 1, 1B~1F, 2, 2B~2C Frequency converter 11 Impedance Circuit 12, 13 Voltage control circuit

Claims

1. a transistor constituting a double balanced mixer; a load circuit provided on the drain side of the transistor; a first terminal connected to the load circuit; an impedance circuit provided on the source side of the transistor; a second terminal connected to the source of the transistor; a driver circuit for applying a local oscillator signal to the gate of the transistor; a current control circuit that controls a current flowing from the load circuit to the impedance circuit via the transistor, or a current flowing from the impedance circuit to the load circuit via the transistor; A frequency converter comprising:

2. The current control circuit includes a first switch that connects the load circuit to a power supply or ground in response to a first control signal.

2. The frequency converter according to claim 1 .

3. The current control circuit includes a second switch that connects the impedance circuit to a power supply or ground in response to a second control signal.

2. The frequency converter according to claim 1 .

4. The current control circuit a first switch that connects the load circuit to a power supply or ground in response to a first control signal; a second switch that connects the impedance circuit to the power supply or ground in response to a second control signal; when the first switch connects the load circuit to the power supply in response to the first control signal, the second switch connects the impedance circuit to ground in response to the second control signal; When the first switch connects the load circuit to ground in response to the first control signal, the second switch connects the impedance circuit to the power supply in response to the second control signal.

2. The frequency converter according to claim 1 .

5. the load circuit is a transformer, the first switch is connected to a midpoint of a first winding of the transformer; The first terminal is connected to a second winding of the transformer.

5. The frequency converter according to claim 4.

6. one terminal of the impedance circuit is connected to the second switch; the other terminal of the impedance circuit is connected to the source of the transistor and the second terminal; The impedance circuit has a predetermined resistance value for direct current and a high impedance at an intermediate frequency.

5. The frequency converter according to claim 4.

7. the double balanced mixer includes a first transistor, a second transistor, a third transistor, and a fourth transistor; the sources of the first transistor and the second transistor are connected to each other; the sources of the third transistor and the fourth transistor are connected to each other; the drains of the first transistor and the third transistor are connected to each other; The drains of the second transistor and the fourth transistor are connected to each other.

5. The frequency converter according to claim 4.

8. the load circuit is a transformer, the drains of the first transistor and the third transistor are connected to one end of a first winding of the transformer; the drains of the second transistor and the fourth transistor are connected to the other end of the first winding of the transformer; the first switch is connected to a midpoint of the first winding of the transformer; The first terminal is connected to a second winding of the transformer.

8. The frequency converter according to claim 7.

9. the load circuit includes a first inductor and a second inductor; the drains of the first transistor and the third transistor are connected to the first switch via the first inductor; The drains of the second transistor and the fourth transistor are connected to the first switch via the second inductor.

8. The frequency converter according to claim 7.

10. The semiconductor device further includes a voltage control circuit that controls the potential of the source of the transistor.

2. The frequency converter according to claim 1 .

11. The voltage control circuit controls the potential of the source of the transistor so as to reduce the frequency component of the local oscillator signal output via the first terminal.

11. The frequency converter according to claim 10.

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