Method for imprinting and method for manufacturing semiconductor device

Abstract

To suppress generation of failure in a missing shot.SOLUTION: In an embodiment, a method for imprinting includes, among a plurality of shot regions provided on a substrate, dispensing a plurality of droplets onto a first shot region including a step by using a correction recipe. The correction recipe identifies the position of the step in the first shot region and the position of the outer edge portion of the substrate, sets the region between the identified step and the outer edge portion of the substrate as a first region, sets the region between the step and a first position located inside the substrate by a first distance from the step as a second region, and is generated by applying a correction to a droplet recipe in which droplet dispensing positions are defined so as to dispense the plurality of droplets at a predetermined interval, the correction shifting the dispensing positions of droplets located in the first and second regions toward an inner side of the substrate relative to the first position.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to an imprint method and a method for manufacturing a semiconductor device. [Background technology]

[0002] The manufacturing process of semiconductor devices may include an imprint process. In the imprint process, a pattern of a template is transferred onto a resist material or the like that is dropped onto a shot area of ​​a substrate. At the periphery of the substrate, a shot area may be partially missing, resulting in a missing shot. The location and area of ​​the missing shot may vary for each missing shot. Therefore, applying the same amount and dropping position of resist material to a missing shot as for a normal shot area may result in defects in the imprint process. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2018-073989 [Patent Document 2] Japanese Patent Application Publication No. 2018-195811 [Patent Document 3] Japanese Patent Publication No. 2021-150457 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of one embodiment is to provide an imprint method and a semiconductor device manufacturing method that can suppress the occurrence of defects in missing shots. [Means for solving the problem]

[0005] An imprinting method according to an embodiment is an imprinting method for a substrate having a step on its outer periphery, and includes dropping multiple droplets into a first shot area, the first shot area including the step, using a correction recipe. The correction recipe identifies the position of the step in the first shot area and the position of the outer edge of the substrate, sets a first area between the identified step and the outer edge of the substrate, and sets a second area between a first position inside the substrate and the step at a first distance from the step. The correction recipe is generated by correcting a drop recipe in which drop positions are defined so that the multiple droplets are dropped at a predetermined period, by shifting the drop positions of droplets located in the first and second areas inward from the first position. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic diagram showing an example of the configuration of an imprint apparatus according to an embodiment. [Figure 2] FIG. 2 is a schematic view showing an example of the configuration of a wafer processed by the imprint apparatus according to the embodiment. [Figure 3] 5A to 5C are cross-sectional views illustrating a part of a procedure for removing an edge bead from a wafer in order according to an embodiment. [Figure 4] 5A to 5C are cross-sectional views illustrating in order some steps of an imprint process performed by the imprint apparatus according to the embodiment. [Figure 5] 5A to 5C are cross-sectional views illustrating in order some steps of an imprint process performed by the imprint apparatus according to the embodiment. [Figure 6] 5A to 5C are cross-sectional views illustrating a part of a procedure for etching a processing target layer in accordance with an embodiment. [Figure 7] 5A and 5B are schematic diagrams illustrating a method for correcting a drop recipe by the imprint apparatus according to the embodiment. [Figure 8] FIG. 4 is a flowchart showing an example of a procedure of an imprint process performed by the imprint apparatus according to the embodiment. [Figure 9]1A to 1C are cross-sectional views illustrating the procedure of an imprint process performed by an imprint apparatus according to a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the following embodiments. Furthermore, the components in the following embodiments include those that can be easily imagined by a person skilled in the art or those that are substantially the same.

[0008] (Configuration example of an imprint device) FIG. 1 is a schematic diagram showing an example of the configuration of an imprint apparatus 1 according to an embodiment.

[0009] As shown in FIG. 1, the imprint apparatus 1 includes a template stage 81, a wafer stage 82, image pickup devices 83 and 84, a reference mark 85, an alignment unit 86, a liquid dropping device 87, a stage base 88, a light source 89, and a control unit 90.

[0010] A template 10 that transfers a pattern to a resist on a wafer 20 can be attached to the imprint apparatus 1. The wafer 20 undergoes various processes, including the processes in the imprint apparatus 1, to manufacture a semiconductor device. Such a wafer 20 can be a semiconductor substrate, an insulating substrate, a conductive substrate, or the like.

[0011] The wafer stage 82 includes a wafer chuck 82b and a main body 82a. The wafer chuck 82b is configured as a suction chuck that sucks the wafer 20 to a predetermined position on the main body 82a. A reference mark 85 is provided on the wafer stage 82. The reference mark 85 is used for alignment when loading the wafer 20 onto the wafer stage 82.

[0012] The wafer stage 82 places the wafer 20 on it and moves within a plane (horizontal plane) parallel to the placed wafer 20. The wafer stage 82 moves the wafer 20 below the liquid dropping device 87 when dropping resist onto the wafer 20, and moves the wafer 20 below the template 10 when performing a transfer process onto the wafer 20.

[0013] The stage base 88 supports the template 10 by means of the template stage 81, and moves in the up and down direction (vertical direction) to press the pattern of the template 10 against the resist on the wafer 20.

[0014] An alignment unit 86 equipped with a plurality of image pickup elements 83 is provided on the stage base 88. The alignment unit 86 detects the position of the wafer 20 and the position of the template 10 based on alignment marks provided on the wafer 20 and the template 10, respectively.

[0015] The alignment unit 86 includes a detection system 86a and an illumination system 86b. The illumination system 86b illuminates the wafer 20 and the template 10, making the alignment marks formed thereon visible. The detection system 86a detects images of the alignment marks and aligns the wafer 20 and the template 10 by aligning their positions.

[0016] The detection system 86a and the illumination system 86b each include mirrors 86x and 86y such as dichroic mirrors as imaging units. The mirrors 86x and 86y form images of alignment marks and other marks from the wafer 20 and the template 10 using light from the illumination system 86b.

[0017] Specifically, light Lb from illumination system 86b is reflected by mirror 86y downward, where wafer 20 and the like are placed. Light La from wafer 20 and the like is reflected by mirror 86x toward detection system 86a. A portion of light Lc from wafer 20 and the like passes through mirrors 86x and 86y and travels upward toward image pickup element 83.

[0018] The image pickup element 83 picks up this part of the light Lc as an image including the alignment mark etc. The image picked up by the image pickup element 83 is analyzed by the control unit 90 in order to align the wafer 20 and the template 10.

[0019] On the other hand, the light La reflected by the mirror 86x toward the detection system 86a proceeds toward the image pickup element 84 included in the detection system 86a.

[0020] The image pickup element 84 captures the light La reflected by the mirror 86x as an image including the alignment mark, etc. The image captured by the image pickup element 84 is analyzed by the control unit 90 in order to align the wafer 20 and the template 10.

[0021] The liquid dropping device 87 is a device that drops resist onto the wafer 20 by an inkjet method. The inkjet head provided in the liquid dropping device 87 has a plurality of fine holes that spray droplets of resist, and drops the droplets of resist onto a shot area on the wafer 20.

[0022] The light source 89 is a device that irradiates light such as ultraviolet light to harden the resist, and is provided above the stage base 88. The light source 89 irradiates light from above the template 10 while the template 10 is pressed against the resist.

[0023] The control unit 90 is configured as a computer including, for example, a hardware processor such as a CPU (Central Processor), a memory, an HDD (Hard Disk Drive), etc. The control unit 90 controls the template stage 81, the wafer stage 82, the reference mark 85, an alignment unit 86 including image pickup elements 83 and 84, a liquid dropping device 87, a stage base 88, and a light source 89.

[0024] Next, an example of the configuration of the wafer 20 to be processed by the imprint apparatus 1 will be described with reference to FIG.

[0025] 2A and 2B are schematic diagrams showing an example of the configuration of a wafer 20 processed by the imprint apparatus 1 according to an embodiment. More specifically, the upper part of each of FIGS. 2A and 2B is a top view of the wafer 20, and the lower part is a cross-sectional view of the side of the wafer 20.

[0026] 2, the wafer 20 has a raised region 21 in which multiple layers are stacked, except for the outer periphery. Prior to processing in the imprint apparatus 1, the wafer 20 has already been subjected to, for example, multiple processes. The multiple layers in the raised region 21 may include insulating layers, conductive layers, semiconductor layers, and the like formed by these processes.

[0027] An edge region 23 is formed at the outer periphery of the wafer 20 by removing these layers. By removing some or all of the layers that make up the convex region 21, the surface of the wafer 20, which is, for example, a silicon substrate, is exposed in the edge region 23. As a result, the convex region 21 protrudes from the surface of the wafer 20, and the wafer 20 has a step 22 at the boundary between the convex region 21 and the edge region 23 that decreases from the convex region 21 toward the edge region 23. The height of such a step 22 is, for example, on the order of microns.

[0028] The step 22 of the wafer 20 surrounds the outer periphery of the wafer 20 in a circular shape, going around the outer periphery. The convex region 21 defined from the edge region 23 by the step 22 has a shape that is roughly similar to that of the wafer 20, and is a circular region when viewed from the top surface of the wafer 20. However, the center point of the convex region 21 when viewed from the top surface of the wafer 20 does not necessarily coincide with the center point of the wafer 20.

[0029] 2(a) shows an example in which the center point of the convex region 21 does not coincide with the center point of the wafer 20. In the example of FIG. 2(a), the convex region 21 is eccentric to the lower right of the page relative to the wafer 20. As a result, the width of the edge region 23 varies depending on the outer periphery position of the wafer 20. That is, in the example of FIG. 2(a), the width of the edge region 23 is maximum at the outer periphery position in the upper left of the page, and minimum at the outer periphery position in the lower right of the page.

[0030] 2(b) shows an example in which the center point of the convex region 21 coincides with the center point of the wafer 20. In this case, the width of the edge region 23 is approximately constant at any position on the outer periphery of the wafer 20.

[0031] Furthermore, through the processes performed up to this point, the upper surface of the wafer 20 has been partitioned into a plurality of shot areas SH (SHe, SHc). The plurality of shot areas SH are arranged in a grid pattern over substantially the entire surface of the wafer 20. Of these shot areas SH, the shot areas SHHe arranged in areas excluding the outer periphery of the wafer 20 each have, for example, a rectangular shape. On the other hand, some of the shot areas SHc arranged in the outer periphery of the wafer 20 are missing shots with parts protruding from the convex area 21.

[0032] These shot areas SH are areas that serve as processing units for one run in some processes, including the imprint process, among the multiple manufacturing processes for semiconductor devices. That is, for example, in the imprint process described below, a process of transferring the pattern of the template 10 is performed for each shot area SH. In the final stage of the semiconductor device manufacturing process, one or more semiconductor chips are singulated from each shot area SH, thereby obtaining one or more semiconductor devices.

[0033] The multiple shot areas SH arranged in a grid pattern on the wafer 20 are formed so that the center points of all of these shot areas SH coincide with the center point of the wafer 20. Therefore, the convex areas 21 of the wafer 20 may also be eccentric with respect to the multiple shot areas SH. As a result, the relative positional relationship between the steps 22 and the individual shot areas SH differs between the example shown in FIG. 2(a) in which the convex areas 21 are eccentric with respect to the shot areas SH and the example shown in FIG. 2(b) in which the convex areas 21 are not eccentric with respect to the shot areas SH. As a result, differences arise in the area, shape, etc. of some of the shot areas SHc on the periphery of the wafer 20.

[0034] (Method of manufacturing a semiconductor device) Next, a method for manufacturing the semiconductor device of the embodiment will be described with reference to Figures 3 to 7. The manufacturing process of the semiconductor device of the embodiment includes an edge-bead removal (EBR) process for the wafer 20 and an imprint process using the imprint apparatus 1 described above.

[0035] 3A to 3C are cross-sectional views illustrating in order some steps of the edge bead removal process for the wafer 20 according to the embodiment.

[0036] As shown in FIG. 3( a), multiple layers 30, including, for example, an insulating layer, a conductive layer, and a semiconductor layer, have been formed on the wafer 20 to be subjected to imprint processing through previous processing. Repeating the process of forming various layers multiple times can result in an edge bead 30e, where the thickness of the multiple layers 30 is thickened overall, at the outer periphery of the wafer 20. The edge bead 30e can cause various defects in subsequent processing. Therefore, it is preferable to remove the edge bead 30e as appropriate at a predetermined timing, as described below.

[0037] As shown in FIG. 3( b ), a photoresist layer 100 that covers the entire surface of the wafer 20 is formed on the multiple layers 30 .

[0038] 3(c), a resist pattern 100p is formed by removing a predetermined width of the photoresist layer 100 on the periphery of the wafer 20. This exposes the periphery of the multiple layers 30, including the edge bead 30e.

[0039] The photoresist layer 100 on the outer periphery of the wafer 20 is removed by, for example, exposing the outer periphery of the wafer 20 or by discharging a removal liquid that dissolves the photoresist layer 100 onto the outer periphery of the wafer 20 .

[0040] The exposure process on the peripheral portion of the wafer 20 is performed on the photoresist layer 100 before the exposure and development processes. That is, for example, while the wafer 20 is rotated on a spinner with the center point of the wafer 20 as seen from above as the rotation axis, the peripheral portion is irradiated with exposure light such as laser light. As a result, the photoresist layer 100 on the peripheral portion of the wafer 20 is exposed to a predetermined width, and then removed by development.

[0041] The dissolution process of the photoresist layer 100 is performed on the photoresist layer 100 after the exposure and development processes. That is, as described above, the wafer 20 is rotated on a spinner with the center point of the wafer 20 as the rotation axis, while a remover is discharged onto the outer periphery. As a result, the photoresist layer 100 on the outer periphery of the wafer 20 is dissolved and removed in a predetermined width.

[0042] Regardless of which of the above methods is used, a slight misalignment may occur between the rotation axis of the spinner and the center of the wafer 20 when the wafer 20 is held on the spinner. In this case, the center of the resist pattern 100p, whose outer periphery has been removed, will not coincide with the center of the wafer 20, and the resist pattern 100p will be eccentric with respect to the wafer 20. This will also cause the removal width of the photoresist layer 100 at the outer periphery of the wafer 20 to vary depending on the outer periphery position of the wafer 20.

[0043] 3(d), the multiple layers 30 exposed from the resist pattern 100p are etched to remove the edge bead 30e formed on the multiple layers 30. At this time, the etching may be performed until all of the multiple layers 30 on the wafer 20 are removed and the surface of the wafer 20 is exposed, or the upper layer portions of the multiple layers 30 may be removed so that the lower layer portions remain on the wafer 20.

[0044] As a result of the above, an edge region 23a from which the layers 30 have been removed and a convex region 21a that protrudes convexly from the edge region 23a are formed on the wafer 20, and a step 22a is formed between the edge region 23a and the convex region 21a. The convex region 21a, step 22a, and edge region 23a correspond to the convex region 21, step 22, and edge region 23 described above.

[0045] If the resist pattern 100p is formed eccentrically with respect to the wafer 20, the convex region 21 will also be formed eccentrically with respect to the wafer 20.

[0046] The edge bead removal process is performed as appropriate at various times during the manufacturing process of a semiconductor device. Therefore, the edge bead removal process may be performed one or more times at a predetermined timing before the imprint process is performed. In this case, the imprint process may be performed immediately after the edge bead removal process, or may be performed after several additional processes have been performed after the edge bead removal process.

[0047] At this time, the above-mentioned convex region 21a, step 22a, and edge region 23a are inherited by the wafer 20 to be subjected to the imprint processing, and the wafer 20 to be processed has the above-mentioned convex region 21, step 22, and edge region 23.

[0048] 4 and 5 are cross-sectional views illustrating in order a part of the procedure of the imprint process performed by the imprint apparatus 1 according to the embodiment.

[0049] To start the imprint process, the template 10 and the wafer 20 are carried into the imprint apparatus 1, the template 10 is attached to the template stage 81, and the wafer 20 is placed on the wafer stage .

[0050] As shown in Figure 4(a), the wafer 20 loaded into the imprinting apparatus 1 has a processed layer 40 covering the multiple layers 30 that have undergone edge bead removal processing, an SOC (Spin On Carbon) layer 50, and an SOG (Spin On Glass) layer 60 formed in this order from the wafer 20 side, for example, over the entire surface of the wafer 20.

[0051] The processed layer 40 is a layer that is processed into a pattern transferred to the wafer 20 by imprint processing, and is, for example, an insulating layer such as a silicon oxide layer. The SOC layer 50 is an organic layer containing carbon as a main ingredient. The SOG layer 60 is an inorganic layer such as a silicon oxide layer. Both the SOC layer 50 and the SOG layer 60 are formed by, for example, spin coating.

[0052] These layers are formed in the convex region 21a, the step 22a, and the edge region 23a so as to follow the step 22a that the wafer 20 has as a result of the edge bead removal process described above. As a result, the step 22 is also formed in each of these layers, and the convex region 21 and the edge region 23 are formed with the step 22 as a boundary.

[0053] Furthermore, as described above, a plurality of shot areas SH are provided on the wafer 20 on which these layers are formed. The imprint apparatus 1 sequentially executes the following imprint processing on these shot areas SH.

[0054] Of the multiple shot areas SH, droplets 110d of a resist material or the like are dropped onto a shot area SH to be processed by the liquid dropping device 87 of the imprint apparatus 1. The resist material droplets 110d are, for example, a light-curing photoresist, and are dropped onto the wafer 20 in a liquid state before hardening. As a result, the multiple droplets 110d are dispersed and arranged over the entire area of ​​the shot area SH.

[0055] The imprint apparatus 1 holds a drop recipe that defines the droplet volume, number of droplets, and droplet positions of each droplet 110d onto the shot area SH. The drop recipe defines the droplet positions so that droplets are dropped at a predetermined interval, such as a staggered or grid pattern as viewed from above, over the entire rectangular shot area SHe (see FIG. 2) that has no defects. In other words, the drop recipe sets the droplet positions of each droplet 110d so that, theoretically, droplets are dropped at a substantially uniform density over the entire shot area SHe.

[0056] In this specification, "substantially" uniform means that the density of the droplets 110d defined in the droplet recipe is completely uniform, and also includes a case where there is a predetermined deviation.

[0057] However, even when the droplets 110d are dropped using a drop recipe set to achieve a uniform density of the droplets 110d, as described above, the density of the droplets 110d actually dropped onto the wafer 20 may not necessarily be completely uniform. The actual density of the droplets 110d on the wafer 20 may vary within a predetermined range depending on, for example, the dropping accuracy of the liquid dropping device 87, the driving accuracy of the wafer stage 82, the flatness of the wafer 20, and the like.

[0058] Furthermore, when a shot area SHc (see FIG. 2) that is provided on the periphery of the wafer 20 and has a defect is the target of imprint processing, the droplet 110d is dropped after appropriately correcting the drop recipe defined based on the shot area SHe that does not have a defect. The method of correcting the drop recipe will be described in detail later.

[0059] As shown in Figure 4(b), after multiple droplets 110d are dropped onto the shot area SH to be processed according to the drop recipe, the template 10, which has been loaded into the imprint apparatus 1 and attached to the template stage 81, is placed at a position opposite the shot area SH in the vertical direction.

[0060] The template 10 is mounted on the template stage 81 with the surface having the predetermined pattern 10p facing the wafer 20. The pattern 10p provided on the template 10 can be varied as appropriate depending on the pattern to be formed on the workpiece layer 40, such as a line and space pattern, a dot pattern, or a hole pattern.

[0061] As described above, the template 10 is spaced a predetermined distance from the wafer 20 and placed opposite it, and rough alignment is performed while observing the alignment marks provided on the template 10 and the wafer 20, for example, using the imaging element 83 of the imprint apparatus 1.

[0062] In this way, rough alignment is a process of roughly aligning the template 10 and the wafer 20 so that the alignment marks provided on them overlap with each other while they are spaced apart.

[0063] 4(c), after the rough alignment is completed, the pattern 10p of the template 10 is brought into contact with a plurality of droplets 110d on the wafer 20. At this time, the template 10 is held above the wafer 20, leaving a small gap between the template 10 and the SOG layer 60, which is the top layer of the wafer 20.

[0064] From this point onwards, until the imprint process is completed, the template 10 is maintained at a height position with a slight gap between it and the wafer 20. This prevents the template 10 from coming into contact with the wafer 20 and damaging the wafer 20.

[0065] When the template 10 is pressed against the resist layer 110s, the droplets 110d are crushed and spread out, and the droplets 110d are all integrated into a resist layer 110s. Furthermore, part of the resist layer 110s gradually fills the uneven portions of the pattern 10p provided on the template 10 due to capillary action.

[0066] This state is observed by, for example, the image sensor 83, and when the resist layer 110s has almost completely filled the unevenness of the pattern 10p, fine alignment is performed while, for example, the image sensor 84 is used to observe alignment marks provided on the template 10 and the wafer 20.

[0067] In this way, fine alignment is a process in which the template 10 is slid along the surface of the wafer 20 while in contact with the resist layer 110s, thereby more precisely aligning the alignment marks on the template 10 and the wafer 20 so that they overlap.

[0068] The reason for performing fine alignment after the resist layer 110s fills the recesses and projections of the pattern 10p is that the visibility of the alignment mark improves when the recesses and projections of the pattern 10p are filled. However, the filling of the recesses and projections of the pattern 10p with the resist layer 110s and the fine alignment may be performed in parallel. This can improve the throughput of the imprint process.

[0069] 5(a), after fine alignment is completed, the resist layer 110s is hardened by irradiating the template 10 with light such as ultraviolet light from the light source 89 of the imprint apparatus 1 from above. As a result, the pattern 10p of the template 10 is transferred to the resist layer 110s, and a resist pattern 110p is formed.

[0070] As shown in FIG. 5(b), the template 10 is released from the resist pattern 110p.

[0071] 5(c), the above-described imprint process is sequentially performed on a plurality of shot areas SH on the wafer 20 to form a resist pattern 110p for each shot area SH. The resist patterns 110p are formed with a residual resist film 110r at the bottom between the patterns. As described above, the residual resist film 110r is formed by maintaining the template 10 at a height position that leaves a slight gap between the template 10 and the wafer 20 during the imprint process.

[0072] When the imprint processing for all shot areas SH provided on the wafer 20 is completed, the template 10 and wafer 20 are unloaded from the imprint apparatus 1. The wafer 20 unloaded from the imprint apparatus 1 proceeds to the processing shown in FIG.

[0073] 6A to 6C are cross-sectional views illustrating in order some steps of the etching process of the processing target layer 40 according to the embodiment.

[0074] As shown in FIG. 6(a), a technique such as reactive ion etching (RIE) is used to remove the remaining resist film 110r of the resist pattern 110p, and the exposed SOG layer 60 is etched to form an SOG pattern 60p in which the resist pattern 110p is transferred to the SOG layer 60.

[0075] 6(b), the SOC layer 50 is subsequently etched using a technique such as RIE with the SOG pattern 60p as a mask to form an SOC pattern 50p in which the SOG pattern 60p is transferred to the SOC layer 50. Because the resist pattern 110p and the SOC layer 50 are made of, for example, similar materials, at least the resist pattern 110p disappears due to the etching process of the SOC layer 50.

[0076] 6(c), the process layer 40 is further etched using a technique such as RIE with the SOC pattern 50p as a mask to form a pattern 40p in which the SOC pattern 50p is transferred to the process layer 40. Thereafter, the SOC pattern 50p is removed by ashing treatment using oxygen plasma or the like.

[0077] Thereafter, for example, if the processing target layer 40 is an insulating layer or the like, a conductive layer or the like is embedded in the pattern 40p of the processing target layer 40 to form wiring, vias, etc. By repeating the above-described process multiple times, the semiconductor device of the embodiment is manufactured.

[0078] In the above example, the process layer 40 is an insulating layer or the like, but the process layer 40 may be other types of layers such as a conductive layer or a semiconductor layer. Also, the SOC layer 50 and the SOG layer 60 are formed on the process layer 40, and then the resist pattern 110p to be subjected to the imprinting process is formed, but the layer configuration used when processing the process layer 40 is not limited to the above.

[0079] As described above, the wafer 20 is provided with shot areas SHe that are located in an area excluding the outer periphery of the wafer 20 and have no chips, and shot areas SHc that are located on the outer periphery of the wafer 20. Furthermore, since the convex area 21 including the multiple layers 30 that have been subjected to the edge bead removal process may be eccentric with respect to the entire plurality of shot areas SH, the shape and area of ​​the shot areas SHc may vary from wafer to wafer.

[0080] On the other hand, the drop recipe of the imprint apparatus 1 is defined, for example, based on a shot area SHe that does not have a defect. Therefore, in the imprint processing of the embodiment, when processing a shot area SHc that has a defect, the control unit 90 of the imprint apparatus 1 corrects the drop recipe to suit each individual shot area SHc.

[0081] 7A to 7E are schematic diagrams illustrating a method for correcting a drop recipe by the imprint apparatus 1 according to the embodiment. 7A to 7E are based on an example of an image 83a captured by an image sensor 83 of a predetermined shot area SHc provided on a wafer 20. The correction method shown in FIG. 7 is performed by, for example, a control unit 90 in the imprint apparatus 1.

[0082] As shown in FIG. 7(a), the control unit 90 of the imprint apparatus 1 identifies the position of the outer edge 20e of the wafer 20 in the shot area SHc and the position of the step 22 based on an image 83a captured of a predetermined shot area SHc.

[0083] FIG. 7(f) shows an example of the relationship between the step 22i observed in the image 83a captured by the imaging unit 83 and the step 22 formed on the wafer 20 to be imprinted.

[0084] As described above, when a step 22 having a sloped shape is viewed from the imaging unit 83 above the wafer 20, the steepest part of the step 22 can be observed as a line. Alternatively, the rounded corner of the step 22, that is, the curved part with the highest curvature, can be observed as a white line with a certain width.

[0085] The above relationship also applies to the outer edge 20e of the wafer 20, which will be described below. That is, when the outer edge 20e of the wafer 20, which includes a bevel portion having a curved shape, is viewed from the imaging unit 83 above the wafer 20, the steepest part of the bevel portion can be observed as a line. Alternatively, the curved portion of the bevel portion can be observed as a white line having a certain width.

[0086] Hereinafter, the step 22i observed by the imaging unit 83 will not be distinguished from the step 22 physically formed on the wafer 20, and will be simply referred to as the step 22. Furthermore, the outer edge 20ei of the wafer 20 observed by the imaging unit 83 will not be distinguished from the physical outer edge 20e of the wafer 20, and will be simply referred to as the outer edge 20e. However, it should be noted that the explanations of Figures 7(a) to 7(e) are, in principle, given with regard to the step 22i and outer edge 20ei observed as lines as described above in the image 83a.

[0087] 7(a) is located near the outer edge 20e of the wafer 20 at the upper left of the page, for example, and as a result, a portion of the shot area SH extends outside the step 22. This portion extending outside the step 22 is the missing portion of the shot area SHc. In this case, the imprint process is performed on the shot area SHc in the portion inside the step 22.

[0088] 7(b), the control unit 90 reads out a drop recipe from, for example, a storage device and applies it to the shot area SHc. In the drop recipe, for example, a plurality of droplets 110d are arranged in a staggered pattern so that the droplets are dispersed and dropped at a substantially uniform density across the entire shot area SHc that does not have any chips. This allows the individual droplets 110d to be arranged at a high density, and also allows the droplets 110d actually dropped onto the wafer 20 to be arranged at a substantially uniform density within the above-mentioned predetermined variation range.

[0089] However, if the target of the imprint process is a shot area SHc that has a defect, if a drop recipe based on the shot area SHe is applied as is, some of the droplets 110d will be dropped outside the step 22 or the outer edge 20e of the wafer 20.

[0090] As shown in Fig. 7(c), the control unit 90 deletes from the drop recipe the droplet 110d that will be dropped outside the outer edge 20e of the wafer 20. In the actual drop recipe, the coordinates of the center point of the droplet 110d as viewed from the top surface of the wafer 20 are set as the drop position of the droplet 110d. Therefore, the droplet 110d whose center point goes outside the outer edge 20e of the wafer 20 in Fig. 7(b) is deleted from the drop recipe.

[0091] In addition, as described above, the area outside the step 22 is not subject to imprint processing. Furthermore, even if the droplet 110d is dropped inside the step 22 in close proximity to the step 22, it is likely that the droplet 110d will extend beyond the step 22 when the template 10 is pressed against the step 22 and spreads. Therefore, the control unit 90 performs a correction to shift the dropping position of the droplet 110d from this area to an area further inside the wafer 20.

[0092] More specifically, the control unit 90 sets, for example, an area A1 between the outer edge 20e of the wafer 20 and the step 22 based on the positions of the outer edge 20e of the wafer 20 and the step 22 identified as described above. Note that the distance between the identified outer edge 20e of the wafer 20 and the step 22 is assumed to be a distance D1.

[0093] The control unit 90 also sets a position L1 inside the wafer 20, a predetermined distance D2 from the position of the step 22 identified as above, and also sets an area A2 between the step 22 and the position L1. Furthermore, the control unit 90 sets a position L2 inside the wafer 20, a predetermined distance D3 from the set position L1, and also sets an area A3 between the positions L1 and L2.

[0094] 7(d), the control unit 90 corrects the droplet recipe to shift the droplet position of the droplet 110d, which is to be placed in the regions A1 and A2, into the region A3. In this case, the droplet position of the droplet 110d, whose coordinates of the center point as viewed from the top surface of the wafer 20 lie outside the step 22, is also the one to be shifted.

[0095] Here, the radius of the droplet 110d that is crushed when the template 10 is pressed against the droplet 110d can be calculated by the following formula (1).

[0096] R=sqrt(V / π / RLT) (1) R: Droplet radius after imprinting the template V: droplet volume RLT (Residual Layer Thickness): Residual resist film thickness

[0097] Furthermore, in order to prevent the crushed droplet 110d from spilling out of the step 22, the region A2 may be set to satisfy the following equation (2) so that the width of the region A2, i.e., the distance D2 between the step 22 and the position L1, is greater than the radius of the crushed droplet 110d.

[0098] D2>R···(2)

[0099] Furthermore, simply removing the droplets 110d from the regions A1 and A2 would result in a shortage of resist material for performing imprint processing on the shot region SHc inside the step 22. In this case, the resist material becomes scarce in the region closer to the step 22, and the resist layer 110s (see FIG. 4(c)) formed inside the step 22 cannot reach the immediate vicinity of the step 22.

[0100] Therefore, as described above, the droplets 110d in regions A1 and A2 are moved to region A3 to compensate for the lack of resist material. In this case, if region A3 is too wide compared to regions A1 and A2, it is difficult to eliminate the lack of resist material near step 22. Therefore, it is preferable to set region A3 so that the widths of regions A1 to A3, i.e., the distance D1 between the outer edge 20e of the wafer 20 and step 22, the distance D2 between step 22 and position L1, and the distance D3 between position L1 and position L2, satisfy the following formula (3):

[0101] D1+D2≧D3 (3)

[0102] This allows the area of ​​region A3 to be smaller than the combined area of ​​regions A1 and A2, preventing a shortage of resist material near step 22 and allowing resist layer 110s to reach very close to step 22.

[0103] 7(e), a corrected recipe is generated by the above correction. By shifting the droplet positions of the droplets 110d in the regions A1 and A2 to the region A3, the droplet density of the droplets 110d in the region A3 is increased compared to the region inside the region A3 in the corrected recipe.

[0104] The droplet positions of the droplets 110d in regions A1 and A2 are preferably shifted to the coordinates of the gaps between the droplets 110d initially placed in region A3. The droplet positions of the droplets 110d in regions A1 and A2 may be shifted by approximately the same distance, or the shift distance may be different for each droplet 110d.

[0105] When performing imprint processing on a shot area SHc having a defect, the control unit 90 of the imprint apparatus 1 generates a correction recipe based on a drop recipe stored in advance, as described above, and performs imprint processing on the shot area SHc in accordance with the generated correction recipe.

[0106] (Imprint method) Next, an imprint method according to an embodiment will be described with reference to Fig. 8. Fig. 8 is a flow diagram showing an example of the procedure for imprint processing by the imprint apparatus 1 according to the embodiment. Before starting the imprint processing on the wafer 20, the control unit 90 of the imprint apparatus 1 acquires shot map information of the wafer 20 in advance from, for example, a design device that designs the design of the wafer 20.

[0107] 8, the template 10 and the wafer 20 are loaded into the imprint apparatus 1 (step S101). The control unit 90 determines whether the shot area SH to be subjected to the imprint process is a shot area SHc having a defect, for example, by referring to shot map information of the wafer 20 or the like (step S102).

[0108] If the target of the imprint processing is the shot area SHc (step S102: Yes), the control unit 90 captures an image of the shot area SHc, for example, using the image sensor 83, and identifies the positions of the outer edge 20e and step 22 of the wafer 20 in the shot area SHc based on the captured image (step S103).

[0109] The control unit 90 also calculates correction values ​​for the droplet positions of some of the droplets 110d in the droplet recipe based on the identified positions of the outer edge 20e of the wafer 20 and the step 22 (step S104).The control unit 90 then generates a corrected recipe in which the droplet positions of these droplets 110d are corrected (step S105).

[0110] That is, the processes in steps S103 to S105 correspond to the procedure shown in FIG.

[0111] If the imprint processing target is a shot area SHe that does not have a chip (step S102: No), the processes of steps S103 to S105 are skipped.

[0112] If the target of the imprint processing is shot area SHe, the control unit 90 performs the imprint processing on the shot area SH to be processed based on a preset drop recipe, and if the target of the imprint processing is shot area SHc, the control unit 90 performs the imprint processing on the shot area SH to be processed based on a corrected recipe obtained by correcting the drop recipe (step S106).

[0113] That is, the process of step S106 corresponds to the procedure shown in FIGS. 4(a) to 5(b) above.

[0114] When the imprint processing for that shot area SH is completed, the control unit 90 determines whether the imprint processing for all shot areas SH provided on the wafer 20 has been completed, for example, by referring to the shot map information of the wafer 20 (step S107).

[0115] If there are any unprocessed shot areas SH (step S107: No), the control unit 90 repeats the processing from step S102, and if processing of all shot areas SH has been completed (step S107: Yes), it unloads the template 10 and wafer 20 from the imprint apparatus 1 (step S108).

[0116] With the above, the imprint process by the imprint apparatus 1 of the embodiment is completed.

[0117] (Overview) In the manufacturing process of a semiconductor device, imprint processing may be performed using an imprint apparatus. Some of the multiple shot areas provided on a wafer are defective shots located on the periphery of the wafer. Various problems may arise in the imprint processing of the defective shots. Some of these problems will be explained using FIG. 9.

[0118] FIG. 9 is a cross-sectional view illustrating the procedure of an imprint process performed by an imprint apparatus according to a comparative example.

[0119] 9(a) to 9(c) illustrate an example of imprint processing performed on a defective shot using a standard drop recipe. As shown in FIG. 9(a), in the imprint processing of the comparative example, the standard drop recipe is applied, resulting in droplets 110dx being dropped in areas including and near the steps. As shown in FIG. 9(b), when these droplets 110dx are pressed against the template 10x, excess resist material spills over the steps, as indicated by the oval in the figure, forming a resist layer 110sx that extends beyond the steps. As shown in FIG. 9(c), after forming a resist pattern 110px by resist curing, when the template 10x is released, resist material 110a may adhere to the steps of the wafer 20x or the template 110x. Such resist material 110a may later become a source of particles.

[0120] 9(d) to 9(f) show an example of imprinting a defective shot using a drop recipe that excludes droplets that would otherwise be dropped outside the step. As shown in FIG. 9(d), in the imprinting process of the comparative example, the number of droplets 110dx is reduced, for example, near the step. As shown in FIG. 9(e), when fine alignment is performed by pressing and sliding the template 10x against these droplets 110dx, the shear force generated by the sliding of the template 10x increases near the step where the resist material is insufficient. This limits the sliding of the template 10x, making it difficult to align the wafer 20x and the template 10x with high precision. As shown in FIG. 9(f), this can result in misalignment of the resist pattern 110px formed on the wafer 20x.

[0121] In this way, in the imprint process for the missing shot, if excessive resist material is dropped near the step, this resist material may adhere to the wafer 20x or the template 10x and generate particles. On the other hand, if the amount of resist material dropped near the step is reduced, there will be a shortage of resist material near the step, making it more likely that misalignment will occur in the resist pattern 110px.

[0122] As described above, the steps around the periphery of the wafer 20x may be eccentric with respect to the entirety of the multiple shot areas, and the shapes and areas of the defective shots on each wafer 20 may vary widely. This exacerbates the various defects that occur in the defective shots.

[0123] According to the imprinting method of the embodiment, when imprinting is performed on a shot area SHc, part of which is located outside a step 22 of the wafer 20, among a plurality of shot areas SH provided on the wafer 20, a correction is made to the drop recipe in which the drop positions of a plurality of droplets 110d of resist material are specified, and the drop positions of the droplets 110d that will be dropped on areas A1 and A2 are shifted inward from position L1 to generate a corrected recipe.

[0124] In this way, by preventing the droplets 110d from being dropped not only in the region A1 outside the step 22 that is not the target of the imprint process, but also in the region A2 that is a certain distance D1 inward from the step 22, the droplets 110d in the region A2 are prevented from spilling out of the step 22 when they are crushed by the template 10. This makes it possible to prevent defects in the shot region SHc, such as the resist material 110a adhering to the template 10 or the wafer 20 and becoming a particle source.

[0125] Furthermore, since the droplets 10d in the regions A1 and A2 are not simply removed but are shifted to the inside of these regions A1 and A2, it is possible to prevent a shortage of resist material near the step 22. This improves the precision of fine alignment due to sliding of the template 10, and prevents misalignment of the resist pattern 110p.

[0126] According to the imprinting method of the embodiment, when imprinting is performed on a shot area SHc, a portion of which is located outside a step 22 of the wafer 20, among multiple shot areas SH provided on the wafer 20, the position of the step 22 in the shot area SHc and the position of the outer edge 20e of the wafer 20 are identified.

[0127] In this way, in the imprint process, by identifying the positions of the steps 22 in each shot area SHc and the outer edge 20e of the wafer 20, the droplets 110d can be dropped appropriately in accordance with each shot area SHc.

[0128] According to the imprint method of the embodiment, the distance D1 of the region A2 is set to be greater than the radius of each of the droplets 110d after the droplets 110d are pressed against the template 10 for the imprint process, thereby more reliably preventing the droplets 110d from protruding outside the step 22 when crushed by the template 10.

[0129] According to the imprint method of the embodiment, when generating a corrected recipe, a correction is made to the drop recipe to shift the drop position of the droplet 110d that is to be dropped into areas A1 and A2 into area A3, thereby generating the corrected recipe.

[0130] In this way, by adding droplets 110d from areas A1 and A2 to area A3, which is less likely to overflow onto the step 22 and is relatively close to the step 22, it is possible to further prevent a shortage of resist material near the step 22.

[0131] According to the imprint method of the embodiment, the regions A1 and A2 are set so that the sum of the distances D1 and D2 is equal to or greater than the distance D3 between the step 22 and the outer edge 20e of the wafer 20. In this way, by adding droplets 110d from the regions A1 and A2 to the area A3, which is smaller than the total area of ​​the regions A1 and A2, it is possible to further suppress the shortage of resist material near the step 22.

[0132] According to the imprint method of the embodiment, the step 22 goes around the outer periphery of the wafer 20, and the distance D3 varies depending on the outer periphery position of the wafer 20. In other words, the wafer 20 has a convex region 21 whose central portion protrudes beyond the step 22, and when viewed from the top surface of the wafer 20, the convex region 21 is eccentric with respect to the wafer 20. In this way, even for a wafer 20 with eccentricity, a correction recipe is generated in accordance with each shot region SHc as described above, so that the droplet 110d can be dropped appropriately.

[0133] According to the imprint method of the embodiment, the photoresist layer 100 for forming the step 22 is removed by irradiating the outer periphery of the wafer 20 with exposure light while rotating the wafer 20, and exposing and developing the photoresist layer 100 in a predetermined width on the outer periphery of the wafer 20. Alternatively, the photoresist layer 100 is removed by exposing and developing the photoresist layer 100, and then discharging a removal solution for the photoresist layer 100 onto the outer periphery of the wafer 20 while rotating the wafer 20, and dissolving the photoresist layer 100 in a predetermined width on the outer periphery of the wafer 20.

[0134] The edge bead removal process performed in this manner causes the above-described eccentricity, which can cause the shape and area of ​​each shot area SHc to differ for each wafer 20. However, as described above, a correction recipe is generated to match each individual shot area SHc, so that the droplets 110d can be dropped appropriately.

[0135] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0136] 1...imprint apparatus, 10...template, 10p, 40p...pattern, 20...wafer, 20e...outer edge, 21...convex area, 22...step, 23...edge area, 30...multiple layers, 40...layer to be processed, 50...SOC layer, 60...SOG layer, 83, 84...imaging element, 90...control unit, 110d...droplet, 110p...resist pattern, 110s...resist layer, A1 to A3...area, D1 to D3...distance, L1, L2...position, SH, SHc, SHe...shot area.

Claims

1. 1. An imprint method for a substrate having a step on its outer periphery, comprising: dropping a plurality of droplets onto a first shot area including the step among a plurality of shot areas provided on the substrate using a correction recipe; The correction recipe is Identifying the position of the step in the first shot area and the position of the outer edge of the substrate; A first region is defined between the step whose position has been identified and an outer edge of the substrate; a second region is defined between a first position located inside the substrate at a first distance from the step and the step; the droplet recipe is generated by correcting the droplet recipe, in which droplet positions are defined so that the droplets are dropped at a predetermined cycle, to shift the droplet positions of the droplets located in the first and second regions inward from the first positions; Imprinting method.

2. The correction recipe is a third region is set between a second position, which is a second distance further inward from the first position and the first position, and the second position; the droplets located in the first and second regions are corrected to be shifted into the third region; The imprint method according to claim 1 .

3. The second region is the first distance is set to be greater than a radius of each of the droplets after the template is pressed against the droplets; The first and second regions are: the sum of the first and second distances is set to be equal to or greater than a third distance between the step and the outer edge of the substrate; The imprint method according to claim 2 .

4. The drop recipe includes: Dropping positions are defined so that the plurality of droplets are dropped at a substantially uniform density. The imprint method according to claim 1 .

5. the step extends around the outer periphery of the substrate, the third distance varies depending on the outer periphery position of the substrate. The imprint method according to claim 3 .

6. the substrate has a convex region whose central portion protrudes from the step as a boundary, When viewed from the top surface of the substrate, the convex region is eccentric with respect to the substrate. The imprint method according to claim 5 .

7. The step is forming a photoresist layer covering the entire surface of the substrate; removing the photoresist layer by a predetermined width while rotating the substrate; the photoresist layer is removed and the outer periphery of the substrate is exposed by the predetermined width, and the surface layer of the substrate is etched away. The imprint method according to claim 1 .

8. The photoresist layer the outer periphery of the substrate is irradiated with exposure light while rotating the substrate, and the photoresist layer on the outer periphery of the substrate is exposed to light over a predetermined width and developed to be removed; The imprint method according to claim 7 .

9. The photoresist layer After the photoresist layer is exposed and developed, a removal solution for the photoresist layer is discharged onto the outer periphery of the substrate while rotating the substrate, and the photoresist layer on the outer periphery of the substrate is dissolved and removed in a predetermined width. The imprint method according to claim 7 .

10. A method for manufacturing a semiconductor device, including an imprint process on a substrate having a step on its outer periphery, forming a processing layer on the substrate; performing an imprint process for each of a plurality of shot areas provided on the substrate to form a mask pattern above the processing layer; processing the processing layer using the mask pattern; The imprint process includes: dropping a plurality of droplets onto a first shot area including the step among the plurality of shot areas using a correction recipe; The correction recipe is Identifying the position of the step in the first shot area and the position of the outer edge of the substrate; A first region is defined between the step whose position has been identified and an outer edge of the substrate; a second region is defined between a first position located inside the substrate at a first distance from the step and the step; the droplet recipe is generated by correcting the droplet recipe, in which droplet positions are defined so that the droplets are dropped at a predetermined cycle, to shift the droplet positions of the droplets located in the first and second regions inward from the first positions; A method for manufacturing a semiconductor device.

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