Ceramic electronic component

Abstract

To provide a ceramic electronic component capable of maintaining a continuity rate of an internal electrode layer while suppressing occurrence of crack.SOLUTION: A ceramic electronic component comprises a multilayer chip configured by laminating a plurality of dielectric layers each containing ceramic as a main component and a plurality of internal electrode layers. The internal electrode layer contains Ni, S and Sn and the internal electrode layer includes an Ni layer containing Ni as a main component in a central part in a thickness direction. In the internal electrode layer, a high Sn concentration part with a higher Sn concentration than that of the Ni layer is provided closer to the dielectric layer than the Ni layer, a high S concentration part with a higher S concentration than that of the Ni layer is provided closer to the dielectric layer than the high Sn concentration part, and the Sn concentration in the high Sn concentration part is higher than the S concentration in the high S concentration part.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to a ceramic electronic component. [Background technology]

[0002] Ceramic electronic components such as multilayer ceramic capacitors are manufactured by printing a metal paste made from a metallic material such as nickel (Ni) on a dielectric green sheet whose main raw material is a dielectric material such as barium titanate, followed by lamination, compression bonding, cutting, binder removal, firing, and application of external electrodes. In order to meet market demands for smaller and larger capacity ceramic electronic components, there is a demand for thinner internal electrode layers and higher lamination density, as well as thinner dielectric layers. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-129116 [Patent Document 2] Japanese Patent Application Laid-Open No. 2014-5491 Summary of the Invention [Problem to be solved by the invention]

[0004] To make the internal electrodes thinner, it is necessary to minimize the physical size of the metal powder particles before firing (see, for example, Patent Document 1). However, when using base metal fine particles such as Ni, the amount of surface oxidation increases as the particle size decreases. When the amount of surface oxidation increases, the progress of binder removal due to surface oxygen becomes significant, and binder removal cracks frequently occur, which can become a problem.

[0005] It is known that sulfur (S) is added to suppress the reduction of surface oxygen (see, for example, Patent Document 2). However, if the amount of S added is too large, rapid shrinkage occurs when the S is desorbed, resulting in cracks. Furthermore, the combustion reaction of S increases the degree of reduction in the atmosphere, accelerating the grain growth of the co-material and dielectric, and deteriorating the continuity of the internal electrodes.

[0006] The present invention has been made in view of the above-mentioned problems, and has an object to provide a ceramic electronic component that can maintain the continuity ratio of internal electrode layers while suppressing the occurrence of cracks. [Means for solving the problem]

[0007] A ceramic electronic component according to the present invention includes a laminated chip in which a plurality of dielectric layers containing ceramic as a main component and a plurality of internal electrode layers are laminated, and the internal electrode layers contain Ni, S, and Sn.

[0008] In the internal electrode layer of the ceramic electronic component, the Sn concentration and the S concentration may be higher in the vicinity of the interface with the dielectric layer than in the center in the thickness direction.

[0009] In the ceramic electronic component, the internal electrode layer may include a Ni layer containing Ni as a main component at a center portion in a thickness direction, and the internal electrode layer may include a high-concentration portion having a higher S concentration and Sn concentration than the Ni layer on the dielectric layer side of the Ni layer.

[0010] In the ceramic electronic component, the internal electrode layer may include a Ni layer containing Ni as a main component at the center in the thickness direction, and the internal electrode layer may include a high S concentration portion having a higher S concentration than the Ni layer on the dielectric layer side of the Ni layer, and a high Sn concentration portion having a higher Sn concentration than the high S concentration portion on the dielectric layer side of the high S concentration portion.

[0011] In the ceramic electronic component, the internal electrode layer may include a Ni layer containing Ni as a main component at the center in the thickness direction, and the internal electrode layer may include a high Sn concentration portion having a higher Sn concentration than the Ni layer on the dielectric layer side of the Ni layer, and a high S concentration portion having a higher S concentration than the high Sn concentration portion on the dielectric layer side of the high Sn concentration portion.

[0012] In the ceramic electronic component, the internal electrode layers may have a thickness of 0.4 μm or less.

[0013] A method for manufacturing a ceramic electronic component according to the present invention is characterized by comprising the steps of: forming a multilayer unit by forming an internal electrode pattern using a conductor paste containing Sn, S, and Ni on a dielectric green sheet containing a ceramic material powder and an organic binder; stacking the multilayer units to form a laminate; and firing the laminate.

[0014] In the above method for producing a ceramic electronic component, the internal electrode pattern may have higher Sn and S concentrations in the vicinity of the interface with the dielectric green sheet than in the center in the thickness direction.

[0015] In the internal electrode pattern of the above-described method for manufacturing a ceramic electronic component, a high concentration portion having a higher S concentration and Sn concentration than a Ni pattern containing Ni as a main component may be formed at the center in the thickness direction on the dielectric green sheet side of the Ni pattern.

[0016] In the internal electrode pattern of the above-mentioned method for manufacturing a ceramic electronic component, a high S concentration portion having a higher S concentration than a Ni pattern containing Ni as a main component may be formed at the center in the thickness direction on the dielectric green sheet side of the Ni pattern, and a high Sn concentration portion having a higher Sn concentration than the high S concentration portion may be formed on the dielectric green sheet side of the high S concentration portion.

[0017] In the internal electrode pattern of the above-mentioned method for manufacturing a ceramic electronic component, a high Sn concentration portion having a higher Sn concentration than a Ni pattern containing Ni as a main component may be formed at the center in the thickness direction on the dielectric green sheet side of the Ni pattern, and a high S concentration portion having a higher S concentration than the high Sn concentration portion may be formed on the dielectric green sheet side of the high Sn concentration portion.

[0018] In the method for producing a ceramic electronic component, the amount of oxygen (O) in the Ni powder may be 2 mass % or more relative to Ni, the S / Sn weight ratio may be 0.042≦S / Sn weight ratio≦5.5, and the O / Sn weight ratio may be 0.39≦O / Sn weight ratio≦40. [Effects of the Invention]

[0019] According to the present invention, it is possible to provide a ceramic electronic component that can maintain the continuity ratio of internal electrode layers while suppressing the occurrence of cracks, and a method for manufacturing the same. [Brief explanation of the drawings]

[0020] [Figure 1] FIG. 2 is a partial cross-sectional perspective view of a multilayer ceramic capacitor. [Figure 2] FIG. 2 is a cross-sectional view taken along line AA in FIG. [Figure 3] FIG. 2 is a cross-sectional view taken along line BB in FIG. [Figure 4] 10(a) to 10(c) are diagrams illustrating the positional relationship within the internal electrode layers. [Figure 5] 1A to 1C are diagrams illustrating a flow of a method for manufacturing a multilayer ceramic capacitor. [Figure 6] 1(a) and 1(b) are diagrams illustrating the lamination process. [Figure 7] 10(a) to 10(c) are diagrams illustrating the positional relationship within the internal electrode pattern. DETAILED DESCRIPTION OF THE INVENTION

[0021] Hereinafter, embodiments will be described with reference to the drawings.

[0022] (Embodiment) FIG. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to an embodiment. FIG. 2 is a cross-sectional view taken along line AA in FIG. 1. FIG. 3 is a cross-sectional view taken along line BB in FIG. 1. As illustrated in FIGS. 1 to 3, the multilayer ceramic capacitor 100 includes a laminated chip 10 having a substantially rectangular parallelepiped shape and external electrodes 20a, 20b provided on two opposing end faces of the laminated chip 10. Of the four faces of the laminated chip 10 other than the two end faces, the two faces other than the top and bottom faces in the stacking direction are referred to as side faces. The external electrodes 20a, 20b extend on the top, bottom and two side faces of the laminated chip 10 in the stacking direction. However, the external electrodes 20a, 20b are spaced apart from each other.

[0023] The multilayer chip 10 has a configuration in which dielectric layers 11 containing a ceramic material that functions as a dielectric and internal electrode layers 12 primarily composed of Ni (nickel) are alternately stacked. The edges of each internal electrode layer 12 are alternately exposed at the end face of the multilayer chip 10 on which the external electrode 20a is provided and the end face on which the external electrode 20b is provided. As a result, each internal electrode layer 12 is alternately electrically connected to the external electrode 20a and the external electrode 20b. As a result, the multilayer ceramic capacitor 100 has a configuration in which multiple dielectric layers 11 are stacked with the internal electrode layers 12 interposed therebetween. In addition, in a laminate of the dielectric layers 11 and the internal electrode layers 12, the internal electrode layer 12 is disposed as the outermost layer in the stacking direction, and the upper and lower surfaces of the laminate are covered with cover layers 13. The cover layers 13 are primarily composed of a ceramic material. For example, the material of the cover layers 13 may have the same primary ceramic component as that of the dielectric layers 11.

[0024] The size of the multilayer ceramic capacitor 100 is, for example, 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height, or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but is not limited to these sizes.

[0025] The dielectric layer 11 is mainly composed of a ceramic material having a perovskite structure represented by the general formula ABO3. 3-α For example, the ceramic material includes BaTiO3 (barium titanate), CaZrO3 (calcium zirconate), CaTiO3 (calcium titanate), SrTiO3 (strontium titanate), BaTiO3 (barium titanate) which forms a perovskite structure, 1-x-y Ca x Sr y Ti 1-z Zr z O3 (0≦x≦1, 0≦y≦1, 0≦z≦1), etc., can be used. The thickness of each dielectric layer 11 is, for example, 0.05 μm or more and 5 μm or less, or 0.1 μm or more and 3 μm or less, or 0.2 μm or more and 1 μm or less.

[0026] 2, the region where the internal electrode layer 12 connected to the external electrode 20a and the internal electrode layer 12 connected to the external electrode 20b face each other is a region where capacitance is generated in the multilayer ceramic capacitor 100. Therefore, this region where capacitance is generated is referred to as a capacitance region 14. In other words, the capacitance region 14 is a region where adjacent internal electrode layers 12 connected to different external electrodes face each other.

[0027] The region where the internal electrode layers 12 connected to the external electrode 20a face each other without an internal electrode layer 12 connected to the external electrode 20b interposed therebetween is called the end margin 15. The region where the internal electrode layers 12 connected to the external electrode 20b face each other without an internal electrode layer 12 connected to the external electrode 20a interposed therebetween is also the end margin 15. In other words, the end margin 15 is the region where the internal electrode layers 12 connected to the same external electrode face each other without an internal electrode layer 12 connected to a different external electrode interposed therebetween. The end margin 15 is a region where no capacitance is generated.

[0028] 3, in the laminated chip 10, the regions extending from the two side surfaces of the laminated chip 10 to the internal electrode layers 12 are referred to as side margins 16. In other words, the side margins 16 are regions provided so as to cover the ends of the multiple internal electrode layers 12 stacked in the above-mentioned laminated structure, which extend to the two side surfaces. The side margins 16 are also regions that do not generate electrical capacitance.

[0029] The dielectric layer 11 is formed by firing a dielectric material containing ceramic powder, an organic binder, and the like. The internal electrode layer 12 is formed by firing a powder material containing Ni powder, a paste material containing a co-material, and the like. To thin the internal electrode layer 12, it is necessary to minimize the physical size of the Ni powder particles used to form the internal electrode layer 12. However, reducing the diameter of the Ni powder increases its surface area. As the surface area increases, the absolute amount of the surface oxide film on the Ni powder increases. When the amount of oxygen (O) relative to Ni in the Ni powder increases, the oxygen promotes oxidation of the binder in the dielectric material, accelerating binder removal. This can frequently cause binder removal cracks, which can be problematic. Binder removal cracks are cracks caused by shrinkage due to accelerated binder removal.

[0030] Therefore, it is known that sulfur (S) is added to the paste material to suppress the reduction of Ni powder. However, if the amount of S added to Ni is too large, rapid shrinkage occurs when the S is released, resulting in cracks. In addition, the combustion reaction of S increases the degree of reduction in the atmosphere, accelerating the grain growth of the co-material and ceramic material powder, which may also deteriorate the continuity of the internal electrode layer 12.

[0031] Therefore, the multilayer ceramic capacitor 100 according to this embodiment has a configuration that can maintain the continuity of the internal electrode layers 12 while suppressing the occurrence of cracks.

[0032] In the multilayer ceramic capacitor 100 according to this embodiment, the internal electrode layers 12 contain Ni, S, and tin (Sn). As described above, the inclusion of S in the internal electrode layers 12 suppresses the oxidation of the binder during firing, thereby suppressing binder removal cracks. Furthermore, the inclusion of Sn in the internal electrode layers 12 forms stable sulfides containing Sn in relation to Ni sulfides, thereby suppressing the combustion reaction of S and the rapid contraction caused by the rapid elimination of S, thereby suppressing cracks. Furthermore, the suppression of the rapid elimination of S suppresses an increase in the reduction degree of the atmosphere, thereby suppressing grain growth of the ceramic material powder and the co-material. As a result, the continuity ratio of the internal electrode layers 12 can be maintained at a high value. From the above, the continuity ratio of the internal electrode layers 12 can be maintained while suppressing the occurrence of cracks.

[0033] The manner in which the internal electrode layer 12 contains S is not particularly limited, but for example, the internal electrode layer 12 may contain S in the form of NiS (nickel sulfide), NiSO4 (nickel sulfate), etc. The manner in which the internal electrode layer 12 contains Sn is not particularly limited, but for example, the internal electrode layer 12 may contain Sn in the form of Ni-Sn alloy, BaSnO3 (barium stannate), etc.

[0034] During the firing process, S tends to be released, resulting in segregation of S near the interface with the dielectric layer 11. Therefore, it is preferable that Sn also segregates near the interface with the dielectric layer 11. For example, as illustrated in FIG. 4(a), the internal electrode layer 12 includes a Ni layer 61 containing Ni as a main component at the center in the thickness direction. The internal electrode layer 12 further includes a high-concentration portion 62 having higher S and Sn concentrations than the Ni layer 61, located closer to the adjacent dielectric layer 11 than the Ni layer 61. Since the Sn concentration is high in the high-concentration portion 62, release of S segregating on the surface of the internal electrode layer 12 can be effectively suppressed. This further suppresses sudden release of S. The high-concentration portion 62 may contain, for example, NiS (nickel sulfide), NiSO4 (nickel sulfate), or the like, or may contain a Ni-Sn alloy, BaSnO3 (barium stannate), or the like.

[0035] 4(b), the internal electrode layer 12 includes a Ni layer 61 at the center in the thickness direction. The internal electrode layer 12 further includes a high S concentration portion 63, which has a higher S concentration than the Ni layer 61, on the side closer to the adjacent dielectric layer 11 than the Ni layer 61. The internal electrode layer 12 further includes a high Sn concentration portion 64, which has a higher Sn concentration than the high S concentration portion 63, on the side closer to the adjacent dielectric layer 11 than the high S concentration portion 63. Since the high Sn concentration portion 64 is located closer to the dielectric layer 11 than the high S concentration portion 63, it is possible to more effectively suppress desorption of S. The high S concentration portion 63 may contain, for example, NiS (nickel sulfide), NiSO4 (nickel sulfate), etc., and the high Sn concentration portion 64 may contain a Ni-Sn alloy, BaSnO3 (barium stannate), etc.

[0036] 4(c), a high Sn concentration portion 64 may be provided closer to the adjacent dielectric layer 11 than the Ni layer 61, and a high S concentration portion 63 may be provided closer to the adjacent dielectric layer 11 than the high Sn concentration portion 64. In this case as well, Sn in the high Sn concentration portion 64 can suppress desorption of S from the high S concentration portion 63.

[0037] The locations of the Ni layer 61, the high concentration portion 62, the high S concentration portion 63, and the high Sn concentration portion 64 can be measured by nano-SIMS. For example, the Ni layer 61 is formed to a thickness of 30% or more of the thickness of the internal electrode layer 12.

[0038] Next, a description will be given of a method for manufacturing the multilayer ceramic capacitor 100. FIG.

[0039] (raw powder production process) First, a dielectric material for forming the dielectric layer 11 is prepared. The A-site elements and B-site elements contained in the dielectric layer 11 are typically contained in the dielectric layer 11 in the form of a sintered compact of ABO3 particles. For example, BaTiO3 is a tetragonal compound with a perovskite structure and exhibits a high dielectric constant. This BaTiO3 can generally be obtained by synthesizing barium titanate by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Various methods have been known for synthesizing the ceramic that is the main component of the dielectric layer 11, including the solid-phase method, the sol-gel method, and the hydrothermal method. Any of these methods can be used in this embodiment.

[0040] The resulting ceramic material powder is then doped with a predetermined additive compound depending on the purpose, such as oxides of magnesium (Mg), manganese (Mn), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glasses containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0041] For example, a ceramic material powder is wet-mixed with a compound containing an additive compound, followed by drying and pulverization to prepare a ceramic material powder. For example, the ceramic material powder obtained as described above may be pulverized as necessary to adjust the particle size, or may be combined with a classification process to adjust the particle size. A dielectric material is obtained through the above steps.

[0042] (Lamination process) Next, an organic binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the obtained dielectric material and wet mixed. Using the obtained slurry, a dielectric green sheet 52 is coated on a substrate 51 by, for example, a die coater method or a doctor blade method, and then dried. The substrate 51 is, for example, a PET (polyethylene terephthalate) film.

[0043] Next, as illustrated in FIG. 6(a), a paste material for forming the internal electrode layers 12 is printed on the dielectric green sheet 52 to form the internal electrode patterns 53. In FIG. 6(a), as an example, four layers of internal electrode patterns 53 are formed on the dielectric green sheet 52 at predetermined intervals. The dielectric green sheet 52 on which the internal electrode patterns 53 are formed is defined as a lamination unit. The paste material may contain ceramic particles as a co-material. The main component of the ceramic particles is not particularly limited, but is preferably the same as the main component ceramic of the dielectric layer 11. For example, BaTiO3 with an average particle diameter of 50 nm or less may be uniformly dispersed.

[0044] Next, while peeling the dielectric green sheet 52 from the substrate 51, the lamination units are stacked as shown in FIG. 6(b). Next, a predetermined number of cover sheets (e.g., 2 to 10 layers) are stacked on top and bottom of the laminate obtained by stacking the lamination units, and are thermocompression bonded, and then cut to predetermined chip dimensions (e.g., 1.0 mm x 0.5 mm). In the example of FIG. 6(b), cutting is performed along the dotted lines. The cover sheet may have the same components as the dielectric green sheet 52, or may contain a different additive compound.

[0045] (Firing process) The ceramic laminate thus obtained was subjected to binder removal treatment in an N2 atmosphere, and then a metal paste that would become the base layer of the external electrodes 20a, 20b was applied by dipping. -5 ~10 -8 The mixture is then fired in a reducing atmosphere at 1100 to 1300° C. for 10 minutes to 2 hours at 1 atm. In this way, the multilayer ceramic capacitor 100 is obtained.

[0046] (Reoxidation treatment process) Thereafter, a re-oxidation treatment may be performed at 600°C to 1000°C in an N2 gas atmosphere.

[0047] (Plating process) Thereafter, the external electrodes 20a, 20b may be coated with a metal such as Cu, Ni, Sn, etc. Through the above steps, the multilayer ceramic capacitor 100 can be manufactured.

[0048] (Composition of paste material) In this embodiment, the internal electrode layers 12 are thinned to increase the number of layers of the internal electrode layers 12. For example, the thickness of each internal electrode layer 12 is 1 μm or less, 0.4 μm or less, or 0.2 μm or less. To thin the internal electrode layers 12, Ni powder with a small diameter is used as the Ni powder contained in the paste material for forming the internal electrode layers 12. For example, the average particle diameter of the Ni powder is 0.01 μm to 0.2 μm, 0.03 μm to 0.15 μm, or 0.05 μm to 0.11 μm.

[0049] When attempting to reduce the diameter of Ni powder, the surface area of ​​the Ni powder increases. Accordingly, the absolute amount of the surface oxide film of the Ni powder increases. Therefore, for example, it is preferable to use Ni powder with an oxygen content of 2 mass% or more, and more preferably 2.5 mass% or more. This allows the use of Ni powder with a sufficiently small particle size, and the continuity ratio of the internal electrode layer 12 after firing can be maintained at a high value.

[0050] The paste material contains an S source to suppress binder oxidation caused by oxygen contained in the Ni powder, thereby suppressing reduction of the Ni powder, suppressing binder oxidation, and preventing cracks from occurring.

[0051] The Ni powder also contains a Sn source. A separate Sn source may be added to the Ni fine particles, or a Ni-Sn alloy powder may be used as the Ni powder. The addition of Sn inhibits the formation of stable Sn-containing sulfides from Ni sulfides, thereby suppressing the combustion reaction of S and the rapid contraction caused by the sudden elimination of S. Furthermore, an increase in the degree of reduction of the atmosphere is inhibited, suppressing the grain growth of the ceramic material powder and the co-material. This allows the continuity ratio of the internal electrode layer 12 to be maintained at a high value.

[0052] The paste material may contain Sn, S, and Ni.

[0053] If the amount of Sn relative to the amount of S in the paste material is too low, the combustion reaction of S may not be sufficiently suppressed. Therefore, it is preferable to set an upper limit to the S / Sn weight ratio. Specifically, the S / Sn weight ratio is preferably ≦5.5, and more preferably 5 or less.

[0054] If the amount of Sn relative to the amount of O in the paste material is too low, the progress of binder removal due to surface oxygen becomes significant, and there is a risk of binder removal cracks occurring. Therefore, it is preferable to set an upper limit on the O / Sn weight ratio. Specifically, it is preferable to set the O / Sn weight ratio to ≦40, and more preferably to set the O / Sn weight ratio to ≦30.

[0055] If the amount of Sn in the paste material is too large, a liquid phase may appear in the internal electrode layer 12 during the firing process, causing the internal electrode layer 12 to become spheroidized, which may result in a deterioration in the continuity rate of the internal electrode layer 12. Therefore, it is preferable to set a lower limit for the S / Sn weight ratio. Specifically, it is preferable to set the S / Sn weight ratio to 0.042≦S / Sn weight ratio, and more preferably to set the S / Sn weight ratio to 0.08≦S / Sn weight ratio. Furthermore, it is preferable to set a lower limit for the O / Sn weight ratio. Specifically, it is preferable to set the O / Sn weight ratio to 0.39≦O / Sn weight ratio, and more preferably to set the O / Sn weight ratio to 0.6≦O / Sn weight ratio.

[0056] The paste material is obtained by adding additives to a powder material containing Ni powder. At the powder material stage, the following conditions may be satisfied: the amount of oxygen (O) in the Ni powder relative to Ni is 2 mass% or more, the S / Sn weight ratio is 0.042≦S / Sn≦5.5, and the O / Sn weight ratio is 0.39≦S / Sn≦40. In this case, the paste material obtained after adding additives to the powder material also needs to satisfy these conditions. If the above conditions are not satisfied at the powder material stage, the above conditions can be satisfied by adjusting the components of the additives added to the powder material.

[0057] If the amount of oxygen in the Ni powder is too high, the progress of binder removal due to surface oxygen becomes significant, and there is a risk of binder removal cracks occurring. Therefore, it is preferable to set an upper limit on the amount of oxygen in the Ni powder. For example, the amount of oxygen in the Ni powder is preferably 5.5 mass% or less, more preferably 4 mass% or less, and even more preferably 3 mass% or less.

[0058] If the amount of S relative to Ni is low, there is a risk that binder oxidation may not be sufficiently suppressed. Therefore, it is preferable to set a lower limit for the amount of S relative to Ni. For example, the amount of S relative to Ni is preferably 0.2 mass% or more, and more preferably 0.3 mass% or more. The amount of S relative to Ni refers to the weight ratio of S when Ni + S is 100 mass%.

[0059] If the amount of S relative to Ni is too high, there is a risk of a large amount of S being desorbed. Therefore, it is preferable to set an upper limit on the amount of S relative to Ni. For example, the amount of S relative to Ni is preferably 0.6 mass% or less, more preferably 0.5 mass% or less, and even more preferably 0.4 mass% or less.

[0060] From the viewpoint of suppressing the combustion reaction of S, the amount of Sn relative to Ni is preferably 0.065 mass% or more, and more preferably 0.1 mass% or more. From the viewpoint of suppressing the appearance of a liquid phase in the internal electrode layer 12 during the firing process, the amount of Sn relative to Ni is preferably 11 mass% or less, and more preferably 6 mass% or less. The amount of Sn relative to Ni refers to the weight ratio of Sn when Ni + Sn is 100 mass%.

[0061] When forming the internal electrode pattern 53 in the lamination process of FIG. 6(a), as illustrated in FIG. 7(a), high-concentration portions 532 having higher S and Sn concentrations than the Ni pattern 531 are formed on the upper and lower surfaces of the Ni pattern 531, which has low S and Sn concentrations. This results in a structure as shown in FIG. 4(a) after firing. As illustrated in FIG. 7(b), high-concentration portions 533 having higher S concentrations than the Ni pattern 531 are formed on the upper and lower surfaces of the Ni pattern 531, and high-concentration portions 534 having higher Sn concentrations than the high-concentration portions 533 are formed on the opposite side of the Ni pattern 531 from the high-concentration portions 533. This results in a structure as shown in FIG. 4(b) after firing. As illustrated in FIG. 7(c), high-concentration portions 534 are formed on the upper and lower surfaces of the Ni pattern 531, and high-concentration portions 533 are formed on the opposite side of the Ni pattern 531 from the high-concentration portions 534. This results in a structure as shown in FIG. 4(c) after firing.

[0062] When the internal electrode pattern 53 is formed using a paste material containing Sn, S, and Ni, Sn and S segregate at the interface between the internal electrode layer 12 and the dielectric layer 11, resulting in the configurations shown in Figures 4(a) to 4(c). In this case, the positional relationship between the high Sn concentration portion 534 and the high S concentration portion 533 can be adjusted by the weight ratio of Sn and S.

[0063] In the above embodiments, a multilayer ceramic capacitor has been described as an example of a ceramic electronic component, but the present invention is not limited to this. For example, other electronic components such as a varistor or a thermistor may also be used. [Example]

[0064] The multilayer ceramic capacitor according to the embodiment was fabricated and its characteristics were examined.

[0065] (Examples 1 and 2 and Comparative Example) Additives were added to barium titanate powder, and the mixture was thoroughly wet mixed and pulverized in a ball mill to obtain a dielectric material. A butyral-based organic binder and toluene and ethyl alcohol were added to the dielectric material, and a dielectric green sheet was applied to a PET substrate using the doctor blade method. Next, an internal electrode pattern was formed by printing a conductive metal paste on the dielectric green sheet.

[0066] In Example 1, the internal electrode pattern shown in FIG. 7(b) was formed, and the internal electrode layer shown in FIG. 4(b) was fired. In Example 2, the internal electrode pattern shown in FIG. 7(c) was formed, and the internal electrode layer shown in FIG. 4(c) was fired. In the comparative example, only S or Sn was added to the paste material for forming the internal electrode layer. Regarding the Ni powder contained in the internal electrode pattern, the amount of surface oxide film was adjusted by the synthesis conditions. Furthermore, the amount of S, the amount of Sn, the location of S, and the location of Sn were adjusted by the amount and order of addition of the S-containing dispersant and the Sn-containing organometallic complex solution in the paste preparation stage.

[0067] For comparative example pre-fired composition condition No. 1, the surface oxygen content relative to Ni was 2.30 mass%, the S content relative to Ni was 0.00 mass%, the Sn content relative to Ni was 0.10 mass%, the S / Sn weight ratio was 0.000, and the O / Sn weight ratio was 23.000.For comparative example pre-fired composition condition No. 2, the surface oxygen content relative to Ni was 2.30 mass%, the S content relative to Ni was 0.41 mass%, and the Sn content relative to Ni was 0.00 mass%.

[0068] For pre-sintering composition condition No. 3 in Examples 1 and 2, the surface oxygen content relative to Ni was 2.50 mass%, the S content relative to Ni was 0.13 mass%, the Sn content relative to Ni was 0.10 mass%, the S / Sn weight ratio was 1.286, and the O / Sn weight ratio was 24.734. For pre-sintering composition condition No. 4 in Examples 1 and 2, the surface oxygen content relative to Ni was 3.00 mass%, the S content relative to Ni was 0.01 mass%, the Sn content relative to Ni was 0.10 mass%, the S / Sn weight ratio was 0.099, and the O / Sn weight ratio was 29.681. For pre-sintering composition condition No. 5 in Examples 1 and 2, the surface oxygen content relative to Ni was 2.30 mass%, the S content relative to Ni was 0.41 mass%, the Sn content relative to Ni was 0.10 mass%, the S / Sn weight ratio was 4.056, and the O / Sn weight ratio was 22.755.For pre-sintering composition condition No. 6 in Examples 1 and 2, the surface oxygen content relative to Ni was 2.56 mass%, the S content relative to Ni was 0.34 mass%, the Sn content relative to Ni was 0.10 mass%, the S / Sn weight ratio was 3.364, and the O / Sn weight ratio was 25.328. For pre-sintering composition condition No. 7 in Examples 1 and 2, the surface oxygen content relative to Ni was 3.98 mass%, the S content relative to Ni was 0.25 mass%, the Sn content relative to Ni was 0.10 mass%, the S / Sn weight ratio was 2.473, and the O / Sn weight ratio was 39.376.For pre-sintering composition condition No. 8 in Examples 1 and 2, the surface oxygen content relative to Ni was 2.50 mass%, the S content relative to Ni was 0.13 mass%, the Sn content relative to Ni was 5.89 mass%, the S / Sn weight ratio was 0.022, and the O / Sn weight ratio was 0.425. For pre-firing composition condition No. 9 in Examples 1 and 2, the surface oxygen content relative to Ni was 3.00 mass%, the S content relative to Ni was 0.01 mass%, the Sn content relative to Ni was 5.89 mass%, the S / Sn weight ratio was 0.002, and the O / Sn weight ratio was 0.510.For pre-sintering composition condition No. 10 in Examples 1 and 2, the surface oxygen content relative to Ni was 2.30 mass%, the S content relative to Ni was 0.41 mass%, the Sn content relative to Ni was 5.89 mass%, the S / Sn weight ratio was 0.070, and the O / Sn weight ratio was 0.391.For pre-sintering composition condition No. 11 in Examples 1 and 2, the surface oxygen content relative to Ni was 2.56 mass%, the S content relative to Ni was 0.34 mass%, the Sn content relative to Ni was 5.89 mass%, the S / Sn weight ratio was 0.058, and the O / Sn weight ratio was 0.435. For pre-sintering composition condition No. 12 in Examples 1 and 2, the surface oxygen content relative to Ni was 3.98 mass%, the S content relative to Ni was 0.25 mass%, the Sn content relative to Ni was 5.89 mass%, the S / Sn weight ratio was 0.042, and the O / Sn weight ratio was 0.676. For pre-sintering composition condition No. 13 in Examples 1 and 2, the surface oxygen content relative to Ni was 5.50 mass%, the S content relative to Ni was 0.01 mass%, the Sn content relative to Ni was 5.89 mass%, the S / Sn weight ratio was 0.001, and the O / Sn weight ratio was 0.934.

[0069] 470 layers of the dielectric green sheets with internal electrode patterns were stacked and fired in a reducing atmosphere. The shape of the laminated chip after firing was 1.0 mm x 0.5 mm x 0.5 mm. The thickness of the dielectric layer was 0.5 μm. The thickness of the internal electrode layer was 0.4 μm.

[0070] The internal electrode layers after firing were measured by nano-SIMS, and it was confirmed that in Example 1, as shown in Figure 4(b), the internal electrode layer 12 had a Ni layer 61 at the center in the thickness direction, a high S concentration portion 63 on the adjacent dielectric layer 11 side of the Ni layer 61, and a high Sn concentration portion 64 on the adjacent dielectric layer 11 side of the high S concentration portion 63. In Example 2, as shown in Figure 4(c), it was confirmed that the internal electrode layer 12 had a Ni layer 61 at the center in the thickness direction, a high Sn concentration portion 64 on the adjacent dielectric layer 11 side of the Ni layer 61, and a high Sn concentration portion 63 on the adjacent dielectric layer 11 side of the high Sn concentration portion 64.

[0071] For each of Example 1, Example 2, and Comparative Example, 200 samples were produced for each pre-sintering composition condition. For each of the 200 samples, samples with a crack occurrence frequency of more than 5% were judged as unacceptable (×), samples with a crack occurrence frequency of 1% to 5% were judged as acceptable (△), and samples with a crack occurrence frequency of less than 1% were judged as good (◯). Furthermore, samples with an average continuity rate of the internal electrode layer calculated from SEM observation (magnification 2000x, average of four fields) of the cross-sectional polished surface near the center of the chip of less than 65% were judged as unacceptable (×), samples with a continuity rate of 65% to 75% were judged as acceptable (△), and samples with a continuity rate of more than 75% were judged as good (◯). The results are shown in Table 1. [Table 1]

[0072] In the comparative examples, the cracks were judged as unacceptable (×) for pre-fired composition condition No. 1. This is thought to be because debinding cracks occurred due to the absence of S addition. The cracks were also judged as unacceptable (×) for pre-fired composition condition No. 2. This is thought to be because the absence of Sn did not suppress the desorption of S.

[0073] In Example 1 and Example 2, there was no poor judgment (×) for cracks and continuity rate regardless of the pre-firing composition conditions. This is thought to be because both S and Sn were added to the internal electrode layer containing Ni. The reason why there were more good judgments (◯) in Example 1 than in Example 2 is thought to be because the high Sn concentration part was located outside the high S concentration part, which allowed for more effective suppression of S detachment.

[0074] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present invention as defined in the claims. [Explanation of symbols]

[0075] 10 stacked chips 11 Dielectric layer 12 Internal electrode layer 13 Cover Layer 14 Capacity area 15 End Margin 16 Side Margin 20a,20b external electrode 51 Base material 52 Dielectric green sheet 53 Internal electrode pattern 61 Ni layer 62 High concentration area 63 High S concentration area 64 High Sn concentration area 531 Ni pattern 532 High concentration area 533 High S concentration area 534 High Sn concentration area 100 Multilayer ceramic capacitors

Claims

1. The multilayer chip includes a plurality of dielectric layers mainly made of ceramic and a plurality of internal electrode layers stacked together, the internal electrode layers contain Ni, S, and Sn, The internal electrode layer includes a Ni layer containing Ni as a main component at a center portion in a thickness direction, A ceramic electronic component characterized in that the internal electrode layer has a high Sn concentration portion on the dielectric layer side of the Ni layer that has a higher Sn concentration than the Ni layer, and a high S concentration portion on the dielectric layer side of the high Sn concentration portion that has a higher S concentration than the Ni layer, and the Sn concentration of the high Sn concentration portion is higher than that of the high S concentration portion.

2. 2. The ceramic electronic component according to claim 1, wherein the internal electrode layers have higher Sn and S concentrations in the vicinity of the interface with the dielectric layer than in the center portion in the thickness direction.

3. 3. The ceramic electronic component according to claim 1, wherein the internal electrode layers have a thickness of 0.4 μm or less.

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