Multilayer ceramic capacitor

Abstract

To provide a multilayer ceramic capacitor capable of suppressing decrease in high temperature reliability.SOLUTION: In a multilayer ceramic capacitor 1, a laminate 2 includes an effective layer width direction end part 201, an effective layer central part 202 and a rare earth segregation area 81 including a segregated rare earth element. A rare earth element segregation amount in a rare earth segregation area 81 existing in the effective layer central part 202 to that in the rare earth segregation area 81 existing in the effective layer width direction end part 201 has the relation of the effective layer central>the effective layer width direction end part.SELECTED DRAWING: Figure 7A

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic capacitor. [Background technology]

[0002] For example, the multilayer ceramic capacitor described in Patent Document 1 includes a capacitor body made of a sintered ceramic body made of a dielectric material such as barium titanate. The capacitor body includes internal electrode layers made of a noble metal material such as silver or a silver-palladium alloy, or a base metal material such as nickel, with ceramic layers serving as dielectric layers interposed between them. The internal electrode layers are alternately routed to one end face and the other end face of the capacitor body. The alternately routed internal electrode layers are electrically connected to external electrodes at different potentials.

[0003] The internal electrode layers of the multilayer capacitor described in Patent Document 1 are made of a metal material, and the external electrodes are made of a glass component and multiple metal components, including the same metal or metals that can be alloyed with the internal electrode layers. The external electrodes are bonded to the wiring board via a conductive resin adhesive. The area occupancy rate of the metal components relative to the cross-sectional area of ​​the external electrodes is in the range of 60% to 95%. This makes it possible for the multilayer capacitor described in Patent Document 1 to be mounted on the wiring board inexpensively and with high reliability without using solder. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2001-237137 Summary of the Invention [Problem to be solved by the invention]

[0005] However, the above-described general multilayer ceramic capacitors have a problem in that their high-temperature reliability may decrease, particularly from the widthwise ends of the internal electrode layers.

[0006] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a multilayer ceramic capacitor in which the deterioration of high-temperature reliability is suppressed. [Means for solving the problem]

[0007] The multilayer ceramic capacitor of the present invention comprises a laminate including a plurality of laminated dielectric layers and a plurality of laminated internal electrode layers, a first main surface and a second main surface opposing each other in a height direction, a first side surface and a second side surface opposing each other in a width direction perpendicular to the height direction, and a first end surface and a second end surface opposing each other in a length direction perpendicular to the height direction and the width direction, the laminate including an effective layer portion formed by alternately laminating the dielectric layers and the internal electrode layers, and external layer portions arranged to sandwich the effective layer portion from the first main surface side and the second main surface side, a first external electrode arranged on the first end surface, and a second external electrode arranged on the second end surface. In the present invention, the laminate has effective layer width direction end portions that are located at the width direction end portions of the effective layer portion and an effective layer central portion that is located in the central portion of the effective layer portion, the laminate further has rare earth segregation regions in which rare earth elements are segregated, and in a cross section parallel to the width direction and height direction, the segregation amount of the rare earth element in the rare earth segregation region that is located in the effective layer width direction end portions is in the relationship of effective layer central portion > effective layer width direction end portions, and the dielectric material of the dielectric layer contains at least one of calcium, zirconium, and strontium and contains a material having a perovskite structure. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a multilayer ceramic capacitor in which the deterioration of high-temperature reliability is suppressed. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is an external perspective view of a multilayer ceramic capacitor according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a cross-sectional view taken along line 101-101 in FIG. [Figure 3] FIG. 3 is a cross-sectional view taken along line 102-102 of FIG. [Figure 4] FIG. 4 is a cross-sectional view taken along line 103-103 in FIG. [Figure 5] FIG. 5 is a cross-sectional view taken along line 104-104 in FIG. [Figure 6A] FIG. 6A is a cross-sectional view taken along line 106-106 in FIG. [Figure 6B] FIG. 6B is a cross-sectional view taken along line 105-105 in FIG. [Figure 7A] FIG. 7A is an electron microscope image of the edge evaluation area. [Figure 7B] Figure 7B is an electron microscope image of the central evaluation area. [Figure 8A] FIG. 8A is an FE-WDX image of the edge evaluation region, showing the segregation of rare earth elements. [Figure 8B] FIG. 8B is an FE-WDX image of the central evaluation region, showing the segregation of rare earth elements. [Figure 9A] FIG. 9A is an FE-WDX image of the edge evaluation region, showing aluminum segregation. [Figure 9B] FIG. 9B is an FE-WDX image of the central evaluation region, showing aluminum segregation. [Figure 10] FIG. 10 is a table showing the evaluation results of the examples and comparative examples. DETAILED DESCRIPTION OF THE INVENTION

[0010] (multilayer ceramic capacitors) A multilayer ceramic capacitor 1 according to an embodiment of the present disclosure will be described with reference to the drawings. FIG. 1 is an external perspective view of the multilayer ceramic capacitor 1 according to an embodiment of the present disclosure. FIG. 2 is a cross-sectional view taken along line 101-101 of FIG. 1. FIG. 3 is a cross-sectional view taken along line 102-102 of FIG. 2. FIG. 4 is a cross-sectional view taken along line 103-103 of FIG. 2. FIG. 5 is a cross-sectional view taken along line 104-104 of FIG. 2.

[0011] 1, the multilayer ceramic capacitor 1 has a substantially rectangular parallelepiped shape. The multilayer ceramic capacitor 1 includes a laminate 2 having a substantially rectangular parallelepiped shape and a pair of external electrodes 40 disposed at both ends of the laminate 2 and spaced apart from each other.

[0012] In Fig. 1, arrow T indicates the height direction of the multilayer ceramic capacitor 1 and the laminate 2. This height direction T is also the thickness direction and lamination direction of the multilayer ceramic capacitor 1 and the laminate 2. In Fig. 1, arrow L indicates the length direction of the multilayer ceramic capacitor 1 and the laminate 2, which is perpendicular to the height direction T. In Fig. 1, arrow W indicates the width direction of the multilayer ceramic capacitor 1 and the laminate 2, which is perpendicular to the height direction T and the length direction L. A pair of external electrodes 40 is disposed at one end and the other end of the length direction L of the laminate 2, respectively.

[0013] The cross section shown in Figure 2 is called the LT cross section, the cross section shown in Figure 3 is called the WT cross section, and the cross sections shown in Figure 4 and Figure 5 are called the LW cross sections.

[0014] (Laminate) The two surfaces of the laminate 2 that face each other in the height direction T are called the first main surface 3 and the second main surface 4. The two surfaces that face each other in the length direction L, which is perpendicular to the height direction T of the laminate, are called the first end surface 7 and the second end surface 8. The two surfaces of the laminate 2 that face each other in the width direction W, which is perpendicular to the height direction T and the length direction L, are called the first side surface 5 and the second side surface 6.

[0015] As shown in FIG. 1, the laminate 2 has a substantially rectangular parallelepiped shape. The length of the laminate 2 in the longitudinal direction L does not have to be longer than the length of the laminate 2 in the width direction W. The corners and ridges of the laminate 2 are preferably rounded. A corner is a portion where three surfaces of the laminate intersect. A ridge is a portion where two surfaces of the laminate intersect. The shape of part or all of the surfaces constituting the laminate 2 may have irregularities formed thereon.

[0016] The size of the laminate 2 is not limited. The preferred length of the laminate 2 in the longitudinal direction L is 0.2 mm or more and 6 mm or less. The preferred length of the laminate 2 in the height direction T is 0.05 mm or more and 5 mm or less. The preferred length of the laminate 2 in the width direction W is 0.1 mm or more and 5 mm or less.

[0017] (Division in the height direction) 2 and 3 , the laminate 2 is divided into an inner layer portion 10 and a main surface side outer layer portion 11 in the height direction T. The main surface side outer layer portion 11 includes a first main surface side outer layer portion 12 and a second main surface side outer layer portion 13. The first main surface side outer layer portion 12 and the second main surface side outer layer portion 13 are located on either side of the inner layer portion 10 in the height direction T. In other words, the laminate 2 is divided into the first main surface side outer layer portion 12, the inner layer portion 10, and the second main surface side outer layer portion 13.

[0018] (dielectric layer) The inner layer portion 10 includes a plurality of dielectric layers 20 and a plurality of internal electrode layers 30 alternately stacked in the height direction T. The inner layer portion 10 includes, in the height direction T, the internal electrode layer 30 located closest to the first main surface 3 to the internal electrode layer 30 located closest to the second main surface 4. In the inner layer portion 10, the multiple internal electrode layers 30 are arranged facing each other with the dielectric layer 20 interposed therebetween. The inner layer portion 10 is a portion that generates electrostatic capacitance and essentially functions as a capacitor. The dielectric layer 20 included in the inner layer portion 10 is called an inner dielectric layer 21. The dielectric layer 20 included in the first main surface side outer layer portion 12 and the dielectric layer 20 included in the second main surface side outer layer portion 13 are called outer dielectric layers 22.

[0019] The multiple dielectric layers 20 are made of a dielectric material. The dielectric material contains at least one of calcium, zirconium, and strontium and a material having a perovskite structure. More specifically, the dielectric material is a temperature compensation dielectric material with a small rate of capacitance change due to temperature, and contains at least one of calcium, zirconium, and strontium as a main component of the dielectric material. For example, in the dielectric material, at least one of calcium and strontium constitutes the A site of the perovskite structure (ABO3), and at least one of zirconium, titanium, and hafnium constitutes the B site of the perovskite structure.

[0020] Specific examples of the main component of the dielectric material include dielectric ceramics containing calcium titanate, strontium titanate, titanium oxide, calcium zirconate, etc. The multilayer ceramic capacitor 1 of this embodiment is a temperature compensation multilayer ceramic capacitor.

[0021] The dielectric material is a material in which additives are added to these main components. Examples of additives include, in addition to the above-mentioned hafnium, silicon, and calcium, oxides of rare earth elements such as manganese, magnesium, dysprosium, and chromium, or oxides of rare earth elements such as vanadium, samarium, europium, gadolinium, terbium, holmium, erbium, thulium, ytterbium, and yttrium, or oxides of cobalt, nickel, lithium, boron, sodium, potassium, and silicon, or glass. Among these, preferred rare earth elements are dysprosium and yttrium.

[0022] The preferred thickness of the dielectric layer 20 is 0.2 μm or more and 10 μm or less. The preferred number of laminated dielectric layers 20 is 15 or more and 1200 or less. The number of dielectric layers 20 is the sum of the number of inner dielectric layers 21 and the number of outer dielectric layers 22.

[0023] (Internal electrode layer) The multiple internal electrode layers 30 include multiple first internal electrode layers 31 and multiple second internal electrode layers 32. The first internal electrode layers 31 and the second internal electrode layers 32 are alternately arranged in the height direction T with the dielectric layer 20 sandwiched between them. The first internal electrode layers 31 are extended to the first end face 7. The second internal electrode layers 32 are extended to the second end face 8.

[0024] As shown in Fig. 4, the first internal electrode layer 31 is divided into a first opposing portion 33 and a first lead portion 35. The first opposing portion 33 is a portion that faces the second internal electrode layer 32 with the dielectric layer 20 sandwiched therebetween. The first lead portion 35 is a portion that is led from the first opposing portion 33 to the first end face 7. The first lead portion 35 is exposed at the first end face 7.

[0025] As shown in Fig. 5, the second internal electrode layer 32 is divided into a second opposing portion 34 and a second lead portion 36. The second opposing portion 34 is a portion that faces the first internal electrode layer 31 with the dielectric layer 20 sandwiched therebetween. The second lead portion 36 is a portion that is led from the second opposing portion 34 to the second end face 8. The second lead portion 36 is exposed at the second end face 8.

[0026] In the multilayer ceramic capacitor 1, capacitance is formed by the first opposing portion 33 and the second opposing portion 34 facing each other via the dielectric layer 20. This allows the multilayer ceramic capacitor 1 to exhibit capacitor characteristics.

[0027] The shapes of the first opposing portion 33 and the second opposing portion 34 are not limited. A preferred shape for the first opposing portion 33 and the second opposing portion 34 is a rectangular shape. Similarly, the shapes of the first drawer portion 35 and the second drawer portion 36 are not limited. A preferred shape for the first drawer portion 35 and the second drawer portion 36 is a rectangular shape. In the above-mentioned rectangular shape, the corners of the rectangular shape may be rounded. The corners of the rectangular shape may be formed at an angle.

[0028] The length in the width direction W of the first facing portion 33 and the length in the width direction W of the first lead portion 35 may be the same. Either the length in the width direction W of the first facing portion 33 or the length in the width direction W of the first lead portion 35 may be shorter. The length in the width direction W of the second facing portion 34 and the length in the width direction W of the second lead portion 36 may be the same. Either the length in the width direction W of the second facing portion 34 or the length in the width direction W of the second lead portion 36 may be shorter.

[0029] Examples of materials for the first internal electrode layers 31 and the second internal electrode layers 32 are conductive materials such as metals such as nickel, copper, silver, palladium, and gold, and alloys containing at least one of these metals. When an alloy is used, an example of the material for the first internal electrode layers 31 and the second internal electrode layers 32 is an alloy of silver and palladium.

[0030] A preferred example of the thickness of each of the first internal electrode layers 31 and the second internal electrode layers 32 is 0.2 μm or more and 2.0 μm or less. A preferred total number of layers of the first internal electrode layers 31 and the second internal electrode layers 32 is 15 or more and 1000 or less.

[0031] (Outer layer on main surface side) As shown in FIGS. 2 and 3 , a portion consisting of a set of multiple dielectric layers 20 located between the first main surface 3 and the internal electrode layer 30 closest to the first main surface 3 is called the first main surface side outer layer portion 12. The first main surface side outer layer portion 12 is located on the first main surface 3 side of the laminate 2. A portion consisting of a set of multiple dielectric layers 20 located between the second main surface 4 and the internal electrode layer 30 closest to the second main surface 4 is called the second main surface side outer layer portion 13. The second main surface side outer layer portion 13 is located on the second main surface 4 side of the laminate 2. The dielectric layers 20 used in the first main surface side outer layer portion 12 and the second main surface side outer layer portion 13 may both be the same as the dielectric layers 20 used in the internal layer portion 10. The material of the internal dielectric layer 21 and the material of the external dielectric layer 22 may be the same.

[0032] (effective layer) The portion where the first opposing portion 33 of the first internal electrode layer 31 and the second opposing portion 34 of the second internal electrode layer 32 oppose each other is called the effective layer portion 14. The effective layer portion 14 is a portion formed by alternately stacking the dielectric layers 20 and the internal electrode layers 30. The effective layer portion 14 is a part of the internal layer portion 10. Figures 4 and 5 show the range of the effective layer portion 14 in the width direction W and length direction L. The effective layer portion 14 is a portion of the internal layer portion 10 excluding the side gaps and end gaps described below. The effective layer portion 14 is also called a capacitance forming portion or a capacitor effective portion.

[0033] (W direction division) The laminate 2 is divided into a first side surface side outer layer portion 15, an effective layer portion 14, and a second side surface side outer layer portion 16 in the width direction W. The first side surface side outer layer portion 15 is a portion including a dielectric layer 20 located between the effective layer portion 14 and the first side surface 5. The second side surface side outer layer portion 16 is a portion including a dielectric layer 20 located between the effective layer portion 14 and the second side surface 6. Figures 3, 4, and 5 show the ranges in the width direction W of the first side surface side outer layer portion 15, the effective layer portion 14, and the second side surface side outer layer portion 16. The first side surface side outer layer portion 15 and the second side surface side outer layer portion 16 are called W gaps or side gaps.

[0034] (Length direction L division) The laminate 2 is divided into a first end face side outer layer portion 17, an effective layer portion 14, and a second end face side outer layer portion 18 in the longitudinal direction L. The first end face side outer layer portion 17 is a portion including the dielectric layers 20 and the first lead portion 35 located between the effective layer portion 14 and the first end face 7. The first end face side outer layer portion 17 is an assembly of the portions of the multiple dielectric layers 20 on the first end face 7 side and the multiple first lead portions 35. The second end face side outer layer portion 18 is a portion including the dielectric layers 20 and the second lead portion 36 located between the effective layer portion 14 and the second end face 8. The second end face side outer layer portion 18 is an assembly of the portions of the multiple dielectric layers 20 on the second end face 8 side and the multiple second lead portions 36. 2, 4, and 5 show the ranges in the length direction L of the first end-side outer layer portion 17, the effective layer portion 14, and the second end-side outer layer portion 18. The first end-side outer layer portion 17 and the second end-side outer layer portion 18 are called L gaps or end gaps.

[0035] (external electrode) The external electrodes 40 include a first external electrode 41 and a second external electrode 42. The first external electrode 41 is an external electrode arranged on the first end face 7 side of the laminate 2. The second external electrode 42 is an external electrode arranged on the second end face 8 side of the laminate 2.

[0036] The first external electrode 41 and the second external electrode 42 have the same basic configuration. The first external electrode 41 and the second external electrode 42 have shapes that are approximately symmetrical with respect to the WT cross section at the center of the length direction L of the multilayer ceramic capacitor 1.

[0037] The first external electrode 41 is disposed on the first end face 7. The first external electrode 41 contacts the first lead portions 35 of each of the multiple first internal electrode layers 31 exposed at the first end face 7. The first external electrode 41 is electrically connected to the multiple first internal electrode layers 31. The first external electrode 41 may also be disposed on part of the first main surface 3 and part of the second main surface 4, as well as part of the first side surface 5 and part of the second side surface 6. In this embodiment, the first external electrode 41 is formed to extend from on the first end face 7 to part of the first main surface 3 and part of the second main surface 4, as well as part of the first side surface 5 and part of the second side surface 6.

[0038] The second external electrode 42 is disposed on the second end face 8. The second external electrode 42 contacts the second lead portions 36 of each of the second internal electrode layers 32 exposed at the second end face 8. The second external electrode 42 is electrically connected to the second internal electrode layers 32. The second external electrode 42 may also be disposed on a portion of the first main surface 3 and a portion of the second main surface 4, as well as a portion of the first side surface 5 and a portion of the second side surface 6. In this embodiment, the second external electrode 42 is formed to extend from the second end face 8 to a portion of the first main surface 3 and a portion of the second main surface 4, as well as a portion of the first side surface 5 and a portion of the second side surface 6.

[0039] In the laminate 2, a capacitance is formed by the first opposing portion 33 of the first internal electrode layer 31 and the second opposing portion 34 of the second internal electrode layer 32 opposing each other via the dielectric layer 20. Therefore, the characteristics of a capacitor are exhibited between the first external electrode 41 connected to the first internal electrode layer 31 and the second external electrode 42 connected to the second internal electrode layer 32.

[0040] (base electrode layer) 2, 4, and 5, the first external electrode 41 includes a first base electrode layer 51 and a first plating layer 71. The first plating layer 71 is disposed on the first base electrode layer 51. The second external electrode 42 includes a second base electrode layer 52 and a second plating layer 72. The second plating layer 72 is disposed on the second base electrode layer 52.

[0041] The first base electrode layer 51 is disposed on the first end face 7. The first base electrode layer 51 contacts the first lead portions 35 of each of the multiple first internal electrode layers 31 exposed at the first end face 7. The first base electrode layer 51 is formed to extend from the first end face 7 to a portion of the first main surface 3 and a portion of the second main surface 4, as well as a portion of the first side surface 5 and a portion of the second side surface 6.

[0042] The second base electrode layer 52 is disposed on the second end face 8. The second base electrode layer 52 contacts the second lead portions 36 of each of the plurality of second internal electrode layers 32 exposed at the second end face 8. The second base electrode layer 52 is formed to extend from the second end face 8 to a portion of the first main surface 3 and a portion of the second main surface 4, as well as a portion of the first side surface 5 and a portion of the second side surface 6.

[0043] The first base electrode layer 51 and the second base electrode layer 52 are baked layers. The baked layer preferably contains a metal component. In addition to the metal component, the baked layer preferably contains at least one of a glass component and a ceramic component. The metal component includes at least one selected from, for example, copper, nickel, silver, palladium, a silver-palladium alloy, and gold. The glass component includes at least one selected from, for example, boron, silicon, barium, magnesium, aluminum, and lithium. The ceramic component may be the same type of ceramic material as the dielectric layer 20. The ceramic component may be a different type of ceramic material from the dielectric layer 20. The ceramic component may include at least one selected from, for example, barium titanate, calcium titanate, a mixed crystal material in which part of the barium in barium titanate is replaced with calcium, strontium titanate, calcium zirconate, and the like.

[0044] An example of a baked layer is a layer formed by applying and baking a conductive paste containing glass and metal to a laminate. The baked layer is formed by simultaneously firing a pre-fired laminated chip, which is the material for the laminate including multiple internal electrode layers and multiple dielectric layers, and the conductive paste applied to the laminated chip. Alternatively, the baked layer is formed by firing the laminated chip to obtain a laminate, and then applying and baking a conductive paste to the laminate. When the conductive paste is baked after obtaining the laminate, the baked layer is preferably formed by baking a conductive paste to which a ceramic material has been added instead of a glass component. When using a conductive paste to which a ceramic material has been added, the added ceramic material is preferably the same type of ceramic material as the dielectric layer. The baked layer may be multiple layers.

[0045] A preferred example of the thickness in the length direction L of the first base electrode layer 51 on the first end face 7 is approximately 10 μm or more and 200 μm or less at the center in the height direction T and width direction W of the first base electrode layer 51.

[0046] A preferred example of the thickness in the length direction L of the second base electrode layer 52 on the second end face 8 is approximately 10 μm or more and 200 μm or less at the center in the height direction T and width direction W of the second base electrode layer 52.

[0047] When the first base electrode layer 51 is provided on a portion of at least one of the first main surface 3 or the second main surface 4, an example of a preferred thickness in the height direction T of the first base electrode layer 51 provided on this portion is approximately 3 μm or more and 40 μm or less at the center in the length direction L and width direction W of the first base electrode layer 51 provided on this portion.

[0048] When the first base electrode layer 51 is provided on a portion of at least one of the first side surface 5 or the second side surface 6, an example of a preferred thickness in the width direction W of the first base electrode layer 51 provided on this portion is approximately 3 μm or more and 40 μm or less at the center in the length direction L and height direction T of the first base electrode layer 51 provided on this portion.

[0049] When the second base electrode layer 52 is provided on a portion of at least one of the first main surface 3 and the second main surface 4, an example of a preferred thickness in the height direction T of the second base electrode layer 52 provided on this portion is approximately 3 μm or more and 40 μm or less at the center in the length direction L and width direction W of the second base electrode layer 52 provided on this portion.

[0050] When the second base electrode layer 52 is provided on a portion of at least one of the first side surface 5 or the second side surface 6, an example of a preferred thickness in the width direction W of the second base electrode layer 52 provided on this portion is approximately 3 μm or more and 40 μm or less at the center in the length direction L and height direction T of the second base electrode layer 52 provided on this portion.

[0051] The first plating layer 71 is disposed so as to cover the first base electrode layer 51. The second plating layer 72 is disposed so as to cover the second base electrode layer 52.

[0052] The first plating layer 71 and the second plating layer 72 may contain at least one selected from, for example, copper, nickel, tin, silver, palladium, a silver-palladium alloy, and gold. The first plating layer 71 and the second plating layer 72 may each be formed of multiple layers. A preferred structure for the first plating layer 71 and the second plating layer 72 is a two-layer structure in which a tin plating layer is formed on a nickel plating layer.

[0053] The first plating layer 71 is disposed so as to cover the first base electrode layer 51. In this embodiment, the first plating layer 71 includes a first nickel plating layer 73 and a first tin plating layer 75. The first tin plating layer 75 is located on the first nickel plating layer 73.

[0054] The second plating layer 72 is disposed so as to cover the second base electrode layer 52. In this embodiment, the second plating layer 72 includes a second nickel plating layer 74 and a second tin plating layer 76. The second tin plating layer 76 is located on the second nickel plating layer 74.

[0055] The nickel plating layer prevents the first base electrode layer 51 and the second base electrode layer 52 from being eroded by solder when mounting the multilayer ceramic capacitor 1. The tin plating layer improves the wettability of the solder when mounting the multilayer ceramic capacitor 1. The tin plating layer facilitates mounting of the multilayer ceramic capacitor 1. The first nickel plating layer 73, the first tin plating layer 75, the second nickel plating layer 74, and the second tin plating layer 76 each preferably have a thickness of 2 μm or more and 10 μm or less.

[0056] The external electrode 40 may include a conductive resin layer containing conductive particles and a thermosetting resin. When the external electrode 40 includes a conductive resin layer, the conductive resin layer may be disposed so as to cover the baked layer. When the conductive resin layer is disposed so as to cover the baked layer, the conductive resin layer is disposed between the baked layer and the plated layer. The baked layer corresponds to the first base electrode layer 51 and the second base electrode layer 52. The plated layer corresponds to the first plating layer 71 and the second plating layer 72. The conductive resin layer may completely cover the baked layer. The conductive resin layer may also cover a portion of the baked layer.

[0057] Conductive resin layers containing thermosetting resins are more flexible than conductive layers made of plating films or fired conductive pastes. Therefore, when a multilayer ceramic capacitor is subjected to physical shock or shock due to thermal cycling, the conductive resin layer functions as a buffer layer. Therefore, the conductive resin layer prevents cracks from occurring in the multilayer ceramic capacitor.

[0058] Examples of metals constituting the conductive particles include silver, copper, nickel, tin, bismuth, or an alloy containing at least two of these metals. The conductive particles preferably contain silver. An example of the conductive particles is silver metal powder. Silver has the lowest resistivity among metals. Silver is suitable as an electrode material. Silver is a noble metal. Silver is resistant to oxidation. Silver has high weather resistance. For these reasons, silver metal powder is suitable as the conductive particles.

[0059] The conductive particles may be metal powder whose surface is silver-coated. When using conductive particles whose surface is silver-coated, the metal powder is preferably a powder of copper, nickel, tin, bismuth, or an alloy thereof. In order to maintain the properties of silver while making the base metal inexpensive, it is preferable to use a silver-coated metal powder.

[0060] The conductive particles may be copper or nickel that has been subjected to an antioxidant treatment. The conductive particles may be metal powder whose surface is coated with tin, nickel, or copper. When using metal powder whose surface is coated with tin, nickel, or copper, the metal powder is preferably silver, copper, nickel, tin, bismuth, or an alloy powder containing at least two of these metals.

[0061] The shape of the conductive particles is not limited. Examples of the shape of the conductive particles include spherical and flat shapes. It is preferable to use a mixture of spherical metal powder and flat metal powder.

[0062] The conductive particles contained in the conductive resin layer mainly play a role in ensuring the electrical conductivity of the conductive resin layer. When multiple conductive particles come into contact with each other, a conductive path is formed inside the conductive resin layer.

[0063] Examples of the resin constituting the conductive resin layer may include at least one selected from various known thermosetting resins such as epoxy resin, phenol resin, urethane resin, silicone resin, and polyimide resin. Among these, one of the most suitable resins is epoxy resin. Epoxy resins have excellent heat resistance, moisture resistance, and adhesion. The resin of the conductive resin layer preferably contains a curing agent in addition to the thermosetting resin. When an epoxy resin is used as the base resin, the curing agent for the epoxy resin may be any of various known compounds such as phenol-based, amine-based, acid anhydride-based, imidazole-based, active ester-based, and amide-imide-based compounds.

[0064] The conductive resin layer may be formed of multiple layers. The preferred thickness of the thickest part of the conductive resin layer is 10 μm or more and 150 μm or less.

[0065] The above is the basic configuration of the multilayer ceramic capacitor 1. The length in the length direction L of the multilayer ceramic capacitor 1, including the laminate 2 and the external electrodes 40, is preferably 0.2 mm or more and 6 mm or less. The length in the height direction T of the multilayer ceramic capacitor 1 is preferably 0.05 mm or more and 5 mm or less. The length in the width direction W of the multilayer ceramic capacitor 1 is preferably 0.1 mm or more and 5 mm or less.

[0066] (Rare earth segregation) In the multilayer ceramic capacitor 1 of this preferred embodiment, the segregation of the rare earth element is not uniform within the laminate 2. Hereinafter, this will be described with reference to Figures 6A and 6B. Figure 6A is a cross-sectional view taken along line 106-106 in Figure 2. Figure 6B is a cross-sectional view taken along line 105-105 in Figure 2.

[0067] (Ends of the effective layer width direction and the center of the effective layer) As shown in Figures 6A and 6B, the laminate 2 has an effective layer width direction end portion 201 and an effective layer central portion 202. As shown in Figure 6A, the effective layer width direction end portion 201 refers to the portion near the end 111 of the effective layer portion 14 on the first side surface 5 side and the portion near the end 112 of the effective layer portion 14 on the second side surface 6 side in the WT cross section. On the other hand, as shown in Figure 6B, the effective layer central portion 202 refers to the central portion of the effective layer portion 14 in the width direction W in the WT cross section. This will be explained in detail below.

[0068] (End of effective layer width direction) First, referring to Fig. 6A, the effective layer width direction end portion 201 will be described. The effective layer width direction end portion 201 is the portion of the effective layer portion 14 surrounded by lines 251 and 252, and the portion of the effective layer portion 14 surrounded by lines 253 and 254.

[0069] Line 251 is a line located at end 111 on the first side surface 5 side of the effective layer portion 14. Line 252 is a line shifted in parallel from line 251 by 20 μm in the direction of the second side surface 6. In other words, distance 221, which is the distance between line 251 and line 252, is 20 μm.

[0070] Line 254 is a line located at end 112 on the second side surface 6 side of the effective layer portion 14. Line 253 is a line shifted in parallel from line 254 by 20 μm in the direction of the first side surface 5. In other words, the distance between line 253 and line 254 is 20 μm.

[0071] As described above, the effective layer width direction end portions 201 are portions of the effective layer portion 14 extending 20 μm from each end of the effective layer portion 14 in the width direction W toward the inside of the effective layer portion 14 .

[0072] The above description has been given with reference to a cross section of the effective layer portion 14. The effective layer width direction end portion 201 continues to the same position as shown in FIG. 6A in the length direction L of the effective layer portion 14.

[0073] (Center of the effective layer) Next, the effective layer central portion 202 will be described with reference to Fig. 6B. The effective layer central portion 202 is a portion of the effective layer portion 14 surrounded by lines 271 and 272. The lines 271 and 272 are lines drawn at the center of the effective layer portion 14 in the width direction W so that the distance between them is 20 µm. In other words, the distance 231 between the lines 271 and 272 is 20 µm.

[0074] As described above, the effective layer central portion 202 is a portion having a width of 20 μm in the central portion in the width direction W of the effective layer portion 14 .

[0075] The above description has been given with reference to a cross section of the effective layer portion 14. The effective layer central portion 202 continues to the same position as shown in Fig. 6B in the length direction L of the effective layer portion 14.

[0076] (Rare earth segregation area) In the multilayer ceramic capacitor 1 of this embodiment, the laminate 2 has a rare earth segregation region. The rare earth segregation region is a region where rare earth elements are segregated.

[0077] In the multilayer ceramic capacitor 1 of this embodiment, in the WT cross section, the amount of segregation of rare earth elements in the rare earth segregation regions present at the effective layer width direction end portions 201 and the amount of segregation of rare earth elements in the rare earth segregation regions present at the effective layer central portion 202 satisfy the relationship of effective layer central portion 202 > effective layer width direction end portions 201. This will be described with reference to Figures 7A, 7B, 8A and 8B.

[0078] (Edge evaluation area and central evaluation area) First, the evaluation regions at the effective layer width direction end portions 201 and the effective layer central portion 202 will be described. The evaluation region refers to the measurement range when measuring the characteristics of the effective layer width direction end portions 201 and the effective layer central portion 202, such as the segregation amount of rare earth elements. The evaluation region at the effective layer width direction end portions 201 is referred to as the end evaluation region 211. The evaluation region at the effective layer central portion 202 is referred to as the central evaluation region 212. As shown in Figures 6A and 6B, the end evaluation region 211 and the central evaluation region 212 are square in shape. The length of one side of the square is 20 μm. The positions of the end evaluation region 211 and the central evaluation region 212 in the height direction T are the central positions in the height direction T of the effective layer portion 14.

[0079] FIG. 7A is an electron microscope image of the edge evaluation region 211. FIG. 7B is an electron microscope image of the central evaluation region 212. FIG. 8A is a field emission-wavelength-dispersive X-ray spectrometry (FE-WDX) image of the edge evaluation region 211. FIG. 8B is an FE-WDX image of the central evaluation region 212. FIGS. 8A and 8B show the segregation of rare earth elements. Note that the image shown in FIG. 7A and the image shown in FIG. 8A are images of the same position on the WT cross section. Similarly, the image shown in FIG. 7B and the image shown in FIG. 8B are images of the same position on the WT cross section.

[0080] 8A and 8B are rare earth segregation regions 81. In the edge evaluation region 211 shown in FIG. 8A, rare earth segregation regions 81 can be seen, but the number of them is not large. On the other hand, in the central evaluation region 212 shown in FIG. 8B, more rare earth segregation regions 81 can be observed than in the edge evaluation region 211 shown in FIG. 8A.

[0081] 8A. In the end evaluation region 211 shown in FIG. 8A, the rare earth segregation region 811 indicated by the arrow 811 is a rare earth segregation region 81 having a relatively large area. In contrast, in the center evaluation region 212 shown in FIG. 8B, more rare earth segregation regions 811 having a relatively large area, as indicated by the arrows 812 and 813, are observed than in the end evaluation region 211 shown in FIG. 8A. That is, the segregation amount of the rare earth element in the rare earth segregation region 81 present in the effective layer central portion 202 in the WT cross section at the center in the length direction L is greater than the segregation amount of the rare earth element in the rare earth segregation region 81 present in the effective layer width direction end portion 201 in the WT cross section near the boundary between the L gap and the effective layer portion 14. The vicinity of the boundary between the L gap and the effective layer 14 refers to the portion near the end of the effective layer 14 on the first end face 7 side and the portion near the end of the effective layer 14 on the second end face 8 side in the LT cross section.

[0082] As described above, in the WT cross section of the multilayer ceramic capacitor 1 of this embodiment, the segregation amount of the rare earth element in the rare earth segregation region 81 present at the end portion 201 in the effective layer width direction and the segregation amount of the rare earth element in the rare earth segregation region 81 present at the effective layer central portion 202 satisfy the relationship of effective layer central portion 202 > effective layer width direction end portion 201.

[0083] The above formula means that the amount of segregation of rare earth elements in the rare earth segregation regions 81 present at the effective layer width direction end portions 201 is smaller than the amount of segregation of rare earth elements in the rare earth segregation regions 81 present at the effective layer central portion 202. The above-described relationship between the rare earth segregation regions 81 present at the effective layer width direction end portions 201 and the effective layer central portion 202 enables the multilayer ceramic capacitor 1 of this embodiment to have improved reliability. This will be explained below.

[0084] Assume that the atomic concentration of the rare earth element contained in the effective layer width direction end portions 201 is equal to the atomic concentration of the rare earth element contained in the effective layer central portion 202. Generally, the reliability of the effective layer width direction end portions 201 is more likely to decrease than the reliability of the effective layer central portion 202. In the multilayer ceramic capacitor 1 of this embodiment, the amount of segregation of the rare earth element at the effective layer width direction end portions 201 is smaller than the amount of segregation of the rare earth element at the effective layer central portion 202. A smaller amount of segregation of the rare earth element means that a larger amount of the rare earth element is solid-dissolved in the dielectric layer 20. As such, in the multilayer ceramic capacitor 1 of this embodiment, a larger amount of the rare earth element is solid-dissolved in the dielectric layer 20 at the effective layer width direction end portions 201. Therefore, the reliability of the effective layer width direction end portions 201 can be improved.

[0085] Furthermore, in the multilayer ceramic capacitor 1 of this embodiment, the amount of segregation of the rare earth element is relatively large in the effective layer central portion 202. In other words, the amount of segregation of the rare earth element dissolved in the dielectric layer 20 is relatively small. This allows the temperature characteristics of the multilayer ceramic capacitor 1 to be maintained.

[0086] As described above, the multilayer ceramic capacitor 1 of this embodiment can improve high-temperature reliability while maintaining its temperature characteristics.

[0087] (Segregation amount of rare earth elements) Here, the ratio of the amount of segregation of rare earth elements in the effective layer central portion 202 to the amount of segregation of rare earth elements in the effective layer width direction end portion 201 is preferably 2 to 4 times. According to the above configuration, high temperature reliability can be further improved.

[0088] If this ratio is less than two, the effect of improving high-temperature reliability decreases.

[0089] On the other hand, if this ratio is greater than 4, the dielectric material becomes difficult to sinter and the grain growth of the dielectric particles is suppressed, resulting in a decrease in the dielectric constant of the dielectric layer 20 and a decrease in the capacitance of the multilayer ceramic capacitor 1.

[0090] Furthermore, if the amount of segregation of rare earth elements exceeds a predetermined value, the high-temperature reliability will be reduced.

[0091] The ratio of the amount of segregation of rare earth elements in the effective layer central portion 202 to the effective layer width direction end portion 201 is more preferably three times.

[0092] (Aluminum segregation region) The multilayer ceramic capacitor 1 of this embodiment has an aluminum segregation region 82 in the laminate 2. The aluminum segregation region 82 is a region where aluminum is segregated in the laminate 2. In the multilayer ceramic capacitor 1 of this embodiment, the aluminum segregation region 82 is present at the end portions 201 in the effective layer width direction, but is not present in the effective layer central portion 202. This will be described with reference to FIGS. 9A and 9B.

[0093] FIG. 9A is an FE-WDX image of the edge evaluation region 211. FIG. 9B is an FE-WDX image of the central evaluation region 212. FIGS. 9A and 9B show aluminum segregation. Note that the image shown in FIG. 7A and the image shown in FIG. 9A are images of the same position on the WT cross section. Similarly, the image shown in FIG. 7B and the image shown in FIG. 9B are images of the same position on the WT cross section. The white portion in FIG. 9A is the aluminum segregation region 82.

[0094] As shown by arrows 821 and 822 in Fig. 9A, the end evaluation region 211 has a plurality of aluminum segregation regions 82. In contrast, as shown in Fig. 9B, the central evaluation region 212 has no aluminum segregation regions 82.

[0095] The effective layer width direction end portions 201 are portions where the thickness of the dielectric layer 20 is likely to be thin and the high-temperature reliability is likely to be reduced. In the multilayer ceramic capacitor 1 of this embodiment, aluminum is selectively segregated at the effective layer width direction end portions 201. This improves the high-temperature reliability of the multilayer ceramic capacitor 1.

[0096] (internal electrode area and internal electrode separation area) 7A and 7B, in the multilayer ceramic capacitor 1 of this embodiment, the internal electrode layer 30 has an internal electrode existing region 311 and an internal electrode divided region 312. The aluminum segregation region 82 is present in the internal electrode divided region 312 in the end evaluation region 211.

[0097] The internal electrode existing region 311 is a region in the WT cross section where the internal electrode layer 30 is continuously present in the width direction W. The internal electrode divided region 312 is a region in the WT cross section where the internal electrode layer 30 is divided in the width direction W. The internal electrode divided region 312 does not contain material that constitutes the internal electrode layer 30. In the internal electrode divided region 312, the material that constitutes the internal electrode layer 30 is missing.

[0098] In the multilayer ceramic capacitor 1 of this embodiment, the aluminum segregation region 82 exists in the internal electrode separation region 312 in the end evaluation region 211. By adopting the above configuration, it is possible to obtain a further improvement in high-temperature reliability.

[0099] In the multilayer ceramic capacitor 1 of this embodiment, aluminum is segregated in the portion where the internal electrode layer 30 is missing at the end 201 in the effective layer width direction. In other words, the portion where the internal electrode layer 30 is missing is filled with the aluminum segregation region 82. Therefore, it is possible to suppress the concentration of the electric field in the portion where the internal electrode layer 30 is missing, where the electric field is likely to concentrate. As a result, it is possible to improve the reliability of the multilayer ceramic capacitor 1. Note that aluminum is usually segregated in the form of aluminum oxide.

[0100] (Definition and measurement method of rare earth segregation amount) The amount of rare earth segregation can be defined in terms of cps (counts per second), which is the number of X-ray photons per unit time in WDX. Specifically, the number of cells in the FE-WDX element mapping where the count of rare earth elements is 20 cps or more is defined as the amount of rare earth element segregation.

[0101] The specific measurement method is as follows. The periphery of the measurement sample is impregnated with epoxy resin and allowed to harden. The measurement sample, including the epoxy resin, is polished in a direction that allows observation of a cross section parallel to the width direction W and height direction T. Only the first end surface side outer layer portion 17 or the second end surface side outer layer portion 18, i.e., the L gap, is mirror-polished. This exposes the cross section of the end of the length direction L of the effective layer portion 14. The cross section taken along line 106-106 in FIG. 2, i.e., FIG. 6A, shows this cross section. The mirror polishing is further continued up to the center position in the length direction L of the multilayer ceramic capacitor 1. This exposes the cross section of the center portion in the length direction L of the effective layer portion 14. The 105-105 cross section in FIG. 2, i.e., FIG. 6B, shows this cross section. The exposed surface of each cross section was gold coated at 30 mA for 60 seconds. Elemental mapping is performed using FE-WDX (device name: EPMA-8050G (product name)). The observation location for elemental mapping is an end evaluation region 211 at the end 201 of the effective layer width direction in the cross section of the effective layer portion in the length direction L where only the L gap has been polished. On the other hand, in the cross section polished in the length direction L up to the center position in the length direction L of the multilayer ceramic capacitor 1, the observation location for elemental mapping is a central evaluation region 212 at the central portion 202 of the effective layer. The observation conditions were a magnification of 3300x, an acceleration voltage of 15kV, an image size of 240x240pix, an integration time of 45ms / pix, and a beam current of 50nA, and the element counts (unit: cps) for each cell for rare earth elements were quantified. At this time, cells with 20cps or more were defined as segregated, and the number of such cells was counted in the edge evaluation region 211 and the central evaluation region 212. The region defined as segregated is the segregation region. The counts in the edge evaluation region 211 were calculated as P W The count number in the central evaluation region 212 is P C The measurement field was set to 20 μm × 20 μm. Aluminum segregation was also evaluated in the same way. Measurement sample material The dielectric material was a ceramic material with a perovskite structure containing barium, strontium, zirconium, titanium, hafnium, and calcium, and further containing silicon and dysprosium as a rare earth element.

[0102] Examples and Comparative Examples The examples and comparative examples will be described with reference to Fig. 10. Fig. 10 is a diagram showing the evaluation results of the examples and comparative examples. In Fig. 10, the count P W is the count number P in the central evaluation region 212 C is expressed as a ratio when the value of the segregation region is set to "1" (however, Comparative Example 1 in which no segregation region is observed is excluded).

[0103] According to the manufacturing method described below, samples were manufactured in lots as Examples 1 to 8 and Comparative Examples 1 and 2, with the manufacturing conditions adjusted to vary the amount of segregation. The samples within each lot were manufactured under the same manufacturing conditions. For each Example and Comparative Example, three samples for measuring the amount of segregation, five samples for evaluating temperature characteristics, and 40 samples for evaluating high-temperature load reliability were taken out from the same lot and prepared. The segregation amount measurement and temperature characteristic evaluation were evaluated using the average values ​​of the measurement and evaluation results. <Temperature characteristics> The capacitance was measured 5 minutes after the specified temperature was reached at each of the following stages: -55, 25, and 125°C. The capacitance value at the reference temperature T1 (25°C) was C1, and the capacitance value at each measurement temperature T2 was C2. The temperature coefficient α was calculated using the following formula: α=(C2-C1) / {C1(T2-T1)}×10 6 Those whose temperature coefficient α was within 0±30 [ppm / °C] were evaluated as "○", and those whose temperature coefficient α was outside the range of 0±30 [ppm / °C] and within 0±60 [ppm / °C] were evaluated as "△". Five samples were tested for each of the examples and comparative examples, and the average value was used for evaluation. <High temperature load test> A high-temperature load test was conducted on each sample based on the HALT test method. More specifically, each sample was individually set in a dedicated jig and placed in a high-temperature chamber at a temperature of 150°C. A direct current of 120% of the rated voltage was applied between a pair of external electrodes, and this condition was maintained for 100 hours. Those that did not fail during the test were evaluated as "◎", those that failed during the test with 1 to 3 failures were evaluated as "○", and those that failed four or more during the test were evaluated as "×". The test was conducted on 40 samples each for the example and comparative example. As shown in Comparative Examples 1 and 2, when the amount of segregation of rare earth elements in the rare earth segregation region did not satisfy the condition that the central part of the effective layer was greater than the widthwise end part of the effective layer, high temperature load reliability was not obtained. Note that Comparative Example 1 is an example in which no rare earth elements were added.

[0104] Furthermore, as shown in Examples 8 to 10, when aluminum segregation regions were present at the ends in the effective layer width direction, high-temperature load reliability was further improved. In Examples 4 and 5, the ratio of the amount of rare earth element segregation in the center of the effective layer to that at the ends in the effective layer width direction exceeded 5 times. Therefore, it is presumed that solid solution of rare earth elements was promoted at the ends in the effective layer width direction, resulting in a deterioration in temperature characteristics. The ratio of the amount of rare earth element segregation in the center of the effective layer to that at the ends in the effective layer width direction is preferably 2 to 5 times, more preferably 2 to 4 times.

[0105] (Manufacturing method of multilayer ceramic capacitors) A method for manufacturing a multilayer ceramic capacitor will now be described. Note that the method for manufacturing a multilayer ceramic capacitor is not limited to the method below.

[0106] A dielectric sheet for the dielectric layer 20 and a conductive paste for the internal electrode layer 30 are prepared. Both the dielectric sheet for the dielectric layer 20 and the conductive paste for the internal electrode layer 30 contain a binder and a solvent. The binder and solvent may be known. An example of a paste made of a conductive material is a paste in which an organic binder and an organic solvent are added to a metal powder.

[0107] A conductive paste for the internal electrode layer 30 is printed on the dielectric sheet using a printing plate whose pattern is designed to have the shape of the internal electrode layer 30. Examples of printing methods include screen printing and gravure printing. In this way, a dielectric sheet on which the pattern of the first internal electrode layer 31 is formed and a dielectric sheet on which the pattern of the second internal electrode layer 32 is formed are prepared.

[0108] A predetermined number of dielectric sheets on which the pattern of the internal electrode layer 30 is not printed are stacked to form a portion that will become the first main surface side outer layer portion 12 on the first main surface 3 side. Dielectric sheets on which the pattern of the first internal electrode layer 31 is printed and dielectric sheets on which the pattern of the second internal electrode layer 32 is printed are stacked alternately in sequence on top of that to form a portion that will become the internal layer portion 10. A predetermined number of dielectric sheets on which the pattern of the internal electrode layer 30 is not printed are stacked on top of this portion that will become the internal layer portion 10 to form a portion that will become the second main surface side outer layer portion 13 on the second main surface 4 side. In this way, a laminated sheet is obtained.

[0109] When preparing the dielectric sheet, the dielectric material having a perovskite structure as the main component was designated ABO3 (A represents the element at the A site in the perovskite structure, and B represents the element at the B site in the perovskite structure), and the rare earth element was adjusted to be 0.5 mol% to 2.5 mol% when the element at the B site was 100 mol%. The rare earth element was dysprosium. This facilitates achieving a segregation amount of the rare earth element in the rare earth segregation region 81 present in the effective layer central portion 202 greater than that in the effective layer width direction end portions 201, such that the segregation amount of the rare earth element in the rare earth segregation region 81 present in the effective layer width direction end portions 201 is greater than that in the effective layer central portion 202.

[0110] Furthermore, when preparing the dielectric sheet, 0.02 mol % to 1.0 mol % of aluminum oxide is added to the dielectric material, which makes it easier to form aluminum segregation regions at the ends in the effective layer width direction.

[0111] The laminated sheet is then pressed in the height direction by means of a hydrostatic press or the like to produce a laminated block.

[0112] The laminated block is then cut into individual pieces of a predetermined size to obtain a plurality of laminated chips, which may then be polished by barrel polishing or the like to round off corners and ridges.

[0113] The laminated chip is then fired to produce a laminate. The firing temperature is preferably 900° C. or higher and 1400° C. or lower. The firing temperature can be changed depending on the materials of the dielectric and internal electrode layers.

[0114] Here, the gas flow rate is adjusted while the top temperature is being maintained during the firing process, so that the oxygen partial pressure at the end of the top temperature maintenance is higher than the oxygen partial pressure at the start of the top temperature maintenance. This facilitates achieving a ratio of the segregation amount of rare earth elements in the rare earth segregation region 81 present at the effective layer central portion 202 to the segregation amount of rare earth elements in the rare earth segregation region 81 present at the effective layer width direction end portion 201, such that the segregation amount in the effective layer central portion is greater than the effective layer width direction end portion. This also facilitates the presence of aluminum segregation regions at the effective layer width direction end portion.

[0115] A conductive paste that will become the base electrode layer 50 is applied to both end surfaces of the laminate 2. In this embodiment, the base electrode layer 50 is a baked layer. The baked layer can be formed by applying a conductive paste containing a glass component and a metal to the laminate 2 by a method such as dipping, and then performing a baking process. The temperature for the baking process at this time is preferably 700°C or higher and 900°C or lower.

[0116] The laminated chip before firing and the conductive paste applied to the laminated chip may be fired simultaneously. In this case, the fired layer is preferably formed by firing a material containing a ceramic material instead of a glass component. In this case, the ceramic material added is preferably the same type as that of the dielectric layer 20. In this case, the conductive paste is applied to the laminated chip before firing, and the laminated chip and the conductive paste applied to the laminated chip are fired simultaneously to form the laminate 2 with the fired layer.

[0117] Thereafter, a plating layer is formed on the surface of the base electrode layer 50, which is made of a baked layer. In this embodiment, a first plating layer 71 is formed on the surface of the first base electrode layer 51. A second plating layer 72 is formed on the surface of the second base electrode layer 52. In this embodiment, a nickel plating layer and a tin plating layer are formed as the plating layers. Either electrolytic plating or electroless plating may be used for the plating process. However, electroless plating has the disadvantage of requiring pretreatment using a catalyst or the like to improve the plating deposition rate, which makes the process more complicated. Therefore, it is usually preferable to use electrolytic plating. The nickel plating layer and the tin plating layer are formed sequentially, for example, by barrel plating.

[0118] When a conductive resin layer is provided, the conductive resin layer may be disposed so as to cover the baked layer. When providing the conductive resin layer, a conductive resin paste containing a thermosetting resin and a metal component is applied onto the baked layer, followed by heat treatment at a temperature of 250 to 550°C or higher. This causes the thermosetting resin to thermally harden, forming a conductive resin layer. The atmosphere during this heat treatment is preferably an N2 atmosphere. To prevent the resin from scattering and the various metal components from oxidizing, the oxygen concentration is preferably 100 ppm or less.

[0119] Through the above manufacturing steps, the multilayer ceramic capacitor 1 is manufactured.

[0120] <1> a plurality of dielectric layers stacked one upon the other and a plurality of internal electrode layers stacked one upon the other; a first main surface and a second main surface facing each other in a height direction; a first side surface and a second side surface facing each other in a width direction perpendicular to the height direction; a first end surface and a second end surface facing each other in a length direction perpendicular to the height direction and the width direction; an effective layer portion formed by alternately stacking the dielectric layers and the internal electrode layers; a laminate including outer layer portions arranged to sandwich the effective layer portion from the first principal surface side and the second principal surface side; a first external electrode disposed on the first end surface; a second external electrode disposed on the second end surface; In a multilayer ceramic capacitor having The laminate includes an effective layer width direction end portion disposed at an end portion in the width direction of the effective layer portion; an effective layer central portion disposed in a central portion of the effective layer portion, the laminate further has a rare earth segregation region in which a rare earth element is segregated, In a cross section parallel to the width and height directions, the amount of segregation of the rare earth element in the rare earth segregation region present at the end portion in the width direction of the effective layer and the amount of segregation of the rare earth element in the rare earth segregation region present at the central portion of the effective layer are such that the central portion is greater than the end portion in the width direction of the effective layer, A multilayer ceramic capacitor, wherein the dielectric material of the dielectric layer contains barium, strontium, zirconium, titanium, and hafnium, and contains a material having a perovskite structure.

[0121] <2> The ratio of the amount of segregation of the rare earth element in the central part of the effective layer to that in the end part in the width direction of the effective layer is 2 times or more and 4 times or less. <1> The multilayer ceramic capacitor according to claim 1.

[0122] <3> the laminate further has an aluminum segregation region in which aluminum is segregated, the aluminum segregation region is present at the end portion in the width direction of the effective layer, but is not present in the central portion of the effective layer; <1> or <2> The multilayer ceramic capacitor according to claim 1.

[0123] <4> The internal electrode layer has an internal electrode existing region and an internal electrode dividing region, the aluminum segregation region is present in the internal electrode separation region; <3> The multilayer ceramic capacitor according to claim 1.

[0124] The present invention is not limited to the configurations of the above-described embodiments, and can be appropriately modified and applied within the scope of the present invention. A combination of two or more of the individual desirable configurations described in the above-described embodiments also constitutes the present invention. [Explanation of symbols]

[0125] 1. Multilayer ceramic capacitors 2. Laminate 3 First main surface 4 Second main surface 5. First Aspect 6. The Second Aspect 7 First end face 8 Second end face 10 Inner layer 11 Outer layer on main surface side 12 First main surface side outer layer portion 13 Second main surface side outer layer 14 Effective layer 15 First side outer layer 16 Second outer layer on the side 17 First end face side outer layer 18 Second end face side outer layer 20 dielectric layer 21 Inner dielectric layer 22 outer dielectric layer 30 Internal electrode layer 31 First internal electrode layer 32 Second internal electrode layer 33 First opposing part 34 Second opposing part 35 First drawer 36 Second drawer 40 External electrode 41 First external electrode 42 Second external electrode 50 Base electrode layer 51 First base electrode layer 52 Second base electrode layer 71 First plating layer 72 Second plating layer 73 First nickel plating layer 74 Second nickel plating layer 75 First tin plating layer 76 Second tin plating layer 81 Rare earth segregation area 82 Aluminum segregation region 111 first side edge 112 Second side edge 201 Effective layer width direction end 202 Center of the effective layer 211 Edge Evaluation Area 212 Central Evaluation Area 311 Internal electrode existing area 312 Internal electrode separation area 811 Rare earth segregation area L lengthwise T Height direction W width direction

Claims

1. a plurality of dielectric layers stacked one upon the other and a plurality of internal electrode layers stacked one upon the other; a first main surface and a second main surface facing each other in a height direction; a first side surface and a second side surface facing each other in a width direction perpendicular to the height direction; a first end surface and a second end surface facing each other in a length direction perpendicular to the height direction and the width direction; an effective layer portion formed by alternately stacking the dielectric layers and the internal electrode layers; a laminate including outer layer portions arranged to sandwich the effective layer portion from the first principal surface side and the second principal surface side; a first external electrode disposed on the first end surface; a second external electrode disposed on the second end surface; In a multilayer ceramic capacitor having The laminate includes an effective layer width direction end portion disposed at an end portion in the width direction of the effective layer portion; an effective layer central portion disposed in a central portion of the effective layer portion, the laminate further has a rare earth segregation region in which a rare earth element is segregated, In a cross section parallel to the width and height directions, the amount of segregation of the rare earth element in the rare earth segregation region present in the central part of the effective layer is greater than the amount of segregation of the rare earth element in the end part of the effective layer in the width direction of the effective layer, and A multilayer ceramic capacitor, wherein the dielectric material of the dielectric layers contains at least one of calcium, zirconium, and strontium and contains a material having a perovskite structure.

2. 2. The multilayer ceramic capacitor according to claim 1, wherein the ratio of the amount of segregation of the rare earth element in the central portion of the effective layer to that in the end portions in the width direction of the effective layer is 2 to 4 times.

3. the laminate further has an aluminum segregation region in which aluminum is segregated, 3. The multilayer ceramic capacitor according to claim 1, wherein the aluminum segregation region is present at an end portion in the width direction of the effective layer, but is not present in a central portion of the effective layer.

4. The internal electrode layer has an internal electrode existing region and an internal electrode dividing region, 4. The multilayer ceramic capacitor according to claim 3, wherein the aluminum segregation region is present in the internal electrode separation region.

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