Circuit device and electronic apparatus

Abstract

To provide a circuit device, etc., capable of reducing a fall of a charging current into a battery when switching charging circuits.SOLUTION: A circuit device 100 includes: a current source circuit 140; a first charging circuit 110 which supplies a first charging current ICH1 to a charging node NBAT; a second charging circuit 120 which supplies a second charging current ICH2 to the charging node NBAT; and a control circuit 160 which sets current values of the first charging current ICH1 and the second charging current ICH2 on the basis of a current setting value DIN[10:0]. When the current setting value DIN[10:0] is within a first range, the first charging circuit 110 supplies the first charging current ICH1. When the current setting value DIN[10:0] is within a second range of a high current side, the second charging circuit 120 supplies the second charging current ICH2. When switching the first range and the second range, the first charging circuit 110 supplies the first charging current ICH1 and the second charging circuit 120 supplies the second charging current ICH2.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a circuit device, an electronic device, and the like. [Background technology]

[0002] Patent Document 1 discloses a charging device that charges a secondary battery from two charging power sources with different voltages. The voltage of one power source is slightly lower than the reference voltage used to charge the secondary battery, and the voltage of the other power source is higher. The charging device detects the battery voltage and charges the battery using the two power sources when the battery voltage is lower than the voltage of the two power sources. When the secondary battery is charged to a certain extent and the battery voltage exceeds the voltage of the lower-voltage power source, the charging device charges the secondary battery using only the power source with the higher voltage. In Patent Document 1, the charging current decreases as the secondary battery is charged, and charging is terminated by detecting this charging current. Then, when the secondary battery is charged to a certain extent, the charging power source is switched from two to one based on the battery voltage, improving the accuracy of charging current detection. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 10-028338 Summary of the Invention [Problem to be solved by the invention]

[0004] Consider a device with two charging circuits. When switching from charging a secondary battery with one charging circuit to charging the other, a momentary drop in charging voltage or charging current may occur, resulting in charging problems. For example, while it is desirable for the on-resistance of the transistor controlling the charging current supplied to the secondary battery to be low, increasing the transistor's gate width to reduce the on-resistance increases the gate capacitance, which can cause the transistor to take longer to switch from off to on. This can result in a state where the battery is not being charged by either charging circuit, potentially resulting in a momentary drop in charging voltage or charging current. If the charging voltage or charging current suddenly drops, the secondary battery's battery protection circuit may interpret the drop in charging current as an indication that charging has been stopped, causing the charging to stop. [Means for solving the problem]

[0005] One aspect of the present disclosure relates to a circuit device including a current source circuit, a first charging circuit that supplies a first constant charging current as a charging current to a charging node based on the current from the current source circuit, a second charging circuit that supplies a second constant charging current as the charging current based on the current from the current source circuit, and a control circuit that sets the current value of the first charging current and the current value of the second charging current based on a current setting value that sets the current value of the charging current, wherein when the current setting value is in a first range, the first charging circuit supplies the first charging current to the charging node, and when the current setting value is in a second range that is higher than the first range, the second charging circuit supplies the second charging current to the charging node, and when the current setting value switches between the first range and the second range, the first charging circuit supplies the first charging current to the charging node and the second charging circuit supplies the second charging current to the charging node.

[0006] Another aspect of the present disclosure relates to an electronic device including the circuit device described above and a battery connected to the charging node. [Brief explanation of the drawings]

[0007] [Figure 1] 1 shows an example of the configuration of a circuit device according to an embodiment of the present invention and an electronic device including the circuit device. [Figure 2] 10 shows a detailed configuration example of a first charging circuit and a first current source circuit. [Figure 3] 10 shows a detailed configuration example of a second charging circuit and a second current source circuit. [Figure 4] Example parameters for the current source circuit, first charging circuit, and second charging circuit. [Figure 5] FIG. 10 is a diagram for explaining problems that arise when charging is performed by simply switching between the first charging circuit and the second charging circuit without using the method of the present embodiment. [Figure 6] FIG. 10 is a diagram for explaining problems that arise when charging is performed by simply switching between the first charging circuit and the second charging circuit without using the method of the present embodiment. [Figure 7] 10 shows a first example of charge switching control in this embodiment. [Figure 8] 10 shows a second example of charge switching control in the present embodiment. [Figure 9] 10 shows a third example of charge switching control in the present embodiment. [Figure 10] 10 shows a fourth example of charge switching control in the present embodiment. [Figure 11] 10 shows a fifth example of charge switching control in the present embodiment. [Figure 12] 10 shows a sixth example of charge switching control in the present embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] Preferred embodiments of the present disclosure will be described in detail below. Note that the embodiments described below do not unduly limit the scope of the claims, and not all of the configurations described in the embodiments are necessarily essential components.

[0009] 1. Circuit devices and electronic devices FIG. 1 shows an example of the configuration of a circuit device according to this embodiment and an electronic device including the circuit device.

[0010] The electronic device 200 includes a circuit device 100 and a battery 10. The battery 10 is a secondary battery, such as a lithium-ion secondary battery, a nickel-metal hydride battery, or a nickel-cadmium battery. The electronic device 200 may be any device that has the battery 10 built in or to which the battery 10 can be attached. As an example, the electronic device 200 is a smartphone, a tablet terminal, wireless earphones, wireless hearing aids, a smart watch, a digital camera, or a mobile battery. When the electronic device 200 is a smartphone or the like, the electronic device 200 may include a processing device, a storage device, a wireless communication device, a display device, an operation input device, or the like.

[0011] The circuit device 100 charges the battery 10 using an externally supplied power source. The circuit device 100 includes a first charging circuit 110, a second charging circuit 120, a current source circuit 140, a reference voltage generating circuit 150, a control circuit 160, a resistor 170, a backflow prevention circuit 190, and a terminal TBAT. The circuit device 100 is, for example, an integrated circuit device in which a plurality of circuit elements are integrated on a semiconductor substrate.

[0012] The backflow prevention circuit 190 is provided between the output node NCSR of the first charging circuit 110 and the second charging circuit 120 and a charging node NBAT connected to the terminal TBAT. A terminal of the battery 10 is connected to the terminal TBAT. When the control circuit 160 turns on the backflow prevention circuit 190, the first charging current ICH1 from the first charging circuit 110, the second charging current ICH2 from the second charging circuit 120, or the first charging current ICH1 and the second charging current ICH2 are supplied to the charging node NBAT as a charging current IBAT. The charging current IBAT is supplied to the battery 10 from the terminal TBAT, thereby charging the battery 10.

[0013] The backflow prevention circuit 190 includes a P-type transistor TS1, an N-type transistor TS2, and a resistor RS. The source of the P-type transistor TS1 is connected to the charging node NBAT, and its drain is connected to the output node NCSR. The source of the N-type transistor TS2 is connected to the ground node, and its drain is connected to the gate of the P-type transistor TS1. One end of the resistor RS is connected to the charging node NBAT, and the other end is connected to the gate of the P-type transistor TS1. When the control circuit 160 turns off the N-type transistor TS2, the P-type transistor TS1 is also turned off. The P-type transistor TS1 has a parasitic diode whose forward direction is from the output node NCSR to the charging node NBAT. Therefore, when the P-type transistor TS1 is turned off, the backflow prevention circuit 190 prevents backflow from the battery 10 to the first charging circuit 110 and the second charging circuit 120. When charging the battery 10, the control circuit 160 turns on the N-type transistor TS2, which turns on the P-type transistor TS1. The following mainly describes the charging operation when the P-type transistor TS1 of the backflow prevention circuit 190 is on.

[0014] The reference voltage generating circuit 150 generates a reference voltage VREF. The reference voltage generating circuit 150 is, for example, a bandgap reference circuit, but is not limited to this. The reference voltage VREF may be supplied from outside the circuit device 100.

[0015] The register 170 stores the current setting value DIN[10:0]. Here, the current setting value is assumed to be 11-bit data, but the number of bits may be any number. For example, a processor or the like serving as an external host device writes the current setting value DIN[10:0] to the register 170 via an interface circuit (not shown). The host device sets the current value of the charging current IBAT based on, for example, a detection result from a detection circuit (not shown) that detects the battery voltage VBAT. Note that the circuit device 100, rather than the host device, may incorporate a detection circuit (not shown) that detects the battery voltage VBAT and a circuit that sets the current value of the charging current IBAT based on the detection result.

[0016] The control circuit 160 controls the current source circuit 140, the first charging circuit 110, and the second charging circuit 120 so that a charging current IBAT set by the current setting value DIN[10:0] is supplied to the battery 10. The control circuit 160 outputs a first enable signal EN1, a first current source control value DL[10:0], a second enable signal EN2, and a second current source control value DH[10:0] based on the current setting value DIN[10:0]. This allows the control circuit 160 to switch between charging by the first charging circuit 110, charging by the second charging circuit 120, and charging by the first charging circuit 110 and the second charging circuit 120, depending on the current value indicated by the current setting value DIN[10:0]. Here, the number of bits of the first current source control value and the second current source control value is 11 bits, the same as the current setting value, but the number of bits of the first current source control value and the second current source control value may be any number and may be different from the number of bits of the current setting value.

[0017] The current source circuit 140 includes a first current source circuit 141 and a second current source circuit 142. When the first enable signal EN1 is enabled, the first current source circuit 141 generates a first current IS1 set by a first current source control value DL[10:0] based on a reference voltage VREF and supplies the first current IS1 to the first charging circuit 110. When the second enable signal EN2 is enabled, the second current source circuit 142 generates a second current IS2 set by a second current source control value DH[10:0] based on the reference voltage VREF and supplies the second current IS2 to the second charging circuit 120.

[0018] A power supply voltage VIN is supplied to the power supply node NIN. The power supply voltage VIN is supplied, for example, from an external power supply of the circuit device 100. Alternatively, the circuit device 100 may include a power receiving circuit or a voltage conversion circuit (not shown) that receives power from the external power supply and outputs the power supply voltage VIN.

[0019] When the first enable signal EN1 is enabled, the first charging circuit 110 amplifies the first current IS1 by a first amplification factor and flows the amplified current as a first charging current ICH1 from the power supply node NIN to the output node NCSR. The first charging current ICH1 is output to the charging node NBAT as a charging current IBAT.

[0020] When the second enable signal EN2 is enabled, the second charging circuit 120 amplifies the second current IS2 by a second amplification factor and flows the amplified current from the power supply node NIN to the output node NCSR as a second charging current ICH2. The second charging current ICH2 is output to the charging node NBAT as a charging current IBAT. The second amplification factor is greater than the first amplification factor.

[0021] Basically, in the first range where the current setting value DIN[10:0] is low, the first charging circuit 110 outputs the first charging current ICH1 as the charging current IBAT. In the second range where the current setting value DIN[10:0] is high, the second charging circuit 120 outputs the second charging current ICH2 as the charging current IBAT. The current value of the second charging current ICH2 is basically greater than the current value of the first charging current ICH1. In this embodiment, in the range switching between the first and second ranges, the first charging circuit 110 outputs the first charging current ICH1, and the second charging circuit 120 outputs the second charging current ICH2. At this time, the sum of the first charging current ICH1 and the second charging current ICH2 is output as the charging current IBAT. This prevents charging problems caused by the charging current IBAT becoming zero. Note that the current value of the second charging current ICH2 may be smaller than the current value of the first charging current ICH1 within the switching range, etc. Details of the charging control in this embodiment will be described later.

[0022] 2 shows a detailed configuration example of the first charging circuit and the first current source circuit. The first charging circuit 110 includes an operational amplifier OPA1, a P-type transistor TA1, a resistor RCSI1, and a resistor RRSS1.

[0023] The source of P-type transistor TA1 is connected to power supply node NIN, and the drain is connected to node NCS1. Power supply voltage VIN is supplied to power supply node NIN. One end of resistor RCSI1 is connected to node NCS1, and the other end is connected to node NCSI1. One end of resistor RRSS1 is connected to node NCS1, and the other end is connected to output node NCSR. The non-inverting input terminal of operational amplifier OPA1 is connected to node NCSI1, the inverting input terminal is connected to output node NCSR, and the output node is connected to the gate of P-type transistor TA1.

[0024] When the first enable signal EN1 is enabled, the operational amplifier OPA1 is enabled, causing a first charging current ICH1=(RCSI1 / RRSS1)×IS1 to be supplied to the output node NCSR and then supplied to the charging node NBAT as the charging current IBAT.

[0025] The first current source circuit 141 includes an operational amplifier OPB1, a P-type transistor TB1, resistors RC1 to RC11, and N-type transistors TC1 to TC11.

[0026] The source of the P-type transistor TB1 is connected to the node NCSI1, and the drain is connected to the node NS1. A reference voltage VREF is input to the inverting input terminal of the operational amplifier OPB1. The non-inverting input terminal of the operational amplifier OPB1 is connected to the node NS1, and the output node is connected to the gate of the P-type transistor TB1. One end of the resistor RC1 is connected to the node NS1, and the other end is connected to the drain of the N-type transistor TC1. The source of the N-type transistor TC1 is connected to the ground node. Similarly, one end of the resistors RC2 to RC11 is connected to the node NS1, and the other end is connected to the drains of the N-type transistors TC2 to TC11. The sources of the N-type transistors TC2 to TC11 are connected to the ground node. The first bit signal DL[0] of the first current source control value DL[10:0] is input to the gate of the N-type transistor TC1. Similarly, the second to eleventh bit signals DL[1] to DL

[10] of the first current source control value DL[10:0] are input to the gates of the N-type transistors TC2 to TC11.

[0027] When the first enable signal EN1 is enabled, the operational amplifier OPB1 is enabled. This causes the voltage at node NS1 to be VS1=VREF. Resistor RC1 and N-type transistor TC1 are referred to as the first current source of the first current source circuit 141. When the first bit signal DL[0] is 1, N-type transistor TC1 is on, and the first current source passes a current of VREF / RC1. Similarly, resistors RC2 to RC11 and N-type transistors TC2 to TC11 are referred to as the second to eleventh current sources of the first current source circuit 141. When the second to eleventh bit signals DL[1] to DL

[10] are 1, N-type transistors TC2 to TC11 are on, and the second to eleventh current sources pass currents of VREF / RC2 to VREF / RC11. The first current IS1 flowing through the P-type transistor TB1 is the sum of currents flowing from the current sources corresponding to the bit signals that are 1 among the bit signals of the first current source control value DL[10:0].

[0028] When the first enable signal EN1 is disabled, the operational amplifiers OPA1 and OPB1 are disabled, the P-type transistors TA1 and TB1 are turned off, and the first current IS1 and the first charging current ICH1 do not flow.

[0029] 3 shows a detailed configuration example of the second charging circuit and the second current source circuit. The second charging circuit 120 includes an operational amplifier OPA2, a P-type transistor TA2, a resistor RCSI2, and a resistor RRSS2.

[0030] The source of P-type transistor TA2 is connected to power supply node NIN, and the drain is connected to node NCS2. One end of resistor RCSI2 is connected to node NCS2, and the other end is connected to node NCSI2. One end of resistor RRSS2 is connected to node NCS2, and the other end is connected to output node NCSR. The non-inverting input terminal of operational amplifier OPA2 is connected to node NCSI2, the inverting input terminal is connected to output node NCSR, and the output node is connected to the gate of P-type transistor TA2.

[0031] When the second enable signal EN2 is enabled, the operational amplifier OPA2 is enabled, causing a second charging current ICH2=(RCSI2 / RRSS2)×IS2 to be supplied to the output node NCSR and then supplied to the charging node NBAT as the charging current IBAT.

[0032] The second current source circuit 142 includes an operational amplifier OPB2, a P-type transistor TB2, resistors RD1 to RD11, and N-type transistors TD1 to TD11.

[0033] The source of the P-type transistor TB2 is connected to node NCSI2, and the drain is connected to node NS2. A reference voltage VREF is input to the inverting input terminal of the operational amplifier OPB2. The non-inverting input terminal of the operational amplifier OPB2 is connected to node NS2, and the output node is connected to the gate of the P-type transistor TB2. One end of the resistor RD1 is connected to node NS2, and the other end is connected to the drain of the N-type transistor TD1. The source of the N-type transistor TD1 is connected to the ground node. Similarly, one end of the resistors RD2 to RD11 is connected to node NS2, and the other end is connected to the drains of the N-type transistors TD2 to TD11. The sources of the N-type transistors TD2 to TD11 are connected to the ground node. The first bit signal DH[0] of the second current source control value DH[10:0] is input to the gate of the N-type transistor TD1. Similarly, the second to eleventh bit signals DH[1] to DH

[10] of the second current source control value DH[10:0] are input to the gates of the N-type transistors TD2 to TD11.

[0034] When the second enable signal EN2 is enabled, the operational amplifier OPB2 is enabled. This causes the voltage at node NS2 to become VS2=VREF. The resistor RD1 and N-type transistor TD1 are referred to as the first current source of the second current source circuit 142. When the first bit signal DH[0] is 1, the N-type transistor TD1 is on, and the first current source passes a current of VREF / RD1. Similarly, the resistors RD2 to RD11 and the N-type transistors TD2 to TD11 are referred to as the second to eleventh current sources of the second current source circuit 142. When the second to eleventh bit signals DH[1] to DH

[10] are 1, the N-type transistors TD2 to TD11 are on, and the second to eleventh current sources pass currents of VREF / RD2 to VREF / RD11. The second current IS2 flowing through the P-type transistor TB2 is the sum of the currents flowing from the current sources corresponding to the bit signals that are 1 among the bit signals of the second current source control value DH[10:0].

[0035] When the second enable signal EN2 is disabled, the operational amplifiers OPA2 and OPB2 are disabled, the P-type transistors TA2 and TB2 are turned off, and the second current IS2 and the second charging current ICH2 do not flow.

[0036] Figure 4 shows example parameters for the current source circuit, first charging circuit, and second charging circuit. Note that the parameters are not limited to those shown in Figure 4. Furthermore, the parameters shown in Figure 4 are ideal values ​​that do not take into account manufacturing variations, etc., and in reality, there may be errors due to manufacturing variations, etc.

[0037] As shown in the upper diagram, the resolution of the first current IS1, that is, the current that flows through resistor RC1 when N-type transistor TC1 is turned on in first current source circuit 141, is VREF / RC1. Here, VREF / RC1 = 0.244 μA. The resistance ratio of resistors RC1 to RC11 is binary weighted. That is, RC11:RC10:···:RC1 = 1:2:···:1024. The first current IS1 changes linearly in 0.244 μA steps according to the first current source control value DL[10:0].

[0038] The first charging circuit 110 amplifies the first current IS1 by a first amplification factor RCSI1 / RRSS1. Here, RCSI1 / RRSS1 = 21.9. The first charging current ICH1 is calculated as follows: ICH1 = IS1 resolution × first amplification factor × DL[10:0] = 42.7 μA × DL[10:0] / 8. The control circuit 160 shifts the current setting value DIN[10:0] three bits to the most significant side to set the first current source control value DL[10:0]. That is, DL[10:0] / 8 = DIN[10:0], and the step of the first charging current ICH1 relative to the LSB of the current setting value DIN[10:0] is 42.7 μA. While DL[10:0] / 8 = DIN[10:0] is the general rule, this is not always true. A detailed example will be described later.

[0039] As shown in the lower diagram, the resolution of the second current IS2, that is, the current that flows through resistor RD1 when N-type transistor TD1 is turned on in second current source circuit 142, is VREF / RD1. Here, it is assumed that VREF / RD1 = VREF / RC1 = 0.244 μA. The resistance ratio of resistors RD1 to RD11 is binary weighted. That is, RD11:RD10:···:RD1 = 1:2:···:1024. The second current IS2 changes linearly in 0.244 μA steps according to the second current source control value DH[10:0].

[0040] The second charging circuit 120 amplifies the second current IS2 by a second amplification factor RCSI2 / RRSS2. Here, RCSI2 / RRSS2 = (RCSI1 / RRSS1) × 8 = 175. The second charging current ICH2 is calculated as follows: ICH2 = IS2 resolution × second amplification factor × DH[10:0] = 42.7 μA × DH[10:0]. The control circuit 160 sets the current setting value DIN[10:0] to the second current source control value DH[10:0] without bit-shifting. That is, DH[10:0] = DIN[10:0], and the step of the second charging current ICH2 relative to the LSB of the current setting value DIN[10:0] is 42.7 μA. While DH[10:0] = DIN[10:0] is the general rule, this is not always true. A detailed example will be described later.

[0041] As described above, both the first charging current ICH1 and the second charging current ICH2 change in 42.7 μA steps relative to the LSB of the current setting value DIN[10:0]. That is, the charging current IBAT changes linearly in 42.7 μA steps relative to the LSB of the current setting value DIN[10:0].

[0042] Although the example in which the control circuit 160 multiplies the current setting value DIN[10:0] by 8 to obtain the first current source control value DL[10:0] has been described, the present invention is not limited to this. The control circuit 160 may also multiply the current setting value DIN[10:0] by r to obtain the first current source control value DL[10:0], where r is a real number greater than 1. This makes the steps of the first charging current ICH1 and the second charging current ICH2 with respect to the LSB of the current setting value DIN[10:0] the same.

[0043] 2. Method for switching between the first and second charging circuits The following describes a method for switching between charging by the first charging circuit 110 and charging by the second charging circuit 120. Note that a high level of the first enable signal EN1 and the second enable signal EN2 indicates enable, and a low level indicates disable. However, a low level may correspond to enable, and a high level to disable. In the following, an example is described in which the boundary for switching is DIN[10:0]=256, but the boundary for switching may be arbitrary. In the following, an example is described in which the current setting value DIN[10:0] is increased, but if it is decreased, the control described below may be performed in reverse order.

[0044] First, problems that arise when charging by simply switching between the first charging circuit and the second charging circuit without using the method of this embodiment, which will be described later, will be explained using Figures 5 and 6. In the following, it is assumed that the current setting value DIN[10:0] is incremented at regular intervals, but the way in which the current setting value DIN[10:0] is changed is not limited to this.

[0045] As shown in the upper diagram of FIG. 5, when the current setting value DIN[10:0] is between 0 and 255, the control circuit 160 outputs a first enable signal EN1 (enable), a second enable signal EN2 (disable), a first current source control value DL[10:0]=8×DIN[10:0], and a second current source control value DH[10:0]=0. The "×8" represents a 3-bit shift to the upper side. As shown in the lower diagram, the charging current supplied to the battery 10 is IBAT=ICH1.

[0046] As shown in the upper diagram, when the current setting value DIN[10:0] is between 256 and 2047, the control circuit 160 outputs a first enable signal EN1 that is disabled, a second enable signal EN2 that is enabled, a first current source control value DL[10:0]=0, and a second current source control value DH[10:0]=DIN[10:0]. As shown in the lower diagram, the charging current supplied to the battery 10 is IBAT=ICH2.

[0047] When the current setting value DIN[10:0] is incremented at regular intervals, the horizontal axis of the graph can also be considered the time axis. Figure 5 shows a case where the second charging current ICH2 is output instantly when the second enable signal EN2 changes from disabled to enabled. In this case, as shown in the lower diagram of Figure 5, when the current setting value DIN[10:0] switches from 255 to 256, IBAT=ICH1 or IBAT=ICH2 is always output, so there is no drop in the charging current IBAT supplied to the battery 10.

[0048] Figure 6 shows a case where a delay occurs in the start of output of the second charging current ICH2 when the second enable signal EN2 changes from disabled to enabled. To output the second charging current ICH2 for high charging, it is necessary to increase the gate width of the P-type transistor TA2 in Figure 3 and reduce its resistance. This increases the gate capacitance of the P-type transistor TA2, causing a delay between when the second enable signal EN2 becomes enabled and when the operational amplifier OPA2 drives the gate of the P-type transistor TA2 to turn it on.

[0049] As shown in the upper diagram, if the horizontal axis of the graph is considered the time axis, the delay causes the rise of the second charging current ICH2 to become blunt. Therefore, as shown in the lower diagram, when the current setting value DIN[10:0] switches from 255 to 256, there is a delay between when IBAT=ICH1 becomes zero and when IBAT=ICH2 rises, causing a drop in the charging current IBAT supplied to the battery 10. This drop in charging current IBAT may cause problems with charging the battery 10. For example, the battery protection circuit of the secondary battery may interpret the drop in charging current IBAT as a sign that charging has been stopped, and may actually stop charging.

[0050] FIG. 7 shows a first example of charge switching control in this embodiment. The range of the current setting value DIN[10:0] from 0 to 254 inclusive and the first 255 is defined as the first range RG1, the second and subsequent 255s are defined as the switching range RGS, and the range of 256 to 2047 inclusive is defined as the second range RG2. Note that although the switching range RGS is described as a "range" here, it can also be considered as a "switch" between the first range RG1 and the second range RG2 rather than a range. That is, the first range RG1 is from 0 to 255, and the second range RG2 is from 256 to 2047 inclusive, and the control at the "switch" between them is described below as control within the switching range RGS. This also applies to FIGS. 8 to 10.

[0051] As shown in the upper diagram, in the first range RG1, the control circuit 160 outputs a first enable signal EN1 of enable, a second enable signal EN2 of disable, a first current source control value DL[10:0]=8×DIN[10:0], and a second current source control value DH[10:0]=0. In the second range RG2, the control circuit 160 outputs a first enable signal EN1 of disable, a second enable signal EN2 of enable, a first current source control value DL[10:0]=0, and a second current source control value DH[10:0]=DIN[10:0]. Immediately after the current setting value DIN[10:0] changes from 254 to 255, the control circuit 160 outputs EN1=enable, EN2=disable, DL[10:0]=8×255=2040, and DH[10:0]=0. Here, this state is included in the first range RG1.

[0052] In the switching range RGS after the current setting value DIN[10:0] changes from 254 to 255, the control circuit 160 outputs EN1 = EN2 = enable, DL[10:0] = 8 × 256 × (½) = 1024, and DH[10:0] = 255 × (½) ≈ 127. The EN1 = EN2 = enable states may be implemented when a predetermined time has elapsed after DIN[10:0] changes from 254 to 255, or may be implemented at a predetermined time immediately before DIN[10:0] changes from 255 to 256. Alternatively, EN1 = EN2 = enable, DH[10:0] = 127, and DL[10:0] = 1024 may be implemented immediately after DIN[10:0] changes from 254 to 255. 7, there may be no states where DH[10:0]=0 and DL[10:0]=2040 corresponding to the first 255 in DIN[10:0]. In this case, the first range RG1 is the range where DIN[10:0] is equal to or greater than 0 and equal to or less than 254, the switching range RGS is DIN[10:0]=255, and the second range RG2 is the range where DIN[10:0] is equal to or greater than 256 and equal to or less than 2047.

[0053] As shown in the upper and lower diagrams, when EN1 and EN2 are enabled, the first current source control value DL[10:0] and the second current source control value DH[10:0] are set so that the sum of the first charging current ICH1 and the second charging current ICH2 is equal to the charging current IBAT corresponding to the current setting value DIN[10:0] = 255. In the example of FIG. 7, ICH1 = ICH2 = IBAT × (½). As a result, the change in the second charging current ICH2 is at most IBAT × (½). Therefore, even if a delay occurs, the drop in the charging current IBAT is at most ½. In this way, by enabling both the first charging circuit 110 and the second charging circuit 120 in the switching range RGS, the drop in the charging current IBAT is reduced, reducing the possibility of charging problems with the battery 10.

[0054] The switching range RGS may be multiple values ​​rather than a single value. For example, DIN[10:0] = 255, 256 may be the switching range RGS, and DIN[10:0] ≧ 257 may be the second range RG2. For example, the control in the first range RG1, the second range RG2, and DIN[10:0] = 255 is as described above. When DIN[10:0] = 256, the control circuit 160 outputs EN1 = EN2 = enable, DL[10:0] = 8 × 256 × (½) = 1024, and DH[10:0] = 256 × (½) = 128.

[0055] 8 shows a second example of charge switching control in this embodiment. The definitions of the first range RG1, the second range RG2, and the switching range RGS are the same as in the first example. In addition, the control in the first range RG1 and the second range RG2 is the same as in the first example.

[0056] In the switching range RGS after the current setting value DIN[10:0] changes from 254 to 255, the control circuit 160 outputs EN1=enable, EN2=disable, DL[10:0]=8×255=2040, and DH[10:0]=0. Then, the control circuit 160 outputs EN1=EN2=enable. At this time, the control circuit 160 outputs DL[10:0]=8×256×(3 / 4)=1536 and DH[10:0]=255×(1 / 4)≒63. Next, the control circuit 160 outputs DL[10:0]=8×256×(2 / 4)=1024 and DH[10:0]=255×(2 / 4)≒127. Next, the control circuit 160 outputs DL[10:0]=8×256×(¼)=512, and DH[10:0]=255×(¾)≈191.

[0057] In the second example, within the switching range RGS, the change in the second charging current ICH2 is at most IBAT × (1 / 4), so even if a delay occurs, the drop in the charging current IBAT is at most 1 / 4. Note that immediately after DIN[10:0] changes from 254 to 255, EN1 = EN2 = enable, DH[10:0] = 63, and DL[10:0] = 1536 may occur. In other words, in Figure 8, the state of DH[10:0] = 0 and DL[10:0] = 2040 corresponding to the first 255 in DIN[10:0] may not occur.

[0058] 9 shows a third example of charge switching control in this embodiment. The definitions of the first range RG1, the second range RG2, and the switching range RGS are the same as in the first example. In addition, the control in the first range RG1 and the second range RG2 is the same as in the first example.

[0059] In the switching range RGS after the current setting value DIN[10:0] changes from 254 to 255, the control circuit 160 outputs EN1 = EN2 = enable. At this time, the control circuit 160 outputs DL[10:0] = 8 × 256 × (1 / 2) = 1024, DH[10:0] = 255 × (1 / 2) ≈ 127. Next, the control circuit 160 outputs DL[10:0] = 8 × 256 × (3 / 8) = 768, DH[10:0] = 255 × (5 / 8) ≈ 159. Next, the control circuit 160 outputs DL[10:0] = 8 × 256 × (2 / 8) = 512, DH[10:0] = 255 × (6 / 8) ≈ 191. Next, the control circuit 160 outputs DL[10:0]=8×256×(1 / 8)=256, DH[10:0]=255×(7 / 8)≈223.

[0060] In the third example, the change in the second charging current ICH2 within the switching range RGS is at most IBAT × (1 / 2). Therefore, even if a delay occurs, the drop in the charging current IBAT is at most 1 / 2. Also, while the 1 / 2 drop occurred twice in the first example, it occurs only once in the third example. The second drop is dispersed into four 1 / 8 drops. Note that immediately after DIN[10:0] changes from 254 to 255, EN1 and EN2 may be enabled, DH[10:0] = 127, and DL[10:0] = 1024. In other words, in Figure 9, the state of DH[10:0] = 0 and DL[10:0] = 2040 corresponding to the first 255 in DIN[10:0] may not occur.

[0061] 10 shows a fourth example of charge switching control in this embodiment. The definitions of the first range RG1, the second range RG2, and the switching range RGS are the same as in the first example. In addition, the control in the first range RG1 is the same as in the first example.

[0062] In the switching range RGS after the current setting value DIN[10:0] changes from 254 to 255, the control circuit 160 outputs EN1 = EN2 = enable, DL[10:0] = 8 × 256 × (1 / 2) = 1024, and DH[10:0] = 255 × (1 / 2) ≒ 127.

[0063] In the fourth example, in the second range RG2, the control circuit 160 maintains EN1=EN2=enable and DL[10:0]=8×256×(½)=1024. The control circuit 160 also outputs DH[10:0]=DIN[10:0]−256×(½). The second charging current ICH2, which corresponds to −256×(½) of DH[10:0], is supplemented by the first charging current ICH1 from DL[10:0], so the overall charging current IBAT becomes a current value corresponding to the current setting value DIN[10:0].

[0064] In the fourth example, the change in the second charging current ICH2 within the switching range RGS is at most IBAT × (1 / 2). Therefore, even if a delay occurs, the drop in the charging current IBAT is at most 1 / 2. Furthermore, while the drop of 1 / 2 occurred twice in the first example, it occurs only once in the fourth example. By outputting the first charging current ICH1 at a constant value even within the second range RG2, the second charging current ICH2 changes significantly only once, thereby limiting the drop in the charging current IBAT to just one. Note that immediately after DIN[10:0] changes from 254 to 255, EN1 and EN2 may be enabled, DH[10:0] = 127, and DL[10:0] = 1024. In other words, in Figure 10, the state of DH[10:0] = 0 and DL[10:0] = 2040 corresponding to the first 255 in DIN[10:0] may not occur.

[0065] 11 shows a fifth example of charge switching control in this embodiment. The range of the current setting value DIN[10:0] from 0 to 127 is defined as the first range RG1, the switching range RGS is defined as 1, and the range of 129 to 2047 is defined as the second range RG2. Control in the first range RG1 is the same as in the first example.

[0066] The operation in the switching range RGS is as follows. When the current setting value DIN[10:0] is 128, the control circuit 160 outputs EN1=EN2=enable, DL[10:0]=8×127=1016, and DH[10:0]=DIN[10:0]−127. Similarly, in the second range RG2, the control circuit 160 outputs EN1=EN2=enable, DL[10:0]=8×127=1016, and DH[10:0]=DIN[10:0]−127. Note that “127” is the maximum value of the current setting value DIN[10:0] in the first range RG1.

[0067] In the fifth example, in the switching range RGS and the second range RG2, the control circuit 160 maintains EN1=EN2=enable, DL[10:0]=8×127=1016, and outputs DH[10:0]=DIN[10:0]-127. The second charging current ICH2, which corresponds to DH[10:0]'s "-127," is supplemented by the first charging current ICH1 from DL[10:0], so the overall charging current IBAT becomes a current value corresponding to the current setting value DIN[10:0].

[0068] In the fifth example, since there is no large change in the second charging current ICH2 within the switching range RGS, no drop in the charging current IBAT occurs regardless of whether there is a delay or not.

[0069] Fig. 12 shows a sixth example of charge switching control in this embodiment. This example is similar to the control in Fig. 5 and Fig. 6, but the switching timing of the first enable signal EN1 and the second enable signal EN2 is made different.

[0070] Specifically, when the first current source control value DL[10:0] changes from 255 to 256, the control circuit 160 changes the second enable signal EN2 from disabled to enabled, and after a predetermined time Δt has elapsed, changes the first enable signal EN1 from enabled to disabled. As a result, the first charging current ICH1 falls after the second charging current ICH2 begins to rise, so the charging current IBAT does not become zero and the drop in charging current IBAT is reduced compared to Figure 6. The predetermined time Δt is set, for example, by circuit simulation, so that the change in charging current IBAT during switching is small.

[0071] In this embodiment, the circuit device 100 includes a current source circuit 140, a first charging circuit 110, a second charging circuit 120, and a control circuit 160. The first charging circuit 110 supplies a constant first charging current ICH1 as a charging current IBAT to a charging node NBAT based on the current from the current source circuit 140. The second charging circuit 120 supplies a constant second charging current ICH2 as a charging current IBAT to the charging node NBAT based on the current from the current source circuit 140. The control circuit 160 sets the current values ​​of the first charging current ICH1 and the second charging current ICH2 based on a current setting value DIN[10:0] that sets the current value of the charging current IBAT. When the current setting value DIN[10:0] is within a first range RG1, the first charging circuit 110 supplies the first charging current ICH1 to the charging node NBAT. When the current setting value DIN[10:0] is in a second range RG2 that is higher than the first range RG1, the second charging circuit 120 supplies a second charging current ICH2 to the charging node NBAT. When switching between the first range RG1 and the second range RG2, the first charging circuit 110 supplies the first charging current ICH1 to the charging node NBAT, and the second charging circuit 120 supplies the second charging current ICH2 to the charging node NBAT.

[0072] According to this embodiment, when switching between the first range RG1 and the second range RG2, both the first charging current ICH1 and the second charging current ICH2 are supplied to the battery 10, so even if one of the charging currents is not supplied due to a delay in the rising edge, the other charging current is supplied. This prevents the charging current IBAT to the battery 10 from dropping to zero, reducing the possibility of charging malfunctions.

[0073] Note that "switching between the first and second ranges of the current setting value" corresponds to the switching range RGS in Figures 7 to 11, and more specifically, corresponds to when the first enable signal EN1 and the second enable signal EN2 are enabled within the switching range RGS. In the second range RG2, at least the second charging circuit 120 supplies the second charging current ICH2 to the charging node NBAT, but the first charging circuit 110 may also supply the first charging current ICH1 to the charging node NBAT. For example, in the second range RG2, only the second charging circuit 120 performs charging in Figures 7 to 9, and both the first charging circuit 110 and the second charging circuit 120 perform charging in Figures 10 and 11.

[0074] In this embodiment, at the time of switching, the first charging circuit 110 may supply a first charging current ICH1 that is smaller than the current value indicated by the current setting value DIN[10:0] to the charging node NBAT, and the second charging circuit 120 may supply a second charging current ICH2 that is smaller than the current value indicated by the current setting value DIN[10:0] to the charging node NBAT.

[0075] In this embodiment, at the time of switching, the sum of the first charging current ICH1 and the second charging current ICH2 may be the current value indicated by the current setting value DIN[10:0].

[0076] According to this embodiment, when switching between the first range RG1 and the second range RG2, both the first charging current ICH1 and the second charging current ICH2 are supplied to the battery 10, and their sum is the current value indicated by the current setting value DIN[10:0]. As a result, even when switching, an appropriate charging current IBAT corresponding to the current setting value DIN[10:0] is supplied to the battery 10.

[0077] Furthermore, as described in Figures 7 to 9, when the current setting value DIN[10:0] switches from the first range RG1 to the second range RG2, the first charging circuit 110 may gradually decrease the first charging current ICH1, and the second charging circuit 120 may gradually increase the second charging current ICH2.

[0078] When switching from the first range RG1 to the second range RG2, there is a possibility that the rise of the second charging current ICH2 is delayed, causing the charging current IBAT to drop. According to this embodiment, by increasing the second charging current ICH2 in stages, the amount of increase in each stage is smaller than if the second charging current ICH2 were to rise all at once. This reduces the drop in the charging current IBAT.

[0079] In addition, in this embodiment, when the current setting value DIN[10:0] switches from the second range RG2 to the first range RG1, the first charging circuit 110 may increase the first charging current ICH1 in a stepwise manner, and the second charging circuit 120 may decrease the second charging current ICH2 in a stepwise manner.

[0080] When switching from the second range RG2 to the first range RG1, there is a possibility that the rise of the first charging current ICH1 is delayed, causing the charging current IBAT to drop. According to this embodiment, by increasing the first charging current ICH1 in stages, the amount of increase in each stage is smaller than if the first charging current ICH1 were to rise all at once. This reduces the drop in the charging current IBAT.

[0081] Also, as described in Figure 9, when the first charging circuit 110 and the second charging circuit 120 switch the current setting value DIN[10:0] from the first range RG1 to the second range RG2, the increase in the second and subsequent stages may be smaller than the increase in the first stage when the first charging circuit 110 and the second charging circuit 120 increase the second charging current ICH2 in stages.

[0082] For example, as shown in Figure 7, when the second charging circuit 120 increases the second charging current ICH2 by half in two stages, the charging current IBAT drops twice by about half. According to this embodiment, the second and subsequent drops in the charging current IBAT are distributed into relatively small drops. This reduces the relatively large drop to a single drop.

[0083] 7 to 9, the control circuit 160 may enable the first charging circuit 110 and disable the second charging circuit 120 in the first range RG1. The control circuit 160 may disable the first charging circuit 110 and enable the second charging circuit 120 in the second range RG2. The control circuit 160 may enable the first charging circuit 110 and the second charging circuit 120 when switching.

[0084] According to this embodiment, in the first range RG1, only the first charging circuit 110 supplies the charging current IBAT, and in the second range RG2, only the second charging circuit 120 supplies the charging current IBAT. Then, at the time of switching, the first charging circuit 110 and the second charging circuit 120 supply the charging current IBAT, thereby reducing the drop in the charging current IBAT as described above.

[0085] As described with reference to FIGS. 10 and 11, the first charging circuit 110 may supply, in the second range RG2, a constant first charging current ICH1 having the same current value as the first charging current ICH1 at the time of switching to the charging node NBAT.

[0086] In the second range RG2, the sum of the first charging current ICH1 and the second charging current ICH2 may be the current value indicated by the current setting value DIN[10:0].

[0087] In addition, in the first range RG1, the control circuit 160 may enable the first charging circuit 110 and disable the second charging circuit 120. In the second range RG2 and switching, the control circuit 160 may enable the first charging circuit 110 and the second charging circuit 120.

[0088] For example, as shown in FIG. 7, if the first charging current ICH1 is reduced when the battery enters the second range RG2, the second charging current ICH2 must be increased accordingly, resulting in a drop in the charging current IBAT. According to this embodiment, the first charging current ICH1 is kept constant when the battery enters the second range RG2, eliminating the need to increase the second charging current ICH2 accordingly. This reduces the number of drops in the charging current IBAT. For example, there is one drop in FIG. 10, and zero drops in FIG. 11.

[0089] Furthermore, in this embodiment, the current source circuit 140 may include a first current source circuit 141 that supplies a first current IS1 to the first charging circuit 110, and a second current source circuit 142 that supplies a second current IS2 to the second charging circuit 120. The first charging circuit 110 may supply a first charging current ICH1 to the charging node NBAT by amplifying the first current IS1 by a first amplification factor. The second charging circuit 120 may supply a second charging current ICH2 to the charging node NBAT by amplifying the second current IS2 by a second amplification factor that is greater than the first amplification factor.

[0090] According to this embodiment, by providing the first current source circuit 141 and the second current source circuit 142, both the first charging circuit 110 and the second charging circuit 120 can output charging currents during switching. Furthermore, by dividing the charging circuit into the first current source circuit 141 and the first charging circuit 110 for low charging and the second current source circuit 142 and the second charging circuit 120 for high charging, it is possible to configure circuits optimized for low charging and high charging. For example, if a common charging circuit is used to achieve low charging and high charging, the current source circuit must generate currents ranging from very small to very large. This makes designing the current source circuit difficult due to limitations in the minimum size of transistors, etc. Alternatively, because each step of the current output by the current source circuit is very small, amplifying it to generate a charging current may be susceptible to the effects of the amplifier circuit offset, etc., and may result in inaccurate amplification. According to this embodiment, by dividing the current source circuit into low charging and high charging, it is possible to narrow the range of currents generated by the current source circuit. Furthermore, since the current output by the current source circuit can be increased by one step, it can be amplified accurately when it is amplified to produce a charging current.

[0091] Although the present embodiment has been described in detail above, those skilled in the art will readily understand that many modifications are possible without substantially departing from the novel features and advantages of the present disclosure. Therefore, all such modifications are intended to be within the scope of the present disclosure. For example, a term described at least once in the specification or drawings with a different term having a broader or equivalent meaning may be replaced with that different term anywhere in the specification or drawings. Furthermore, all combinations of the present embodiment and modifications are also within the scope of the present disclosure. Furthermore, the configurations and operations of the current source circuit, first charging circuit, second charging circuit, control circuit, reference voltage generating circuit, circuit device, and electronic device are not limited to those described in the present embodiment, and various modifications are possible. [Explanation of symbols]

[0092] 10...battery, 100...circuit device, 110...first charging circuit, 120...second charging circuit, 140...current source circuit, 141...first current source circuit, 142...second current source circuit, 150...reference voltage generation circuit, 160...control circuit, 170...resistor, 190...backflow prevention circuit, 200...electronic device, DH[10:0]...second current source control value, DIN[10:0]...current setting value, DL[10:0]...first current source control value, EN1...first enable signal, EN2...second enable signal, IBAT...charging current, ICH1...first charging current, ICH2...second charging current, IS1...first current, IS2...second current, NBAT...charging node, RG1...first range, RG2...second range, RGS...switching range, VBAT...battery voltage, VIN...power supply voltage, VREF...reference voltage

Claims

1. a current source circuit; a first charging circuit that supplies a first constant charging current to a charging node based on the current from the current source circuit; a second charging circuit that supplies a second constant charging current as the charging current to the charging node based on the current from the current source circuit; a control circuit that sets the current value of the first charging current and the current value of the second charging current based on a current setting value that sets the current value of the charging current; Including, When the current setpoint is in a first range, the first charging circuit supplies the first charging current to the charging node; When the current setting value is in a second range that is higher than the first range, the second charging circuit supplies the second charging current to the charging node; A circuit device characterized in that, when the current setting value switches between the first range and the second range, the first charging circuit supplies the first charging current to the charging node and the second charging circuit supplies the second charging current to the charging node.

2. 2. The circuit device according to claim 1, In the switching, the first charging circuit supplies the first charging current, which is smaller than the current value indicated by the current setting value, to the charging node, and the second charging circuit supplies the second charging current, which is smaller than the current value indicated by the current setting value, to the charging node.

3. 3. The circuit device according to claim 2, The circuit device according to claim 1, wherein, during the switching, the sum of the first charging current and the second charging current is a current value indicated by the current setting value.

4. 2. The circuit device according to claim 1, A circuit device characterized in that, when the current setting value switches from the first range to the second range, the first charging circuit reduces the first charging current stepwise and the second charging circuit increases the second charging current stepwise.

5. 2. The circuit device according to claim 1, A circuit device characterized in that, when the current setting value switches from the second range to the first range, the first charging circuit increases the first charging current in a stepwise manner and the second charging circuit decreases the second charging current in a stepwise manner.

6. 5. The circuit device according to claim 4, A circuit device characterized in that, when the second charging circuit increases the second charging current in stages during the switching of the current setting value from the first range to the second range, the increase in the second and subsequent stages is smaller than the increase in the first stage.

7. 5. The circuit device according to claim 4, The control circuit In the first range, the first charging circuit is enabled and the second charging circuit is disabled; In the second range, the first charging circuit is disabled and the second charging circuit is enabled; In the switching, the first charging circuit and the second charging circuit are enabled.

8. 2. The circuit device according to claim 1, The circuit device is characterized in that the first charging circuit supplies the first charging current, which is constant in the second range and has the same current value as the first charging current at the time of switching, to the charging node.

9. 9. The circuit device according to claim 8, In the second range, the sum of the first charging current and the second charging current is a current value indicated by the current setting value.

10. 9. The circuit device according to claim 8, The control circuit In the first range, the first charging circuit is enabled and the second charging circuit is disabled; A circuit device, characterized in that, in the second range and at the switching, the first charging circuit and the second charging circuit are set to be enabled.

11. 2. The circuit device according to claim 1, The current source circuit comprises: a first current source circuit that supplies a first current to the first charging circuit; a second current source circuit that supplies a second current to the second charging circuit; Including, the first charging circuit amplifies the first current by a first amplification factor to supply the first charging current to the charging node; The second charging circuit supplies the second charging current to the charging node by amplifying the second current by a second amplification factor that is greater than the first amplification factor.

12. A circuit arrangement according to any one of claims 1 to 11; a battery connected to the charging node; 1. An electronic device comprising:

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