Device and method for bonding semiconductor wafer

Abstract

To provide a device and a method for bonding semiconductor wafers which prevent misalignment of semiconductor wafers in bonding the semiconductor wafers together during semiconductor manufacturing processes, with a simple configuration.SOLUTION: A pair of electrostatic chuck 80 uses a hyperbolic type including a plurality of internal electrodes 90 adjacent to each other, applies, to the adjacent internal electrodes, reverse polarity voltages with absolute values of magnitudes of polarity different from each other, and thereby generating a potential difference while a semiconductor wafer W1 held by one electrostatic chuck 80A and a semiconductor wafer W2 held by another electrostatic chuck 80B have reverse polarities, so that the semiconductor wafers W1, W2 facing each other mutually attract due to Van der Waals forces and Coulomb forces to be bonded without mutual misalignment.SELECTED DRAWING: Figure 12

Description

[Technical Field]

[0001] The present invention relates to a semiconductor wafer bonding apparatus and method for bonding semiconductor wafers together in, for example, a semiconductor manufacturing process. [Background technology]

[0002] Hybrid bonding, which is part of a conventional semiconductor manufacturing process, includes, for example, a plasma treatment step, a cleaning step, a drying step, and a bonding step.

[0003] For example, in the plasma treatment process, atmospheric pressure plasma or vacuum plasma is applied to the semiconductor wafer to activate the surface of the semiconductor wafer. In the cleaning process, for example, a cleaning liquid (pure water or chemical liquid) is dropped onto the semiconductor wafer while the semiconductor wafer is rotated around its central axis to clean the surface of the semiconductor wafer. In the drying process, centrifugal force is used to disperse water droplets from the surface of the semiconductor wafer while the semiconductor wafer is rotated at high speed around its central axis. In the bonding process, two semiconductor wafers, one above the other and one below the other that have undergone the plasma treatment process and the drying process, are placed face to face and bonded together using a bonding device.

[0004] In conventional bonding devices, semiconductor wafers are placed on planar stages arranged opposite each other, and the center of one of the pair of opposing semiconductor wafers is pressed with a center push pin (rod), thereby bonding the semiconductor wafers together (see Patent Document 1).

[0005] However, in the process of pressing the semiconductor wafer with the rod, stress concentration acts on the semiconductor wafer, causing the semiconductor wafer to bend, resulting in a technical problem of deterioration in the quality of the semiconductor wafer. In particular, because SiC wafers are hard and brittle, fatal quality degradation can occur when the SiC wafer bends.

[0006] The SiC wafer refers to a compound semiconductor material made of silicon (Si) and carbon (C).

[0007] On the other hand, in the bonding process, for example, if a repulsive force occurs between one semiconductor wafer and the other semiconductor wafer, a positional deviation occurs when the two are bonded, which causes a problem of reduced bonding accuracy between the semiconductor wafers. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Patent No. 7148197 Summary of the Invention [Problem to be solved by the invention]

[0009] In view of the above, an object of the present invention is to provide a wafer bonding apparatus and a wafer bonding method that have a simple configuration and that prevent misalignment when semiconductor wafers are bonded together in a semiconductor manufacturing process. [Means for solving the problem]

[0010] A first invention is a semiconductor wafer bonding device that arranges a pair of electrostatic chucks at positions facing each other on a stage that supports semiconductor wafers, and bonds the facing semiconductor wafers together while the semiconductor wafers are attracted to the electrostatic chucks.

[0011] The second invention is a semiconductor wafer bonding device that arranges a pair of electrostatic chucks at positions facing each other on a stage that supports semiconductor wafers, and bonds the facing semiconductor wafers together while the semiconductor wafers are attracted to the electrostatic chucks. The electrostatic chucks are hyperbolic to which positive and negative voltages of different magnitudes can be applied, and the facing semiconductor wafers are bonded together while the facing semiconductor wafers have opposite polarities.

[0012] A third invention is a semiconductor wafer bonding device that arranges a pair of electrostatic chucks at positions facing each other on a stage that supports semiconductor wafers, and bonds the facing semiconductor wafers together while the semiconductor wafers are attracted to the electrostatic chucks, wherein one of the electrostatic chucks is a bipolar type having a plurality of internal electrodes adjacent to each other, and voltages of opposite polarities, the absolute values ​​of which are different from each other, are applied to the adjacent internal electrodes, and the other electrostatic chuck is a bipolar type having a plurality of internal electrodes adjacent to each other, and voltages of opposite polarities, the absolute values ​​of which are different from each other, are applied to the adjacent internal electrodes, and a voltage of opposite polarity is applied to the internal electrodes of one of the electrostatic chucks arranged opposite to each other, and the semiconductor wafers are bonded together while the semiconductor wafer held by one electrostatic chuck and the semiconductor wafer held by the other electrostatic chuck have opposite polarities.

[0013] A fourth invention is a method for bonding semiconductor wafers, comprising: arranging a pair of electrostatic chucks at positions facing each other on a stage supporting semiconductor wafers; and bonding the semiconductor wafers facing each other while the semiconductor wafers are attracted to the electrostatic chucks.

[0014] A fifth invention is a method for bonding semiconductor wafers, in which a pair of electrostatic chucks are arranged in positions facing each other on a stage that supports the semiconductor wafers, and the facing semiconductor wafers are bonded together while the semiconductor wafers are attracted to the electrostatic chucks, wherein the electrostatic chucks are hyperbolic chucks to which positive and negative voltages of different magnitudes can be applied, and the facing semiconductor wafers are bonded together while the facing semiconductor wafers have opposite polarities.

[0015] A sixth invention is a method for bonding semiconductor wafers, comprising arranging a pair of electrostatic chucks at positions facing each other on a stage supporting the semiconductor wafers, and bonding the semiconductor wafers facing each other while the semiconductor wafers are attracted to the electrostatic chucks, wherein one of the electrostatic chucks is a bipolar type having a plurality of internal electrodes adjacent to each other, and voltages of opposite polarities, the absolute values ​​of which are different from each other, are applied to the adjacent internal electrodes, and the other electrostatic chuck is a bipolar type having a plurality of internal electrodes adjacent to each other, and voltages of opposite polarities, the absolute values ​​of which are different from each other, are applied to the adjacent internal electrodes, and a voltage of opposite polarity is applied to the internal electrodes of one of the electrostatic chucks arranged opposite to each other, and the semiconductor wafers are bonded together while the semiconductor wafer held by one of the electrostatic chucks and the semiconductor wafer held by the other electrostatic chuck have opposite polarities.

[0016] In these cases, it is preferable that the semiconductor wafers held by the pair of electrostatic chucks are attracted to each other and joined by van der Waals force and Coulomb force in a vacuum environment without using a piston rod.

[0017] In these cases, it is preferable to bond the semiconductor wafers held by the pair of electrostatic chucks in a minute space in which the separation distance between the semiconductor wafers is set to 10 μm or more and 50 μm or less, while maintaining the planar orientation of the semiconductor wafers. [Effects of the Invention]

[0018] According to the present invention, with a simple configuration, it is possible to prevent misalignment of semiconductor wafers when the semiconductor wafers are bonded together in a semiconductor manufacturing process. [Brief explanation of the drawings]

[0019] [Figure 1] 1 is a process diagram of a semiconductor manufacturing process according to a first embodiment of the present invention. [Figure 2] 2 shows an example of a plasma chamber used in the first embodiment of the present invention. [Figure 3] 1 is an example of a cleaning machine according to a first embodiment of the present invention. [Figure 4] 3A to 3C are diagrams illustrating a cleaning process, an argon gas supply process, and a drying process in the semiconductor manufacturing process according to the first embodiment of the present invention. [Figure 5] 1 is a flow chart of a semiconductor manufacturing process according to a first embodiment of the present invention. [Figure 6] 1 is a flow chart showing an improved process for a semiconductor manufacturing process according to a first embodiment of the present invention. [Figure 7] FIG. 10 is a configuration diagram showing a transfer process and a pre-bonding process in a semiconductor wafer bonding apparatus according to a second embodiment of the present invention. [Figure 8] FIG. 1 is a configuration diagram showing a pre-bonding process in a semiconductor wafer bonding apparatus according to a first embodiment of the present invention. [Figure 9] FIG. 10 is a configuration diagram showing the configuration of a stage of a semiconductor wafer bonding apparatus according to a second embodiment of the present invention. [Figure 10] FIG. 1 is a diagram illustrating the structure of a monopolar electrostatic chuck. [Figure 11] FIG. 1 is a diagram illustrating the structure of a bipolar electrostatic chuck. [Figure 12] FIG. 10 is a configuration diagram showing a state when semiconductor wafers are bonded together by a bipolar electrostatic chuck provided on a stage constituting a semiconductor wafer bonding apparatus according to a third embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0020] A method for removing electrostatic charges from a semiconductor wafer, which is applied to a semiconductor manufacturing process according to a first embodiment of the present invention, will be described. For example, an embodiment applied to a semiconductor manufacturing process employing hybrid bonding will be described.

[0021] [Semiconductor manufacturing process] First, the semiconductor manufacturing process will be described. As shown in Figures 1 and 5, the semiconductor manufacturing process includes, for example, a particle removal process P100 for semiconductor wafers W1 and W2, a plasma treatment process P200, an atmosphere exposure process P300, a cleaning process P400, a drying process P500, an alignment process P600, a bonding process P700, an inspection process P800, and an annealing process P900.

[0022] In the particle removal step P100, particles adhering to the semiconductor wafers W1 and W2 are removed mechanically or chemically.

[0023] In the plasma treatment step P200, the surfaces of the semiconductor wafers W1 and W2 are activated by vacuum plasma treatment, atmospheric pressure plasma treatment, or the like.

[0024] Vacuum plasma treatment can be carried out using known equipment. Vacuum plasma treatment methods include high-frequency induction, capacitively coupled electrode, corona discharge electrode-plasma jet, parallel plate, remote plasma, and ICP-type high-density plasma. Gases used in vacuum plasma treatment include oxygen gas, nitrogen gas, rare gases (such as argon gas), hydrogen gas, and ammonia gas, with rare gases or nitrogen gas being preferred. One type of gas may be used alone, or two or more types may be mixed. For example, the gas may be 100% by volume argon gas, a mixed gas of hydrogen gas / nitrogen gas at a volume ratio of 70 / 30, or a mixed gas of hydrogen gas / nitrogen gas / argon gas at a volume ratio of 35 / 15 / 50.

[0025] The atmosphere for the vacuum plasma treatment is preferably an atmosphere in which the volume fraction of rare gas or nitrogen gas is 50% by volume or more, more preferably 70% by volume or more, even more preferably 90% by volume or more, and particularly preferably 100% by volume. When the volume fraction of rare gas or nitrogen gas is equal to or greater than the lower limit of the above range, the surface of the treatment object can be sufficiently roughened.

[0026] The gas flow rate, degree of vacuum, and treatment time in the vacuum plasma treatment are appropriately selected depending on the composition of the inorganic layer to be surface-treated and the structure of the vacuum plasma treatment apparatus.

[0027] Atmospheric pressure plasma treatment can also be carried out using known equipment. In atmospheric pressure plasma treatment, glow discharge is generated by discharging in an inert gas (argon gas, nitrogen gas, helium gas, etc.) at 0.8 to 1.2 atmospheres. A small amount of active gas (oxygen gas, hydrogen gas, carbon dioxide gas, ethylene, ethylene tetrafluoride, etc.) is mixed into the inert gas. As the gas, a mixture of nitrogen gas and hydrogen gas is preferred, as it can sufficiently roughen the surface of the treatment target.

[0028] The plasma chamber is shown in Figure 2. The gate valve 12 of the plasma chamber 10 is opened, and the semiconductor wafers W1 and W2 are transported into the chamber 14 by a robot and placed on the stage 16. The gate valve 12 is then closed to seal the inside of the chamber 14. The inside of the chamber 14 is then evacuated. The semiconductor wafers W1 and W2 are subjected to plasma processing to activate the surfaces of the semiconductor wafers W1 and W2.

[0029] Here, it is preferable to further include an atmosphere exposure step P300 of placing the semiconductor wafers W1 and W2 in an atmospheric environment after the plasma treatment step P200.

[0030] In the atmosphere release process P300, the gate valve 12 of the plasma chamber 10 may be opened to expose the inside of the chamber 10 to the atmosphere, or an atmosphere release chamber (not shown) that is open to the atmosphere may be provided separately from the plasma chamber 10, and the semiconductor wafers W1 and W2 may be transported to the atmosphere release chamber and then placed in an atmospheric environment.

[0031] In the atmosphere release step P300, argon gas 30 is supplied to the semiconductor wafers W1 and W2. The argon gas 30 is preferably supplied by spraying it from the center of the plane of the semiconductor wafers W1 and W2 toward the radially outward (outer periphery) side using a predetermined swing nozzle 32.

[0032] The reason for supplying argon gas 30 to the semiconductor wafers W1 and W2 in the atmosphere release step P300 is that, for example, when nitrogen (N2) purging is performed during atmosphere release as in the conventional method, friction between the semiconductor wafers W1 and W2 and the purge gas causes static electricity to build up on the surfaces of the semiconductor wafers W1 and W2, and pressure fluctuations during purging cause particles to fly up and be attracted to the static electricity, making them more likely to adhere to the surfaces of the semiconductor wafers W1 and W2. To prevent this, in this embodiment, argon gas 30 is sprayed onto the semiconductor wafers W1 and W2 instead of nitrogen (N2) purging, thereby reducing the amount of static electricity on the surfaces of the semiconductor wafers W1 and W2. As a result, the number of particles adhering to the surfaces of the semiconductor wafers W1 and W2 can be reduced.

[0033] The interior of the chamber 14 may be filled with argon gas 30 to create an argon gas atmosphere, so that the semiconductor wafers W1, W placed in the argon gas atmosphere are not charged with static electricity.

[0034] 4, for example, the semiconductor wafers W1 and W2 after the plasma processing are placed on a turntable 20 and rotated at a predetermined speed while cleaning water 28 is dropped onto the surfaces of the semiconductor wafers W1 and W2. As the cleaning water 28, for example, pure water or a chemical solution can be used.

[0035] Here, when supplying the cleaning water 28 to the semiconductor wafers W1, W2, it is preferable to drip the cleaning water 28 onto the center of the plane of the rotating semiconductor wafers W1, W2 and guide the cleaning water 28 radially outward by the centrifugal force of the rotating semiconductor wafers W1, W2. This makes it possible to clean the entire surfaces of the semiconductor wafers W1, W2 and prevent uneven cleaning by the cleaning water 28.

[0036] The cleaning machine 18 is shown in FIG. 3. The cleaning machine 18 is used in the cleaning process P400. The cleaning machine 18 has a turntable 20, a rotary motor 22 that rotates the turntable 20, and a cleaning nozzle 24 that supplies cleaning water 28 (see FIG. 4) to the semiconductor wafers W1 and W2. The cleaning nozzle 24 sprays the cleaning water 28 and is configured to be swingable by driving a swing motor 26. As a result, while the semiconductor wafers W1 and W2 are placed on the turntable and rotated by the rotary motor 22, the cleaning water 28 can be dropped from the cleaning nozzle 24 onto the center of the plane of the semiconductor wafers W1 and W2. In this way, the semiconductor wafers W1 and W2 are cleaned, and OH groups (hydroxyl groups) adhere to the surfaces of the semiconductor wafers W1 and W2.

[0037] Here, it is preferable to provide a drying step P500 after the cleaning step P400.

[0038] In the drying step P500, for example, the cleaning machine 18 is used as is. Specifically, the turntable 20 is rotated at a speed higher than that during the cleaning step, and argon gas 30 is sprayed toward the semiconductor wafers W1 and W2 from the cleaning nozzle 24 or another gas supply nozzle (not shown). In this case, as shown in FIG. 4, when argon gas 30 is supplied from the planar center of the rotating semiconductor wafers W1 and W2 toward the radially outward (outer periphery), the argon gas 30 spreads, pushing against the cleaning water 28, due to the action of the centrifugal force of the rotating semiconductor wafers W1 and W2. In other words, the argon gas 30 is agitated by the centrifugal force of the rotating semiconductor wafers W1 and W2, and the cleaning water 28 adhering to the surfaces of the semiconductor wafers W1 and W2 is peeled off from the surfaces of the semiconductor wafers W1 and W2. This allows the argon gas 30 to come into contact with the entire surfaces of the semiconductor wafers W1 and W2, preventing uneven contact of the argon gas 30.

[0039] Another reason for supplying argon gas 30 to the semiconductor wafers W1, W2 in the drying step P500 is that when the cleaned semiconductor wafers W1, W2 are rotated at high speed to dry, friction between the semiconductor wafers W1, W2 and the air causes static electricity to build up on the surfaces of the semiconductor wafers W1, W2. Therefore, by exposing the surfaces of the semiconductor wafers W1, W2 to argon gas 30 in the drying step P500, the amount of static electricity on the surfaces of the semiconductor wafers W1, W2 can be reduced. As a result, the number of particles adhering to the surfaces of the semiconductor wafers W1, W2 can be reduced.

[0040] As described above, by supplying the argon gas 30 to the semiconductor wafers W1, W2 in the drying step P500, the cleaning water 28 is removed from the surfaces of the semiconductor wafers W1, W2, and the surfaces of the semiconductor wafers W1, W2 are dried, and the amount of static electricity charged on the surfaces of the semiconductor wafers W1, W2 can be reduced.

[0041] In the atmosphere release step P300, a mixed gas obtained by appropriately mixing small amounts of hydrogen and oxygen into argon gas 30 may be supplied to the semiconductor wafers W1 and W2. For example, a mixed gas obtained by mixing argon with about 3% by volume of hydrogen may be sprayed onto the surfaces of the semiconductor wafers W1 and W2 to remove static electricity and particles, and then oxygen gas may be sprayed onto the surfaces of the semiconductor wafers W1 and W2 to attach OH groups (hydroxyl groups) to the surfaces of the semiconductor wafers W1 and W2.

[0042] Here, in a configuration in which the semiconductor wafers W1, W2 are rotatable, the mixed gas and oxygen gas are preferably supplied from the center of the plane of the rotating semiconductor wafers W1, W2 toward the outside in the radial direction by a swing nozzle, etc. This causes the mixed gas and oxygen gas to be agitated by the centrifugal force acting on the rotating semiconductor wafers W1, W2, so that the entire surfaces of the semiconductor wafers W1, W2 can be evenly exposed to the mixed gas and oxygen gas.

[0043] As a result, as shown in Figures 5 and 6, the cleaning step P400 and the drying step P500 can be omitted, improving the throughput of the semiconductor manufacturing process. Also, it is possible to prevent microbubbles from being generated in the semiconductor wafers W1 and W2 after the annealing step P900. Furthermore, OH groups (hydroxyl groups) adhere to the surfaces of the semiconductor wafers W1 and W2 activated by the plasma treatment, enabling fusion bonding and realizing a dry process.

[0044] In the alignment step P600, two semiconductor wafers W1 and W2 facing each other are positioned.

[0045] In the bonding process P700, two semiconductor wafers W1 and W2 that have been through the alignment process P600 are bonded together. At this time, because the semiconductor wafers W1 and W2 that contain few particles are bonded together, the size of any air bubbles that may occur between the semiconductor wafers W1 and W2 becomes extremely small, which makes it possible to avoid quality defects in the semiconductor wafers W1 and W2 and prevent a decrease in the yield of the semiconductor manufacturing process.

[0046] In the inspection process P800, shape observation, defect inspection, etc. are performed on the bonded semiconductor wafers W1 and W2.

[0047] In the annealing step P900, the surfaces of the semiconductor wafers W1 and W2 are heated and then cooled to modify the material surfaces, for example, by heating in a furnace or lamp, or by laser annealing.

[0048] As described above, according to the first embodiment, the amount of static electricity charged to the semiconductor wafers W1 and W2 in the semiconductor manufacturing process can be reduced, thereby reducing particles attracted by static electricity and adhering to the surfaces of the semiconductor wafers W1 and W2.

[0049] Moreover, the cleaning water 28 adhering to the surfaces of the semiconductor wafers W1 and W2 can be removed, while the semiconductor wafers W1 and W2 can be modified to have properties that make them less susceptible to static electricity.

[0050] Furthermore, fusion bonding of the semiconductor wafers W1 and W2 becomes possible, preventing the generation of microbubbles (air bubbles), thereby preventing defects in the semiconductor wafers W1 and W2.

[0051] Next, a semiconductor wafer bonding apparatus according to a second embodiment of the present invention will be described. The semiconductor wafer bonding apparatus is an alignment apparatus that can be used in the bonding step P700 in the semiconductor manufacturing process of the first embodiment. Note that the bonding apparatus is not limited to being used as the bonding apparatus in the semiconductor manufacturing process of the first embodiment, but can also be used as a general semiconductor wafer bonding apparatus.

[0052] As shown in Fig. 7, a semiconductor wafer bonding apparatus 34 (hereinafter simply referred to as "bonding apparatus 34") includes a first stage 36 located, for example, at the top, and a second stage 38 located, for example, at the bottom. The first stage 36 and the second stage 38 are disposed opposite each other and face each other. Note that "upper" and "lower" are examples of directions for explaining this embodiment and are not limiting. For example, "upper" and "lower" can be interchanged with "leftward" and "rightward."

[0053] For convenience of explanation, the semiconductor wafer held on the first stage 36 will be referred to as semiconductor wafer W1, and the semiconductor wafer held on the second stage 38 will be referred to as semiconductor wafer W2.

[0054] The first stage 36 has a first horizontal surface 40 that supports the semiconductor wafer W1. A suction mechanism (not shown) is connected to the first stage 36, and the semiconductor wafer W1 can be held with a predetermined suction force. Similarly, the second stage 38 has a second horizontal surface 42 that supports the semiconductor wafer W2. A suction mechanism (not shown) is connected to the second stage 38, and the semiconductor wafer W2 can be held with a predetermined suction force. In particular, when the microspace SP, which will be described later, is evacuated, the semiconductor wafers W1 and W2 are held by their respective stages 36 and 38.

[0055] The first stage 36 and the second stage 38 are preferably provided with a temperature adjustment mechanism (not shown) for controlling the temperature at a predetermined level. The temperature adjustment mechanism is, for example, a heater.

[0056] The first stage 36 may be configured, for example, with a vacuum chuck or an electrostatic chuck (ESC chuck). When using a vacuum chuck, a process that does not require wiring alignment, such as an SOI wafer, is desirable. An SOI wafer is a wafer that achieves high integration, low power consumption, high speed, and high reliability of semiconductor devices by forming a highly electrically insulating oxide film layer inside the wafer. If necessary, it is also possible to form a diffusion layer of arsenic (As) or antimony (Sb) in the active layer.

[0057] When the first stage 36 is configured with a vacuum chuck, it is preferable to narrow the bonding clearance (minute distance) as much as possible to create a pressure difference that can hold the semiconductor wafer before the vacuum control pressure becomes equal to the pressure. Also, it is preferable to install an edge guide (periphery guide) or the like to prevent the semiconductor wafer W1 held on the upper first stage 36 from falling or to avoid any problems even if the semiconductor wafer W1 falls.

[0058] The second stage 38 is supported by a support base 44. A drive unit 46 that can drive the second stage 38 in the vertical direction is connected to the second stage 38. Therefore, when the drive unit 46 is driven, the second stage 38 can move in the vertical direction while maintaining a horizontal position. The drive unit 46 can be, for example, a ball screw mechanism, a hydraulic cylinder, a pneumatic cylinder, or the like, and by linearly moving in the vertical direction, the second stage 38 can move in 1-micron increments in the vertical direction.

[0059] Similarly to the first stage 36, the second stage 38 may be configured with, for example, a vacuum chuck or an electrostatic chuck (ESC chuck).

[0060] Similarly, the first stage 36 may be connected to a drive unit (not shown) and configured to be movable in 1-micron increments in the vertical direction. In a configuration in which the drive unit 46 is attached to the second stage 38, the first stage 36 may be configured to be fixed by a support member (not shown) so as not to move in the vertical direction.

[0061] The support surface of the first stage 36 that supports the semiconductor wafer W1 is configured, for example, as a first horizontal surface 40. Similarly, the support surface of the second stage 38 that supports the semiconductor wafer W2 is configured, for example, as a second horizontal surface 42. However, as shown in FIG. 9 , a protruding member 74 may be detachably provided on the first horizontal surface 40 that supports the semiconductor wafer W1 of the first stage 36, and the semiconductor wafer W1 may be supported by the tip of the protruding member 74. Similarly, a protruding member 76 may be detachably provided on the second horizontal surface 42 that supports the semiconductor wafer W2 of the second stage 38, and the semiconductor wafer W2 may be supported by the tip of the protruding member 76.

[0062] The first stage 36 is equipped with a load cell (not shown) that can measure the bonding pressure when bonding the semiconductor wafers W1 and W2 together. This makes it possible to measure the bonding pressure between the semiconductor wafers W1 and W2 in grams, and by controlling the drive device 46 based on the measurement results of the load cell, it is possible to control the bonding pressure of the semiconductor wafers in grams.

[0063] A seal member 48 is attached to either or both of the first stage 36 and the second stage 38. The seal member 48 is preferably disposed on the edge of the first stage 36 or the edge of the second stage 38. The seal member 48 is made of, for example, rubber and is also called an airtight member. FIG. 7 shows a configuration in which the seal member 48 is provided only on the second stage 38, but this is just one example. For example, as shown in FIG. 9, the seal member 48 may be provided at a position facing both the first stage 36 and the second stage 38 so as to be in contact with each other.

[0064] Here, the first stage 36 and the second stage 38 are arranged facing each other so that their horizontal planes are parallel, and can be moved toward or away from each other by vertical movement based on the drive of the drive unit 46. As the first stage 36 and the second stage 38 approach each other, the first stage 36 and the seal member 48 eventually come into contact. When the first stage 36 and the seal member 48 come into contact, the movement of the first stage 36 and the second stage 38 is stopped. At this time, the separation distance between the semiconductor wafer W1 supported by the first stage 36 and the semiconductor wafer W2 supported by the second stage 38 is set to a minute distance to form a minute space (minimal space) SP. In this sense, the seal member 48 functions as a guide member or control member for forming the minute distance or minute space.

[0065] It is preferable that the horizontal length of the minute space SP is set to be the same as the diameter dimension of the semiconductor wafers W1 and W2, or to be set to a length obtained by adding a preliminary dimension of about 10 to 20 percent of the diameter dimension to the diameter dimension of the semiconductor wafers W1 and W2.

[0066] In other words, the dimensions of the seal member 48 are set so that when the semiconductor wafers W1, W2 are bonded together by vertical movement of the first stage 36 and the second stage 38, the space formed by each semiconductor wafer W1, W2 becomes a minute space SP. That is, the dimension of the seal member 48, for example, in the height direction, is controlled so that the minimal space in which the semiconductor wafers W1, W2 are bonded together becomes a predetermined minute space SP (or minute volume). Alternatively, the dimension of the seal member 48, for example, in the height direction, has the function of controlling the distance between the semiconductor wafer W1 supported by the first stage 36 and the semiconductor wafer W2 supported by the second stage 38 to a desired minimum value.

[0067] The distance between the semiconductor wafer W1 supported by the first stage 36 and the semiconductor wafer W2 supported by the second stage 38 is preferably a microdistance of 10 μm or more and 50 μm or less.

[0068] The minute space SP is connected to a vacuum control device 50 (not shown in the Transfer position of FIG. 7) provided outside the bonding device 34 so as to be able to communicate with it. Specifically, the volume of the vacuum control device 50 is set to be several thousand to several tens of thousands times larger than the volume of the minute space SP. An inlet of an orifice 52 (not shown in the Transfer position of FIG. 7) is connected to the minute space SP, and one end of a tubular member 54 is connected to the outlet of the orifice 52. The other end of the tubular member 54 is connected to the vacuum control device 50. A switching valve 56 (vacuum valve) is connected to the tubular member 54. By opening and closing the switching valve 56, the minute space SP and the vacuum control device 50 are brought into a state of communication with each other. At this time, because the volume of the vacuum control device 50 is several thousand to several tens of thousands times larger than the volume of the minute space SP, the internal environment of the minute space SP becomes a vacuum environment that mimics the pressure environment of the internal space of the vacuum control device 50. In this way, a vacuum environment in the minute space SP is realized simply by connecting the small-volume minute space SP to the large-volume vacuum control device 50.

[0069] The internal environment of the vacuum control device 50 is controlled to an optimum pressure, so that the moisture in the minute space SP does not freeze and bubbles similar to particles do not occur when the semiconductor wafers W1, W2 are bonded together, and it is possible to prevent the scattering of hydroxyl groups (OH groups) that may cause quality degradation of the semiconductor wafers W1, W2.

[0070] The vacuum control device 50 is one embodiment of the "vacuum control section" of the present invention.

[0071] Here, the operation when the semiconductor wafers W1 and W2 are bonded together will be described. The distance between the semiconductor wafers W1 and W2 is small in the vacuum environment of the microspace SP, and the drive unit 46 drives the second stage 38 to move upward while maintaining a horizontal state. Eventually, the semiconductor wafer W1 held on the first stage 36 and the semiconductor wafer W2 held on the second stage 38 come into contact with each other at a predetermined pressure and are bonded together.

[0072] At this time, the semiconductor wafers W1 and W2 are not pressed using a center push pin (rod) or the like as in the conventional technology. In the conventional technology, when semiconductor wafers are bonded together, the center portion of one semiconductor wafer is pressed with a center push pin, which causes problems such as deterioration or damage due to bending of the semiconductor wafer and distortion caused by stress concentration. In response to this problem, in this embodiment, the semiconductor wafers W1 and W2 are bonded together while maintaining a horizontal plane without using a center push pin, thereby preventing deterioration or damage of the semiconductor wafers W1 and W2 during bonding. This is particularly effective when the semiconductor wafers W1 and W2 are made of hard and brittle SiC wafers.

[0073] The bonding pressure between the semiconductor wafers W1 and W2 is, for example, up to 15 kg. The bonding pressure can be measured by a load cell provided on the first stage 36. Furthermore, by feedback-controlling the driving device 46 based on the measurement results from the load cell, it becomes possible to control the movement of the second stage 38 in micron units.

[0074] When the semiconductor wafers W1 and W2 are bonded together, the semiconductor wafers W1 and W2 are bonded together with a very small distance between them, so that misalignment between the semiconductor wafers can be suppressed and bonding accuracy can be improved.

[0075] It is also possible to provide a driving device on the first stage 36 side and move the first stage 36 downward to bond the semiconductor wafers W1 and W2 together. Furthermore, a driving device 46 may be provided on both the first stage 36 and the second stage 38 so that both the first stage 36 and the second stage 38 can be moved vertically.

[0076] Next, the operation of the semiconductor wafer bonding apparatus and bonding method according to the second embodiment of the present invention will be described.

[0077] [Current situation and issues] It has been difficult to make a sufficient amount of hydroxyl groups (OH groups) remain at the interface of a semiconductor wafer during vacuum plasma processing. Although it is possible to generate O radicals or H radicals during vacuum plasma processing, plasma electrons adhere to the surface of the semiconductor wafer at the same time, and the action of the plasma electrons activates the surface of the semiconductor wafer, so it has not been possible to make a sufficient amount of hydroxyl groups (OH groups) remain at the interface of the semiconductor wafer.

[0078] Vacuum plasma processing is performed to activate semiconductor wafers, but the process pressure required to excite gases into plasma and activate the surface of the semiconductor wafer with ions is 50 Ps or less in vacuum. In this state, gas exists at about 1 / 2000 of atmospheric pressure, so it is not possible to use high-density plasma and remote plasma to keep hydroxyl groups (OH groups) at the interface of the semiconductor wafer and obtain the hydroxyl groups (OH groups) required for bonding.

[0079] When considering hydrophilic bonding of SiO2, water is less likely to dissociate from SiO2 than from Si, which poses a technical problem of low strength due to the small number of hydroxyl groups (OH groups). If a large amount of water is applied to solve this technical problem, the water will remain at the interface of the semiconductor wafer, causing an excess of hydroxyl groups (OH groups), which will lead to the formation of voids.

[0080] For example, in the fusion bonding process, a conventional common method is to plasma activate semiconductor wafers, then clean them to add hydroxyl groups (OH groups), and then use a center push pin to push up one of the semiconductor wafers, bending the semiconductor wafers while bonding them together. However, this conventional method has caused damage due to deformation of the semiconductor wafers themselves, leading to technical problems that can lead to breakage of the semiconductor wafers.

[0081] In particular, all substrate materials used for semiconductor wafers are brittle materials, being hard and brittle. Among them, SiC is second only to diamond in hardness and has strong chemical resistance, making it extremely difficult to physically process. For this reason, unlike regular silicon wafers (SI wafers), SiC wafers require a bonding process that does not use a center push pin (void elimination bonding process).

[0082] In contrast, the wafer bonding apparatus and method of the second embodiment performs the bonding process of the semiconductor wafers W1 and W2 in a small space (minimal space) and in a vacuum environment, by controlling the pressure so that hydroxyl groups (OH groups) necessary for bonding can remain in a low vacuum.

[0083] The bonding process of the semiconductor wafers W1 and W2 is carried out in the microspace SP, and the microspace is quickly evacuated in about one second. The first stage 36 and the second stage 38 are temperature-controlled to a predetermined temperature, so that an appropriate amount of hydroxyl groups (OH) can remain.

[0084] In this way, in the bonding process of semiconductor wafers, by controlling the vacuum pressure, temperature, and time when bonding the semiconductor wafers W1 and W2 in the smallest space, that is, the microspace, it is possible to perform the optimal bonding process of the semiconductor wafers W1 and W2.

[0085] In particular, since the microspace SP becomes a vacuum environment in a short time of about 1 second, a sufficient amount of hydroxyl groups (OH groups) can remain on the surfaces of the semiconductor wafers W1 and W2, improving the bonding strength between the semiconductor wafers W1 and W2.

[0086] In the pre-bonding space before the semiconductor wafers W1 and W2 are bonded together, it is preferable that the separation distance between the semiconductor wafers W1 and W2 is a minute distance (minimum distance) of 10 μm or more and 50 μm or less, and that the tilt and alignment of the semiconductor wafers W1 and W2 are adjusted by piezo control, as well as the pressure control during bonding.

[0087] Next, examples of the semiconductor wafer bonding apparatus and bonding method according to the second embodiment of the present invention will be described. In the drawings of each example, the same reference numerals are used to designate overlapping components, and their description will be omitted as appropriate.

[0088] Example 1 8, the first embodiment includes a vacuum control unit 58. The vacuum control unit 58 includes, for example, a vacuum control chamber 60, a pump unit 62 connected to the vacuum control chamber 60 by piping or the like, a gas unit 64 connected to the vacuum control chamber 60 by piping or the like, and a pressure gauge 66 such as a Pirani vacuum gauge for measuring the pressure inside the vacuum control chamber 60.

[0089] The vacuum control chamber 60 is one embodiment of the "vacuum control section" of the present invention.

[0090] Bulkhead valves 68 are provided between the vacuum control chamber 60 and the pump unit 62, and between the vacuum control chamber 60 and the gas unit 64. Furthermore, the vacuum control chamber 60 is provided with a temperature adjustment mechanism 70 for controlling the temperature inside the vacuum control chamber 60. The temperature adjustment mechanism 70 is, for example, a heater. The temperature adjustment mechanism 70 makes it possible to degasify gas adhering to the inner wall of the vacuum control chamber 60 and control humidity. By driving the pump unit 62, the microspace SP, which is in communication with the vacuum control chamber 60, is evacuated, realizing a vacuum environment.

[0091] According to the first embodiment, the bonding chamber side forming the minute space of the bonding device 34 is structured to control the pressure change rate with an orifice 52 such as a mass flow controller. The vacuum control chamber 60 is provided with, for example, a temperature control mechanism 70 and a gas unit 64 capable of supplying water vapor. This makes it possible to control the environment inside the vacuum control chamber, such as the temperature, humidity, and pressure.

[0092] The reason for interposing the vacuum control chamber 60 between the microspace SP of the bonding device 34 and the pump unit 62 is that if the microspace SP of the bonding device 34 were directly connected to the pump unit 62, the volume of the microspace SP would be too small to control the pressure. The sudden vacuum state reached by the pump unit 62 (ultimate vacuum) would cause moisture and other liquids present in the microspace SP to rapidly evaporate, lowering the temperature of the microspace SP. As a result, vacuum freezing occurs in the semiconductor wafers W1 and W2 in the microspace SP. Vacuum freezing generates bubbles similar to particles, adversely affecting the quality of the semiconductor wafers W1 and W2. Furthermore, the sudden vacuum state reached by the pump unit 62 (ultimate vacuum) would volatilize hydroxyl groups (OH groups), adversely affecting the quality of the semiconductor wafers W1 and W2.

[0093] The pressure at which vacuum freezing occurs depends on the nature of the material and the temperature. Generally, very low pressures are required for vacuum freezing to occur effectively. In most cases, vacuum freezing is performed under high vacuum (10 -3 The freezing process is carried out under conditions of pressures below 100 Pa (Pascal). The pressure change when creating a vacuum affects the results of freezing. In a vacuum, substances tend to become gaseous, and as the pressure decreases, they tend to evaporate. This lowers the temperature of the substance, accelerating freezing. The lower the pressure, the easier it is for freezing to occur in a vacuum.

[0094] As described above, by interposing the vacuum control chamber 60 and communicating the interior of the vacuum control chamber 60 with the micro space SP while optimally controlling the temperature, humidity, and pressure, and also by controlling the temperatures of the first stage 36 and the second stage 38, a vacuum environment is created in the micro space SP to prevent freezing, thereby preventing deterioration of the semiconductor wafers W1 and W2.

[0095] Example 2 9, in Example 2, the first stage 36 is provided with a first protruding member 74 as a contact area reducing portion 72 for reducing the contact area with the semiconductor wafer W1. The second stage 38 is provided with a second protruding member 76 as a contact area reducing portion 72 for reducing the contact area with the semiconductor wafer W2. The first stage 36 and the second stage 38 each have horizontal surfaces 40 and 42, and the semiconductor wafers W1 and W2 are supported in surface contact on the horizontal surfaces 40 and 42, respectively. However, in Example 2, the semiconductor wafers W1 and W2 are supported by a plurality of protruding members 74 and 76. Therefore, the total contact area between the semiconductor wafers W1 and W2 and the stages 36 and 38 is reduced. This reduces the amount of particles (foreign matter) such as dirt and dust that get between the semiconductor wafers W1, W2 and the protruding members 74, 76, reduces stress concentration when the semiconductor wafers W1, W2 are bonded together, and suppresses deterioration in the quality of the completed product.

[0096] The tip portions of the multiple protruding members 74, 76 are preferably formed into a curved surface to reduce the contact area with the semiconductor wafers W1, W2. By making the tip portion of each of the protruding members 74, 76 a curved surface, the amount of particles (foreign matter) such as dirt and dust that adhere to the tip portions of the protruding members 74, 76 is reduced, and at the same time, the contact area between the semiconductor wafers W1, W2 and the protruding members 74, 76 is further reduced. As a result, the amount of particles (foreign matter) such as dirt and dust that are present between the semiconductor wafers W1, W2 and the protruding members 74, 76 is significantly reduced, and deterioration in the quality of the product when the semiconductor wafers W1, W2 are bonded together to form a completed product can be further suppressed.

[0097] As described above, according to Example 2, since the conventional stage is flat, particles adhering to the stage or the surface of the semiconductor wafer promote stress concentration when pressure is applied during bonding of the semiconductor wafers, which can fundamentally solve technical problems such as breakage of the semiconductor wafer or generation of bubbles in the semiconductor wafer.

[0098] In particular, in a configuration in which the semiconductor wafers W1, W2 are supported by a plurality of protruding members 74, 76, a gap is formed between each adjacent protruding member 74, 76. When the minute space SP is vacuum-suctioned, an airflow passes through the gap formed between each of the protruding members 74, 76 and flows toward the orifice 52. This allows the semiconductor wafers W1, W2 to be firmly supported by the plurality of protruding members 74, 76, enabling reliable positioning. As a result, a highly accurate bonding process can be achieved between the semiconductor wafers W1, W2.

[0099] The protruding members 74, 76 may be projections, columnar members, or rod-shaped members. The protruding members 74, 76 may be members or structures for forming unevenness on the horizontal surfaces 40, 42 of the first stage 36 and the second stage 38. The protruding members 74, 76 are not limited to being detachably attached to the horizontal surfaces 40, 42, but may be fixed to the horizontal surfaces 40, 42, or the surfaces of the horizontal surfaces 40, 42 may be processed into protrusions or projections.

[0100] Furthermore, both the first stage 36 and the second stage 38 are provided with seal members 48 for maintaining a vacuum environment in the microspace SP when the semiconductor wafers W1 and W2 are bonded together. The seal members 48 are made of, for example, rubber.

[0101] When the pair of stages 36, 38 approach each other, the seal members 48 come into contact with each other, thereby adjusting the distance between the semiconductor wafers W1, W2. In other words, the thickness (height) of the seal member 48 is set to a dimension that allows the distance between the semiconductor wafers W1, W2 to be adjusted to a desired minute distance.

[0102] Next, the operation of the semiconductor wafer bonding apparatus and bonding method according to the third embodiment of the present invention will be described.

[0103] The third embodiment relates to the semiconductor wafer bonding apparatus and bonding method of the second embodiment, and is configured such that electrostatic chucks 80 (see FIGS. 10 to 12) are arranged on the first stage 36 and the second stage 38 for holding the semiconductor wafers W1 and W2.

[0104] [Current situation and issues] Conventionally, in a bonding process, for example, when bonding positively charged semiconductor wafers together or negatively charged semiconductor wafers together, a repulsive force is generated between the semiconductor wafers. This causes a positional deviation of one semiconductor wafer relative to the other semiconductor wafer when the semiconductor wafers are bonded together, which has been a problem in that it reduces the bonding accuracy of the semiconductor wafers. Therefore, the third embodiment has been invented to solve the above problems, and aims to provide a wafer bonding apparatus and a wafer bonding method that have a simple configuration and prevent misalignment when semiconductor wafers are bonded together in a semiconductor manufacturing process.

[0105] 10 and 11 illustrate the structures of a monopolar electrostatic chuck 78 and a bipolar electrostatic chuck 80. Each of the electrostatic chucks 78, 80 is made of an insulating material such as aluminum oxide (Al2O3) or aluminum nitride (AIN). The chucks have a structure in which an electrode is built into an insulator, and by applying a voltage to this electrode, they attract objects 86, 92 to be attracted, such as semiconductor wafers W1, W2.

[0106] 10 is a monopolar electrostatic chuck 78 that includes a base substrate 82 and an internal electrode (also referred to as an electrode sheet or a polyimide film electrode layer) 84 disposed on the base substrate 82. The base substrate 82 applies either a positive or negative voltage to the internal electrode 84. For example, when a positive voltage is applied to the internal electrode 84, a negative charge is transferred to the surface of the object to be attracted 86, causing the object to be attracted to the monopolar electrostatic chuck 78. When a negative voltage is applied to the internal electrode 84, a positive charge is transferred to the surface of the object to be attracted 86, causing the object to be attracted to the monopolar electrostatic chuck 78.

[0107] 11 is a bipolar electrostatic chuck having a base substrate 88 and an internal electrode (also referred to as an electrode sheet or a polyimide film electrode layer) 90 disposed on the base substrate 88. The base substrate 88 applies both positive and negative voltages to the internal electrode 90. For example, a negative charge is transferred to the surface of an object to be attracted 92 facing the internal electrode 90 to which a positive voltage is applied, and a positive charge is transferred to the surface of the object to be attracted 92 facing the internal electrode 90 to which a negative voltage is applied, thereby attracting the object to be attracted to the bipolar electrostatic chuck 80.

[0108] In the third embodiment, an example will be described in which a bipolar electrostatic chuck is used in a semiconductor wafer bonding apparatus. As shown in FIG. 12 , an electrostatic chuck 80 is preferably built into each of the first stage 36 and the second stage 38. For convenience of explanation, the electrostatic chuck 80 built into the first stage 36 will be referred to as the first electrostatic chuck 80A, and the electrostatic chuck 80 built into the second stage 38 will be referred to as the second electrostatic chuck 80B. Each of the electrostatic chucks 80A and 80B is, for example, a bipolar type. Because the first stage 36 and the second stage 38 are arranged opposite each other, the electrostatic chucks 80A and 80B are arranged opposite each other, thereby constituting a pair of electrostatic chucks.

[0109] The first electrostatic chuck 80A has a first base substrate 88A and a first internal electrode 90A disposed on the first base substrate 88A. The first internal electrode 90A is connected to ground. The first base substrate 88A controls the voltage applied to the first internal electrode 90A. The first internal electrode 90A is composed of two or more adjacent first unit electrodes 91A, and mutually opposite positive and negative voltages are applied to adjacent first unit electrodes 91A, respectively.

[0110] The second electrostatic chuck 80B is disposed opposite the first electrostatic chuck 80A. Similar to the configuration of the first electrostatic chuck 80A, the second electrostatic chuck 80B has a second base substrate 88B and a second internal electrode 90B disposed on the second base substrate 88B. The second internal electrode 90B is connected to ground. The second base substrate 88B controls the voltage applied to the second internal electrode 90B. The second internal electrode 90B is composed of two or more adjacent second unit electrodes 91B, and mutually opposite positive and negative voltages are applied to adjacent second unit electrodes 91B, respectively.

[0111] Here, the first base plate 88A and the second base plate 88B control the first unit electrode 91A on the first electrostatic chuck 80A side and the second unit electrode 91B on the second electrostatic chuck 80B side facing the first unit electrode 91A so that voltages of opposite polarities (positive and negative) are applied to them. Therefore, the first unit electrode 91A of the first internal electrode 90A of the first electrostatic chuck 80A, to which a negative voltage is applied, is positioned opposite to the second unit electrode 91B of the second internal electrode 90B of the second electrostatic chuck 80B, to which a positive voltage is applied. Similarly, the first unit electrode 91A of the first internal electrode 90A of the first electrostatic chuck 80A, to which a positive voltage is applied, is positioned opposite to the first unit electrode 91B of the second internal electrode 90B of the second electrostatic chuck 80B, to which a negative voltage is applied.

[0112] The general principle of the bipolar electrostatic chuck 80 is that, with a semiconductor wafer W1 placed on the first electrostatic chuck 80A and a semiconductor wafer W2 placed on the second electrostatic chuck 80B, positive and negative voltages are applied to the first inner electrode 90A and the second inner electrode 90B, respectively. This causes the positive and negative charges of the semiconductor wafers W1 and W2 to move toward the opposing inner electrodes 90A and 90B in a mutually attractive manner (dielectric polarization). As a result, an attraction force is generated between the first inner electrode 90A and the semiconductor wafer W1, and between the second inner electrode 90B and the semiconductor wafer W2, thereby fixing the semiconductor wafers W1 and W2.

[0113] 10, in a monopolar electrostatic chuck 78, a voltage is generally applied between an object to be attracted (such as a semiconductor wafer) 86 and an internal electrode 84 (also referred to as a chuck or a holding device), generating an electric charge on the surface of the object to be attracted (such as a semiconductor wafer) 86. Specifically, if the internal electrode 84 is positively charged, the surface of the object to be attracted (such as a semiconductor wafer) 86 facing the internal electrode 84 is negatively charged, and if the internal electrode 84 is negatively charged, the surface of the object to be attracted (such as a semiconductor wafer) 86 facing the internal electrode 84 is positively charged. This principle is also applied to a bipolar electrostatic chuck 80 shown in FIG. 11.

[0114] Typically, the surfaces of semiconductor wafers W1 and W2 are negatively (or possibly positively) charged after being activated by plasma processing. Therefore, when attempting to bond semiconductor wafers W1 and W2 with negatively (or positively) charged surfaces together, they electrically repel each other. Forcibly bonding the semiconductor wafers W1 and W2 together in this state results in a mutual repulsion, resulting in misalignment and a reduction in the bonding accuracy of the semiconductor wafers W1 and W2.

[0115] In the third embodiment, as shown in Fig. 12, the surface of one of the semiconductor wafers W1 facing each other is positively (negatively) charged, and the surface of the other semiconductor wafer W2 is negatively (positively) charged, thereby intentionally creating a state in which the semiconductor wafers to be bonded are charged with opposite polarities. This improves the adsorptive force by utilizing both the van der Waals force (intermolecular force) and Coulomb force (electrostatic force) generated between the two, thereby assisting in bonding the semiconductor wafers W1 and W2 together.

[0116] Generally, when negatively charged objects (or positively charged objects) are brought together, they repel each other. This is one of the basic properties of static electricity; charges of the same sign (for example, when both are negatively charged) repel each other, and charges of opposite polarities (for example, one is positive and the other is negative) attract each other. The third embodiment utilizes this property.

[0117] The semiconductor wafers W1 and W2 are charged to opposite polarities (opposite polarities) and are controlled with a voltage between their surfaces that does not cause discharge, and when the positively charged semiconductor wafer W1 (or W2) comes into contact with the negatively charged semiconductor wafer W2 (or W1), electrons move from the positively charged object to the negatively charged object, neutralizing the charge. This weakens the effect of static electricity and simultaneously increases the bonding attraction force during bonding.

[0118] In a typical bipolar electrostatic chuck, the surface of the semiconductor wafer is maintained in an electrically balanced state by applying voltages of the same magnitude (absolute value) to the positive and negative sides.

[0119] In contrast to this, in the third embodiment, instead of applying voltages of the same magnitude (absolute value) to positive and negative, voltages of different magnitudes are applied to intentionally disrupt the positive or negative balance. In other words, an imbalance is created between the positive and negative voltages in terms of the magnitude of the applied voltage.

[0120] 12, for example, a voltage of −400 volts is applied to one first unit electrode 91A constituting a first inner electrode 90A of a first electrostatic chuck 80A, and a voltage of +500 volts is applied to the other first unit electrode 91A. At the same time, a voltage of +400 volts is applied to one second unit electrode 91B constituting a second inner electrode 90B of a second electrostatic chuck 80B, and a voltage of −500 volts is applied to the other second unit electrode 91B.

[0121] Here, the first unit electrode 91A of the first inner electrode 90A of the first electrostatic chuck 80A, which is on one side to which a voltage of −400 V is applied, and the second unit electrode 91B of the second inner electrode 90B of the second electrostatic chuck 80B, which is on one side to which a voltage of +400 V is applied, are set to be positioned opposite each other. Although these electrodes have different polarities (positive and negative), voltages of the same absolute value are applied to them.

[0122] Furthermore, the first unit electrode 91A of the first inner electrode 90A of the first electrostatic chuck 80A, which is on the other side to which a voltage of +500 V is applied, and the second unit electrode 91B of the second inner electrode 90B of the second electrostatic chuck 80B, which is on the other side to which a voltage of −500 V is applied, are set to be positioned opposite each other. Although these electrodes have different polarities (positive and negative), voltages of the same magnitude in absolute value are applied to them.

[0123] As a result, the surface of the semiconductor wafer W1 facing the first electrostatic chuck 80A is charged with a charge of +100 volts, which is the difference between +500 volts and −400 volts of the first electrostatic chuck 80A. Similarly, the surface of the semiconductor wafer W2 facing the second electrostatic chuck 80B is charged with a charge of −100 volts, which is the difference between +400 volts and −500 volts of the second electrostatic chuck 80B.

[0124] At this time, floating charges are generated on the surfaces of the semiconductor wafers W1 and W2. As a result, by applying reverse voltages to the mutually opposing internal electrodes 90A and 90B (or unit electrodes), the semiconductor wafers W1 and W2 are attracted to each other by a strong Coulomb force and bonded together. As a result, the generation of bubbles when bonding the semiconductor wafers W1 and W2 together can be suppressed.

[0125] Here, the semiconductor wafers W1 and W2 held by the pair of electrostatic chucks 80A and 80B are preferably placed in a minute space SP (minimal space) environment with a separation distance between them of 10 μm or more and 50 μm or less. In the minute space SP, the semiconductor wafers W1 and W2 are bonded to each other while maintaining their planar orientation. The definition and effects of the minute space SP are as described in the second embodiment.

[0126] In the microspace SP, with the semiconductor wafers W1 and W2 attracted to the electrostatic chucks 80A and 80B, one or both of the first stage 36 and the second stage 38 are moved along the direction of gravity by the drive device 46 as needed to bring the semiconductor wafers W1 and W2 closer to each other. At this time, the semiconductor wafers W1 and W2 are charged with opposite polarities, generating van der Waals forces (intermolecular forces) and Coulomb forces (electrostatic forces) between them. By utilizing both of these forces, the attraction between the semiconductor wafers W1 and W2 placed in the microspace SP is increased, and the semiconductor wafers W1 and W2 are attracted to each other and bonded in a vacuum environment without using, for example, a piston rod.

[0127] In particular, since the semiconductor wafers W1 and W2 each hold a positive charge and a negative charge, they attract each other and assist the van der Waals molecular bonding. This increases the adhesive force generated between the semiconductor wafers W1 and W2 when they are bonded together, preventing misalignment of the semiconductor wafers W1 and W2 during bonding.

[0128] The bipolar electrostatic chuck 80 has electrodes arranged such that the first stage 36 located on the upper side and the second stage 38 located on the lower side have different polarities (opposite polarities). This allows the voltage after bonding the semiconductor wafers W1 and W2 to flow from the positive side to the negative side, thereby assisting the van der Waals force of the OH groups (hydroxyl groups).

[0129] Van der Waals forces (intermolecular forces, intermolecular interaction forces) occur when atoms or molecules are very close to each other when a substance is in a liquid or solid state. Van der Waals forces play an important role in the cohesion of substances and affect the contact or bonding between substances.

[0130] Furthermore, van der Waals forces and electrostatic forces are different forces that can simultaneously influence the interaction of materials. Van der Waals forces are forces that act between nonpolar molecules and between nonpolar and polar molecules and are caused by the instantaneous distribution of electrons. Electrostatic forces, on the other hand, are the mutual attraction or repulsion of electrically charged particles (usually electrons and protons).

[0131] When a substance is electrostatically charged, an electric field is generated, which may affect surrounding molecules or atoms. This electric field may also affect van der Waals forces. Specifically, electrostatic interactions position molecules or atoms, which changes the van der Waals forces or the relative polarities of molecules, thereby enhancing the adhesive force when bonding the semiconductor wafers W1 and W2 together.

[0132] It should be noted that the present embodiment and examples illustrate one aspect of the present invention, and the present invention is not limited thereto. Differences in the degree of design changes from the present embodiment and examples are naturally included within the scope of the technical idea of ​​the present invention. [Explanation of symbols]

[0133] 10 Plasma chamber 12 Gate valve 14 Chamber 16 stages 18 Washing Machine 20 Rotating Table 22 Rotary motor 24 Cleaning nozzle 26 Oscillating motor 28 Cleaning water 30 Argon gas 32 Swinging nozzle 34 Semiconductor wafer bonding equipment 36 First Stage 38 Second Stage 40 First horizontal plane 42 Second horizontal plane 44 Support stand 46 Drive unit 48 Sealing material 50 Vacuum control device (vacuum control unit) 52 Orifice 54 Tubular member 56 Switching valve 58 Vacuum Control Unit 60 Vacuum control chamber (vacuum control section) 62 Pump unit 64 Gas Unit 66 Pressure gauge 68 bulkhead valve 70 Temperature adjustment mechanism 72 Contact area reduction part 74 First protruding member 76 Second protruding member 78 Single-pole electrostatic chuck 80 Bipolar electrostatic chuck 80A First Electrostatic Chuck 80B Second electrostatic chuck 82 Base 84 Internal electrode 86 Adsorbed object 88 Base 88A First Base 88B Second Base 90 Internal electrode 90A First inner electrode 90B Second internal electrode 91A First unit electrode 91B Second unit electrode 92 Adsorbed object SP Minimal Space W1 Semiconductor wafer W2 semiconductor wafer

Claims

1. A semiconductor wafer bonding apparatus that arranges a pair of electrostatic chucks at positions facing each other on a stage that supports semiconductor wafers, and bonds the semiconductor wafers facing each other while the semiconductor wafers are attracted to the electrostatic chucks, The electrostatic chuck is a bipolar type having a plurality of adjacent internal electrodes, and voltages of opposite polarities, the absolute values ​​of which are different from each other, are applied to the adjacent internal electrodes, A potential difference is generated in a state in which the semiconductor wafer held by one of the electrostatic chucks and the semiconductor wafer held by the other electrostatic chuck have opposite polarities, The semiconductor wafer bonding device bonds the semiconductor wafers facing each other without any misalignment by attracting each other by van der Waals force and Coulomb force.

2. 2. The semiconductor wafer bonding device according to claim 1, wherein the semiconductor wafers held by the pair of electrostatic chucks are bonded to each other in a microspace in which the separation distance between the semiconductor wafers is set to 10 μm or more and 50 μm or less, while maintaining a planar orientation of the semiconductor wafers.

3. A semiconductor wafer bonding method comprising: arranging a pair of electrostatic chucks at positions facing each other on a stage supporting semiconductor wafers; bonding the semiconductor wafers facing each other while the semiconductor wafers are attracted to the electrostatic chucks; The electrostatic chuck is a bipolar type having a plurality of adjacent internal electrodes, and voltages of opposite polarities, the absolute values ​​of which are different from each other, are applied to the adjacent internal electrodes, A potential difference is generated in a state in which the semiconductor wafer held by one of the electrostatic chucks and the semiconductor wafer held by the other electrostatic chuck have opposite polarities, The semiconductor wafer bonding method is such that the semiconductor wafers facing each other are bonded together without any misalignment by attracting each other by van der Waals force and Coulomb force.

4. 4. The semiconductor wafer bonding method according to claim 3, wherein the semiconductor wafers held by the pair of electrostatic chucks are bonded to each other in a microspace in which a separation distance between the semiconductor wafers is set to 10 μm or more and 50 μm or less, while maintaining a planar orientation of the semiconductor wafers.

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