Processing method

Abstract

To provide a device wafer processing method that can suppress adhesion of foreign matter and shorten a processing time.SOLUTION: A processing method is for processing a device wafer in which device layers constituting devices are stacked on a substrate, and the devices are formed in each region defined by multiple intersecting streets on the surface includes a first groove forming step 101 of forming first grooves along the streets by plasma etching to a depth sufficient to separate the device layer and cut into the substrate, a second groove forming step 102 of forming, after performing the first groove forming step 101, a second groove in the substrate by cutting along the first groove with a cutting blade, and a plasma etching step 103 of plasma-etching, after performing the second groove forming step 102, the bottom of the second groove.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a method for processing a device wafer. [Background technology]

[0002] Laser dicing and blade dicing generate processing waste when dividing a semiconductor wafer, whereas plasma dicing, which divides the wafer by plasma etching, has been proposed (see, for example, Patent Document 1).

[0003] The plasma dicing disclosed in Patent Document 1 etc. does not generate processing waste when dividing a semiconductor wafer, and is therefore widely used in the manufacturing process of semiconductor devices where adhesion of foreign matter is undesirable. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2022-035863 Summary of the Invention [Problem to be solved by the invention]

[0005] In the plasma dicing disclosed in Patent Document 1, etc., multiple streets can be divided at once because plasma etching is performed on multiple streets simultaneously. However, further reduction in processing time is desired.

[0006] An object of the present invention is to provide a device wafer processing method that can suppress adhesion of foreign matter and shorten processing time. [Means for solving the problem]

[0007] In order to solve the above-mentioned problems and achieve the object, the processing method of the present invention is a method for processing a device wafer in which device layers constituting devices are stacked on a substrate and devices are formed in each area partitioned by a plurality of intersecting streets on the surface, and is characterized by comprising: a first groove forming step of dividing the device layer by plasma etching and forming first grooves along the streets to a depth that cuts into the substrate; a second groove forming step of, after performing the first groove forming step, forming second grooves in the substrate by irradiating with a laser beam or cutting with a cutting blade along the first groove; and a plasma etching step of plasma etching the bottom of the second groove after performing the second groove forming step.

[0008] In the processing method, the first groove forming step may form two grooves along the street, and the second groove forming step may remove the device layer between the two grooves and a portion of the substrate. [Effects of the Invention]

[0009] The present invention has the effect of suppressing adhesion of foreign matter and shortening the processing time. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a perspective view showing an example of a device wafer to be processed by the processing method according to the first embodiment. [Figure 2] FIG. 2 is an enlarged plan view showing a main part of the device wafer shown in FIG. [Figure 3] FIG. 3 is a flowchart showing the flow of the processing method according to the first embodiment. [Figure 4] FIG. 4 is a cross-sectional view schematically showing an example of the configuration of an etching apparatus used in the first groove forming step and the plasma etching step of the processing method shown in FIG. [Figure 5]FIG. 5 is a cross-sectional view schematically showing a main part of the device wafer in a state where a support member is attached to the back surface of the device wafer in the first groove forming step of the processing method shown in FIG. [Figure 6] FIG. 6 is a cross-sectional view schematically showing a main part of a device wafer in a state where a mask is formed on the surface of the device wafer in the first groove forming step of the processing method shown in FIG. [Figure 7] FIG. 7 is a cross-sectional view schematically showing a main part of a device wafer in a state where first grooves are formed in the surface of the device wafer in the first groove forming step of the processing method shown in FIG. [Figure 8] FIG. 8 is a cross-sectional view schematically showing a main part of the device wafer in the second groove forming step of the processing method shown in FIG. [Figure 9] FIG. 9 is a cross-sectional view schematically showing a main part of the device wafer in a state where the bottom of the second trench is plasma etched in the plasma etching step of the processing method shown in FIG. [Figure 10] FIG. 10 is a cross-sectional view schematically showing a main part of the device wafer in a state where the mask has been removed in the plasma etching step of the processing method shown in FIG. [Figure 11] FIG. 11 is a cross-sectional view schematically showing a main part of a device wafer in a state where a mask is formed on the surface of the device wafer in the first groove forming step of the processing method according to the second embodiment. [Figure 12] FIG. 12 is a cross-sectional view schematically showing a main part of a device wafer in a state where first grooves are formed in the surface of the device wafer in the first groove forming step of the processing method according to the second embodiment. [Figure 13] FIG. 13 is a cross-sectional view schematically showing a main part of the device wafer in a state where the mask has been removed in the first groove forming step of the processing method according to the second embodiment. [Figure 14] FIG. 14 is a cross-sectional view schematically showing a main part of a device wafer in a state where a support member is attached to the surface of the device wafer in the second groove forming step of the processing method according to the second embodiment. [Figure 15] FIG. 15 is a cross-sectional view schematically showing a main part of a device wafer in a state where a mask is formed on the back surface of the device wafer in the second groove forming step of the processing method according to the second embodiment. [Figure 16] FIG. 16 is a cross-sectional view schematically showing a main part of a device wafer in which a second groove is formed in the second groove forming step of the processing method shown in FIG. [Figure 17] FIG. 17 is a cross-sectional view schematically showing a main part of a device wafer in a state where the bottom of the second trench is plasma etched in the plasma etching step of the processing method according to the second embodiment. [Figure 18] FIG. 18 is a cross-sectional view schematically showing a main part of a device wafer in a state where the mask has been removed in the plasma etching step of the processing method according to the second embodiment. [Figure 19] FIG. 19 is a cross-sectional view schematically showing a main part of a device wafer in a modification of the second groove forming step shown in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0011] Modes (embodiments) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the following embodiments. Furthermore, the components described below include those that can be easily imagined by a person skilled in the art and those that are substantially the same. Furthermore, the configurations described below can be combined as appropriate. Furthermore, various omissions, substitutions, or modifications of the configuration can be made within the scope of the gist of the present invention.

[0012] [Embodiment 1] A processing method according to a first embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a perspective view showing an example of a device wafer to be processed by the processing method according to the first embodiment. Fig. 2 is an enlarged plan view showing a main part of the device wafer shown in Fig. 1. Fig. 3 is a flowchart showing the flow of the processing method according to the first embodiment.

[0013] (device wafer) The processing method according to the first embodiment is a method for dividing a device wafer 1 shown in Fig. 1 into individual device chips 10. The device wafer 1 to be processed by the processing method according to the first embodiment is, for example, a disk-shaped semiconductor wafer or the like having a substrate 2 made of silicon or the like.

[0014] As shown in FIG. 1, the device wafer 1 has a device layer 3 laminated on a substrate 2, and a surface 4 defined by a plurality of intersecting streets 5, in each of which a device 6 is formed.

[0015] The device 6 is, for example, an integrated circuit such as an IC (Integrated Circuit) or an LSI (Large Scale Integration), or a memory (semiconductor memory device). The device 6 is composed of a plurality of stacked interlayer insulating films made of SiO2 that constitute the device layer 3, and a circuit made of a conductive metal stacked between the interlayer insulating films. In the first embodiment, the device 6 is a so-called hybrid-bonded device. However, in the present invention, the device 6 may also be, for example, an image sensor device such as a CCD (Charge Coupled Device) or a CMOS (Complementary Metal Oxide Semiconductor).

[0016] In the first embodiment, an interlayer insulating film of the device layer 3 is stacked on the substrate 2 in the streets 5. In the first embodiment, as shown in FIG. 2, the streets 5 have TEGs (Test Element Groups) 7 provided on the device layer 3. The TEGs 7 are made of metal and are evaluation elements for identifying design or manufacturing problems that may occur in the devices 6, and are provided at the center of the width of some of the streets 5. In the present invention, the device wafer 1 may have metal in the device layer 3 provided on the streets 5 instead of the TEGs 7.

[0017] The device wafer 1 is divided into individual device chips 10 along the streets 5. Each device chip 10 includes a portion of the substrate 2 and a device 6 formed on the surface 4 of the substrate 2.

[0018] (Processing method) As shown in FIG. 3, the processing method according to the first embodiment includes a first groove forming step 101, a second groove forming step 102, and a plasma etching step 103.

[0019] (etching equipment) First, an etching apparatus 50 used in the first groove forming step 101 and the plasma etching step 103 will be described with reference to the drawings. Fig. 4 is a cross-sectional view showing a schematic configuration example of an etching apparatus used in the first groove forming step and the plasma etching step of the processing method shown in Fig. 3.

[0020] 4, the etching apparatus 50 includes a rectangular parallelepiped chamber 51, a holding unit 52, an upper electrode 53, and a control unit 55. The chamber 51 has a processing space 511 formed therein where plasma etching is performed. One side wall 512 of the chamber 51 is provided with an opening 513 for loading and unloading the device wafer 1, and an opening / closing door 514 for opening and closing the opening 513. The opening / closing door 514 opens and closes the opening 513 by being raised and lowered by an opening / closing mechanism 515 formed of an air cylinder or the like.

[0021] Furthermore, the chamber 51 has an exhaust port 517 formed in the bottom wall 516, which connects the inside and outside of the chamber 51. The exhaust port 517 is connected to an exhaust mechanism 510 such as a vacuum pump.

[0022] The holding unit 52 and the upper electrode 53 are disposed opposite to each other in the processing space 511 of the chamber 51. The upper surface of the holding unit 52 is a holding surface 524 that holds the device wafer 1. The holding unit 52 is made of a conductive material and also functions as a lower electrode.

[0023] The holding unit 52 includes a disk-shaped holding portion 521 and a cylindrical support portion 520 that protrudes downward from the center of the lower surface of the holding portion 521. The support portion 520 is inserted into an opening 522 formed in the bottom wall 516 of the chamber 51. Within the opening 522, an annular insulating member 523 is disposed between the bottom wall 516 and the support portion 520, and the chamber 51 and the holding unit 52 are electrically insulated from each other. The holding unit 52 is also connected to a high-frequency power source 56 outside the chamber 51.

[0024] An electrode 526 connected to a high-frequency power supply (not shown) is provided on the holding portion 521 of the holding unit 52. When power is applied from the high-frequency power supply to the electrode 526, the holding unit 52 generates a dielectric polarization phenomenon between the holding surface 524 and the device wafer 1, and attracts and holds the device wafer 1 on the holding surface 524 by electrostatic attraction force due to polarization of the electric charge.

[0025] Furthermore, a cooling flow path 527 through which a cooling fluid flows for cooling the holding unit 52 is formed inside the holding part 521 and inside the support part 520 of the holding unit 52. Both ends of the cooling flow path 527 are connected to a refrigerant circulation mechanism 528. When the refrigerant circulation mechanism 528 is operated, the cooling fluid such as water circulates inside the cooling flow path 527, and the holding unit 52 is cooled.

[0026] The upper electrode 53 is made of a conductive material and includes a disk-shaped gas ejection part 531 and a cylindrical support part 530 that protrudes upward from the center of the upper surface of the gas ejection part 531. The support part 530 is inserted into an opening 532 formed in the upper wall 518 of the chamber 51. Inside the opening 532, an annular insulating member 533 is disposed between the upper wall 518 and the support part 530, and the chamber 51 and the upper electrode 53 are electrically insulated from each other.

[0027] The upper electrode 53 is connected to a high-frequency power source 57 outside the chamber 51. A support arm of a lifting mechanism 534 is attached to the upper end of the support part 530. The upper electrode 53 is raised and lowered by the lifting mechanism 534.

[0028] A plurality of ejection ports 535 are provided on the lower surface side of the gas ejection part 531. The ejection ports 535 are connected to a first etching gas supply source 58 and a second etching gas supply source 59 via flow paths 536 formed in the gas ejection part 531 and the support part 530.

[0029] The first etching gas supply source 58 supplies a first etching gas into the chamber 51 from the nozzle 535 through the flow path 536. In the first embodiment, when the substrate 2 of the device wafer 1 is made of silicon, the first etching gas supply source 58 supplies a fluorine-based gas, such as SF6 gas, CF4 gas, or C4F8 gas, into the chamber 51 as the first etching gas. The second etching gas supply source 59 supplies a second etching gas into the chamber 51 from the nozzle 535 through the flow path 536. In the first embodiment, the second etching gas supply source 59 supplies an oxygen-based gas into the chamber 51 as the second etching gas.

[0030] The control unit 55 controls each component of the etching apparatus 50 to cause the etching apparatus 50 to perform plasma etching on the device wafer 1. The control unit 55 is a computer having an arithmetic processing device with a microprocessor such as a CPU (central processing unit), a storage device with memory such as a ROM (read only memory) or RAM (random access memory), and an input / output interface device. The arithmetic processing device of the control unit 55 performs arithmetic processing in accordance with a computer program stored in the storage device, and outputs control signals for controlling the etching apparatus 50 to each component of the etching apparatus 50 via the input / output interface device.

[0031] The control unit 55 is also connected to a display unit configured with a liquid crystal display device or the like that displays various information and images, and an input unit that the operator uses to register processing content information, etc. The input unit is configured with at least one of a touch panel provided on the display unit and an external input device such as a keyboard.

[0032] (First Groove Forming Step) Fig. 5 is a cross-sectional view schematically showing a main part of a device wafer in a state where a support member is attached to the back surface of the device wafer in the first groove forming step of the processing method shown in Fig. 3. Fig. 6 is a cross-sectional view schematically showing a main part of a device wafer in a state where a mask is formed on the front surface of the device wafer in the first groove forming step of the processing method shown in Fig. 3. Fig. 7 is a cross-sectional view schematically showing a main part of a device wafer in a state where a first groove is formed on the front surface of the device wafer in the first groove forming step of the processing method shown in Fig. 3.

[0033] The first groove forming step 101 is a step of forming first grooves 21 along the streets 5 with a depth sufficient to divide the device layer 3 and cut into the substrate 2 by plasma etching. In the first groove forming step 101 in the first embodiment, a support member 11 is attached to the back surface 8 of the front surface 4 of the device wafer 1, as shown in FIG.

[0034] In the first embodiment, a support member 11 made of glass and formed in a disk shape with the same diameter as the device wafer 1 is adhered to the backside 8 of the device wafer 1 with an adhesive 12. In the present invention, a carrier wafer made of silicon may be adhered as the support member, or a tape with a ring-shaped frame attached to its outer edge may be adhered. In the present invention, in the first groove formation step 101, the support member 11 may be adhered to the backside 8 of the device wafer 1 before plasma etching.

[0035] In the first embodiment, in the first groove forming step 101, as shown in Fig. 6, a mask 30 that is resistant to a first etching gas 581 (shown in Fig. 7) that has been converted into plasma and is generated by an etching apparatus 50 is formed on the surface 4 of the device wafer 1. In the first embodiment, when forming the mask 30, a liquid photoresist is applied to the surface 4 of the device wafer 1, and the photoresist is exposed to light by an exposure apparatus so that openings 31 are formed at both ends of each street 5 in the width direction.

[0036] In the first embodiment, in the first groove forming step 101, a mask 30 is formed on the surface 4 of the device wafer 1. The mask 30 has openings 31 formed at both ends of each street 5 in the width direction, extending along the longitudinal direction of the street 5. In the first embodiment, the openings 31 in the mask 30 are positioned closer to the ends of the street 5 in the width direction than the TEG 7, thereby exposing the device layer 3 on the street 5. In this way, in the first embodiment, the water-insoluble mask 30 is formed using photoresist. In the present invention, the mask 30 may also be formed by adhering a resist film to the surface 4 of the device wafer 1.

[0037] In the first embodiment, in the first groove forming step 101, the etching apparatus 50 raises the upper electrode 53 using the lifting mechanism 534, and then lowers the opening / closing door 514 using the opening / closing mechanism 515 to open the opening 513. In the first embodiment, in the first groove forming step 101, the etching apparatus 50 carries the device wafer 1 divided into individual device chips 10 into the processing space 511 using a transport unit (not shown), and places the device wafer 1 on the holding surface 524 of the holding unit 52 via the support member 11.

[0038] In the first embodiment, in the first groove forming step 101, the etching apparatus 50 applies power from a high-frequency power supply to the electrode 526, and adsorbs and holds the backside surface 8 of the device wafer 1 on the holding surface 524 via the support member 11. In the first groove forming step 101, the etching apparatus 50 raises the opening / closing door 514 using the opening / closing mechanism 515 to close the opening 513, operates the exhaust mechanism 510 to reduce the pressure inside the chamber 51 and make the processing space 511 a vacuum state (low-pressure state), and operates the refrigerant circulation mechanism 528 to circulate a cooling fluid such as water inside the cooling flow path 527 to suppress abnormal temperature rise in the holding unit 52.

[0039] In the first embodiment, in the first groove forming step 101, the etching apparatus 50 lowers the upper electrode 53 by the lifting mechanism 534, and positions the distance between the lower surface of the upper electrode 53 and the device wafer 1 held by the holding unit 52 constituting the lower electrode at a predetermined inter-electrode distance suitable for plasma etching. In the first embodiment, in the first groove forming step 101, the etching apparatus 50 supplies CF gas, which is the first etching gas, from the first etching gas supply source 58 at a predetermined flow rate and ejects it from the multiple ejection ports 535 of the gas ejection part 531 toward the device wafer 1 held on the holding unit 52.

[0040] In the first embodiment, in the first groove forming step 101, the etching apparatus 50 applies high-frequency power from the high-frequency power supply 57 to the upper electrode 53 to generate and maintain plasma, and applies high-frequency power from the high-frequency power supply 56 to the holding unit 52, which is the lower electrode, to attract ions, while supplying a first etching gas from the first etching gas supply source 58. In the first groove forming step 101, the etching apparatus 50 converts the first etching gas in the space between the holding unit 52 and the upper electrode 53 into plasma, and as shown in FIG. 7 , the converted first etching gas 581 is drawn toward the device wafer 1, etching the device layer 3 exposed through the openings 31 in the mask 30 of the device wafer 1 (so-called plasma etching).

[0041] In the first embodiment, since the interlayer insulating film of the device layer 3 is made of SiO2, CF4 gas is used as the first etching gas, but it is not limited to CF4 gas, and C4F8 gas, a mixed gas of CF4 gas and Ar gas, or a mixed gas of C4F8 gas and Ar gas may also be used. In the present invention, oxygen gas may be supplied from the second etching gas supply source 59 as the second etching gas.

[0042] In the first embodiment, in the first groove forming step 101, a predetermined time for the etching apparatus 50 to plasma etch the entire device layer 3 below the opening 31 in the thickness direction is set in advance according to the thickness of the device layer 3. In the first groove forming step 101, in the first embodiment, the etching apparatus 50 applies high-frequency power to the holding unit 52 and the upper electrode 53 while supplying a first etching gas for a predetermined time, thereby completely removing the device layer 3 below the opening 31 in the mask 30 and forming a first groove 21 that divides the device layer 3.

[0043] In the first embodiment, in the first groove forming step 101, the first groove 21 exposing the substrate 2 at its bottom is formed without plasma etching the substrate 2, but in the present invention, the substrate 2 may be plasma etched to form the first groove 21 cutting into a part of the substrate 2 and exposing the substrate 2 at its bottom. In this way, the first groove 21 exposing the substrate 2 at its bottom is a groove having a depth that divides the device layer 3 and cuts into the substrate 2.

[0044] Furthermore, in the first groove forming step 101 of the first embodiment, first grooves 21 are formed along the longitudinal direction of each street 5 at both ends in the width direction of each street 5. Thus, in the first groove forming step 101 of the first embodiment, two first grooves 21 are formed along each street 5 of the device wafer 1.

[0045] (Second groove forming step) Fig. 8 is a cross-sectional view schematically showing a main part of a device wafer in the second groove forming step of the processing method shown in Fig. 3. The second groove forming step 102 is a step in which, after the first groove forming step 101 is performed, second grooves 22 are formed in the substrate 2 by cutting along the first grooves 21 with a cutting blade 61.

[0046] 8 suction-holds the back surface 8 of the device wafer 1 on the holding surface of the chuck table via the support member 11. In the first embodiment, in the second groove forming step 102, the cutting device 60 moves the cutting blade 61 and the device wafer 1 relatively along the streets 5 while cutting the cutting edge 62 of the cutting blade 61 rotated about its axis from the front surface 4 side to the center of the width direction of the streets 5 to a depth that does not reach the back surface 8, thereby forming second grooves 22 that do not reach the back surface 8 in the center of the width direction of each street 5 of the device wafer 1.

[0047] Furthermore, in the first embodiment, in the second groove forming step 102, a cutting edge 62 of a cutting blade 61 having a thickness 63 thinner than the distance 211 between the outer sides of the first grooves 21 formed at both ends in the width direction of each street 5 is caused to cut into the center in the width direction of each street 5. Thus, in the first embodiment, in the second groove forming step 102, the device layer 3 between the two first grooves 21 formed in each street 5 is removed, and part of the substrate 2 is also removed, to form second grooves 22 in the substrate 2.

[0048] (Plasma etching step) Fig. 9 is a cross-sectional view schematically showing a main part of the device wafer in a state where the bottom of the second trench is plasma etched in the plasma etching step of the processing method shown in Fig. 3. Fig. 10 is a cross-sectional view schematically showing a main part of the device wafer in a state where the mask has been removed in the plasma etching step of the processing method shown in Fig. 3.

[0049] The plasma etching step 103 is a step of plasma etching the groove bottom 23 (shown in FIG. 8 ) of the second groove 22 after the second groove forming step 102 is performed. In the first embodiment, in the plasma etching step 103, the etching apparatus 50 suction-holds the backside 8 of the device wafer 1 on the holding surface 524 of the holding unit 52 via the support member 11, as in the first groove forming step 101, seals the chamber 51, reduces the pressure, and operates the refrigerant circulation mechanism 528 to position the distance between the lower surface of the upper electrode 53 and the device wafer 1 held by the holding unit 52 constituting the lower electrode at a predetermined inter-electrode distance suitable for plasma etching.

[0050] In the first embodiment, in the plasma etching step 103, the etching apparatus 50 alternately supplies C4F8 gas and SF6 gas as a first etching gas from the first etching gas supply source 58 and ejects the first etching gas from the plurality of ejection ports 535 of the gas ejection part 531 toward the device wafer 1 held on the holding unit 52. In the first embodiment, in the plasma etching step 103, while the first etching gas is being supplied from the first etching gas supply source 58, the etching apparatus 50 applies high-frequency power from the high-frequency power supply 57 to the upper electrode 53 to generate and maintain plasma, and applies high-frequency power from the high-frequency power supply 56 to the holding unit 52, which is the lower electrode, to attract ions.

[0051] Thus, in embodiment 1, in the plasma etching step 103, the etching apparatus 50 plasma etches the groove bottoms 23 of the second grooves 22 of the device wafer 1 from the front surface 4 side by the Bosch method, which alternately repeats the deposition of a protective film on the inner surfaces of the second grooves 22 by supplying plasmatized C4F8 gas, which is the first etching gas 581, and the plasma etching of the groove bottoms 23 of the second grooves 22 by supplying plasmatized SF6 gas, which is the first etching gas 581.

[0052] In the first embodiment, in the plasma etching step 103, the number of times that the etching apparatus 50 repeats plasma etching and protective film deposition is set in advance according to the thickness of the base material 2 at the groove bottoms 23 of the second grooves 22. In the first embodiment, in the plasma etching step 103, the etching apparatus 50 repeats plasma etching and protective film deposition a predetermined number of times to remove the base material 2 at the groove bottoms 23 of the second grooves 22, and cause the second grooves 22 to reach the support member 11, thereby dividing the device wafer 1 into individual device chips 10, as shown in FIG.

[0053] In the first embodiment, in the plasma etching step 103, the etching apparatus 50 stops the supply of the first etching gas from the first etching gas supply source 58, and supplies oxygen gas, which is the second etching gas, from the second etching gas supply source 59 for a predetermined time, and removes the mask 30 by ashing with the oxygen gas plasma, as shown in FIG. 10 .

[0054] In the processing method according to the first embodiment described above, the device layer 3 is divided by plasma etching in the first groove forming step 101, and the substrate 2 is plasma etched in the plasma etching step 103. In addition, in the processing method according to the first embodiment, second grooves 22, i.e., half-cut grooves, are formed from the surface 4 side in the second groove forming step 102 before the substrate 2 is plasma etched from the surface 4 side in the plasma etching step 103.

[0055] In this way, in the processing method of embodiment 1, the formation of the second grooves 22 and the plasma etching are performed from the front surface 4 side of the device wafer 1, so that foreign matter generated during the formation of the second grooves 22 can be eliminated by the subsequent plasma etching, and adhesion of foreign matter to the device 6 can be suppressed.

[0056] Furthermore, the processing method according to embodiment 1 forms the second groove 22 by cutting in the second groove forming step 102, and plasma etches the groove bottom 23 of the second groove 22 in the plasma etching step 103 to separate the device chips 10, thereby shortening the processing time.

[0057] As a result, the processing method according to the first embodiment has the effect of suppressing adhesion of foreign matter to the device 6 and shortening the processing time.

[0058] Furthermore, in the processing method according to the first embodiment, the first grooves 21 are set to a depth that cuts into the base material 2, so that chipping is less likely to occur when the second grooves 22 are formed.

[0059] Furthermore, in the processing method according to the first embodiment, the first grooves 21 are formed in two rows, so that the area between the first grooves 21 is less likely to chip or fly off when the second grooves 22 are formed.

[0060] [Embodiment 2] A processing method according to embodiment 2 will be described with reference to the drawings. Similar to embodiment 1, the processing method according to embodiment 2 includes a first groove forming step 101, a second groove forming step 102, and a plasma etching step 103. Note that in the following Figures 11, 12, 13, 14, 15, 16, 17, and 18, the same parts as those in embodiment 1 are designated by the same reference numerals, and their description will be omitted.

[0061] (First Groove Forming Step) Fig. 11 is a cross-sectional view schematically showing a main part of a device wafer in a state where a mask is formed on the surface of the device wafer in the first groove forming step of the processing method according to embodiment 2. Fig. 12 is a cross-sectional view schematically showing a main part of a device wafer in a state where a first groove is formed on the surface of the device wafer in the first groove forming step of the processing method according to embodiment 2. Fig. 13 is a cross-sectional view schematically showing a main part of a device wafer in a state where the mask is removed in the first groove forming step of the processing method according to embodiment 2.

[0062] In the second embodiment, in the first groove forming step 101, as shown in Fig. 11, a mask 30 is formed on the front surface 4 of the device wafer 1, similar to the first embodiment, without attaching a support member 11 to the back surface 8 of the front surface 4 of the device wafer 1. In the second embodiment, in the first groove forming step 101, as shown in Fig. 12, an etching apparatus 50 forms first grooves 21 in the device wafer 1 with a first etching gas 581 that has been converted into plasma, similar to the first embodiment. In the second embodiment, in the first groove forming step 101, the etching apparatus 50 supplies oxygen gas from a second etching gas supply source 59 into a chamber 51 to ash the mask 30, thereby removing the mask 30 from the front surface 4 of the device wafer 1, as shown in Fig. 13.

[0063] (Second groove forming step) Fig. 14 is a cross-sectional view schematically showing a main part of a device wafer in a state where a support member is attached to the front surface of the device wafer in the second groove forming step of the processing method according to embodiment 2. Fig. 15 is a cross-sectional view schematically showing a main part of a device wafer in a state where a mask is formed on the back surface of the device wafer in the second groove forming step of the processing method according to embodiment 2. Fig. 16 is a cross-sectional view schematically showing a main part of a device wafer in which a second groove is formed in the second groove forming step of the processing method shown in Fig. 3.

[0064] In the second embodiment, in the second groove forming step 102, a support member 11 is attached to the front surface 4 of the device wafer 1 with an adhesive 12, as shown in FIG. 14. In the second embodiment, in the second groove forming step 102, a mask 30 is formed on the back surface 8 of the device wafer 1 so as to cover the entire back surface 8, as shown in FIG. 15. In the second embodiment, when forming the mask 30, a liquid photoresist is applied to the entire back surface 8 of the device wafer 1, and the photoresist applied to the entire back surface 8 is exposed to light using an exposure device. Also, as in the first embodiment, in the present invention, the mask 30 may be formed by, for example, attaching a resist film to the back surface 8 of the device wafer 1.

[0065] In embodiment 2, in the second groove forming step 102, the cutting device 60 shown in Figure 16 suction-holds the front surface 4 of the device wafer 1 on the holding surface of the chuck table via the support member 11, and cuts the cutting edge 62 of the cutting blade 61 rotated around its axis from the back surface 8 side into the center of the width of the street 5 to a depth that does not reach the front surface 4, while moving the cutting blade 61 and the device wafer 1 relatively along the street 5, thereby forming second grooves 22 in the center of the width of each street 5 of the device wafer 1 from the back surface 8 side, the second grooves 22 not reaching the front surface 4.

[0066] In addition, in embodiment 2, in the second groove forming step 102, the cutting edge 62 of the cutting blade 61 having a thickness 63 equal to the distance 211 between the outer sides of the first grooves 21 formed at both ends of each street 5 in the width direction is cut into the center of each street 5 in the width direction.

[0067] (Plasma etching step) Fig. 17 is a cross-sectional view schematically showing a main part of the device wafer in a state where the bottom of the second trench is plasma etched in the plasma etching step of the processing method according to embodiment 2. Fig. 18 is a cross-sectional view schematically showing a main part of the device wafer in a state where the mask has been removed in the plasma etching step of the processing method according to embodiment 2.

[0068] In embodiment 2, in the plasma etching step 103, the etching apparatus 50 adsorbs and holds the front surface 4 of the device wafer 1 on the holding surface 524 of the holding unit 52 via the support member 11, seals the chamber 51, reduces the pressure, and activates the refrigerant circulation mechanism 528 to position the distance between the lower surface of the upper electrode 53 and the device wafer 1 held by the holding unit 52 constituting the lower electrode at a predetermined inter-electrode distance suitable for plasma etching.

[0069] In the second embodiment, in the plasma etching step 103, the etching apparatus 50 alternately supplies first etching gases, ie, C4F8 gas and SF6 gas, from the first etching gas supply source 58, as in the first embodiment, and plasma etches the groove bottoms 23 of the second grooves 22 from the rear surface 8 side by the Bosch method, until the second grooves 22 reach the first grooves 21, and divides the device wafer 1 into individual device chips 10 as shown in FIG. 17.

[0070] In the second embodiment, in the plasma etching step 103, the etching apparatus 50 stops the supply of the first etching gas from the first etching gas supply source 58, and supplies oxygen gas, which is the second etching gas, from the second etching gas supply source 59 for a predetermined time, and removes the mask 30 by ashing with the oxygen gas plasma, as shown in FIG. 18 .

[0071] In the processing method according to the second embodiment, the device layer 3 is divided by plasma etching in a first groove forming step 101, and the substrate 2 is plasma etched in a plasma etching step 103. In addition, in the processing method according to the second embodiment, second grooves 22, i.e., half-cut grooves, are formed from the back surface 8 side in a second groove forming step 102 before the substrate 2 is plasma etched from the back surface 8 side in the plasma etching step 103.

[0072] In this way, in the processing method of embodiment 2, the formation of the second grooves 22 and the plasma etching are performed from the back surface 8 side of the device wafer 1, so that foreign matter generated during the formation of the second grooves 22 can be eliminated by the subsequent plasma etching, and adhesion of foreign matter to the device 6 can be suppressed.

[0073] In addition, the processing method according to the second embodiment forms the second groove 22 by cutting in the second groove forming step 102, and plasma etches the groove bottom 23 of the second groove 22 in the plasma etching step 103 to separate the device chips 10, thereby shortening the processing time.

[0074] As a result, the processing method according to the second embodiment, like the first embodiment, has the effect of suppressing adhesion of foreign matter to the device 6 and shortening the processing time.

[0075] In the present invention, in the second groove forming step 102, the second grooves 22 may be formed by irradiating a laser beam 70 along the first grooves 21, as shown in Fig. 19. Fig. 19 is a cross-sectional view schematically showing a main part of a device wafer in a modified example of the second groove forming step shown in Fig. 8. In Fig. 19, the same parts as those in embodiment 1 are designated by the same reference numerals, and their description will be omitted.

[0076] 19, a focal point 71 is set on the surface of the mask 30 between the first grooves 21, and a laser beam 70 having a wavelength absorbed by the substrate 2, the device layer 3, and the substrate 2 is irradiated to remove the mask 30 and the device layer 3 between the two first grooves 21, and also remove a portion of the substrate 2, thereby forming second grooves 22. Note that while FIG. 19 shows a representative example of a modification of the second groove forming step 102 of the first embodiment, the second groove forming step 102 of the second embodiment is the same as the second groove forming step 102 of the first embodiment except that the focal point 71 is set on the surface of the mask 30 on the back surface 8, and therefore the second groove forming step 102 of the second embodiment is omitted.

[0077] The present invention is not limited to the above-described embodiment. That is, various modifications can be made without departing from the gist of the present invention. In the present invention, the device wafer 1 to be processed does not need to have metal in the TEG 7 or device layer 3 in the width direction of the street 5. In this case, in the first groove forming step 101, it is desirable to form only one first groove 21 in the center of the width direction of the street 5.

[0078] In the present invention, when the second grooves 22 are formed by irradiating a laser beam 70 as shown in FIG. 19, the mask 30 may be made of a water-soluble resin. [Explanation of symbols]

[0079] 1. Device wafer 2 Base material 3 Device Layer 4 surface 5th Street 6 Devices 21 First Groove 22 Second Groove 23 Groove bottom 61 Cutting blade 70 Laser Beam 101 First groove forming step 102 Second groove forming step 103 Plasma Etching Step

Claims

1. A method for processing a device wafer in which device layers constituting devices are stacked on a substrate and devices are formed in each of areas partitioned by a plurality of intersecting streets on the surface, the method comprising: a first groove forming step of forming a first groove along the street by plasma etching to a depth that separates the device layer and cuts into the substrate; a second groove forming step of forming a second groove in the substrate by irradiating a laser beam or cutting with a cutting blade along the first groove after the first groove forming step is performed; a plasma etching step of plasma etching the bottom of the second groove after the second groove forming step is performed.

2. In the first groove forming step, two grooves are formed along the street; The processing method according to claim 1 , wherein the second groove forming step removes the device layer between the two grooves and also removes a part of the substrate.

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