Semiconductor Devices

Abstract

To provide a ferroelectric device having a metal nitride film having good ferroelectricity.SOLUTION: A ferroelectric device includes a conductor 110, an insulator 130 on the conductor 110, a conductor 120 on the insulator 130, an insulator 155 on the conductor 120, and an insulator 152 on the insulator 155. The insulator 155 includes regions in contact with a side surface of the insulator 130, a side surface of the conductor 120, and a top surface thereof, and a metal nitride film used for the insulator 130 has a ferroelectric property and contains a first element, a second element, and nitrogen. The first element is one or more elements selected from Group 13 elements, and the second element is one or more elements selected from Group 13 elements except the first element and Group 2 elements to Group 6 elements. The conductors 110 and 120 each include nitrogen, the insulator 155 includes aluminum and oxygen, and the insulator 152 includes silicon and nitrogen.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One aspect of the present invention relates to a metal nitride film, a ferroelectric device using the metal nitride film, and a manufacturing method thereof. Another aspect of the present invention relates to a transistor, a semiconductor device, and an electronic device. Another aspect of the present invention relates to a manufacturing method of a semiconductor device. Another aspect of the present invention relates to a semiconductor wafer and a module.

[0002] In this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, semiconductor circuits, arithmetic devices, and memory devices are all embodiments of semiconductor devices. Display devices (liquid crystal display devices, light-emitting display devices, etc.), projection devices, lighting devices, electro-optical devices, power storage devices, memory devices, semiconductor circuits, imaging devices, electronic devices, and the like may be considered to include semiconductor devices.

[0003] Note that one aspect of the present invention is not limited to the above technical fields. One aspect of the invention disclosed in this specification relates to an object, a method, or a manufacturing method. Another aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter. [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, and LSIs, CPUs, memories, etc. are mainly used in semiconductor devices. A CPU is an assembly of semiconductor elements that have semiconductor integrated circuits (at least transistors and memories) processed from semiconductor wafers and formed into chips, and on which electrodes serving as connection terminals are formed.

[0005] Semiconductor circuits (IC chips) such as LSIs, CPUs, and memories are mounted on circuit boards, such as printed wiring boards, and are used as components in a variety of electronic devices.

[0006] Furthermore, technology for constructing transistors using semiconductor thin films formed on substrates with insulating surfaces has attracted attention. Such transistors are widely used in electronic devices such as integrated circuits (ICs) and image display devices (also simply referred to as display devices). Silicon-based semiconductor materials and oxide semiconductors are known as semiconductor thin films applicable to transistors.

[0007] Furthermore, as shown in Non-Patent Document 1, research and development of memory arrays using ferroelectrics is being actively conducted. Furthermore, for next-generation ferroelectric memories, as shown in Non-Patent Document 2, research into ferroelectric HfO2-based materials is being actively conducted. Furthermore, in recent years, research into the ferroelectricity of nitride semiconductors of group 13 elements has been reported, as shown in Non-Patent Document 3. [Prior art documents] [Non-patent literature]

[0008] [Non-Patent Document 1] TSBoescke, et al., “Ferroelectricity in hafnium oxide thin films”, APL99, 2011 [Non-patent document 2] Zhen Fan,et al.,“Ferroelectric HfO2-based materials for next-generation ferroelectric memories”,JOURNAL OF ADVANCED DIELECTRICS,Vol.6,No.2,2016 [Non-patent document 3] Simon Fichtner, et al., “AlScN: A III-V semiconductor based ferroelectric”, Journal of Applied Physics, Vol. 125, 114103, 2019 Summary of the Invention [Problem to be solved by the invention]

[0009] As shown in Non-Patent Documents 1 to 3, various research and development efforts are being conducted on ferroelectrics. For example, Non-Patent Document 1 reports that in "orthorhombic phase ferroelectrics," the sign of polarization (P) changes depending on the movement of oxygen atoms. Furthermore, Non-Patent Document 2 reports that the magnitude of polarization and the dielectric constant (ε r ) has been reported to change. 1-x Sc x Ferroelectric switching has been reported to occur in N.

[0010] Therefore, an object of one embodiment of the present invention is to provide a material having good ferroelectricity, that is, a metal nitride film having ferroelectricity. Another object of one embodiment of the present invention is to provide a capacitor using a material that can have ferroelectricity. Another object of one embodiment of the present invention is to provide a transistor using a material that can have ferroelectricity. Another object of one embodiment of the present invention is to provide a capacitor and a diode using a material that can have ferroelectricity. Another object of one embodiment of the present invention is to provide an element using a material that can have ferroelectricity and that uses a tunnel junction.

[0011] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become apparent from the description of the specification, drawings, claims, etc., and it is possible to extract other problems from the description of the specification, drawings, claims, etc. [Means for solving the problem]

[0012] One aspect of the present invention is a ferroelectric device having an insulating film, a first conductor on the insulating film, a metal nitride film on the first conductor, a second conductor on the metal nitride film, a first insulator on the first conductor, on the metal nitride film, and on the second conductor, and a second insulator on the first insulator. The first conductor, the metal nitride film, and the second conductor are surrounded by an insulating film, a first insulator, and a second insulator, the metal nitride film has ferroelectricity, and the metal nitride film contains a first element, a second element, and nitrogen, the first element being one or more elements selected from Group 13 elements, the second element being one or more elements selected from Group 13 elements excluding the first element and Group 2 to Group 6 elements, the first conductor and the second conductor each contain nitrogen, the first insulator contains aluminum and oxygen, and the insulating film and the second insulator each contain silicon and nitrogen.

[0013] Another aspect of the present invention is a ferroelectric device having a first conductor, a metal nitride film on the first conductor, a second conductor on the metal nitride film, a first insulator on the first conductor, on the metal nitride film, and on the second conductor, and a second insulator on the first insulator. The first insulator has a region in contact with a side surface of the metal nitride film, a region in contact with a side surface of the second conductor, and a region in contact with a top surface of the second conductor, the metal nitride film has ferroelectricity, the metal nitride film has a first element, a second element, and nitrogen, the first element is one or more elements selected from Group 13 elements, the second element is one or more elements selected from Group 13 elements excluding the first element and Group 2 to Group 6 elements, each of the first conductor and the second conductor has nitrogen, the first insulator has aluminum and oxygen, and the second insulator has silicon and nitrogen.

[0014] In the above ferroelectric device, the first insulator preferably has an amorphous structure.

[0015] Another aspect of the present invention is a ferroelectric device having an insulating film, a first conductor on the insulating film, a metal nitride film on the first conductor, a second conductor on the metal nitride film, and an insulator on the first conductor, on the metal nitride film, and on the second conductor. The insulator has a region in contact with the top surface of the insulating film, a region in contact with a side surface of the metal nitride film, a region in contact with a side surface of the second conductor, and a region in contact with the top surface of the second conductor, the metal nitride film has ferroelectricity, the metal nitride film has a first element, a second element, and nitrogen, the first element is one or more elements selected from Group 13 elements, the second element is one or more elements selected from Group 13 elements excluding the first element and Group 2 to Group 6 elements, each of the first conductor and the second conductor has nitrogen, and the insulating film and the insulator each have silicon and nitrogen.

[0016] In the above ferroelectric device, the metal nitride film preferably has a wurtzite structure.

[0017] In the above ferroelectric device, the first element is preferably one or more of aluminum (Al), gallium (Ga), and indium (In).

[0018] In the above ferroelectric device, the second element is preferably one or more of boron (B), scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), neodymium (Nd), and europium (Eu).

[0019] Alternatively, in the above ferroelectric device, it is preferable that the first element is aluminum (Al) and the second element is one or more elements selected from lanthanides and actinides.

[0020] Alternatively, in the above ferroelectric device, it is preferable that the first element is aluminum (Al) and the second element is one or more selected from titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), and tantalum (Ta).

[0021] In the above ferroelectric device, the first conductor preferably has crystals with a sodium chloride structure.

[0022] In addition, the ferroelectric device may have a silicon nitride film between the first conductor and the metal nitride film, or a silicon nitride film between the metal nitride film and the second conductor.

[0023] Another embodiment of the present invention is a semiconductor device including the ferroelectric device and a transistor including an oxide semiconductor in a channel formation region.

[0024] Another aspect of the present invention is a metal nitride film having ferroelectricity, the metal nitride film containing aluminum, one or more elements selected from lanthanides and actinides, and nitrogen.

[0025] Another aspect of the present invention is a metal nitride film having ferroelectricity, the metal nitride film containing aluminum, one or more selected from titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), and tantalum (Ta), one or more selected from magnesium (Mg), calcium (Ca), zinc (Zn), etc., and nitrogen. [Effects of the Invention]

[0026] According to one embodiment of the present invention, a material having good ferroelectricity, i.e., a metal nitride film having ferroelectricity, can be provided. Alternatively, according to one embodiment of the present invention, a capacitor element using a material that can have ferroelectricity can be provided. Alternatively, according to one embodiment of the present invention, a transistor using a material that can have ferroelectricity can be provided. Alternatively, according to one embodiment of the present invention, a capacitor element and a diode using a material that can have ferroelectricity can be provided. Alternatively, according to one embodiment of the present invention, an element using a material that can have ferroelectricity and a tunnel junction can be provided.

[0027] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract other effects from the description in the specification, drawings, claims, etc. [Brief explanation of the drawings]

[0028] [Figure 1] 1A to 1C are cross-sectional views of a capacitor according to one embodiment of the present invention. [Figure 2] 2A to 2C are diagrams for explaining the atomic arrangement of a metal nitride, and Fig. 2D and Fig. 2E are diagrams for explaining a calculation model. [Figure 3] 3A and 3B are diagrams for explaining the calculation results. [Figure 4] 4A to 4C are schematic diagrams of a ferroelectric substance included in a capacitive element. [Figure 5] 5A to 5C are cross-sectional views illustrating a method for manufacturing a capacitor according to one embodiment of the present invention. [Figure 6] Fig. 6A is a diagram showing a film formation sequence for a metal nitride film according to one embodiment of the present invention, Fig. 6B is a cross-sectional view of a metal nitride film manufacturing apparatus according to one embodiment of the present invention, and Fig. 6C is a diagram showing a film formation sequence for an oxide. [Figure 7]7A1, 7B1, and 7C1 are circuit diagrams of semiconductor devices according to one embodiment of the present invention, and FIGS. 7A2, 7B2, 7C2, 7C3, and 7C4 are cross-sectional views of semiconductor devices according to one embodiment of the present invention. [Figure 8] 8A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 8B to 8D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 9] 9A and 9B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 10] Figure 10A is a diagram explaining the classification of IGZO crystal structures, Figure 10B is a diagram explaining the XRD spectrum of a CAAC-IGZO film, and Figure 10C is a diagram explaining the electron microbeam diffraction pattern of a CAAC-IGZO film. [Figure 11] 11A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 11B and 11C are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 12] 12A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 12B to 12D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 13] 13A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 13B to 13D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 14] 14A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 14B to 14D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 15] 15A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 15B to 15D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 16] 16A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 16B to 16D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 17]17A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 17B to 17D are cross-sectional views illustrating the method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 18] 18A and 18B are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 19] 19A to 19D are cross-sectional views of a capacitor according to one embodiment of the present invention. [Figure 20] 20A to 20C are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 21] 21A to 21C are cross-sectional views showing the configuration of an element according to one embodiment of the present invention. [Figure 22] FIG. 22 is a cross-sectional view illustrating a structure of a memory device according to one embodiment of the present invention. [Figure 23] FIG. 23 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 24] 24A and 24B are cross-sectional views illustrating the configuration of a memory device according to one embodiment of the present invention. [Figure 25] FIG. 25 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 26] FIG. 26 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 27] 27A and 27B are cross-sectional views illustrating the structure of a memory device according to one embodiment of the present invention. [Figure 28] 28A and 28B are block diagrams illustrating a configuration example of a memory device according to one embodiment of the present invention, and perspective views illustrating a configuration example of a memory device according to one embodiment of the present invention. [Figure 29] Fig. 29A is a circuit diagram showing an example of the configuration of a memory cell. Fig. 29B1 is a graph showing an example of the hysteresis characteristic of a ferroelectric layer. Fig. 29B2 is a graph showing an example of the hysteresis characteristic of an ideal ferroelectric layer. Fig. 29C is a timing chart showing an example of a method for driving a memory cell. [Figure 30]30A to 30E are schematic diagrams of a memory device according to one embodiment of the present invention. [Figure 31] 31A to 31H are diagrams illustrating electronic devices according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0029] Hereinafter, embodiments will be described with reference to the drawings. However, it will be readily understood by those skilled in the art that the embodiments can be implemented in many different ways and that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the following embodiments.

[0030] In addition, in the drawings, sizes, layer thicknesses, or regions may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The drawings are schematic representations of ideal examples and are not limited to the shapes or values ​​shown in the drawings. For example, in actual manufacturing processes, layers, resist masks, etc. may unintentionally be thinned by processes such as etching, but this may not be reflected in the drawings to facilitate understanding. In addition, in the drawings, the same symbols are used for identical parts or parts having similar functions across different drawings, and repeated explanations may be omitted. When referring to similar functions, the same hatch pattern may be used and no particular symbol may be assigned.

[0031] In order to make the invention easier to understand, particularly in top views (also called "plan views") and perspective views, some components may be omitted from the drawings. Also, some hidden lines may be omitted from the drawings.

[0032] In addition, in this specification, ordinal numbers such as first, second, etc. are used for convenience and do not indicate the order of processes or stacking. Therefore, for example, "first" can be appropriately replaced with "second" or "third," etc. in the description. Furthermore, the ordinal numbers used to identify one embodiment of the present invention may not match the ordinal numbers used in this specification.

[0033] Furthermore, in this specification, terms indicating arrangement such as "above" and "below" are used for convenience in describing the positional relationship between components with reference to the drawings. Furthermore, the positional relationship between components changes as appropriate depending on the direction in which each component is depicted. Therefore, the terms are not limited to those described in the specification, and can be rephrased appropriately depending on the situation.

[0034] For example, if it is explicitly stated in this specification that X and Y are connected, it is assumed that the specification also discloses cases in which X and Y are electrically connected, cases in which X and Y are functionally connected, and cases in which X and Y are directly connected. Therefore, it is not limited to a specific connection relationship, for example, a connection relationship shown in a figure or text, and it is assumed that connections other than those shown in a figure or text are also disclosed in a figure or text. Here, X and Y are assumed to be objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0035] In this specification and the like, a transistor is an element having at least three terminals including a gate, a drain, and a source. A transistor has a region (hereinafter also referred to as a channel formation region) where a channel is formed between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and a current can flow between the source and the drain through the channel formation region. In this specification and the like, the channel formation region refers to a region through which a current mainly flows.

[0036] Furthermore, the functions of the source and drain may be interchanged when transistors of different polarities are used, or when the direction of current flow changes during circuit operation, etc. For this reason, in this specification and the like, the terms source and drain may be used interchangeably.

[0037] Note that the channel length refers to, for example, a region where the semiconductor (or a portion in the semiconductor through which current flows when the transistor is on) and the gate electrode overlap in a top view of a transistor, or the distance between the source (source region or source electrode) and the drain (drain region or drain electrode) in the channel formation region. Note that the channel length of one transistor does not necessarily have the same value in all regions. That is, the channel length of one transistor may not be fixed to a single value. Therefore, in this specification, the channel length is defined as any one value, maximum value, minimum value, or average value in the channel formation region.

[0038] The channel width refers to, for example, the length of a channel formation region in a region where a semiconductor (or a portion of the semiconductor through which current flows when the transistor is on) and a gate electrode overlap in a top view of a transistor, or the length of the channel formation region in a direction perpendicular to the channel length direction in the channel formation region. Note that the channel width of a single transistor does not necessarily have the same value in all regions. That is, the channel width of a single transistor may not be determined to a single value. Therefore, in this specification, the channel width refers to any one value, maximum value, minimum value, or average value in the channel formation region.

[0039] In this specification and the like, depending on the structure of a transistor, the channel width in a region where a channel is actually formed (hereinafter also referred to as an "effective channel width") may differ from the channel width shown in a top view of the transistor (hereinafter also referred to as an "apparent channel width"). For example, when a gate electrode covers the side surface of a semiconductor, the effective channel width may be larger than the apparent channel width, and the influence thereof may not be negligible. For example, in a fine transistor in which a gate electrode covers the side surface of a semiconductor, the proportion of the channel formation region formed on the side surface of the semiconductor may be large. In such a case, the effective channel width is larger than the apparent channel width.

[0040] In such cases, it may be difficult to estimate the effective channel width by actual measurement. For example, in order to estimate the effective channel width from the design value, it is necessary to assume that the shape of the semiconductor is known. Therefore, if the shape of the semiconductor is not accurately known, it is difficult to accurately measure the effective channel width.

[0041] In this specification, when simply referred to as a channel width, it may refer to an apparent channel width. Alternatively, when simply referred to as a channel width, it may refer to an effective channel width. Note that the values ​​of the channel length, channel width, effective channel width, apparent channel width, etc. can be determined by analyzing a cross-sectional TEM image, for example.

[0042] Note that impurities in semiconductors refer to, for example, elements other than the main components constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic % can be considered an impurity. The presence of impurities can, for example, increase the defect state density of the semiconductor, or reduce the crystallinity. When the semiconductor is an oxide semiconductor, impurities that change the characteristics of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main components of the oxide semiconductor, such as hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. Note that water can also function as an impurity. For example, the inclusion of impurities can cause oxygen deficiency (V) in the oxide semiconductor. O :oxygen vacancy) may be formed.

[0043] In this specification and the like, an oxynitride refers to a material whose composition contains more oxygen than nitrogen. For example, silicon oxynitride has a composition whose content of oxygen is higher than that of nitrogen. Furthermore, a nitride oxide refers to a material whose composition contains more nitrogen than that of oxygen. For example, silicon nitride oxide has a composition whose content of nitrogen is higher than that of oxygen.

[0044] In this specification and the like, the term "insulator" can be replaced with an insulating film or an insulating layer, the term "conductor" can be replaced with a conductive film or a conductive layer, and the term "semiconductor" can be replaced with a semiconductor film or a semiconductor layer.

[0045] Furthermore, in this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10 degrees or more and 10 degrees or less. Therefore, it also includes cases in which the angle is -5 degrees or more and 5 degrees or less. Furthermore, "substantially parallel" refers to a state in which two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less. Furthermore, "perpendicular" refers to a state in which two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it also includes cases in which the angle is 85 degrees or more and 95 degrees or less. Furthermore, "substantially perpendicular" refers to a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.

[0046] In this specification and the like, the term "metal oxide" refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as "oxide semiconductors" or simply as "OSs"). For example, when a metal oxide is used in a semiconductor layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. In other words, an OS transistor can be rephrased as a transistor including a metal oxide or an oxide semiconductor.

[0047] Furthermore, in this specification and the like, normally off means that when no potential is applied to the gate or when a ground potential is applied to the gate, the drain current flowing through the transistor per 1 μm of channel width is 1×10 -20 A or less, 1 x 10 at 85°C -18 A or less, or 1 x 10 at 125°C -16 This means that it is A or below.

[0048] In addition, in this specification, when upper and lower limit values ​​are specified, it is also considered that a configuration in which the upper limit values ​​and the lower limit values ​​are freely combined is also disclosed.

[0049] In this specification, a barrier insulating film refers to an insulating film having barrier properties. In this specification, the barrier properties refer to a function of suppressing the diffusion of a corresponding substance (also referred to as low permeability) or a function of capturing or fixing a corresponding substance (also referred to as gettering).

[0050] Furthermore, in this specification, expressions such as "A covers B," "A wraps B," or "A wraps and covers B" do not necessarily mean that the entirety of B is hidden by A. Expressions such as "A covers B," "A wraps B," or "A wraps and covers B" also include a state in which part of B is exposed from A. Furthermore, in this specification, the expression "A covers B" can be rephrased as "A wraps B" or "A wraps and covers B."

[0051] (Embodiment 1) In this embodiment, configuration examples of a capacitor and a ferroelectric device according to one embodiment of the present invention will be described with reference to FIGS.

[0052] <Capacitor element configuration> 1A, a capacitor 100 according to one embodiment of the present invention includes a conductor 110, a conductor 120, and an insulator 130 sandwiched between the conductors 110 and 120. For example, the conductor 110 may be disposed over the insulator 105, the insulator 130 may be disposed over the conductor 110, and the conductor 120 may be disposed over the insulator 130. Here, the conductor 110 functions as a lower electrode of the capacitor 100, the conductor 120 functions as an upper electrode of the capacitor 100, and the insulator 130 functions as a dielectric of the capacitor 100.

[0053] 1A, the insulator 152 is disposed so as to surround the capacitive element 100, and the insulator 155 is disposed at least between the insulator 152 and the insulator 130. For example, as shown in FIG. 1A, the insulator 155 is disposed so as to surround the conductor 110, the insulator 130, and the conductor 120, and the insulator 152 is disposed so as to surround the insulator 155. In this case, the insulator 155 may be in contact with the insulator 105 in a region that does not overlap with the conductor 110. Also, as shown in FIG. 1A, the insulator 155 has regions that are in contact with the side surface of the conductor 110, the side surface of the insulator 130, the side surface of the conductor 120, and the top surface of the conductor 120.

[0054] Here, at least one of the insulators 152 and 155 functions as a barrier insulating film against hydrogen. The insulator 152 functions as a barrier insulating film against hydrogen and substances to which hydrogen is bonded (for example, OH - Therefore, the insulator 152 has a function of suppressing the diffusion of at least one of hydrogen and substances to which hydrogen is bonded (e.g., OH - The insulator 155 has a high ability to suppress the diffusion of at least one of hydrogen and a substance to which hydrogen is bonded (such as hydrogen and hydrogen-containing gas). The insulator 155 also has a function of capturing or fixing (also referred to as gettering) at least one of hydrogen and a substance to which hydrogen is bonded. Therefore, the insulator 155 has a higher ability to capture or fix at least one of hydrogen and a substance to which hydrogen is bonded than the insulator 130.

[0055] The insulator 130 is preferably made of a material that can exhibit ferroelectricity. One example of a ferroelectric material is a metal nitride with a wurtzite structure (space group: P63mc). In a wurtzite structure, spontaneous polarization occurs along the c-axis. Furthermore, depending on the type and combination of cations located at the cation sites of the wurtzite structure, the polarity of polarization can be reversed by an external electric field within a range that does not cause dielectric breakdown. It is believed that changing the direction or strength of the external electric field causes some of the nitrogen atoms in the metal nitride to move, changing the sign of the polarization generated inside. At this time, ferroelectricity is exhibited.

[0056] In view of the above, a metal nitride having a first element, a second element, and nitrogen can have ferroelectricity. Here, the first element is one or more elements selected from the Group 13 elements. The second element is an element that lowers the barrier (also called the inversion barrier) for reversing the polarization. For example, a metal nitride mainly containing the second element can preferably have a crystal structure other than a wurtzite structure, and more preferably a layered hexagonal structure (space group: P63 / mmc) or a sodium chloride structure (NaCl structure, space group: Fm-3m). Specifically, the second element is one or more elements selected from the Group 13 elements excluding the first element, the Group 2 elements to the Group 6 elements, etc. Metal nitrides mainly containing the first element tend to have a wurtzite crystal structure. Furthermore, when the metal nitride contains a second element, the polarity of the metal nitride may be reversed by an external electric field in a range that does not cause dielectric breakdown.

[0057] An example of a material that can have ferroelectricity is a metal nitride having elements M1, M2, and nitrogen. The element M1 corresponds to the first element, and the element M2 corresponds to the second element. Here, the element M1 is one or more elements selected from aluminum (Al), gallium (Ga), indium (In), etc. The element M2 is one or more elements selected from boron (B), rare earth elements, and actinides (15 elements from actinium (Ac) to lawrencium (Lr)). Since rare earth elements are a collective term for scandium (Sc), yttrium (Y), and lanthanides (15 elements from lanthanum (La) to lutetium (Lu)), the element M2 is one or more elements selected from boron (B), scandium (Sc), yttrium (Y), lanthanides, and actinides. In particular, element M2 is preferably one or more selected from boron (B), scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), neodymium (Nd), and europium (Eu). The ratio of the sum of the atomic numbers of elements M1 and M2 to the number of nitrogen atoms may be 1:1 or close to 1:1. Close to 1:1 includes a range of ±30% of the desired atomic ratio. The ratio of the atomic number of element M1 to the atomic number of element M2 can be set appropriately. For example, the atomic number of element M1 is preferably greater than the atomic number of element M2, and more preferably 1.5 times or more the atomic number of element M2. The ratio of the atomic number of element M1 to the atomic number of element M2 is preferably within a range in which a metal nitride can form a solid solution. When two or more elements are selected from aluminum, gallium, indium, etc. as the element M1, a metal nitride having the element M1 and nitrogen may have ferroelectricity even if it does not contain the element M2.

[0058] Representative examples of metal nitrides containing elements M1, M2, and nitrogen include aluminum scandium nitride (Al 1-a Sc a N b (where a is a real number greater than 0 and less than 0.5, and b is 1 or a value close to 1.)), Al-Ga-Sc nitride (Al1-c-d Ga c Sc d N b (c and d are each a positive real number, c+d is greater than 0 and less than 0.5, and b is 1 or a value close to 1.)), and Ga—Sc nitride (Ga 1-e Sc e N b (e is a real number greater than 0 and less than 1, and b is 1 or a value close to 1.) In other words, materials that can have ferroelectric properties include materials containing aluminum nitride and / or scandium nitride.

[0059] In some cases, Al-Ga-Sc nitride may be preferable to aluminum scandium nitride as a material that can exhibit ferroelectricity. The ionic radius of gallium is larger than that of aluminum but smaller than that of scandium. Therefore, it is speculated that adding gallium to aluminum scandium nitride can adjust the crystal structure and lattice constant of aluminum scandium nitride to facilitate the development of ferroelectricity. Therefore, Al-Ga-Sc nitride is expected to exhibit ferroelectricity. Furthermore, the band gap of gallium nitride is smaller than that of aluminum nitride but larger than that of scandium nitride. Therefore, adding gallium to aluminum scandium nitride improves the insulating properties of scandium aluminum nitride, allowing it to be used in ferroelectric devices, as described below.

[0060] Another example of a material that may exhibit ferroelectricity is a metal nitride having an element M1, an element M3, and nitrogen. The element M1 corresponds to the first element, and the element M3 corresponds to the second element. Here, the element M1 is one or more elements selected from aluminum (Al), gallium (Ga), indium (In), etc. The element M3 is one or more elements selected from titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), etc. In metal nitrides of titanium, zirconium, hafnium, vanadium, niobium, tantalum, or chromium, the valence of these metal elements is +3. Therefore, in a metal nitride having the element M1, the element M3, and nitrogen, the valence of the element M3 may also be +3. Therefore, when the ratio of the sum of the number of atoms of element M1 and element M3 to the number of nitrogen atoms is 1:1 or close to 1:1, the electrical neutrality of the metal nitride may be maintained.

[0061] The metal nitride having the elements M1, M3, and nitrogen may also contain an element M4. The element M4 is an element capable of maintaining the electrical neutrality of the metal nitride. The element M4 is, for example, an element that easily assumes a valence of +1 or a valence of +2. Specifically, the element M4 is one or more elements selected from the group consisting of sodium (Na), potassium (K), rubidium (Ru), cesium (Cs), magnesium (Mg), calcium (Ca), strontium (Sr), zinc (Zn), and cadmium (Cd). Titanium, zirconium, hafnium, vanadium, niobium, tantalum, and chromium, which are exemplified as the element M3, can assume a valence of +4 or higher. Therefore, it is presumed that the electrical neutrality of the metal nitride is maintained by including the element M4, which can maintain the electrical neutrality of the metal nitride. The ratio of the number of atoms of element M3 to element M4 can be appropriately set depending on the type of element selected as element M3 or element M4. For example, when element M4 is an element that easily assumes a +2 valence (e.g., Mg, Ca, Sr, Zn, Cd, etc.) and element M3 is an element that can assume a +4 valence (e.g., Ti, Zr, Hf, etc.), the ratio of the number of atoms of element M4 to the number of atoms of element M3 is preferably 1:1 or close to 1:1. Alternatively, when element M4 is an element that easily assumes a +2 valence and element M3 is an element that can assume a +5 valence (e.g., V, Nb, Ta, etc.), the ratio of the number of atoms of element M4 to the number of atoms of element M3 is preferably 2:1 or close to 2:1. Alternatively, when element M4 is an element that easily assumes a valence of +1 (such as Na, K, Ru, or Cs) and element M3 is an element that can assume a valence of +5, the ratio of the number of atoms of element M4 to the number of atoms of element M3 is preferably 1:1 or close to 1:1. The ratio of the number of atoms of element M1, element M3, and element M4 can be set appropriately. For example, the number of atoms of element M1 is preferably greater than the sum of the numbers of atoms of element M3 and element M4.

[0062] Furthermore, a metal nitride having elements M1, M2, and nitrogen may contain element M3 or M4. In this case, the ratio of the number of atoms of element M3 or M4 to the sum of the number of atoms of elements M1 and M2 is preferably 0.05 or less, more preferably 0.02 or less. This can suppress the number of defects formed to maintain the electrical neutrality of the metal nitride. Reducing the number of defects improves the crystallinity of the metal nitride, making it easier for ferroelectricity to be exhibited.

[0063] Furthermore, a metal nitride having elements M1, M3, and nitrogen may contain element M2. In this case, there is no particular limitation on the ratio of the sum of the numbers of atoms of elements M1 and M3 to the number of atoms of element M2. This is because the electrical neutrality of the metal nitride is maintained even if element M2 is contained in the metal nitride.

[0064] Furthermore, a metal nitride having elements M1, M3, M4, and nitrogen may contain element M2. In this case, there is no particular limitation on the ratio of the sum of the numbers of atoms of elements M1, M3, and M4 to the number of atoms of element M2. This is because the electrical neutrality of the metal nitride is maintained even if element M2 is contained in the metal nitride.

[0065] Since the metal nitrides contain at least a Group 13 element and nitrogen, which is a Group 15 element, the metal nitrides are sometimes called Group III-V ferroelectrics or Group III nitride ferroelectrics.

[0066] <Calculations for materials that may have ferroelectric properties> Materials that can exhibit ferroelectricity will be explained using the results of first-principles calculations. Here, metal nitrides will be used as examples of materials that can exhibit ferroelectricity.

[0067] The atomic arrangements of metal nitrides are shown in Figures 2A to 2C. Figures 2A and 2C show the atomic arrangements of a wurtzite structure, and Figure 2B shows the atomic arrangement of a layered hexagonal structure. In Figures 2A to 2C, white spheres represent cations (cation sites), and black spheres represent nitrogen (N) (nitrogen (N) sites). The arrows in Figures 2A to 2C indicate the c-axis direction of the crystal structure of the metal nitride. The plane perpendicular to the c-axis is the ab-plane of the crystal structure of the metal nitride.

[0068] As described above, metal nitrides with a wurtzite structure exhibit polarization along the c-axis. For example, when a metal nitride has the atomic configuration shown in FIG. 2A, polarization occurs along the c-axis. Furthermore, the polarity of the polarization of metal nitrides can be reversed by applying an external electric field within a range that does not cause dielectric breakdown. For example, the polarity of the polarization of a metal nitride can be reversed by changing the atomic configuration from that shown in FIG. 2A to that shown in FIG. 2C.

[0069] 2A and 2C, it is presumed that the polarization polarity is reversed when nitrogen atoms move across a layer that is parallel to the ab plane and contains cations. In other words, it is presumed that during the process of the polarization polarity reversal, the metal nitride temporarily has an atomic configuration in which nitrogen atoms are located in a layer that is parallel to the ab plane and contains cations. During the process of the polarization polarity reversal, the metal nitride temporarily has, for example, the atomic configuration shown in FIG. 2B. In other words, it is presumed that the polarization polarity is reversed when the metal nitride changes from the atomic configuration shown in FIG. 2A to the atomic configuration shown in FIG. 2B via the atomic configuration shown in FIG. 2C.

[0070] The lower the barrier for reversing the polarity of polarization (also called the inversion barrier), the easier it is for the polarity of polarization to be reversed. Therefore, using a calculation model of the wurtzite structure and a calculation model of the layered hexagonal structure, we calculated the inversion barrier for the type and ratio of atoms located at the cation site using first-principles calculations.

[0071] First, the calculation model used in the first-principles calculation will be described.

[0072] First, a unit cell with a wurtzite structure and a unit cell with a layered hexagonal structure are prepared. In both of these unit cells, the ratio of cations to nitrogen is 1:1 (atomic ratio). Next, each of the two unit cells is expanded to create a supercell with 32 atoms. In this case, the number of cations (cation sites) contained in the supercell is 16, and the number of nitrogens (nitrogen sites) contained in the supercell is 16. From the above, a supercell with a wurtzite structure and a supercell with a layered hexagonal structure can be prepared.

[0073] The two supercells are shown in Figures 2D and 2E. The supercell shown in Figure 2D has a wurtzite crystal structure, and the periodicity of the atomic arrangement is the same as that of the structure shown in Figure 2A. The calculation model shown in Figure 2E has a layered hexagonal crystal structure, and the periodicity of the atomic arrangement is the same as that of the structure shown in Figure 2B. The arrows in Figures 2D and 2E indicate the c-axis direction of the supercell's crystal structure. The plane perpendicular to the c-axis is the ab-plane of the supercell's crystal structure.

[0074] Next, in each of the two supercells, aluminum atoms (Al) or metal atoms other than aluminum atoms are placed in each cation site to create a calculation model with a wurtzite structure and a calculation model with a layered hexagonal structure. Hereafter, metal atoms other than aluminum atoms are referred to as atoms M0. The ratio of the number of atoms M0 placed in cation sites in the calculation model to the total number of cation sites in the calculation model is defined as a [%]. For example, if atoms M0 are placed in one cation site in the calculation model, the ratio is 6.25% (1 / 16).

[0075] Next, 20 calculation models of the wurtzite structure and 20 calculation models of the layered hexagonal structure were created by varying the type of atom M0 and / or the ratio a. In this calculation, the atom M0 is scandium (Sc), titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), or tantalum (Ta). The ratio a is 6.25%, 12.5%, 25%, or 50%. One of the 20 calculation models is a calculation model in which aluminum atoms are located at all cation sites.

[0076] For each of the 40 calculation models, structural optimization is performed using first-principles calculations. The first-principles calculation software VASP (The Vienna Ab initio simulation) is used for the first-principles calculations. The calculation conditions are shown in Table 1.

[0077] [Table 1]

[0078] The electronic state pseudopotential was generated by the Projector Augmented Wave (PAW) method, and the functional was GGA / PBE (Generalized-Gradient-Approximation / Perdew-Burke-Ernzerhof). Symmetry was also taken into account.

[0079] Furthermore, the structure of the computational model is optimized by repeatedly performing a calculation to fix the shape and volume of the cell and optimize the atomic coordinates, and a calculation to optimize the shape and volume of the cell and the atomic coordinates.

[0080] The inversion barrier is calculated using a calculation model of the layered hexagonal structure after structural optimization and a calculation model of the wurtzite structure after structural optimization. Specifically, the inversion barrier is calculated by subtracting the total energy calculated based on the calculation model of the layered hexagonal structure after structural optimization from the total energy calculated based on the calculation model of the wurtzite structure after structural optimization, and dividing this value by 16.

[0081] Figure 3A shows the inversion barrier calculated using a calculation model with a ratio a of 6.25%. In Figure 3A, the horizontal axis represents the atom M0, and the vertical axis represents the inversion barrier [meV / fu] (fu: formula unit). For comparison, Figure 3A also shows the inversion barrier calculated using a calculation model in which aluminum atoms are placed at all cation sites (a calculation model with a ratio a of 0%). The calculation model with a ratio a of 0% is referred to as the calculation model in which the atom M0 is Al.

[0082] 3A suggests that the inversion barrier is lowered by adding Sc, Ti, Zr, Hf, V, Nb, or Ta to aluminum nitride. In particular, it suggests that the inversion barrier is further lowered when the atoms added to aluminum nitride are Ti, V, Nb, or Ta. Therefore, it is presumed that a metal nitride containing one or more selected from Sc, Ti, Zr, Hf, V, Nb, and Ta, Al, and nitrogen may have ferroelectricity.

[0083] Next, the relationship between the ratio a and the inversion barrier will be described with reference to FIG. 3B. FIG. 3B is a diagram illustrating the relationship between the ratio a and the inversion barrier. The inversion barrier shown in FIG. 3B was calculated using a calculation model in which the atom M0 is Sc, Ti, Nb, or Ta. In FIG. 3B, the horizontal axis represents the ratio a [%], and the vertical axis represents the inversion barrier [meV / fu]. Note that when structural optimization is performed on a calculation model with a wurtzite structure in which the ratio a is 50% and the atom M0 is Ti, Nb, or Ta, the structure changes to a layered hexagonal structure. Therefore, it is difficult to calculate the inversion barrier using a calculation model in which the ratio a is 50% and the atom M0 is Ti, Nb, or Ta. Therefore, the inversion barrier for the calculation model in which the ratio a is 50% and the atom M0 is Ti, Nb, or Ta is not plotted in FIG. 3B.

[0084] Figure 3B confirms that the inversion barrier tends to decrease as the ratio a increases. It also suggests that polarization may not occur when the atom M0 is Ti, Nb, or Ta and the ratio a is 50%. Therefore, it is presumed that a metal nitride containing Ti, Nb, or Ta, Al, and nitrogen can have ferroelectricity by increasing the number of Al atoms relative to the number of Ti, Nb, or Ta atoms.

[0085] The above is an explanation of materials that can have ferroelectricity using the results of first-principles calculations.

[0086] As a material capable of exhibiting ferroelectricity, for example, a mixture or compound made of multiple materials selected from the materials listed above can be used. Alternatively, the insulator 130 can have a layered structure made of multiple materials selected from the materials listed above. However, since the crystal structure (characteristics) of the materials listed above may change depending not only on the film formation conditions but also on various processes, in this specification, not only materials that exhibit ferroelectricity are referred to as ferroelectrics, but also as materials capable of exhibiting ferroelectricity. Furthermore, the term ferroelectric includes not only materials that exhibit ferroelectricity but also materials capable of exhibiting ferroelectricity.

[0087] Among these, the above-mentioned metal nitrides, particularly materials containing aluminum nitride and / or scandium nitride, are preferred as materials capable of exhibiting ferroelectricity because they can retain ferroelectricity even when processed into thin films of a few nanometers. The film thickness of the insulator 130 can be 100 nm or less, preferably 50 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less (typically, 2 nm to 9 nm). For example, a film thickness of 8 nm to 12 nm is preferred. By using a ferroelectric material with a thickness as described above, it is possible to achieve a thin film and exhibit ferroelectricity. By using a ferroelectric layer that can be thinned, the capacitor element 100 can be combined with semiconductor elements such as miniaturized transistors to form a semiconductor device. Note that, in this specification and elsewhere, a layer of a material capable of exhibiting ferroelectricity may be referred to as a ferroelectric layer or a metal nitride film. Furthermore, a device having such a ferroelectric layer (metal nitride film) may be referred to as a ferroelectric device in this specification and elsewhere.

[0088] By using the above-mentioned metal nitride layer for the insulator 130, it is possible to prevent the conductors 110 and 120 from being oxidized and their conductivity from decreasing.

[0089] Ferroelectric materials are insulators that exhibit polarization when an external electric field is applied, and the polarization remains even when the electric field is removed. Therefore, a nonvolatile memory element can be formed using a capacitance element (hereinafter sometimes referred to as a ferroelectric capacitor) that uses such a material as a dielectric. A nonvolatile memory element using a ferroelectric capacitor is sometimes called a ferroelectric random access memory (FeRAM) or a ferroelectric memory. For example, a ferroelectric memory can have a transistor and a ferroelectric capacitor, with one of the source and drain of the transistor electrically connected to one terminal of the ferroelectric capacitor. Therefore, the capacitance element 100 described in this embodiment and a semiconductor device using a transistor can function as a ferroelectric memory.

[0090] 4A to 4C show enlarged views of the vicinity of the insulator 130 that functions as a ferroelectric layer, as shown in FIG. 1A and the like.

[0091] Insulator 130 preferably has a crystalline structure in which crystals form layers and the layers are stacked, as shown in Fig. 4A. Furthermore, the layers preferably have a single crystal structure. Note that the dashed lines in insulator 130 shown in Fig. 4A indicate the crystalline layers, and arrow 132 indicates the c-axis of the crystals.

[0092] The crystalline layers contained in the insulator 130 extend in the ab-plane direction. The crystalline layers contained in the insulator 130 grow in the c-axis direction (sometimes called axial growth), with multiple crystalline layers stacked in the c-axis direction. The c-axis preferably faces a direction approximately perpendicular to the surface on which the insulator 130 is formed or the top surface. For example, the angle θ formed by the arrow 132 and the normal to the top surface of the conductor 110 is preferably 30° or less, and more preferably 5° or less.

[0093] Although the above description has been given of an example in which a ferroelectric layer having a single crystal structure as shown in FIG. 4A etc. is used as the insulator 130, the present invention is not limited to this. For example, as shown in FIG. 4B, the insulator 130 may have a polycrystalline structure having multiple grains 136 with different crystallinity. Here, at least a portion of the multiple grains 136 preferably has a hexagonal crystal structure, more preferably a wurtzite structure. Having at least a portion of the multiple grains 136 have a hexagonal crystal structure is preferable because it allows the insulator 130 to exhibit ferroelectricity.

[0094] Alternatively, the insulator 130 may have a layer 138a having a single crystal structure and a polycrystalline layer 138b. For example, as shown in FIG. 4C , a plurality of layers 138a having a single crystal structure and a plurality of polycrystalline layers 138b may be stacked on the conductor 110.

[0095] The insulator 130 preferably has a hexagonal crystal structure because it exhibits ferroelectricity. Alternatively, the insulator 130 may have an amorphous structure. Alternatively, the insulator 130 may have a composite structure having an amorphous structure and a crystalline structure.

[0096] Furthermore, to form an insulator 130 with good crystallinity, it is preferable that impurities such as hydrogen, carbon, hydrocarbon, or chlorine are reduced in the insulator 130. Here, the above impurities do not refer only to single atoms. It is also preferable that substances bonded to the above impurity elements are reduced in the insulator 130. For example, it is preferable that substances bonded to hydrogen (e.g., OH -It is also preferable that impurities such as hydrogen, chlorine, and the like are reduced. These impurities may form nitrogen vacancies in the crystals of the insulator 130. Furthermore, impurity elements such as hydrogen may bond to the nitrogen vacancies, reducing the crystallinity of the insulator 130. Therefore, the presence of these impurities in the insulator 130 may hinder the crystallization of the insulator 130. As described above, the displacement of nitrogen by an external electric field results in the development of ferroelectricity. Therefore, to improve the ferroelectricity of the insulator 130, it is preferable to reduce impurities such as hydrogen, carbon, hydrocarbons, and chlorine.

[0097] Therefore, it is preferable to use a material that does not contain impurities such as hydrogen, carbon, hydrocarbon, or chlorine, or that contains very little of these impurities, for the insulator 130. For example, the concentration of hydrogen contained in the insulator 130 is 5×10 20 atoms / cm 3 Less than 1×10 is preferred 20 atoms / cm 3 For example, the concentration of hydrocarbons contained in the insulator 130 is preferably 5×10 20 atoms / cm 3 Less than 1×10 is preferred 20 atoms / cm 3 Less than 5×10 is preferable. 19 atoms / cm 3 For example, the concentration of carbon contained in the insulator 130 is preferably 5×10 20 atoms / cm 3 Less than 1×10 is preferred 20 atoms / cm 3 Less than 5×10 is preferable. 19 atoms / cm 3 For example, the concentration of chlorine contained in the insulator 130 is preferably 5×10 21 atoms / cm 3 Less than 1×10 is preferred 21 atoms / cm 3 Less than 5×10 is preferable. 20 atoms / cm 3 The following is even more preferred:

[0098] The above-mentioned impurities can be quantified using secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), or Auger electron spectroscopy (AES). For example, the impurities such as hydrogen, carbon, hydrocarbon, or chlorine in the insulator 130 can be quantified using SIMS analysis.

[0099] Therefore, in one embodiment of the present invention, an insulator 152 is provided to surround the capacitor 100, and an insulator 155 is provided between the insulator 152 and the insulator 130. The insulator 152 can prevent impurities such as hydrogen from diffusing from the outside of the insulator 152 to the insulator 130. Furthermore, the insulator 155 can capture or fix impurities such as hydrogen present in a region surrounded by the insulator 152, thereby reducing the concentration of impurities such as hydrogen in the insulator 130.

[0100] For example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, silicon nitride oxide, or the like can be used as the insulator 152 and the insulator 155. For example, silicon nitride (SiN x : x is any number greater than 0.) is preferably used. In this case, the insulator 152 is an insulator containing at least nitrogen and silicon.

[0101] Furthermore, it is preferable to use an oxide having an amorphous structure as the insulator 155, which has a high ability to capture or fix impurities such as hydrogen. For example, aluminum oxide (AlO x :x is any number greater than 0), or magnesium oxide (MgO yIt is preferable to use a metal oxide such as aluminum oxide (where y is any number greater than 0). When aluminum oxide is used for the insulator 155, the insulator 155 contains at least oxygen and aluminum. In such a metal oxide having an amorphous structure, oxygen atoms have dangling bonds, and the dangling bonds may have the property of capturing or fixing hydrogen. By using such a metal oxide having an amorphous structure as a component of the capacitor 100 or providing it around the capacitor 100, hydrogen contained in the capacitor 100 or hydrogen present around the capacitor 100 can be captured or fixed. It is particularly preferable to capture or fix hydrogen contained in the insulator 130.

[0102] The insulator 155 preferably has an amorphous structure, but may have a crystalline region formed in part. The insulator 155 may also have a multilayer structure in which an amorphous layer and a layer having a crystalline region are stacked. For example, the insulator 155 may have a stacked structure in which a layer having a crystalline region, typically a layer having a polycrystalline structure, is formed on an amorphous layer.

[0103] Furthermore, it is preferable to use an insulator 105 that has a high ability to suppress the diffusion of impurities such as hydrogen, similar to the insulator 152. The insulator 155 and the insulator 105 are in contact with each other in a region that does not overlap with the capacitor 100. That is, the conductors 110, 130, and 120 are surrounded by the insulator 105, the insulator 152, and the insulator 155. In other words, the capacitor 100 is sealed by the insulator 155, the insulator 152, and the insulator 105. Here, the insulators 155, 152, and 105 function as a sealing film. This suppresses the diffusion of hydrogen from the outside of the insulator 152 and the insulator 105 to the capacitor 100, and furthermore, the insulator 155 captures or fixes hydrogen inside the insulators 152 and 105, thereby reducing the hydrogen concentration in the insulator 130 of the capacitor 100. Therefore, the ferroelectricity of the insulator 130 can be increased.

[0104] However, the insulator 105 is not limited to this, and any insulating material may be used. For example, the insulating materials described in the section "Insulator" in the second embodiment described later may be used.

[0105] As described above, by eliminating impurities such as hydrogen in the insulator 130 or by reducing the content of impurities such as hydrogen to an extremely low level, it is possible to improve the crystallinity of the insulator 130 and to obtain a structure with high ferroelectricity.

[0106] Furthermore, the conductor 110 is preferably a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the above metal element as a component, or an alloy combining the above metal elements. As an alloy containing the above metal element as a component, a nitride of the alloy or an oxide of the alloy may be used. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, etc. are preferably used. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferable because they are conductive materials that are resistant to oxidation or materials that maintain conductivity even when absorbing oxygen. Also, semiconductors with high electrical conductivity, typified by polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may be used.

[0107] Furthermore, a plurality of conductive layers formed from the above materials may be stacked. For example, a stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing oxygen. A stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing nitrogen. A stacked structure may be formed by combining the above-described material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.

[0108] Furthermore, to form the insulator 130 containing layered crystals as described above, it is preferable that the top surface of the conductor 110 underlying the insulator 130 has good flatness. For example, the roughness of the top surface of the underlying conductor 110 may be set to 2 nm or less, preferably 1 nm or less, more preferably 0.8 nm or less, even more preferably 0.5 nm or less, and even more preferably 0.4 nm or less in terms of arithmetic mean roughness (Ra) or root mean square roughness (RMS). In this way, improving the flatness of the top surface of the conductor 110 can improve the crystallinity of the insulator 130 and enhance the ferroelectricity of the insulator 130.

[0109] Furthermore, a layer for improving the crystallinity of the insulator 130 may be provided between the insulator 130 and the conductor 110 and / or between the insulator 130 and the conductor 120. When the above-mentioned metal nitride is used for the insulator 130, it is preferable to use, for example, a material that stabilizes the wurtzite structure as the layer for improving the crystallinity. It is also preferable to use, for example, a layer containing at least one of the elements contained in the insulator 130 as the layer for improving the crystallinity. Note that it is preferable that the composition of the layer for improving the crystallinity differs from the composition of the insulator 130. When an Al-Ga-Sc nitride is used for the insulator 130, it is preferable to use, specifically, a metal nitride such as aluminum nitride, gallium nitride, or scandium nitride, or aluminum, gallium, or scandium as the layer for improving the crystallinity.

[0110] The composition of the layer that enhances crystallinity does not need to contain any of the elements contained in the insulator 130. In this case, elements that can be used include indium, silicon, yttrium, hafnium, and zirconium. By providing a layer that enhances crystallinity, the crystallinity of the insulator 130 can be improved, and the ferroelectricity of the insulator 130 can be enhanced. Since the ferroelectricity of the insulator 130 can be enhanced by improving the crystallinity of the insulator 130, the layer that enhances crystallinity can be rephrased as a layer that increases the remanent polarization of the insulator 130.

[0111] The conductor 120 may be made of any of the conductive materials that can be used for the conductor 110 .

[0112] When the above-mentioned metal nitride is used for the insulator 130, the conductor 110 or the conductor 120 preferably contains nitrogen, and it is more preferable that each of the conductors 110 and 120 contains nitrogen. Tantalum nitride or titanium nitride is particularly preferable for the conductor 110 and / or the conductor 120. This configuration suppresses the formation of a foreign layer at the interface between the insulator 130 and the conductor 110 and / or the conductor 120, and makes it possible to form the insulator 130 containing layered crystals as described above. Note that the foreign layer is a layer containing a compound containing components of the insulator 130 and components of the conductor 110 (conductor 120).

[0113] Furthermore, when the above-mentioned metal nitride is used for the insulator 130, using tantalum nitride or titanium nitride for the conductor 110 may improve the crystallinity of the insulator 130. Tantalum nitride and titanium nitride tend to have a sodium chloride structure. Furthermore, the atomic arrangement of the sodium chloride structure when viewed from the

[0111] direction is similar to the atomic arrangement of the wurtzite structure when viewed from the

[0001] direction. In other words, depending on the composition and element combination, the lattice matching between the conductor 110 and the insulator 130 may be high. Therefore, it is preferable that the conductor 110 have a crystal with a sodium chloride structure. Furthermore, it is preferable that the crystal be (111) oriented with respect to the surface of the insulator 105. Having the crystal in the conductor 110 may improve the crystallinity of the insulator 130.

[0114] The crystals can be confirmed by observing the regularity of metal ions using, for example, a cross-sectional TEM. They can also be confirmed by, for example, a Fast Fourier Transform (FFT) pattern obtained by subjecting the cross-sectional TEM to FFT processing. They can also be confirmed by, for example, a diffraction pattern observed using electron beam diffraction.

[0115] When the conductor 110 has a stacked structure of two or more layers, it is preferable to use tantalum nitride or titanium nitride as the layer in contact with the insulator 130. With such a structure, it is possible to prevent a different layer from being formed at the interface between the insulator 130 and the conductor 110, and to form the insulator 130 containing layered crystals as described above. Note that the layer not in contact with the insulator 130 (for example, the layer in contact with the insulator 105) can be made of a conductive material containing, for example, tungsten, copper, or aluminum as its main component.

[0116] Furthermore, when the conductor 120 has a stacked structure of two or more layers, it is preferable to use tantalum nitride or titanium nitride as the layer in contact with the insulator 130. Such a structure can prevent a different layer from being formed at the interface between the insulator 130 and the conductor 120. Note that the layer not in contact with the insulator 130 (for example, the layer in contact with the insulator 155) can be made of a conductive material containing, for example, tungsten, copper, or aluminum as its main component.

[0117] Although the capacitive element 100 shown in FIG. 1A has a configuration in which the conductor 110, the insulator 130, and the conductor 120 have aligned side surfaces, the present invention is not limited to this.

[0118] 1B, the side surface of the conductor 110 may be located inside the side surfaces of the insulator 130 and the conductor 120. The insulator 130 is formed to cover the upper surface and side surfaces of the conductor 110, and the area of ​​the insulator 130 that does not overlap with the conductor 110 contacts the insulator 105. In this case, when viewed from above, the outer periphery of the conductor 110 is located inside the outer peripheries of the insulator 130 and the conductor 120. With this configuration, the insulator 130 can sufficiently separate the conductors 110 and 120.

[0119] 1C, the side surfaces of the insulator 130 and the conductor 120 may be located more inward than the side surfaces of the conductor 110. In this case, the outer peripheries of the insulator 130 and the conductor 120 are located more inward than the outer periphery of the conductor 110 in a top view.

[0120] With the above configuration, the insulator 130 is not formed near the step formed by the conductor 110 on the surface where it is to be formed, and therefore, the low-crystalline region formed near the step during the deposition of the insulator 130 can be removed to form the capacitor element 100. Therefore, the entire insulator 130 shown in FIG. 1C is in contact with the highly flat upper surface of the conductor 110, and can have many highly crystalline regions.

[0121] 1C, the insulator 155 may be formed so that its side surface is located inside the side surface of the conductor 110. In this case, it is preferable that the side surfaces of the insulator 130, the conductor 120, and the insulator 155 are approximately aligned. The insulator 152 is provided to cover the conductor 110, the insulator 130, the conductor 120, and the insulator 155. This configuration allows the insulator 155 to capture or fix impurities such as hydrogen contained in the insulator 130 via the conductor 120. Furthermore, because the insulator 130 and the insulator 155 do not come into contact with each other, even if an oxide is used as the insulator 155, the formation of a mixed layer at the interface between the insulator 130 and the insulator 155 can be suppressed. Furthermore, the insulator 152 can suppress the insulator 130 from being contaminated with oxygen.

[0122] Note that if the impurity concentration in the insulator 130 can be reduced by optimizing the film formation method of the insulator 130, the insulator 155 may not be provided. If the insulator 155 is not provided, the insulator 152 has regions in contact with the top surface of the insulator 105, the side surface of the insulator 130, the side surface of the conductor 120, and the top surface of the conductor 120. Furthermore, the capacitor 100 is sealed by the insulator 152 and the insulator 105. This can prevent hydrogen from diffusing from the outside of the insulator 152 and the insulator 105 to the capacitor 100. Therefore, the ferroelectricity of the insulator 130 can be improved.

[0123] The ferroelectric material that can be used for the insulator 130 is not limited to the above-mentioned metal nitrides. Examples of the ferroelectric material include hafnium oxide, zirconium oxide, and HfZrO. XMetal oxides such as J1 (where X is a real number greater than 0) may also be used. Ferroelectric materials may also be used in which hafnium oxide is doped with element J1 (here, element J1 is one or more selected from zirconium (Zr), silicon (Si), aluminum (Al), gadolinium (Gd), yttrium (Y), lanthanum (La), strontium (Sr), etc.). The atomic ratio of hafnium atoms to element J1 can be set appropriately, for example, to 1:1 or close to 1:1. Ferroelectric materials may also be used in which zirconium oxide is doped with element J2 (here, element J2 is one or more selected from hafnium (Hf), silicon (Si), aluminum (Al), gadolinium (Gd), yttrium (Y), lanthanum (La), strontium (Sr), etc.). The ratio of the number of zirconium atoms to the number of atoms of element J2 can be set as appropriate, for example, to 1:1 or approximately 1:1. The crystal structure of hafnium oxide or a material containing hafnium oxide and zirconium oxide may be one or more selected from the group consisting of cubic, tetragonal, orthorhombic, and monoclinic.

[0124] Furthermore, lead titanate (PbTiO) is a material that can have ferroelectric properties. X Piezoelectric ceramics having a perovskite structure, such as barium strontium titanate (BST), strontium titanate, lead zirconate titanate (PZT), strontium bismuth tantalate (SBT), bismuth ferrite (BFO), and barium titanate, may also be used. Also, as materials that may have ferroelectricity, perovskite-type oxynitrides such as SrTaO2N and BaTaO2N, and GaFeO3 with a κ-alumina structure may also be used.

[0125] Although metal oxides and metal nitrides have been exemplified in the above description, materials that can have ferroelectricity are not limited to these. For example, metal oxynitrides in which nitrogen is added to the above metal oxides, or metal oxynitrides in which oxygen is added to the above metal nitrides, etc. may also be used.

[0126] <Method for manufacturing capacitor elements> In this section, a method for manufacturing a capacitor according to one embodiment of the present invention will be described with reference to FIGS. 5A to 5C.

[0127] 5A, an insulator 105 is formed on a substrate (not shown). When an insulator similar to the insulator 152 is used as the insulator 105, the description of the insulator 152 to be described later can be taken into consideration.

[0128] Next, as shown in FIG. 5A, a conductor 110 is formed on the insulator 105. The conductor 110 can be formed by sputtering, chemical vapor deposition (CVD), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), atomic layer deposition (ALD), or the like. ALD methods include thermal ALD, which uses only thermal energy to cause a reaction between a precursor and a reactant, and plasma enhanced ALD (PEALD), which uses a plasma-excited reactant. Using the ALD method may make it relatively easy to form a conductive film with good flatness as the conductor 110. For example, a titanium nitride film may be formed using thermal ALD.

[0129] The conductor 110 may be appropriately patterned using lithography or the like. By patterning the conductor 110 before depositing the insulator 130, the capacitor 100 having the structure shown in FIG. 1B or 1C can be formed.

[0130] Furthermore, it is preferable that the surface on which the conductor 110 is formed (also referred to as the surface to be formed) or the top surface of the conductor 110 has high flatness. For example, the surface on which the conductor 110 is formed or the top surface of the conductor 110 may be planarized by a planarization treatment using a chemical mechanical polishing (CMP) method or the like to improve the flatness. When the flatness of the surface on which the conductor 110 is formed or the top surface of the conductor 110 is improved, the crystallinity of the upper portion, more specifically, of the insulator 130, can be improved.

[0131] 5A, the insulator 130 is formed on the conductor 110. The insulator 130 can be formed by sputtering, CVD, ALD, or the like. For example, by using the ALD method, the insulator 130 can be formed on the conductor 110 with good coverage. This makes it possible to suppress the occurrence of leakage current between the upper electrode and the lower electrode of the capacitor element 100.

[0132] It is preferable that the insulator 130 be made of a material that can have ferroelectricity. The above-mentioned materials can be used as the material that can have ferroelectricity. Here, the film thickness of the insulator 130 can be set to 100 nm or less, preferably 50 nm or less, more preferably 20 nm or less, and even more preferably 10 nm or less (typically 2 nm or more and 9 nm or less).

[0133] When the above-mentioned metal nitride is used as the insulator 130, it is preferable to form the film by a thermal ALD method or a PEALD method. Details of the method for forming the insulator 130 by the ALD method will be described later.

[0134] Furthermore, when the insulator 130 is formed by a thermal ALD method, a material that does not contain hydrocarbon (also referred to as Hydro Carbon, HC) may be used as a precursor. If the insulator 130 contains either or both of hydrogen and carbon, crystallization of the insulator 130 may be hindered. For this reason, as described above, it is preferable to use a precursor that does not contain hydrocarbon to reduce the concentration of either or both of hydrogen and carbon in the insulator 130. For example, a chlorine-based material is an example of a precursor that does not contain hydrocarbon.

[0135] However, this is not limiting, and the insulator 130 can also be formed using a precursor containing a hydrocarbon. In this case, it is preferable that impurities such as hydrogen contained in the insulator 130 be sufficiently captured or fixed by the insulator 155 to reduce the concentration of impurities such as hydrogen in the insulator.

[0136] Furthermore, a sputtering method is preferably used to deposit the insulator 130 using the above-described metal nitride. Sputtering is suitable for depositing the insulator 130 because it can reduce the impurity concentration in the film or form a dense film. For example, the insulator 130 is preferably deposited by sputtering in an atmosphere containing nitrogen. Specifically, nitrogen gas or a mixed gas of nitrogen and a noble gas is preferably used as the sputtering gas. Furthermore, when depositing the insulator 130 by sputtering, it is preferable to use a target containing elements contained in the insulator 130.

[0137] The insulator 130 may be formed by sputtering one target. For example, when the insulator 130 is composed of two or more elements and nitrogen, a target containing the two or more elements may be used, or a target containing the two or more elements and nitrogen may be used.

[0138] Alternatively, the insulator 130 may be formed by simultaneously sputtering multiple targets. The method of simultaneously sputtering multiple targets is sometimes called a co-sputtering method. For example, when the insulator 130 is composed of two or more elements and nitrogen, a first target containing some of the two or more elements and a second target containing all the other elements of the two or more elements may be used. One or both of the first and second targets may contain nitrogen. Alternatively, a first target containing some of the two or more elements, a second target containing another part of the two or more elements, and a third target containing all the other elements of the two or more elements may be used. One or more of the first to third targets may contain nitrogen.

[0139] Specifically, when the insulator 130 is an Al-Ga-Sc nitride, an Al-Ga-Sc alloy target or an Al-Ga-Sc nitride target can be used to form the insulator 130 by sputtering. Alternatively, a metallic aluminum or aluminum nitride target and a Ga-Sc nitride target can be used. Alternatively, a gallium nitride target and an Al-Sc alloy target can be used. Alternatively, a gallium nitride target, a metallic aluminum or aluminum nitride target, and a metallic scandium target can be used. When two or more targets are used, the insulator 130 is formed by co-sputtering.

[0140] When the insulator 130 is formed by co-sputtering using at least an aluminum nitride target, RF sputtering is used for the insulating aluminum nitride target. When the insulator 130 contains gallium, a gallium-containing nitride target or a gallium-containing alloy target is used because metallic gallium has a low melting point.

[0141] Next, as shown in FIG. 5A, the conductor 120 is formed on the insulator 130. Here, the conductor 120 is disposed separated from the conductor 110 by the insulator 130. The conductor 120 may be formed using a sputtering method, an ALD method, a CVD method, or the like. For example, a titanium nitride film may be formed using a thermal ALD method. Here, the conductor 120 is preferably formed by a method in which the substrate is heated, as in the thermal ALD method. For example, the conductor 120 may be formed by setting the substrate temperature to room temperature or higher, preferably 300°C or higher, more preferably 325°C or higher, and even more preferably 350°C or higher. Alternatively, the conductor 120 may be formed by setting the substrate temperature to 500°C or lower, preferably 450°C or lower. For example, the substrate temperature may be set to about 400°C.

[0142] By forming the conductor 120 within the temperature range described above, it is possible to impart ferroelectricity to the insulator 130 without performing a high-temperature bake treatment (e.g., a bake treatment at a heat treatment temperature of 400°C or higher or 500°C or higher) after forming the conductor 120. Furthermore, by forming the conductor 120 using the ALD method, which causes relatively little damage to the base, as described above, it is possible to prevent excessive destruction of the crystalline structure of the insulator 130, thereby improving the ferroelectricity of the insulator 130. Note that improving the crystallinity or ferroelectricity of the insulator 130 by utilizing the temperature during the formation of the conductor 120 without performing a bake treatment after the formation of the conductor 120 is sometimes referred to as self-annealing.

[0143] When the conductor 110, the insulator 130, and the conductor 120 are formed by sputtering, it is preferable to form the conductor 110, the insulator 130, and the conductor 120 successively without exposing them to the atmosphere. For example, a multi-chamber film formation apparatus may be used. By forming the films without exposing them to the atmosphere, impurities or moisture from the atmospheric environment can be prevented from adhering to the conductor 110 and the insulator 130, and the vicinity of the interface between the conductor 110 and the insulator 130 and the vicinity of the interface between the insulator 130 and the conductor 120 can be kept clean.

[0144] The conductor 120 and the insulator 130 may be appropriately patterned using lithography or the like. By patterning the conductor 120 and the insulator 130 before depositing the insulator 155, the capacitor 100 having the structure shown in FIG. 1B can be formed. Alternatively, by patterning the conductor 120, the insulator 130, and the conductor 110 before depositing the insulator 155, the capacitor 100 having the structure shown in FIG. 1A can be formed.

[0145] 5B, an insulator 155 is formed to encase the conductor 110, the insulator 130, and the conductor 120. The insulator 155 can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. In this embodiment, an aluminum oxide film is formed as the insulator 155 by pulse DC sputtering using an aluminum target in an atmosphere containing oxygen gas.

[0146] It is preferable to use a metal oxide having an amorphous structure, such as aluminum oxide, which has a high function of capturing or fixing hydrogen, as the insulator 155. This makes it possible to capture or fix impurities such as hydrogen contained in the insulator 130. In particular, using aluminum oxide having an amorphous structure or aluminum oxide having an amorphous structure as the insulator 155 is preferable because it may be possible to more effectively capture or fix hydrogen.

[0147] Furthermore, as described above, by depositing the insulator 155 by a sputtering method without using a gas containing hydrogen molecules as a deposition gas, the hydrogen concentration in the insulator 155 and the underlying conductor 120 can be reduced. This allows more impurities such as hydrogen contained in the insulator 130 to be captured or fixed.

[0148] The insulator 155 may also have a stacked structure of two or more layers. For example, it may be a stacked film of aluminum oxide formed by ALD and aluminum oxide formed thereon by sputtering. With this configuration, even if pinholes or discontinuities are formed in the aluminum oxide film formed by sputtering, the overlapping portions can be sealed with the aluminum oxide film formed by ALD, which has good coverage.

[0149] The insulator 155 may be patterned using a lithography method or the like. After the insulator 155 is formed, the insulator 155, the conductor 120, and the insulator 130 are patterned to form the capacitor element 100 having the structure shown in FIG. 1C.

[0150] Next, as shown in FIG. 5C , an insulator 152 is formed to encase the conductor 110, the insulator 130, the conductor 120, and the insulator 155. The insulator 152 can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. Silicon nitride, which has a high ability to suppress hydrogen diffusion, is preferably used as the insulator 152. In this embodiment, a silicon nitride film is formed as the insulator 152 by pulse DC sputtering in an atmosphere containing nitrogen gas.

[0151] Since the sputtering method does not require the use of molecules containing hydrogen in the deposition gas, the hydrogen concentration of the insulator 152 and the insulator 155, which serves as the base during deposition, can be reduced by depositing the insulator 152 by sputtering.

[0152] The insulator 152 may also have a laminated structure of two or more layers. For example, it may be a laminated film of silicon nitride formed by sputtering and silicon nitride formed thereon by PEALD. With this configuration, even if pinholes or discontinuities are formed in the silicon nitride film formed by sputtering, the overlapping portions can be covered with a silicon nitride film formed by ALD, which has good coverage.

[0153] It is preferable to perform heat treatment after forming the insulator 152. For example, the heat treatment may be performed by setting the substrate temperature to 300 °C or higher, preferably 325 °C or higher, more preferably 350 °C or higher. Also, for example, the heat treatment may be performed by setting the substrate temperature to 600 °C or lower, preferably 500 °C or lower, more preferably 450 °C or lower. For example, the substrate temperature may be set to about 400 °C. Also, the heat treatment time may be, for example, about 1 hour or more and 10 hours or less. The heat treatment can be performed in an atmosphere containing oxygen gas, nitrogen gas, or an inert gas.

[0154] By performing such heat treatment, hydrogen contained in the insulator 130 and substances bonded to hydrogen can be desorbed and diffused from the insulator 130 to the insulator 155. At this time, the hydrogen and substances bonded to hydrogen may diffuse through the conductor 120 and reach the insulator 155. Thus, by capturing or fixing the hydrogen diffused into the insulator 155 in the insulator 155, the concentration of hydrogen contained in the insulator 130 can be reduced. Also, at this time, since the insulator 155 and the capacitor element 100 are wrapped by the insulator 152, diffusion of hydrogen from the outside of the insulator 152 can be suppressed. In this way, the ferroelectricity of the insulator 130 can be enhanced.

[0155] As described above, the capacitor element 100 having the insulator 130 between the conductor 110 and the conductor 120 and wrapped by the insulator 155 and the insulator 152 as shown in FIG. 5C can be manufactured.

[0156] <Film formation by ALD method> Hereinafter, with reference to FIGS. 6A and 6B, a method for forming the insulator 130 by the ALD method and a film forming apparatus used for the film formation will be described.

[0157] The ALD method utilizes the self-regulating properties of atoms to deposit atoms one layer at a time, which allows for the formation of extremely thin films, films with high aspect ratios, films with few defects such as pinholes, films with excellent coverage, and films at low temperatures.

[0158] In the ALD method, a first source gas (also called a precursor) and a second source gas (also called a nitriding agent) are alternately introduced into the reaction chamber, and film formation is achieved by repeating this process. When introducing the precursor or nitriding agent, carrier / purge gases such as N2 and Ar can be introduced into the reaction chamber together with the precursor or nitriding agent. The use of a carrier / purge gas prevents the precursor or nitriding agent from adsorbing to the inside of the piping and valves, allowing the precursor or nitriding agent to be introduced into the reaction chamber. Furthermore, the use of a carrier / purge gas allows the precursor or nitriding agent remaining in the reaction chamber to be quickly evacuated (also called a purge gas). Because of their dual roles of introduction (carrier) and evacuation (purging), gases such as N2 and Ar introduced into the reaction chamber together with the precursor or nitriding agent are sometimes referred to as carrier / purge gases. Furthermore, the use of a carrier / purge gas improves the uniformity of the resulting film, making it preferable.

[0159] 6A shows a sequence for forming a film of a material that may have ferroelectricity (hereinafter referred to as a ferroelectric layer) using the ALD method. In the following, an example is shown in which a ferroelectric layer containing aluminum nitride and scandium nitride is formed as the insulator 130.

[0160] A precursor containing aluminum (Al) can be used as precursor 401. A precursor containing scandium (Sc) can be used as precursor 402. Note that precursors 401 and 402 may each be a precursor formed of an inorganic substance (sometimes referred to as an inorganic precursor), or a precursor formed of an organic substance (sometimes referred to as an organic precursor). Examples of precursors containing aluminum include trimethylaluminum, triethylaluminum, triisobutylaluminum, dimethylaluminum hydride, tris(dimethylamino)aluminum, tris(diethylamino)aluminum, and aluminum trichloride.

[0161] The precursors 401 and 402 are formed by heating and gasifying a liquid or solid raw material. The precursors 401 and 402 preferably contain reduced impurities. For example, such impurities include Ba, Co, Cu, Fe, Li, Mn, Na, and Ni.

[0162] Ammonia (NH3) can be used as the nitriding agent 405. One or more selected from N2, He, Ar, Kr, and Xe can be used as the carrier / purge gas 404. In this example, N2 is used as the carrier / purge gas 404.

[0163] First, a carrier / purge gas 404 is introduced into the reaction chamber (ON). Next, a nitriding agent 405 is introduced into the reaction chamber (Step S01). Next, the introduction of the nitriding agent 405 is stopped (OFF), leaving only the carrier / purge gas 404, and the nitriding agent 405 remaining in the reaction chamber is purged (Step S02). Next, a precursor 401 is introduced into the reaction chamber, and the pressure in the reaction chamber is kept constant (Step S03). In this way, the precursor 401 is adsorbed onto the surface to be formed. Next, the introduction of the precursor 401 is stopped, leaving only the carrier / purge gas 404, and the precursor 401 remaining in the reaction chamber is purged (Step S04). Next, a nitriding agent 405 is introduced into the reaction chamber (Step S05). By introducing the nitriding agent 405, the precursor 401 is nitrided to form aluminum nitride. Next, the introduction of the nitriding agent 405 is stopped, and only the carrier purge gas 404 is used to purge the nitriding agent 405 remaining in the reaction chamber (step S06).

[0164] Next, precursor 402 is introduced into the reaction chamber, and the pressure in the reaction chamber is kept constant (step S07). In this way, precursor 402 is adsorbed onto the nitrogen layer of the aluminum nitride. Next, the introduction of precursor 402 is stopped, and only carrier purge gas 404 is used to purge the precursor 402 remaining in the reaction chamber (step S08). Next, returning to step S01, nitriding agent 405 is introduced into the reaction chamber. By introducing nitriding agent 405, precursor 402 is nitrided, and scandium nitride is formed on the aluminum nitride.

[0165] The above-described steps S01 to S08 constitute one cycle, which is repeated until the desired film thickness is achieved. Note that steps S01 to S08 may be performed at a temperature in the range of 250° C. to 450° C., preferably 350° C. to 400° C.

[0166] Furthermore, when the ferroelectric layer is formed using the PEALD method, one or more selected from nitrogen (N), ammonia (NH), and a mixed gas of nitrogen (N) and hydrogen (H) may be plasma-excited and introduced into the reaction chamber as the nitriding agent 405. For example, a mixed gas of 95 vol% nitrogen (N) and 5 vol% hydrogen (H) may be used as the mixed gas. The ferroelectric layer can be formed by carrying out film formation while introducing plasma-excited nitrogen and / or ammonia.

[0167] When the ferroelectric layer is formed using the PEALD method, the nitriding agent 405 may also serve as the carrier / purge gas 404. For example, when nitrogen (N2) is used as the carrier / purge gas 404, the nitrogen can be excited into plasma by turning on the plasma generator in the steps of introducing the nitriding agent 405 (steps S01 and S05), and the nitrogen plasma can function as the nitriding agent 405.

[0168] It should be noted that by controlling the amount and number of times (also referred to as the number of pulses) of the source gas introduced, a film having any desired composition can be formed.

[0169] As described above, a layered crystalline structure can be formed by forming the insulator 130 using the ALD method. Furthermore, as described above, by forming the insulator 130 using a precursor with reduced impurities, it is possible to prevent impurities from being mixed in during film formation and interfering with the formation of the layered crystalline structure. By forming the insulator 130 into a layered crystalline structure with high crystallinity, the insulator 130 can have high ferroelectricity.

[0170] However, the insulator 130 does not necessarily exhibit ferroelectricity immediately after being formed. As described above, the insulator 130 may exhibit ferroelectricity not immediately after being formed, but after the conductor 120 is formed on the insulator 130.

[0171] Next, the deposition of an Al-Ga-Sc nitride film will be shown as an example. Since the methods for depositing ferroelectric layers containing aluminum nitride and scandium nitride have already been explained, the following mainly describes the differences, and the previous explanation can be referred to for the common points.

[0172] When forming an Al-Ga-Sc nitride film, in addition to the precursors 401 and 402, a precursor containing gallium (Ga) is used. The gallium-containing precursor may be an inorganic precursor or an organic precursor. Examples of organic precursors containing gallium include trimethylgallium, triethylgallium, tris(dimethylamido)gallium, gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)gallium, dimethylchlorogallium, diethylchlorogallium, and dimethylgallium isopropoxide. Examples of inorganic precursors containing gallium include halogen-based gallium compounds such as gallium trichloride, gallium tribromide, and gallium triiodide.

[0173] After step S07, a nitriding agent 405 is introduced into the reaction chamber. By introducing the nitriding agent 405, the precursor 402 is nitrided to form scandium nitride. Next, the introduction of the nitriding agent 405 is stopped, leaving only the carrier / purge gas 404, and the nitriding agent 405 remaining in the reaction chamber is purged. Next, a gallium-containing precursor is introduced into the reaction chamber, and the pressure in the reaction chamber is maintained constant. In this way, the gallium-containing precursor is adsorbed onto the nitrogen layer of the scandium nitride. Next, the introduction of the gallium-containing precursor is stopped, leaving only the carrier / purge gas 404, and the gallium-containing precursor remaining in the reaction chamber is purged. Next, the process returns to step S01, and the nitriding agent 405 is introduced into the reaction chamber. By introducing the nitriding agent 405, the gallium-containing precursor is nitrided to form gallium nitride on the scandium nitride.

[0174] The process from step S01 to the step of purging the gallium-containing precursor remaining in the reaction chamber is considered as one cycle, and this cycle is repeated until a desired film thickness is reached. In this manner, an Al-Ga-Sc nitride film can be formed.

[0175] The order in which precursor 401, precursor 402, and the precursor containing gallium are introduced into the reaction chamber is not limited to the above. For example, precursor 402 may be introduced in step S03, and precursor 401 may be introduced in step S07. Furthermore, by controlling the amount and number of introductions (also referred to as the number of pulses) of the source gases, a film of any composition can be formed.

[0176] Next, an example will be shown in which a ferroelectric layer containing hafnium oxide and zirconium oxide is formed as the insulator 130. Since the method for forming a ferroelectric layer using the ALD method has already been explained, differences will be mainly explained, and the previous explanation can be referred to for common parts.

[0177] The precursor 401 may be a precursor containing hafnium and one or more selected from chlorine, fluorine, bromine, iodine, and hydrogen. The precursor 402 may be a precursor containing zirconium and one or more selected from chlorine, fluorine, bromine, iodine, and hydrogen. In this section, HfCl4 is used as the precursor 401 containing hafnium, and ZrCl4 is used as the precursor 402 containing zirconium.

[0178] Precursor 401 is formed from a solid HfCl4 source, and precursor 402 is formed from a solid ZrCl4 source. These solid sources preferably have reduced impurities. Examples of such impurities include Ba, Cd, Co, Cr, Cu, Fe, Ga, Li, Mg, Mn, Na, Ni, Sr, V, and Zn. In the solid HfCl4 source and the solid ZrCl4 source, the above impurities are preferably less than 1000 wppb. Here, wppb is a unit that represents the concentration of an impurity converted to weight in parts per billion.

[0179] In addition, an oxidizing gas is used instead of the nitriding agent 405. The oxidizing gas may be O2, O3, N2O, or NO 2、 One or more oxidizing gases selected from H2O and H2O2 can be used. In this section, a gas containing H2O is used as the oxidizing gas.

[0180] Next, a manufacturing apparatus used for film formation by the ALD method will be described with reference to Fig. 6B, which is a schematic diagram of a manufacturing apparatus 900 for the ALD method.

[0181] 6B, the manufacturing apparatus 900 includes a reaction chamber 901, a gas inlet 903, a reaction chamber inlet 904, an exhaust port 905, a wafer stage 907, and a shaft 908. In FIG. 6B, a wafer 950 is placed on the wafer stage 907.

[0182] The reaction chamber 901 may be provided with a heater system for heating the interior of the reaction chamber 901, the precursor 401, the precursor 402, the nitriding agent 405, and the carrier / purge gas 404. The wafer stage 907 may be provided with a heater system for heating the wafer 950. The wafer stage 907 may also be provided with a rotation mechanism for horizontally rotating the stage about an axis 908. Although not shown, a gas supply system is installed before the gas inlet 903, which introduces the precursor 401, the precursor 402, the nitriding agent 405, and the carrier / purge gas 404 into the gas inlet 903 at an appropriate timing and at an appropriate flow rate for an appropriate period of time. Although not shown, an exhaust system including a vacuum pump is installed beyond the exhaust port 905.

[0183] The manufacturing apparatus 900 shown in FIG. 6B is an ALD apparatus known as a crossflow type. The flow of precursor 401, precursor 402, nitriding agent 405, and carrier / purge gas 404 in the crossflow type is described below. Precursor 401, precursor 402, nitriding agent 405, and carrier / purge gas 404 flow from gas inlet 903 to reaction chamber 901 via reaction chamber inlet 904, reach wafer 950, and are exhausted through exhaust port 905. The arrows in FIG. 6B schematically indicate the direction of gas flow.

[0184] 6A, in step S05 of introducing nitriding agent 405 into reaction chamber 901, precursor 401 adsorbed on wafer 950 is nitrided by nitriding agent 405 to form aluminum nitride. Due to the cross-flow structure of manufacturing apparatus 900, nitriding agent 405 comes into contact with heated reaction chamber components for a long time before reaching wafer 950. When wafer stage 907 rotates horizontally around axis 908, the periphery of wafer 950 reaches nitriding agent 405 first, so the thickness of the aluminum nitride film becomes thicker at the periphery of wafer 950 and thinner at the center.

[0185] Therefore, it is necessary to set the heating temperature of the reaction chamber to an appropriate temperature to prevent the nitriding agent 405 from decomposing and reducing its nitriding power. Although the above description has been given taking the nitriding of precursor 401 as an example, the same applies to the nitriding of precursor 402.

[0186] As a result, a ferroelectric layer with excellent in-plane thickness uniformity can be formed. The in-plane thickness uniformity is preferably ±1.5% or less, and more preferably ±1.0% or less. If the maximum in-plane thickness minus the minimum in-plane thickness is defined as RANGE, and the in-plane thickness uniformity is defined as ±PNU (Percent Non-Uniformity) (%), then ±PNU (%) can be calculated by (RANGE × 100) / (2 × average in-plane thickness).

[0187] By using the above method, it is possible to form the insulator 130 made of a material that can have ferroelectricity. By forming the capacitor 100 using such an insulator 130, it is possible to make the capacitor 100 a ferroelectric capacitor.

[0188] According to one embodiment of the present invention, a capacitor including a material that can have ferroelectricity can be provided. Alternatively, according to one embodiment of the present invention, the capacitor can be provided with high productivity. Alternatively, according to one embodiment of the present invention, a capacitor that can be miniaturized or highly integrated can be provided.

[0189] <Modifications of Ferroelectric Devices> In this embodiment, a ferroelectric device according to one embodiment of the present invention will be described with reference to Figures 7A1, 7A2, 7B1, 7B2, 7C1, 7C2, 7C3, and 7C4. The ferroelectric device described in this section is a modified example of the ferroelectric device having the above-described conductor 110, insulator 130, and conductor 120, and therefore the above descriptions can be taken into consideration for the conductor 110, insulator 130, and conductor 120.

[0190] 7A1, 7B1, and 7C1 are circuit diagrams of ferroelectric devices according to one embodiment of the present invention. The circuit diagram shown in FIG. 7A1 includes one transistor (also referred to as a field-effect transistor, or FET) and one capacitor, the capacitor including a material that may exhibit ferroelectricity. The circuit diagram shown in FIG. 7B1 includes one transistor, the gate insulating film of which includes a material that may exhibit ferroelectricity. The circuit diagram shown in FIG. 7C1 includes one capacitor and a diode, the capacitor including a material that may exhibit ferroelectricity. Note that, although the circuit diagram shown in FIG. 7C1 separately illustrates one capacitor and one diode, this is not limiting. For example, if one element functions as both a capacitor and a diode, it is not necessary to separate the functions. For example, a configuration equivalent to the circuit diagram shown in FIG. 7C1 can be an element configuration having an insulator between a pair of electrodes and utilizing a tunnel junction between the insulator and the electrode.

[0191] The circuit diagram shown in FIG. 7A1 can be regarded as a 1Tr1C (1 transistor, 1 capacitor) device configuration, and may be referred to as an FeRAM (Ferroelectric Random Access Memory) or Type 1 structure. The circuit diagram shown in FIG. 7B1 can be regarded as a 1Tr (1 transistor) device configuration, and may be referred to as an FeFET (Ferroelectric Field Effect Transistor) or Type 2 structure. The circuit diagram shown in FIG. 7C1 can be regarded as a single capacitor device configuration using a tunnel junction, and may be referred to as an FTJ (Ferroelectric Tunnel Junction) device or Type 3 structure.

[0192] Next, an example of a ferroelectric device according to an embodiment of the present invention, which can be applied to the configurations shown in the circuit diagrams of Figures 7A1, 7B1, and 7C1, will be described with reference to Figures 7A2, 7B2, 7C2, 7C3, and 7C4. Figures 7A2, 7B2, 7C2, 7C3, and 7C4 are cross-sectional views showing an example of a ferroelectric device according to an embodiment of the present invention. In the circuit diagrams shown in Figures 7A1, 7B1, and 7C1, white circles represent terminals.

[0193] Figure 7A2 is a cross-sectional view corresponding to the capacitive element shown in Figure 7A1, Figure 7B2 is a cross-sectional view corresponding to the transistor including a material that may have ferroelectricity shown in Figure 7B1, and Figures 7C2, 7C3, and 7C4 are cross-sectional views corresponding to the capacitive element and diode shown in Figure 7C1, respectively.

[0194] FIG. 7A2 shows a conductor 110, an insulator 130 on the conductor 110, and a conductor 120 on the insulator 130. Note that the insulator 130 is preferably made of a material that can have ferroelectricity. Note that the insulator 130 may also be read as a dielectric or a ferroelectric. Note that although not shown in FIG. 7A2, the conductor 120 may be configured to be connected to the source or drain of a transistor, as shown in FIG. 7A1.

[0195] 7B2 includes an oxide 230, an insulator 130 on the oxide 230, and a conductor 120 on the insulator 130. Note that the insulator 130 is preferably made of a material that can have ferroelectricity. In other words, FIG. 7B2 shows a configuration in which the oxide 230 and the insulator 130, i.e., the material that can have ferroelectricity, are in contact with each other. Note that details of the oxide 230 will be described later (see Embodiment 2).

[0196] 7C2 has a conductor 110, an insulator 115a on the conductor 110, an insulator 130 on the insulator 115a, and a conductor 120 on the insulator 130. Note that FIG. 7C2 can also be said to have a structure in which the insulator 115a is provided between the conductor 110 and the insulator 130 of FIG. 7A2. Note that FIG. 7C3 has a conductor 110, an insulator 130 on the conductor 110, an insulator 115b on the insulator 130, and a conductor 120 on the insulator 115b. Note that FIG. 7C3 can also be said to have a structure in which the insulator 115b is provided between the insulator 130 and the conductor 120 of FIG. 7A2.

[0197] 7C4 shows a conductor 110, an insulator 115a on the conductor 110, an insulator 130 on the insulator 115a, an insulator 115b on the insulator 130, and a conductor 120 on the insulator 115b. In the circuit configuration of FIG. 7C1, it is preferable that a certain polarization is obtained in the PE (Polarization Density-Electric Field) characteristics. For example, in the IV characteristics, if the first section is defined as 0 (V) to 3 (V), the second section is defined as 3 (V) to 0 (V), the third section is defined as -Va (V) to Va (V), the fourth section is defined as 0 (V) to -3 (V), the fifth section is defined as -3 (V) to 0 (V), and the sixth section is defined as -Va (V) to Va (V), it is preferable that the current values ​​in the third section and the sixth section are different. Furthermore, it is preferable that Va is a voltage equal to or less than the coercive electric field (Ec) in this circuit diagram. To satisfy this characteristic, for example, insulator 115a and insulator 115b may be configured to differ in at least one of film type, film quality, and film thickness.

[0198] The insulators 115a and 115b may each be made of a paraelectric material, such as silicon oxide, silicon nitride, silicon oxynitride, silicon nitride, aluminum oxide, aluminum nitride, or aluminum oxynitride. Silicon nitride films are particularly preferred for the insulators 115a and 115b. The insulators 115a and 115b can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulators 115a and 115b are particularly preferably formed by a PEALD method. For example, when forming a silicon nitride film by the PEALD method, it is preferable to use a precursor containing a halogen such as fluorine, chlorine, bromine, or iodine. After introducing the precursor, a high-quality silicon nitride film can be formed by performing a plasma treatment in an atmosphere containing a nitriding agent such as N , NO , NH , NO , NO , or NO .

[0199] Furthermore, when a silicon nitride film is used as the insulator 115a, the insulator 130 containing a metal nitride and the insulator 115a share nitrogen as a main component, which prevents a mixed layer from being formed at or near the interface between the insulator 130 and the insulator 115a, thereby improving the crystallinity of the insulator 130.

[0200] Furthermore, when the PEALD method is used to form the insulator 115a, the insulator 130 may also be formed by the PEALD method. In this case, a common manufacturing equipment can be used. Furthermore, by switching the precursor without switching the nitriding agent, the insulator 130 can be successively formed on the insulator 115a. Therefore, the insulators 115a and 130 can be successively formed without being exposed to the atmosphere, and the vicinity of the interface between the insulators 115a and 130 can be kept clean.

[0201] According to one aspect of the present invention, a material that can have ferroelectricity, i.e., a metal nitride film that has ferroelectricity, can be provided. Alternatively, according to one aspect of the present invention, a ferroelectric device using a material that can have ferroelectricity can be provided. Alternatively, according to one aspect of the present invention, a capacitor element using a material that can have ferroelectricity can be provided. Alternatively, according to one aspect of the present invention, a transistor using a material that can have ferroelectricity can be provided. Alternatively, according to one aspect of the present invention, a capacitor element and a diode using a material that can have ferroelectricity can be provided.

[0202] In other words, the metal nitride film according to one embodiment of the present invention can be used in one or more ferroelectric devices including a capacitor, a transistor, and a diode.

[0203] 7A1 and 7A2 are similar to the capacitive element 100 shown in FIG. 1 and the like, and the descriptions thereof can be taken into consideration. Similarly, the configurations shown in FIGS. 7B1 and 7B2, and FIGS. 7C1, 7C2, 7C3, and 7C4 can be applied to the configurations shown in FIG. 1 and the like by changing part of the configuration (e.g., oxide 230, insulator 115a, insulator 115b, etc.). This can also be similarly applied in the following description of this specification and the like.

[0204] At least part of the structures, methods, and the like described in this embodiment can be implemented in appropriate combination with other embodiment modes described in this specification.

[0205] (Embodiment 2) 8A to 21C , an example of a semiconductor device including the transistor 200 according to one embodiment of the present invention, an example of a semiconductor device including the transistor 200 and the capacitor 100 according to one embodiment of the present invention, and a manufacturing method thereof will be described. Here, the description of the capacitor 100 in Embodiment 1 can be referred to for the capacitor 100 used in the semiconductor device.

[0206] <Configuration example of semiconductor device> 8A to 8D are top views and cross-sectional views of a semiconductor device including a transistor 200. FIG. 8A is a top view of the semiconductor device. FIGS. 8B to 8D are cross-sectional views of the semiconductor device. FIG. 8B is a cross-sectional view of a portion indicated by a dashed dotted line A1-A2 in FIG. 8A, and is also a cross-sectional view of the transistor 200 in the channel length direction. FIG. 8C is a cross-sectional view of a portion indicated by a dashed dotted line A3-A4 in FIG. 8A, and is also a cross-sectional view of the transistor 200 in the channel width direction. FIG. 8D is a cross-sectional view of a portion indicated by a dashed dotted line A5-A6 in FIG. 8A. Note that some elements are omitted from the top view of FIG. 8A for clarity.

[0207] A semiconductor device of one embodiment of the present invention includes an insulator 212 over a substrate (not shown), an insulator 214 over the insulator 212, a transistor 200 over the insulator 214, an insulator 280 over an insulator 275 provided in the transistor 200, an insulator 282 over the insulator 280, an insulator 283 over the insulator 282, an insulator 274 over the insulator 283, and an insulator 285 over the insulator 283 and the insulator 274. The insulators 212, 214, 275, 280, 282, 283, 285, and 274 function as interlayer films. The insulator 283 is in contact with part of the top surface of the insulator 214, a side surface of the insulator 275, a side surface of the insulator 280, and a side surface and top surface of the insulator 282.

[0208] The transistor 200 includes a semiconductor layer, a first gate, a second gate, a source, and a drain. An insulator 271 (insulators 271a and 271b) is provided on and in contact with the source and drain of the transistor 200.

[0209] [Transistor 200] As shown in FIGS. 8A to 8D, the transistor 200 includes an insulator 216 on an insulator 214, a conductor 205 (conductor 205a and conductor 205b) disposed so as to be embedded in the insulator 214 and / or the insulator 216, an insulator 222 on the insulator 216 and on the conductor 205, an insulator 224 on the insulator 222, an oxide 230a on the insulator 224, an oxide 230b on the oxide 230a, a conductor 242a on the oxide 230b, an insulator 271a on the conductor 242a, and an oxide 271b on the oxide 271b. The oxide 230b includes a conductor 242b on the oxide 230b, an insulator 271b on the conductor 242b, an insulator 252 on the oxide 230b, an insulator 250 on the insulator 252, an insulator 254 on the insulator 250, a conductor 260 (conductor 260a and conductor 260b) located on the insulator 254 and overlapping with a portion of the oxide 230b, and an insulator 275 arranged on the insulator 222, the insulator 224, the oxide 230a, the oxide 230b, the conductor 242a, the conductor 242b, the insulator 271a, and the insulator 271b. 8B and 8C , insulator 252 contacts the upper surface of insulator 222, the side surface of insulator 224, the side surface of oxide 230a, the side surface and upper surface of oxide 230b, the side surface of conductor 242, the side surface of insulator 271, the side surface of insulator 275, the side surface of insulator 280, and the lower surface of insulator 250. Furthermore, the upper surface of conductor 260 is disposed so as to be at approximately the same height as the top of insulator 254, the top of insulator 250, the top of insulator 252, and the upper surface of insulator 280. Furthermore, insulator 282 contacts at least a portion of the upper surfaces of conductor 260, insulator 252, insulator 250, insulator 254, and insulator 280.

[0210] In the following, the oxide 230a and the oxide 230b may be collectively referred to as the oxide 230. The conductor 242a and the conductor 242b may be collectively referred to as the conductor 242. The insulator 271a and the insulator 271b may be collectively referred to as the insulator 271.

[0211] Openings are provided in the insulator 280 and the insulator 275, reaching the oxide 230b. The insulator 252, the insulator 250, the insulator 254, and the conductor 260 are disposed in the openings. In addition, the conductor 260, the insulator 252, the insulator 250, and the insulator 254 are disposed between the insulator 271a and the conductor 242a and the insulator 271b and the conductor 242b in the channel length direction of the transistor 200. The insulator 254 has a region in contact with the side surface of the conductor 260 and a region in contact with the bottom surface of the conductor 260.

[0212] The oxide 230 preferably includes an oxide 230a disposed on the insulator 224 and an oxide 230b disposed on the oxide 230a. By providing the oxide 230a below the oxide 230b, it is possible to suppress the diffusion of impurities from structures formed below the oxide 230a to the oxide 230b.

[0213] Note that in the transistor 200, the oxide 230 has a two-layer structure of the oxide 230a and the oxide 230b, but the present invention is not limited to this. For example, the oxide 230b may have a single layer or a stacked structure of three or more layers, or each of the oxide 230a and the oxide 230b may have a stacked structure.

[0214] The conductor 260 functions as a first gate (also referred to as a top gate) electrode, and the conductor 205 functions as a second gate (also referred to as a back gate) electrode. The insulators 252, 250, and 254 function as first gate insulators, and the insulators 222 and 224 function as second gate insulators. The gate insulators may also be referred to as a gate insulating layer or a gate insulating film. The conductor 242a functions as either a source or a drain, and the conductor 242b functions as the other. At least a part of a region of the oxide 230 that overlaps with the conductor 260 functions as a channel formation region.

[0215] FIG. 9A shows an enlarged view of the vicinity of the channel formation region in FIG. 8B. When oxygen is supplied to the oxide 230b, a channel formation region is formed in the region between the conductor 242a and the conductor 242b. Therefore, as shown in FIG. 9A, the oxide 230b includes a region 230bc that functions as the channel formation region of the transistor 200, and regions 230ba and 230bb that are provided on either side of the region 230bc and function as source and drain regions. At least a portion of the region 230bc overlaps with the conductor 260. In other words, the region 230bc is located in the region between the conductor 242a and the conductor 242b. The region 230ba overlaps with the conductor 242a, and the region 230bb overlaps with the conductor 242b.

[0216] The region 230bc, which functions as a channel formation region, has fewer oxygen vacancies or a lower impurity concentration than the regions 230ba and 230bb, making it a high-resistivity region with a low carrier concentration. Therefore, the region 230bc can be said to be i-type (intrinsic) or substantially i-type. The region 230bc can be easily formed, for example, by microwave treatment in an oxygen-containing atmosphere. Here, microwave treatment refers to treatment using, for example, an apparatus with a power source that generates high-density plasma using microwaves. Furthermore, in this specification and elsewhere, microwaves refer to electromagnetic waves having a frequency of 300 MHz or more and 300 GHz or less.

[0217] Furthermore, the regions 230ba and 230bb, which function as source and drain regions, have many oxygen vacancies or high concentrations of impurities such as hydrogen, nitrogen, and metal elements, which increases the carrier concentration and reduces resistance. That is, the regions 230ba and 230bb are n-type regions with a higher carrier concentration and lower resistance than the region 230bc.

[0218] Here, the carrier concentration of the region 230bc that functions as a channel forming region is 1×10 18 cm -3 Preferably, it is 1×10 or less.17 cm -3 More preferably, it is less than 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 More preferably, it is less than 1×10 12 cm -3 The lower limit of the carrier concentration of the region 230bc that functions as a channel formation region is not particularly limited, but is preferably, for example, 1×10 -9 cm -3 It can be said that:

[0219] Furthermore, a region may be formed between region 230bc and region 230ba or region 230bb, whose carrier concentration is equal to or lower than that of region 230ba and region 230bb, and equal to or higher than that of region 230bc. That is, this region functions as a junction region between region 230bc and region 230ba or region 230bb. The junction region may have a hydrogen concentration equal to or lower than that of region 230ba and region 230bb, and equal to or higher than that of region 230bc. The junction region may also have oxygen vacancies equal to or lower than those of region 230ba and region 230bb, and equal to or higher than those of region 230bc.

[0220] 9A shows an example in which the regions 230ba, 230bb, and 230bc are formed in the oxide 230b, but the present invention is not limited to this. For example, each of the above regions may be formed not only in the oxide 230b but also in the oxide 230a.

[0221] Furthermore, it may be difficult to clearly detect the boundaries between regions in the oxide 230. The concentrations of metal elements and impurity elements such as hydrogen and nitrogen detected in each region may not necessarily vary stepwise from region to region, but may also vary continuously within each region. In other words, it is sufficient that the concentrations of metal elements and impurity elements such as hydrogen and nitrogen decrease in regions closer to the channel formation region.

[0222] In the transistor 200, the oxide 230 including the channel formation region (the oxide 230a and the oxide 230b) is preferably a metal oxide that functions as a semiconductor (hereinafter also referred to as an oxide semiconductor).

[0223] The metal oxide functioning as a semiconductor preferably has a band gap of 2 eV or more, more preferably 2.5 eV or more. By using a metal oxide with such a wide band gap, the off-state current of the transistor can be reduced.

[0224] For example, a metal oxide such as In-M-Zn oxide containing indium, element M, and zinc (element M is one or more elements selected from aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, etc.) may be used as oxide 230. Alternatively, In-Ga oxide, In-Zn oxide, or indium oxide may be used as oxide 230.

[0225] The oxide 230b preferably has crystallinity, and it is particularly preferable to use c-axis aligned crystalline oxide semiconductor (CAAC-OS) as the oxide 230b.

[0226] CAAC-OS is a metal oxide with a highly crystalline and dense structure and few impurities and defects (e.g., oxygen vacancies). In particular, after the formation of the metal oxide, the CAAC-OS can be made to have a more crystalline and dense structure by being subjected to heat treatment at a temperature (e.g., 400°C or higher and 600°C or lower) at which the metal oxide does not polycrystallize. In this way, the density of the CAAC-OS can be increased, thereby further reducing the diffusion of impurities or oxygen in the CAAC-OS.

[0227] On the other hand, since it is difficult to identify clear grain boundaries in CAAC-OS, it is said that the decrease in electron mobility due to grain boundaries is unlikely to occur. Therefore, metal oxides with CAAC-OS have stable physical properties. As a result, metal oxides with CAAC-OS are heat-resistant and highly reliable.

[0228] In a transistor using an oxide semiconductor, if impurities and oxygen vacancies exist in a region where a channel is formed in the oxide semiconductor, the electrical characteristics are likely to fluctuate and the reliability may be reduced. In addition, hydrogen in the vicinity of the oxygen vacancy is converted into a defect where hydrogen enters the oxygen vacancy (hereinafter referred to as V O H.) and generate electrons that serve as carriers. Therefore, if oxygen vacancies are present in the region where a channel is formed in an oxide semiconductor, the transistor is likely to have normally-on characteristics (a channel exists and current flows through the transistor even when no voltage is applied to the gate electrode). Therefore, in the region where a channel is formed in an oxide semiconductor, impurities, oxygen vacancies, and V O It is preferable that H is reduced as much as possible. In other words, it is preferable that the region in the oxide semiconductor where a channel is formed has a reduced carrier concentration and is i-type (intrinsic) or substantially i-type.

[0229] In response to this problem, an insulator containing oxygen that is released by heating (hereinafter may be referred to as excess oxygen) is provided near the oxide semiconductor, and heat treatment is performed to supply oxygen from the insulator to the oxide semiconductor, thereby eliminating oxygen vacancies and V OH can be reduced. However, if an excessive amount of oxygen is supplied to the source region or the drain region, this may cause a decrease in the on-state current or a decrease in the field-effect mobility of the transistor 200. Furthermore, if the amount of oxygen supplied to the source region or the drain region varies across the substrate surface, the characteristics of the semiconductor device having the transistor will vary.

[0230] Therefore, in the oxide semiconductor, the region 230bc that functions as a channel formation region preferably has a reduced carrier concentration and is i-type or substantially i-type, whereas the regions 230ba and 230bb that function as source and drain regions preferably have a high carrier concentration and are n-type. O It is preferable to reduce H so that an excessive amount of oxygen is not supplied to the regions 230ba and 230bb.

[0231] 8C , in a cross-sectional view of the transistor 200 in the channel width direction, a curved surface may be formed between the side surface of the oxide 230b and the top surface of the oxide 230b. That is, the end of the side surface and the end of the top surface may be curved (hereinafter also referred to as rounded).

[0232] The radius of curvature of the curved surface is preferably greater than 0 nm and smaller than the film thickness of the oxide 230b in the region overlapping with the conductor 242, or smaller than half the length of the region not having the curved surface. Specifically, the radius of curvature of the curved surface is greater than 0 nm and smaller than 20 nm, preferably greater than 1 nm and smaller than 15 nm, and more preferably greater than 2 nm and smaller than 10 nm. This shape can improve the coverage of the oxide 230b with the insulators 252, 250, 254, and conductor 260.

[0233] The oxide 230 preferably has a stacked structure of multiple oxide layers with different chemical compositions. Specifically, in the metal oxide used for the oxide 230a, the atomic ratio of the element M to the metal element that is the main component is preferably larger than the atomic ratio of the element M to the metal element that is the main component in the metal oxide used for the oxide 230b. Furthermore, in the metal oxide used for the oxide 230a, the atomic ratio of the element M to In is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 230b. Furthermore, in the metal oxide used for the oxide 230b, the atomic ratio of In to the element M is preferably larger than the atomic ratio of In to the element M in the metal oxide used for the oxide 230a.

[0234] The oxide 230b is preferably a crystalline oxide such as CAAC-OS. Crystalline oxides such as CAAC-OS have few impurities and defects (such as oxygen vacancies), a highly crystalline, and a dense structure. This can prevent the source or drain electrode from extracting oxygen from the oxide 230b. This reduces the extraction of oxygen from the oxide 230b even during heat treatment, making the transistor 200 stable against high temperatures (so-called thermal budget) during the manufacturing process.

[0235] Here, the conduction band minimum changes gradually at the junction between the oxide 230a and the oxide 230b. In other words, the conduction band minimum at the junction between the oxide 230a and the oxide 230b changes continuously or can be said to be a continuous junction. To achieve this, it is advisable to reduce the defect level density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b.

[0236] Specifically, when the oxide 230a and the oxide 230b contain a common element other than oxygen as a main component, the defect state density at the interface between the oxide 230a and the oxide 230b can be reduced. Alternatively, a mixed layer with a low defect state density can be formed. For example, when the oxide 230b is an In-M-Zn oxide, the oxide 230a may be an In-M-Zn oxide, an M-Zn oxide, an oxide of element M, an In-Zn oxide, or an indium oxide.

[0237] Specifically, the oxide 230a may be a metal oxide having an atomic ratio of In:M:Zn=1:3:4 or a similar composition, or an atomic ratio of In:M:Zn=1:1:0.5 or a similar composition. The oxide 230b may be a metal oxide having an atomic ratio of In:M:Zn=1:1:1 or a similar composition, an atomic ratio of In:M:Zn=1:1:2 or a similar composition, or an atomic ratio of In:M:Zn=4:2:3 or a similar composition. Note that a similar composition includes a range of ±30% of the desired atomic ratio. Gallium is preferably used as the element M.

[0238] When a metal oxide film is formed by sputtering, the atomic ratio is not limited to the atomic ratio of the formed metal oxide film, but may be the atomic ratio of a sputtering target used to form the metal oxide film.

[0239] 8C and other figures, providing an insulator 252 made of aluminum oxide or the like in contact with the top and side surfaces of the oxide 230 may result in indium being unevenly distributed in the oxide 230 at and near the interface between the oxide 230 and the insulator 252. This results in the surface area of ​​the oxide 230 having an atomic ratio similar to that of indium oxide or In-Zn oxide. The increased atomic ratio of indium near the surface of the oxide 230, particularly the oxide 230b, can improve the field-effect mobility of the transistor 200.

[0240] By configuring the oxide 230a and the oxide 230b as described above, the defect state density at the interface between the oxide 230a and the oxide 230b can be reduced, which reduces the influence of interface scattering on carrier conduction, and the transistor 200 can achieve a large on-state current and high frequency characteristics.

[0241] At least one of the insulators 212, 214, 271, 275, 282, 283, and 285 preferably functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from the substrate side or from above the transistor 200 into the transistor 200. Therefore, at least one of the insulators 212, 214, 271, 275, 282, 283, and 285 is preferably an insulating material that suppresses the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), and copper atoms (i.e., through which the above impurities are less likely to permeate). Alternatively, it is preferably an insulating material that suppresses the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., through which the above oxygen is less likely to permeate).

[0242] The insulators 212, 214, 271, 275, 282, 283, and 285 are preferably insulators that have the function of suppressing diffusion of impurities such as water and hydrogen and oxygen. For example, aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride, or silicon nitride oxide can be used. For example, the insulators 212, 275, and 283 are preferably made of silicon nitride, which has a higher hydrogen barrier property, similar to the insulator 152 described in the previous embodiment. Furthermore, the insulators 214, 271, 282, and 285 are preferably made of aluminum oxide or magnesium oxide, which has a high hydrogen trapping or fixing property, similar to the insulator 155 described in the previous embodiment. This can suppress diffusion of impurities such as water and hydrogen from the substrate side to the transistor 200 side through the insulators 212 and 214. Alternatively, it is possible to suppress the diffusion of impurities such as water and hydrogen from an interlayer insulating film disposed outside the insulator 285 toward the transistor 200. Alternatively, it is possible to suppress the diffusion of oxygen contained in the insulator 224 or the like toward the substrate through the insulators 212 and 214. Alternatively, it is possible to suppress the diffusion of oxygen contained in the insulator 280 or the like toward an upper side of the transistor 200 through the insulator 282 or the like. In this way, it is preferable to have a structure in which the transistor 200 is surrounded by the insulators 212, 214, 271, 275, 282, 283, and 285, which have the function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen.

[0243] Here, it is preferable to use an oxide having an amorphous structure as the insulators 212, 214, 271, 275, 282, 283, and 285. For example, AlO x (x is any number greater than 0), or MgO yIt is preferable to use a metal oxide such as y (where y is any number greater than 0). In such metal oxides having an amorphous structure, oxygen atoms have dangling bonds, and the dangling bonds may have the property of capturing or fixing hydrogen. By using such a metal oxide having an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, hydrogen contained in the transistor 200 or hydrogen present around the transistor 200 can be captured or fixed. In particular, it is preferable to capture or fix hydrogen contained in the channel formation region of the transistor 200. By using a metal oxide having an amorphous structure as a component of the transistor 200 or providing it around the transistor 200, a highly reliable transistor 200 and a semiconductor device can be manufactured that have excellent characteristics.

[0244] Furthermore, the insulators 212, 214, 271, 275, 282, 283, and 285 preferably have an amorphous structure, but may have a polycrystalline structure in some areas. The insulators 212, 214, 271, 275, 282, 283, and 285 may have a multilayer structure in which an amorphous layer and a polycrystalline layer are stacked. For example, they may have a stacked structure in which a polycrystalline layer is formed on an amorphous layer.

[0245] The insulators 212, 214, 271, 275, 282, 283, and 285 may be deposited by, for example, sputtering. Sputtering does not require the use of hydrogen-containing molecules in the deposition gas, and therefore can reduce the hydrogen concentration in the insulators 212, 214, 271, 275, 282, 283, and 285. Note that the deposition method is not limited to sputtering, and chemical vapor deposition (CVD), molecular beam epitaxy (MBE), pulsed laser deposition (PLD), atomic layer deposition (ALD), or the like may also be used as appropriate.

[0246] It may also be preferable to reduce the resistivity of the insulators 212, 275, and 283. For example, it may be preferable to reduce the resistivity of the insulators 212, 275, and 283 to approximately 1×10 13 By setting the resistivity to Ωcm, the insulator 212, the insulator 275, and the insulator 283 may be able to reduce charge-up of the conductor 205, the conductor 242, the conductor 260, or the conductor 110 during treatment using plasma or the like in the semiconductor device manufacturing process. The resistivity of the insulator 212, the insulator 275, and the insulator 283 is preferably 1×10 10 Ωcm or more 1×10 15 Ωcm or less.

[0247] Furthermore, the insulators 216, 274, 280, and 285 preferably have a lower dielectric constant than the insulator 214. Using a material with a low dielectric constant as an interlayer film can reduce parasitic capacitance between wirings. For example, silicon oxide, silicon oxynitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having vacancies, or the like can be used as the insulators 216, 274, 280, and 285 as appropriate.

[0248] The conductor 205 is arranged so as to overlap the oxide 230 and the conductor 260. Here, the conductor 205 is preferably provided by being embedded in an opening formed in the insulator 216. Also, a part of the conductor 205 may be embedded in the insulator 214.

[0249] The conductor 205 includes a conductor 205a and a conductor 205b. The conductor 205a is provided in contact with the bottom surface and sidewall of the opening. The conductor 205b is provided so as to be embedded in a recess formed in the conductor 205a. Here, the height of the upper surface of the conductor 205b is approximately the same as the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216.

[0250] Here, the conductor 205a is preferably made of a conductive material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), copper atoms, etc. Alternatively, it is preferably made of a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0251] By using a conductive material for the conductor 205a that has the function of reducing hydrogen diffusion, it is possible to prevent impurities such as hydrogen contained in the conductor 205b from diffusing into the oxide 230 via the insulators 224 and 216. Furthermore, by using a conductive material for the conductor 205a that has the function of suppressing oxygen diffusion, it is possible to suppress oxidation of the conductor 205b and a decrease in conductivity. Examples of conductive materials that have the function of suppressing oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Therefore, the conductor 205a may be formed as a single layer or a multilayer of the above conductive materials. For example, the conductor 205a may be made of titanium nitride.

[0252] The conductor 205b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component, for example, tungsten.

[0253] The conductor 205 may function as a second gate electrode. In this case, the threshold voltage (Vth) of the transistor 200 can be controlled by changing the potential applied to the conductor 205 independently of the potential applied to the conductor 260. In particular, applying a negative potential to the conductor 205 can increase the Vth of the transistor 200 and reduce the off-state current. Therefore, applying a negative potential to the conductor 205 can reduce the drain current when the potential applied to the conductor 260 is 0 V compared to not applying a negative potential to the conductor 205.

[0254] Note that if the oxide 230 is highly pure and intrinsic, and impurities are removed as much as possible from the oxide 230, it may be possible to make the transistor 200 normally off (to make the threshold voltage of the transistor 200 higher than 0 V) ​​without applying a potential to the conductor 205 and / or the conductor 260. In this case, it is preferable to connect the conductor 260 and the conductor 205 so that they are given the same potential.

[0255] The electrical resistivity of the conductor 205 is designed taking into consideration the potential applied to the conductor 205, and the film thickness of the conductor 205 is set to match this electrical resistivity. The film thickness of the insulator 216 is approximately the same as that of the conductor 205. Here, it is preferable to make the film thicknesses of the conductor 205 and the insulator 216 thin within the range permitted by the design of the conductor 205. By making the film thickness of the insulator 216 thin, the absolute amount of impurities such as hydrogen contained in the insulator 216 can be reduced, thereby reducing the diffusion of the impurities into the oxide 230.

[0256] As shown in FIG. 8A, the conductor 205 is preferably larger than the area of ​​the oxide 230 that does not overlap with the conductors 242a and 242b. In particular, as shown in FIG. 8C, the conductor 205 preferably extends to an area outside the channel width direction ends of the oxide 230a and the oxide 230b. That is, outside the side surfaces of the oxide 230 in the channel width direction, the conductor 205 and the conductor 260 preferably overlap with each other via an insulator. This structure allows the channel formation region of the oxide 230 to be electrically surrounded by the electric field of the conductor 260, which functions as the first gate electrode, and the electric field of the conductor 205, which functions as the second gate electrode. In this specification, a transistor structure in which the channel formation region is electrically surrounded by the electric fields of the first and second gates is referred to as a surrounded channel (S-channel) structure.

[0257] In this specification and the like, a transistor with an S-channel structure refers to a transistor structure in which a channel formation region is electrically surrounded by the electric fields of one and the other of a pair of gate electrodes. The S-channel structure disclosed in this specification and the like differs from a fin structure and a planar structure. By adopting the S-channel structure, the transistor can be made more resistant to the short-channel effect, in other words, less susceptible to the short-channel effect.

[0258] By configuring the transistor 200 as a normally-off transistor and adopting the above-described S-Channel structure, the channel formation region can be electrically surrounded. Therefore, the transistor 200 can also be considered to have a GAA (Gate All Around) structure or an LGAA (Lateral Gate All Around) structure. By adopting the S-Channel, GAA, or LGAA structure for the transistor 200, the channel formation region formed at or near the interface between the oxide 230 and the gate insulating film can be the entire bulk of the oxide 230. In other words, by adopting the S-Channel, GAA, or LGAA structure for the transistor 200, the entire bulk can be used as a carrier path, making it a so-called bulk-flow type. The bulk-flow type transistor structure can increase the current density flowing through the transistor, which is expected to improve the on-state current or field-effect mobility of the transistor.

[0259] 8C, the conductor 205 is extended to function as wiring. However, the present invention is not limited to this, and a conductor functioning as wiring may be provided below the conductor 205. Furthermore, it is not necessary to provide one conductor 205 for each transistor. For example, the conductor 205 may be shared by multiple transistors.

[0260] Note that although the transistor 200 illustrates a structure in which the conductor 205 has a stacked structure of the conductor 205a and the conductor 205b, the present invention is not limited to this. For example, the conductor 205 may have a single layer structure or a stacked structure of three or more layers.

[0261] Insulator 222 and insulator 224 function as gate insulators.

[0262] The insulator 222 preferably has a function of suppressing the diffusion of hydrogen (e.g., at least one of hydrogen atoms, hydrogen molecules, etc.). The insulator 222 also preferably has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). For example, the insulator 222 preferably has a function of suppressing the diffusion of one or both of hydrogen and oxygen more than the insulator 224.

[0263] The insulator 222 may be an insulator containing an oxide of one or both of aluminum and hafnium, which are insulating materials. Aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) is preferably used as the insulator. Alternatively, an oxide containing hafnium and zirconium, such as hafnium zirconium oxide, is preferably used. When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses oxygen release from the oxide 230 to the substrate and the diffusion of impurities such as hydrogen from the periphery of the transistor 200 to the oxide 230. Therefore, the insulator 222 can suppress the diffusion of impurities such as hydrogen into the inside of the transistor 200 and the generation of oxygen vacancies in the oxide 230. Furthermore, the conductor 205 can be prevented from reacting with the insulator 224 and the oxygen contained in the oxide 230.

[0264] Alternatively, the insulator may contain, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide. Alternatively, these insulators may be nitrided. Furthermore, the insulator 222 may be formed by stacking silicon oxide, silicon oxynitride, or silicon nitride on these insulators.

[0265] The insulator 222 may be a single layer or a multilayer insulator containing a so-called high-k material, such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, or hafnium zirconium oxide. As transistors become smaller and more highly integrated, thinning of the gate insulator can lead to problems such as leakage current. Using a high-k material as the gate insulator can reduce the gate potential during transistor operation while maintaining the physical film thickness. Alternatively, the insulator 222 may be made of a material with a high dielectric constant, such as lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST).

[0266] The insulator 224 in contact with the oxide 230 may be made of, for example, silicon oxide, silicon oxynitride, or the like, as appropriate.

[0267] During the manufacturing process of the transistor 200, heat treatment is preferably performed while the surface of the oxide 230 is exposed. The heat treatment may be performed, for example, at a temperature of 100°C to 600°C, more preferably 350°C to 550°C. Note that the heat treatment is performed in a nitrogen gas or inert gas atmosphere, or in an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more. For example, the heat treatment is preferably performed in an oxygen atmosphere. This allows oxygen to be supplied to the oxide 230, thereby reducing oxygen vacancies. The heat treatment may be performed under reduced pressure. Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere, followed by an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more to replenish desorbed oxygen. Alternatively, the heat treatment may be performed in an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more, followed by another heat treatment in a nitrogen gas or inert gas atmosphere.

[0268] By subjecting the oxide 230 to oxygen addition treatment, oxygen vacancies in the oxide 230 are repaired by the supplied oxygen. In other words, O Furthermore, the reaction of the hydrogen remaining in the oxide 230 with the supplied oxygen can be removed as H2O (dehydration). As a result, the hydrogen remaining in the oxide 230 recombines with the oxygen vacancies to form V O The formation of H can be suppressed.

[0269] The insulators 222 and 224 may have a stacked structure of two or more layers. In this case, the stacked structure is not limited to a stacked structure made of the same material, and may be a stacked structure made of different materials. The insulator 224 may be formed in an island shape by overlapping with the oxide 230a. In this case, the insulator 275 is configured to contact the side surface of the insulator 224 and the top surface of the insulator 222.

[0270] The conductor 242a and the conductor 242b are provided in contact with the top surface of the oxide 230b. The conductor 242a and the conductor 242b function as a source electrode and a drain electrode of the transistor 200, respectively.

[0271] As the conductor 242 (conductor 242a and conductor 242b), it is preferable to use, for example, a nitride containing tantalum, a nitride containing titanium, a nitride containing molybdenum, a nitride containing tungsten, a nitride containing tantalum and aluminum, or a nitride containing titanium and aluminum. In one embodiment of the present invention, a nitride containing tantalum is particularly preferable. Also, for example, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel may be used. These materials are preferable because they are conductive materials that are resistant to oxidation or that maintain conductivity even when they absorb oxygen.

[0272] Note that hydrogen contained in the oxide 230b and the like may diffuse into the conductor 242a or the conductor 242b. In particular, by using a nitride containing tantalum for the conductor 242a and the conductor 242b, hydrogen contained in the oxide 230b and the like is likely to diffuse into the conductor 242a or the conductor 242b, and the diffused hydrogen may bond with nitrogen contained in the conductor 242a or the conductor 242b. In other words, hydrogen contained in the oxide 230b and the like may be absorbed by the conductor 242a or the conductor 242b.

[0273] Preferably, no curved surface is formed between the side surface of the conductor 242 and the top surface of the conductor 242. By forming the conductor 242 without such a curved surface, the cross-sectional area of ​​the conductor 242 in the cross section in the channel width direction can be increased, as shown in Fig. 8D. This increases the conductivity of the conductor 242 and the on-state current of the transistor 200.

[0274] The insulator 271a is provided in contact with the upper surface of the conductor 242a, and the insulator 271b is provided in contact with the upper surface of the conductor 242b. The insulator 271 preferably functions as a barrier insulating film at least against oxygen. Therefore, the insulator 271 preferably has a function of suppressing oxygen diffusion. For example, the insulator 271 preferably has a function of suppressing oxygen diffusion more than the insulator 280. The insulator 271 may be made of, for example, aluminum oxide or magnesium oxide.

[0275] The insulator 275 is provided to cover the insulator 224, the oxide 230a, the oxide 230b, the conductor 242, and the insulator 271. The insulator 275 preferably has a function of capturing or fixing hydrogen. In this case, the insulator 275 preferably includes an insulator such as silicon nitride or a metal oxide having an amorphous structure, such as aluminum oxide or magnesium oxide. Alternatively, for example, the insulator 275 may be a stacked film of aluminum oxide and silicon nitride on the aluminum oxide.

[0276] By providing the insulators 271 and 275 as described above, the conductor 242 can be wrapped in an insulator that has a barrier property against oxygen. That is, it is possible to prevent the oxygen contained in the insulators 224 and 280 from diffusing into the conductor 242. This makes it possible to suppress the conductor 242 from being directly oxidized by the oxygen contained in the insulators 224 and 280, which would increase the resistivity and reduce the on-current.

[0277] The insulator 252 functions as part of the gate insulator. A barrier insulating film against oxygen is preferably used as the insulator 252. Any of the insulators that can be used for the insulator 282 described above may be used as the insulator 252. An insulator containing an oxide of one or both of aluminum and hafnium may be used as the insulator 252. Examples of the insulator that can be used include aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), and an oxide containing hafnium and silicon (hafnium silicate). In this embodiment, aluminum oxide is used as the insulator 252. In this case, the insulator 252 is an insulator containing at least oxygen and aluminum.

[0278] As shown in FIG. 8C , the insulator 252 is provided in contact with the top surface and side surfaces of the oxide 230b, the side surfaces of the oxide 230a, the side surfaces of the insulator 224, and the top surface of the insulator 222. That is, the regions of the oxide 230a, the oxide 230b, and the insulator 224 that overlap with the conductor 260 are covered with the insulator 252 in the cross section in the channel width direction. This allows the insulator 252, which has oxygen barrier properties, to block oxygen from being released from the oxide 230a and the oxide 230b when heat treatment or the like is performed. This reduces the formation of oxygen vacancies in the oxide 230a and the oxide 230b. This prevents oxygen vacancies and V formed in the region 230bc from being generated. O H can be reduced. Therefore, the electrical characteristics of the transistor 200 can be improved, and the reliability can be improved.

[0279] Conversely, even if the insulators 280 and 250 contain excessive amounts of oxygen, the oxygen can be prevented from being excessively supplied to the oxides 230a and 230b. Therefore, the regions 230ba and 230bb can be prevented from being excessively oxidized via the region 230bc, which can cause a decrease in the on-state current or the field-effect mobility of the transistor 200.

[0280] 8B, the insulator 252 is provided in contact with the side surfaces of the conductor 242, the insulator 271, the insulator 275, and the insulator 280. This reduces the oxidation of the side surface of the conductor 242 and the formation of an oxide film on the side surface. This reduces the decrease in the on-state current or the field-effect mobility of the transistor 200.

[0281] Furthermore, the insulator 252, together with the insulator 254, the insulator 250, and the conductor 260, must be provided in an opening formed in the insulator 280 or the like. To miniaturize the transistor 200, it is preferable that the insulator 252 be thin. The thickness of the insulator 252 is 0.1 nm or more and 5.0 nm or less, preferably 0.5 nm or more and 3.0 nm or less, and more preferably 1.0 nm or more and 3.0 nm or less. In this case, the insulator 252 only needs to have a region with the above-described thickness in at least a portion thereof. Furthermore, it is preferable that the thickness of the insulator 252 is thinner than the thickness of the insulator 250. In this case, it is preferable that the insulator 252 only needs to have a region with a thickness thinner than the insulator 250 in at least a portion thereof.

[0282] To form the thin insulator 252 as described above, it is preferable to use the ALD method. The ALD method includes a thermal ALD method in which the reaction between a precursor and a reactant is carried out using only thermal energy, and a PEALD method in which a plasma-excited reactant is used. The PEALD method may be preferable because it uses plasma, allowing film formation at a lower temperature.

[0283] The ALD method utilizes the self-regulating property of atoms to deposit atoms layer by layer, and therefore has the advantages of enabling the formation of extremely thin films, the formation of films on structures with high aspect ratios, the formation of films with few defects such as pinholes, the formation of films with excellent coverage, the formation of films at low temperatures, etc. Therefore, the insulator 252 can be formed with good coverage on the side surfaces of openings formed in the insulator 280 or the like, and with the thin film thickness as described above.

[0284] Some precursors used in ALD contain carbon and other impurities. Therefore, films formed by ALD may contain more carbon and other impurities than films formed by other film formation methods. Quantitative determination of impurities can be performed using secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), or Auger electron spectroscopy (AES).

[0285] The insulator 250 functions as part of the gate insulator. The insulator 250 is preferably disposed in contact with the upper surface of the insulator 252. The insulator 250 can be made of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, silicon oxide having vacancies, or the like. Silicon oxide and silicon oxynitride are particularly preferred because they are stable against heat. In this case, the insulator 250 is an insulator containing at least oxygen and silicon.

[0286] As with insulator 224, insulator 250 preferably has a reduced concentration of impurities such as water and hydrogen. The thickness of insulator 250 is preferably 1 nm or more and 20 nm or less, and more preferably 0.5 nm or more and 15.0 nm or less. In this case, insulator 250 only needs to have a region with the above-mentioned thickness in at least a portion thereof.

[0287] 8A to 8D, the insulator 250 is shown as a single layer, but the present invention is not limited to this and may have a laminated structure of two or more layers. For example, as shown in Fig. 9B, the insulator 250 may have a two-layer laminated structure of an insulator 250a and an insulator 250b on the insulator 250a.

[0288] As shown in FIG. 9B , when the insulator 250 has a two-layer stacked structure, it is preferable that the lower insulator 250a be formed using an insulator that is easily permeable to oxygen, and the upper insulator 250b be formed using an insulator that suppresses oxygen diffusion. This configuration can suppress the diffusion of oxygen contained in the insulator 250a into the conductor 260. That is, it can suppress a decrease in the amount of oxygen supplied to the oxide 230. It can also suppress oxidation of the conductor 260 due to the oxygen contained in the insulator 250a. For example, the insulator 250a may be formed using a material that can be used for the insulator 250 described above, and the insulator 250b may be formed using an insulator containing one or both of aluminum and hafnium oxides. Examples of the insulator that can be used include aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), and an oxide containing hafnium and silicon (hafnium silicate). In this embodiment, hafnium oxide is used as the insulator 250b. In this case, the insulator 250b contains at least oxygen and hafnium. The thickness of the insulator 250b is 0.5 nm to 5.0 nm, preferably 1.0 nm to 5.0 nm, and more preferably 1.0 nm to 3.0 nm. In this case, the insulator 250b only needs to have a region with the above-described thickness in at least a portion thereof.

[0289] When silicon oxide or silicon oxynitride is used for the insulator 250a, the insulator 250b may be an insulating material, such as a high-k material with a high dielectric constant. By forming the gate insulator as a stacked structure of the insulators 250a and 250b, a thermally stable stacked structure with a high dielectric constant can be achieved. This allows the gate potential applied during transistor operation to be reduced while maintaining the physical thickness of the gate insulator. Furthermore, the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulator can be reduced. This allows the dielectric strength of the insulator 250 to be increased.

[0290] The insulator 254 functions as part of the gate insulator. A barrier insulating film against hydrogen is preferably used as the insulator 254. This can prevent impurities such as hydrogen contained in the conductor 260 from diffusing into the insulator 250 and the oxide 230b. The insulator 254 may be any of the insulators that can be used for the insulator 283 described above. For example, silicon nitride formed by the PEALD method may be used as the insulator 254. In this case, the insulator 254 is an insulator containing at least nitrogen and silicon.

[0291] Furthermore, the insulator 254 may further have a barrier property against oxygen, which can prevent oxygen contained in the insulator 250 from diffusing into the conductor 260.

[0292] Furthermore, the insulator 254, together with the insulator 252, the insulator 250, and the conductor 260, must be provided in an opening formed in the insulator 280 or the like. To miniaturize the transistor 200, it is preferable that the insulator 254 be thin. The thickness of the insulator 254 is 0.1 nm or more and 5.0 nm or less, preferably 0.5 nm or more and 3.0 nm or less, and more preferably 1.0 nm or more and 3.0 nm or less. In this case, the insulator 254 only needs to have a region with the above-described thickness in at least a portion thereof. Furthermore, it is preferable that the thickness of the insulator 254 is thinner than the thickness of the insulator 250. In this case, it is preferable that the insulator 254 only needs to have a region with a thickness thinner than the insulator 250 in at least a portion thereof.

[0293] The conductor 260 functions as a first gate electrode of the transistor 200. The conductor 260 preferably includes a conductor 260a and a conductor 260b disposed on the conductor 260a. For example, the conductor 260a is preferably disposed so as to surround the bottom and side surfaces of the conductor 260b. As shown in FIGS. 8B and 8C, the top of the conductor 260 roughly coincides with the top of the insulator 250. Although the conductor 260 is shown in FIGS. 8B and 8C as having a two-layer structure of the conductor 260a and the conductor 260b, it may have a single-layer structure or a stacked structure of three or more layers.

[0294] The conductor 260a is preferably made of a conductive material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules, copper atoms, etc. Alternatively, it is preferably made of a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0295] Furthermore, since the conductor 260a has the function of suppressing oxygen diffusion, it is possible to suppress a decrease in conductivity due to oxidation of the conductor 260b caused by oxygen contained in the insulator 250. As a conductive material having the function of suppressing oxygen diffusion, it is preferable to use, for example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like.

[0296] Furthermore, since the conductor 260 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, the conductor 260b can be made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor 260b may also have a layered structure, such as a layered structure of titanium or titanium nitride and the above conductive material.

[0297] Furthermore, in the transistor 200, the conductor 260 is formed in a self-aligned manner so as to fill an opening formed in the insulator 280 or the like. By forming the conductor 260 in this manner, the conductor 260 can be reliably placed in the region between the conductor 242a and the conductor 242b without alignment.

[0298] 8C , in the channel width direction of the transistor 200, the height of the bottom surface of the conductor 260 in a region where the conductor 260 and the oxide 230b do not overlap is preferably lower than the height of the bottom surface of the oxide 230b, relative to the bottom surface of the insulator 222. When the conductor 260, which functions as a gate electrode, covers the side and top surfaces of the channel formation region of the oxide 230b via the insulator 250 or the like, the electric field of the conductor 260 can be easily applied to the entire channel formation region of the oxide 230b. This increases the on-state current of the transistor 200 and improves its frequency characteristics. The difference between the height of the bottom surface of the conductor 260 and the height of the bottom surface of the oxide 230b in a region where the oxides 230a and 230b do not overlap with the conductor 260, relative to the bottom surface of the insulator 222, is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, and more preferably 5 nm or more and 20 nm or less.

[0299] The insulator 280 is provided on the insulator 275, and openings are formed in the regions where the insulator 250 and the conductor 260 are to be provided. The top surface of the insulator 280 may be flattened.

[0300] The insulator 280, which functions as an interlayer film, preferably has a low dielectric constant. Using a material with a low dielectric constant as the interlayer film can reduce the parasitic capacitance that occurs between wirings. The insulator 280 is preferably formed using, for example, the same material as the insulator 216. In particular, silicon oxide and silicon oxynitride are preferred because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide with vacancies are preferred because they can easily form regions containing oxygen that is released by heating.

[0301] The insulator 280 preferably has an excess oxygen region or excess oxygen. Furthermore, the concentration of impurities such as water and hydrogen in the insulator 280 is preferably reduced. For example, the insulator 280 may be made of silicon oxide, silicon oxynitride, or the like as appropriate. By providing an insulator having excess oxygen near the oxide 230, oxygen vacancies in the oxide 230 can be reduced, and the reliability of the transistor 200 can be improved.

[0302] The insulator 282 preferably functions as a barrier insulating film that suppresses the diffusion of impurities such as water and hydrogen from above into the insulator 280 and preferably has a function of capturing impurities such as hydrogen. The insulator 282 also preferably functions as a barrier insulating film that suppresses oxygen permeation. The insulator 282 may be an insulator made of a metal oxide having an amorphous structure, such as aluminum oxide. In this case, the insulator 282 contains at least oxygen and aluminum. By providing the insulator 282 in contact with the insulator 280 in the region between the insulators 212 and 283 and having a function of capturing impurities such as hydrogen, the insulator 282 can capture impurities such as hydrogen contained in the insulator 280 and maintain a constant amount of hydrogen in the region. In particular, using aluminum oxide having an amorphous structure as the insulator 282 is preferable because it may be able to more effectively capture or fix hydrogen. This enables the manufacture of a highly reliable transistor 200 and semiconductor device with excellent characteristics.

[0303] The insulator 283 functions as a barrier insulating film that suppresses diffusion of impurities such as water and hydrogen from above into the insulator 280. The insulator 283 is disposed over the insulator 282. It is preferable to use a nitride containing silicon, such as silicon nitride or silicon nitride oxide, as the insulator 283. For example, silicon nitride formed by a sputtering method can be used as the insulator 283. By using the sputtering method, a high-density silicon nitride film can be formed as the insulator 283. Alternatively, a silicon nitride film formed by a PEALD method or a CVD method may be stacked on top of the silicon nitride film formed by the sputtering method as the insulator 283.

[0304] <Materials for semiconductor devices> The following describes constituent materials that can be used in semiconductor devices.

[0305] <<Substrate>> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate. Examples of insulating substrates include glass substrates, quartz substrates, sapphire substrates, stabilized zirconia substrates (e.g., yttria-stabilized zirconia substrates), and resin substrates. Examples of semiconductor substrates include semiconductor substrates made of silicon or germanium, or compound semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, and gallium oxide. Examples of semiconductor substrates include those having an insulating region within the semiconductor substrate, such as an SOI (Silicon-On-Insulator) substrate. Examples of conductive substrates include graphite substrates, metal substrates, alloy substrates, and conductive resin substrates. Other examples include substrates having a metal nitride and a metal oxide. Examples of other substrates include a substrate in which a conductor or semiconductor is provided on an insulating substrate, a substrate in which a conductor or insulator is provided on a semiconductor substrate, and a substrate in which a semiconductor or insulator is provided on a conductive substrate. Alternatively, a substrate provided with elements may be used, such as a capacitor element, a resistor element, a switch element, a light-emitting element, a memory element, and the like.

[0306] <<Insulators>> Examples of the insulator include oxides, nitrides, oxynitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides, all of which have insulating properties.

[0307] For example, as transistors become more miniaturized and highly integrated, thinner gate insulators can cause problems such as leakage current. Using a high-k material for the gate insulator allows for lower voltage operation of the transistor while maintaining the physical film thickness. On the other hand, using a material with a low dielectric constant for the interlayer insulator can reduce the parasitic capacitance between wiring. Therefore, it is best to select materials based on the insulator's function.

[0308] Furthermore, examples of insulators with a high relative dielectric constant include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium.

[0309] Examples of insulators with a low dielectric constant include silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, silicon oxide with voids, and resin.

[0310] Furthermore, a transistor using a metal oxide can have stable electrical characteristics by being surrounded by an insulator that has a function of suppressing the permeation of impurities such as hydrogen and oxygen. Examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include insulators containing boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium, and tantalum, and can be used in a single layer or a stacked layer. Specifically, examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include metal oxides such as aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide, and metal nitrides such as aluminum nitride, silicon nitride oxide, and silicon nitride.

[0311] The insulator functioning as the gate insulator is preferably an insulator having a region containing oxygen that is released by heating. For example, by using a structure in which silicon oxide or silicon oxynitride having a region containing oxygen that is released by heating is in contact with the oxide 230, oxygen vacancies in the oxide 230 can be compensated for.

[0312] <<Conductors>> The conductor is preferably a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, lanthanum, etc., or an alloy containing the above metal elements as a component, or an alloy combining the above metal elements. For example, tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or maintain conductivity even when absorbing oxygen. Furthermore, semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may also be used.

[0313] Furthermore, a plurality of conductive layers formed from the above materials may be stacked. For example, a stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing oxygen. A stacked structure may be formed by combining the above-described material containing a metal element and a conductive material containing nitrogen. A stacked structure may be formed by combining the above-described material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen.

[0314] When an oxide is used for the channel formation region of a transistor, a conductor functioning as a gate electrode preferably has a stacked structure in which a material containing the metal element and a conductive material containing oxygen are combined. In this case, the conductive material containing oxygen is preferably provided on the channel formation region side. By providing the conductive material containing oxygen on the channel formation region side, oxygen released from the conductive material is easily supplied to the channel formation region.

[0315] In particular, as a conductor functioning as a gate electrode, it is preferable to use a conductive material containing oxygen and a metal element contained in the metal oxide in which the channel is formed. Alternatively, a conductive material containing the aforementioned metal element and nitrogen may be used. For example, a conductive material containing nitrogen, such as titanium nitride or tantalum nitride, may be used. Alternatively, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide doped with silicon may be used. Furthermore, indium gallium zinc oxide containing nitrogen may be used. Using such a material may allow hydrogen contained in the metal oxide in which the channel is formed to be captured. Alternatively, hydrogen introduced from an external insulator or the like may be captured.

[0316] <<Metal oxides>> It is preferable to use a metal oxide (oxide semiconductor) that functions as a semiconductor as the oxide 230. Metal oxides that can be used as the oxide 230 according to the present invention will be described below.

[0317] The metal oxide preferably contains at least indium or zinc. It is particularly preferable that it contains indium and zinc. It is also preferable that it contains aluminum, gallium, yttrium, tin, or the like in addition to these. It may also contain one or more elements selected from boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, and the like.

[0318] Here, we consider a case where the metal oxide is an In-M-Zn oxide containing indium, element M, and zinc. The element M is aluminum, gallium, yttrium, or tin. Other elements that can be used for element M include boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt. However, there are cases where a combination of the aforementioned elements can be used as element M.

[0319] In this specification and the like, nitrogen-containing metal oxides may also be collectively referred to as metal oxides. Nitrogen-containing metal oxides may also be referred to as metal oxynitrides.

[0320] <Classification of crystal structures> First, classification of crystal structures in oxide semiconductors will be described with reference to Fig. 10A. Fig. 10A is a diagram illustrating classification of crystal structures of oxide semiconductors, typically IGZO (a metal oxide containing In, Ga, and Zn).

[0321] As shown in FIG. 10A, oxide semiconductors are broadly classified into "amorphous," "crystalline," and "crystal." "Amorphous" includes completely amorphous. "Crystalline" includes c-axis-aligned crystalline (CAAC), nanocrystalline (nc), and cloud-aligned composite (CAC). The "Crystalline" classification excludes single crystal, polycrystal, and completely amorphous (excluding single crystal and polycrystal). "Crystal" includes single crystal and polycrystal.

[0322] The structure within the bold frame in Figure 10A is an intermediate state between "amorphous" and "crystal," and is a structure that belongs to a new boundary region (new crystalline phase). In other words, this structure can be said to be completely different from the energetically unstable "amorphous" and "crystal."

[0323] The crystalline structure of a film or substrate can be evaluated using X-ray diffraction (XRD) spectroscopy. Figure 10B shows the XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of a CAAC-IGZO film classified as "Crystalline." The GIXD method is also known as the thin-film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by GIXD measurement shown in Figure 10B may be simply referred to as the XRD spectrum in this specification. The composition of the CAAC-IGZO film shown in Figure 10B is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in Figure 10B is 500 nm.

[0324] In Figure 10B, the horizontal axis is 2θ [deg.] and the vertical axis is intensity [au]. As shown in Figure 10B, a peak indicating clear crystallinity is detected in the XRD spectrum of the CAAC-IGZO film. Specifically, a peak indicating c-axis orientation is detected near 2θ = 31° in the XRD spectrum of the CAAC-IGZO film. Note that, as shown in Figure 10B, the peak near 2θ = 31° is asymmetrical with respect to the angle at which the peak intensity is detected.

[0325] The crystalline structure of a film or substrate can be evaluated by the diffraction pattern (also called the nanobeam electron diffraction pattern) observed using nanobeam electron diffraction (NBED). The diffraction pattern of the CAAC-IGZO film is shown in Figure 10C. Figure 10C shows a diffraction pattern observed using NBED, in which an electron beam is incident parallel to the substrate. The composition of the CAAC-IGZO film shown in Figure 10C is approximately In:Ga:Zn = 4:2:3 [atomic ratio]. In the nanobeam electron diffraction method, electron diffraction is performed using a probe diameter of 1 nm.

[0326] As shown in Figure 10C, multiple spots indicating c-axis orientation are observed in the diffraction pattern of the CAAC-IGZO film.

[0327] <<Structure of oxide semiconductor>> Note that oxide semiconductors may be classified differently from those shown in FIG. 10A when focusing on their crystal structures. For example, oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and nc-OS. Non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, amorphous-like oxide semiconductors (a-like OSs), amorphous oxide semiconductors, and the like.

[0328] Here, the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described in detail.

[0329] [CAAC-OS] CAAC-OS is an oxide semiconductor having multiple crystalline regions, each with its c-axis aligned in a specific direction. The specific direction can be the thickness direction of the CAAC-OS film, the normal direction to the surface on which the CAAC-OS film is formed, or the normal direction to the surface of the CAAC-OS film. A crystalline region is a region with periodic atomic arrangement. If the atomic arrangement is considered as a lattice arrangement, a crystalline region can also be a region with a uniform lattice arrangement. Furthermore, CAAC-OS has a region where multiple crystalline regions are connected in the ab-plane direction, and the region may have distortion. Note that distortion refers to a location where the lattice arrangement changes between a region with a uniform lattice arrangement and a region with a different uniform lattice arrangement in the region where multiple crystalline regions are connected. In other words, CAAC-OS is an oxide semiconductor with a c-axis aligned but no clear orientation in the ab-plane direction.

[0330] Each of the multiple crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of the crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of the crystalline region may be several tens of nm.

[0331] In an In-M-Zn oxide (wherein M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), the CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter referred to as an In layer) and a layer containing M, zinc (Zn), and oxygen (hereinafter referred to as an (M, Zn) layer) are stacked. Note that indium and the element M are mutually substituted. Therefore, the (M, Zn) layer may contain indium. The In layer may contain M. The In layer may contain Zn. The layered structure is observed as a lattice image in a high-resolution TEM image, for example.

[0332] When the CAAC-OS film is subjected to structural analysis using, for example, an XRD apparatus, a peak indicating c-axis orientation is detected at or near 2θ=31° in out-of-plane XRD measurement using θ / 2θ scan. Note that the position of the peak indicating c-axis orientation (2θ value) may vary depending on the type and composition of the metallic elements constituting the CAAC-OS.

[0333] Furthermore, for example, in the electron diffraction pattern of the CAAC-OS film, multiple bright spots are observed, and the spots are observed at positions that are point-symmetric with respect to the spot of the incident electron beam that has passed through the sample (also called the direct spot).

[0334] When the crystalline region is observed from the specific direction, the lattice arrangement within the crystalline region is basically a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be non-regular hexagonal. Furthermore, the distortion may have a pentagonal, heptagonal, or other lattice arrangement. In the CAAC-OS, no clear grain boundaries are observed even near the distortion. This indicates that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is thought to be because the CAAC-OS can tolerate distortion due to the lack of close-packed oxygen atom arrangement in the ab-plane direction and the change in interatomic bond distance caused by metal atom substitution.

[0335] A crystal structure with clear grain boundaries is called polycrystalline. Grain boundaries act as recombination centers, trapping carriers and potentially causing a decrease in the on-state current and field-effect mobility of a transistor. Therefore, CAAC-OS, which lacks clear grain boundaries, is one of the crystalline oxides with a crystal structure suitable for use in the semiconductor layer of a transistor. Zn is preferred for use in CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are suitable because they can suppress the generation of grain boundaries more effectively than In oxide.

[0336] CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries. Therefore, it can be said that the decrease in electron mobility due to grain boundaries is unlikely to occur in CAAC-OS. Furthermore, since the crystallinity of oxide semiconductors can be reduced by impurities or defects, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, oxide semiconductors with CAAC-OS have stable physical properties. Therefore, oxide semiconductors with CAAC-OS are heat-resistant and highly reliable. Furthermore, CAAC-OS is stable even under high temperatures (so-called thermal budgets) during the manufacturing process. Therefore, using CAAC-OS for OS transistors enables greater flexibility in the manufacturing process.

[0337] [nc-OS] The nc-OS has periodic atomic arrangement in a microscopic region (e.g., a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In other words, the nc-OS has microcrystalline structures. The size of the microcrystalline structures is, for example, 1 nm to 10 nm, particularly 1 nm to 3 nm, and therefore these microcrystalline structures are also called nanocrystalline structures. Furthermore, the nc-OS exhibits no regularity in the crystal orientation between different nanocrystalline structures. Therefore, the entire film lacks orientation. Therefore, depending on the analytical method, the nc-OS may be indistinguishable from an a-like OS or an amorphous oxide semiconductor. For example, when a structural analysis of an nc-OS film is performed using an XRD apparatus, no peaks indicating crystallinity are detected in out-of-plane XRD measurements using θ / 2θ scanning. Furthermore, when an nc-OS film is subjected to electron diffraction (also known as selected-area electron diffraction) using an electron beam with a probe diameter larger than that of nanocrystalline structures (e.g., 50 nm or larger), a halo-like diffraction pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to or smaller than the size of the nanocrystals (for example, 1 nm to 30 nm), an electron diffraction pattern can be obtained in which multiple spots are observed within a ring-shaped region centered on the direct spot.

[0338] [a-like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has a pore or low-density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS. Furthermore, the a-like OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0339] <<Oxide semiconductor structure>> Next, the above-mentioned CAC-OS will be described in detail, which relates to the material composition.

[0340] [CAC-OS] CAC-OS is a material structure in which elements constituting a metal oxide are unevenly distributed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or a similar size range. Hereinafter, a metal oxide in which one or more metal elements are unevenly distributed and the regions containing the metal elements are mixed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or a similar size range, is also referred to as a mosaic or patch state.

[0341] Furthermore, CAC-OS has a mosaic structure in which the material is separated into first and second regions, and the first regions are distributed throughout the film (hereinafter also referred to as a cloud structure). That is, CAC-OS is a composite metal oxide having a structure in which the first and second regions are mixed.

[0342] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in the In-Ga-Zn oxide are denoted as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS in the In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. The second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0343] Specifically, the first region is a region whose main component is indium oxide, indium zinc oxide, or the like. The second region is a region whose main component is gallium oxide, gallium zinc oxide, or the like. In other words, the first region can be rephrased as a region whose main component is In. The second region can be rephrased as a region whose main component is Ga.

[0344] It should be noted that there are cases where a clear boundary between the first region and the second region cannot be observed.

[0345] For example, in the case of CAC-OS in In-Ga-Zn oxide, EDX mapping obtained using EDX (Energy Dispersive X-ray spectroscopy) confirms that the CAC-OS has a structure in which a region mainly composed of In (first region) and a region mainly composed of Ga (second region) are unevenly distributed and mixed.

[0346] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulating property due to the second region act in a complementary manner, thereby providing the CAC-OS with a switching function (the ability to turn on and off). In other words, CAC-OS has a conductive function in part of the material and an insulating function in part of the material, and the material as a whole functions as a semiconductor. By separating the conductive function from the insulating function, both functions can be maximized. Therefore, by using CAC-OS in a transistor, a high on-current (I on ), high field-effect mobility (μ), and good switching behavior can be achieved.

[0347] Oxide semiconductors have a variety of structures, each with different characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, a CAC-OS, an nc-OS, and a CAAC-OS.

[0348] <Transistors containing oxide semiconductors> Next, a case where the oxide semiconductor is used in a transistor will be described.

[0349] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility and high reliability can be realized.

[0350] The channel formation region of the transistor is preferably formed using an oxide semiconductor with a low carrier concentration. For example, the carrier concentration of the channel formation region of the oxide semiconductor is 1×10 17 cm -3 Less than 1 × 10 15 cm -3 or less, more preferably 1 × 10 13 cm -3 Less than 1×10, more preferably 11 cm -3 or less, more preferably 1 × 10 10 cm -3Less than 1 x 10 -9 cm -3 The above is the case. Note that in order to reduce the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced to reduce the density of defect states. In this specification and the like, a semiconductor having a low impurity concentration and a low density of defect states is referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. Note that an oxide semiconductor having a low carrier concentration may also be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor.

[0351] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and therefore the density of trap states may also be low.

[0352] Furthermore, charges trapped in the trap states of an oxide semiconductor take a long time to disappear and may behave like fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.

[0353] Therefore, in order to stabilize the electrical characteristics of a transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. Furthermore, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0354] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0355] When an oxide semiconductor contains silicon or carbon, which is one of the Group 14 elements, defect levels are formed in the oxide semiconductor. Therefore, the concentrations of silicon and carbon in the channel formation region of the oxide semiconductor and the silicon or carbon near the interface with the channel formation region of the oxide semiconductor (concentrations obtained by secondary ion mass spectrometry (SIMS)) are calculated to be 2×10 18atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0356] Furthermore, when an oxide semiconductor contains an alkali metal or alkaline earth metal, defect states may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or alkaline earth metal is likely to have normally-on characteristics. For this reason, when the concentration of the alkali metal or alkaline earth metal in the channel formation region of the oxide semiconductor obtained by SIMS is set to 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0357] Furthermore, when nitrogen is contained in an oxide semiconductor, electrons serving as carriers are generated, the carrier concentration increases, and the semiconductor is likely to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have normally-on characteristics. Alternatively, when nitrogen is contained in an oxide semiconductor, trap states may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the channel formation region of an oxide semiconductor obtained by SIMS is set to 5×10 19 atoms / cm 3 Less than or equal to 5 x 10 18 atoms / cm 3 Less than 1×10, more preferably 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 Do the following:

[0358] Furthermore, hydrogen contained in an oxide semiconductor may react with oxygen bonded to a metal atom to form water, which may form an oxygen vacancy. When hydrogen enters the oxygen vacancy, electrons serving as carriers may be generated. Furthermore, some of the hydrogen may bond with oxygen bonded to a metal atom to generate electrons serving as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is likely to have normally-on characteristics. For this reason, it is preferable to reduce the amount of hydrogen in the channel formation region of the oxide semiconductor as much as possible. Specifically, the hydrogen concentration measured by SIMS in the channel formation region of the oxide semiconductor is 1×10 20 atoms / cm 3 Less than 5 x 10 19 atoms / cm 3 less than 1×10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Make it less than.

[0359] When an oxide semiconductor with sufficiently reduced impurities is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0360] <<Other semiconductor materials>> The semiconductor material that can be used for the oxide 230 is not limited to the metal oxides described above. A semiconductor material having a band gap (a semiconductor material that is not a zero-gap semiconductor) may also be used for the oxide 230. For example, it is preferable to use a semiconductor of a simple element such as silicon, a compound semiconductor such as gallium arsenide, or a layered material that functions as a semiconductor (also called an atomic layer material or a two-dimensional material). In particular, it is preferable to use a layered material that functions as a semiconductor.

[0361] In this specification and the like, a layered material is a general term for a group of materials having a layered crystal structure. A layered crystal structure is a structure in which layers formed by covalent or ionic bonds are stacked via bonds weaker than covalent or ionic bonds, such as van der Waals forces. A layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, a transistor with a large on-current can be provided.

[0362] Layered materials include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing chalcogen. Chalcogen is a general term for elements in Group 16, including oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Chalcogenides also include transition metal chalcogenides and Group 13 chalcogenides.

[0363] It is preferable to use, for example, a transition metal chalcogenide that functions as a semiconductor as the oxide 230. Specific examples of transition metal chalcogenides that can be used as the oxide 230 include molybdenum sulfide (typically MoS2), molybdenum selenide (typically MoSe2), molybdenum tellurium (typically MoTe2), tungsten sulfide (typically WS2), tungsten selenide (typically WSe2), tungsten tellurium (typically WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (typically ZrS2), and zirconium selenide (typically ZrSe2).

[0364] <Application examples of semiconductor devices> An example of a semiconductor device according to one embodiment of the present invention will be described below with reference to FIGS.

[0365] FIG. 11A shows a top view of the semiconductor device 500. The x-axis in FIG. 11A is parallel to the channel length direction of the transistor 200, and the y-axis is perpendicular to the x-axis. FIG. 11B is a cross-sectional view corresponding to the portion indicated by the dashed dotted line A1-A2 in FIG. 11A, and is also a cross-sectional view of the transistor 200 in the channel length direction. FIG. 11C is a cross-sectional view corresponding to the portion indicated by the dashed dotted line A3-A4 in FIG. 11A, and is also a cross-sectional view of the opening region 400 and its vicinity. Note that some elements have been omitted from the top view in FIG. 11A for clarity.

[0366] 11A to 11C, the same reference numerals are used to designate structures having the same functions as those constituting the semiconductor device shown in <Configuration Example of Semiconductor Device>. Also in this section, the materials described in detail in <Configuration Example of Semiconductor Device> can be used as the materials constituting the semiconductor device.

[0367] 11A to 11C is a modified example of the semiconductor device shown in FIGS. 8A to 8D. The semiconductor device 500 shown in FIGS. 11A to 11C differs from the semiconductor device shown in FIGS. 8A to 8D in that an opening region 400 is formed in the insulator 282 and the insulator 280. The semiconductor device 500 also differs from the semiconductor device shown in FIGS. 8A to 8D in that a sealing portion 265 is formed to surround the multiple transistors 200.

[0368] The semiconductor device 500 has a plurality of transistors 200 and a plurality of opening regions 400 arranged in a matrix. A plurality of conductors 260 functioning as gate electrodes of the transistors 200 are provided extending in the y-axis direction. The opening regions 400 are formed in regions that do not overlap with the oxide 230 and the conductors 260. A sealing portion 265 is formed to surround the plurality of transistors 200, the plurality of conductors 260, and the plurality of opening regions 400. Note that the number, arrangement, and size of the transistors 200, the conductors 260, and the opening regions 400 are not limited to the structures shown in FIGS. 11A to 11C and may be set appropriately according to the design of the semiconductor device 500.

[0369] 11B and 11C, the sealing portion 265 is provided to surround the multiple transistors 200, the insulators 216, 222, 275, 280, and 282. In other words, the insulator 283 is provided to cover the insulators 216, 222, 275, 280, and 282. In the sealing portion 265, the insulator 283 is in contact with the upper surface of the insulator 214. In addition, the insulator 274 is provided between the insulators 283 and 285 on the sealing portion 265. The upper surface of the insulator 274 is approximately flush with the uppermost surface of the insulator 283. In addition, the insulator 274 may be made of the same insulator as the insulator 280.

[0370] With this structure, the multiple transistors 200 can be enclosed (sealed) with the insulators 283, 214, and 212. Here, it is preferable that one or more of the insulators 283, 214, and 212 function as a barrier insulating film against hydrogen. This can prevent hydrogen contained outside the region surrounded by the sealing portion 265 from mixing into the region surrounded by the sealing portion 265. The insulators 283, 214, and 212 having this function may be called a sealing film.

[0371] 11C , insulator 282 has an opening in opening region 400. In addition, insulator 280 may have a groove in opening region 400, overlapping the opening of insulator 282. The depth of the groove in insulator 280 may be at most deep enough to expose the top surface of insulator 275, and may be, for example, approximately ¼ to ½ of the maximum film thickness of insulator 280.

[0372] 11C , insulator 283 contacts the side surface of insulator 282, the side surface of insulator 280, and the top surface of insulator 280 inside opening region 400. In addition, a portion of insulator 274 may be formed in opening region 400 so as to fill a recess formed in insulator 283. In this case, the height of the top surface of insulator 274 formed in opening region 400 and the height of the top surface of insulator 283 may roughly match.

[0373] By performing heat treatment with the opening region 400 formed and the insulator 280 exposed through the opening of the insulator 282, oxygen can be supplied to the oxide 230 while some of the oxygen contained in the insulator 280 diffuses outward from the opening region 400. This allows sufficient oxygen to be supplied from the insulator 280, which contains oxygen released by heating, to a region in the oxide semiconductor that functions as a channel formation region and its vicinity, while preventing excessive oxygen from being supplied.

[0374] At this time, the hydrogen contained in the insulator 280 can be bonded with oxygen and released to the outside through the opening region 400. The hydrogen bonded with oxygen is released as water. Therefore, the hydrogen contained in the insulator 280 can be reduced, and the hydrogen contained in the insulator 280 can be prevented from mixing into the oxide 230.

[0375] 11A, the shape of the opening region 400 in a top view is substantially rectangular, but the present invention is not limited to this. For example, the shape of the opening region 400 in a top view may be rectangular, elliptical, circular, diamond-shaped, or a combination thereof. The area and spacing of the opening regions 400 can be appropriately set in accordance with the design of the semiconductor device including the transistors 200. For example, in a region where the density of the transistors 200 is low, the area of ​​the opening regions 400 can be increased or the spacing between the opening regions 400 can be narrowed. For example, in a region where the density of the transistors 200 is high, the area of ​​the opening regions 400 can be narrowed or the spacing between the opening regions 400 can be widened.

[0376] <Method for manufacturing semiconductor device> Next, a manufacturing method of the semiconductor device illustrated in FIGS. 8A to 8D, which is one embodiment of the present invention, will be described with reference to FIGS. 12A to 17D.

[0377] A in each figure shows a top view. B in each figure is a cross-sectional view corresponding to the portion indicated by the dashed dotted line A1-A2 in A of each figure, and is also a cross-sectional view in the channel length direction of the transistor 200. C in each figure is a cross-sectional view corresponding to the portion indicated by the dashed dotted line A3-A4 in A of each figure, and is also a cross-sectional view in the channel width direction of the transistor 200. D in each figure is a cross-sectional view of the portion indicated by the dashed dotted line A5-A6 in A of each figure. Note that some elements are omitted from the top view in A of each figure for clarity.

[0378] In the following, insulating materials for forming insulators, conductive materials for forming conductors, or semiconductor materials for forming semiconductors can be formed as films using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like, as appropriate.

[0379] There are three types of sputtering methods: RF sputtering, which uses a high-frequency power supply for sputtering; DC sputtering, which uses a direct current power supply; and pulsed DC sputtering, which changes the voltage applied to the electrode in a pulsed manner. RF sputtering is mainly used to deposit insulating films, while DC sputtering is mainly used to deposit metal conductive films. Pulsed DC sputtering is mainly used to deposit compounds such as oxides, nitrides, and carbides using reactive sputtering.

[0380] CVD methods can be classified into plasma-enhanced CVD (PECVD), which uses plasma, thermal CVD (TCVD: Thermal CVD), which uses heat, and photo-CVD (Photo-CVD), which uses light. They can also be further divided into metal CVD (MCVD: Metal CVD) and metal-organic CVD (MOCVD: Metal Organic CVD) depending on the source gas used.

[0381] The plasma CVD method can produce high-quality films at relatively low temperatures. Furthermore, because the thermal CVD method does not use plasma, it is a film formation method that can minimize plasma damage to the workpiece. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device may become charged up by receiving electric charge from the plasma. In this case, the accumulated electric charge may destroy the wiring, electrodes, elements, etc. included in the semiconductor device. On the other hand, the thermal CVD method, which does not use plasma, does not cause such plasma damage, and therefore can increase the yield of semiconductor devices. Furthermore, because the thermal CVD method does not cause plasma damage during film formation, it can produce films with fewer defects.

[0382] As the ALD method, a thermal ALD method in which a reaction between a precursor and a reactant is carried out using only thermal energy, a PEALD method in which a plasma-excited reactant is used, or the like can be used.

[0383] CVD and ALD differ from sputtering, which deposits particles emitted from a target. Therefore, they are film formation methods that are less affected by the shape of the workpiece and have good step coverage. ALD, in particular, offers excellent step coverage and thickness uniformity, making it suitable for coating the surfaces of openings with high aspect ratios. However, because ALD has a relatively slow film formation rate, it may be preferable to use it in combination with other film formation methods, such as CVD, which has a faster film formation rate.

[0384] Furthermore, the CVD method allows for the deposition of a film with any desired composition by adjusting the flow rate ratio of the source gases. For example, the CVD method allows for the deposition of a film with a continuously changing composition by changing the flow rate ratio of the source gases during deposition. When depositing a film while changing the flow rate ratio of the source gases, the time required for film deposition can be shortened compared to when depositing a film using multiple deposition chambers, since no time is required for transport or pressure adjustment. Therefore, the productivity of semiconductor devices can be improved in some cases.

[0385] Furthermore, the ALD method allows for the deposition of films of any desired composition by simultaneously introducing multiple different precursors, or by controlling the number of cycles for each precursor.

[0386] First, a substrate (not shown) is prepared, and an insulator 212 is formed on the substrate (see FIGS. 12A to 12D). The insulator 212 is preferably formed by sputtering. By using a sputtering method that does not require the use of hydrogen-containing molecules in the film formation gas, the hydrogen concentration in the insulator 212 can be reduced. However, the method for forming the insulator 212 is not limited to sputtering, and a CVD method, an MBE method, a PLD method, an ALD method, or the like may also be used as appropriate. In this embodiment, a silicon nitride film is formed as the insulator 212 by pulse DC sputtering using a silicon target in an atmosphere containing nitrogen gas.

[0387] By using an insulator that is impermeable to impurities such as water and hydrogen, such as silicon nitride, it is possible to suppress the diffusion of impurities such as water and hydrogen contained in layers below the insulator 212. Furthermore, by using an insulator that is impermeable to copper, such as silicon nitride, as the insulator 212, even if a metal that easily diffuses, such as copper, is used for a conductor in a layer (not shown) below the insulator 212, it is possible to suppress the upward diffusion of the metal through the insulator 212.

[0388] Next, the insulator 214 is deposited on the insulator 212 (see FIGS. 12A to 12D). The insulator 214 is preferably deposited by sputtering. By using sputtering, which does not require the use of hydrogen-containing molecules in the deposition gas, the hydrogen concentration in the insulator 214 can be reduced. However, the deposition of the insulator 214 is not limited to sputtering, and CVD, MBE, PLD, ALD, or the like may also be used as appropriate. In this embodiment, aluminum oxide is deposited as the insulator 214 by pulse DC sputtering using an aluminum target in an atmosphere containing oxygen gas.

[0389] It is preferable to use a metal oxide having an amorphous structure, such as aluminum oxide, which has a high ability to capture or fix hydrogen, as the insulator 214. This allows hydrogen contained in the insulator 216 to be captured or fixed and prevents the hydrogen from diffusing into the oxide 230. In particular, using aluminum oxide having an amorphous structure or aluminum oxide having an amorphous structure as the insulator 214 is preferable because it may be possible to more effectively capture or fix hydrogen. This enables the manufacture of a highly reliable transistor 200 and semiconductor device with favorable characteristics.

[0390] Next, the insulator 216 is deposited on the insulator 214. The insulator 216 is preferably deposited by sputtering. The hydrogen concentration in the insulator 216 can be reduced by using sputtering, which does not require the use of hydrogen-containing molecules in the deposition gas. However, the deposition of the insulator 216 is not limited to sputtering, and CVD, MBE, PLD, ALD, or the like may also be used as appropriate. In this embodiment, silicon oxide is deposited as the insulator 216 by pulsed DC sputtering using a silicon target in an atmosphere containing oxygen gas.

[0391] The insulators 212, 214, and 216 are preferably successively deposited without exposure to the atmosphere. For example, a multi-chamber deposition apparatus can be used. This allows the insulators 212, 214, and 216 to be deposited with reduced hydrogen content and also reduces the amount of hydrogen mixed into the films between deposition steps.

[0392] Next, an opening is formed in the insulator 216, reaching the insulator 214. The opening may be, for example, a groove or a slit. The region where the opening is formed may also be referred to as an opening. The opening may be formed by wet etching, but dry etching is preferable for fine processing. Furthermore, it is preferable to select an insulator for the insulator 214 that functions as an etching stopper film when the insulator 216 is etched to form the groove. For example, if silicon oxide or silicon oxynitride is used for the insulator 216 that forms the groove, it is preferable to use silicon nitride, aluminum oxide, or hafnium oxide for the insulator 214.

[0393] The dry etching apparatus may be a capacitively coupled plasma (CCP) etching apparatus having parallel-plate electrodes. The capacitively coupled plasma etching apparatus having parallel-plate electrodes may be configured to apply a high-frequency voltage to one of the parallel-plate electrodes. Alternatively, it may be configured to apply a plurality of different high-frequency voltages to one of the parallel-plate electrodes. Alternatively, it may be configured to apply a high-frequency voltage of the same frequency to each of the parallel-plate electrodes. Alternatively, it may be configured to apply high-frequency voltages of different frequencies to each of the parallel-plate electrodes. Alternatively, a dry etching apparatus having a high-density plasma source may be used. For example, an inductively coupled plasma (ICP) etching apparatus may be used as the dry etching apparatus having a high-density plasma source.

[0394] After the opening is formed, a conductive film that will become the conductor 205a is formed. The conductive film preferably includes a conductor that has a function of suppressing oxygen permeation. For example, tantalum nitride, tungsten nitride, titanium nitride, or the like can be used. Alternatively, the conductive film can be a stacked film of a conductor that has a function of suppressing oxygen permeation and tantalum, tungsten, titanium, molybdenum, aluminum, copper, or a molybdenum-tungsten alloy. The conductive film can be formed by sputtering, CVD, MBE, PLD, ALD, or the like.

[0395] In this embodiment, titanium nitride is deposited as the conductive film that becomes the conductor 205a. By using such a metal nitride as the lower layer of the conductor 205b, it is possible to prevent the conductor 205b from being oxidized by the insulator 216 or the like. Furthermore, even if a metal that easily diffuses, such as copper, is used as the conductor 205b, it is possible to prevent the metal from diffusing out of the conductor 205a.

[0396] Next, a conductive film to be the conductor 205b is formed. For the conductive film, tantalum, tungsten, titanium, molybdenum, aluminum, copper, a molybdenum-tungsten alloy, or the like can be used. The conductive film can be formed by a plating method, a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, tungsten is formed as the conductive film.

[0397] Next, a CMP process is performed to remove a portion of the conductive film that will become the conductor 205a and a portion of the conductive film that will become the conductor 205b, thereby exposing the insulator 216 (see FIGS. 12A to 12D). As a result, the conductor 205a and the conductor 205b remain only in the openings. Note that the CMP process may remove a portion of the insulator 216.

[0398] Next, the insulator 222 is formed over the insulator 216 and the conductor 205 (see FIGS. 12A to 12D). The insulator 222 may contain one or both of aluminum and hafnium oxides. Aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) is preferably used as the insulator containing one or both of aluminum and hafnium oxides. Alternatively, hafnium zirconium oxide is preferably used. An insulator containing one or both of aluminum and hafnium oxides has barrier properties against oxygen, hydrogen, and water. The insulator 222 having barrier properties against hydrogen and water can prevent hydrogen and water contained in structures provided around the transistor 200 from diffusing into the inside of the transistor 200 through the insulator 222, thereby preventing oxygen vacancies from being generated in the oxide 230.

[0399] The insulator 222 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. In this embodiment, hafnium oxide is formed as the insulator 222 by an ALD method.

[0400] Subsequently, heat treatment is preferably performed. The heat treatment may be performed at a temperature of 250°C to 650°C, preferably 300°C to 500°C, and more preferably 320°C to 450°C. The heat treatment may be performed in a nitrogen gas or inert gas atmosphere, or in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, when the heat treatment is performed in a mixed atmosphere of nitrogen gas and oxygen gas, the oxygen gas concentration may be about 20%. The heat treatment may also be performed under reduced pressure. Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere, followed by another heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas to compensate for the desorbed oxygen.

[0401] The gas used in the heat treatment is preferably highly purified. For example, the amount of moisture contained in the gas used in the heat treatment is 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less. By performing the heat treatment using a highly purified gas, moisture and the like can be prevented from being introduced into the insulator 222 as much as possible.

[0402] Next, the insulating film 224A is formed on the insulator 222 (see FIGS. 12A to 12D). The insulating film 224A can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. In this embodiment, silicon oxide is formed as the insulating film 224A by sputtering. By using the sputtering method, which does not require the use of hydrogen-containing molecules in the film formation gas, the hydrogen concentration in the insulating film 224A can be reduced. Since the insulating film 224A will come into contact with the oxide 230a in a later step, it is preferable that the hydrogen concentration be reduced in this manner.

[0403] Next, oxide films 230A and 230B are sequentially formed on insulating film 224A (see FIGS. 12A to 12D). Preferably, oxide films 230A and 230B are successively formed without being exposed to the atmosphere. By forming the films without exposure to the atmosphere, it is possible to prevent impurities or moisture from the atmosphere from adhering to oxide films 230A and 230B, and to keep the vicinity of the interface between oxide films 230A and 230B clean.

[0404] The oxide film 230A and the oxide film 230B can be formed by sputtering, CVD, MBE, PLD, ALD, etc. In this embodiment, the oxide film 230A and the oxide film 230B are formed by sputtering.

[0405] For example, when the oxide film 230A and the oxide film 230B are formed by sputtering, oxygen or a mixture of oxygen and a noble gas is used as the sputtering gas. By increasing the proportion of oxygen contained in the sputtering gas, the amount of excess oxygen in the formed oxide film can be increased. Furthermore, when the oxide film is formed by sputtering, the above-mentioned In-M-Zn oxide target can be used.

[0406] In particular, during the formation of the oxide film 230A, some of the oxygen contained in the sputtering gas may be supplied to the insulating film 224A. Therefore, the proportion of oxygen contained in the sputtering gas should be 70% or more, preferably 80% or more, and more preferably 100%.

[0407] When the oxide film 230B is formed by a sputtering method, an oxygen-excessive oxide semiconductor is formed when the proportion of oxygen contained in the sputtering gas is set to more than 30% and less than or equal to 100%, preferably 70% to 100%. A transistor using an oxygen-excessive oxide semiconductor for a channel formation region can have relatively high reliability. However, one embodiment of the present invention is not limited thereto. When the oxide film 230B is formed by a sputtering method, an oxygen-deficient oxide semiconductor is formed when the proportion of oxygen contained in the sputtering gas is set to 1% to 30%, preferably 5% to 20%. A transistor using an oxygen-deficient oxide semiconductor for a channel formation region can have relatively high field-effect mobility. Furthermore, the crystallinity of the oxide film can be improved by forming the oxide film while heating the substrate.

[0408] In this embodiment, the oxide film 230A is formed by sputtering using an oxide target with an atomic ratio of In:Ga:Zn=1:3:4. The oxide film 230B is formed by sputtering using an oxide target with an atomic ratio of In:Ga:Zn=4:2:4.1, an oxide target with an atomic ratio of In:Ga:Zn=1:1:1, or an oxide target with an atomic ratio of In:Ga:Zn=1:1:2. The oxide films 230a and 230b can be formed according to the desired characteristics by appropriately selecting the film formation conditions and atomic ratios.

[0409] It is preferable to deposit the insulating film 224A, the oxide film 230A, and the oxide film 230B successively by sputtering without exposing them to the atmosphere. For example, a multi-chamber deposition apparatus may be used. This reduces the amount of hydrogen that gets mixed into the insulating film 224A, the oxide film 230A, and the oxide film 230B between deposition steps.

[0410] The oxide film 230A and the oxide film 230B may be formed using the ALD method. Here, a method for forming the oxide film 230A and the oxide film 230B using the ALD method will be described. Note that, since the film formation method using the ALD method has also been described in the previous embodiment, differences will be mainly described, and the description of the previous embodiment can be referred to for common parts.

[0411] The In-M-Zn oxide that can be used for the oxide film 230A and the oxide film 230B tends to have a layered crystal structure in which a layer containing indium (In) and oxygen (hereinafter referred to as the In layer) and a layer containing the element M, zinc (Zn), and oxygen (hereinafter referred to as the (M, Zn) layer) are stacked. The number of (M, Zn) layers between two In layers correlates with the composition of the In-M-Zn oxide. For example, when the composition is In:M:Zn=1:1:m, the number of (M, Zn) layers between the two In layers is likely to be (m+1).

[0412] As an example of a method for forming the oxide film 230A and the oxide film 230B using the ALD method, a method for forming an In-M-Zn oxide film will be described with reference to Fig. 6C. Fig. 6C shows an example of a film formation sequence for forming a film using precursors 411 to 413 and an oxidizing gas 414. The film formation sequence includes steps S11 to S13.

[0413] The precursor 411 can be a precursor containing indium. The precursor 412 can be a precursor containing an element M. The precursor 413 can be a precursor containing zinc. Note that each of the precursors 411 to 413 may be an inorganic precursor or an organic precursor. The oxidizing gas 414 can be a gas applicable to the oxidizing gas described in the above embodiment.

[0414] First, step S11 is performed. In step S11, the following steps are performed in order: introducing precursor 411 and allowing the precursor containing indium to be adsorbed onto the surface to be formed; stopping the introduction of precursor 411 and purging excess precursor 411 from within the chamber; introducing oxidizing gas 414 and oxidizing precursor 411 to form an In layer; and stopping the introduction of oxidizing gas 414 and purging excess oxidizing gas 414 from within the chamber.

[0415] Next, step S12 is performed. In step S12, the following steps are performed in order: introducing precursor 412 and adsorbing the precursor having element M onto the surface of the In layer; stopping the introduction of precursor 413 and purging excess precursor 412 from the chamber; introducing oxidizing gas 414 and oxidizing precursor 412 to form a layer having element M and oxygen (hereinafter, M layer); and stopping the introduction of oxidizing gas 414 and purging excess oxidizing gas 414 from the chamber.

[0416] Next, step S13 is performed. In step S13, the following steps are performed in order: introducing precursor 413 and adsorbing the zinc-containing precursor onto the surface of the M layer; stopping the introduction of precursor 413 and purging excess precursor 413 from within the chamber; introducing oxidizing gas 414 and oxidizing precursor 413 to form a layer containing zinc (Zn) and oxygen (hereinafter, Zn layer); and stopping the introduction of oxidizing gas 414 and purging excess oxidizing gas 414 from within the chamber.

[0417] Steps S11 to S13 constitute one cycle, and by repeating this cycle, an In-M-Zn oxide having a desired film thickness can be formed. Note that the element M or Zn may be mixed into the In layer during or after film formation due to heat treatment. Also, In or Zn may be mixed into the M layer. Also, In or Ga may be mixed into the Zn layer.

[0418] The number of times steps S11 to S13 are performed in one cycle is not limited to one. The number of times steps S11 to S13 are performed in one cycle may be set so that an In-M-Zn oxide with a desired composition is obtained. For example, to form an In-M-Zn oxide film with an atomic ratio of In:M:Zn=1:1:2, steps S11, S13, S12, and S13 may be repeated as one cycle. Alternatively, an In-Zn oxide film can be formed by repeating a cycle consisting of steps S11 and S12. Furthermore, in the step of introducing precursor 412 in step S12, precursor 413 may also be introduced simultaneously to form an (M, Zn) layer in step S12. Furthermore, in the step of introducing precursor 411 in step S11, precursor 412 or precursor 413 may also be introduced simultaneously to form an In layer containing element M or Zn in step S11. By appropriately combining these, the desired oxide film 230A and oxide film 230B can be formed.

[0419] The manufacturing equipment used for film formation by the ALD method can refer to the description of the previous embodiment. By forming the oxide film 230A, the oxide film 230B, and the ferroelectric layer using the ALD method, the manufacturing equipment can be standardized. Furthermore, when manufacturing the element shown in FIG. 7B2, after the oxide film 230A and the oxide film 230B are formed, the insulator 130 can be continuously formed on the oxide film 230B by switching the precursor and oxidizing gas. Therefore, the oxide film 230B and the insulator 130 can be formed without exposure to the atmosphere, and the vicinity of the interface between the oxide film 230B and the insulator 130 can be kept clean.

[0420] Furthermore, two or more manufacturing devices used for film formation by the ALD method may be incorporated into a multi-chamber film formation device. In this case, by setting the oxide film 230A, the oxide film 230B, and the ferroelectric layer to be formed in different manufacturing devices, the oxide film 230A, the oxide film 230B, and the ferroelectric layer can be formed successively without switching the precursor and oxidizing gas.

[0421] Next, heat treatment is preferably performed. The heat treatment may be performed within a temperature range in which the oxide film 230A and the oxide film 230B do not become polycrystallized, such as 250°C to 650°C, preferably 400°C to 600°C. The heat treatment is performed in a nitrogen gas or inert gas atmosphere, or in an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more. For example, when the heat treatment is performed in a mixed atmosphere of nitrogen gas and oxygen gas, the oxygen gas concentration may be approximately 20%. The heat treatment may also be performed under reduced pressure. Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere, followed by an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more to replenish the desorbed oxygen.

[0422] Furthermore, it is preferable that the gas used in the heat treatment be highly purified. For example, the moisture content of the gas used in the heat treatment should be 1 ppb or less, preferably 0.1 ppb or less, and more preferably 0.05 ppb or less. By using a highly purified gas for the heat treatment, it is possible to prevent moisture and other contaminants from being absorbed into the oxide film 230A and the oxide film 230B as much as possible.

[0423] By performing the heat treatment, hydrogen in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B moves to the insulator 222 and is absorbed into the insulator 222. In other words, hydrogen in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B diffuses into the insulator 222. Therefore, the hydrogen concentration in the insulator 222 increases, but the hydrogen concentrations in the insulator 216, the insulating film 224A, the oxide film 230A, and the oxide film 230B decrease.

[0424] In particular, the insulating film 224A functions as a gate insulator of the transistor 200, and the oxide film 230A and the oxide film 230B function as a channel formation region of the transistor 200. Therefore, the transistor 200 including the insulating film 224A, the oxide film 230A, and the oxide film 230B in which the hydrogen concentrations are reduced is preferable because it has good reliability.

[0425] Next, a conductive film 242A is formed on the oxide film 230B (see FIGS. 12A to 12D). The conductive film 242A can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. For example, tantalum nitride may be formed as the conductive film 242A by sputtering. Note that heat treatment may be performed before the formation of the conductive film 242A. The heat treatment may be performed under reduced pressure, and the conductive film 242A may be formed successively without exposure to the air. By performing such treatment, moisture and hydrogen adsorbed on the surface of the oxide film 230B can be removed, and the moisture and hydrogen concentrations in the oxide film 230A and the oxide film 230B can be further reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower. In this embodiment, the temperature of the heat treatment is 200° C.

[0426] Next, an insulating film 271A is formed on the conductive film 242A (see FIGS. 12A to 12D). The insulating film 271A can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulating film 271A is preferably an insulating film that has a function of suppressing oxygen permeation. For example, the insulating film 271A may be formed by sputtering aluminum oxide or silicon nitride.

[0427] Note that the conductive film 242A and the insulating film 271A are preferably formed successively by sputtering without exposure to the atmosphere. For example, a multi-chamber film formation apparatus may be used. This allows the conductive film 242A and the insulating film 271A to be formed with reduced hydrogen content and also reduces the amount of hydrogen mixed into the films between film formation steps. Furthermore, when a hard mask is provided on the insulating film 271A, the film that will become the hard mask may also be formed successively without exposure to the atmosphere.

[0428] Next, the insulating film 224A, the oxide film 230A, the oxide film 230B, the conductive film 242A, and the insulating film 271A are processed into island shapes using lithography to form the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B (see FIGS. 13A to 13D). The insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B are formed so that at least a portion of each overlaps the conductor 205. This processing can be performed using a dry etching method or a wet etching method. Dry etching is suitable for microfabrication. The insulating film 224A, the oxide film 230A, the oxide film 230B, the conductive film 242A, and the insulating film 271A may be processed under different conditions.

[0429] In lithography, a resist is first exposed through a mask. The exposed area is then removed or left using a developer to form a resist mask. A conductor, semiconductor, or insulator can then be processed into a desired shape by etching through the resist mask. For example, a resist mask can be formed by exposing the resist to KrF excimer laser light, ArF excimer laser light, or EUV (Extreme Ultraviolet) light. An immersion technique may also be used, in which a liquid (e.g., water) is filled between the substrate and the projection lens for exposure. An electron beam or ion beam may also be used instead of the light described above. When an electron beam or ion beam is used, a mask is not required. The resist mask can be removed by dry etching such as ashing, wet etching, dry etching followed by wet etching, or wet etching followed by dry etching.

[0430] Furthermore, a hard mask made of an insulator or conductor may be used under the resist mask. When using a hard mask, an insulating or conductive film serving as the hard mask material is formed on the conductive film 242A, a resist mask is formed thereon, and the hard mask material is etched to form a hard mask with a desired shape. Etching of the conductive film 242A and the like may be performed after removing the resist mask or may be performed while leaving the resist mask. In the latter case, the resist mask may be lost during etching. The hard mask may be removed by etching after etching the conductive film 242A and the like. On the other hand, if the hard mask material does not affect subsequent processes or can be used in subsequent processes, it is not necessarily necessary to remove the hard mask. In this embodiment, the insulating layer 271B is used as the hard mask.

[0431] Here, since the insulating layer 271B functions as a mask for the conductive layer 242B, the conductive layer 242B does not have a curved surface between its side surface and top surface, as shown in FIGS. 13B to 13D. As a result, the conductors 242a and 242b shown in FIGS. 8B and 8D have angular ends where their side surfaces and top surfaces intersect. Because the angular ends where the side surfaces and top surfaces of the conductor 242 intersect are angular, the cross-sectional area of ​​the conductor 242 is larger than when the ends have a curved surface. This reduces the resistance of the conductor 242, thereby increasing the on-current of the transistor 200.

[0432] 13B to 13D, the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may be tapered. In this specification, a tapered shape refers to a shape in which at least a portion of the side surface of a structure is inclined with respect to the substrate surface. For example, the angle between the inclined side surface and the substrate surface (hereinafter, sometimes referred to as the taper angle) is preferably less than 90°. The insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may have a taper angle of, for example, 60° or more and less than 90°. Tapering the side surfaces in this manner improves the coverage of the insulator 275 and the like in subsequent processes, reducing defects such as voids.

[0433] However, the present invention is not limited to the above, and the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B may be configured to be approximately perpendicular to the top surface of the insulator 222. With such a configuration, it is possible to reduce the area and increase the density when providing multiple transistors 200.

[0434] Furthermore, by-products generated in the etching process may form layers on the side surfaces of the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B. In this case, the layer-like by-products are formed between the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B and the insulator 275. Therefore, it is preferable to remove the layer-like by-products formed in contact with the upper surface of the insulator 222.

[0435] Next, the insulator 275 is formed to cover the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating layer 271B. The insulator 275 is preferably in close contact with the top surface of the insulator 222 and the side surface of the insulator 224. The insulator 275 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulator 275 is preferably an insulating film that suppresses oxygen permeation. For example, the insulator 275 may be formed by depositing an aluminum oxide film by a sputtering method and then depositing a silicon nitride film thereon by a PEALD method. Forming the insulator 275 with such a layered structure may improve the function of suppressing the diffusion of impurities such as water and hydrogen, and oxygen.

[0436] In this way, the oxide 230a, the oxide 230b, and the conductive layer 242B can be covered with the insulator 275 and the insulating layer 271B, which have the function of suppressing oxygen diffusion. This makes it possible to reduce the direct diffusion of oxygen from the insulator 280, etc., into the insulator 224, the oxide 230a, the oxide 230b, and the conductive layer 242B in a later process.

[0437] Next, an insulating film to be the insulator 280 is formed on the insulator 275. The insulating film can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. For example, a silicon oxide film can be formed by sputtering. The insulating film can be formed by sputtering in an oxygen-containing atmosphere to form the insulator 280 containing excess oxygen. Furthermore, the hydrogen concentration in the insulator 280 can be reduced by using a sputtering method that does not require the use of hydrogen-containing molecules in the deposition gas. Heat treatment may be performed before the formation of the insulating film. The heat treatment may be performed under reduced pressure, and the insulating film may be formed successively without exposure to the atmosphere. By performing such treatment, moisture and hydrogen adsorbed on the surface of the insulator 275 can be removed, and the moisture and hydrogen concentrations in the oxide 230a, the oxide 230b, and the insulator 224 can be reduced. The heat treatment conditions described above can be used for the heat treatment.

[0438] Furthermore, for example, the insulator 280 may have a laminated structure of silicon oxide formed by sputtering and silicon oxynitride formed by CVD on top of it, with silicon nitride further laminated on top.

[0439] Next, CMP processing is performed on the insulating film that will become the insulator 280 to form an insulator 280 with a flat upper surface. Alternatively, a silicon nitride film may be formed on the insulator 280 by, for example, a sputtering method, and the CMP processing may be performed on the silicon nitride until it reaches the insulator 280.

[0440] Next, a portion of the insulator 280, a portion of the insulator 275, a portion of the insulating layer 271B, and a portion of the conductive layer 242B are processed to form an opening that reaches the oxide 230b. The opening is preferably formed so as to overlap the conductor 205. By forming the opening, the insulator 271a, the insulator 271b, the conductor 242a, and the conductor 242b are formed (see FIGS. 14A to 14D).

[0441] 14B and 14C, the side surfaces of the insulator 280, the insulator 275, the insulator 271, and the conductor 242 may have a tapered shape. Also, the taper angle of the insulator 280 may be larger than the taper angle of the conductor 242. Also, although not shown in FIGS. 14A to 14C, the upper part of the oxide 230b may be removed when the opening is formed.

[0442] Furthermore, a portion of the insulator 280, a portion of the insulator 275, a portion of the insulating layer 271B, and a portion of the conductive layer 242B can be processed by dry etching or wet etching. Processing by dry etching is suitable for fine processing. Furthermore, the processing may be performed under different conditions. For example, a portion of the insulator 280 may be processed by dry etching, a portion of the insulator 275 and a portion of the insulating layer 271B may be processed by wet etching, and a portion of the conductive layer 242B may be processed by dry etching.

[0443] Here, impurities may adhere to the side surfaces of the oxide 230a, the top and side surfaces of the oxide 230b, the side surfaces of the conductor 242, the side surfaces of the insulator 280, etc., or may diffuse into these surfaces. A process for removing such impurities may be performed. Furthermore, the dry etching may result in damaged regions being formed on the surface of the oxide 230b. Such damaged regions may be removed. Examples of such impurities include those originating from components contained in the insulator 280, the insulator 275, part of the insulating layer 271B, and the conductive layer 242B, components contained in the materials used in the device used to form the opening, and components contained in the gas or liquid used in etching. Examples of such impurities include hafnium, aluminum, silicon, tantalum, fluorine, and chlorine.

[0444] In particular, impurities such as aluminum or silicon inhibit the formation of a CAAC-OS oxide 230b. Therefore, it is preferable to reduce or eliminate impurity elements such as aluminum or silicon that inhibit the formation of a CAAC-OS oxide. For example, the concentration of aluminum atoms in and around the oxide 230b may be 5.0 atomic % or less, preferably 2.0 atomic % or less, more preferably 1.5 atomic % or less, even more preferably 1.0 atomic % or less, and even more preferably less than 0.3 atomic %.

[0445] Note that the region of the metal oxide where the CAAC-OS transformation is inhibited by impurities such as aluminum or silicon and becomes an amorphous-like oxide semiconductor (a-like OS) is sometimes called a non-CAAC region. In the non-CAAC region, the density of the crystal structure is reduced, so V O A large amount of H is formed, which makes the transistor more likely to be normally on. Therefore, it is preferable that the non-CAAC region of the oxide 230b be reduced or eliminated.

[0446] In contrast, it is preferable that the oxide 230b has a layered CAAC structure. In particular, it is preferable that the oxide 230b has the CAAC structure up to the bottom edge of the drain. Here, in the transistor 200, the conductor 242a or the conductor 242b and its vicinity function as the drain. In other words, it is preferable that the oxide 230b near the bottom edge of the conductor 242a (conductor 242b) has the CAAC structure. In this way, even at the drain edge, which significantly affects the drain breakdown voltage, the damaged region of the oxide 230b is removed, and by having the CAAC structure, fluctuations in the electrical characteristics of the transistor 200 can be further suppressed. Furthermore, the reliability of the transistor 200 can be improved.

[0447] A cleaning process is performed to remove impurities and the like that have adhered to the surface of the oxide 230b during the etching process. Cleaning methods include wet cleaning using a cleaning solution (also known as wet etching), plasma processing using plasma, and cleaning by heat treatment, and the above cleaning methods may be combined as appropriate. Note that the cleaning process may deepen the grooves.

[0448] Wet cleaning may be performed using an aqueous solution of ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, or the like diluted with carbonated water or pure water, pure water, carbonated water, or the like. Alternatively, ultrasonic cleaning may be performed using these aqueous solutions, pure water, or carbonated water. Alternatively, these cleaning methods may be combined as appropriate.

[0449] In this specification, an aqueous solution of hydrofluoric acid diluted with pure water may be referred to as "diluted hydrofluoric acid," and an aqueous solution of ammonia water diluted with pure water may be referred to as "diluted ammonia water." The concentration, temperature, and other properties of the aqueous solution may be adjusted appropriately depending on the impurities to be removed and the configuration of the semiconductor device to be cleaned. The ammonia concentration of the diluted ammonia water may be set to 0.01% or more and 5% or less, preferably 0.1% or more and 0.5% or less. The hydrogen fluoride concentration of the diluted hydrofluoric acid may be set to 0.01 ppm or more and 100 ppm or less, preferably 0.1 ppm or more and 10 ppm or less.

[0450] For ultrasonic cleaning, it is preferable to use a frequency of 200 kHz or more, and more preferably a frequency of 900 kHz or more, which can reduce damage to the oxide 230b and the like.

[0451] The cleaning process may be repeated multiple times, and the cleaning solution may be changed for each cleaning process. For example, the first cleaning process may be performed using diluted hydrofluoric acid or diluted ammonia water, and the second cleaning process may be performed using pure water or carbonated water.

[0452] In this embodiment, the cleaning process is performed by wet cleaning using diluted ammonia water. By performing this cleaning process, impurities attached to the surfaces of the oxide 230a, the oxide 230b, etc. or diffused inside can be removed. Furthermore, the crystallinity of the oxide 230b can be improved.

[0453] Heat treatment may be performed after the etching or cleaning. The heat treatment may be performed at a temperature of 100°C to 450°C, preferably 350°C to 400°C. The heat treatment is performed in a nitrogen gas or inert gas atmosphere, or in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. For example, the heat treatment is preferably performed in an oxygen atmosphere. This allows oxygen to be supplied to the oxide 230a and the oxide 230b, thereby reducing oxygen vacancies. Furthermore, such heat treatment can improve the crystallinity of the oxide 230b. The heat treatment may be performed under reduced pressure. Alternatively, after the heat treatment in the oxygen atmosphere, a subsequent heat treatment in a nitrogen atmosphere may be performed without exposure to the air.

[0454] Next, the insulating film 252A is formed (see FIGS. 15A to 15D). The insulating film 252A can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulating film 252A is preferably formed using the ALD method. As described above, the insulating film 252A is preferably formed to a thin film thickness, and it is necessary to minimize film thickness variation. In contrast, the ALD method is a film formation method in which a precursor and a reactant (e.g., an oxidizing agent) are alternately introduced. The film thickness can be adjusted by the number of times this cycle is repeated, allowing for precise film thickness adjustment. Furthermore, as shown in FIGS. 15B and 15C, the insulating film 252A needs to be formed with good coverage on the bottom and side surfaces of the opening formed in the insulator 280, etc. In particular, it is preferable that the insulating film 252A be formed with good coverage on the top and side surfaces of the oxide 230 and the side surfaces of the conductor 242. Since atomic layers can be deposited one by one on the bottom and side surfaces of the opening, the insulating film 252A can be formed with good coverage over the opening.

[0455] When the insulating film 252A is formed by the ALD method, ozone (O), oxygen (O), water (H2O), etc. can be used as an oxidizing agent. By using ozone (O3), oxygen (O2), etc. that do not contain hydrogen as an oxidizing agent, it is possible to reduce hydrogen diffusing into the oxide 230b.

[0456] In this embodiment, the insulating film 252A is formed of aluminum oxide by thermal ALD.

[0457] Next, microwave treatment is preferably performed in an oxygen-containing atmosphere. For the microwave treatment, a microwave treatment device having a power supply for generating high-density plasma using microwaves is preferably used. Here, the frequency of the microwave treatment device may be 300 MHz or more and 300 GHz or less, preferably 2.4 GHz or more and 2.5 GHz or less, for example, 2.45 GHz. By using high-density plasma, high-density oxygen radicals can be generated. Furthermore, the power of the power supply for applying microwaves to the microwave treatment device may be 1000 W or more and 10,000 W or less, preferably 2000 W or more and 5,000 W or less. The microwave treatment device may also have a power supply for applying RF to the substrate side. Furthermore, by applying RF to the substrate side, oxygen ions generated by high-density plasma can be efficiently introduced into the oxide 230b.

[0458] The microwave treatment is preferably carried out under reduced pressure, with the pressure being 10 Pa to 1000 Pa, preferably 300 Pa to 700 Pa. The treatment temperature is 750°C or less, preferably 500°C or less, for example, about 400°C. After the oxygen plasma treatment, a heat treatment may be carried out without exposure to the outside air. For example, the heat treatment may be carried out at a temperature of 100°C to 750°C, preferably 300°C to 500°C.

[0459] Furthermore, for example, the microwave treatment may be performed using oxygen gas and argon gas. Here, the oxygen flow ratio (O2 / (O2+Ar)) may be greater than 0% and less than or equal to 100%. Preferably, the oxygen flow ratio (O2 / (O2+Ar)) may be greater than 0% and less than or equal to 50%. More preferably, the oxygen flow ratio (O2 / (O2+Ar)) may be greater than 10% and less than or equal to 40%. Even more preferably, the oxygen flow ratio (O2 / (O2+Ar)) may be greater than 10% and less than or equal to 30%. In this way, by performing microwave treatment in an oxygen-containing atmosphere, the carrier concentration in the region 230bc can be reduced. Furthermore, by preventing excessive oxygen from being introduced into the chamber during microwave treatment, an excessive reduction in the carrier concentration in the regions 230ba and 230bb can be prevented.

[0460] By performing microwave processing in an atmosphere containing oxygen, oxygen gas can be converted into plasma using microwaves or high frequency waves such as RF, and the oxygen plasma can be applied to the region between the conductors 242a and 242b of the oxide 230b. At this time, microwaves or high frequency waves such as RF can also be irradiated onto the region 230bc. In other words, microwaves or high frequency oxygen plasma such as RF can be applied to the region 230bc. The action of plasma, microwaves, etc., can increase the V of the region 230bc. O H can be split off and hydrogen can be removed from the region 230bc. O H → H + V O " reaction occurs, and V contained in region 230bc O Therefore, oxygen vacancies and V in the region 230bc can be reduced. O By supplying oxygen radicals generated by the oxygen plasma or oxygen contained in the insulator 250 to the oxygen vacancies formed in the region 230bc, the oxygen vacancies in the region 230bc can be further reduced, and the carrier concentration can be lowered.

[0461] On the other hand, conductors 242a and 242b are provided on regions 230ba and 230bb shown in FIG. 9A. Here, when microwave processing is performed in an oxygen-containing atmosphere, conductor 242 preferably functions as a shielding film against the effects of microwaves, high-frequency waves such as RF, oxygen plasma, and the like. Therefore, conductor 242 preferably has the function of blocking electromagnetic waves of 300 MHz or more and 300 GHz or less, for example, 2.4 GHz or more and 2.5 GHz or less. By using such conductor 242, V O Since the reduction of H and the supply of an excessive amount of oxygen do not occur, it is possible to prevent a decrease in the carrier concentration in the regions 230ba and 230bb.

[0462] Furthermore, insulators 252 having oxygen barrier properties are provided in contact with the side surfaces of conductors 242a and 242b, which makes it possible to prevent oxide films from being formed on the side surfaces of conductors 242a and 242b due to microwave processing.

[0463] In this manner, oxygen vacancies and V O By removing H, the region 230bc can be made i-type or substantially i-type. Furthermore, the supply of excess oxygen to the regions 230ba and 230bb, which function as source and drain regions, can be prevented, maintaining the n-type state of the regions before microwave treatment. This prevents fluctuations in the electrical characteristics of the transistor 200 and prevents variations in the electrical characteristics of the transistor 200 within the substrate surface.

[0464] Next, the insulating film 250A is formed (see FIGS. 15A to 15D). Heat treatment may be performed before the formation of the insulating film 250A. The heat treatment may be performed under reduced pressure, and the insulating film 250A may be formed immediately after the formation of the insulating film 250A without exposure to the atmosphere. The heat treatment is preferably performed in an oxygen-containing atmosphere. By performing such treatment, moisture and hydrogen adsorbed on the surface of the insulating film 252A can be removed, and the moisture and hydrogen concentrations in the oxide 230a and the oxide 230b can be further reduced. The temperature of the heat treatment is preferably 100°C or higher and 400°C or lower.

[0465] The insulating film 250A can be formed using a sputtering method, a CVD method, a PECVD method, an MBE method, a PLD method, an ALD method, or the like. The insulating film 250A is preferably formed by a film formation method using a gas in which hydrogen atoms are reduced or removed. This reduces the hydrogen concentration of the insulating film 250A. Since the insulating film 250A will later become the insulator 250 that faces the oxide 230b via the thin insulator 252, it is preferable that the hydrogen concentration be reduced in this manner.

[0466] In this embodiment, the insulating film 250A is formed by depositing silicon oxynitride by the PECVD method.

[0467] Furthermore, when the insulator 250 has the two-layer stacked structure shown in FIG. 9B , an insulating film that becomes the insulator 250b can be formed after the insulating film 250A is formed. The insulating film that becomes the insulator 250b can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. The insulating film that becomes the insulator 250b is preferably formed using an insulator that has the function of suppressing oxygen diffusion. This configuration can suppress the diffusion of oxygen contained in the insulator 250a into the conductor 260. In other words, it can suppress a decrease in the amount of oxygen supplied to the oxide 230. It can also suppress oxidation of the conductor 260 due to the oxygen contained in the insulator 250a. The insulating film that becomes the insulator 250b can be formed using the same material as the insulator 222. For example, the insulating film that becomes the insulator 250b can be formed using hafnium oxide by thermal ALD.

[0468] Microwave treatment may be performed after the insulating film 250A is formed. The microwave treatment may be performed under the same conditions as those used after the insulating film 252A is formed. Alternatively, the microwave treatment may be performed after the insulating film 250A is formed, without performing the microwave treatment after the insulating film 252A is formed. Alternatively, when an insulating film that will become the insulator 250b is provided as described above, microwave treatment may be performed after the insulating film 250A is formed. The microwave treatment may be performed under the same conditions as those used after the insulating film 252A is formed. Alternatively, microwave treatment may be performed after the insulating film that will become the insulator 250b is formed, without performing the microwave treatment after the insulating film 252A or the insulating film 250A is formed.

[0469] Furthermore, after the formation of the insulating film 252A, the insulating film 250A, and the insulating film that will become the insulator 250b, a heat treatment may be performed while maintaining a reduced pressure after each microwave treatment. By performing such a treatment, hydrogen can be efficiently removed from the insulating film 252A, the insulating film 250A, the insulating film that will become the insulator 250b, the oxide 230b, and the oxide 230a. Some of the hydrogen may be gettered to the conductor 242 (the conductor 242a and the conductor 242b). Alternatively, a heat treatment step may be repeatedly performed multiple times while maintaining a reduced pressure after the microwave treatment. Repeated heat treatments can more efficiently remove hydrogen from the insulating film 252A, the insulating film 250A, the insulating film that will become the insulator 250b, the oxide 230b, and the oxide 230a. The heat treatment temperature is preferably 300°C or higher and 500°C or lower. The microwave treatment, i.e., microwave annealing, may also serve as the heat treatment. If the oxide 230b and the like are sufficiently heated by microwave annealing, the heat treatment may not be necessary.

[0470] Furthermore, by performing microwave processing to modify the film quality of the insulating film 252A, the insulating film 250A, and the insulating film that will become the insulator 250b, it is possible to suppress the diffusion of hydrogen, water, impurities, etc. Therefore, it is possible to suppress the diffusion of hydrogen, water, impurities, etc. into the oxide 230b, the oxide 230a, etc. via the insulator 252 in a post-process such as film formation of the conductive film that will become the conductor 260, or in a post-treatment such as heat treatment.

[0471] Next, the insulating film 254A is formed (see FIGS. 15A to 15D). The insulating film 254A can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. The insulating film 254A is preferably formed by ALD, as with the insulating film 252A. By using the ALD method, the insulating film 254A can be formed to a thin thickness with good coverage. In this embodiment, silicon nitride is formed as the insulating film 254A by PEALD.

[0472] Next, a conductive film that will become the conductor 260a and a conductive film that will become the conductor 260b are formed in this order. The conductive film that will become the conductor 260a and the conductive film that will become the conductor 260b can be formed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, a titanium nitride film is formed as the conductive film that will become the conductor 260a using the ALD method, and a tungsten film is formed as the conductive film that will become the conductor 260b using the CVD method.

[0473] Next, the insulating film 252A, the insulating film 250A, the insulating film 254A, the conductive film that will become the conductor 260a, and the conductive film that will become the conductor 260b are polished by CMP until the insulator 280 is exposed, thereby forming the insulators 252, 250, 254, and the conductor 260 (the conductors 260a and 260b) (see FIGS. 16A to 16D). As a result, the insulator 252 is disposed so as to cover the opening that reaches the oxide 230b. The conductor 260 is disposed so as to fill the opening via the insulators 252, 250, and 254.

[0474] Next, heat treatment may be performed under the same conditions as the above heat treatment. In this embodiment, the treatment is performed in a nitrogen atmosphere at 400° C. for 1 hour. The heat treatment can reduce the moisture and hydrogen concentrations in the insulators 250 and 280. Note that after the heat treatment, the insulator 282 may be formed without exposure to the air.

[0475] Next, the insulator 282 is formed over the insulator 252, the insulator 250, the insulator 254, the conductor 260, and the insulator 280 (see FIGS. 16A to 16D). The insulator 282 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulator 282 is preferably formed by a sputtering method. By using a sputtering method that does not require the use of molecules containing hydrogen in the deposition gas, the hydrogen concentration in the insulator 282 can be reduced.

[0476] In this embodiment, an aluminum oxide film is formed by pulse DC sputtering using an aluminum target in an atmosphere containing oxygen gas as the insulator 282. By using the pulse DC sputtering method, the film thickness distribution can be made more uniform, and the sputtering rate and film quality can be improved.

[0477] Alternatively, by depositing the insulator 282 in an oxygen-containing atmosphere by using a sputtering method, oxygen can be added to the insulator 280 during deposition. This allows the insulator 280 to contain excess oxygen. In this case, it is preferable to deposit the insulator 282 while heating the substrate.

[0478] Next, an etching mask is formed on the insulator 282 by lithography, and a part of the insulator 282, a part of the insulator 280, a part of the insulator 275, a part of the insulator 222, and a part of the insulator 216 are processed until the top surface of the insulator 214 is exposed. This processing may be performed by wet etching, but dry etching is preferable for fine processing.

[0479] Next, heat treatment may be performed. The heat treatment may be performed at a temperature of 250°C or higher and 650°C or lower, preferably 350°C or higher and 600°C or lower. The heat treatment temperature is preferably lower than the heat treatment temperature performed after the formation of the oxide film 230B. Note that the heat treatment is performed in a nitrogen gas or inert gas atmosphere. By performing the heat treatment, some of the oxygen added to the insulator 280 diffuses into the oxide 230 via the insulator 250, etc.

[0480] Furthermore, by performing this heat treatment, oxygen contained in the insulator 280 and hydrogen bonded to the oxygen can be released to the outside from the side surface of the insulator 280 formed by processing the insulators 282, 280, 275, 222, and 216. The hydrogen bonded to the oxygen is released as water. Therefore, unnecessary oxygen and hydrogen contained in the insulator 280 can be reduced.

[0481] Furthermore, in the region of the oxide 230 overlapping with the conductor 260, an insulator 252 is provided in contact with the top surface and side surface of the oxide 230. The insulator 252 has a barrier property against oxygen, and can reduce the diffusion of an excessive amount of oxygen into the oxide 230. This allows oxygen to be supplied to the region 230bc and its vicinity without excessive oxygen being supplied. This prevents the side surface of the conductor 242 from being oxidized by excess oxygen, and reduces oxygen vacancies and V formed in the region 230bc. O H can be reduced. Therefore, the electrical characteristics of the transistor 200 can be improved, and the reliability can be improved.

[0482] On the other hand, when the transistors 200 are highly integrated, the volume of the insulator 280 for each transistor 200 may become excessively small. In this case, the amount of oxygen diffusing into the oxide 230 during the heat treatment is significantly reduced. If the oxide 230 is heated while being in contact with an oxide insulator (such as the insulator 250) that does not contain sufficient oxygen, oxygen constituting the oxide 230 may be released. However, in the transistor 200 described in this embodiment, the insulator 252 is provided in contact with the top surface and side surface of the oxide 230 in a region of the oxide 230 that overlaps with the conductor 260. The insulator 252 has a barrier property against oxygen, and therefore can reduce release of oxygen from the oxide 230 during the heat treatment. This reduces oxygen vacancies and V formed in the region 230bc. O H can be reduced. Therefore, the electrical characteristics of the transistor 200 can be improved, and the reliability can be improved.

[0483] As described above, in the semiconductor device according to this embodiment, a transistor having good electrical characteristics and good reliability can be formed regardless of whether the amount of oxygen supplied from the insulator 280 is large or small. Therefore, a semiconductor device in which variations in the electrical characteristics of the transistor 200 within the substrate surface are suppressed can be provided.

[0484] Next, the insulator 283 is formed over the insulator 282 (see FIGS. 17A to 17D). The insulator 283 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulator 283 is preferably formed by a sputtering method. The hydrogen concentration in the insulator 283 can be reduced by using a sputtering method, which does not require the use of hydrogen-containing molecules in the deposition gas. The insulator 283 may also have a multilayer structure. For example, a silicon nitride film may be formed by a sputtering method, and another silicon nitride film may be formed on the silicon nitride by an ALD method. The insulator 283 and the insulator 214, which have high barrier properties, surround the transistor 200, thereby preventing moisture and hydrogen from entering from the outside.

[0485] Next, an insulating film that becomes the insulator 274 is formed on the insulator 283. The insulating film that becomes the insulator 274 can be formed by sputtering, CVD, MBE, PLD, ALD, or the like. In this embodiment, silicon oxide is formed as the insulating film that becomes the insulator 274 by CVD.

[0486] Next, the insulating film that will become the insulator 274 is polished by CMP until the insulator 283 is exposed, thereby flattening the upper surface and forming the insulator 274 (see FIGS. 17A to 17D). The CMP process may remove a part of the upper surface of the insulator 283.

[0487] Next, the insulator 285 is formed over the insulator 274 and the insulator 283 (see FIGS. 8A to 8D). The insulator 285 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulator 285 is preferably formed by a sputtering method. By using a sputtering method that does not require the use of molecules containing hydrogen in the deposition gas, the hydrogen concentration in the insulator 285 can be reduced.

[0488] In this embodiment, a silicon oxide film is formed as the insulator 285 by a sputtering method.

[0489] In this manner, a semiconductor device including the transistor 200 shown in FIGS. 8A to 8D can be manufactured. Furthermore, as described above, by thoroughly removing impurities in the insulator 130, here at least one of hydrogen, hydrocarbon, and carbon, a film having high purity and intrinsic ferroelectricity can be formed. The manufacturing process of a film having high purity and intrinsic ferroelectricity and a high purity and intrinsic oxide semiconductor is highly compatible. Therefore, a method for manufacturing a semiconductor device with high productivity can be provided.

[0490] <Configuration Example of a Semiconductor Device Having a Transistor 200 and a Capacitor 100> 18A and 18B show a semiconductor device including the above-described transistor 200 and the capacitor 100 according to the previous embodiment. FIG. 18A is a top view of the semiconductor device. FIG. 18B is a cross-sectional view of the portion indicated by the dashed dotted line A1-A2 in FIG. 18A, and is also a cross-sectional view of the transistor 200 in the channel length direction. Note that some elements are omitted from the top view of FIG. 18A for clarity.

[0491] 18A and 18B, the capacitor 100 and the conductor 246 functioning as wiring are arranged over the transistor 200. Here, it is preferable that the overlapping area between the capacitor 100 and the transistor 200 is large when viewed from above. With this configuration, the area occupied by the semiconductor device including the capacitor 100 and the transistor 200 can be reduced. This allows miniaturization or high integration of the semiconductor device to be achieved.

[0492] The semiconductor device has conductors 240 (conductors 240a and 240b) electrically connected to the source and drain of transistor 200 and functioning as plugs. As shown in FIG. 18B, conductor 240a is in contact with the top surface of conductor 242a, and conductor 240b is in contact with the top surface of conductor 242b. Furthermore, conductor 240a is in contact with the bottom surface of conductor 246, and conductor 240b is in contact with the bottom surface of conductor 110. Note that insulator 241a is provided in contact with the side surface of conductor 240a, and insulator 241b is provided in contact with the side surface of conductor 240b.

[0493] The capacitor 100 shown in FIG. 18B has the same configuration as the capacitor 100 shown in FIG. 1A. However, the conductor 120 has a layered structure of a conductor 120a and a conductor 120b provided on and in contact with the conductor 120a. The insulator 155 has a layered structure of an insulator 155a and an insulator 155b provided on and in contact with the insulator 155a. The insulator 152 has a layered structure of an insulator 152a and an insulator 152b provided on and in contact with the insulator 152a. Instead of the insulator 105 shown in FIG. 1A, an insulator 287 is provided, which can be made of an insulator similar to the insulator 152. Note that the configuration is not limited to the above, and the conductor 120, the insulator 155, and the insulator 152 may have a single-layer structure or a three- or more-layer structure, or the insulator 105 may be provided below the conductor 110. Alternatively, the insulator 287 may not be provided, and the lower surface of the conductor 246, the lower surface of the insulator 155a, and the lower surface of the conductor 110 may be in contact with the upper surface of the insulator 285.

[0494] The conductor 120a may be formed by depositing a conductor that can be used for the conductor 120 shown in the previous embodiment using an ALD method, a CVD method, or the like. For example, a titanium nitride film may be formed using a thermal ALD method. Here, the conductor 120a is preferably formed by a method in which the substrate is heated, as in the thermal ALD method. For example, the substrate temperature may be set to room temperature or higher, preferably 300°C or higher, more preferably 325°C or higher, and even more preferably 350°C or higher. Alternatively, the substrate temperature may be set to 500°C or lower, preferably 450°C or lower. For example, the substrate temperature may be set to about 400°C.

[0495] The conductor 120b may be formed by depositing a conductor that can be used for the conductor 120 described in the above embodiment by a sputtering method, an ALD method, a CVD method, etc. For example, a tungsten film may be formed by a metal CVD method.

[0496] The insulator 155a is preferably formed by depositing an insulator that can be used for the insulator 155 shown in the previous embodiment using an ALD method, particularly a thermal ALD method. For example, aluminum oxide formed by an ALD method can be used as the insulator 155a. This allows the overlapping portions to be blocked with aluminum oxide formed by an ALD method, which has good coverage, even if pinholes or discontinuities are formed in the insulator 155b formed by a sputtering method.

[0497] The insulator 155b may be formed by sputtering using an insulator that can be used for the insulator 155 described in the above embodiment. For example, aluminum oxide formed by sputtering can be used as the insulator 155b. Sputtering does not require the use of hydrogen-containing molecules in the deposition gas, and therefore the hydrogen concentrations in the insulator 155 and the underlying conductor 120 can be reduced. This allows more impurities, such as hydrogen, contained in the insulator 130 to be captured or fixed.

[0498] The insulator 152a can be formed by sputtering using an insulator that can be used for the insulator 152 described in the above embodiment. For example, silicon nitride formed by sputtering can be used as the insulator 152a. Sputtering does not require the use of hydrogen-containing molecules in a deposition gas, and therefore the hydrogen concentrations in the insulator 152a and the underlying insulator 155 can be reduced.

[0499] The insulator 152b is preferably formed by depositing an insulator that can be used for the insulator 152 described in the above embodiment using an ALD method, particularly a PEALD method. For example, silicon nitride formed by a PEALD method can be used as the insulator 152b. This allows the insulator 152b to be deposited with good coverage. Therefore, even if pinholes or discontinuities are formed in the insulator 152a due to unevenness of the base, the insulator 152b can cover them, thereby reducing diffusion of hydrogen into the insulator 130, etc.

[0500] With the above configuration, the capacitor 100 is sealed by the insulators 155a, 155b, 152a, and 152b, and the insulator 287. Here, the insulators 155a, 155b, 152a, 152b, and 287 function as a sealing film. This prevents impurities such as hydrogen from diffusing from the outside of the insulators 152b and 287 to the capacitor 100. Furthermore, the insulator 155 captures or fixes impurities such as hydrogen inside the insulators 152b and 287, thereby reducing the hydrogen concentration in the insulator 130 of the capacitor 100. This improves the ferroelectricity of the insulator 130.

[0501] 1B, the transistor 200 is also sealed with the insulators 283 and 282, and the insulators 214 and 212. Therefore, when heat treatment is performed to capture or fix impurities such as hydrogen in the capacitor 100 to the insulator 155, the impurities such as hydrogen in the transistor 200 can be simultaneously captured or fixed to the insulators 282 and 214.

[0502] 18B, the insulators 155a, 155b, 152a, and 152b are provided to surround not only the capacitor 100 but also the conductor 246. This can prevent impurities such as hydrogen from diffusing into the oxide 230 through the capacitor 100, the conductor 246, and the conductor 240 during the heat treatment. As described above, the high-purity intrinsic ferroelectric capacitor with reduced impurities such as hydrogen and the high-purity intrinsic oxide semiconductor with reduced impurities such as hydrogen have very high manufacturing process compatibility. Therefore, a method for manufacturing a semiconductor device with high productivity can be provided.

[0503] Conductor 240 is provided so as to fill openings formed in insulators 271, 275, 280, 282, 283, 285, and 287. The lower surface of conductor 240 contacts the upper surface of conductor 242. Conductor 240 is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. Conductor 240 may also have a layered structure including a thin first conductor provided along the side and bottom surfaces of the opening and a second conductor on the first conductor.

[0504] When the conductor 240 has a layered structure, the first conductor disposed near the insulator 285 and the insulator 280 is preferably made of a conductive material that has the function of suppressing the permeation of impurities such as water and hydrogen. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, or the like is preferably used. Furthermore, the conductive material that has the function of suppressing the permeation of impurities such as water and hydrogen may be used in a single layer or a layered structure. Furthermore, it is possible to suppress impurities such as water and hydrogen contained in layers above the insulator 283 from being mixed into the oxide 230 through the conductor 240. The second conductor may be made of the above-mentioned conductive material mainly composed of tungsten, copper, or aluminum.

[0505] 18B shows a configuration in which the first conductor and the second conductor are stacked, the present invention is not limited to this. For example, the conductor 240 may be configured as a single layer or a stacked structure of three or more layers.

[0506] The conductor 246 may be disposed in contact with the upper surface of the conductor 240. The conductor 246 is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor 246 may have a layered structure, for example, a layered structure of titanium or titanium nitride and the above conductive material. The conductor 246 is preferably formed in the same layer as the conductor 110 and from the same material.

[0507] Insulator 241a is provided in contact with the inner walls of the openings of insulators 271, 275, 280, 282, 283, 285, and 287, and conductor 240a is provided in contact with the side surface of insulator 241a. Insulator 241b is provided in contact with the inner walls of the openings of insulators 271, 275, 280, 282, 283, 285, and 287, and conductor 240b is provided in contact with the side surface of insulator 241b. Each of insulators 241a and 241b has a structure in which a first insulator is provided in contact with the inner wall of the opening, and a second insulator is provided further inward.

[0508] The insulators 241a and 241b may be a barrier insulating film that can be used for the insulator 275, etc. For example, the insulators 241a and 241b may be made of an insulator such as silicon nitride, aluminum oxide, or silicon nitride oxide. The insulators 241a and 241b are provided in contact with the insulators 283, 282, 275, and 271, and therefore can prevent impurities such as water and hydrogen contained in the insulator 280 from mixing into the oxide 230 through the conductors 240a and 240b. Silicon nitride is particularly suitable because it has high barrier properties against hydrogen. Furthermore, it can prevent oxygen contained in the insulator 280 from being absorbed by the conductors 240a and 240b.

[0509] When insulators 241a and 241b are formed into a layered structure as shown in FIG. 18B, it is preferable that the first insulator in contact with the inner wall of an opening such as insulator 280 and the second insulator inside it be made of a combination of a barrier insulating film against oxygen and a barrier insulating film against hydrogen.

[0510] For example, the first insulator may be aluminum oxide formed by ALD, and the second insulator may be silicon nitride formed by PEALD. This configuration can suppress oxidation of the conductor 240 and reduce hydrogen contamination of the conductor 240.

[0511] <Modifications of the Capacitor 100> 18A and 18B, similar to the capacitive element 100 shown in Fig. 1A, the side surfaces of the conductor 110, the side surfaces of the insulator 130, and the side surfaces of the conductor 120 are generally aligned, but the present invention is not limited to this. Modified examples of the capacitive element 100 shown in Fig. 18A and 18B will be described below with reference to Figs. 19A to 19D.

[0512] 19A, similar to the capacitive element 100 shown in FIG. 1B, the side surface of the conductor 110 may be located inside the side surfaces of the insulator 130 and the conductor 120. The insulator 130 is formed to cover the upper surface and side surfaces of the conductor 110, and the region of the insulator 130 that does not overlap with the conductor 110 contacts the insulator 287. In this case, the outer periphery of the conductor 110 is located inside the outer peripheries of the insulator 130 and the conductor 120 in a top view. With this configuration, the insulator 130 can sufficiently separate the conductor 110 and the conductor 120.

[0513] 19A and other figures, the conductor 110 has a single-layer structure, but the present invention is not limited to this, and the conductor 110 may have a laminated structure of two or more layers. For example, as shown in FIG. 19B, the conductor 110 may have a two-layer laminated structure of a conductor 110a and a conductor 110b on the conductor 110a.

[0514] The conductor 110a may be formed by depositing a conductor that can be used for the conductor 110 described in the above embodiment by a sputtering method, an ALD method, a CVD method, or the like. For example, a tungsten film may be formed by a sputtering method.

[0515] The conductor 110b in contact with the underside of the insulator 130 may be formed by depositing a conductor that can be used for the conductor 110 shown in the previous embodiment using an ALD method, a CVD method, or the like. For example, a titanium nitride film may be formed using a thermal ALD method. Furthermore, as with the conductor 110 shown in the previous embodiment, it is preferable that the flatness be improved using a CMP process or the like.

[0516] As shown in FIG. 19C , similar to the capacitor element 100 shown in FIG. 1C , the side surfaces of the insulator 130 and the conductor 120 may be located inside the side surfaces of the conductor 110. In this case, the outer peripheries of the insulator 130 and the conductor 120 are located inside the outer periphery of the conductor 110 in a top view. This results in a configuration in which the insulator 130 is not formed near the step formed by the conductor 110 on the surface on which it is to be formed, and therefore the low-crystalline region formed near the step during deposition of the insulator 130 can be removed to form the capacitor element 100. Therefore, the entire insulator 130 shown in FIG. 19C is in contact with the highly flat upper surface of the conductor 110, and can have many highly crystalline regions.

[0517] 19C is configured such that the insulator 130 and the insulator 155a are not in contact with each other. When a metal nitride is used for the insulator 130 and a metal oxide is used for the insulator 155a, such a configuration can prevent the insulator 130 from being oxidized.

[0518] 19C and other figures, insulator 155 is configured so that its side surface is located inside the side surface of conductor 110, but the present invention is not limited to this. For example, as shown in FIG. 19D, even in a configuration in which the side surfaces of insulator 130 and conductor 120 are located inside the side surface of conductor 110, insulators 155a and 155b may be provided to enclose conductor 110, insulator 130, and conductor 120.

[0519] <Modifications of the Transistor 200> Although FIG. 18 illustrates a configuration in which the transistor 200 is connected to the capacitor 100 containing a material that may have ferroelectricity, the present invention is not limited to this. For example, a configuration in which a material that may have ferroelectricity is used for the transistor 200 and the insulators surrounding the transistor 200 may be configured. A transistor with such a configuration will be described with reference to FIGS. 20A to 20C. Note that the transistor 200 illustrated in FIGS. 20A to 20C further includes a conductor 240a, a conductor 240b, a conductor 246a, a conductor 246b, an insulator 241a, and an insulator 241b in addition to the components of the transistor 200 illustrated in FIG. 8. The conductor 246a and the conductor 246b are the same as the conductor 246 described above. The conductor 246a is provided in contact with the top surface of the conductor 240a, and the conductor 246b is provided in contact with the top surface of the conductor 240b.

[0520] 20A uses an insulator 130a instead of the insulator 222. The insulator 130a can be made of a material that can have ferroelectric properties similar to the insulator 130. That is, the transistor 200 shown in FIG. 20A uses a material that can have ferroelectric properties for the second gate insulator.

[0521] The transistor 200 shown in FIG. 20B uses an insulator 130b instead of the insulators 252, 250, and 254. The insulator 130b can be made of a material that can have ferroelectricity similar to that of the insulator 130. That is, the transistor 200 shown in FIG. 20B uses a material that can have ferroelectricity for the first gate insulator. With this configuration, the transistor 200 shown in FIG. 20B can function as an FeFET shown in FIG. 7B1.

[0522] 20B, all of the first gate insulators are made of ferroelectric materials, but the present invention is not limited to this. For example, as shown in FIG. 9B, one or more of the insulators 252, 250a, 250b, and 254 may be made of a material that can have ferroelectricity. For example, a laminated insulating film may be provided between the oxide 230b and the conductor 260, including the insulator 252 and the insulator 130b on the insulator 252. Alternatively, a laminated insulating film may be provided between the oxide 230b and the conductor 260, including the insulator 130b and the insulator 254 on the insulator 130b.

[0523] In the transistor 200 shown in FIG. 20C , an insulator 130c is provided on a conductor 260, and a conductor 262 is provided on the insulator 130c. The insulator 130c can be made of a material that can have the same ferroelectric properties as the insulator 130. The conductor 262 can be made of a conductive material that can be used for the conductor 260. An insulator 282 is provided to cover the insulator 130c and the conductor 262. The semiconductor device shown in FIG. 20C can also be considered as having one terminal of a ferroelectric capacitor provided at the gate electrode of the transistor 200.

[0524] 20A to 20C, the insulator 130a, the insulator 130b, or the insulator 130c included in the transistor 200 is sealed by the insulator 212, the insulator 214, the insulator 282, or the insulator 283, along with the transistor 200. This prevents hydrogen from diffusing from the outside of the insulator 212 and the insulator 283 to the insulator 130a, the insulator 130b, or the insulator 130c. Furthermore, the insulator 282 captures or fixes hydrogen inside the insulator 212 and the insulator 283, thereby reducing the hydrogen concentration in the insulator 130a, the insulator 130b, or the insulator 130c. This improves the ferroelectricity of the insulators 130a to 130c.

[0525] <Modification of Capacitor Element> In the capacitor 100 shown in FIG. 19A , the insulator 130 is in contact with the upper surface of the insulator 287 and the upper and side surfaces of the conductor 110. However, the present invention is not limited to this. As shown in FIG. 21A , an insulator 115a may be provided between the insulator 130 and the insulator 287 and conductor 110. That is, the insulator 130 is in contact with the upper surface of the insulator 115a, and the insulator 287 and conductor 110 are in contact with the lower surface of the insulator 115a. The insulator 115a may be the same as the insulator 115a shown in FIG. 7C2 or the like in the previous embodiment. The thickness of the insulator 115a may be 0.2 nm to 2 nm, preferably 0.5 nm to 1 nm. This configuration allows the capacitor 100 shown in FIG. 21A to function as an FTJ element in which a capacitor and a diode are connected, as shown in FIGS. 7C1 and 7C2.

[0526] Although the capacitor 100 shown in FIG. 19A is configured such that the insulator 130 contacts the lower surface of the conductor 120, the present invention is not limited to this. As shown in FIG. 21B, an insulator 115b may be provided between the insulator 130 and the conductor 120. That is, the insulator 130 contacts the lower surface of the insulator 115b, and the conductor 120 contacts the upper surface of the insulator 115b. The insulator 115b shown in FIG. 7C3 and other figures in the previous embodiment can be used as the insulator 115b. The thickness of the insulator 115b may be 0.2 nm to 2 nm, preferably 0.5 nm to 1 nm. This configuration allows the capacitor 100 shown in FIG. 21B to function as an FTJ element in which a capacitor and a diode are connected, as shown in FIGS. 7C1 and 7C3.

[0527] 21C, an insulator 115a may be provided between the insulator 130 and the insulator 287 and conductor 110, and an insulator 115b may be provided between the insulator 130 and the conductor 120. With this configuration, the capacitive element 100 shown in FIG. 21C can function as an FTJ element in which a capacitive element and a diode are connected, as shown in FIGS. 7C1 and 7C4.

[0528] 21A to 21C, the insulator 155 and the insulator 287 are in contact with each other in a region that does not overlap with the conductor 120. That is, the FTJ element is sealed by the insulators 155a, 155b, 152a, 152b, and 287. This prevents hydrogen from diffusing from the outside of the insulators 152b and 287 to the insulator 130. Furthermore, the insulator 155 captures or fixes hydrogen inside the insulators 152b and 287, thereby reducing the hydrogen concentration in the insulator 130. This improves the ferroelectricity of the insulator 130 of the FTJ element.

[0529] 21A to 21C show a structure in which the conductor 240 is provided in contact with the lower surface of the conductor 110, but the conductor 110 does not necessarily have to be electrically connected to the transistor 200.

[0530] According to one embodiment of the present invention, a novel transistor can be provided. According to one embodiment of the present invention, a semiconductor device with little variation in transistor characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with favorable reliability can be provided. According to one embodiment of the present invention, a semiconductor device with high on-state current can be provided. According to one embodiment of the present invention, a semiconductor device with high field-effect mobility can be provided. According to one embodiment of the present invention, a semiconductor device with favorable frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be min...

Claims

1. A semiconductor device comprising: a transistor; and a capacitor electrically connected to the transistor, a channel formation region of the transistor includes an oxide semiconductor; The capacitive element is a first conductor on the insulating film; a metal nitride film on the first conductor; a second conductor on the metal nitride film; a first insulator on the first conductor, on the metal nitride film, and on the second conductor; a second insulator on the first insulator; the first conductor, the metal nitride film, and the second conductor have regions surrounded by the insulating film, the first insulator, and the second insulator; The semiconductor device, wherein the metal nitride film has ferroelectricity.

2. A semiconductor device comprising: a transistor; and a capacitor electrically connected to the transistor, a channel formation region of the transistor includes an oxide semiconductor; The capacitive element is a first conductor on the insulating film; a metal nitride film on the first conductor; a second conductor on the metal nitride film; a first insulator on the first conductor, on the metal nitride film, and on the second conductor; a second insulator on the first insulator; the metal nitride film has a region in contact with a side surface of the first conductor and a region in contact with a top surface of the first conductor; the second conductor has a region in contact with an upper surface of the metal nitride film, the first insulator has a region in contact with a side surface of the metal nitride film, a region in contact with a side surface of the second conductor, and a region in contact with a top surface of the second conductor; the second insulator has a region in contact with an upper surface of the first insulator, The semiconductor device, wherein the metal nitride film has ferroelectricity.

3. In claim 1 or 2, the metal nitride film comprises a first element, a second element, and nitrogen; the first element is one or more elements selected from the Group 13 elements, the second element is one or more elements selected from the group consisting of Group 13 elements excluding the first element and Group 2 to Group 6 elements; each of the first conductor and the second conductor comprises nitrogen; the first insulator comprises aluminum and oxygen; The semiconductor device, wherein the insulating film and the second insulator each contain silicon and nitrogen.

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