Heat dissipation substrate for power semiconductor module and converter including same

Abstract

To provide a ceramic substrate for a heat dissipation substrate that improves the heat dissipation performance of the heat dissipation substrate, a heat dissipation substrate for a power semiconductor module, a power semiconductor module including the same, a power conversion device including the same, and a manufacturing method thereof.SOLUTION: In a power semiconductor module 200, a heat dissipation substrate 205 comprises: an insulating substrate 210; a first metal plate 221 disposed on the insulating substrate 210; a second metal plate 222 disposed under the insulating substrate 210; and a first filler 241 disposed within the insulating substrate 210. The first filler 241 may be in contact with a lower surface of the first metal plate 221 and may not be in contact with an upper surface of the second metal plate.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The embodiments relate to a ceramic substrate for a heat dissipation substrate, a heat dissipation substrate for a power semiconductor module, a power semiconductor module including the same, a power converter including the same, and a method for manufacturing the same. [Background technology]

[0002] A power conversion module is a device that performs the functions of power conversion (AC → DC, DC → AC), power transformation (step-down, step-up), power distribution, or power control. It is a core component that improves energy efficiency during the power transmission and control process, controls voltage changes, and provides system stability and reliability, and is also called a power module or power system.

[0003] The power conversion module includes various components such as a power semiconductor device, a heat dissipation substrate, a base plate, molding silicon, a case and cover, and a terminal.

[0004] Recently, electric and hydrogen-based eco-friendly vehicles have been gaining attention as an alternative to fossil fuel-based internal combustion vehicles, and these eco-friendly vehicles use a variety of power semiconductor devices. Eco-friendly vehicles include hybrid electric vehicles (HEVs), plug-in hybrid electric vehicles (PHEVs), electric vehicles (EVs), and fuel cell electric vehicles (PCEVs).

[0005] In addition to eco-friendly vehicles, power semiconductors are also used in a variety of electrical and electronic devices, such as electric vehicle chargers, energy storage devices, power supply devices, and railways.

[0006] Silicon (Si) power semiconductor elements have been widely used in the past, but as Si power semiconductors have reached their physical limits, active research is being conducted into WBG (Wide Bandgap) power semiconductors such as silicon carbide (SiC) or gallium nitride (GaN) to replace them.

[0007] WBG power semiconductor devices have approximately three times the bandgap energy of Si power semiconductor devices, approximately ten times the breakdown field of Si power semiconductor devices, and approximately three times the thermal conductivity of Si power semiconductor devices. These excellent characteristics allow them to operate in high temperature and high voltage environments, and they have the advantages of high switching speed and low switching loss.

[0008] For example, conventional Si-based power semiconductor modules used for power conversion (DC⇔AC), motor drive switching, and control in electric vehicles and hybrid electric vehicles have operated in a temperature environment of around 150°C. However, due to the recent demand for increased switching performance and power density, active research is being conducted on wide bandgap (WBG)-based power semiconductor elements such as SiC or GaN, which can operate at temperatures above 300°C, for example, around 300 to 700°C.

[0009] Meanwhile, heat generated in the power semiconductors generates thermo-mechanical stress in each part of the power semiconductor module, which causes thermal fatigue at the junctions, shortening the lifespan of the junctions and the power semiconductor elements. Therefore, it is very important to design a reliable power semiconductor module that properly dissipates the heat generated in the power semiconductor elements through the heat dissipation substrate and maintains the junction temperature of the power semiconductor elements below an appropriate temperature.

[0010] Meanwhile, a heat dissipation substrate for a power semiconductor not only transfers heat generated during operation of the power semiconductor device to the outside, but also performs the important function of electrically connecting the power semiconductor device by forming a circuit pattern on one side of the heat dissipation substrate.

[0011] Conventionally, heat dissipation substrates for power semiconductors can be classified into DBC (direct bonded copper) and AMB (active metal brazing) methods depending on the bonding method. The DBC method involves forming an oxide film on the copper (Cu) layer and then directly bonding it to the ceramic. The AMB method involves brazing by inserting a paste containing metal particles with a relatively low melting point as an intermediate material between the base metal and ceramic.

[0012] Recently, high-voltage / high-power SiC power conversion modules of 1200V, 200-800A class have been used to improve the performance of hybrid and electric vehicles and autonomous vehicles. During operation of such high-performance electric vehicles, the operating temperature of power semiconductor devices is required to be above 150°C on average, and they are facing high-temperature usage conditions with momentary maximum operating temperatures exceeding 200°C.

[0013] In such high temperature, high voltage, and high current operating environments, existing bonding materials themselves re-melt, and pores in the bonding areas cause heat trapping, rapidly shortening the lifespan of power semiconductor modules. For example, defects induced at the interface between the ceramic substrate and copper sheet of a heat dissipation substrate can cause cracks, and these cracks in the heat dissipation substrate can lead to thermal runaway and destruction of the power semiconductor device.

[0014] For example, if the heat dissipation performance of a heat dissipation board is reduced due to cracks or other factors, the temperature of the case and surrounding area of ​​the power semiconductor module will rise. If the sudden temperature rise causes the heat generated to exceed the heat dissipation performance (heat generation state > heat dissipation performance), the thermal design will no longer be able to maintain a thermal equilibrium state (heat generation state < heat dissipation performance), and the heat generation will continue to increase. As a result, the leakage current will continue to increase, eventually leading to the destruction of the power semiconductor module itself.

[0015] In particular, when degradation of power semiconductor modules occurs in an ultra-high operating temperature environment, there is a problem that destruction of power semiconductor elements due to malfunction of a power semiconductor module installed in a vehicle can have a serious impact on the safety of the driver.

[0016] This has led to a need for improved heat dissipation performance in heat dissipation substrates that constitute power semiconductor modules, and there is a demand for heat dissipation substrates that can prevent a decrease in reliability due to high temperatures and high pressures. Summary of the Invention [Problem to be solved by the invention]

[0017] One of the technical objectives of the embodiment is to improve the heat dissipation performance of the heat dissipation substrate.

[0018] Also, one of the technical objectives of the embodiment is to prevent separation between the metal plate and the insulating substrate, thereby improving reliability.

[0019] Furthermore, one of the technical objectives of the embodiment is to disperse external stress by the heat dissipation substrate and improve reliability.

[0020] The technical problems of the embodiments are not limited to those described in this section, but include those that can be understood from the description of the invention. [Means for solving the problem]

[0021] The heat dissipation substrate for a power semiconductor module according to the embodiment includes an insulating substrate 210, a first metal plate 221 arranged on the insulating substrate 210, a second metal plate 222 arranged below the insulating substrate 210, and a filler 241 arranged within the insulating substrate 210, and the filler 241 may be in contact with the lower surface of the first metal plate 221 but may not be in contact with the upper surface of the second metal plate 222.

[0022] In addition, in an embodiment, the filler may include a plurality of fillers, which may be spaced apart from one another.

[0023] In addition, in this embodiment, the filler 241 is disposed to extend downward.

[0024] In addition, in an embodiment, a bonding metal layer and a diffusion metal layer may be disposed between the first metal plate 221 and the insulating substrate 210, and the first metal plate 221 and the filler 241 may be in contact with each other.

[0025] In addition, in an embodiment, the filler 241 may have a cylindrical shape.

[0026] In addition, in an embodiment, the filler 241 may have a hemispherical shape.

[0027] In addition, in an embodiment, a pin-fin structure 250 disposed on the lower surface of the second metal plate 222 may be further included.

[0028] In addition, a heat dissipation substrate for a power semiconductor module according to another embodiment includes an insulating substrate 210, a first metal plate 221 arranged on the insulating substrate 210, a second metal plate 222 arranged below the insulating substrate 210, and a filler 241 arranged within the insulating substrate 210, the filler 241 including a plurality of first fillers 243a and a plurality of second fillers 243b, the plurality of first fillers 243a contacting the lower surface of the first metal plate 221 and the plurality of second fillers 243b contacting the upper surface of the second metal plate 222, the horizontal width of the plurality of second fillers 243b being greater than the horizontal width of the plurality of first fillers 243a, and the first filler 243a not necessarily contacting the second metal plate 222.

[0029] In addition, in an embodiment, the second filler 243b may not be in contact with the first filler 243a.

[0030] In addition, in this embodiment, the second fillers 243b and the first fillers 243a are alternately arranged on opposing surfaces. [Effects of the Invention]

[0031] The heat dissipation substrate for a power semiconductor module according to the embodiment has a technical effect of increasing the area through which heat is transferred by disposing the filler 241 under the first metal plate 221, thereby improving the heat dissipation performance of the element by dissipating heat.

[0032] For example, in this embodiment, a first metal plate 221 is disposed under the semiconductor element 230, and a filler 241 is disposed on the lower surface of the first metal plate 221, thereby increasing the area through which heat is transferred and improving heat dissipation performance.

[0033] Furthermore, the embodiment has a technical effect of shortening the heat transfer path within the insulating substrate 210, thereby improving heat dissipation performance.

[0034] For example, in the embodiment, a filler having excellent thermal conductivity is disposed in the insulating substrate 210, and heat is transferred through the filler, thereby shortening the heat transfer path and improving heat dissipation performance.

[0035] In addition, the embodiment has a technical effect of preventing the metal plate 220 and the insulating substrate 210 from peeling off, thereby improving reliability.

[0036] For example, in the embodiment, the bonding area between the ceramic of the insulating substrate 210 and the copper (Cu) of the filler 241 increases, increasing the bonding strength, preventing the metal plate 220 and the insulating substrate 210 from peeling off, and improving reliability.

[0037] Furthermore, the embodiment has the technical effect of being able to effectively disperse external stress and improving reliability.

[0038] For example, in the embodiment, the bonding area between the ceramic of the insulating substrate 210 and the copper (Cu) of the filler 241 increases, increasing the bonding strength, preventing the metal plate 220 and the insulating substrate 210 from peeling off, and improving reliability.

[0039] In addition, the embodiment has the technical effect of forming a filler by repeatedly filling copper into the vias of the insulating substrate 210 and performing heat treatment, thereby making it possible to uniformly fill the vias formed in the insulating substrate 210, preventing copper shrinkage and suppressing the occurrence of voids, and improving heat dissipation performance.

[0040] Furthermore, the embodiment has the technical effect of dispersing heat evenly.

[0041] For example, in the embodiment, as the heat transferred from the semiconductor element 230 is transferred downward, the thermal conduction in the horizontal direction increases, so the horizontal width of the 3-2 filler 243b is made larger than the horizontal width of the 3-1 filler 243a, thereby dispersing the heat evenly.

[0042] The technical effects of the embodiments are not limited to those described in this section, but include those that can be understood from the description of the invention. [Brief explanation of the drawings]

[0043] [Figure 1] FIG. 1 is a cross-sectional view of a power semiconductor module 500 including a heat dissipation substrate for a power semiconductor according to an embodiment. [Figure 2] FIG. 2 is a diagram showing a manufacturing process of a power semiconductor module 501 including a heat dissipation substrate for a power semiconductor according to an embodiment. [Figure 3] FIG. 3 is a flowchart of a manufacturing process of a heat dissipation substrate for a power semiconductor according to an embodiment. [Figure 4] FIG. 4 is a cross-sectional view of a power semiconductor module including a heat dissipation substrate for a power semiconductor according to a first embodiment. [Figure 5] FIG. 5 is a cross-sectional view of a power semiconductor module including a heat dissipation substrate for a power semiconductor according to a second embodiment. [Figure 6a] FIG. 6a is a cross-sectional view of a power semiconductor module including a heat dissipation substrate for a power semiconductor according to a third embodiment. [Figure 6b] FIG. 6b is a cross-sectional view of a power semiconductor module including a heat dissipation substrate for power semiconductors according to an additional embodiment of the third embodiment. [Figure 7]FIG. 7 is a cross-sectional view of a power semiconductor module including a heat dissipation substrate for a power semiconductor according to a fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0044] Hereinafter, the invention according to the embodiment for solving the above problems will be described in more detail with reference to the drawings.

[0045] The suffixes "module" and "section" used in the following description for components are given merely to facilitate the preparation of the specification and do not themselves have any particular significance or role. Therefore, the terms "module" and "section" can be used interchangeably.

[0046] Terms including ordinal numbers such as first, second, etc. may be used to describe various components, but the components are not limited by the terms. The terms are used only to distinguish one component from another.

[0047] The singular expression includes the plural expression unless the context clearly indicates otherwise.

[0048] In this application, the use of terms such as "comprises," "has," or "has" is intended to specify the presence of any features, numbers, steps, operations, components, parts, or combinations thereof set forth in the specification, but is to be understood as not precluding the possibility that one or more other features, numbers, steps, operations, components, parts, or combinations thereof may also be present or added.

[0049] In the embodiments, the power semiconductor module can be used in inverters or converters for automobiles, computers, home appliances, solar power, smart grids, etc. Furthermore, the power semiconductor module according to the embodiments can be applied to various electric and electronic devices such as electric vehicle chargers, power supply devices, and railways in addition to eco-friendly vehicles.

[0050] Furthermore, the heat dissipation substrate for power semiconductors according to the embodiments can be mounted and used in power semiconductor modules employed in inverters and converters of automobiles, computers, home appliances, solar power, smart grids, etc. Furthermore, the heat dissipation substrate for power semiconductors according to the embodiments can be mounted and used in power semiconductor modules mounted in various electric and electronic devices such as electric vehicle chargers, power supply devices, and railways in addition to eco-friendly vehicles.

[0051] In an embodiment, the power semiconductor device may include one power semiconductor module or multiple power semiconductor modules, and the power semiconductor module may include multiple power semiconductor elements.

[0052] In the following embodiments, the power semiconductor device is described as an automotive inverter for driving a motor, but the power semiconductor device of the embodiments can be applied to inverters, converters, etc. in the various technical fields mentioned above. Here, the automobiles include hybrid electric vehicles (HEVs), plug-in hybrid electric vehicles (PHEVs), electric vehicles (EVs), fuel cell electric vehicles (PCEVs), etc. In the following description of the embodiments, the terms switching element and power semiconductor element may be used interchangeably.

[0053] FIG. 1 is a cross-sectional view of a power semiconductor module 500 including a heat dissipation substrate for power semiconductors according to an embodiment, and FIG. 2 is a diagram illustrating a manufacturing process of a power semiconductor module 501 including a heat dissipation substrate for power semiconductors according to an embodiment.

[0054] 1, a power semiconductor module 500 according to an embodiment may include a first heat dissipation substrate 410, a second heat dissipation substrate 420, a power semiconductor device 100, a first lead frame 310, and a second lead frame 320, and is packaged by a mold 401. The mold 401 may include, but is not limited to, an epoxy molding compound (EMC). The power semiconductor device 100 may include a first power semiconductor device 100a and a second power semiconductor device 100b.

[0055] For example, referring to FIG. 2, a first lead frame 310, a second lead frame 320, and one or more power semiconductor elements 100a, 100b may be arranged between a first heat dissipation substrate 410 and a second heat dissipation substrate 420, and then compressed to manufacture a power semiconductor module 501 according to the embodiment.

[0056] The power semiconductor device 100 may be bonded to the first heat dissipation substrate 410 and the second heat dissipation substrate 420 by a predetermined adhesive member (not shown).

[0057] For example, the first and second heat dissipation substrates 410 and 420 may be bonded to the power semiconductor device 100 by soldering, sintering bonding, transient liquid phase bonding (TLP bonding), ultrasonic bonding, or the like.

[0058] For example, the power semiconductor device 100 may be bonded to the first and second heat dissipation substrates 410 and 420 by sintering bonding.

[0059] In the power semiconductor module 500 according to the embodiment, the first power semiconductor device 100a and the second power semiconductor device 100b may form one arm. For example, the first power semiconductor device 100a and the second power semiconductor device 100b may be connected in series with their electrodes arranged in opposite directions, but this is not limited to this. For example, the first power semiconductor device 100a and the second power semiconductor device 100b may be electrically connected in parallel.

[0060] In the embodiment, the first and second heat dissipation substrates 410 and 420 may be disposed on the upper and lower sides of the power semiconductor module 500, respectively, but are not limited thereto.

[0061] The first heat dissipation substrate 410 may include a first metal plate MP1, an insulating substrate SS, and a second metal plate MP2.

[0062] The insulating substrate SS can electrically insulate the first metal plate MP1 and the second metal plate MP2. The insulating substrate SS can include a polycrystalline insulating substrate made of a ceramic material with high thermal conductivity. For example, the insulating substrate SS can be made of AlN or Si3N4, but is not limited to these, and can also be Al2O3. The insulating substrate SS can also include a single crystal substrate such as a sapphire substrate.

[0063] Hereinafter, the insulating substrate SS will be described as a polycrystalline substrate made of a ceramic material as an example, but is not limited thereto and may also include a single crystal substrate.

[0064] The first metal plate MP1 and the second metal plate MP2 may include, but are not limited to, a Cu-based metal.

[0065] The second metal plate MP2 has one side in contact with the insulating substrate SS and can dissipate heat to the other side thereof, and a heat dissipation means including a cooling medium is disposed adjacent to the other side of the second metal plate MP2.

[0066] Referring to FIG. 2, a first metal plate MP1 disposed under the power semiconductor device 100 may include a first circuit pattern CP1 formed by a patterning process such as etching, and the first circuit pattern CP1 is electrically connected to an electrode of the power semiconductor device 100.

[0067] For example, the first circuit pattern CP1 may include electrically separated 1-1 circuit pattern p11, 1-2 circuit pattern p12, and 1-3 circuit pattern p13, which are electrically connected to the first power semiconductor device 100a and the second power semiconductor device 100b, respectively, as shown in FIG. 1.

[0068] The second heat dissipation substrate 420 may also include a first metal plate MP1, an insulating substrate SS, and a second metal plate MP2. The second heat dissipation substrate 420 may adopt the technical features of the first heat dissipation substrate 410.

[0069] 1, one side of each of the first lead frame 310 and the second lead frame 320 is electrically connected to the power semiconductor device 100, and the other side is connected to an external connection terminal, which may include an input power source, a motor, an inverter controller, etc.

[0070] Next, FIG. 3 is a schematic process flow chart of a manufacturing process of a heat dissipation substrate for a power semiconductor according to an embodiment.

[0071] The manufacturing process of the heat dissipation substrate for power semiconductors according to the embodiment can broadly include (1) a pretreatment process for the insulating substrate, (2) a sputtering process, (3) a pretreatment process for the metal plate, (4) a lamination process for the insulating substrate and the metal plate, (5) a hot pressing process for the insulating substrate and the metal plate, (6) an etching process for the heat dissipation substrate, and (7) an inspection and cutting process for the heat dissipation substrate.

[0072] The entire manufacturing process of the heat dissipation substrate for power semiconductors according to the embodiment is controlled by a control unit (not shown) of a central server, and the central server may include a data storage unit (not shown).

[0073] Hereinafter, an insulating substrate for manufacturing a heat dissipation substrate according to an embodiment will be described as a polycrystalline ceramic substrate, but the insulating substrate is not limited thereto and may include a single crystal substrate such as a sapphire substrate.

[0074] 4 is a conceptual diagram of a power semiconductor module 200 including a heat dissipation substrate 205 for a power semiconductor module according to an embodiment. Referring to FIG. 4, the power semiconductor module 200 may include a heat dissipation substrate 205 and a semiconductor element 230 disposed on the heat dissipation substrate 205.

[0075] The heat dissipation substrate 205 may include an insulating substrate 210, a metal plate 220, and a first filler 241. The insulating substrate 210 may include ceramic. For example, the insulating substrate 210 may include any one of Al2O3, Si3N4, and AlN, but is not limited thereto. The insulating substrate 210 may also include a glass substrate.

[0076] The metal plate 220 may include a first metal plate 221 disposed on the insulating substrate 210 and a second metal plate 222 disposed below the insulating substrate 210. The metal plate 220 may include, but is not limited to, a Cu-based metal. The thickness of the insulating substrate 210 may be greater than the thickness of the metal plate 220, but is not limited to this.

[0077] Meanwhile, in the embodiment, the first filler 241 may be disposed within the insulating substrate 210. The first filler 241 may be formed by filling the via after a via is formed within the insulating substrate 210. The first filler 241 may include a metal having excellent thermal conductivity. For example, the first filler 241 may include a Cu-based metal, but is not limited thereto.

[0078] The first filler 241 is disposed at a position that vertically overlaps the semiconductor device 230. The first filler 241 may also be in contact with the lower surface of the first metal plate 221. Therefore, in the embodiment, the first filler 241 is disposed below the first metal plate 221, thereby increasing the area through which heat is transferred, thereby improving heat dissipation performance. In addition, the embodiment has a technical effect of shortening the heat transfer path within the insulating substrate 210, thereby improving heat dissipation performance.

[0079] In addition, the embodiment has a technical effect of increasing the bonding area between the ceramic of the insulating substrate 210 and the copper (Cu) of the first filler 241, thereby increasing the bonding strength, preventing peeling between the metal plate 220 and the insulating substrate 210, and improving reliability.

[0080] The first filler 241 may have a cylindrical shape, but is not limited thereto. Also, the first filler 241 may not be in contact with the second metal plate 222. The lower surface of the first filler 241 may be spaced apart from the upper surface of the second metal plate 222. Thus, the first metal plate 221 and the second metal plate 222 are electrically insulated.

[0081] In addition, the first filler 241 is disposed extending vertically downward from the lower surface of the first metal plate 221. As a result, in this embodiment, since the first filler 241 is present vertically from within the insulating substrate 210, external stress can be more effectively dispersed compared to the bonding surface of a metal plate, which has a bonding surface only in the horizontal direction, thereby providing a technical effect of improving reliability.

[0082] Here, a method for manufacturing a heat dissipation substrate for a power semiconductor according to an embodiment will be described. First, vias are formed in an insulating substrate 210, and then the vias are filled with copper to form a first filler 241. More specifically, the vias may be formed using a laser, etching, or the like. After the vias are formed, peripheral by-products may be removed by surface polishing or chemical cleaning. Then, the vias are filled with copper. The copper may be, but is not limited to, a copper paste or a copper rod. The copper filled in the vias may be heat-treated to uniformly fill the inside of the vias. In addition, in the embodiment, the copper filling and heat treatment may be repeated. As a result, the embodiment has the technical effect of uniformly filling the vias formed in the insulating substrate 210, preventing copper shrinkage and suppressing the generation of voids, thereby improving heat dissipation performance.

[0083] Then, a bonding metal layer (not shown) and a diffusion metal layer (not shown) are deposited on the insulating substrate 210. The bonding metal layer may include, but is not limited to, Ti. The diffusion metal layer may include, but is not limited to Al. After disposing the metal plate 220 on the insulating substrate 210, a heat dissipation substrate can be manufactured by thermocompression bonding. In this case, the bonding metal layer (not shown) and the diffusion metal layer (not shown) are thin, and the first filler 241 of the insulating substrate 210 may be bonded to the metal plate 220 using a high-pressure bonding process. Therefore, in this embodiment, Cu-Cu bonding is formed, thereby strengthening the bonding strength between the insulating substrate 210 and the metal plate 220 and improving reliability.

[0084] FIG. 5 is a conceptual diagram of a power semiconductor module 201 including a heat dissipation substrate 205 for a power semiconductor module according to a second embodiment. The second embodiment may employ the technical features and manufacturing method of the first embodiment. Referring to FIG. 5, a second filler 242 is disposed within an insulating substrate 210. The second filler 242 may have a downwardly convex shape. The second filler 242 may have a hemispherical shape, but is not limited thereto. An upper surface of the second filler 242 may contact a lower surface of the first metal plate 221. The second filler 242 may include a plurality of second fillers 242. The plurality of second fillers 242 are disposed at predetermined intervals from each other.

[0085] The second filler 242 is disposed to vertically overlap the semiconductor element 230. The second filler 242 may not be in contact with the second metal plate 222.

[0086] Therefore, the second embodiment has the technical effect of increasing the area of ​​the heat dissipation plate and improving heat dissipation performance by disposing the second filler 242 on the underside of the first metal plate 221. In addition, the second embodiment has the technical effect of increasing the bonding area between the insulating substrate 210 and the second filler 242, thereby increasing the bonding strength between the first metal plate 221 and the insulating substrate 210 and preventing peeling.

[0087] 6a is a conceptual diagram of a power semiconductor module 202 including a heat dissipation substrate 205 for a power semiconductor module according to a third embodiment. The third embodiment can employ the technical features and manufacturing methods of the first and second embodiments.

[0088] 6a, a third filler 243 is disposed within an insulating substrate 210. The third filler 243 may include a 3-1 filler 243a and a 3-2 filler 243b. The 3-1 filler 243a is disposed on a lower surface of a first metal plate 221. The 3-2 filler 243b is disposed on an upper surface of a second metal plate 222. The 3-1 filler 243a may have a downwardly convex shape, and the 3-2 filler 243b may have an upwardly convex shape.

[0089] In addition, the 3-1 filler 243a and the 3-2 filler 243b may each include a plurality of fillers spaced apart from one another. The 3-2 filler 243b may vertically overlap the spaces between the 3-1 fillers 243a. The 3-2 filler 243b and the 3-1 filler 243a are alternately arranged on opposing surfaces. In addition, the 3-2 filler 243b does not have to vertically overlap the 3-1 filler 243a. In addition, the 3-2 filler 243b may vertically overlap the 3-1 filler 243a.

[0090] In addition, the 3-1 filler 243a and the 3-2 filler 243b may not be in contact with each other, and the 3-1 filler 243a may not be in contact with the second metal plate 222.

[0091] As a result, the third embodiment has a technical effect of improving heat dissipation performance by disposing the third filler 243 in the insulating substrate 210 and transferring heat through the third filler 243. In addition, the third embodiment has a technical effect of improving reliability by increasing the bonding strength due to bonding between the insulating substrate 210, the third filler 243, and the metal plate 220, thereby preventing peeling.

[0092] Meanwhile, the horizontal width of the region where the 3-2 fillers 243b are arranged may be greater than the horizontal width of the region where the 3-1 fillers 243a are arranged. Also, the number of the 3-2 fillers 243b may be greater than the number of the 3-1 fillers 243a. As a result, in the third embodiment, since the heat transferred from the semiconductor device 230 increases in the downward direction as the heat conduction in the horizontal direction, the horizontal width of the 3-2 fillers 243b is made greater than the horizontal width of the 3-1 fillers 243a, thereby achieving a technical effect of uniformly dispersing heat.

[0093] Next, FIG. 6b is a cross-sectional view of a power semiconductor module 202B including a heat dissipation substrate for a power semiconductor according to an additional embodiment of the third embodiment.

[0094] The additional embodiment shown in FIG. 6b may adopt the technical features of the third embodiment 202 shown in FIG. 6a, and the following description will focus on the features of the additional embodiment 202B.

[0095] 6b, a fourth filler 244 is disposed in the insulating substrate 210, and the fourth filler 244 may include a 4-1 filler 244a and a 4-2 filler 244b. For example, the 4-1 filler 244a is disposed on the lower surface of the first metal plate 221. The 4-2 filler 244b is disposed on the upper surface of the second metal plate 222. The 4-1 filler 244a may have a downwardly convex shape, and the 4-2 filler 244b may have an upwardly convex shape.

[0096] In an additional embodiment, at least one of the 4-1 fillers 244a or the 4-2 fillers 244b may be arranged with a length equal to or greater than half the thickness of the insulating substrate 210. This improves heat dissipation efficiency by arranging the 4-1 fillers 244a or the 4-2 fillers 244b long in the vertical direction.

[0097] In addition, in an additional embodiment, the 4-1 fillers 244a and the 4-2 fillers 244b are alternately arranged in the vertical direction and are spaced apart and overlapped in the horizontal direction.

[0098] For example, the 4-2 filler 244b is disposed between the respective spaces of the plurality of 4-1 fillers 244a.

[0099] In addition, the 4-1 filler 244a is disposed between the respective spaces between the plurality of 4-2 fillers 244b.

[0100] As a result, according to additional embodiment 202B, multiple 4-1 fillers 244a and multiple 4-2 fillers 244b are arranged alternately in the vertical direction and overlapping in the horizontal direction, thereby achieving the technical effect of effectively transferring heat generated in the semiconductor element 230 downward while preventing electrical short circuits from occurring between the 4-1 fillers 244a and the 4-2 fillers 244b.

[0101] According to additional embodiment 202B, the horizontal width of the region where the 4-2 fillers 244b are arranged may be greater than the horizontal width of the region where the 4-1 fillers 244a are arranged. The number of the 4-2 fillers 244b may be greater than the number of the 4-1 fillers 244a. Therefore, according to the additional embodiment, by controlling the horizontal width of the 4-2 fillers 244b to be greater than the horizontal width of the 4-1 fillers 244a, the more heat transferred from the semiconductor element 230 is transferred downward, the greater the thermal conduction in the horizontal direction, resulting in a technical effect of uniformly dispersing heat downward and horizontally.

[0102] FIG. 7 is a conceptual diagram of a power semiconductor module 203 including a heat dissipation substrate 205 for a power semiconductor module according to a fourth embodiment. The fourth embodiment may employ the technical features of the first to third embodiments. Referring to FIG. 7, the fourth embodiment may further include a pin-fin structure 250 disposed below the heat dissipation substrate 205. The pin-fin structure 250 is disposed to contact the lower surface of the second metal plate 222. The pin-fin structure 250 may include a plurality of pin-fin structures spaced apart from each other. The horizontal width of the plurality of pin-fin structures 250 may be greater than the horizontal width of the plurality of first fillers 241. The pin-fin structure 250 may include a material with excellent thermal conductivity, such as, but not limited to, Cu.

[0103] As a result, the embodiment has a technical effect of further improving heat dissipation performance by disposing the pin-fin structure 250 under the heat dissipation substrate 205.

[0104] The heat dissipation substrate for a power semiconductor module according to the embodiment has a technical effect of increasing the area through which heat is transferred by disposing the filler 241 under the first metal plate 221, thereby improving the heat dissipation performance of the element by dissipating heat.

[0105] For example, in this embodiment, a first metal plate 221 is disposed under the semiconductor element 230, and a filler 241 is disposed on the lower surface of the first metal plate 221, thereby increasing the area through which heat is transferred and improving heat dissipation performance.

[0106] Furthermore, the embodiment has a technical effect of shortening the heat transfer path within the insulating substrate 210, thereby improving heat dissipation performance.

[0107] For example, in the embodiment, a filler having excellent thermal conductivity is disposed in the insulating substrate 210, and heat is transferred through the filler, thereby shortening the heat transfer path and improving heat dissipation performance.

[0108] In addition, the embodiment has a technical effect of preventing the metal plate 220 and the insulating substrate 210 from peeling off, thereby improving reliability.

[0109] For example, in the embodiment, the bonding area between the ceramic of the insulating substrate 210 and the copper (Cu) of the filler 241 increases, increasing the bonding strength, preventing the metal plate 220 and the insulating substrate 210 from peeling off, and improving reliability.

[0110] Furthermore, the embodiment has the technical effect of being able to effectively disperse external stress and improving reliability.

[0111] For example, in the embodiment, the bonding area between the ceramic of the insulating substrate 210 and the copper (Cu) of the filler 241 increases, increasing the bonding strength, preventing the metal plate 220 and the insulating substrate 210 from peeling off, and improving reliability.

[0112] In addition, the embodiment has the technical effect of forming a filler by repeatedly filling copper into the vias of the insulating substrate 210 and performing heat treatment, thereby making it possible to uniformly fill the vias formed in the insulating substrate 210, preventing copper shrinkage and suppressing the occurrence of voids, and improving heat dissipation performance.

[0113] Furthermore, the embodiment has the technical effect of dispersing heat evenly.

[0114] For example, in the embodiment, as the heat transferred from the semiconductor element 230 is transferred downward, the thermal conduction in the horizontal direction increases, so the horizontal width of the 3-2 filler 243b is made larger than the horizontal width of the 3-1 filler 243a, thereby dispersing the heat evenly.

[0115] Although the present invention has been described above with reference to an embodiment, it will be readily apparent to those skilled in the art that the present invention can be modified and changed in various ways without departing from the spirit and scope of the present invention as set forth in the claims below. [Explanation of symbols]

[0116] 200, 201, 202, 203: Power semiconductor modules 205: Heat dissipation board 210: Insulating substrate 220: Metal plate 221: First metal plate 222: Second metal plate 230: Semiconductor element 241: First filler 242: Second filler 243: Third filler 243a: 3rd-1st filler 243b: 3rd-2nd filler 250:pin-fin structure

Claims

1. an insulating substrate; a first metal plate disposed on the insulating substrate; a second metal plate disposed below the insulating substrate; a filler disposed within the insulating substrate; the filler is disposed on a lower surface of the first metal plate; a heat dissipation substrate for a power semiconductor module that does not contact the upper surface of the second metal plate;

2. The heat dissipation substrate for a power semiconductor module according to claim 1 , wherein the filler includes a plurality of fillers spaced apart from each other.

3. The heat dissipation substrate for a power semiconductor module according to claim 1 , wherein the filler is disposed so as to extend downward.

4. a bonding metal layer and a diffusion metal layer disposed between the first metal plate and the insulating substrate; The heat dissipation substrate for a power semiconductor module according to claim 1 , wherein the first metal plate and the filler are in contact with each other.

5. The heat dissipation substrate for a power semiconductor module according to claim 1 , wherein the filler has a cylindrical shape.

6. an insulating substrate; a first metal plate disposed on the insulating substrate; a second metal plate disposed below the insulating substrate; a filler disposed within the insulating substrate; the filler includes a plurality of first fillers and a plurality of second fillers; the plurality of first fillers are in contact with a lower surface of the first metal plate; the plurality of second fillers are in contact with an upper surface of the second metal plate; a horizontal width of the plurality of second fillers is greater than a horizontal width of the plurality of first fillers; The first filler does not contact the second metal plate.

7. The heat dissipation substrate for a power semiconductor module according to claim 6 , wherein the second filler is not in contact with the first filler.

8. an insulating substrate; a first metal plate disposed on the insulating substrate; a second metal plate disposed below the insulating substrate; a filler disposed within the insulating substrate; the fillers include one or more first fillers in contact with a lower surface of the first metal plate and one or more second fillers in contact with an upper surface of the second metal plate; A heat dissipation substrate for a power semiconductor module, wherein the vertical length of the first filler or the second filler is equal to or greater than half the thickness of the insulating substrate.

9. The heat dissipation substrate for a power semiconductor module according to claim 8 , wherein the first fillers and the second fillers are arranged alternately in the vertical direction and are arranged to be spaced apart and overlap each other in the horizontal direction.

10. an insulating substrate; a first metal plate disposed on the insulating substrate; a second metal plate disposed below the insulating substrate; a filler disposed within the insulating substrate; The second filler has a downwardly bulging shape, The heat dissipation substrate for a power semiconductor module, wherein an upper surface of the second filler is in contact with a lower surface of the first metal plate.

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