Self-diagnostic system

The self-diagnostic system generates an analog signal with a time constant to diagnose A/D converters without a D/A converter, simplifying the configuration and reducing costs, addressing the complexity of existing diagnostic methods.

JP2025159553APending Publication Date: 2025-10-21ROHM CO LTD
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Patent Information

Application Number
JP2024062205
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-04-08
Publication Date
2025-10-21

AI Technical Summary

Technical Problem

Existing A/D converter diagnostic techniques require a D/A converter to generate calibration voltages, complicating the configuration and increasing costs.

Method used

A self-diagnostic system that generates an analog signal with a time constant using a signal generating circuit, an A/D converter, and a processing circuit to evaluate digital data without a D/A converter, allowing for a simpler and cost-effective diagnosis of A/D converters.

Benefits of technology

Enables accurate diagnosis of A/D converters with a simplified configuration, reducing costs and eliminating the need for a D/A converter, particularly effective when a compatible converter is not mounted on a semiconductor chip.

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Abstract

To provide a technique capable of diagnosing an A / D converter with a simple configuration.SOLUTION: Self-diagnostic systems 1, 2, and 3 include: signal generation circuits 10, 20, 22, and 30 having time constants, for generating analog signals temporally changing according to the time constants; A / D converters 14, 26, and 34 for generating digital data according to the analog signals; and processing circuits 16, 28, and 36 for evaluating the digital data based on the digital data and analog signals to be generated by the signal generation circuits calculated based on the time constants.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] The present disclosure relates to a self-diagnostic system. [Background technology]

[0002] Conventionally, techniques have been proposed for diagnosing whether an A / D converter is operating normally. For example, Patent Document 1 discloses a technique for diagnosing an A / D converter by comparing a digital signal converted by the A / D converter from a calibration voltage with a digital signal stored in a nonvolatile memory. Patent Document 1 discloses diagnosing an A / D converter by using, as the calibration voltage, a maximum voltage corresponding to the maximum value of the digital signal, a minimum voltage corresponding to the minimum value of the digital signal, or an intermediate voltage corresponding to the midpoint of the digital signal. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2017-208667

[0004] [overview] However, the present inventors have come to recognize the following problem: In order to generate calibration voltages corresponding to each digital signal as in the technology described in Patent Document 1, a D / A converter is required to convert the digital signals into analog signals of the calibration voltages.

[0005] The present disclosure has been made in light of the above circumstances, and one of its exemplary purposes is to provide a technique capable of diagnosing an A / D converter with a simple configuration.

[0006] A self-diagnostic system according to one embodiment of the present disclosure includes a signal generating circuit that has a time constant and generates an analog signal that changes over time in accordance with the time constant, an A / D converter that generates digital data in accordance with the analog signal, and a processing circuit that evaluates the digital data based on the digital data and the analog signal to be generated by the signal generating circuit, which is calculated based on the time constant.

[0007] Any combination of the above components and conversion of the expressions of the present disclosure into methods, devices, systems, etc. are also valid aspects of the present disclosure. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram of a self-diagnosis system according to the first embodiment. [Figure 2] FIG. 2 is a diagram showing the change over time in the voltage of the output node when the capacitor of the signal generating circuit according to the embodiment is charged. [Figure 3] FIG. 3 is a diagram showing the change over time in the voltage of the output node when the capacitor of the signal generating circuit according to the embodiment is discharged. [Figure 4] FIG. 4 is a block diagram of a self-diagnosis system according to a comparative technique. [Figure 5] FIG. 5 is a diagram showing the time variation of a test signal according to the comparative technique. [Figure 6] FIG. 6 is a block diagram of a self-diagnosis system according to the second embodiment. [Figure 7] FIG. 7 is a block diagram of a self-diagnosis system according to the third embodiment.

[0009] [Detailed explanation] (overview) A summary of some exemplary embodiments of the present disclosure is provided. This summary is intended to provide a simplified overview of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments as a prelude to the more detailed description that follows. It is not intended to limit the scope of the invention or disclosure. This summary is not an exhaustive overview of all possible embodiments, and is not intended to identify key elements of all embodiments or to delineate the scope of some or all aspects. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.

[0010] A self-diagnostic system according to one embodiment includes a signal generating circuit that has a time constant and generates an analog signal that changes over time in accordance with the time constant, an A / D converter that generates digital data in accordance with the analog signal, and a processing circuit that evaluates the digital data based on the digital data and the analog signal that should be generated by the signal generating circuit, which is calculated based on the time constant.

[0011] This configuration allows the generation of an analog signal for diagnosing the A / D converter and the evaluation of the digital data of the A / D converter in response to that analog signal, without using a D / A converter, making it possible to diagnose the A / D converter with a simple configuration.

[0012] In one embodiment, the signal generating circuit may include a resistor having one end connected to an output node of the signal generating circuit and a capacitor provided between the output node and a ground node, and the time constant may be determined by the resistance value of the resistor and the capacitance value of the capacitor.

[0013] In one embodiment, the signal generating circuit may further include a switch provided between the other end of the resistor and a power supply voltage node, and the analog signal may include a voltage of a capacitor that is charged by power being supplied from the power supply voltage node through the resistor when the switch is on.

[0014] In one embodiment, the signal generating circuit may further include a switch provided between the other end of the resistor and a ground node, and the analog signal may include a voltage of a capacitor that is discharged when the switch is turned on while the capacitor is charged.

[0015] In one embodiment, the signal generating circuit may include a resistor having one end connected to an output node of the signal generating circuit and an inductor provided between the output node and a ground node, and the time constant may be determined by the resistance value of the resistor and the inductance of the inductor.

[0016] In one embodiment, the signal generating circuit may further include a switch provided between the other end of the resistor and a power supply voltage node, and the analog signal may include a voltage of the inductor generated when a current flows from the power supply voltage node through the resistor when the switch is on.

[0017] In one embodiment, the time constant may be determined according to the sampling frequency of the A / D converter and the resolution per bit of the A / D converter.

[0018] In one embodiment, the analog signal may monotonically increase or decrease over time, and the time constant may be specified so that the digital data generated by the A / D converter changes by no more than 1 bit per unit sampling time.

[0019] In one embodiment, the processing circuitry may evaluate the digital data generated by the A / D converter depending on whether the digital data generated by the A / D converter falls within a range of digital data corresponding to the analog signal to be generated by the signal generating circuitry.

[0020] In one embodiment, the processing circuitry may diagnose the A / D converter based on the evaluation of the digital data.

[0021] In one embodiment, the signal generating circuit may further include a multiplexer to which the analog signal generated by the signal generating circuit and another analog signal are input, and the A / D converter may generate digital data according to the analog signal selected by the multiplexer.

[0022] In one embodiment, the A / D converter may generate digital data according to the difference between two input signals, at least one of which may be an analog signal generated by a signal generating circuit.

[0023] In one embodiment, the signal generating circuit may be a first signal generating circuit, the time constant may be a first time constant, and the analog signal may be a first analog signal. The self-diagnosis system may further include a second signal generating circuit having a second time constant and generating a second analog signal that varies over time according to the second time constant. One of the two input signals may be the first analog signal. The other of the two input signals may be the second analog signal. The first analog signal may be a signal that monotonically increases over time. The second analog signal may be a signal that monotonically decreases over time. The processing circuit may evaluate the digital data based on digital data corresponding to the difference between the two input signals, the first analog signal to be generated by the first signal generating circuit calculated based on the first time constant, and the second analog signal to be generated by the second signal generating circuit calculated based on the second time constant.

[0024] In one embodiment, the first signal generating circuit may include a first resistor having one end connected to a first output node of the first signal generating circuit and a first capacitor provided between the first output node and a ground node. The second signal generating circuit may include a second resistor having one end connected to a second output node of the second signal generating circuit and a second capacitor provided between the second output node and a ground node. The first analog signal may include a voltage of the first capacitor that is charged by power being supplied from a power supply voltage node via the first resistor. The second analog signal may include a voltage of the second capacitor when the charged second capacitor is discharged.

[0025] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing will be given the same reference numerals, and redundant explanations will be omitted as appropriate. Furthermore, the embodiments are examples and do not limit the disclosure and invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the disclosure and invention.

[0026] In this specification, "a state in which component A is connected to component B" includes not only a case in which component A and component B are directly physically connected, but also a case in which component A and component B are indirectly connected via other components that do not substantially affect the electrical connection state between them or that do not impair the function or effect achieved by their connection.

[0027] Similarly, "a state in which component C is connected (provided) between component A and component B" includes not only a case in which component A and component C, or component B and component C, are directly connected, but also a case in which they are indirectly connected via other components that do not substantially affect the electrical connection state between them or that do not impair the function or effect achieved by their combination.

[0028] In addition, in this specification, symbols attached to electrical signals such as voltage signals and current signals, or circuit elements such as resistors, capacitors, and inductors, represent the respective voltage values, current values, or circuit constants (resistance values, capacitance values, inductances) as necessary.

[0029] (First embodiment) 1 is a block diagram of a self-diagnostic system 1 according to the first embodiment. The self-diagnostic system 1 according to the first embodiment includes a signal generating circuit 10, a multiplexer 12, an A / D converter 14, and a processing circuit 16. The self-diagnostic system 1 is configured to be able to diagnose the A / D converter 14.

[0030] The self-diagnostic system 1 may be configured on a single semiconductor chip, or a portion of the configuration may be configured on a single semiconductor chip with the remaining configuration provided externally. For example, the signal generating circuit 10 may be provided externally to a semiconductor chip and the remaining configuration may be configured on a single semiconductor chip.

[0031] The signal generating circuit 10 has a time constant τ1 (also called "relaxation time") and generates an analog signal (voltage V C1 ) is generated. The signal generating circuit 10 has switches SW1 and SW2, a resistor R1, and a capacitor C1. The time constant τ1 of the signal generating circuit 10 is determined by the resistance value of the resistor R1 and the capacitance value of the capacitor C1. Specifically, τ1=R1C1.

[0032] The capacitor C1 is provided between the output node NC1 of the signal generating circuit 10 and a ground node Ng1. The ground node Ng1 is a node to which the reference voltage GND of the self-diagnostic system 1 is supplied. One end of the resistor R1 is connected to the output node NC1, and the other end of the resistor R1 is connected to the switches SW1 and SW2. In this embodiment, the voltage V of the output node NC1 C1 is input to the input terminal of the multiplexer 12 to which a signal for diagnosing the A / D converter 14 is input.

[0033] The switch SW1 is provided between the other end of the resistor R1 and a power supply voltage node Nv1. The power supply voltage node Nv1 is a node to which the power supply voltage AVDD is supplied. When the switch SW1 is turned on while the switch SW2 is off, the power supply voltage AVDD is supplied to the other end of the resistor R1. At this time, the capacitor C1 is charged by the power supplied from the power supply voltage node Nv1 via the resistor R1. The voltage V C1 may include the voltage of capacitor C1 that is charged when switch SW1 is on. This allows the time-varying voltage V C1 It is possible to generate

[0034] The switch SW2 is connected between the other end of the resistor R1 and the ground node Ng1. When the switch SW2 is turned on while the switch SW1 is off, the reference voltage GND is supplied to the other end of the resistor R1. At this time, the charged capacitor C1 is discharged. The voltage V C1 may include the voltage of the capacitor C1 that is discharged when the switch SW2 is turned on while the capacitor C1 is charged. As a result, the time-varying voltage V C1 It is possible to generate

[0035] In this embodiment, an example will be described in which two switches SW1 and SW2 are provided in the signal generating circuit 10, but this is not limiting, and these switches may be combined into one. Specifically, instead of the two switches SW1 and SW2, a switch configured to be able to switch the connection destination of the other end of the resistor R1 between the power supply voltage node Nv1 and the ground node Ng1 may be provided.

[0036] The multiplexer 12 receives a plurality of conventional analog signals AIN1, AIN2 and a voltage V C1 and inputs the selected signal SIN1 to the A / D converter 14. The signal to be selected is determined by the selection signal SEL1. When diagnosing the A / D converter 14, the multiplexer 12 selects one of the analog signals (voltage V C11 shows an example in which two normal analog signals AIN1 and AIN2 are input to the multiplexer 12, but the number of normal analog signals input to the multiplexer 12 may be one, or three or more.

[0037] The A / D converter 14 is a device to be diagnosed in the self-diagnosis system 1. The A / D converter 14 may be any of various types of A / D converters, such as a ΔΣ type.

[0038] The A / D converter 14 performs A / D conversion on the analog signal at a predetermined sampling frequency f1 and a voltage resolution δ1 per bit. The A / D converter 14 generates digital data DOUT1 according to the signal SIN1 selected by the multiplexer 12. When diagnosing the A / D converter 14, the A / D converter 14 converts the analog signal (V C1 ) to generate digital data DOUT1.

[0039] The processing circuit 16 executes various processes, specifically, controls the overall operation of the self-diagnosis system 1, and executes processes for diagnosing the A / D converter 14. The processing circuit 16 according to this embodiment includes a control unit 160 and an evaluation unit 162.

[0040] The control unit 160 controls the overall operation of the self-diagnostic system 1. Specifically, the control unit 160 may generate a control signal Sad1 for controlling the operation of the A / D converter 14, or a control signal Ssw1 for controlling the operation of the switches SW1 and SW2 of the signal generating circuit 10. The control unit 160 may also generate a selection signal SEL1 that is input to the multiplexer 12.

[0041] The evaluation unit 162 calculates the voltage V to be generated by the signal generating circuit 10 based on the digital data DOUT1 and the time constant τ1. C1 (hereinafter referred to as "target voltage V T1 The digital data DOUT1 is evaluated based on the target voltage VT1 The calculation of may be performed in the evaluation unit 162 or externally. The evaluation result of the digital data DOUT1 is used as information for diagnosing the A / D converter 14.

[0042] For example, the A / D converter 14 converts a time-varying voltage V C1 (t) voltage V at timing t1 C1 (t1), while generating the target voltage V T1 is calculated. Target voltage V T1 The digital data generated by appropriately A / D converting (t1) is denoted as DT1(t1).

[0043] The evaluation section 162 may evaluate the digital data DT1(t1) depending on whether the digital data DOUT1(t1) matches the digital data DT1(t1). For example, if the digital data DOUT1(t1) matches the digital data DT1(t1), the evaluation section 162 may determine that the digital data DOUT1(t1) is acceptable. On the other hand, if the digital data DOUT1(t1) does not match the digital data DT1(t1), the evaluation section 162 may determine that the digital data DOUT1(t1) is unacceptable.

[0044] Generally, there is variation in the resistance value of the resistor R1 and the capacitance value of the capacitor C1 that constitute the signal generating circuit 10. Therefore, it is preferable to have a range of levels for evaluating the digital data DOUT1(t1). Therefore, the evaluation unit 162 may evaluate the digital data DOUT1 depending on whether the digital data DOUT1 is included in a range (hereinafter also referred to as a "target range") defined by the digital data DT1(t).

[0045] For example, the target voltage V T1When the digital data DT1(t1) obtained by appropriately A / D converting (t1) is 3, the target range may be set to the range of 3±2 (1 to 5). In this case, the evaluation unit 162 may determine that the digital data DOUT1(t1) is acceptable if the digital data DOUT1(t1) is within the target range. On the other hand, the evaluation unit 162 may determine that the digital data DOUT1(t1) is unacceptable if the digital data DOUT1(t1) is not within the target range.

[0046] The A / D converter 14 converts an analog signal into a voltage V C1 (t) and the sampled voltage V C1 The evaluation section 162 may evaluate each of the generated digital data DOUT1 as described above.

[0047] The evaluation section 162 may diagnose the A / D converter 14 based on the evaluation result of the digital data DOUT1. For example, if the number of passed digital data DOUT1 among the multiple evaluated digital data DOUT1 is equal to or greater than a threshold value, the evaluation section 162 may diagnose the A / D converter 14 as normal. On the other hand, if the number of passed digital data DOUT1 is less than the threshold value, the evaluation section 162 may diagnose the A / D converter 14 as abnormal.

[0048] An example of the operation of the signal generating circuit 10 according to this embodiment will be described with reference to Fig. 2 and Fig. 3. Fig. 2 shows the voltage V when the capacitor C1 of the signal generating circuit 10 is charged. C1 3 is a diagram showing the time change of the voltage V when the capacitor C1 of the signal generating circuit 10 is discharged. C1 2 and 3, the horizontal axis represents time [msec], and the vertical axis represents voltage V C1 Indicates [V].

[0049] In the example shown in FIG. 2, before timing t10, the capacitor C1 is not charged and the voltage V C1is 0V. Furthermore, before timing t10, both switches SW1 and SW2 are off. Note that switch SW2 may be on. At timing t10, switch SW1 switches from off to on. At this time, if switch SW2 is on, switch SW2 switches from on to off.

[0050] By switching this switch, current flows from the power supply voltage node Nv1 through the switch SW1 to the resistor R1, and the capacitor C1 is charged. C1 rises from 0V. At this time, if the magnitude of the power supply voltage AVDD is E and e is Napier's constant, the voltage V C1 (t) monotonically increases with the passage of time and is expressed by the following equation (1): In equation (1), the timing t=0 corresponds to timing t10.

number

[0051] The A / D converter 14 converts a voltage V C1 (t) is A / D converted. Here, the A / D converter 14 converts V C11 ~V C13 Voltage V in the range C1 is converted to a digital signal, and the voltage V C1 The digital data DOUT1 is generated according to V C12 is V C11 and V C13 In addition, in Figure 2, the voltage V C1 (t) is converted to a digital signal. C1 The number of samples of (t) may be 7 or less, or 9 or more. C1 By increasing the number of samples of (t), it becomes possible to diagnose the A / D converter 14 with higher accuracy.

[0052] As shown in Figure 2, the voltage V C1 (t) rises sharply immediately after the start of charging, and the change becomes more gradual as time passes. This voltage V C1 Taking into account the change in (t), it is preferable that the time constant τ1 of the signal generating circuit 10 be defined so that the digital data DOUT1 of the A / D converter 14 can be evaluated with sufficient accuracy. Specifically, it is preferable that the time constant τ1 be defined by the sampling frequency f1 and the resolution per bit δ1 of the A / D converter 14. This enables more appropriate diagnosis according to the capabilities of the A / D converter 14.

[0053] More specifically, it is preferable that the time constant τ1 is set so that the change in the digital data DOUT1 per unit sampling time T1 is 1 bit or less. For example, in the example shown in FIG. 2, if the voltage difference between the first two points is less than δ1, that is, V C1 (t12)-V C1 If (11)<δ1, the change in the digital data DOUT1 per unit sampling time T can always be kept to 1 bit or less. This makes it possible to evaluate the digital data DOUT1 generated by the A / D converter 14 in 1-bit increments, enabling more accurate diagnosis of the A / D converter 14.

[0054] The evaluation unit 162 calculates the voltage V C1 The digital data DOUT1 obtained by A / D converting (t) is evaluated. Furthermore, the evaluation section 162 may diagnose the A / D converter 14 based on the eight pieces of digital data DOUT1.

[0055] In the example shown in FIG. 3, before timing t20, the capacitor C1 is charged and the voltage V C1is E. Also, before timing t20, switches SW1 and SW2 are both off. Note that switch SW1 may be on. At timing t20, switch SW2 switches from off to on. At this time, if switch SW1 is on, switch SW1 switches from on to off.

[0056] This switching causes the capacitor C1 to discharge. As the capacitor C1 discharges, the voltage V C1 decreases monotonically with the passage of time, and decreases according to the following equation (2): In equation (2), the timing t=0 corresponds to the timing t20.

number

[0057] As in the case of charging the capacitor C1, the A / D converter 14 converts V C11 ~V C13 Voltage V in the range C1 (t) is converted to a digital signal and the voltage V C1 In FIG. 3, the voltage V C1 (t) is converted to a digital signal. C1 The number of samples of (t) may be 8 or less, or 10 or more. C1 By increasing the number of samples of (t), it becomes possible to diagnose the A / D converter 14 with higher accuracy.

[0058] As shown in Figure 3, the voltage V C1(t) drops sharply immediately after the start of discharge, and the change becomes more gradual as time passes. As in the case of charging capacitor C1, it is preferable that the time constant τ1 is set so that the change in the digital data DOUT1 per unit sampling time T1 is 1 bit or less. For example, in the example shown in Figure 3, if the voltage difference between the first two points is less than δ1, that is, V C1 (t21)-V C1 If (22)<δ1, the change in the digital data DOUT1 per unit sampling time T1 can always be kept to 1 bit or less. This allows the digital data DOUT1 generated by the A / D converter 14 to be evaluated in 1-bit increments, enabling more accurate diagnosis of the A / D converter 14.

[0059] 4 is a block diagram of a self-diagnosis system 9 according to the comparative technique. The self-diagnosis system 9 according to the comparative technique includes a D / A converter 90, a multiplexer 92, an A / D converter 94, and a processing circuit 96. The self-diagnosis system 9 is configured on a single semiconductor chip.

[0060] The D / A converter 90 converts the digital test signal Dtest from digital to analog to generate an analog test signal Dtest. The D / A converter 90 is used to diagnose the A / D converter 94, but if a D / A converter is mounted on the semiconductor chip for normal use, it can be used in conjunction with that D / A converter.

[0061] The test signal Dtest increases stepwise as time passes. Therefore, the test signal Atest generated by the D / A converter 90 increases stepwise as time passes. FIG. 5 is a diagram showing the change over time of the test signal Atest according to the comparative technique. In FIG. 5, the horizontal axis represents time, and the vertical axis represents the test signal Atest. As shown in FIG. 5, the test signal Atest has a ramp waveform and increases stepwise in the range of -Afull to +Afull.

[0062] 4, the self-diagnostic system 9 according to the comparative technique will be described. A multiplexer 92 according to the comparative technique selects one signal from the normal analog signals AIN1, AIN2 and the test signal Atest in response to a selection signal SEL9, and inputs the selected signal SIN9 to an A / D converter 94. In the following description, it is assumed that the test signal Atest is selected.

[0063] The A / D converter 94 performs A / D conversion on the signal SIN9 (i.e., the test signal Atest) to generate digital data DOUT9. As described with reference to Fig. 5, the test signal Atest changes stepwise over time, and the A / D converter 94 generates digital data DOUT9 corresponding to each level of the test signal Atest from -Afull to +Afull.

[0064] The processing circuit 96 performs various digital signal processing, specifically, generating a digital test signal Dtest, controlling the D / A converter 90 and the A / D converter 94 (initial setting, clock control, conversion control), and determining whether the digital data DOUT9 is correct or not.

[0065] The processing circuit 96 compares the correct digital data that should be generated by the A / D converter 94 with the actually generated digital data DOUT9, and determines whether the digital data DOUT9 is correct or not depending on whether they match. The processing circuit 96 diagnoses the A / D converter 94 depending on the result of this determination.

[0066] The self-diagnostic system 9 according to the comparative technique requires a D / A converter 90 to generate the analog test signal Atest, which increases costs. Furthermore, the smaller the step in the ramp waveform of the test signal Atest, the higher the accuracy of the A / D converter 94 can be, but the longer the time required for the conversion process in the A / D converter 94 and for determining whether the digital data DOUT9 is correct or not.

[0067] According to the self-diagnosis system 1 of this embodiment, the signal generating circuit 10 has a time constant τ1 and generates an analog signal (voltage V C1 ) is generated by the A / D converter 14. C1 The processing circuit 16 (evaluation unit 162) generates digital data SDOUT1 according to the digital data SDOUT1 and the analog signal (voltage V C1 ) and evaluate the digital data SDOUT1.

[0068] This configuration makes it possible to generate an analog signal for diagnosing A / D converter 14 and evaluate the digital data of A / D converter 14 corresponding to that analog signal without using a D / A converter. This makes it possible to diagnose A / D converter 14 with a simple configuration and reduce the cost of self-diagnosis system 1. This is particularly effective when a compatible A / D converter is not mounted on the semiconductor chip.

[0069] (Second embodiment) 6 is a block diagram of a self-diagnostic system 2 according to a second embodiment. The second embodiment differs from the first embodiment mainly in that a differential A / D converter is used. The self-diagnostic system 2 according to the second embodiment includes a first signal generating circuit 20, a second signal generating circuit 22, a first multiplexer 24, a second multiplexer 25, an A / D converter 26, and a processing circuit 28.

[0070] The first signal generating circuit 20 has a first time constant τ2 and generates a first analog signal (voltage V C2 ) is generated. The first signal generating circuit 20 has a switch SW3, a first resistor R2, and a first capacitor C2. The first time constant τ2 of the first signal generating circuit 20 is determined by the resistance value of the first resistor R2 and the capacitance value of the first capacitor C2. Specifically, τ2 = R2C2.

[0071] The first capacitor C2 is provided between the output node NC2 and the ground node Ng2 of the first signal generating circuit 20. One end of the first resistor R2 is connected to the output node NC2, and the other end of the first resistor R2 is connected to the switch SW3. In this embodiment, the voltage V of the output node NC2 C2 is input to an input terminal of the first multiplexer 24, which receives a signal for diagnosing the A / D converter 26. The switch SW3 is configured to be able to switch the connection destination of the other end of the first resistor R2 between the power supply voltage node Nv2 and the ground node Ng2.

[0072] The first multiplexer 24 receives a plurality of conventional analog signals AIN1, AIN2 and a voltage V C2 and inputs the selected signal SIN2 to the A / D converter 26. The signal to be selected is determined by the selection signal SEL2. When diagnosing the A / D converter 26, the first multiplexer 24 selects one of the analog signals (voltage V C2 6 shows an example in which two normal analog signals AIN1 and AIN2 are input to the first multiplexer 24, but the number of normal analog signals input to the first multiplexer 24 may be one, or three or more.

[0073] The second signal generating circuit 22 has a second time constant τ3 and generates a second analog signal (voltage V C3 ) The second signal generating circuit 22 has a switch SW4, a second resistor R3, and a second capacitor C3. A second time constant τ3 of the second signal generating circuit 22 is determined by the resistance value of the second resistor R3 and the capacitance value of the second capacitor C3. Specifically, τ3 = R3C3. Note that it is preferable that the resistance value of the second resistor R3 and the capacitance value of the second capacitor C3 are the same as the resistance value of the first resistor R2 and the capacitance value of the first capacitor C2, respectively, since this facilitates manufacturing.

[0074] The second capacitor C3 is provided between the output node NC3 of the second signal generating circuit 22 and the ground node Ng2. One end of the second resistor R3 is connected to the output node NC3, and the other end of the second resistor R3 is connected to the switch SW4. In this embodiment, the voltage V of the output node NC3 C3 is input to an input terminal of a second multiplexer 25 to which a signal for diagnosing the A / D converter 26 is input. A switch SW4 is configured to be able to switch the connection destination of the other end of the second resistor R3 between a power supply voltage node Nv2 and a ground node Ng2.

[0075] The second multiplexer 25 receives a plurality of conventional analog signals AIN3, AIN4 and a voltage V C3 and inputs the selected signal SIN3 to the A / D converter 26. The signal to be selected is determined by the selection signal SEL3. When diagnosing the A / D converter 26, the second multiplexer 25 selects one of the analog signals (voltage V C3 6 shows an example in which two normal analog signals AIN3 and AIN4 are input to the second multiplexer 25, but the number of normal analog signals input to the second multiplexer 25 may be one, or three or more.

[0076] The A / D converter 26 is a device to be diagnosed in the self-diagnosis system 2. The A / D converter 26 according to this embodiment generates digital data DOUT2 corresponding to the difference between the two input signals SIN2 and SIN3.

[0077] The processing circuitry 28 executes various processes, and more specifically, controls the overall operation of the self-diagnosis system 2 and executes processes for diagnosing the A / D converter 26. The processing circuitry 28 according to this embodiment includes a control unit 280 and an evaluation unit 282.

[0078] The control unit 280 controls the overall operation of the self-diagnostic system 2. Specifically, the control unit 280 may generate a control signal Sad2 for controlling the operation of the A / D converter 26, a control signal Ssw2 for controlling the operation of the switch SW3, and a control signal Ssw3 for controlling the operation of the switch SW4. The control unit 280 may also generate selection signals SEL2 and SEL3.

[0079] The evaluation unit 282 calculates the voltage V to be generated by the first signal generating circuit 20, which is calculated based on the digital data DOUT2 and the first time constant τ2. C2 and the voltage V to be generated by the second signal generating circuit 22 calculated based on the second time constant τ3. C3 (hereinafter referred to as "target differential voltage ΔV T1 The digital data DOUT1 is evaluated based on the target differential voltage ΔV T1 It is also possible to calculate the digital data DT2 to be generated by the A / D converter 26 according to the above.

[0080] Voltage V C2 may increase monotonically over time. Specifically, the voltage V C2 may be the voltage of the first capacitor C2 that is charged by power supplied from the power supply voltage node Nv2 via the first resistor R2. For example, assume that the other end of the first resistor R2 is connected to the ground node Ng2 by the switch SW3 and the first capacitor C2 is completely discharged. In this state, the switch SW3 is switched so that the other end of the first resistor R2 is connected to the power supply voltage node Nv2. This charges the first capacitor C2.

[0081] Also, the voltage V C3 may decrease monotonically over time. C3may be the voltage of the second capacitor C3 when the charged second capacitor C3 is discharged. For example, assume that the other end of the second resistor R3 is connected to the power supply voltage node Nv2 by the switch SW4, and the second capacitor C3 is charged with the power supply voltage AVDD. In this state, the switch SW4 is switched so that the other end of the second resistor R3 is connected to the ground node Ng2. This discharges the second capacitor C3.

[0082] When an analog signal for diagnosis is generated, the switch SW3 for charging the first capacitor C2 and the switch SW4 for discharging the second capacitor C3 are simultaneously switched, so that charging of the first capacitor C2 and discharging of the second capacitor C3 start simultaneously.

[0083] At this time, the voltage V C2 is expressed by the following equation (3).

number

[0084] On the other hand, the voltage V C3 is expressed by the following equation (4).

number

[0085] The analog signal to be generated by the first signal generating circuit 20 and the analog signal to be generated by the second signal generating circuit 22 may be calculated based on equations (3) and (4), respectively.

[0086] The A / D converter 26 converts these two voltages V C2 ,V C3 The difference between the two voltages V is converted into digital data DOUT2. C2 ,V C3 The differential voltage ΔV1 is expressed by the following equation (5).

number

[0087] The differential voltage ΔV1(t) starts from a negative voltage −E, monotonically increases over time, and saturates at a positive voltage +E. The A / D converter 26 generates digital data DOUT2(t) corresponding to the differential voltage ΔV1(t) within a predetermined range between the voltages −E and +E.

[0088] The evaluation unit 162 may evaluate this digital data DOUT2(t). Specifically, the evaluation unit 162 may evaluate the digital data DOUT2(t) depending on whether the digital data DOUT2(t) matches the digital data DT2(t). Alternatively, similar to the first embodiment, a range of standards may be provided for evaluating the digital data DOUT2(t). Furthermore, the evaluation unit 162 may diagnose the A / D converter 26 based on the evaluation result of the digital data DOUT2(t).

[0089] In this embodiment, in order to diagnose the A / D converter 26, the voltage V when the first capacitor C2 is charged is C2 and the voltage V when the second capacitor C3 is discharged. C3 In the above example, the voltage V when the first capacitor C2 is discharged is used for diagnosing the A / D converter 26. C2 and the voltage V when the second capacitor C3 is charged. C3 and may be used.

[0090] In the present embodiment, an example has been described in which the two analog signals for diagnosis input to the A / D converter 26 are generated by the first signal generation circuit 20 and the second signal generation circuit 22. However, the present invention is not limited to this. Of the two analog signals for diagnosis input to the A / D converter 26, one analog signal may be generated by a circuit similar to the first signal generation circuit 20 and the second signal generation circuit 22, and the other analog signal may be a fixed voltage. In this case, too, it is possible to diagnose the A / D converter 26 by utilizing the fact that an analog signal that changes over time according to a time constant is input to the A / D converter 26.

[0091] Furthermore, according to this embodiment, the voltage V C2 increases monotonically over time, and the voltage V C3 decreases monotonically with the passage of time. As a result, the differential voltage ΔV1 can be changed over a wide range, and the A / D converter 26 can be diagnosed with higher accuracy.

[0092] (Third embodiment) 7 is a block diagram of a self-diagnostic system 3 according to a third embodiment. The self-diagnostic system 3 according to the third embodiment differs from the self-diagnostic system 1 according to the first embodiment mainly in that the signal generating circuit 30 has an inductor L1 instead of a capacitor. The self-diagnostic system 3 according to the third embodiment includes a signal generating circuit 30, a multiplexer 32, an A / D converter 34, and a processing circuit 36.

[0093] The signal generating circuit 30 has a time constant τ4 and generates an analog signal (voltage V L1 ) is generated. The signal generating circuit 30 has switches SW5 to SW7, a resistor R4, and an inductor L1. The time constant τ4 of the signal generating circuit 30 is determined by the resistance value of the resistor R4 and the inductance of the inductor L1. Specifically, τ4=L1 / R4.

[0094] The inductor L1 is provided between the output node NL1 and the ground node Ng3 of the signal generating circuit 30. One end of the resistor R4 is connected to the output node NL1. The other end of the resistor R1 is connected to the switches SW5 and SW6.

[0095] The switch SW7 is provided so as to be able to switch the connection destination of the switching terminal 300 between the output node NL1 and the ground node Ng3. The switching terminal 300 is connected to an input terminal of the multiplexer 32 to which a signal for diagnosing the A / D converter 34 is input.

[0096] The switch SW5 is connected between the other end of the resistor R4 and the power supply voltage node Nv3. When the switch SW5 is turned on after the switch SW6 is turned off, the power supply voltage AVDD is supplied to the other end of the resistor R4. At this time, a current I1 flows through the inductor L1 in the direction from one end of the resistor R4 to the ground node Ng3. The voltage V L1 contains the voltage across inductor L1, through which current I1 flows when switch SW5 is on. This results in a time-varying voltage V L1 It is possible to generate the following. Before the switch SW5 is turned on, the switch terminal 300 may be connected to the output node NL1 by the switch SW7.

[0097] The switch SW6 is connected between the other end of the resistor R4 and the ground node Ng3. When the switch SW5 is turned off and then the switch SW6 is turned on, the reference voltage GND is supplied to the other end of the resistor R4. If a current I1 is flowing through the inductor L1, the current I1 decreases and eventually stops flowing, and the voltage V L1 = 0. At the timing when the switch SW5 is turned off, the switch terminal 300 may be connected to the ground node Ng3 by the switch SW7.

[0098] The multiplexer 32 receives a plurality of conventional analog signals AIN1, AIN2, and a voltage V L17 shows an example in which two normal analog signals AIN1 and AIN2 are input to the multiplexer 32, but the number of normal analog signals input to the multiplexer 32 may be one, or three or more.

[0099] The A / D converter 34 is a device to be diagnosed in the self-diagnosis system 3. The A / D converter 34 according to this embodiment performs A / D conversion on the input signal SIN4 to generate digital data DOUT3.

[0100] The processing circuit 36 ​​executes various processes, specifically, controls the overall operation of the self-diagnosis system 3, and executes processes for diagnosing the A / D converter 34. The processing circuit 36 ​​according to this embodiment includes a control unit 360 and an evaluation unit 362.

[0101] The control unit 360 controls the overall operation of the self-diagnosis system 3. Specifically, the control unit 360 may generate a control signal Sad3 for controlling the operation of the A / D converter 34, and may generate a control signal Ssw4 for controlling the operation of the switches SW5 to SW7. The control unit 360 may also generate a selection signal SEL4.

[0102] The evaluation unit 362 calculates the analog signal (voltage V L1 ) and evaluates the digital data DOUT3 based on the result of the evaluation. Specifically, similar to the above embodiment, the evaluation unit 362 may determine whether the digital data DOUT3 matches the analog signal to be generated, or may determine whether the digital data DOUT3 is included in a predetermined range of digital data. Furthermore, the evaluation unit 362 may diagnose the A / D converter 34 based on the evaluation result of the digital data DOUT3.

[0103] An example of the operation of the self-diagnosis system 3 will be described below. First, the switch SW5 is turned off, and then the switch SW6 is turned on. At the timing when the switch SW5 is turned off, the switching terminal 300 is connected to the ground node Ng3 by the switch SW7. When the switch SW6 is turned on, even if a current I1 is flowing through the inductor L1, the current I1 decreases, and the voltage V L1 eventually becomes 0V.

[0104] Next, the switch SW7 connects the switching terminal 300 to the output node NL1. Next, the switch SW6 is turned off and then the switch SW5 is turned on. This causes a current I1 to start flowing from the power supply voltage node Nv3 to the inductor L1 via the resistor R4. The voltage V of the inductor L1 L1 The time change of is ideally expressed by the following equation (6):

number

[0105] The analog signal to be generated by the signal generating circuit 30 may be calculated based on equation (6). In this case, when comparing equation (6) with equation (2), only the value of the time constant on the right side is different. Therefore, the voltage V L1 is the V when discharging the capacitor C1 in the signal generating circuit 10 according to the first embodiment. C1 Similarly, it decreases monotonically from voltage E at a rate according to the time constant.

[0106] During self-diagnosis, the A / D converter 34 detects the voltage V L1 The evaluation unit 362 converts the digital data DOUT3 and the analog signal (voltage V L1 ) and evaluates the digital data DOUT3. The evaluation unit 362 diagnoses the A / D converter 34 based on the evaluation result of the digital data DOUT3.

[0107] In this embodiment, too, an analog signal for diagnosing A / D converter 14 can be generated without using a D / A converter, and digital data from A / D converter 14 corresponding to the analog signal can be evaluated. This allows A / D converter 14 to be diagnosed with a simple configuration, and also reduces the cost of self-diagnosis system 3.

[0108] Note that a signal generation circuit using resistors and inductors as in this embodiment can also be applied to a differential A / D converter. For example, one of two input signals input to the A / D converter may be an analog signal generated by a circuit configured similarly to the signal generation circuit 30 of the third embodiment, and the other input signal may be a fixed analog signal. Alternatively, an input signal obtained by swapping these two analog signals may be input to the A / D converter. In this case, too, the A / D converter can be diagnosed by utilizing the fact that the difference between the two input signals changes depending on the time constant.

[0109] (supplement) Although the embodiments of the present disclosure have been described using specific terms, this description is merely an example to facilitate understanding and does not limit the scope of the present disclosure or the claims, and the scope of the present invention is defined by the claims. Furthermore, not only the embodiments but also embodiments, examples, and modifications not described herein are included in the scope of the present invention.

[0110] One or more elements of one embodiment can be combined with one or more elements of another embodiment. For example, when a differential A / D converter is used, one input signal may be generated by a signal generating circuit using a resistor and a capacitor, and the other input signal may be generated by a signal generating circuit using a resistor and an inductor.

[0111] (Addendum) One aspect of the technology disclosed in this specification can be understood as follows.

[0112] (Item 1) a signal generating circuit having a time constant and generating an analog signal that changes over time in accordance with the time constant; an A / D converter that generates digital data according to the analog signal; a processing circuit that evaluates the digital data based on the digital data and an analog signal to be generated by the signal generating circuit, the analog signal being calculated based on the time constant; Self-diagnosis system.

[0113] (Item 2) the signal generating circuit includes a resistor having one end connected to an output node of the signal generating circuit, and a capacitor provided between the output node and a ground node; The time constant is determined by the resistance value of the resistor and the capacitance value of the capacitor. Item 1. The self-diagnostic system according to item 1.

[0114] (Item 3) the signal generating circuit further includes a switch provided between the other end of the resistor and a power supply voltage node; the analog signal includes a voltage of the capacitor that is charged by power being supplied from the power supply voltage node through the resistor when the switch is on; Item 2. The self-diagnostic system according to item 2.

[0115] (Item 4) the signal generating circuit further includes a switch provided between the other end of the resistor and a ground node; the analog signal includes a voltage of the capacitor that is discharged when the switch is turned on while the capacitor is charged; Item 2. The self-diagnostic system according to item 2.

[0116] (Item 5) the signal generating circuit includes a resistor having one end connected to an output node of the signal generating circuit, and an inductor provided between the output node and a ground node; The time constant is determined by the resistance value of the resistor and the inductance of the inductor. Item 1. The self-diagnostic system according to item 1.

[0117] (Item 6) the signal generating circuit further includes a switch provided between the other end of the resistor and a power supply voltage node; the analog signal includes a voltage of the inductor generated by a current flowing from the power supply voltage node through the resistor to the inductor when the switch is on; Item 5. The self-diagnostic system according to item 5.

[0118] (Item 7) The time constant is determined according to the sampling frequency of the A / D converter and the resolution per bit of the A / D converter. 7. The self-diagnostic system according to any one of items 1 to 6.

[0119] (Item 8) the analog signal monotonically increases or decreases over time, The time constant is defined so that the change per unit sampling time of the digital data generated by the A / D converter is 1 bit or less. Item 7. The self-diagnostic system according to item 7.

[0120] (Item 9) the processing circuit evaluates the digital data generated by the A / D converter depending on whether the digital data generated by the A / D converter is within a range of digital data corresponding to the analog signal to be generated by the signal generating circuit. 9. The self-diagnostic system according to any one of items 1 to 8.

[0121] (Item 10) the processing circuit diagnoses the A / D converter based on the evaluation result of the digital data. 10. The self-diagnostic system according to any one of items 1 to 9.

[0122] (Item 11) further comprising a multiplexer to which the analog signal generated by the signal generating circuit and another analog signal are input; the A / D converter generates digital data according to the analog signal selected by the multiplexer; 11. The self-diagnostic system according to any one of items 1 to 10.

[0123] (Item 12) the A / D converter generates digital data corresponding to the difference between two input signals; at least one of the two input signals is an analog signal generated by the signal generating circuit; 12. The self-diagnostic system according to any one of items 1 to 11.

[0124] (Item 13) When the signal generating circuit is a first signal generating circuit, the time constant is a first time constant, and the analog signal is a first analog signal, the self-diagnostic system further includes a second signal generating circuit having a second time constant and generating a second analog signal that changes over time in accordance with the second time constant; one of the two input signals is the first analog signal; the other of the two input signals is the second analog signal; the first analog signal is a signal that monotonically increases over time, the second analog signal is a signal that monotonically decreases over time, the processing circuit evaluates the digital data based on digital data corresponding to a difference between the two input signals, a first analog signal to be generated by the first signal generating circuit calculated based on the first time constant, and a second analog signal to be generated by the second signal generating circuit calculated based on the second time constant. Item 13. The self-diagnostic system according to item 12.

[0125] (Item 14) the first signal generating circuit includes a first resistor having one end connected to a first output node of the first signal generating circuit, and a first capacitor provided between the first output node and a ground node; the second signal generating circuit includes a second resistor having one end connected to a second output node of the second signal generating circuit, and a second capacitor provided between the second output node and a ground node; the first analog signal includes a voltage of the first capacitor that is charged by power being supplied from a power supply voltage node through the first resistor; the second analog signal includes a voltage of the second capacitor when the second capacitor is discharged from a charged state; Item 14. The self-diagnostic system according to item 13. [Explanation of symbols]

[0126] 1, 2, 3 Self-diagnosis system, 10, 30 Signal generation circuit, 12, 32 Multiplexer, 14, 26, 34 A / D converter, 16, 28, 36 Processing circuit, 20 First signal generation circuit, 22 Second signal generation circuit, 24 First multiplexer, 25 Second multiplexer, 160, 280, 360 Control unit, 162, 282, 362 Evaluation unit, R1, R4 Resistor, R2 First resistor, R3 Second resistor, C1 Capacitor, C2 First capacitor, C3 Second capacitor, L1 Inductor, SW1 to SW7 Switches.

Claims

1. a signal generating circuit having a time constant and generating an analog signal that changes over time in accordance with the time constant; an A / D converter that generates digital data according to the analog signal; a processing circuit that evaluates the digital data based on the digital data and an analog signal to be generated by the signal generating circuit, the analog signal being calculated based on the time constant; Self-diagnosis system.

2. the signal generating circuit includes a resistor having one end connected to an output node of the signal generating circuit, and a capacitor provided between the output node and a ground node; The time constant is determined by the resistance value of the resistor and the capacitance value of the capacitor. The self-diagnostic system of claim 1 .

3. the signal generating circuit further includes a switch provided between the other end of the resistor and a power supply voltage node; the analog signal includes a voltage of the capacitor that is charged by power being supplied from the power supply voltage node through the resistor when the switch is on; The self-diagnostic system of claim 2 .

4. the signal generating circuit further includes a switch provided between the other end of the resistor and a ground node; the analog signal includes a voltage of the capacitor that is discharged when the switch is turned on while the capacitor is charged; The self-diagnostic system of claim 2 .

5. the signal generating circuit includes a resistor having one end connected to an output node of the signal generating circuit, and an inductor provided between the output node and a ground node; The time constant is determined by the resistance value of the resistor and the inductance of the inductor. The self-diagnostic system of claim 1 .

6. the signal generating circuit further includes a switch provided between the other end of the resistor and a power supply voltage node; the analog signal includes a voltage of the inductor generated by a current flowing from the power supply voltage node through the resistor to the inductor when the switch is on; The self-diagnostic system of claim 5.

7. The time constant is determined according to a sampling frequency of the A / D converter and a resolution per bit of the A / D converter. The self-diagnostic system of claim 1 .

8. the analog signal monotonically increases or decreases over time, The time constant is defined so that the change per unit sampling time of the digital data generated by the A / D converter is 1 bit or less. The self-diagnostic system of claim 7.

9. the processing circuit evaluates the digital data generated by the A / D converter depending on whether the digital data generated by the A / D converter is within a range of digital data corresponding to the analog signal to be generated by the signal generating circuit. The self-diagnostic system of claim 1 .

10. the processing circuit diagnoses the A / D converter based on the evaluation result of the digital data. The self-diagnostic system of claim 1 .

11. further comprising a multiplexer to which the analog signal generated by the signal generating circuit and another analog signal are input; the A / D converter generates digital data according to the analog signal selected by the multiplexer; The self-diagnostic system of claim 1 .

12. the A / D converter generates digital data corresponding to the difference between two input signals; at least one of the two input signals is an analog signal generated by the signal generating circuit; A self-diagnostic system according to any one of claims 1 to 11.

13. When the signal generating circuit is a first signal generating circuit, the time constant is a first time constant, and the analog signal is a first analog signal, the self-diagnostic system further includes a second signal generating circuit having a second time constant and generating a second analog signal that changes over time in accordance with the second time constant; one of the two input signals is the first analog signal; the other of the two input signals is the second analog signal; the first analog signal is a signal that monotonically increases over time, the second analog signal is a signal that monotonically decreases over time, the processing circuit evaluates the digital data based on digital data corresponding to a difference between the two input signals, a first analog signal to be generated by the first signal generating circuit calculated based on the first time constant, and a second analog signal to be generated by the second signal generating circuit calculated based on the second time constant. The self-diagnostic system of claim 12.

14. the first signal generating circuit includes a first resistor having one end connected to a first output node of the first signal generating circuit, and a first capacitor provided between the first output node and a ground node; the second signal generating circuit includes a second resistor having one end connected to a second output node of the second signal generating circuit, and a second capacitor provided between the second output node and a ground node; the first analog signal includes a voltage of the first capacitor that is charged by power being supplied from a power supply voltage node through the first resistor; the second analog signal includes a voltage of the second capacitor when the second capacitor is discharged from a charged state; 14. The self-diagnostic system of claim 13.

Citation Information

Patent Citations

  • A / d conversion circuit

    JP2017208667A