Semiconductor device

Abstract

To provide a semiconductor device in which both a securing of a bonding strength between members by the bonding material and a suppression of an occurrence of cracks in the bonding material can be achieved, and reliability is improved.SOLUTION: A semiconductor device has a structure in which a semiconductor element 3 as a first member and a second member adjacent thereto are bonded by a bonding material 2. The bonding material 2 includes a stress relaxation layer 22 composed of a plurality of metal wires 221 and a sintered bonding layer 23 for bonding the semiconductor element 3 and the second member to each other. The stress relaxation layer 22 has a predetermined length or more in a thickness direction D1 of the semiconductor device.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device having a structure in which a semiconductor element is bonded to another member by a bonding material having a metal wire. [Background technology]

[0002] Conventionally, semiconductor devices have been known that have a structure in which a power semiconductor element such as a power MOSFET is bonded to another component such as a heat spreader via a bonding material. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. Examples of bonding materials used in this type of semiconductor device include the one described in Patent Document 1. The bonding material described in Patent Document 1 is a multilayer composite film in which a solid silver foil is disposed between two layers of sintered silver nanoparticles. The sintered silver nanoparticles are sintered by applying pressure and heat, thereby bonding the different components together. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 6639394 Summary of the Invention [Problem to be solved by the invention]

[0004] The bonding material described in Patent Document 1 forms a sintered bonding layer that bonds two components by sintering silver nanoparticles. This bonding material has high thermal conductivity and is therefore thought to be suitable for power modules that use power semiconductor elements in terms of improving heat dissipation.

[0005] However, the sintered bonding layer of the bonding material has a high elastic modulus, and therefore, if the difference in linear expansion coefficient between the bonding members is greater than a predetermined value, the internal stress increases, causing cracks.

[0006] Other prior art includes, for example, a bonding material made of copper nanowires, such as that described in German Patent Application Publication No. 102020107515. Like the above-mentioned bonding materials, bonding materials made of copper nanowires bond different components together by applying pressure and heat. However, as a result of investigations by the present inventors, it was found that even when two components are bonded using a bonding material made of copper nanowires, the copper nanowires of the bonding material become in a state similar to that of a sintered body, resulting in cracks during the manufacturing process of a semiconductor device. This is thought to be due to the fact that copper has an even higher elastic modulus than silver.

[0007] In view of the above, the present disclosure aims to provide a semiconductor device having a structure in which a semiconductor element and other components are bonded with a bonding material, which can ensure bonding between the components with the bonding material while suppressing the occurrence of cracks in the bonding material, thereby improving reliability. [Means for solving the problem]

[0008] According to one aspect of the present disclosure, a semiconductor device includes: A semiconductor element (3), A semiconductor element is a first member, and a second member (1, 4) connected to the semiconductor element; a bonding material (2) that bonds the semiconductor element and the second member, The bonding material has a stress relaxation layer (22) made up of a plurality of metal wires (221) and a sintered bonding layer (23) to be bonded to the semiconductor element or the second member, The metal wire has a length in the thickness direction (D1) that is equal to or greater than a predetermined length, the direction connecting the semiconductor element and the second member being the thickness direction.

[0009] This semiconductor device has a structure in which a semiconductor element of a first member and a second member are bonded with a bonding material, and the bonding material has a stress relief layer composed of multiple metal wires and a sintered bonding layer bonded to the semiconductor element or the second member. The bonding material has a sintered bonding layer that ensures bonding between the semiconductor element and the second member, and a stress relief layer composed of multiple metal wires with a length in the thickness direction of at least a predetermined value that relieves stress caused by differences in linear expansion coefficients between the two members. Therefore, the semiconductor device has a structure that ensures bonding between the semiconductor element and the second member and suppresses cracks caused by differences in linear expansion coefficients between these members, resulting in an improved reliability.

[0010] The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and the specific components described in the embodiments described below. [Brief explanation of the drawings]

[0011] [Figure 1] 1 is a cross-sectional view showing an example of a semiconductor device according to an embodiment. [Figure 2A] FIG. 3 is a cross-sectional view showing the configuration of a bonding material before bonding. [Figure 2B] FIG. 10 is a diagram showing the results of observing a cross section of a bonding material before bonding with a scanning electron microscope. [Figure 3] FIG. 4 is a cross-sectional view showing the configuration of the bonding material after bonding. [Figure 4] FIG. 10 is a cross-sectional view showing another example of the configuration of the bonding material in a state before bonding. [Figure 5] FIG. 10 is a cross-sectional view showing another example of the configuration of the bonding material, showing the state after bonding. [Figure 6] FIG. 10 is a cross-sectional view showing another example of a semiconductor device. [Figure 7] FIG. 2 is a diagram showing the results of observation of region VII in FIG. 1 using a scanning electron microscope. [Figure 8] FIG. 2 is a diagram showing the first joint structure and the evaluation results of the joint properties of an example and a comparative example. [Figure 9] FIG. 10 is an explanatory diagram for evaluation of bondability. [Figure 10] FIG. 10 is a diagram showing a second joint structure and the evaluation results of the joint properties of an example and a comparative example. [Figure 11] 1 is a diagram showing the results of observing a cross section of a semiconductor element on which metal wires are formed using a scanning electron microscope. [Figure 12] FIG. 10 is a diagram showing the results of a simulation of the relationship between the length of the metal wire in the first structure corresponding to the example and the fracture mechanics parameter (J integral) related to crack propagation in the bonded portion of the sintered bonded layer. [Figure 13] FIG. 10 is a diagram showing the results of a simulation of the relationship between the length of the metal wire of the first structure corresponding to the example and the stress (maximum principal stress) involved in the initiation of cracking in the bonded portion of the sintered bonded layer. [Figure 14] FIG. 10 is a diagram showing the results of a simulation of the relationship between the thickness of the sintered bonding layer of the second structure corresponding to the example and the stress (maximum principal stress) involved in the initiation of cracking in the bonded portion of the sintered bonding layer. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. In the following embodiments, identical or equivalent parts will be denoted by the same reference numerals.

[0013] (First embodiment) A semiconductor device 100 using the bonding material 2 according to the first embodiment will be described.

[0014] [Semiconductor Device] 1 , the semiconductor device 100 includes a first heat spreader 1, a bonding material 2, a semiconductor element 3, a metal block 4, solder 5, a second heat spreader 6, and a sealing resin 7. The semiconductor device 100 has the first heat spreader 1, the semiconductor element 3, the metal block 4, and the second heat spreader 6 stacked in this order, and has a double-sided heat dissipation structure in which the surfaces of the heat spreaders 1 and 6 opposite the semiconductor element 3 are exposed from the sealing resin 7. In the semiconductor device 100, the semiconductor element 3 and an adjacent member are bonded together by the bonding material 2, and the metal block 4 and the second heat spreader 6 are bonded together by the solder 5.

[0015] The first heat spreader 1 is part of a lead frame made of a conductive material such as a metal such as Cu (copper) or Fe (iron) or an alloy thereof, and is formed by press punching or the like. The first heat spreader 1 is a heat dissipation member that dissipates heat from the semiconductor element 3 during operation to the outside. One surface of the first heat spreader 1 is bonded to the semiconductor element 3 via a bonding material 2, and the other surface opposite the one surface is exposed from the sealing resin 7. The first heat spreader 1 corresponds to a second member bonded to the first member via the bonding material 2, with the semiconductor element 3 being the first member. For example, the first heat spreader 1 has terminals (not shown) that extend beyond the side surfaces of the sealing resin 7, allowing electrical connection to the semiconductor element 3 via the terminals. For example, the first heat spreader 1 has a coating layer 11 formed on the surface that contacts the bonding material 2. The covering layer 11 is made of a material that can be bonded to the material of the metal wires 221, which will be described later, such as Cu, Ag (silver), or a Cu alloy, and serves to further stabilize the bond with the bonding material 2. Note that the first heat spreader 1 does not need to have the covering layer 11 when made of, for example, Cu or a Cu alloy.

[0016] 2A and 2B, the bonding material 2 is composed of a metal bulk layer 21 and stress relaxation layers 22 formed on both the front and back surfaces of the metal bulk layer 21 before bonding. The bonding material 2 is placed, for example, between a semiconductor element 3 and another member, and in this state, the two members are bonded together by applying pressure in the thickness direction and heating at a temperature below the melting point. At this time, a portion of the stress relaxation layer 22, including the tip on the side opposite to the metal bulk layer 21, is sintered with the abutting member to form a sintered bonding layer 23, as shown in FIG. 3, for example.

[0017] 2A shows the bonding material 2 before bonding, and the sintered bonding layer 23 has not yet been formed. For convenience of explanation, the direction along the thickness of the members bonded by the bonding material 2 is referred to as the "thickness direction D1," as indicated by the arrow in FIG. 2A. The thickness direction D1 corresponds to, for example, the direction along the thickness of any one of the first heat spreader 1, the semiconductor element 3, the metal block 4, and the semiconductor device 100.

[0018] The metal bulk layer 21 is, for example, a layer that serves as a base for the stress relaxation layer 22. The metal bulk layer 21 is, for example, a metal foil made of Cu, Al (aluminum), FeNi (iron-nickel) alloy, or a Cu alloy such as CuMo (copper molybdenum) or CuW (copper tungsten). The metal bulk layer 21 may be made of any material that can serve as a base when forming the metal wire 221 (described later) by electroplating, and is not limited to the above-mentioned material examples. However, a material with a small linear expansion coefficient is more preferable. For example, the volume fraction of the metal bulk layer 21 in the entire bonding material 2 is set to 68% or less from the viewpoint of suppressing bonding failure of the bonding material 2. This will be described in detail later.

[0019] The stress relaxation layer 22 is composed of a plurality of metal wires 221. The metal wires 221 are made of any metal material that can be formed by electroplating, such as Cu, and are columnar wire bodies extending along the thickness direction D1. The metal wires 221 are formed, for example, by forming a seed layer and a patterned resist layer that partially covers the seed layer, and then growing the metal wires 221 by electroplating on the portions of the seed layer that are exposed from the resist layer.

[0020] When the metal wire 221 is heated and pressurized, the end of the metal wire 221 on the substrate side becomes the root, and the opposite end becomes the tip, as shown in FIG. 3 , where the tip is bonded to another member to form the sintered bonding layer 23. After bonding the semiconductor element 3 and another member, the root side of the metal wire 221 remains wire-shaped, alleviating stress caused by the difference in linear expansion coefficients between the two members being bonded. Before bonding, the metal wire 221 is aligned along the thickness direction D1, but after bonding by heat and pressure, a portion of the tip side becomes inclined at a predetermined angle or more relative to the thickness direction D1. For example, the root side of the metal wire 221 is vertically oriented, approximately parallel to the thickness direction D1, while the tip side where the sintered bonding layer 23 is formed is bent, inclined at a predetermined angle or more relative to the thickness direction D1. To alleviate the stress and prevent cracks from occurring in the bonding material 2, the length of the metal wire 221 in the thickness direction D1 after bonding is 2.0 μm or more. This will be described in detail later. The metal wire 221 is, for example, of a length on the order of micrometers, but is a wire formed by a method that allows it to be manufactured in the range of several nanometers, and can also be regarded as a nanowire.

[0021] The sintered bonding layer 23 is formed by sintering a portion of the tip of the metal wire 221 under pressure and heat. The sintered bonding layer 23 bonds the tip of the metal wire 221 to a member in contact therewith.

[0022] The bonding material 2 may not have a metal bulk layer 21, as shown in FIG. 4, for example. In this case, the bonding material 2 is formed directly on the first heat spreader 1, the semiconductor element 3, or the metal block 4 by electroplating, for example. Before bonding, the bonding material 2 has only a stress relief layer 22 composed of a plurality of metal wires 221. Then, as shown in FIG. 5, for example, when the bonding material 2 is pressurized and heated, parts of the tip ends of the plurality of metal wires 221 form a sintered bonding layer 23, while the base sides of the metal wires 221 remain in their wire-like form. As a result, even if the bonding material 2 does not have a metal bulk layer 21, the parts of the plurality of metal wires 221 remain intact, thereby bonding two components and improving reliability.

[0023] In addition, in a configuration without a metal bulk layer 21, the bonding material 2 is formed, for example, on only one of the two components to be bonded. Also, while FIGS. 4 and 5 show a representative example in which multiple metal wires 221 are formed on the first heat spreader 1 and the first heat spreader 1 is bonded to the semiconductor element 3, the present invention is not limited to this. For example, the multiple metal wires 221 may be formed on the semiconductor element 3 side, or in the case of bonding the semiconductor element 3 to a metal block 4, they may be formed on the metal block 4 side. Alternatively, the metal wires 221 may be formed on both of the two components to be bonded. In this way, when the bonding material 2 is configured without a metal bulk layer 21, the component on which the multiple metal wires 221 are formed may be changed as appropriate.

[0024] The semiconductor element 3 is, for example, plate-shaped with a front surface 3a and a back surface 3b and is primarily made of semiconductor materials such as Si (silicon), SiC (silicon carbide), GaN (gallium nitride), GaO (gallium oxide), and diamond. The semiconductor element 3 is, for example, a power semiconductor element such as an IGBT or a power MOSFET, and is manufactured using a known semiconductor process. IGBT is an abbreviation for Insulated Gate Bipolar Transistor. The semiconductor element 3 has, for example, a gate electrode and an emitter electrode or a source electrode (not shown) formed on the front surface 3a, and a collector electrode or a drain electrode (not shown) formed on the back surface 3b. The front surface 3a of the semiconductor element 3 is connected to the metal block 4 via the bonding material 2, and the back surface 3b is connected to the first heat spreader 1 via the bonding material 2. The semiconductor element 3 has, for example, a coating layer 31 formed on the front surface 3a and the back surface 3b. The coating layer 31 is, for example, made of the same material as the coating layer 11, and further stabilizes the bond with the bonding material 2.

[0025] The metal block 4 is made of a conductive material, such as a metal such as Cu or its alloy, and is a metal member disposed between the semiconductor element 3 and the second heat spreader 6. It may also be referred to as a "terminal." The metal block 4 electrically connects the semiconductor element 3 and the second heat spreader 6 while maintaining a predetermined gap therebetween, thereby preventing wires (not shown) connected to the semiconductor element 3 from contacting the second heat spreader 6. Like the first heat spreader 1, the metal block 4 corresponds to a second member bonded to the semiconductor element 3 via the bonding material 2, with the semiconductor element 3 being the first member. The metal block 4 has a smaller planar size than the semiconductor element 3, for example, when viewed normal to the surface 3a. The metal block 4 is disposed so that the entire area of ​​the metal block 4 is contained within the surface 3a of the semiconductor element 3. The metal block 4 has a coating layer 41 formed on the surface facing the semiconductor element 3. The coating layer 41 is made of, for example, the same material as the coating layers 11 and 31, and further stabilizes the bond with the bonding material 2. It should be noted that the metal block 4 does not need to have the coating layer 41 if it is made of, for example, Cu or a Cu alloy.

[0026] The solder 5 is made of, for example, a bonding material whose main component is Sn (tin), and is applied to the metal block 4 or the second heat spreader 6 by a known application process. Note that the solder 5 may also be disposed by mounting a foil-shaped solder on the metal block 4 or the second heat spreader 6, for example.

[0027] The second heat spreader 6 is, for example, part of a lead frame made of the same conductive material as the first heat spreader 1, and is formed by press punching or the like. The second heat spreader 6 is disposed on the opposite side of the first heat spreader 1, with the semiconductor element 3 and the metal block 4 sandwiched between them. One surface of the second heat spreader 6 is joined to the metal block 4 via solder 5, and the other surface opposite the first surface is exposed from the sealing resin 7. For example, the portion of the second heat spreader 6 that is solder-joined to the metal block 4 serves as a heat sink, and the second heat spreader 6 is configured to have terminals (not shown).

[0028] The sealing resin 7 is made of a thermosetting resin material such as epoxy resin, and is formed by any resin molding method such as transfer molding using a mold (not shown) or compression molding.

[0029] The above is the basic configuration of the semiconductor device 100 when it is configured as a double-sided heat dissipation module. The semiconductor device 100 is not limited to the structure shown in FIG. 1 , as long as it has a structure in which the semiconductor element 3 and other components are bonded by the bonding material 2. For example, as shown in FIG. 6 , the semiconductor device 100 may be a single-sided heat dissipation module in which the heat from the semiconductor element 3 is dissipated to the outside from the first heat spreader 1 via the bonding material 2, without including the metal block 4, solder 5, and second heat spreader 6. Furthermore, in the semiconductor device 100, the first heat spreader 1 may be, for example, an insulating heat dissipation circuit board such as AMB or DBC, or a Cu heat sink, and the type of component bonded to the semiconductor element 3 may be changed as appropriate. AMB and DBC are abbreviations for Active Metal Brazed and Direct Bonded Copper, respectively.

[0030] [Stress relaxation in bonding materials] Next, the compatibility of stress relaxation and bonding in the bonding material 2 will be described.

[0031] First, we will explain conventional bonding using a bonding material containing multiple metal nanowires. The metal nanowires referred to here are, for example, wires made of a metal material and formed with lengths ranging from several nanometers to several tens of micrometers. For example, conventional bonding is performed by using a bonding material with nanowires formed on both sides of a metal foil, and applying pressure and heat while the nanowires of the bonding material are in contact with each of the two members to be bonded. Then, conventional bonding involves performing heat pressing under conditions that change the nanowires of the bonding material to a state where no wire-like portions remain, forming a high-density sintered bonding layer to bond the two members.

[0032] According to the inventors' investigations, conventional bonding has been found to have a high elastic modulus in the sintered bonding layer, resulting in increased internal stress and cracks in the bonding material when the difference in linear expansion coefficient between the two components being bonded exceeds a certain level. This was also true for bonding materials using sinterable nanoparticles. Furthermore, when using a bonding material with Cu foil as the metal bulk layer and Cu nanowires as the metal wires, the elastic modulus is even higher than when using Ag, making the bonding material more susceptible to cracks. When bonding a heat spreader and a semiconductor element using a bonding material containing Cu foil and Cu nanowires, these components are bonded by a highly elastic Cu sintered layer, but it was found that cracks in the bonding material occur and propagate during the semiconductor device manufacturing process. Through extensive research by the inventors, it was found that even when using a bonding material 2 having multiple metal wires 221, intentionally leaving the wire-like portions after bonding can suppress crack propagation while bonding two components.

[0033] Specifically, as shown in Fig. 7, the bonding material 2 has a stress relaxation layer 22 in which the metal wires 221 remain in a wire-like form after bonding, and a sintered bonding layer 23 that connects the stress relaxation layer 22 to the member in contact with it, thereby enabling both stress relaxation and secure bonding. Fig. 7 shows the results of scanning electron microscope (SEM) observation of a cross section of a first heat spreader 1 made of Cu and a semiconductor element 3 made of SiC after bonding with the bonding material 2 having a metal bulk layer 21 and metal wires 221 made of Cu. The bonding material 2 relieves internal stress and suppresses cracking by making the length of the stress relaxation layer 22, i.e., the metal wires 221, in the thickness direction D1 greater than or equal to a predetermined length.

[0034] For ease of explanation, the length of the metal wire 221 remaining in wire form after bonding along the thickness direction D1 will be referred to as the "wire length L" as shown in Figure 7. The wire length L corresponds to the length of the stress relaxation layer 22 in the thickness direction D1, i.e., the thickness. Furthermore, when the bonding material 2 is configured such that the metal wire 221 is formed on both the front and back surfaces of the metal bulk layer 21, the wire length L refers to the length of the metal wire 221 on the front or back surface, and is not the sum of these lengths.

[0035] Next, we will explain the results of preparing examples and comparative examples of bonding structures in which the first heat spreader 1 and the semiconductor element 3 are bonded with the bonding material 2, and evaluating the state of crack occurrence in the bonding material 2 of these samples.

[0036] 8, Comparative Examples 1 to 3 and Examples 1 and 2 have a structure in which a first heat spreader 1 made of Cu and a semiconductor element 3 made of SiC are bonded by a bonding material 2 having a metal bulk layer 21 and metal wires 221 also made of Cu. Comparative Examples 1 to 3 and Examples 1 and 2 were each manufactured by hot pressing, and all had a sintered bonding layer 23 formed therein, but differed in the wire length L or the volume fraction of the metal bulk layer 21 in the bonding material 2.

[0037] Hereinafter, for convenience of explanation, the volume fraction of the metal bulk layer 21 in the bonding material 2 will be referred to as the "bulk volume fraction." The wire length L and bulk volume fraction in the comparative examples and examples can be confirmed and calculated by SEM observation of the cross section of the sample. The wire length L of the bonding material 2 can be adjusted, for example, by changing the temperature and / or pressure of the heat press. The wire length L can also be adjusted, for example, by changing the time of the heat press. The bulk volume fraction can be adjusted, for example, by changing the thickness of the metal bulk layer 21 before bonding and the length of the metal wire 221 in the thickness direction D1.

[0038] The state of cracks in the bonding material 2 after bonding was evaluated by ultrasonic testing (SAT). Specifically, for example, the bonded sample was immersed in water, and ultrasonic waves were transmitted from a probe toward the first heat spreader 1. The probe scanned while receiving the reflected waves. The received reflected waves were converted into an image, resulting in a SAT image, such as that shown in FIG. 9. In the SAT image shown in FIG. 9, for example, gaps, i.e., crack-free areas at the interface between the bonding material 2 and the semiconductor element 3, are defined as normal areas, and cracked areas are defined as abnormal areas. The normal areas are white and the abnormal areas are black. In the crack evaluation shown in FIGS. 8 and 10, if the area ratio of abnormal areas, i.e., cracked areas, in the bonding area in the SAT image was 5% or less, the result was evaluated as "good," and if not, the result was evaluated as "bad." Hereinafter, for ease of explanation, the area ratio of cracked areas in the bonding area in the SAT image may be referred to as the "bonding failure area ratio." That is, in the crack evaluations in Figures 8 and 10, "◯" means that the stress was sufficiently relaxed, and "×" means that the stress was not sufficiently relaxed.

[0039] In Comparative Examples 1 to 3, the heat pressing was performed at a temperature of 170°C and a pressure of 20 MPa. In Comparative Example 1, the maximum wire length L was 1.2 μm and the bulk volume fraction was 53.2%. In Comparative Example 2, the maximum wire length L was 1.2 μm and the bulk volume fraction was 69.4%. In Comparative Example 3, the maximum wire length L was 2.0 μm and the bulk volume fraction was 69.4%. In all of Comparative Examples 1 to 3, the bonding failure area ratio exceeded 5%, the area ratio of crack occurrence sites in the bonding material 2 was large, and stress relaxation was insufficient.

[0040] On the other hand, in Examples 1 and 2, the heat pressing was performed at a temperature of 170°C and a pressure of 10 MPa. In Example 1, the minimum wire length L was 2.0 μm and the bulk volume fraction was 68.0%. In Example 2, the minimum wire length L was 2.5 μm and the bulk volume fraction was 64.1%. In both Examples 1 and 2, the bond failure area rate was 5% or less, the area ratio of crack occurrence sites was small, and stress relaxation was sufficient. The above results suggest that when the bonding material 2 has a configuration including a metal bulk layer 21 and a stress relaxation layer 22, ensuring bonding and suppressing cracks in the bonding material 2 can be achieved by setting the wire length L to at least 2.0 μm and the bulk volume fraction to at most 68%. Note that there is no particular upper limit for the wire length L from the viewpoint of suppressing crack propagation, but from the viewpoint of reducing manufacturing costs, it is preferable that it be 20 μm or less. Furthermore, as will be described later, from the viewpoint of suppressing initial crack occurrence, the wire length L is preferably 8 μm or less.

[0041] Next, a case where the bonding material 2 does not have the metal bulk layer 21 will be described.

[0042] Comparative Example 4 and Examples 3 and 4 have a bonding structure in which a first heat spreader 1 made of Cu and a semiconductor element 3 made of SiC are bonded by a bonding material 2 made of a metal wire 221, and do not have a metal bulk layer 21, as shown in Figure 10, for example.

[0043] Comparative Example 4 and Example 3 are formed by forming a plurality of metal wires 221 on the back surface 3b of the semiconductor element 3 by electroplating, and then pressurizing and heating the first heat spreader 1 and the semiconductor element 3. Example 4 is formed by forming a plurality of metal wires 221 on the first heat spreader 1 by electroplating, and then pressurizing and heating the first heat spreader 1 and the semiconductor element 3. Comparative Example 4 and Examples 3 and 4 have bonding structures in which the bonding material 2 after bonding is made of a stress relaxation layer 22 and a sintered bonding layer 23, and the sintered bonding layer 23 is formed at the tip portion of the metal wire 221, but the wire lengths L are different.

[0044] In Comparative Example 4, the heat pressing was performed at a temperature of 170°C and a pressure of 20 MPa. In Comparative Example 4, the maximum wire length L was 1.2 µm, the area ratio of poor bonding exceeded 5%, the area ratio of cracked portions in the bonding material 2 was large, and stress relaxation was insufficient.

[0045] On the other hand, in Examples 3 and 4, the heat pressing was performed at a temperature of 170°C and a pressure of 10 MPa. In Examples 3 and 4, the wire lengths L were a minimum of 2.0 μm and 3.2 μm, respectively, and in both cases the bond failure area rate was 5% or less, the area ratio of crack occurrence sites was small, and stress relaxation was sufficient. These results suggest that even if the bonding material 2 does not have a metal bulk layer 21, as long as a sintered bonding layer 23 is formed after bonding and the wire length of the stress relaxation layer 22 is 2.0 μm or more, it is possible to achieve both secure bonding and suppression of crack propagation.

[0046] In addition, when the bonding material 2 does not have a metal bulk layer 21, it is preferable to form a metal wire 221 on the semiconductor element 3, as shown in FIG. 11, from the viewpoint of further improving the stress relaxation effect. This positions the base of the metal wire 221 at the interface between the first heat spreader 1 and the semiconductor element 3 where the difference in linear expansion coefficient is greatest, resulting in a bonding structure that is more likely to relax stress. In this way, when bonding the semiconductor element 3 and another member with the bonding material 2 made of the metal wire 221, it is preferable to form the metal wire 221 on the side of the semiconductor element 3 and another member where the difference in linear expansion coefficient is greater. Note that FIG. 11 shows the results of SEM observation of a cross section of a sample in which the metal wire 221 is formed on the semiconductor element 3 made mainly of SiC, before bonding to another member.

[0047] Although the above description concerns Examples 1 to 4 in which the metal wire 221 is a Cu nanowire, it is believed that a similar stress relaxation effect can be obtained even when the metal wire 221 is made of another metal material. That is, by having the stress relaxation layer 22 with at least a predetermined wire length L and the sintered bonding layer 23 after bonding, the bonding can be ensured while suppressing cracks. This applies not only to a structure in which the first heat spreader 1 and the semiconductor element 3 are bonded with the bonding material 2, but also to a structure in which the semiconductor element 3 and another member, such as a metal block 4, are bonded with the bonding material 2. The conditions for the heat pressing when bonding the first heat spreader 1 and the semiconductor element 3 with the bonding material 2 are not limited to those described in Examples 1 to 4 above, but can be changed as appropriate depending on the length of the metal wire 221 in the thickness direction D1 before bonding, the constituent materials, and the like.

[0048] Next, we will explain the relationship between the wire length L of the metal wire 221 and the stress generated at the joint in the structure corresponding to Examples 1 and 2, i.e., the first structure. The stress here refers to the magnitude of the fracture mechanics parameter (J integral) related to whether a crack will propagate, and the maximum principal stress related to whether a crack will first occur. Below, we will explain the relationship between stress and wire length L from the perspective of these two types of stress.

[0049] The first structure here refers to a structure in which a first heat spreader 1 made of Cu and a semiconductor element 3 made of SiC are bonded together by a bonding material 2 in which metal wires 221 made of Cu are formed on both sides of a metal bulk layer 21 made of Cu. Furthermore, unless otherwise specified, "thickness" in the following description refers to the thickness in the thickness direction D1.

[0050] Figure 12 shows the results of a simulation analysis of the fracture mechanics parameter (J integral) occurring at the tip of a microcrack already occurring in the sintered bonding layer 23 when the thicknesses of the sintered bonding layer 23 and the metal bulk layer 21 are fixed and the wire length L is changed in the first structure. The J integral is a parameter for evaluating the flow of energy relative to the crack propagation and is the energy release rate at the tip of the crack. The simulation can be performed, for example, using numerical analysis software based on the finite element method. For the analysis, a model was used in which a horizontal microcrack with a length of 20 μm was introduced as a microcrack, originating from the end of the sintered bonding layer and extending toward the inside of the bonding layer, at a position 0.1 μm vertically downward from the interface between the SiC chip and the sintered bonding layer. Figure 12 also shows the results of a simulation analysis when the thickness of the sintered bonding layer 23 is fixed at 1 μm and the thickness of the metal bulk layer 21 is fixed at 5 μm, and the wire length L of the metal wire 221 is changed.

[0051] It is known that a small magnitude of the J integral reduces the crack growth rate. According to the analysis results in Fig. 12, as the wire length L of the metal wire 221 increases, the magnitude of the J integral at the crack tip decreases. From the perspective of whether a microcrack that has once occurred further propagates, this analysis result is consistent with the experimental result shown in Fig. 8, in which the area rate of poor bonding was smaller in samples with a long wire length L of the metal wire 221.

[0052] FIG. 13 shows the results of a simulation analysis of the maximum principal stress generated in the sintered bonding layer 23 when the thickness of the sintered bonding layer 23 and the thickness of the metal bulk layer 21 in the first structure were fixed at 1 μm and 5 μm, respectively, and the wire length L of the metal wire 221 was varied. The simulation can be performed, for example, using numerical analysis software based on the finite element method. For example, the stress was approximately constant at 136 to 138 MPa when the wire length L of the metal wire 221 was 1.23 μm, 1.48 μm, and 1.50 μm. However, it was 139 MPa when the wire length L was 2.18 μm, and it increased further as the wire length L increased. For example, the stress was 149 MPa, 159 MPa, 168 MPa, 170 MPa, 171 MPa, and 172 MPa when the wire length L was 4.04 μm, 6.05 μm, 8.16 μm, 8.96 μm, 9.20 μm, and 9.80 μm, respectively.

[0053] Furthermore, for a structure (hereinafter referred to as the "Ag sintered structure") in which the bonding material 2 in the first structure was changed to a sintered silver material and the thickness of the bonding layer made of the sintered silver material was 22 μm, the maximum principal stress occurring in the bonding portion of the sintered layer was calculated by simulation. In FIG. 13, the calculated stress value of the Ag sintered structure is indicated by a dashed line. As a result of the above calculation, the stress in the Ag sintered structure was 162 MPa. The Ag sintered structure corresponds to a conventional sintered bonding structure that does not use the metal wire 221.

[0054] According to the above simulation results, it was found that in the first structure, if the wire length L of the metal wire 221 is at least 8 μm or less, the maximum principal stress in the bonding portion of the sintered bonding layer 23 can be suppressed to be equal to or less than that of the Ag sintered structure. Therefore, from the viewpoint of suppressing the occurrence of the first crack in the bonding material 2, it is considered desirable that the wire length L of the metal wire 221, i.e., the length of the stress relaxation layer 22, be at least 8 μm or less. Note that this value of 8 μm was calculated as the wire length L at which the stress of the Ag sintered structure is 162 MPa or less from the mathematical formula of the approximation curve obtained based on the data shown in FIG. 13.

[0055] Next, the relationship between the thickness of the sintered bonding layer 23 and the maximum principal stress occurring in the bonding portion in the structure corresponding to Example 3, that is, the second structure, will be described.

[0056] The second structure here refers to a structure in which a first heat spreader 1 made of Cu and a semiconductor element 3 made of SiC on which a metal wire 221 made of Cu is formed are bonded together using the metal wire 221 as a bonding material 2.

[0057] In the second structure, the wire length L of the metal wire 221 was set to 2 μm or more and 8 μm or less, and the maximum principal stress generated in the sintered bonding layer 23 was investigated by simulation when the thickness of the sintered bonding layer 23 was changed. The results shown in Fig. 14 were obtained. Although there was slight variation in the maximum principal stress, it tended to increase almost linearly with increasing thickness within the thickness range of sintered bonding layer 23 of 1.23 μm to 1.50 μm. For example, the maximum principal stress was 68 MPa, 96 MPa, 125 MPa, 150 MPa, 158 MPa, and 162 MPa when the thickness of the sintered bonding layer 23 was 1.87 μm, 4.05 μm, 6.04 μm, 8.10 μm, 9.06 μm, and 9.98 μm, respectively.

[0058] According to the above simulation results, it was found that in the second structure, if the thickness of the sintered bonding layer 23 is at least 10 μm or less, the maximum principal stress in the bonding portion of the sintered bonding layer 23 can be suppressed to be equal to or less than that of the Ag sintered structure. Therefore, from the viewpoint of suppressing the occurrence of initial cracks in the bonding material 2, it is considered desirable that the thickness of the sintered bonding layer 23 be at least 10 μm or less. Note that this value of 10 μm was calculated as the thickness of the sintered bonding layer 23 that results in a stress of 162 MPa or less of the Ag sintered structure, using the mathematical formula for the approximation curve obtained based on the data shown in FIG. 14.

[0059] According to this embodiment, a semiconductor device 100 is obtained in which a semiconductor element 3 serving as a first member and a second member are bonded together with a bonding material 2. The bonding material 2 includes a stress relief layer 22 composed of a plurality of metal wires 221 and a sintered bonding layer 23 bonded to the semiconductor element 3 or the second member. The bonding material 2 is structured such that the sintered bonding layer 23 ensures bonding between the semiconductor element 3 and the second member, while the wire length L of the metal wires 221 after bonding is greater than or equal to a predetermined value, thereby alleviating stress caused by differences in the linear expansion coefficients between the two members. Therefore, the semiconductor device 100 ensures bonding between the semiconductor element 3 and the second member while suppressing crack propagation caused by differences in the linear expansion coefficients of these members, improving reliability. The semiconductor device 100 also has the following features.

[0060] (1) In the semiconductor device 100, a part of the metal wires 221 of the bonding material 2 is oriented along the thickness direction D1, and another part of the metal wires 221 is oriented at an angle equal to or greater than a predetermined angle relative to the thickness direction D1.

[0061] (2) In the semiconductor device 100, the wire length L in the bonding material 2 after bonding is 2.0 μm or more.

[0062] (3) In the semiconductor device 100, the length of the stress relaxation layer 22 in the thickness direction D1 is 8 μm or less. Also, in the semiconductor device 100, the thickness of the sintered bonding layer 23 in the same direction is 10 μm or less. This reduces the stress generated in the bonding material 2 compared to a conventional Ag sintered structure using sintered silver, further improving the bonding reliability.

[0063] (4) In the semiconductor device 100, the bonding material 2 has a metal bulk layer 21 and the bulk volume fraction is 68% or less.

[0064] (5) In the semiconductor device 100, the metal wires 221 of the bonding material 2 are Cu nanowires. This reduces material costs compared to when the metal wires 221 are made of other sinterable materials such as Ag.

[0065] (6) In the semiconductor device 100, the metal bulk layer 21 is made of any one of Cu, Al, and a Cu alloy. This allows the metal wire 221 to be formed by electroplating using the metal bulk layer 21 as a base, thereby reducing the manufacturing cost of the bonding material 2 and, ultimately, the manufacturing cost of the semiconductor device 100.

[0066] (7) In the semiconductor device 100, the semiconductor element 3 and the second member have coating layers 11, 31, 41 made of Cu, Ag, or a Cu alloy, and the coating layers 11, 31, 41 are bonded to the bonding material 2. This allows the sintered bonding layer 23 to be more stably formed at the interface between the metal wire 221 of the bonding material 2 and the semiconductor element 3 or the second member, improving bonding strength.

[0067] (Other embodiments) Although the present disclosure has been described with reference to the embodiments, it is understood that the present disclosure is not limited to the embodiments or structures. The present disclosure also encompasses various modifications and modifications within the scope of equivalents. In addition, various combinations and forms, as well as other combinations and forms including only one element, more than one, or less than one, are also within the scope and spirit of the present disclosure.

[0068] It goes without saying that in each of the above embodiments, the elements constituting the embodiments are not necessarily essential unless they are specifically stated as essential or are clearly considered essential in principle. Furthermore, in each of the above embodiments, when numerical values ​​such as the number, values, amounts, and ranges of the components of the embodiments are mentioned, they are not limited to the specific numbers unless they are specifically stated as essential or are clearly limited to a specific number in principle. Furthermore, in each of the above embodiments, when the shapes, positional relationships, etc. of the components are mentioned, they are not limited to the shapes, positional relationships, etc., unless they are specifically stated or are clearly limited to a specific shape, positional relationship, etc. in principle.

[0069] (Aspects of the present disclosure) The present disclosure described above can be understood from the following viewpoints, for example. [First viewpoint] A semiconductor device, A semiconductor element (3), The semiconductor element is a first member, and a second member (1, 4) is connected to the semiconductor element; a bonding material (2) that bonds the semiconductor element and the second member, the bonding material has a stress relaxation layer (22) made up of a plurality of metal wires (221) and a sintered bonding layer (23) bonded to the semiconductor element or the second member, The metal wire has a length in a thickness direction (D1) that is equal to or greater than a predetermined length, the direction connecting the semiconductor element and the second member being a thickness direction (D1). [Second perspective] The semiconductor device according to a first aspect, wherein the bonding material is such that a portion of the metal wire is oriented along the thickness direction and another portion of the metal wire is oriented at an angle of a predetermined value or more relative to the thickness direction. [Third Perspective] The semiconductor device according to the first or second aspect, wherein the bonding material has a length of the stress relaxation layer in the thickness direction of the bonding material of 2 μm or more. [Fourth viewpoint] The semiconductor device according to a third aspect, wherein the bonding material has a length of the stress relaxation layer in the thickness direction of the bonding material of 8 μm or less. [Fifth viewpoint] The semiconductor device according to the third or fourth aspect, wherein the bonding material has a thickness of the sintered bonding layer in the thickness direction of 10 μm or less. [Sixth viewpoint] The bonding material further includes a metal bulk layer (21), The semiconductor device according to any one of the first to fifth aspects, wherein the metal bulk layer has a volume fraction of 68% or less in the bonding material. [Seventh viewpoint] The semiconductor device according to any one of the first to sixth aspects, wherein the metal wire is a nanowire made of copper. [Eighth viewpoint] The semiconductor device according to a sixth aspect, wherein the metal bulk layer is made of any one of copper, aluminum, and a copper alloy. [Ninth viewpoint] the semiconductor element and the second member have a coating layer (11, 31, 41) bonded to the bonding material, The semiconductor device according to an eighth aspect, wherein the covering layer is made of any one of copper, silver, and a copper alloy. [Explanation of symbols]

[0070] REFERENCE SIGNS LIST 1...first heat spreader, 11, 31, 41...coating layer, 2...bonding material, 21...metal bulk layer, 22...stress relaxation layer, 221...metal wire, 23...sintered bonding layer, 3...semiconductor element, 4...metal block, D1...thickness direction

Claims

1. A semiconductor device, A semiconductor element (3), The semiconductor element is a first member, and a second member (1, 4) is connected to the semiconductor element; a bonding material (2) that bonds the semiconductor element and the second member, The bonding material has a stress relaxation layer (22) composed of a plurality of metal wires (221) and a sintered bonding layer (23) bonded to the semiconductor element or the second member, The metal wire has a length in a thickness direction (D1) that is equal to or greater than a predetermined length, the direction connecting the semiconductor element and the second member being a thickness direction.

2. 2. The semiconductor device according to claim 1, wherein the bonding material is such that a portion of the metal wire is oriented along the thickness direction and another portion of the metal wire is oriented at an angle equal to or greater than a predetermined angle with respect to the thickness direction.

3. The semiconductor device according to claim 1 , wherein the length of the stress relaxation layer in the thickness direction of the bonding material is 2 μm or more.

4. The semiconductor device according to claim 3 , wherein the length of the stress relaxation layer in the thickness direction of the bonding material is 8 μm or less.

5. The semiconductor device according to claim 4 , wherein the thickness of the sintered bonding layer in the thickness direction of the bonding material is 10 μm or less.

6. The bonding material further comprises a metal bulk layer (21); The semiconductor device according to claim 1 , wherein the volume fraction of the metal bulk layer in the bonding material is 68% or less.

7. 7. The semiconductor device according to claim 1, wherein the metal wire is a nanowire made of copper.

8. 7. The semiconductor device according to claim 6, wherein said metal bulk layer is made of one of copper, aluminum, and a copper alloy.

9. The semiconductor element and the second member have a covering layer (11, 31, 41) bonded to the bonding material, 9. The semiconductor device according to claim 8, wherein said covering layer is made of any one of copper, silver, and a copper alloy.

Images