Substrate processing apparatus and substrate processing method
The substrate processing apparatus addresses the challenge of high throughput and size by employing a shared transport mechanism and coating module configuration, enhancing efficiency and cost-effectiveness.
Patent Information
- Application Number
- JP2024065459
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-04-15
- Publication Date
- 2025-10-27
AI Technical Summary
Existing substrate processing apparatuses face challenges in achieving high throughput while preventing the apparatus from becoming large during photolithography processes.
A substrate processing apparatus with a shared transport mechanism and shared coating module between first and second processing units, connected by a connection section, allowing for efficient substrate processing and reduced space usage.
The apparatus achieves high throughput and prevents excessive size by sharing coating modules and transport mechanisms, optimizing space utilization and reducing manufacturing costs.
Smart Images

Figure 2025162275000001_ABST
Abstract
Description
[Technical Field]
[0001] The present disclosure relates to a substrate processing apparatus and a substrate processing method. [Background technology]
[0002] In the manufacturing process of semiconductor devices, semiconductor wafers (hereinafter referred to as wafers) serving as substrates are transported within an apparatus, a coating film is formed by supplying a coating liquid to the wafer, and various processes are performed on the coating film. Patent Document 1 describes a substrate processing apparatus (coating and developing apparatus) that forms a resist film as a coating film and forms a pattern on the resist film by exposure and development. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Publication No. 2022-83851 Summary of the Invention [Problem to be solved by the invention]
[0004] The present disclosure provides a technique that can achieve high throughput and prevent the apparatus from becoming large when performing photolithography. [Means for solving the problem]
[0005] The substrate processing apparatus of the present disclosure includes a first processing unit and a second processing unit, each connected to a first exposure unit and a second exposure unit that expose a substrate, and each including a processing module that processes the substrate; a first loading / unloading port and a second loading / unloading port provided in the first processing unit and the second processing unit, respectively, for loading / unloading the substrate into / from a transport container that transports the substrate; a connection section provided with a coating module that applies a chemical solution to the substrate to form a film, the connection section being connected to the first processing section and the second processing section; a shared transport mechanism provided at the connection section, which is shared by the substrates loaded into the first processing section and the second processing section from the first loading / unloading port and the second loading / unloading port, respectively, and which transfers the substrates to the coating module; Equipped with. [Effects of the Invention]
[0006] The present disclosure provides a technique that can achieve high throughput and prevent the apparatus from becoming large when performing photolithography. [Brief explanation of the drawings]
[0007] [Figure 1] FIG. 1 is a schematic plan view showing a coating and developing apparatus according to an embodiment. [Figure 2] FIG. 2 is a vertical cross-sectional side view showing the coating and developing apparatus. [Figure 3] FIG. 2 is a front view showing the coating and developing apparatus. [Figure 4] FIG. 2 is a vertical sectional front view showing the coating and developing apparatus. [Figure 5] FIG. 3 is a vertical cross-sectional side view showing a connection portion of the coating and developing device. DETAILED DESCRIPTION OF THE INVENTION
[0008] A coating and developing apparatus 1 according to an embodiment of the substrate processing apparatus of the present disclosure will be described with reference to the cross-sectional plan view of FIG. 1, the longitudinal side view of FIG. 2, the front view of FIG. 3, the longitudinal front view of FIG. 4, and the longitudinal side view of FIG. 5. FIGS. 2, 4, and 5 show cross sections of the apparatus at different positions. The description using these figures will be made using an XYZ coordinate system. In FIG. 1, the X direction along which the first processing unit D1 and the second processing unit D2 (described later) are aligned is sometimes referred to as the left-right direction, with the side where the first processing unit D1 is provided sometimes referred to as the left and the side where the second processing unit D2 is provided sometimes referred to as the right. The Y direction is sometimes referred to as the front-rear direction, with the side where the carrier block 11 is provided and the side where the interface block 13 is provided sometimes referred to as the rear, out of the carrier block 11 and the interface block 13 (described later).
[0009] 1, the coating and developing apparatus 1 is configured to form a resist pattern on a wafer W stored in and carried into a transport container C, such as a FOUP (Front Opening Unify Pod). The coating and developing apparatus 1 mainly forms a resist pattern by supplying resist as a chemical solution to the wafer W to form a resist film, which is a coated film, performing a thermal treatment (PAB) on the wafer W before exposure, and performing a thermal treatment (PEB) and development on the resist film exposed by an exposure machine EX. The coating and developing apparatus 1 of this example has various process modules 51-54 arranged therein that perform such processes, and is connected to, for example, two exposure machines EX.
[0010] The coating and developing apparatus 1 is composed of first and second processing sections D1 and D2, each elongated in the front-to-rear direction in plan view, and a connecting section D3 connecting these processing sections D1 and D2. D1 to D3 are arranged side by side in the left-to-right direction in a clean room or the like, and are arranged in a U-shape in plan view. Processing sections D1 and D2 are arranged facing each other with a distance between them in the left-to-right direction, and the distance between them is the left-to-right width of the connecting section D3. The width of the connecting section D3 is shorter than the widths of processing sections D1 and D2 in the same direction. As shown in FIG. 2, the heights, which are the lengths in the Z direction, of the first and second processing sections D1 and D2 and the connecting section D3 are generally the same.
[0011] The connection section D3 is provided with a coating processing module 51, which is a module for forming a resist film, while the first and second processing sections D1 and D2 each include various processing modules other than the coating processing module 51 and a loading / unloading port for the wafer W, and are connected to different exposure machines EX.
[0012] The first and second processing units D1 and D2 have similar structures, except for the fact that the load ports, the transfer mechanisms provided therein, the transfer areas for wafers W moved by the transfer mechanisms, and the modules are arranged symmetrically. However, as will be described later, some modules are stacked vertically, and the number of stacked modules may be the same or different between the first processing unit D1 and the second processing unit D2. Specifically, the first and second processing units D1 and D2 are composed of blocks 11-13, each of which has a transfer area (transfer path) for wafers W inside. Each block 11-13 is arranged in this order from front to back, and each block has a housing and an internal space that is partitioned from the others.
[0013] Of these, carrier block 11 is configured to be able to transfer wafers W between transfer container C and processing block 12, and processing block 12 is arranged with processing modules 53 and 54. Interface block 13 is connected to exposure machine EX and is configured to transfer wafers W between exposure machine EX and processing block 12. In this way, first and second processing sections D1 and D2 are configured to load and unload transfer containers C individually, to be connected to exposure machines EX, and to perform similar processing.
[0014] The processing block 12 will now be described in detail. The processing block 12 is configured with four stories 12a to 12d that are vertically partitioned into, for example, four sections and stacked on top of each other. Each story 12a to 12d has a generally similar configuration, and the top story 12d shown in Figure 1 will be described as a representative. A transfer area for wafers W extending in the front-rear direction is provided in the center in the left-right direction, and a transfer mechanism 41 is provided in this transfer area.
[0015] The transfer mechanism 41 includes a base 41a that is movable along the transfer area, vertically movable, and rotatable about a vertical axis, and a wafer W holder 41b that is movable forward and backward on the base, and can deliver the wafer W to and from processing modules 53 and 54 located around the transfer area. Transfer mechanisms 42 to 45, which will be described later, also have the same configuration as the transfer mechanism 41.
[0016] Of the stories 12a to 12d each having such a transfer area, for example, the lowest story 12a constitutes an outbound path for transferring wafers W from the carrier block 11 to the interface block 13, and the stories 12b to 12d other than story 12a constitute a return path for transferring wafers W exposed by the exposure machine EX from the interface block 13 to the carrier block 11. In particular, stories 12b to 12d constituting the return path have the same type of processing modules, such as processing modules 53 and 54, arranged thereon so that the same processing can be performed on wafers W.
[0017] On each of stories 12b to 12d, a processing module 54 is disposed inside the transfer area in the left-right direction, i.e., on the side of connection part D3. The processing module 54 is a developing processing module 54 that develops the resist film by supplying a developing solution to the exposed wafer W, and hereinafter may also be referred to as the developing module 54. The developing module 54 has a structure generally similar to that of the coating processing module 51 described below, except that the chemical solution supplied to the wafer W is a developing solution.
[0018] On the left-right outer side of the transfer area, a plurality of processing modules 53 are stacked vertically, for example, to perform a heat treatment (Post Exposure Bake, PEB) on the wafer W after the exposure of the resist film, and these stacked processing modules 53 are arranged in a row in the front-rear direction, for example, three in number. Hereinafter, processing module 53 may also be referred to as heat treatment module 53. Heat treatment module 53 has a structure similar to that of heat treatment module 52, which will be described later.
[0019] The interface block 13 is provided with a tower T3 and a transfer mechanism 45, which have structures similar to those of the tower T1 and transfer mechanism 41 described below. The tower T3 extends in the vertical direction across the stories 12a to 12d, is located behind the transfer areas of the stories 12a to 12d, and can deliver wafers W to the transfer mechanisms 41 and 45. The transfer mechanism 45 can transfer wafers W between the tower T3 and the exposure machine EX, and is located inside the tower T3 in the left-right direction, for example.
[0020] The carrier block 11 will be described below with reference to the front view of Fig. 3 and the longitudinal front view of Fig. 4. A transfer container C, which is carried by an external carrier transfer mechanism (not shown) provided in a clean room in which the coating and developing apparatus 1 is installed, is placed on the carrier block 11. The carrier block 11 is a block that transfers wafers W into and out of the transfer container C, and also transfers wafers W to and from the processing block 12 and interface block 13.
[0021] The aforementioned housing constituting the carrier block 11 is designated as 21. The housing 21 is generally rectangular parallelepiped-shaped, but the front upper portion of the housing 21 is recessed in the left-right outer corners—in other words, the front upper portion of the outer corners in the left-right direction. Specifically, the carrier block 11 of the first processing unit D1 has a recess in the upper left front portion, and the carrier block 11 of the second processing unit D2 has a recess in the upper right front portion, forming a rectangular parallelepiped shape that is elongated vertically and horizontally. The portion of the housing 21 below the recess serves as a mounting table 22, and a stage 23 is provided on the mounting table 22. The stage 23, together with a wafer W loading / unloading opening 25A and a door 25 (described later), constitutes a load port, on which a transfer container C is placed to load and unload wafers W into and from the carrier block 11.
[0022] A transfer unit 31 is provided in front of each mounting table 22. The transfer unit 31 is provided with a transfer mechanism 32 and a temporary mounting table 33. The temporary mounting tables 33 are stacked, for example, in two stages, and each stage is provided with a plurality of stages 34, for example, two stages lined up in the left-right direction, and a transfer container C is placed on each stage 34. The external transfer mechanism delivers the transfer container C to the stage 34 of the upper temporary mounting table 33. The transfer mechanism 32 includes an articulated arm 32a that can hold a held portion (not shown) provided on the upper part of the transfer container C, and a moving mechanism (not shown) that can move the articulated arm 32a up and down and left and right, and transfers the transfer container C between each stage 34 and each stage 23 provided on the mounting table 22. The transport container C, which has been placed on the stage 23 and has the wafers W transported to the device, is temporarily removed from the stage 23 by being transported to the stage 34 of the transfer unit 31, and is then returned to the stage 23 again to store the wafers W that have been processed in the device.
[0023] To explain the stage 23 in more detail, for example, two stages 23 are arranged in the left-right direction, and they move between a rear loading position for loading and unloading wafers W and a front unloading position for transferring transport containers C to and from the transfer mechanism 32. A loading / unloading opening 25A for loading / unloading wafers W into / from the carrier block 11 is formed in the side wall on the front side of the housing 21 (see FIGS. 1 and 4), and the loading / unloading opening 25A is provided opposite the transfer container C placed on the stage 23. A door 25 is provided at each loading / unloading opening 25A, and the door 25 is capable of holding the lid of the transfer container C on the stage 23 at the load position, and can move while holding the lid to open and close the loading / unloading opening 25A.
[0024] As described above, a recess is formed in the housing 21 of the carrier block 11, and at the height where this recess is formed, the inside of the housing 21 in the left-right direction (the connection part D3 side) is wider in the front-to-back direction than the outside, as shown in Fig. 1. A plurality of processing modules (heating modules) 52 are arranged on the front side of this wide space. The processing modules 52 are thermal processing modules that perform, for example, post-apply bake (PAB) heating after resist application in thermal processing of substrates before exposure, and hereinafter may be referred to as thermal processing modules 52.
[0025] The heat treatment module 52 has a housing in the shape of a flat rectangular parallelepiped that is long in the front-rear direction, and a relatively small surface at the rear of the housing is formed with a loading / unloading port for the wafer W. As shown in Figures 1 and 4, the heat treatment modules 52 are arranged, for example, two side-by-side on the left and two side-by-side, and multiple modules are stacked vertically. The multiple heat treatment modules 52 can be stacked up to the vicinity of the top wall of the housing 21, for example.
[0026] In a plan view, the front side of this stack of heat treatment modules 52 is located forward of the loading / unloading opening 25A, and is aligned side by side with the stage 23 in the left-right direction, while the rear side is located rearward of the loading / unloading opening 25A. In this way, the front side of the stack is located forward of the loading / unloading opening 25A, i.e., the stage 23 is not located in front of the stack, thereby reducing the front-to-rear length of the carrier block 11 and the floor area occupied by the coating and developing apparatus 1. The sides of this stack are configured as spaces for movement of a transport mechanism 42, which will be described later.
[0027] A hot plate on which the wafer W is placed and heated is provided at the front side of the heat treatment module 52, and a movable body provided at the rear side of the heat treatment module 52 moves onto the hot plate together with the wafer W to transfer the wafer W to and from the transfer mechanism 43, which will be described later, thereby transferring the wafer W between the movable body and the hot plate. The movable body has a flow path for a cooling fluid and also serves to cool the wafer W heated by the hot plate before it is moved to the rear side of the heat treatment module 52. Other heat treatment modules such as the heat treatment module 53 are also configured to have a hot plate and a movable body, similar to the heat treatment module 52.
[0028] The transfer region within the carrier block 11 is the region within the housing 21, but the inner region in the left-right direction (the region toward the connection portion D3) is narrower in the front-to-rear direction than the outer region because the heat treatment module 52 is located there. This narrow region from front to back is referred to as the transfer region 26, and the wider region from front to back is referred to as the transfer region 27. The transfer region 27 is provided with a transfer mechanism 42 for loading and unloading wafers W into and from the transfer container C, and constitutes the upstream and downstream ends of the transfer path for wafers W in the coating and developing apparatus 1. Within the housing 21, a tower T1, a transfer mechanism (first transfer mechanism) 43, and a tower T2 are lined up in this order toward the inside in the left-to-right direction, and the tower T2 and the transfer mechanism 43 are provided in the transfer region 26. The tower T1 is provided in the transfer region 27 and faces the transfer region 26 and the transfer region of the processing block 12.
[0029] Like tower T3, tower T1 extends vertically across each of stories 12a to 12d, is located in front of the transfer areas of each of stories 12a to 12d, and is configured to be able to transfer wafers W to transfer mechanisms 42, 43 and transfer mechanisms 41 on each of stories 12a to 12d. Tower T1 has multiple wafer transfer sections (not shown) arranged vertically so that the transfer mechanisms 41 on each of stories 12a to 12d can access them.
[0030] The wafer transfer section is composed of, for example, a transfer module on which each wafer W is temporarily placed, a temperature adjustment module, etc. The transfer module has, for example, a plurality of pins arranged horizontally as a transfer section, and wafers W are transferred to the pins by transfer mechanisms 41 to 43. The temperature adjustment module has, for example, a stage interior as a transfer section, and a refrigerant flow path is provided within the stage so that the temporarily placed wafers W can be cooled. Tower T2 has a configuration similar to that of tower T1.
[0031] The transfer mechanism 42 transfers wafers between the transfer container C on the stage 23 at the load position described above and the tower T1. The transfer mechanism 42 accesses the tower T1 from the outside in the left-right direction (the side opposite to the side where the connection part D3 is provided). The transfer mechanism 43 transfers wafers W between the tower T1, the tower T2, and the heat treatment module 52. In FIG. 1, the flow of wafers W taken out of the transfer container C in the second processing unit D2 and heading toward the connection part D3 is indicated by a two-dot chain arrow. In the first processing unit D1, wafers W are transferred in the same way as in the second processing unit D2.
[0032] As shown in the figure, transfer areas 26 and 27 are provided as a transfer path, connecting load / unload port 25A and transfer mechanism 44, a shared transfer mechanism provided at connection part D3. Transfer mechanism 43 is provided in transfer area 26, and accesses heat treatment module 52. That is, transfer mechanism 43 is used for both transferring wafers W from the load port to connection part D3 and transferring them to heat treatment module 53, thereby preventing an increase in the number of transfer mechanisms and resulting increase in the manufacturing cost of the apparatus.
[0033] The connection section D3 (connection block) is provided to connect the carrier blocks 11 of the first and second processing sections D1 and D2. The connection section D3 includes a housing 24, and the housing 24 is provided to connect the housings 21 located on the left and right of the housing 24. A tower T2 is provided to straddle the housing 24 and the housing 21.
[0034] Within the housing 24, a transport mechanism 44 is arranged at the rear, and in front of it, multiple coating processing modules 51 are stacked, and the coating processing modules 51 are arranged so that they are aligned in the same row as the heat treatment modules 52 of each carrier block 11 when viewed in a plane.
[0035] The transfer mechanism 44 is disposed between the two towers T2 of the first and second processing units D1 and D2, has access to the two towers T2 and the coating processing module 51, and transfers wafers W to them. For example, the transfer mechanism 44 transfers a wafer W received from one of the towers T2 to the coating processing module 51, and then transfers the coated wafer W back to the tower T2 that received it in the reverse order of the procedure used to carry the wafer W into the coating processing module 51. In this way, the transfer mechanism 44 and the coating processing module 51 are provided as a shared transfer mechanism and a shared coating module shared by the first and second processing units D1 and D2.
[0036] 1 and 4, coating module 51 will be briefly described. Coating module 51 has two areas for performing coating processes aligned laterally (indicated by dashed lines in FIG. 4), and specifically includes two cups 56, a spin chuck 57 disposed in each cup 56, and a supply mechanism (not shown) for supplying resist as a chemical solution to wafer W. Spin chuck 57 suction-holds wafer W transferred from behind cup 56 by transfer mechanism 44, and rotates it about a vertical axis.
[0037] The supply mechanism of the coating processing module 51 includes a moving unit that moves left and right by the driving force of a motor, and a nozzle attached to the moving unit. The nozzle is movable between a processing position above the spin chuck 57 and a standby position outside the cup 56 in a plan view, and forms a resist film by supplying resist to the wafer W from the processing position and spin-coating the wafer W by rotating the wafer W. Note that the number of areas where the coating processing is performed and the various components contained therein, such as the cup 56, are not limited to the number described above and may be more or less than the number described above.
[0038] The coating and developing apparatus 1 is equipped with a control unit 100. The control unit 100 is configured by a computer equipped with a CPU and a storage unit, and controls each part of the coating and developing apparatus 1. The storage unit stores a program containing steps (commands) for controlling the operation of the various processing modules and transport mechanisms 41-45, the opening and closing of the door 25, etc. The control unit 100 is equipped with one or more control circuits so as to execute the steps of the program. This program is stored on a storage medium such as a hard disk, compact disc, magnetic optical disc, memory card, or non-volatile memory, and is then installed into the computer from there. The installed program causes the control unit 100 to output control signals to each part of the coating and developing apparatus 1, thereby controlling the operation of each part of the apparatus as described above.
[0039] The transfer path of wafer W in coating and developing apparatus 1 and the processing in each module are described below (FIG. 1). Wafer W is removed by transfer mechanism 42 from transfer container C placed on stage 34 of first processing section D1 or second processing section D2, and transferred from tower T1 to tower T2 to coating processing module 51. After a resist film is formed in coating processing module 51, wafer W is transferred from tower T2 to heat treatment module 52 and subjected to PAB.
[0040] After PAB, the wafer W passes through tower T1, the lowest story 12a, and is transported to tower T3 and then to the exposure machine EX for exposure. After exposure, the wafer W is transported through tower T3 to a heat treatment module 53 on any of stories 12b to 12d and then to a development module 54 for PEB and development. After development has formed a resist pattern on the wafer W, it is returned from tower T1 to the transfer container C.
[0041] As described above, in the coating and developing apparatus 1, a connection section D3 on which a coating treatment module 51 is mounted is provided between the first processing section D1 and the second processing section D2, which respectively perform processes other than resist film formation. The coating treatment module 51 is shared between the first processing section D1 and the second processing section D2. The reason for this configuration will be explained. For the purpose of explanation, a comparative example will be used in which two coating and developing apparatuses are configured such that a layer on which the aforementioned developing module 54 and PEB thermal treatment module 53 are provided and a layer on which the coating treatment module 51 and PAB thermal treatment module 52 are provided are stacked in the processing block 12. These two coating and developing apparatuses are not connected by the connection section D3. Instead, wafers W are moved between the layers via the exposure machine EX and the interface block 13, and resist film formation and development are performed. Thus, in the comparative example, a coating treatment module 51 is required for each processing block 12 of the two coating and developing apparatuses.
[0042] In the developing module 54, a developer is supplied to the wafer W to promote the development reaction of the resist film, and a cleaning solution is then supplied to remove the developer, so the required residence time L1 for the wafer W is relatively long. In contrast, the required residence time L2 for the wafer W in the coating module 51 is relatively short, shorter than the required residence time L1. The required residence time for the wafer W (hereinafter referred to as the required residence time) is the time from when the wafer W is placed in the module until the transfer mechanism is able to unload the processed wafer W. In the coating module 51 and the developing module 54, the wafer W is placed on the spin chuck 57, so the required residence time is the time from when the wafer W is placed on the spin chuck 57 until the rotation of the spin chuck 57 stops and the processed wafer W can be released.
[0043] Furthermore, if the number of coating processing modules 51 is increased, individual differences between the modules may cause variations in the state of the formed resist film between wafers W. Suppressing such variations may require a lot of time to adjust the operation of the modules before processing. In other words, rather than providing a coating processing module 51 for each processing block 12 as in the comparative example, it is preferable to share coating processing modules 51 between processing blocks 12 and reduce the number of modules installed, as this prevents the above-mentioned variations in processing between wafers W and the long adjustment time required for the modules.
[0044] Even if coating processing modules 51 are shared and the number of coating processing modules 51 is reduced, the required residence time for coating processing module 51 is short, as described above, so delays in processing of wafers W after coating processing module 51 can be suppressed. For this reason, coating and developing apparatus 1 is configured so that coating processing module 51 is shared between first processing section D1 and second processing section D2 as described above. Sharing coating processing modules 51 and reducing the number of coating processing modules 51 is also preferable from the perspective of reducing the manufacturing and operating costs of the apparatus. Furthermore, since coating processing modules 51 are shared, transfer mechanisms that access coating processing modules 51 are also shared between first processing section D1 and second processing section D2 as transfer mechanisms 44, which is preferable from the perspective of reducing the manufacturing costs of the apparatus.
[0045] A supplementary explanation will be given below regarding prevention of delays in processing after the coating processing module 51. Specifically, the multiple developing modules 54 provided in one processing block 12 will be described as one unit (first unit). The required residence time in each heat processing module is assumed to be relatively short.
[0046] If it is possible to transport wafers W to the exposure machine EX at relatively short intervals (Case 1), in the section of the transport path of wafers W in the coating and developing apparatus 1 after the exposure machine EX, the longer of the interval at which wafers W are transported from the exposure machine EX or the interval at which wafers W are transported from the first unit will affect the interval at which wafers W are transported to the transport container C. In other words, the throughput of the coating and developing apparatus 1 will be affected by the interval at which wafers W are transported from the exposure machine EX or the first unit.
[0047] On the other hand, when the interval between wafers W being carried into the exposure machine EX is relatively long (Case 2), the interval between wafers W being transferred to the exposure machine EX and each module performing post-exposure processing becomes long, resulting in a long interval between processing a wafer W in the exposure machine EX and each module and processing the next wafer W. In other words, processing in the exposure machine and each module performing post-exposure processing is delayed. In Case 2, where such a situation occurs, the interval between wafers W being carried into the exposure machine EX, rather than the interval between wafers W being carried out from the exposure machine EX or the first unit, affects the interval between wafers W being transferred to the transfer container C. As a result, the interval between wafers W being transferred to the transfer container C becomes longer than in Case 1. In other words, the throughput of the coating and developing apparatus 1 decreases. However, because the required residence time in the coating processing module 51 is short, wafers W can be transferred into the exposure machine EX in the coating and developing apparatus 1 at relatively short intervals, ensuring high throughput.
[0048] In the coating and developing apparatus 1, the coating processing module 51 is provided between the processing sections D1 and D2. This allows for a larger number of floors, including the developing modules 54, when the coating and developing apparatus 1 is installed in a clean room where the installation height of the apparatus is limited, compared to the comparative example. As described above, the developing modules 54 require a relatively long residence time. Therefore, a relatively large number of modules may be required to ensure sufficient throughput of the coating and developing apparatus 1. To achieve such a sufficient number, the number of developing modules 54 arranged in the front-to-rear direction of the coating and developing apparatus 1 is reduced. Therefore, the length of the processing block 12 in the front-to-rear direction is also reduced, thereby reducing the floor space occupied by the coating and developing apparatus 1. Furthermore, even if a large number of developing modules 54 are arranged in the front-to-rear direction of the coating and developing apparatus 1, the height of the coating and developing apparatus 1 is reduced. In other words, the configuration of the coating and developing apparatus 1 reduces the floor space and height occupied by the apparatus, thereby preventing the apparatus from becoming larger and achieving high throughput.
[0049] Incidentally, since a plurality of coating treatment modules 51 can be stacked in connection portion D3, for example, up to the vicinity of the upper wall of housing 24, other coating treatment modules performed before exposure processing may also be stacked together with coating treatment module 51 as needed. In other words, instead of some of the coating treatment modules 51 for forming resist films shown as being provided in plurality, coating treatment modules for forming other coating films may be provided. Specific examples include coating treatment module 58 (not shown) for forming an underlayer film formed below a resist film such as an anti-reflection film, and coating treatment module 59 (not shown) for forming a protective film formed to cover and protect the resist film when immersion exposure is performed.
[0050] Coating processing modules 58 and 59 have the same configuration as coating processing module 51, except that the type of chemical liquid (coating liquid) applied to wafer W is different from that of resist. Therefore, the required residence time in these coating processing modules 58 and 59 is shorter than that of developing module 54, just like coating processing module 51, preventing a decrease in throughput due to sharing between processing sections D1 and D2. After being processed in each of these coating processing modules 58 and 59, wafer W undergoes PAB in thermal processing module 52. Therefore, when coating processing modules 58 and 59 are provided, wafer W is transported in the following order: coating processing module 58 → thermal processing module 52 → coating processing module 51 → thermal processing module 52 → coating processing module 59 → thermal processing module 52, and then transported to exposure machine EX.
[0051] Although coating processing module 51 has been described as being shared by first processing section D1 and second processing section D2, this sharing is not limited to this. Two coating processing modules 51 are arranged side by side at connection section D3. The effects of the apparatus described above can be achieved even if the left coating processing module 51 is dedicated to processing wafers W transferred from first processing section D1 and the right coating processing module 51 is dedicated to processing wafers W transferred from second processing section D2. Therefore, it is sufficient that a common connection section D3 is provided for first processing section D1 and second processing section D2, and that transfer mechanism 43 of connection section D3 is shared by wafers W transferred from first processing section D1 and second processing section D2.
[0052] (Variation) In the present disclosure, the blocks of the first and second processing units D1 and D2 and the connection unit D3 are each formed as areas separated by a housing, which is preferable in terms of manufacturing efficiency of the coating and developing apparatus 1, but this is not limited to this. For example, a single housing may be formed to include multiple adjacent areas, and partitions may be provided to separate each area, or the adjacent areas may not be separated by partitions. As an example, two carrier blocks 11 and the connection unit D3 may be formed in a single housing, and the processing block 12 and the interface block 13 may also be formed in a single housing, with these blocks and the connection unit D3 simply being separated by partitions as needed.
[0053] The first and second processing units D1, D2, and connecting unit D3 are preferably arranged as in the present disclosure from the viewpoints of optimizing the throughput of the coating and developing apparatus 1 and preventing it from becoming too large, but this is not limiting. For example, in this example, the first processing units D1, D2 are arranged opposite each other in a plan view, but the area other than the carrier block 11 connected by the connecting unit D3 may be arranged so that the first processing unit D1 extends to the front and the second processing unit D2 extends to the rear, or so that the first processing unit D1 extends to the left and the second processing unit D2 extends to the right. Furthermore, although the coating and developing apparatus 1 of the present disclosure includes two processing units D1, D2, it may also include three or more processing units. In this case, connecting units D3 are provided to connect adjacent processing units.
[0054] 1, in first processing units D1 and D2, processing modules, transport mechanisms, towers, etc. are arranged symmetrically with respect to connection unit D3, but this is not limiting. For example, the processing modules 53 and 54 in each processing block 12 may be arranged in the same position in a plan view, with processing module 53 as a thermal processing module arranged on the left side of the transport region and processing module 54 as a developing module arranged on the right side of the transport region. The arrangement, layout, and number of processing modules are merely examples and are arbitrary.
[0055] The types of processing modules to be arranged are not limited to the above-described examples, and processing modules for performing processing other than the above-described processing may be arranged as necessary. For example, a hydrophobic processing module that supplies a processing gas for hydrophobizing the wafer W before the formation of a resist film or an underlayer film, a heat processing module that performs post-baking by heating the wafer W after development, a pre-exposure cleaning module that cleans the wafer W after the formation of a resist film and before exposure, a post-exposure cleaning module that cleans the wafer W after exposure and before PEB, an imaging module that images the surface of the wafer W to inspect the wafer W before or after the series of processing described above in the coating and developing apparatus 1, etc. may be provided.
[0056] The hydrophobization module may be provided by, for example, replacing some of the multiple heat treatment modules 52 stacked in the carrier block 11 with the hydrophobization module. When the hydrophobization module is provided in this manner, the wafer W may be transported to the connection portion D3 after the hydrophobization process, and a resist film or anti-reflection film may be formed thereon. The post-bake heat treatment module may be provided by, for example, replacing some of the multiple PEB heat treatment modules 53 with the hydrophobization module. The cleaning modules may be provided in the interface block 13, or by replacing some of the development modules 54 in the processing block 12 with the cleaning module. The imaging modules may be provided in an available space in the carrier block 11, for example, behind the transport mechanism 42.
[0057] The arrangement of the processing modules on each of the stories 12a to 12d does not have to be the same, and the story 12a, which forms the outbound route of the transport path, does not need to be provided with the processing modules 53 and 54, but may instead be provided with a processing module that performs pre-exposure processing. Furthermore, the processing block 12 does not have to be composed of the stories 12a to 12d. For example, a single transport area extending to the top of the processing block 12 may be provided with multiple transport mechanisms 41, with multiple thermal processing modules 53 and developing modules 54 stacked on the left and right sides of the transport area. The developing module 54 uses a liquid developer, but this is not limiting, and development using a developing gas may also be used, and these may be provided side by side.
[0058] Furthermore, the processing block 12 may be configured so that development or PEB and development are not performed, but rather processing such as cleaning after exposure is performed, and the PEB and development processing that is not performed in the coating and developing apparatus 1 may be performed in an apparatus to which the transfer container C is transferred. Therefore, the substrate processing apparatus of the present technology may be configured so that the developing module 54 is not provided.
[0059] The mounting table 22 is configured on the upper surface of the protruding lower part of the housing 21, thereby forming only one level in the vertical direction. However, this is not limited to this. Mounting tables may also be attached to recesses in the upper part of the housing 21 to form two or more levels, with stages 23 arranged on each level. In other words, load ports may be provided in multiple levels, one above the other. The mounting table 22 may also be formed by simply protruding the lower part of the housing 21 forward, rather than recessing the upper part of the rectangular parallelepiped housing 21. The mounting table 22 may also be provided on the outer side surface of the housing 21 in the left-right direction. The transfer of the transport container C to the stage 34 of the upper temporary storage table 33 is not limited to being performed by an external transport mechanism, and the transport container C may be transported directly to the stage 23. Therefore, the transfer unit 31 may not be provided.
[0060] Furthermore, while the coating and developing apparatus 1 described above has an apparatus configuration in which two processing sections D1 and D2 are connected by one connection section D3, it may also be configured such that three or more processing sections are connected by two or more connection sections D3. For example, a processing section D4 configured similarly to processing sections D1 and D2 may be provided between processing sections D1 and D2, with processing sections D1 and D4 connected by one connection section D3 and processing sections D4 and D2 connected by another connection section D3. A resist film is formed on a portion of wafers W transferred from processing section D4 and wafers W transferred from processing section D1 at one connection section D3. A resist film is formed on another portion of wafers W transferred from processing section D4 and wafers W transferred from processing section D2 at the other connection section D3. Each wafer W may then be developed in the developing module 54 of the processing section into which it was transferred. Furthermore, the number of processing modules such as the thermal processing modules 52 and 53, the coating processing module 51, and the developing module 54 is not limited to the number described above or shown in the drawings, and may be increased or decreased as appropriate. For example, such an increase or decrease can be achieved by appropriately changing the number or size of the blocks in which the processing modules are arranged.
[0061] The wafer W is not limited to a wafer, but may be other substrates such as substrates for manufacturing flat panel displays. The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The above embodiments may be omitted, substituted, modified, and combined in various ways without departing from the scope and spirit of the appended claims. [Explanation of symbols]
[0062] C. Transport container D1 First processing section D2 Second processing section D3 Connection EX exposure machine W wafer 1 Coating and developing equipment 25A loading / unloading exit 44 Transport mechanism 51 Coating Processing Module 53 Heat Treatment Module 54 Develop Module
Claims
1. a first processing unit and a second processing unit connected to a first exposure machine and a second exposure machine, respectively, for exposing a substrate, and each including a processing module for processing the substrate; a first loading / unloading port and a second loading / unloading port provided in the first processing unit and the second processing unit, respectively, for loading / unloading the substrate into / from a transport container that transports the substrate; a connection section provided with a coating module that coats the substrate with a chemical solution to form a film, the connection section being connected to the first processing section and the second processing section; a shared transport mechanism provided at the connection portion, which is shared by the substrates loaded into the first processing section and the second processing section from the first loading / unloading port and the second loading / unloading port, respectively, and which transfers the substrates to the coating module; A substrate processing apparatus comprising:
2. the processing module includes a heating module that heats the substrate on which the coating film is formed, 2. The substrate processing apparatus according to claim 1, wherein a first transport mechanism for transferring the substrate to and from the heating module is provided on the substrate transport path connecting each of the first and second loading / unloading ports to the shared transport mechanism.
3. the coating module is shared by the substrates that are loaded into the first processing unit and the second processing unit through the first loading / unloading port and the second loading / unloading port, respectively; the first processing section and the second processing section each include a developing module as the processing module for developing the exposed substrate; the first processing unit includes a first loading / unloading block in which the first loading / unloading port is provided, and the second processing unit includes a second loading / unloading block in which the second loading / unloading port is provided, 3. The substrate processing apparatus according to claim 1, wherein the developing module is provided between the first loading / unloading block and the first exposure unit, and between the second loading / unloading block and the second exposure unit.
4. 3. The substrate processing apparatus according to claim 2, wherein the heating modules are provided between the first loading / unloading port and the coating module and between the second loading / unloading port and the coating module, respectively, in a plan view.
5. processing the substrate in processing modules provided in a first processing section and a second processing section, which are connected to a first exposure machine and a second exposure machine, respectively, that perform exposure of the substrate; a step of loading and unloading the substrate into and from a transport container that transports the substrate through a first loading / unloading opening and a second loading / unloading opening that are provided in the first processing section and the second processing section, respectively; applying a chemical solution to the substrate by a coating module provided in a connection portion connected to the first processing portion and the second processing portion to form a film; transferring each substrate to the coating module by a shared transport mechanism provided at the connection portion and shared by the substrates loaded into the first processing unit and the second processing unit from the first loading / unloading port and the second loading / unloading port, respectively; A substrate processing method comprising:
6. a step of heating the substrate on which the coating film is formed by a heating module included in the processing module, 6. A substrate processing method according to claim 5, further comprising a step of transferring the substrate to the heating module by a first transport mechanism provided on a substrate transport path connecting each of the first loading / unloading port and the second loading / unloading port to the shared transport mechanism.
7. the coating module is shared by the substrates carried in through the first loading / unloading port and the second loading / unloading port, developing the exposed substrate by a developing module that each of the first processing unit and the second processing unit includes as a processing module; the first processing unit includes a first loading / unloading block in which the first loading / unloading port is provided, and the second processing unit includes a second loading / unloading block in which the second loading / unloading port is provided, 7. The substrate processing method according to claim 5, wherein the developing module is provided between the first loading / unloading block and the first exposure unit, and between the second loading / unloading block and the second exposure unit.
8. 7. The substrate processing method according to claim 6, wherein the heating modules are provided between the first loading / unloading port and the coating module and between the second loading / unloading port and the coating module, respectively, in a plan view.
Citation Information
Patent Citations
Substrate processing device, substrate processing method and storage medium
JP2022083851A