Silicon carbide semiconductor wafer, manufacturing method of the same, and silicon carbide semiconductor device

Abstract

To enable a suppression of in-plane variations in a concentration and a film thickness of two kinds of dopants in the case where an element having different substitution site is doped.SOLUTION: A SiC semiconductor layer 20 formed on a SiC semiconductor substrate 10 includes a first layer 21 and a second layer 22. The first layer 21 and the second layer 22 are formed as a set of at least one layer. The first layer 21 is doped with both an element that controls a conduction type and an element that does not control a conduction type so that a concentration of the element that does not control the conduction type is uniform in a plane. The second layer 22 is doped with the element that controls the conduction type and is not doped with the element that does not control the conduction type or has a concentration sufficiently lower than that of the first layer 21. Then, a relationship between the concentration of the element for controlling the conduction type doped in the second layer 22 in a central part Ra and the concentration of the element for controlling the conduction type in an outer edge part Rb is set to be opposite to that of the first layer 21.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a silicon carbide (hereinafter referred to as SiC) semiconductor wafer and a method for manufacturing the same. [Background technology]

[0002] Patent Document 1 (Patent Document 1) proposes a film formation method for forming a SiC semiconductor layer with a uniform doping concentration and thickness on a SiC semiconductor wafer (so-called epitaxial wafer) in which a SiC semiconductor layer is formed on a SiC semiconductor substrate. In this method, a reaction gas containing a mixture of Si source gas, C source gas, dopant gas, and carrier gas is introduced into the center of a SiC semiconductor substrate placed on a rotating support table, and a similar reaction gas is introduced into the outer periphery. By setting different C / Si ratios for the reaction gas introduced into the center and the outer periphery, the in-plane variations in the doping concentration and thickness of the SiC semiconductor layer are suppressed and made uniform. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 5265985 Summary of the Invention [Problem to be solved by the invention]

[0004] When epitaxially growing a SiC semiconductor layer, elements with different substitution sites, such as Al (aluminum), P (phosphorus), and V (vanadium) that substitute at the Si site and N (nitrogen) and B (boron) that substitute at the C site, may be simultaneously doped. In this case, as shown in Patent Document 1, simply changing the C / Si ratio between the center and the outer edge makes it difficult to achieve epitaxial growth while uniformly controlling the concentrations of the two types of dopants and suppressing in-plane variations in film thickness.

[0005] An object of the present disclosure is to provide a SiC semiconductor wafer and a manufacturing method thereof that can suppress in-plane variations in the concentration and film thickness of two types of dopants when doping with elements having different substitution sites. Another object is to provide a SiC semiconductor device configured with a structure that can suppress in-plane variations in the concentration and film thickness of two types of dopants. [Means for solving the problem]

[0006] A first aspect of the present disclosure is a disk-shaped SiC semiconductor wafer having a center portion (Ra) and an outer edge portion (Rb), A SiC semiconductor substrate (10), a SiC semiconductor layer (20) formed on the SiC semiconductor substrate by an epitaxial growth layer; The SiC semiconductor layer has at least one first layer (21) and one second layer (22), the first layer is doped with an element that controls the conductivity type of the SiC semiconductor layer and an element that does not control the conductivity type of the SiC semiconductor layer, one of which is an element that substitutes for an Si site and the other of which is an element that substitutes for a C site, and within the plane of the first layer, the concentration of the element that controls the conductivity type is different between the central part and the outer edge part, while the concentration of the element that does not control the conductivity type is uniform; The second layer is doped with an element that controls the conductivity type, and is not doped with an element that does not control the conductivity type, or the concentration of the element is lower than that of the first layer, and within the plane of the second layer, the relationship between the high and low concentrations of the element that controls the conductivity type in the center and the outer edge is reversed to that in the first layer.

[0007] With this configuration, even if the individual layers of the first and second layers have variations in the concentrations of elements that control the conductivity type and elements that do not control the conductivity type, the average concentrations across the total thickness of the SiC semiconductor layer are uniform in both the center and the outer edge. Therefore, when doping with elements that have different substitution sites, it is possible to obtain a SiC semiconductor wafer that can suppress variations in the concentrations and film thickness of the two types of dopants.

[0008] A second aspect of the present disclosure is a method for manufacturing a disk-shaped SiC semiconductor wafer having a center portion (Ra) and an outer edge portion (Rb), Preparing a SiC semiconductor substrate (10); epitaxially growing a SiC semiconductor layer (20) on the SiC semiconductor substrate; The formation of the SiC semiconductor layer includes forming a first layer (21) and forming a second layer (22); In forming the first layer, either one of an element that controls the conductivity type of the SiC semiconductor layer and an element that does not control the conductivity type of the SiC semiconductor layer is doped as an element to be substituted at the Si site, and the other is doped as an element to be substituted at the C site, and within the plane of the first layer, the concentration of the element that controls the conductivity type is made different between the central part and the outer edge part, while the concentration of the element that does not control the conductivity type is made uniform; By forming the second layer, the element that controls the conductivity type is doped, and the element that does not control the conductivity type is not doped or is doped at a lower concentration than the first layer, and the relationship between the high and low concentrations of the element that controls the conductivity type in the center and the outer edge within the plane of the second layer is reversed from that in the first layer.

[0009] According to this manufacturing method, even if the individual layers of the first and second layers have variations in the concentrations of the elements that control the conductivity type and the elements that do not control the conductivity type, the concentrations averaged over the total thickness of the SiC semiconductor layer are uniform in both the center and the outer edge. Therefore, when doping with elements that have different substitution sites, it is possible to manufacture SiC semiconductor wafers in which the in-plane variations in the concentrations and film thicknesses of the two types of dopants are suppressed.

[0010] A third aspect of the present disclosure is a SiC semiconductor device, A SiC semiconductor substrate (10), a SiC semiconductor layer (20) formed on the SiC semiconductor substrate, which is composed of an epitaxially grown layer and which constitutes a buffer layer; The SiC semiconductor layer has at least one first layer (21) and one second layer (22), the first layer is doped with either an element that controls the conductivity type of the SiC semiconductor layer or an element that does not control the conductivity type of the SiC semiconductor layer, with one of the elements being substituted at the Si site and the other being substituted at the C site; The second layer is doped with an element that controls the conductivity type, and is not doped with an element that does not control the conductivity type, or the doping concentration of the element is lower than that of the first layer.

[0011] Even if the individual layers of the first and second layers have variations in the concentrations of the elements that control the conductivity type and the elements that do not control the conductivity type, the concentrations are uniform throughout the total thickness of the SiC semiconductor layer, both in the center and the outer edge. Therefore, in SiC semiconductor devices including such first and second layers, whether they are manufactured using the center or the outer edge of the SiC semiconductor wafer, the same functions and electrical characteristics are consistent. This makes it possible to provide a SiC semiconductor layer in which variations in the concentrations and film thickness of the two types of dopants are suppressed.

[0012] The reference symbols in parentheses attached to each component indicate an example of the correspondence between the component and the specific components described in the embodiments described below. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a cross-sectional view of a SiC semiconductor wafer according to a first embodiment of the present disclosure. [Figure 2A] 1 is a diagram showing V concentrations at the center and outer edge of a SiC semiconductor layer in the depth direction. [Figure 2B] 1 is a diagram showing the N concentration at the center and outer edge of a SiC semiconductor layer in the depth direction. [Figure 3] FIG. 1 is a schematic diagram of an epitaxial growth apparatus. [Figure 4A] FIG. 10 is a graph showing the relationship between the distance from the wafer center and the N concentration in the first layer. [Figure 4B] FIG. 10 is a graph showing the relationship between the distance from the wafer center and the V concentration in the first layer. [Figure 5A] FIG. 10 is a diagram showing the results of measuring the N concentration at the wafer center of the first layer and at a position 65 mm away from the center. [Figure 5B] FIG. 10 is a diagram showing the results of measuring the V concentration at the wafer center of the first layer and at a position 65 mm away from the center. [Figure 6A] FIG. 10 is a graph showing the relationship between the distance from the wafer center and the N concentration in the second layer. [Figure 6B] FIG. 10 is a graph showing the relationship between the distance from the wafer center and the V concentration in the second layer. [Figure 7A] FIG. 10 is a diagram showing the results of measuring the N concentration at the center of the wafer of the second layer and at a position 65 mm away from the center. [Figure 7B] FIG. 10 is a diagram showing the results of measuring the V concentration at the center of the wafer of the second layer and at a position 65 mm away from the center. DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. In the following, including other embodiments described below, identical or equivalent parts will be denoted by the same reference numerals.

[0015] (First embodiment) First, a SiC semiconductor wafer according to this embodiment will be described. This SiC semiconductor wafer is used for manufacturing SiC semiconductor devices such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors).

[0016] As shown in FIG. 1, the SiC semiconductor wafer of this embodiment is constructed by epitaxially growing a SiC semiconductor layer 20 on a SiC semiconductor substrate 10.

[0017] The SiC semiconductor substrate 10 is made of n-type 4H-SiC, for example, with one side being the Si plane and the other side being the C plane, more specifically, with the <11-20> direction as the off direction and an off angle of 0 to 8° with respect to the (0001) Si plane. This SiC semiconductor substrate 10 is used to form the drain region of a MOSFET. However, the SiC semiconductor substrate 10 shown here is only an example, and is not limited to this. The off direction is the "normal vector of the growth plane, which in this embodiment is the normal vector to the (0001) Si plane." <0001> The term "direction parallel to the vector obtained by projecting the vector of the direction onto the main surface of SiC semiconductor substrate 10" means "a direction parallel to the vector obtained by projecting the vector of the direction onto the main surface of SiC semiconductor substrate 10."

[0018] The SiC semiconductor layer 20 is epitaxially grown on the SiC semiconductor substrate 10. For example, the SiC semiconductor layer 20 is used as a buffer layer in a MOSFET, that is, a layer located between the SiC semiconductor substrate 10 that constitutes the drain region and the drift layer formed thereon. When a drift layer is formed on the SiC semiconductor substrate 10, the buffer layer plays a role of buffering mismatch due to differences in the concentration of impurities that act as carriers. When the n-type impurity concentration of the SiC semiconductor substrate 10 is set to, for example, 5.0×10 18 cm -3 or more, and the n-type impurity concentration of the drift layer is set to, for example, 5.0×10 16 cm -3 In this case, the n-type impurity concentration of the buffer layer is set to a concentration between that of the SiC semiconductor substrate 10 and that of the SiC semiconductor layer 20, for example, 1.0×10 17 cm -3 Greater than or equal to 5.0 x 10 18 cm -3 The following is said to be true.

[0019] The SiC semiconductor layer 20 is configured by laminating a first layer 21 and a second layer 22. At least one first layer 21 and one second layer 22 are formed, but it is preferable that a plurality of pairs of the first layer 21 and the second layer 22 are repeatedly formed. The number of layers of the first layer 21 and the second layer 22 is the same, and FIG. 1 shows a case where the SiC semiconductor layer 20 is configured by repeatedly forming two pairs of the first layer 21 and the second layer 22, that is, two layers of each layer.

[0020] The first layer 21 is formed by doping SiC with N and V as elements. N is an n-type impurity and is doped as a dopant to control the conductivity type, making the first layer 21 n-type. V is doped to obtain the effect of suppressing current degradation of a diode included in a SiC semiconductor device manufactured using the SiC semiconductor wafer.

[0021] For example, when a SiC semiconductor device equipped with a switching element such as a MOSFET is manufactured using a SiC semiconductor wafer in which a SiC semiconductor layer 20 is formed on a SiC semiconductor substrate 10, a built-in diode is formed. When this SiC semiconductor device is applied to an inverter circuit or the like, and the built-in diode operates in bipolar mode due to reflux during switching, basal plane dislocations (hereinafter referred to as BPDs) may expand into Shockley stacking faults (hereinafter referred to as SSFs). That is, holes passing near BPDs recombine with electrons in the n-type layer, generating large recombination energy, causing the BPDs to expand into SSFs. SSFs occupy a larger area than BPDs and are prone to degrading the electrical characteristics of SiC semiconductor devices, i.e., causing current degradation of the diode. Therefore, it is desirable to suppress the expansion of BPDs into SSFs. V has the effect of suppressing this expansion.

[0022] In this way, the first layer 21 is doped with N to have an n-type conductivity, and is also doped with V to suppress degradation of the diode during conduction. N and V have different substitution sites, with V substituting for the Si site and N substituting for the C site. The first layer 21 contains both of these elements with different substitution sites.

[0023] The second layer 22 is formed by doping SiC with N as an element. Alternatively, the second layer 22 is formed by doping N and V as elements, with the V doping amount being sufficiently smaller than that of the first layer 21, for example, 1 / 10 or less. As with the first layer 21, N is doped to make the second layer 22 n-type.

[0024] In this way, the SiC semiconductor layer 20 is formed by alternately stacking the first layers 21 doped with N and V and the second layers 22 doped with only N or N and a small amount of V. The film thicknesses of the first layers 21 and the second layers 22 may be determined depending on the intended use, as long as the function corresponding to the intended use is obtained. For example, if the SiC semiconductor layer 20 is used as a buffer layer, the first layers 21 and the second layers 22 are each approximately 0.1 to 0.5 μm thick, and the total thickness is the number of stacked first layers 21 and second layers 22. The SiC semiconductor wafer is formed in a disk shape, and each first layer 21 has the same thickness at the center Ra and the outer edge Rb of the SiC semiconductor wafer within the same layer. Similarly, each second layer 22 has the same thickness at the center Ra and the outer edge Rb of the SiC semiconductor wafer within the same layer.

[0025] It is preferable that the thicknesses of the first layer 21 and the second layer 22 are the same for all pairs of first layers 21 and second layers 22, each consisting of one consecutively formed first layer 21 and one consecutively formed second layer 22. However, it is sufficient that the thicknesses of the first layer 21 and the second layer 22 are uniform in at least each pair.

[0026] Furthermore, even if the central portion Ra and the outer edge portion Rb have different concentration profiles when the first layer 21 and the second layer 22 are viewed individually, the concentrations of N and V are approximately equal when each pair of the first layer 21 and the second layer 22 are viewed as a whole. Here, the wafer positions of the central portion Ra and the outer edge portion Rb are, for example, 0 mm from the wafer center, and approximately 10 mm from the wafer outer edge. If the silicon carbide semiconductor wafer has a diameter of 6 inches, the central portion Ra is located at 0 mm from the wafer center, and the outer edge portion Rb is located at 65 mm from the wafer center because the outer edge of a 6-inch wafer is approximately 75 mm from the wafer center. If the diameter is 8 inches, the central portion Ra is located at 0 mm from the wafer center, and the outer edge portion Rb is located at 90 mm from the wafer center because the outer edge of an 8-inch wafer is approximately 100 mm from the wafer center.

[0027] As shown in FIG. 2A , the V concentration has a similar profile in the depth direction, i.e., with respect to the depth from the surface of the SiC semiconductor layer 20 opposite the SiC semiconductor substrate 10, in the central portion Ra and the outer edge portion Rb. Specifically, in the first layer 21, the V concentration is uniform at a predetermined value in both the central portion Ra and the outer edge portion Rb. In the second layer 22, the V concentration is almost zero in both the central portion Ra and the outer edge portion Rb. The average value (hereinafter referred to as the average V concentration) obtained by dividing the V content of the entire SiC semiconductor layer 20, including both the first layer 21 and the second layer 22, by the entire thickness of the SiC semiconductor layer 20 is the median value of the V concentration in the first layer 21 and the V concentration in the second layer 22. This value is within the range of the concentration required for the V concentration of the SiC semiconductor layer 20.

[0028] 2B, the N concentration profile in the depth direction is different between the central portion Ra and the outer edge portion Rb. Specifically, in the first layer 21, the N concentration is lower in the central portion Ra than in the outer edge portion Rb, and in the second layer 22, the N concentration is higher in the central portion Ra than in the outer edge portion Rb. In the outer edge portion Rb, the N concentration is lower in the first layer 21 than in the second layer 22, but the difference is small, and the N concentrations in the first layer 21 and the second layer 22 are approximately equal. On the other hand, in the central portion Ra, the N concentration is lower in the first layer 21 than in the second layer 22, and the difference is larger than in the outer edge portion Rb. However, the average value (hereinafter referred to as the average N concentration) obtained by dividing the V content of the entire SiC semiconductor layer 20, including both the first layer 21 and the second layer 22, by the entire thickness of the SiC semiconductor layer 20 is the same in both the central portion Ra and the outer edge portion Rb. In other words, the median values ​​of the N concentration in the first layer 21 and the second layer 22 are almost the same in the central portion Ra and the outer edge portion Rb. This value is within the range of the N concentration required for the SiC semiconductor layer 20.

[0029] As described above, the V concentration is high in the first layer 21 and low in the second layer 22, but the average V concentration is set to fall within a predetermined range. That is, when the SiC semiconductor layer 20 is used as a buffer layer, the average V concentration is set to a concentration that satisfies the degradation of diode conduction. Also, although the N concentration profiles are different between the central portion Ra and the outer edge portion Rb, the average N concentration is consistent within a predetermined range in both the central portion Ra and the outer edge portion Rb. That is, when the SiC semiconductor layer 20 is used as a buffer layer, the concentration is set to be such that it can buffer the mismatch due to the difference in concentration of impurities that serve as carriers between the SiC semiconductor substrate 10 and the drift layer.

[0030] As a result, even if there are variations in the V concentration and the N concentration in each of the first layer 21 and the second layer 22, the average V concentration and the average N concentration can be the same in the central portion Ra and the outer edge portion Rb of the SiC semiconductor layer 20. Therefore, when doping with elements having different substitution sites, it is possible to obtain a SiC semiconductor wafer that can suppress variations in the concentrations and film thicknesses of the two types of dopants.

[0031] Furthermore, when manufacturing a SiC semiconductor device using such a SiC semiconductor wafer, semiconductor elements such as MOSFETs incorporating diodes are fabricated using the same layout in both the central portion Ra and the outer edge portion Rb, followed by dicing. In this case, the profiles of the first layer 21 and the second layer 22 constituting the SiC semiconductor layer 20 are different between the MOSFET formed in the central portion Ra and the MOSFET formed in the outer edge portion Rb, but the average V concentration and average N concentration are the same. Therefore, when using the SiC semiconductor layer 20 as a buffer layer, the central portion Ra and the outer edge portion Rb can function similarly as buffer layers, and electrical characteristics can also be made uniform. This makes it possible to provide a SiC semiconductor device with little variation in the concentrations and film thicknesses of the two types of dopants.

[0032] [Method for manufacturing SiC semiconductor wafers] Next, a method for manufacturing a SiC semiconductor wafer according to this embodiment will be described. The SiC semiconductor wafer is manufactured by growing a SiC semiconductor layer 20 on a SiC semiconductor substrate 10. To manufacture the SiC semiconductor wafer, a device is used that can introduce a silane-based gas as a Si source gas and a hydrocarbon-based gas as a C source gas, and that can adjust the gas flow rate to make the C / Si ratio different between the center portion Ra and the outer edge portion Rb. For example, a CVD (chemical vapor deposition) device for epitaxial growth shown in FIG. 3 is used. Silane (SiH4), for example, can be used as the Si source gas, and propane (C3H8), for example, can be used as the C source gas.

[0033] First, a SiC semiconductor substrate 10 is prepared, which is made of a SiC single crystal and has an off-axis angle of 0 to 8° relative to the (0001) Si plane, with the <11-20> direction as the off-axis direction. Next, as shown in FIG. 3, the SiC semiconductor substrate 10 is placed on a susceptor 102 in a chamber 101 of a CVD apparatus 100, and the SiC semiconductor substrate 10 is rotated as indicated by arrow A1. Furthermore, as process gases, in addition to a Si source gas and a C source gas, for example, H2 (hydrogen) is used as a carrier gas, and NH3 (ammonia) and VCl4 (vanadium chloride) are introduced as N dopant gases and V dopant gases, respectively. The susceptor 102 is then heated to a temperature of 1600 to 1750°C. Then, a first layer growth process and a second layer growth process are repeatedly performed in the CVD apparatus 100 to epitaxially grow a SiC semiconductor layer 20.

[0034] (1) First layer growth process The first layer growth step is a step of epitaxially growing the first layer 21. Specifically, the C / Si ratio is made different between the central portion Ra and the outer edge portion Rb, and the first layer 21 is grown with a profile that prioritizes uniformity of the in-plane distribution of the V concentration, even if in-plane variations in the N concentration occur between the central portion Ra and the outer edge portion Rb. The term "uniformity of the in-plane distribution of the V concentration" used here means that the V concentration in the first layer 21 is uniform within a predetermined range within the surface of the SiC semiconductor wafer, but does not need to be completely uniform. In other words, it is sufficient that the in-plane distribution of the V concentration is smaller than the in-plane distribution of the N concentration in the first layer 21, and that the V concentration is uniform within the surface. For example, it is sufficient that the variation in the V concentration between the central portion Ra and the outer edge portion Rb is ±30% or less of the average V concentration in the first layer 21.

[0035] For example, for C3H8, which is a C source gas in the SiC source gas 103, the gas supply ratio at the center portion Ra is set to X, and the gas supply ratio at the outer edge portion Rb is set to 1-X. Also, for SiH4, which is a Si source gas in the SiC source gas 103, the gas supply ratio at the center portion Ra is set to Y, and the gas supply ratio at the outer edge portion Rb is set to 1-Y. The total supply amount of the SiC source gas 103, which is the sum of the central portion Ra and the outer edge portion Rb, is set to 1, and this supply amount is set to a supply amount corresponding to the C / Si ratio in the chamber 101. Specifically, as shown in FIG. 3, in the CVD apparatus 100, there are a portion in the chamber 101 where the SiC source gas 103 is supplied from a position corresponding to the central portion Ra of the SiC semiconductor substrate 10, and a portion where the SiC source gas 103 is supplied from a position corresponding to the outer edge portion Rb. The supply ratios of the C source gas and the Si source gas in the SiC source gas 103 corresponding to the central portion Ra and the SiC source gas 103 corresponding to the outer edge portion Rb are made different, and the total supply amount of the SiC source gas 103 is set to a supply amount corresponding to the C / Si ratio in SiC growth.

[0036] When growing the first layer 21, the C source gas and the Si source gas are set to a first distribution ratio (X1, Y1), i.e., the gas supply ratio at the center portion Ra is set to X1 for the C source gas and Y1 for the Si source gas. The first distribution ratio (X1, Y1) is the distribution ratio at which the V concentration at the center portion Ra and the outer edge portion Rb becomes uniform when the SiC semiconductor layer 20 is pre-formed through an experiment. When the diameter of the SiC semiconductor substrate 10 is 6 inches, the center portion Ra is set to a position 0 mm from the wafer center, for example, and the outer edge portion Rb is set to a position 65 mm from the wafer center, for example, and the N concentration and V concentration are measured at each location. The N concentration and V concentration can be determined by SIMS (secondary ion mass spectrometry), CV measurement, etc.

[0037] 4A and 4B, the N concentration in the central portion Ra is lower than that in the outer peripheral portion Rb, resulting in a downwardly convex relationship. On the other hand, the V concentration in both the central portion Ra and the outer peripheral portion Rb can be made uniform within a predetermined range.

[0038] In an experiment, a first layer 21 was grown on a 6-inch SiC semiconductor substrate 10 with a first distribution ratio (X1, Y1), and the N concentration and V concentration were measured at a central portion Ra, which was a position 0 mm away from the wafer center, and at an outer edge portion Rb, which was a position 65 mm away from the wafer center. The results were as shown in Figures 5A and 5B, and the V concentration shown in Figure 5B was approximately the same in both the central portion Ra and the outer edge portion Rb, while the N concentration shown in Figure 5A was 1.8 to 1.9 times that in the outer edge portion Rb relative to the central portion Ra.

[0039] (2) Second layer growth process The second layer growth step is a step of epitaxially growing the second layer 22. Specifically, the C / Si ratio is made different between the central portion Ra and the outer edge portion Rb, so that the relationship between the high and low N concentrations in the central portion Ra and the outer edge portion Rb is reversed from that in the first layer 21. The V concentration is set to zero or sufficiently smaller than that in the first layer 21, for example, 1 / 10 or less of that in the first layer 21.

[0040] Even during the growth of the second layer 22, set the distribution ratios of the C source gas and the Si source gas between the central portion Ra and the outer edge portion Rb to be different from those during the growth of the first layer 21. Specifically, for the C source gas and the Si source gas at the second distribution ratio (X2, Y2), that is, the gas supply ratio at the central portion Ra, set it to X2 for the C source gas and Y2 for the Si source gas. For example, when the N concentration of the first layer 21 grown at the first distribution ratio (X1, Y1) is lower in the central portion Ra than in the outer edge portion Rb, the second distribution ratio (X2, Y2) is set so that the C / Si ratio of the central portion Ra is lower than that of the first distribution ratio (X1, Y1). That is, at least one of X1 > X2 and Y1 < Y2 should hold. Also, the second distribution ratio (X2, Y2) may be set based on, for example, the distribution ratio when the relationship between the N concentrations at the central portion Ra and the outer edge portion Rb is reversed from that of the first layer 21 when the SiC semiconductor layer 20 is pre-formed by experiments. In that case, the N concentration may be measured at the same positions as when the first layer 21 is formed by experiments. For example, when the diameter of the SiC semiconductor substrate 10 is 6 inches, the positions at a distance of 0 mm and 65 mm from the center of the wafer may be measured as the central portion Ra and the outer edge portion Rb, respectively.

[0041] Thus, when the second layer 22 is grown with the second distribution ratio (X2, Y2), as shown in FIG. 6A, for the N concentration, the relationship is convex such that the central portion Ra is higher than the outer edge portion Rb. Therefore, as the average N concentration, both the central portion Ra and the outer edge portion Rb can be made to fall within the range of a predetermined value. Also, as shown in FIG. 6B, for the V concentration, both the central portion Ra and the outer edge portion Rb can be made substantially zero. Therefore, the average V concentration calculated from the total thickness of the SiC semiconductor layer 20 is defined by the V concentration of the first layer 21, and both the central portion Ra and the outer edge portion Rb can be made to fall within the range of a predetermined value.

[0042] The average N concentration need only be uniform within a predetermined range, and does not need to be completely uniform. That is, it is sufficient that the variation is smaller than the in-plane distribution in the first layer 21 and that the average N concentration is uniform within the plane. For example, it is sufficient that the variation in the average N concentration between the central portion Ra and the outer edge portion Rb is ±30% or less of the average value of the N concentration in the SiC semiconductor layer 20.

[0043] In an experiment, the second layer 22 was grown on a 6-inch SiC semiconductor substrate 10 with the second distribution ratio (X2, Y2), and the N concentration and V concentration were measured at a central portion Ra, which was a position 0 mm away from the wafer center, and at an outer edge portion Rb, which was a position 65 mm away from the wafer center. The results shown in FIG. 7A were obtained, and the N concentration in the outer edge portion Rb was about 2 / 3 times that of the central portion Ra.

[0044] For reference, the V concentration of the second layer 22 was examined when a V-containing gas was introduced into the second layer 22 at the second distribution ratio (X2, Y2), similarly to the growth of the first layer 21. The results shown in FIG. 7B indicated that the V concentration in the center portion Ra was lower than that in the outer peripheral portion Rb. This relationship, as indicated by the dashed line in FIG. 6B, is a downwardly convex relationship in which the V concentration in the center portion Ra is lower than that in the outer peripheral portion Rb. Therefore, if the second layer 22 is doped with V at the same level as the first layer 21, in-plane variations in the V concentration will occur when the first layer 21 and the second layer 22 are considered together. However, if the V concentration in the second layer 22 is nearly zero or the V concentration in the second layer 22 is sufficiently lower than that of the first layer 21, as in this embodiment, in-plane variations in the V concentration can be eliminated when the first layer 21 and the second layer 22 are considered together.

[0045] According to the method for manufacturing a SiC semiconductor wafer described above, it is possible to make the average V concentration and average N concentration uniform in both the central portion Ra and the outer edge portion Rb, even if there are variations in the V concentration and N concentration in each of the first layer 21 and the second layer 22. Therefore, when doping with elements having different substitution sites, it is possible to obtain a SiC semiconductor wafer in which in-plane variations in the concentrations and film thickness of the two types of dopants can be suppressed.

[0046] (Other embodiments) Although the present disclosure has been described based on the above-described embodiment, it is not limited to the embodiment and encompasses various modifications and modifications within the equivalent range. In addition, various combinations and forms, as well as other combinations and forms including only one element, more than one element, or less than one element, are also within the scope and spirit of the present disclosure.

[0047] For example, in the above embodiment, V is used as the element substituted at the Si site and V is used as the element substituted at the C site, but other elements can also be used. For example, elements that can substitute at the Si site include Al, P, etc. in addition to V, and elements that can substitute at the C site include B, etc. in addition to N.

[0048] In the above embodiment, V is used as the element substituted at the Si site, and N is used as the element substituted at the C site, so when the V concentration in the first layer 21 is made constant in the center portion Ra and the outer edge portion Rb, the N concentration in the center portion Ra is lower than that in the outer edge portion Rb. This is also just one example, and since it depends on the elements used, the C / Si ratio conditions can be set according to the elements used.

[0049] That is, when the concentration of the element that does not control the conductivity type in the first layer 21 is the same in the central portion Ra and the outer peripheral portion Rb, the concentration of the element that controls the conductivity type may be higher in the central portion Ra than in the outer peripheral portion Rb. In this case, during the growth of the second layer 22, the concentration of the element that does not control the conductivity type may be set to almost zero, and the C / Si ratio conditions for the element that controls the conductivity type may be set so that the relationship between the concentrations of the first layer 21, the central portion Ra, and the outer peripheral portion Rb is reversed. Note that the element that controls the conductivity type here refers to an n-type impurity element when the SiC semiconductor layer 20 is to be n-type, or a p-type impurity element when the SiC semiconductor layer 20 is to be p-type. The element that does not control the conductivity type may refer to an element that is neither an n-type nor a p-type impurity element, such as V, as well as a p-type impurity element that is the opposite conductivity type when the SiC semiconductor layer 20 is to be n-type.

[0050] In the above embodiment, the relationship between the doping element concentrations of the first layer 21 and the second layer 22 of each pair formed in the order of forming the first layer 21 on the SiC semiconductor substrate 10 and then forming the second layer 22 thereon may be reversed. That is, the second layer 22 is doped with N to have an n-type conductivity, and V is also doped to suppress current degradation of the diode. The first layer 21 may be doped with N as an element, or may be doped with N and V as elements, with the V doping amount being sufficiently smaller than that of the second layer 22. In this way, the N concentration in the center portion Ra of the first layer 21 is higher than that in the outer edge portion Rb, and the N concentration in the center portion Ra of the second layer 22 is lower than that in the outer edge portion Rb, thereby achieving the same effect as in the above embodiment. Furthermore, although the SiC semiconductor wafer is described as being disk-shaped in the above embodiment, this does not mean that the outer shape is perfectly circular. The SiC semiconductor wafer may have a linear orientation flat formed in part or a notch formed by cutting out a portion of the periphery.

[0051] When indicating the crystal orientation, a bar (-) should normally be placed above the desired number. However, due to limitations on expression based on electronic filing, in this specification, a bar will be placed before the desired number. [Explanation of symbols]

[0052] 10...SiC semiconductor substrate, 20...SiC semiconductor layer, 21...first layer, 22...second layer, 100...CVD apparatus, 101...chamber, 102...susceptor, 103...SiC source gas, Ra...center, Rb...outer edge

Claims

1. A silicon carbide semiconductor wafer having a disk shape having a center portion (Ra) and an outer edge portion (Rb), A silicon carbide semiconductor substrate (10), a silicon carbide semiconductor layer (20) composed of an epitaxially grown layer formed on the silicon carbide semiconductor substrate; The silicon carbide semiconductor layer has at least one first layer (21) and one second layer (22), the first layer is doped with an element that controls the conductivity type of the silicon carbide semiconductor layer and an element that does not control the conductivity type of the silicon carbide semiconductor layer, one of which is an element that substitutes for an Si site and the other of which is an element that substitutes for a C site, and within a plane of the first layer, the concentration of the element that controls the conductivity type is different between the central portion and the outer edge portion, while the concentration of the element that does not control the conductivity type is uniform; the second layer is doped with an element that controls the conductivity type, and is not doped with an element that does not control the conductivity type or the element is doped at a lower concentration than the first layer, and within the plane of the second layer, the relationship between the high and low concentrations of the element that controls the conductivity type in the central portion and the outer edge portion is reversed to that in the first layer.

2. The silicon carbide semiconductor wafer according to claim 1 , wherein a plurality of pairs of the first layer and the second layer formed successively are repeatedly formed.

3. the second layer is formed on the first layer; the first layer and the second layer are doped with N as an element that controls the conductivity type and is substituted at the C site; Furthermore, the first layer is doped with V as an element that does not control the conductivity type and is substituted for the Si site, In the first layer, the central portion has a lower N concentration than the outer edge portion, 3. The silicon carbide semiconductor wafer according to claim 1, wherein the second layer has a higher N concentration in the central portion than in the outer edge portion.

4. the second layer is formed on the first layer; the first layer and the second layer are doped with N as an element that controls the conductivity type and is substituted at the C site; Furthermore, the first layer is doped with V as an element that does not control the conductivity type and is substituted for the Si site, In the first layer, the central portion has a higher N concentration than the outer edge portion, 3. The silicon carbide semiconductor wafer according to claim 1, wherein the second layer has a lower N concentration in the central portion than in the outer edge portion.

5. A method for manufacturing a silicon carbide semiconductor wafer having a disk shape having a center portion (Ra) and an outer edge portion (Rb), Providing a silicon carbide semiconductor substrate (10); epitaxially growing a silicon carbide semiconductor layer (20) on the silicon carbide semiconductor substrate; The formation of the silicon carbide semiconductor layer includes forming a first layer (21) and forming a second layer (22); In forming the first layer, either one of an element that controls the conductivity type of the silicon carbide semiconductor layer and an element that does not control the conductivity type of the silicon carbide semiconductor layer is doped as an element substituted at the Si site, and the other is doped as an element substituted at the C site, and within a plane of the first layer, the concentration of the element that controls the conductivity type is made different between the central portion and the outer edge portion, while the concentration of the element that does not control the conductivity type is made uniform; a second layer formed on the first layer, the second layer being doped with an element that controls the conductivity type, and the second layer being not doped with an element that does not control the conductivity type, or the element being doped at a lower concentration than the first layer, and the relationship between the high and low concentrations of the element that controls the conductivity type in the central portion and the outer edge portion within the plane of the second layer being reversed from that in the first layer.

6. A silicon carbide semiconductor device, A silicon carbide semiconductor substrate (10), a silicon carbide semiconductor layer (20) formed on the silicon carbide semiconductor substrate, which is composed of an epitaxially grown layer and constitutes a buffer layer; The silicon carbide semiconductor layer has at least one first layer (21) and one second layer (22), the first layer is doped with an element that controls the conductivity type of the silicon carbide semiconductor layer and an element that does not control the conductivity type of the silicon carbide semiconductor layer, one of which is an element substituted at an Si site, and the other of which is an element substituted at a C site; the second layer is doped with an element that controls the conductivity type, and is not doped with an element that does not control the conductivity type or the doping concentration of the element is lower than that of the first layer.

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