Quantum computer control device and quantum computer control method

Abstract

To provide a quantum computer control device capable of easily confirming information of a control channel of a quantum computer.SOLUTION: A control device 100 for controlling a quantum bit unit 3 comprises: a transmission unit 20 that is connected to the quantum bit unit, and transmits a control signal for controlling the quantum bit unit through a transmission control channel TX; a reception unit 30 that is connected to the quantum bit unit, and receives a read signal read from the quantum bit unit through a reception control channel RX; a display unit 12 that has displays 13, 16 for each transmission and reception control channel, and displays channel information for the transmission and reception control channels; and a control unit 110 that displays the channel information on the corresponding display in a display mode corresponding to the type of channel information.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a quantum computer control device and a quantum computer control method. [Background technology]

[0002] Quantum computers perform calculations by sequentially performing gate operations on individual quantum bits or on multiple linked quantum bits. A quantum computer control device is used to control these gate operations (see, for example, Patent Document 1).

[0003] Patent Document 1 discloses that an analog circuit, an oscillator circuit, and a baseband circuit for performing gate operation are contained within a single control device, and the analog circuit and oscillator circuit for the baseband circuit are integrated, thereby improving the usability, scalability, and robustness of the control device.

[0004] Currently, quantum computers can handle only a few dozen qubits, but this number is expected to increase in the future. As quantum computers become larger in scale, there is a need to combine multiple quantum computer control devices to control a single quantum computer. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2023-067604 Summary of the Invention [Problem to be solved by the invention]

[0006] Quantum computers perform calculations by sequentially performing gate operations on quantum bits, but the number of quantum bits required for a calculation can exceed the number of quantum bits that can be controlled by a single control device. In such cases, a control system must be configured by combining multiple control devices to control a single quantum computer. Therefore, the time required for gate operations must be managed as a whole control system consisting of multiple control devices.

[0007] However, as the number of qubits increases, the wiring of the control channel connecting the qubits and the control device becomes more complex, making the wiring work cumbersome and prone to wiring errors.In addition, it is difficult to determine the operating status of the control channel, making it difficult to identify the cause of a quantum computer malfunction.

[0008] The present invention has been made to solve the above-mentioned problems, and aims to provide a quantum computer control device and a quantum computer control method that can easily check information on the control channel of a quantum computer. [Means for solving the problem]

[0009] In order to achieve the above object, a quantum computer control device (hereinafter also referred to as a control device) according to the present invention is a control device (100) for controlling a quantum bit unit, and includes a transmitter (20) connected to the quantum bit unit and transmitting a control signal for controlling the quantum bit unit through a control channel for transmission, a receiver (30) connected to the quantum bit unit and receiving a read signal read out from the quantum bit unit through a control channel for reception, and indicators (131,...,132) for each of the control channels for transmission and reception. N ,161,...,16 M ) and is characterized by comprising a display unit (12, 15) for displaying channel information of the control channels for transmission and reception, and a control unit (110) for displaying the channel information on the corresponding display in a display mode corresponding to the type of the channel information.

[0010] As described above, in the control device of the present invention, the display unit has a display for each of the control channels for transmission and reception, and displays channel information for the control channels for transmission and reception, and the control unit displays the channel information on the corresponding display in a display mode corresponding to the type of channel information. With this configuration, it is possible to easily check the information on the control channels of the quantum computer.

[0011] In the control device according to the present invention, the channel information may be information specifying the corresponding control channel.

[0012] With this configuration, a specified specific control channel can be clearly indicated by displaying it in a display mode such as bright flashing. As a result, when wiring multiple control channels, for example, more than 1,000 channels, by clearly indicating the control channel to be wired, wiring can be done efficiently. Furthermore, if the wiring order is determined, by clearly indicating the control channel to be wired next in order, wiring work can be done efficiently and reliably.

[0013] In the control device according to the present invention, the channel information may be information indicating an operating status of the corresponding control channel.

[0014] With this configuration, an active control channel can be displayed in a display mode such as lighting, etc. This makes it possible to visually easily check, for example, whether a control channel is active or not.

[0015] In the control device according to the present invention, the channel information may be information indicating a type of the corresponding control signal or read signal.

[0016] With this configuration, the type of control signal or readout signal can be displayed by changing the number of blinks or blinking speed depending on the type of control signal or readout signal, making it easy to visually check the type of control signal or readout signal of the control channel in operation.

[0017] In the control device according to the present invention, the channel information may be information for identifying a user using the corresponding control channel.

[0018] With this configuration, when multiple users control a quantum computer, it is possible to distinguish between users by, for example, changing the display color for each user, making it easy to visually confirm which user is using which control channel.

[0019] In the control device according to the present invention, the channel information may be information indicating whether or not an abnormality has occurred in the corresponding control channel.

[0020] With this configuration, a control channel in which an abnormality has occurred can be clearly indicated (displayed) in a display format such as a bright flashing red light, etc. This allows the control channel in which an abnormality has occurred to be visually confirmed, allowing for quick troubleshooting.

[0021] In the control device according to the present invention, the display mode may be specified by a combination of a display color, brightness, and lighting mode of the indicator, and the lighting mode may be lighting or blinking.

[0022] This configuration makes it possible to easily check the type of channel information.

[0023] A quantum computer control system (hereinafter also referred to as a control system) according to the present invention is a control system including a plurality of control devices (100, 200) for controlling a quantum bit unit to achieve the above-mentioned object, and each of the control devices includes a transmitter (20) connected to the quantum bit unit and transmitting a control signal for controlling the quantum bit unit through a control channel for transmission, a receiver (30) connected to the quantum bit unit and receiving a read signal read out from the quantum bit unit through a control channel for reception, and a display (131,...,132) for each of the control channels for transmission and reception. N,161,...,16 M ) and is characterized by comprising a display unit (12, 15) for displaying channel information of the control channels for transmission and reception, and a control unit (110) for displaying the channel information on the corresponding display in a display mode corresponding to the type of the channel information.

[0024] As described above, in the control device constituting the control system of the present invention, the display unit has a display device for each of the control channels for transmission and reception, and displays channel information for the control channels for transmission and reception, and the control unit causes the channel information to be displayed on the corresponding display device in a display mode corresponding to the type of channel information. With this configuration, even in a control system configured by combining multiple control devices to control multiple quantum bits, it is possible to easily check the information on the control channels of the quantum computer.

[0025] In order to achieve the above object, a quantum computer control method (hereinafter also referred to as a control method) according to the present invention includes, in a control device (100) for controlling a quantum bit, a transmitting step of transmitting a control signal for controlling the quantum bit to the quantum bit through a control channel for transmission, a receiving step of receiving a read signal read from the quantum bit from the quantum bit through a control channel for reception, and a display (131,...,132) provided for each of the control channels for transmission and reception. N ,161,...,16 M ) and a display step of displaying channel information of the control channels for transmission and reception, wherein the display step displays the channel information on the corresponding display device in a display mode corresponding to the type of the channel information.

[0026] As described above, the control method of the present invention includes a display step of displaying channel information of the transmission and reception control channels on a display device provided for each of the transmission and reception control channels, and in the display step, the channel information is displayed on the corresponding display device in a display mode corresponding to the type of channel information. With this configuration, the information on the control channels of the quantum computer can be easily confirmed. [Effects of the Invention]

[0027] According to the present invention, it is possible to provide a quantum computer control device and a quantum computer control method that allow information on the control channel of a quantum computer to be easily confirmed. [Brief explanation of the drawings]

[0028] [Figure 1] 1 is a diagram showing a schematic configuration of a quantum computer control device according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a diagram showing the configuration of a display unit of the quantum computer control device according to the first embodiment of the present invention. [Figure 3] FIG. 10 is a diagram showing the configuration of a quantum computer control device and a quantum computer control system according to a second embodiment of the present invention. [Figure 4] FIG. 10 is a diagram illustrating the configuration of a transmitter / receiver unit of a quantum computer control device according to a second embodiment of the present invention. [Figure 5] FIG. 10 is a diagram for explaining clock synchronization in a quantum computer control device or control system according to a second embodiment of the present invention. [Figure 6] FIG. 10 is a diagram for explaining clock synchronization using a tree hierarchical structure in a quantum computer control device or control system according to a second embodiment of the present invention. [Figure 7] FIG. 10 is a diagram showing an example of a rack configuration of a quantum computer control system according to a second embodiment of the present invention. [Figure 8] FIG. 10 is a diagram showing another example of a rack configuration of the quantum computer control system according to the second embodiment of the present invention. [Figure 9] FIG. 10 is a diagram showing the front panel of a quantum computer control device according to a second embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0029] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0030] (First embodiment) 1 is a diagram showing the configuration of a control device 100 of a quantum computer 1 according to a first embodiment of the present invention. As shown in FIG. 1, the quantum computer 1 includes a quantum bit unit 3 and a control device 100.

[0031] The quantum bit section 3 may be configured to include, for example, several tens of superconducting quantum bits, or may be configured to include several thousand quantum bits handled by a medium-sized NISQ (Noisy Intermediate-Scale Quantum Computer), or may be configured to include even more quantum bits.

[0032] The control device 100 controls the quantum bit unit 3, and includes a transmitting unit 20, a receiving unit 30, a display unit 12 for transmitting, a display unit 15 for receiving, and a control unit 110.

[0033] The transmitter 20 is connected to the quantum bit unit 3 and transmits control signals for controlling the quantum bit unit 3 via a plurality of control channels TX1, TX2, . . . , TX N (collectively referred to as TX), where N is any natural number. Specifically, the control channel TX1 is formed by a wiring 221 connected to the terminal 211, and the control channel TX2 is formed by a wiring 222 connected to the terminal 212. N Terminal 21 N Wiring 22 connected to N It is formed by

[0034] The receiver 30 is connected to the quantum bit unit 3 and receives signals read out from the quantum bit unit 3 via a plurality of control channels RX1, RX2, . . . , RX M (collectively referred to as RX), where M is any natural number. Specifically, the control channel RX1 is formed by a wiring 321 connected to the terminal 311, the control channel RX2 is formed by a wiring 322 connected to the terminal 312, and so on. M is terminal 31 M Wiring connected to 32 M It is formed by

[0035] The display unit 12 for transmission displays the control channels TX1, TX2, . . . , TX N For each indicator 13 (specifically 131, 132, ..., 13 N ) and control channels TX1, TX2,...,TX N The display unit 15 for reception is configured to display the channel information of the reception control channels RX1, RX2, ..., RX M For each indicator 16 (specifically 161, 162, ..., 16 M ) and control channels RX1, RX2,...,RX M The channel information for each channel is displayed.

[0036] The control unit 110 is configured to display the channel information on the corresponding display devices 13 and 16 in a display format corresponding to the type of the channel information.

[0037] In this way, the display unit 12 for transmission uses the control channels TX1, TX2, . . . , TX N For each indicator 131, 132,...,13 N The display unit 15 for reception has a display mode corresponding to the type of the channel information of the control channel TX for transmission, and the control unit 110 displays the channel information on the corresponding display 13 in a display mode corresponding to the type of the channel information. MFor each indicator 161, 162,...,16 M and displays the channel information of the receiving control channel RX, and at that time, the control unit 110 causes the channel information to be displayed on the corresponding display 16 in a display mode corresponding to the type of channel information. With this configuration, the information on the control channel of the quantum computer 1 can be easily confirmed.

[0038] The display mode is specified by a combination of the display color, brightness, and lighting mode of the indicators 13, 16. The lighting mode may be lighting or blinking. This configuration allows the type of channel information to be easily confirmed.

[0039] 2 is a diagram showing the display unit 12 for transmission and the display unit 15 for reception of the control device 100 of the quantum computer 1 according to the first embodiment of the present invention. As shown in FIG. 2, the display unit 12 for transmission displays the transmission control channels TX1, TX2, ..., TX N In contrast, indicators such as LEDs 131, 132,...,13 N In addition, indicators 131, 132, ..., 13 N adjacent to the control channels TX1, TX2,...,TX N Connectors for wiring 141, 142,...,14 N is provided.

[0040] The display unit 15 for reception also displays the control channels RX1, RX2, . . . , RX M On the other hand, indicators such as LEDs 161, 162,...,16 M Indicators 161, 162,...,16 M adjacent to the control channels RX1, RX2, ..., RX M Connectors for wiring 171, 172,...,17 M is provided.

[0041] The channel information may be information specifying the corresponding control channels TX and RX. With this configuration, the specified specific control channels TX and RX can be clearly displayed, for example, in a bright flashing display mode. This allows efficient wiring when wiring multiple control channels, for example, more than 1,000 channels, by clearly indicating the control channel to be wired. Furthermore, if the wiring order is determined, the wiring work can be performed efficiently and reliably by clearly indicating the control channel to be wired next in order.

[0042] Furthermore, the channel information may be information indicating the operating status of the corresponding control channels TX and RX. With this configuration, the control channels TX and RX that are in operation can be displayed in a display mode such as lighting. This makes it easy to visually check whether the control channels TX and RX are in operation.

[0043] The channel information may also be information indicating the type of the corresponding control signal or readout signal. With this configuration, the type of control signal or readout signal can be displayed in a display mode, such as by changing the number of blinks depending on the type of control signal or readout signal. This makes it easy to visually check the type of control signal or readout signal of the control channels TX and RX currently in operation.

[0044] Furthermore, the channel information may be information that identifies the user using the corresponding control channel TX, RX. With this configuration, when multiple users control the quantum computer, it is possible to distinguish between users by, for example, changing the display color for each user. This makes it easy to visually check which user is using which control channel TX, RX.

[0045] Furthermore, the channel information may be information indicating whether or not an abnormality has occurred in the corresponding control channel TX, RX. With this configuration, the control channel TX, RX in which an abnormality has occurred can be clearly indicated (displayed) in a display format such as a bright flashing red light. This allows visual confirmation of the control channel TX, RX in which an abnormality has occurred, thereby enabling quick troubleshooting.

[0046] (Second embodiment) Next, a control system 2 of a quantum computer 1 according to a second embodiment of the present invention will be described with reference to the drawings.

[0047] The control system 2 of the quantum computer 1 according to the second embodiment is configured from multiple control devices, which differs from the first embodiment, which is configured from a single control device. The other configurations are the same as those of the first embodiment, and the same components are assigned the same reference numerals, and detailed descriptions will be omitted as appropriate.

[0048] Fig. 3 is a diagram showing the configuration of a control system 2 in a quantum computer 1 according to a second embodiment of the present invention. As shown in Fig. 3, the quantum computer 1 includes a quantum bit unit 3 and a control system 2 for controlling the quantum bit unit 3. The control system 2 includes a first control device 100 and a second control device 200. Note that the control system 2 may be configured with more than two control devices.

[0049] The first control device 100 includes a control unit 110 , a transmitting / receiving unit 120 , a clock distributor 130 , a trigger signal distributor 140 , a clock latency storage unit 152 , a time counter 160 , and a display unit 170 .

[0050] The control unit 110 is connected to each component in the first control device 100 and controls the overall operation of each component. The control unit 110 also includes a clock latency measurement unit 112.

[0051] The time counter 160 indicates the time of the first control unit 100 .

[0052] The clock distributor 130 distributes the first clock to components inside and outside the first control device 100 .

[0053] The trigger signal distributor 140 distributes the first trigger signal to components inside and outside the first control device 100 based on the time indicated by the time counter 160 or based on a trigger signal received from outside.

[0054] The clock latency measurement unit 112 is configured to measure the latency required to transmit the clock from the clock distributor 130 to the clock distributor 230. The clock latency storage unit 152 is configured to store information about the latency measured by the clock latency measurement unit 112.

[0055] The second control device 200 includes a control unit 210 , a transmitting / receiving unit 220 , a clock distributor 230 , a trigger signal distributor 240 , a clock latency storage unit 252 , a time counter 260 , and a display unit 270 .

[0056] The control unit 210 is connected to each component in the second control device 200 and controls the overall operation of each component. The control unit 210 also includes a clock latency measurement unit 212.

[0057] The time counter 260 indicates the time of the second control device 200 .

[0058] The clock distributor 230 is connected to the clock distributor 130 and is configured to distribute a second clock, which is phase-synchronized with the first clock distributed by the clock distributor 130, to components within the second control device 200.

[0059] The trigger signal distributor 240 is connected to the trigger signal distributor 140, receives the first trigger signal distributed by the trigger signal distributor 140, and distributes a second trigger signal to components within the second control device 200 based on the time indicated by the time counter 260 or based on the first trigger signal.

[0060] The clock latency measurement unit 212 is configured to measure the latency required to transmit a clock from the clock distributor 230 to a clock distributor of another control device. The clock latency storage unit 252 is configured to store information about the latency measured by the clock latency measurement unit 212. The clock latency storage unit 252 may store information about the latency measured by the clock latency measurement unit 112.

[0061] The display units 170 and 270 have the same configuration as the display unit 10 shown in FIG. 2, as in the first embodiment, and each includes a display unit 12 for transmission and a display unit 15 for reception.

[0062] 4 is a diagram showing the configuration of the transceiver units 120 and 220. As shown in FIG. 4, the transceiver units 120 and 220 are each configured to transmit and receive high-frequency radio signals for controlling the quantum bit unit 3, and include a baseband circuit 50 that processes baseband signals and an RF circuit 60 that converts between the baseband signals and high-frequency radio signals. The baseband circuit 50 includes a digital processing circuit 52 that digitally processes the baseband signals, and a digital-to-analog conversion circuit (DAC / ADC circuit) 54 that converts the baseband signals between digital and analog signals. The first and second trigger signals are sent to the DAC / ADC circuit 54 and are used as triggers for the conversion between digital and analog signals.

[0063] During transmission, the digital processing circuit 52 performs digital processing such as framing of parallel data, data scrambling, encoding, and parallel-to-serial conversion. During transmission, the DAC / ADC circuit 54 performs serial-to-parallel conversion on the serial signal received from the digital processing circuit 52, and outputs the result after decoding, descrambling, data generation, and filtering. During reception, the same processing is performed in reverse order to that during transmission.

[0064] The RF circuit 60 includes an upconverter / downconverter 62 that includes a local oscillator, a mixer, and the like. During transmission, a local oscillation signal generated by the local oscillator and an analog signal output from the DAC / ADC circuit 54 are mixed in the mixer and upconverted. The RF signal obtained by the upconversion is provided to the quantum bit unit 3, where a gate operation is performed. During reception, the reverse operation to that performed during transmission is performed. The RF signal sent from the quantum bit unit 3 is downconverted by the RF circuit 60 and sent to the baseband circuit 50. In the baseband circuit 50, the DAC / ADC circuit 54 converts the signal into a digital signal, which is then sent to the control units 110 and 210 via the digital processing circuit 52.

[0065] The trigger signal distributors 140 and 240, the digital processing circuit 52, etc. may be configured using an FPGA (Field Programmable Gate Array).

[0066] (clock synchronization) Next, clock synchronization will be described.

[0067] 5 is a diagram for explaining clock synchronization in the quantum computer control device 100, 200 or control system 2 according to the second embodiment. In the example shown in Fig. 5, a clock distributor 510 is connected to DAC / ADC circuits 520, 521, and 522. Under the control of the clock latency measurement unit 112, the clock distributor 510 calculates the amount of delay and corrects the amount of delay as follows.

[0068] (1) The external SYSREF signal is distributed from the clock distributor 510 to the DAC / ADC circuits 520, 521, and 522. (2) In the DAC / ADC circuits 520, 521, and 522, the internal SYSREF signal is synchronized with the external SYSREF signal. (3) Sending an internal SYSREF signal from the DAC / ADC circuits 520, 521, 522 to the clock distributor 510. (4) Measure the round trip delay in the clock distributor 510. (5) The clock distributor 510 transmits round trip delay information to the DAC / ADC circuits 520, 521, and 522. (6) In the DAC / ADC circuits 520, 521, and 522, the internal SYSREF signal is delayed by the round trip delay.

[0069] Information about the measured round trip delay and information about the delay amount (or latency) obtained from that information may be stored in the clock latency storage unit 152.

[0070] The clock synchronization described above is all performed automatically. With this configuration, the internal SYSREF signals of the DAC / ADC circuits 520, 521, and 522 can be synchronized with the external SYSREF signal with an accuracy of ±5 ps. Even if another clock distributor is interposed between the clock distributor 510 and the DAC / ADC circuits 520, 521, and 522, the delay amount can be corrected in the same way.

[0071] Next, the configuration of a clock distributor that can accommodate a larger number of DAC / ADC circuits will be described.

[0072] Figure 6 is a diagram for explaining clock synchronization using a tree-like hierarchical structure of clock distributors. A multi-qubit quantum computer requires a large number of DAC / ADC circuits in the control system 2. To distribute clocks to a large number of DAC / ADC circuits, clock distributors are connected in a tree structure, as shown in Figure 6.

[0073] 6, clock distributors 510, 511, and 512 distribute clocks synchronized with the clock distributed from clock distributor 500 to DAC / ADC circuits 520, 521, 522, 530, 540, etc., respectively. If the number of tree levels is n, the clock synchronization accuracy is ±√n×5 ps. For example, in NISQ (up to 1000 quantum bits), clock distributors are configured in 4 to 5 stages, and the clock synchronization accuracy in this case is ±10 to 5√5 ps.

[0074] <rack> Next, the tree structure of the unit (chassis) will be explained.

[0075] Fig. 7 is a diagram showing the rack configuration of a control system 2 according to the second embodiment. In the example shown in Fig. 7, the control system 2 has five racks 300, 310, 320, 330, and 340. Rack 300 houses units 301 to 309, rack 310 houses units 311 to 319, rack 320 houses units 321 to 329, rack 330 houses units 331 to 339, and rack 340 houses units 341 to 344. Each unit has a connector for transmitting and receiving various signals such as a clock, allowing the units to be connected to each other.

[0076] In the first level of the tree structure, unit 325 of rack 320 is connected to four slave units 315, 323, 327, and 335. In the second level of the tree structure, unit 315 is connected to five units 305, 313, 314, 316, and 317; unit 335 is connected to four units 333, 334, 336, and 337; unit 323 is connected to three units 321, 322, and 324; and unit 327 is connected to three units 326, 328, and 329.

[0077] In the third level of the tree structure, unit 313 is connected to two units 303 and 311, unit 314 is connected to two units 304 and 312, unit 316 is connected to two units 306 and 318, unit 317 is connected to two units 307 and 319, unit 333 is connected to two units 331 and 343, unit 334 is connected to two units 332 and 344, unit 336 is connected to one unit 338, and unit 337 is connected to one unit 339.

[0078] At the fourth level of the tree structure, unit 311 is connected to one unit 301, unit 312 is connected to one unit 302, unit 318 is connected to one unit 308, unit 319 is connected to one unit 309, unit 331 is connected to one unit 341, and unit 332 is connected to one unit 342.

[0079] As described above, in the example shown in FIG. 7, the units have a four-stage tree structure, the synchronization accuracy of the master is ±10 ps, ​​and the synchronization accuracy of all clock distributors is ±5√5 ps.

[0080] 8 is a diagram showing another example of the rack configuration of the control system 2 according to the second embodiment. In FIG. 8, the portion labeled "Q Unit" corresponds to one control device 100.

[0081] FIG. 9 is a diagram showing a front panel 40 of a control device 100 included in a control system 2 according to the second embodiment. The front panel 40 is provided with a display unit 10 including a transmitting display unit 12 and a receiving display unit 15. The transmitting display unit 12 has a plurality of indicators 13, such as LEDs, arranged in two rows, with a corresponding connector 14 arranged adjacent to each indicator 13. The connectors 14 are also arranged in two rows. Similarly, the receiving display unit 15 has a plurality of indicators 16, such as LEDs, arranged in two rows, with a corresponding connector 17 arranged adjacent to each indicator 16. The connectors 17 are also arranged in two rows.

[0082] (Action and effect) As described above, in the control device 100 of the first and second embodiments, the display units 12 and 15 display the displays 131, . . . , 133 for each of the control channels for transmission and reception. N ,161,...,16 M The control unit 110 displays the channel information on the corresponding displays 13, 16 in a display format corresponding to the type of channel information. This configuration makes it possible to easily check the information on the control channels of the quantum computer 1.

[0083] In the control device 100 according to the above embodiment, the channel information may be information specifying the corresponding control channels TX and RX. With this configuration, the specified specific control channel can be clearly indicated by a display mode such as bright flashing. As a result, when wiring multiple control channels, for example, more than 1000 channels, by clearly indicating the control channel to be wired, wiring can be performed efficiently.

[0084] The control system 2 according to the embodiment is comprised of multiple control devices 100, 200, each of which includes a transmission display unit 12 and a reception display unit 15. The transmission display unit 12 has a display 13 for each transmission control channel, and the reception display unit 15 has a display 16 for each reception control channel, each displaying channel information for the transmission and reception control channels. The control unit 110 controls the corresponding display units 13, 16 to display the channel information in a display format corresponding to the type of channel information. This configuration allows the control system 2, which is configured by combining multiple control devices 100, 200 to control multiple quantum bits, to easily check the information on the control channel of the quantum computer 1. [Industrial Applicability]

[0085] As described above, the present invention has the effect of making it possible to easily check information on the control channel of a quantum computer, and is useful in quantum computer control devices, control systems, and control methods in general. [Explanation of symbols]

[0086] 1. Quantum computers 2. Control System 3 Quantum Bits 10, 170, 270 display 12 Display for transmission 13, 16 Display 14, 17 Connector 15 Receiving display 20 Transmitter Terminals 21 and 31 22, 32 wiring 30 Receiving unit 40 Front Panel 50 Baseband Circuit 52 Digital Processing Circuit 54, 510, 511, 512, 520, 521, 522, 530, 540 DAC / ADC circuit 60 RF circuits 62 Upconverter / Downconverter 100, 200 Control device (quantum computer control device) 110, 210 control unit 112, 212 Clock latency measurement unit 120, 220 Transmitter / Receiver 130, 230, 500, 510, 511, 512 Clock Distributor 140, 240 Trigger signal distributor 152, 252 clock latency storage 160, 260 Time Counter 300, 310, 320, 330, 340 racks 301~309, 311~319, 321~329, 331~339, 341~344 Unit (chassis) TX Control channel for transmission RX Control channel for receiving

Claims

1. A control device (100) for controlling a quantum bit unit, a transmission unit (20) connected to the quantum bit unit and transmitting a control signal for controlling the quantum bit unit through a transmission control channel; a receiver (30) connected to the quantum bit unit and receiving a read signal read from the quantum bit unit through a control channel for reception; A display (13) for each of the transmission and reception control channels １ , ..., 13 Ｎ , 16 １ , ..., 16 Ｍ a display unit (12, 15) for displaying channel information of the control channels for transmission and reception; a control unit (110) for displaying the channel information on the corresponding display device in a display mode corresponding to the type of the channel information; A control device comprising:

2. The control device according to claim 1 , wherein the channel information is information that specifies the corresponding control channel.

3. The control device according to claim 1 , wherein the channel information is information indicating an operating status of the corresponding control channel.

4. The control device according to claim 1 , wherein the channel information is information indicating a type of the corresponding control signal or read signal.

5. The control device according to claim 1 , wherein the channel information is information for identifying a user using the corresponding control channel.

6. The control device according to claim 1 , wherein the channel information is information indicating whether or not an abnormality has occurred in the corresponding control channel.

7. The control device according to claim 1 , wherein the display mode is specified by a combination of a display color, brightness, and lighting mode of the indicator, and the lighting mode is lighting or blinking.

8. A control system (2) including a plurality of control devices (100, 200) for controlling quantum bit units, Each of the control devices is a transmission unit (20) connected to the quantum bit unit and transmitting a control signal for controlling the quantum bit unit through a transmission control channel; a receiver (30) connected to the quantum bit unit and receiving a read signal read from the quantum bit unit through a control channel for reception; A display (13) for each of the transmission and reception control channels １ , ..., 13 Ｎ , 16 １ , ..., 16 Ｍ a display unit (12, 15) for displaying channel information of the control channels for transmission and reception; a control unit (110) for displaying the channel information on the corresponding display device in a display mode corresponding to the type of the channel information; A control system comprising:

9. A control device (100) for controlling a quantum bit, a transmitting step of transmitting a control signal for controlling the quantum bit to the quantum bit through a control channel for transmission; a receiving step of receiving a read signal from the quantum bit through a control channel for receiving the read signal from the quantum bit; A display (13) provided for each of the transmission and reception control channels １ , ..., 13 Ｎ , 16 １ , ..., 16 Ｍ a display step of displaying channel information of the transmission and reception control channels on the display unit; Including, In the display step, the channel information is displayed on the corresponding display device in a display mode corresponding to the type of the channel information.

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