Power amplifier circuit

Abstract

To provide a power amplifier circuit that improves distortion characteristics and efficiency by forming a bypass path for high-frequency components.SOLUTION: A power amplifier circuit 101 comprises: a distribution circuit 41 that distributes an input signal RFin with a phase difference applied; a carrier amplifier 51 that outputs a first amplified signal RF4; a peak amplifier 52 that outputs a second amplified signal RF5; a combiner circuit 42 that combines the first amplified signal and the second amplified signal to generate a third amplified signal RFout; a first bias circuit 151 having a first bias supply terminal 151a that supplies a first bias to a second terminal of a first capacitor 61 through a resistor element 160; a second bias circuit 152 having a second bias supply terminal 152a that supplies a second bias to a second terminal of a second capacitor 62 through a resistor element 162; and a third capacitor 64 having the first terminal connected to the second capacitor 62 and the second terminal connected to the first bias supply terminal.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a power amplifier circuit. [Background technology]

[0002] There is a power amplifier that includes a common-emitter bipolar transistor having a base terminal and a collector terminal, a resistive element connected between a base bias voltage supply terminal and the base terminal, a first capacitor connected between a signal input terminal and the base terminal, and a second capacitor connected between the signal input terminal and the base bias voltage supply terminal (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-324325 Summary of the Invention [Problem to be solved by the invention]

[0004] In the power amplifier described in Patent Document 1, a bypass path for high frequency components passing through a first capacitor and a second capacitor is formed at both ends of a resistor element connected between the base terminal of a bipolar transistor and a base bias voltage supply terminal, thereby enabling low distortion operation.

[0005] A power amplifier circuit with good distortion characteristics and efficiency is required in a configuration that includes a division circuit that adds a phase difference to an input signal and divides it, an amplifier circuit that amplifies the divided signal, and a combination circuit that reduces the phase difference and combines the signal.

[0006] The present invention has been made in view of the above circumstances, and aims to provide a power amplifier circuit that is capable of improving distortion characteristics and efficiency in a configuration that includes a division circuit that adds a phase difference to an input signal and divides it, an amplifier circuit that amplifies the divided signal, and a combination circuit that reduces the phase difference and combines the signal. [Means for solving the problem]

[0007] a first terminal connected to the first output terminal and a second terminal connected to the second output terminal; a peak amplifier connected to the second output terminal through a second capacitor and a second terminal connected to the third input terminal; a power amplifier circuit configured to amplify the third signal and output a second amplified signal; a combining circuit configured to combine the first amplified signal and the second amplified signal to generate a third amplified signal; a first bias circuit configured to supply a first bias to the first input terminal through a first resistor; a second bias circuit configured to supply a second bias to the second input terminal through a second resistor; and a third capacitor configured to have a first end connected to the second output terminal and a second end connected to the first bias supply terminal. [Effects of the Invention]

[0008] According to the present invention, it is possible to provide a power amplifier circuit that can improve distortion characteristics and efficiency in a configuration that includes a division circuit that adds a phase difference to an input signal and divides it, an amplifier circuit that amplifies the divided signal, and a combination circuit that reduces the phase difference and combines the signals. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a circuit diagram of a power amplifier circuit 101. [Figure 2] FIG. 2 is a circuit diagram of a power amplifier circuit 901 as a reference example. [Figure 3] FIG. 3 is a diagram showing an example of changes over time in the amplified signals and bias voltages in the power amplifier circuits 101 and 901. In FIG. [Figure 4] FIG. 4 is a diagram showing an example of the PAE (Power Added Efficiency) characteristics of the power amplifier circuits 101 and 901. In FIG. [Figure 5] FIG. 5 is a diagram showing an example of the AM / PM characteristics of the power amplifier circuits 101 and 901. In FIG. [Figure 6] FIG. 6 is a diagram showing an example of the gain characteristics in the power amplifier circuits 101 and 901. In FIG. [Figure 7] FIG. 7 is a diagram showing an example of the AM / AM characteristics in the power amplifier circuits 101 and 901. In FIG. [Figure 8] FIG. 8 is a circuit diagram of the power amplifier circuit 102. DETAILED DESCRIPTION OF THE INVENTION

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Note that the same elements are given the same reference numerals, and redundant explanations will be omitted as much as possible.

[0011] [First embodiment] A power amplifier circuit 101 according to a first embodiment will be described. Fig. 1 is a circuit diagram of the power amplifier circuit 101. As shown in Fig. 1, the power amplifier circuit 101 includes capacitors 60, 61 (first capacitors), 62 (second capacitors), 63, 64 (third capacitors), 303, and 310, matching circuits 21, 22, and 23, a distribution circuit 41, a combining circuit 42, transistor elements 50, 51, and 52, bias circuits 150, 151 (first bias circuit), and 152 (second bias circuit), resistive elements 160, 161 (first resistive elements), and 162 (second resistive elements), and inductors 300, 313, and 314.

[0012] In this embodiment, the transistor element is configured by a bipolar transistor such as a heterojunction bipolar transistor (HBT). Note that the transistor element may be configured by other transistors such as a metal-oxide-semiconductor field-effect transistor (MOSFET). In that case, the base, collector, and emitter may be replaced with the gate, drain, and source, respectively.

[0013] Matching circuit 21 in power amplifier circuit 101 is provided between input terminal 31 and capacitor 60, and matches the impedance between capacitor 60 and a circuit (not shown) provided in the preceding stage of input terminal 31.

[0014] Capacitor 60 is provided, for example, for DC blocking, and has a first end connected to input terminal 31 via matching circuit 21, and a second end.

[0015] The transistor element 50 is a driver stage amplifier. Specifically, the transistor element 50 has a base connected to the second end of the capacitor 60, an emitter connected to ground, and a collector. The transistor element 50 amplifies an input signal RFin supplied to its base from the input terminal 31 via the matching circuit 21 and the capacitor 60, and outputs an amplified signal RF1 from its collector.

[0016] The bias circuit 150 generates a bias to be supplied to the base of the transistor element 50 and outputs it from a bias supply terminal 150a. The bias supply terminal 150a is connected to the base of the transistor element 50 via a resistor element 160.

[0017] Voltage supply terminal T1 supplies power supply voltage Vcc for operating transistor element 50 and is connected to the collector of transistor element 50 through inductor 300. Capacitor 310 is provided between voltage supply terminal T1 and ground and functions as a filter for attenuating harmonics.

[0018] The matching circuit 22 is provided between the transistor element 50 and the distribution circuit 41 and matches the impedance between the transistor element 50 and the distribution circuit 41 .

[0019] The distribution circuit 41 distributes the amplified signal RF1 (first signal) supplied from the collector of the transistor element 50 through the matching circuit 22 into an amplified signal RF2 (second signal) and an amplified signal RF3 (third signal) having a phase delayed by approximately 90° from the phase of the amplified signal RF2.

[0020] In this embodiment, the distribution circuit 41 includes a 90-degree coupler 71 and a resistive element 72. The 90-degree coupler 71 has ports 71a, 71b, 71c (first output terminals) and 71d (second output terminals).

[0021] Port 71a is an input port and is connected to the collector of transistor element 50 through matching circuit 22. Port 71b is an isolation port and is connected to ground through resistive element 72. Ports 71c and 71d are output ports that output amplified signals RF2 and RF3, respectively.

[0022] Capacitor 61 is provided for DC blocking and has a first end connected to port 71c of 90° coupler 71, and a second end.

[0023] The transistor element 51 is a carrier amplifier. Specifically, the transistor element 51 has a base (first input terminal) connected to the second end of the capacitor 61, an emitter connected to ground, and a collector. The transistor element 51 amplifies the amplified signal RF2 supplied to the base from the port 71c of the 90° coupler 71 through the capacitor 61, and outputs an amplified signal RF4 (first amplified signal) from the collector.

[0024] The bias circuit 151 generates a first bias to be supplied to the base of the transistor element 51 through the resistor element 161 and outputs it from a bias supply terminal 151a (first bias supply terminal). The bias supply terminal 151a is connected to the base of the transistor element 51 through the resistor element 161. In this embodiment, the transistor element 51 performs class A operation or class AB operation due to the first bias supplied from the bias circuit 151.

[0025] Capacitor 62 is provided for DC blocking and has a first end connected to port 71d of 90° coupler 71, and a second end.

[0026] The transistor element 52 is a peak amplifier. Specifically, the transistor element 52 has a base (second input terminal) connected to the second end of the capacitor 62, an emitter connected to ground, and a collector. The transistor element 52 amplifies the amplified signal RF3 supplied to the base from the port 71d of the 90° coupler 71 through the capacitor 62, and outputs an amplified signal RF5 (second amplified signal) from the collector.

[0027] The bias circuit 152 generates a low bias (second bias) or a high bias (second bias) to be supplied to the base of the transistor element 52 through a resistor element 162 and outputs it from a bias supply terminal 152a (second bias supply terminal). The bias supply terminal 152a is connected to the base of the transistor element 52 through the resistor element 162.

[0028] In this embodiment, the bias circuit 152 switches the bias point (operating point or operating class) of the transistor element 52 between, for example, a low bias point and a high bias point higher than the low bias point. For example, the bias circuit 152 supplies the transistor element 52 with either a low bias or a high bias higher than the low bias.

[0029] When a high bias is supplied to the transistor element 52, the power amplifier circuit 101 is in a balanced mode. At this time, the bias point of the transistor element 52 becomes a high bias point, and the transistor element 52 operates in, for example, class A or class AB. This causes the power amplifier circuit 101 to operate as a balanced amplifier.

[0030] On the other hand, when a low bias is supplied to the transistor element 52, the power amplifier circuit 101 enters the Doherty mode. At this time, the bias point of the transistor element 52 becomes a low bias point, and the transistor element 52 operates, for example, in class AB or class B. This causes the power amplifier circuit 101 to operate as a Doherty amplifier.

[0031] Voltage supply terminal T2 supplies power supply voltage Vcc for operating transistor elements 51 and 52, and is connected to the collectors of transistor elements 51 and 52 via inductors 313 and 314. Capacitor 303 is provided between voltage supply terminal T2 and ground, and functions as a filter that attenuates harmonics.

[0032] The capacitor 64 has a first end connected to the port 71 d of the 90° coupler 71 and a second end connected to the bias supply terminal 151 a of the bias circuit 151 .

[0033] The combining circuit 42 reduces the phase difference between the amplified signals RF4 and RF5 supplied from the transistor elements 51 and 52, respectively, and combines the amplified signals RF4 and RF5 to generate an output signal RFout (third amplified signal). The combining circuit 42 outputs the output signal RFout to the output terminal 32 via the capacitor 63 and the matching circuit 23.

[0034] In this embodiment, the combining circuit 42 includes capacitors 202 and 205 and inductors 211 , 212 and 225 .

[0035] Inductor 212 has a first end connected to the collector of transistor element 52, and a second end. Inductor 225 has a first end connected to the second end of inductor 212 through capacitor 202, and a second end connected to ground. Capacitor 205 has a first end connected to the second end of inductor 212, and a second end connected to node N1. Inductor 211 has a first end connected to the collector of transistor element 51, and a second end connected to node N1.

[0036] Capacitor 63 is provided for DC blocking and has a first end connected to node N1, and a second end.

[0037] The matching circuit 23 is provided between the capacitor 63 and the output terminal 32, and matches the impedance between the capacitor 63 and a circuit (not shown) provided in the subsequent stage of the output terminal 32.

[0038] (Reference example) A power amplifier circuit 901 of a reference example will be described below. Fig. 2 is a circuit diagram of the power amplifier circuit 901 of a reference example. Compared to the power amplifier circuit 101, the power amplifier circuit 901 includes capacitors 11 and 12 instead of the capacitor 64.

[0039] The capacitor 11 has a first end connected to the port 71 c of the 90° coupler 71 and a second end connected to the bias supply terminal 151 a of the bias circuit 151 .

[0040] The capacitor 12 has a first end connected to the port 71 d of the 90° coupler 71 and a second end connected to the bias supply terminal 152 a of the bias circuit 152 .

[0041] (effect) FIG. 3 is a diagram showing an example of the changes over time of the amplified signal and bias voltage in the power amplifier circuits 101 and 901. The vertical axis represents voltage in units of "V," and the horizontal axis represents time in units of "ns." Curves Vin1 and Vinr represent the changes over time of the voltage at port 71c in the power amplifier circuits 101 and 901, respectively. Curves Vb1 and Vbr represent the changes over time of the voltage at bias supply terminal 151a in the power amplifier circuits 101 and 901, respectively.

[0042] 4 is a diagram showing an example of the PAE characteristics of the power amplifier circuits 101 and 901. The vertical axis represents the PAE in units of "%." The horizontal axis represents the output power in units of "dBm." Curves P1 and Pr show the change in PAE versus output power in the power amplifier circuits 101 and 901, respectively.

[0043] 3 and 4, in the power amplifier circuit 901, the phase of the voltage at the bias supply terminal 151a lags behind the phase of the amplified signal RF2 at the port 71c. Therefore, the PAE of the power amplifier circuit 901 is degraded compared to that of the power amplifier circuit 101.

[0044] In contrast to this, in the power amplifier circuit 101, the phase of the voltage at the bias supply terminal 151a and the phase of the amplified signal RF2 at the port 71c can be made closer to each other. As a result, the power amplifier circuit 101 can improve the PAE compared to the power amplifier circuit 901.

[0045] 5 is a diagram showing an example of the AM / PM characteristics of the power amplifier circuits 101 and 901. The vertical axis indicates the gradient of the voltage phase in units of "deg / dB." The horizontal axis indicates the output power in units of "dBm." Curves AP1 and APr indicate the change in the gradient of the phase with respect to the output power in the power amplifier circuits 101 and 901, respectively.

[0046] 5, in power amplifier circuit 901, the degradation of the AM / PM characteristics is suppressed because the base bias amplitude is strengthened by capacitors 11 and 12. In power amplifier circuit 101, AM / PM characteristics equivalent to or better than those of power amplifier circuit 901 can be achieved.

[0047] 6 is a diagram showing an example of the gain characteristics in the power amplifier circuits 101 and 901. The vertical axis indicates gain in units of "dB," and the horizontal axis indicates output power in units of "dBm." Curves G1 and Gr indicate changes in gain with respect to output power in the power amplifier circuits 101 and 901, respectively.

[0048] As shown in FIG. 6, in the power amplifier circuit 101, the change in gain relative to the output power can be suppressed more effectively than in the power amplifier circuit 901.

[0049] 7 is a diagram showing an example of the AM / AM characteristics of the power amplifier circuits 101 and 901. The vertical axis is a dimensionless quantity indicating the gradient of the voltage gain in units of "dB / dB." The horizontal axis indicates the output power in units of "dBm." Curves AA1 and AAr show the change in the gradient of the gain with respect to the output power in the power amplifier circuits 101 and 901, respectively.

[0050] 7, power amplifier circuit 101 can achieve AM / AM characteristics that are equal to or better than those of power amplifier circuit 901. This makes it possible to improve distortion characteristics.

[0051] In this embodiment, a configuration has been described in which amplified signal RF3 has a phase that is delayed approximately 90° from the phase of amplified signal RF2, but this is not limiting. It is sufficient that amplified signal RF3 has a phase that is delayed from the phase of amplified signal RF2. Specifically, it is sufficient that amplified signal RF3 lags behind the phase of amplified signal RF2 by an angle that is greater than 0° and less than 180°, with the phase of amplified signal RF2 as the reference. In this specification, "approximately 90°" means 70° or more and 110° or less.

[0052] [Second embodiment] A power amplifier circuit 102 according to a second embodiment will be described. From the second embodiment onwards, descriptions of matters common to the first embodiment will be omitted, and only differences will be described. In particular, similar effects resulting from similar configurations will not be mentioned in each embodiment.

[0053] Fig. 8 is a circuit diagram of the power amplifier circuit 102. As shown in Fig. 8, the power amplifier circuit 102 differs from the power amplifier circuit 101 according to the first embodiment in that it further includes capacitors 11 (fourth capacitor) and 12 (fifth capacitor).

[0054] The capacitor 11 has a first end connected to the port 71c of the 90° coupler 71 and a second end connected to the bias supply terminal 151a of the bias circuit 151. By providing the capacitor 11, a bypass path for the high frequency component passing through the capacitors 11 and 61 is formed at both ends of the resistance element 161.

[0055] The capacitor 12 has a first end connected to the port 71d of the 90° coupler 71 and a second end connected to the bias supply terminal 152a of the bias circuit 152. By providing the capacitor 12, a bypass path for the high frequency component passing through the capacitors 12 and 62 is formed at both ends of the resistor element 162.

[0056] With this configuration, the power amplifier circuit 102 can further improve the AM / PM characteristics while substantially maintaining the PAE characteristics.

[0057] The above describes exemplary embodiments of the present invention. In the power amplifier circuits 101 and 102, the distribution circuit 41 distributes an amplified signal RF1 into an amplified signal RF2 and an amplified signal RF3 having a phase delay relative to the amplified signal RF2, and has ports 71c and 71d for outputting the amplified signals RF2 and RF3, respectively. The transistor element 51 is connected to the port 71c through a capacitor 61, has a base to which the amplified signal RF2 is supplied, amplifies the amplified signal RF2, and outputs an amplified signal RF4. The transistor element 52 is connected to the port 71d through a capacitor 62, has a base to which the amplified signal RF3 is supplied, and amplifies the amplified signal RF3 and outputs an amplified signal RF5. The combining circuit 42 combines the amplified signals RF4 and RF5 to generate an output signal RFout. The bias circuit 151 has a bias supply terminal 151a that supplies a first bias to the base of the transistor element 51 through a resistor 161. The bias circuit 152 has a bias supply terminal 152a that supplies a second bias to the base of the transistor element 52 through the resistor element 162. The capacitor 64 has a first end connected to the port 71d of the distribution circuit 41 and a second end connected to the bias supply terminal 151a of the bias circuit 151.

[0058] In this way, by providing the capacitor 64 between the port 71d and the bias supply terminal 151a, the phase of the voltage at the bias supply terminal 151a and the phase of the amplified signal RF2 at the port 71c can be made closer to each other. As a result, the power amplifier circuit 101 can improve the PAE compared to the power amplifier circuit 901. In addition, the distortion characteristics can be improved. Therefore, in a configuration including a division circuit that adds a phase difference to an input signal and divides it, an amplifier circuit that amplifies the divided signal, and a combiner circuit that reduces the phase difference and combines it, it is possible to provide a power amplifier that can improve the distortion characteristics and efficiency.

[0059] In the power amplifier circuit 102, the capacitor 11 has a first end connected to the port 71c of the distribution circuit 41 and a second end connected to the bias supply terminal 151a of the bias circuit 151. The capacitor 12 has a first end connected to the port 71d of the distribution circuit 41 and a second end connected to the bias supply terminal 152a of the bias circuit 152.

[0060] With this configuration, it is possible to further improve the AM / PM characteristics while substantially maintaining the PAE characteristics.

[0061] The above-described embodiments are intended to facilitate understanding of the present invention and are not intended to limit the scope of the present invention. The present invention may be modified or improved without departing from its spirit, and equivalents are also encompassed within the scope of the present invention. In other words, designs modified by those skilled in the art as appropriate are also encompassed within the scope of the present invention as long as they incorporate the characteristics of the present invention. For example, the elements and their arrangements, materials, conditions, shapes, sizes, etc., included in the embodiments are not limited to those illustrated and can be modified as appropriate. Furthermore, the embodiments are merely examples, and partial substitutions or combinations of the configurations shown in different embodiments are naturally possible. These are also encompassed within the scope of the present invention as long as they incorporate the characteristics of the present invention.

[0062] <1> a distribution circuit that distributes a first signal into a second signal and a third signal having a phase delayed from that of the second signal, and has a first output terminal and a second output terminal that output the second signal and the third signal, respectively; a carrier amplifier having a first input terminal connected to the first output terminal through a first capacitor and receiving the second signal, amplifying the second signal and outputting a first amplified signal; a peak amplifier having a second input terminal connected to the second output terminal through a second capacitor and receiving the third signal, amplifying the third signal and outputting a second amplified signal; a combining circuit that combines the first amplified signal and the second amplified signal to generate a third amplified signal; a first bias circuit having a first bias supply terminal that supplies a first bias to the first input terminal through a first resistor element; a second bias circuit having a second bias supply terminal that supplies a second bias to the second input terminal through a second resistor element; a third capacitor having a first end connected to the second output terminal and a second end connected to the first bias supply terminal; Power amplifier circuit.

[0063] <2> <1> The power amplifier circuit according to The power amplifier circuit includes: a fourth capacitor having a first end connected to the first output terminal and a second end connected to the first bias supply terminal; a fifth capacitor having a first end connected to the second output terminal and a second end connected to the second bias supply terminal; Power amplifier circuit. [Explanation of symbols]

[0064] 11, 12...Capacitor 21, 22, 23...matching circuit 31...Input terminal 32...Output terminal 41...Distribution circuit 42...Synthesis circuit 50, 51, 52...Transistor elements 60, 61, 62, 63, 64...Capacitors 71...90° coupler 71a, 71b, 71c, 71d...Port 72...Resistance element 101, 102, 901...Power amplifier circuit 150, 151, 152...Bias circuit 150a, 151a, 152a...Bias supply terminals 160, 161, 162...Resistance elements 202, 205, 303, 310... Capacitors 211, 212, 225, 300, 313, 314... inductors T1, T2...Voltage supply terminals N1...Node

Claims

1. a distribution circuit that distributes a first signal into a second signal and a third signal having a phase delayed from that of the second signal, and has a first output terminal and a second output terminal that output the second signal and the third signal, respectively; a carrier amplifier having a first input terminal connected to the first output terminal through a first capacitor and receiving the second signal, amplifying the second signal and outputting a first amplified signal; a peak amplifier having a second input terminal connected to the second output terminal through a second capacitor and receiving the third signal, amplifying the third signal and outputting a second amplified signal; a combining circuit that combines the first amplified signal and the second amplified signal to generate a third amplified signal; a first bias circuit having a first bias supply terminal for supplying a first bias to the first input terminal through a first resistor; a second bias circuit having a second bias supply terminal for supplying a second bias to the second input terminal through a second resistor; a third capacitor having a first end connected to the second output terminal and a second end connected to the first bias supply terminal; Power amplifier circuit.

2. 2. The power amplifier circuit according to claim 1, The power amplifier circuit includes: a fourth capacitor having a first end connected to the first output terminal and a second end connected to the first bias supply terminal; a fifth capacitor having a first end connected to the second output terminal and a second end connected to the second bias supply terminal; Power amplifier circuit.

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