Wiring circuit board and manufacturing method thereof

By defining specific ratios and shapes for connection portions and incorporating a planarization and pre-curing process, the wired circuit board minimizes depressions and recesses, improving yield and reliability.

JP2025164698APending Publication Date: 2025-10-30NITTO DENKO CORP
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Patent Information

Application Number
JP2025036285
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-04-19
Filing Date
2025-03-07
Publication Date
2025-10-30

AI Technical Summary

Technical Problem

The existing methods for manufacturing printed circuit boards result in depressions and recesses at interlayer connection points due to resin shrinkage during curing, leading to potential disconnections and a decrease in yield.

Method used

The wired circuit board design includes specific ratios and shapes for the connection portions and insulating layers, with defined distances and recess depths to minimize the occurrence of depressions, and a manufacturing method that involves planarization and pre-curing to prevent such issues.

Benefits of technology

This design and method reduce the likelihood of disconnections at interlayer connection points, thereby enhancing yield and reliability of the circuit board.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a wiring circuit board and the like that can prevent yield reductions caused by disconnections at interlayer connections.SOLUTION: A wiring circuit board includes a metal core layer having a through hole, a first insulating layer disposed on one surface of the metal core layer, a second insulating layer disposed on the other surface of the metal core layer, a first wiring layer disposed on the first insulating layer, a second wiring layer disposed on the second insulating layer, and an interlayer connection portion that passes through the through hole in the metal core layer and electrically connects the first wiring layer and the second wiring layer but is not electrically connected to the metal core layer, and the ratio of the distance (Lb) between the metal core layer and the connection portion in the surface direction of the metal core layer to the distance (La) between the interlayer connection portion and the metal core layer is 0.5 or less.SELECTED DRAWING: Figure 1B
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Description

[Technical Field]

[0001] The present invention relates to a printed circuit board, a method for manufacturing a printed circuit board, a semiconductor package including the printed circuit board, and an electronic device. [Background technology]

[0002] A printed circuit board is manufactured by laminating conductors such as wiring and various insulating layers on a substrate, and the conductors and insulating layers are patterned by, for example, photolithography.

[0003] A printed circuit board has been proposed as a wired circuit board, which includes a core having a via connection portion and a reinforcing portion that contains a material different from the via connection portion and is arranged at a distance from the via connection portion, an insulating portion that insulates the via connection portion from the reinforcing portion and covers the core, and a via formed through the insulating portion to connect to the via connection portion (see Patent Document 1). Also, a printed circuit board including a core has been proposed, in which the core includes a first metal layer and a heat dissipation metal formed in the first metal layer (see Patent Document 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2017-85073 [Patent Document 2] Japanese Patent Application Laid-Open No. 2017-73534 Summary of the Invention [Problem to be solved by the invention]

[0005] An example of a method for manufacturing a printed circuit board using a metal core layer will be described with reference to FIGS. 7A to 7E. The description will focus on forming an insulating layer on the metal core layer and in the through-holes. First, a laminate shown in FIG. 7A is prepared. The laminate shown in FIG. 7A includes a metal core layer 51 having a through-hole, a first insulating layer 52 disposed on one side of the metal core layer 51, a first wiring layer 53 disposed on the first insulating layer 52, a third insulating layer 54 disposed on the first wiring layer 53, a third wiring layer 55 disposed on the third insulating layer 54, a fourth insulating layer 56 disposed on the third wiring layer 55, and an interlayer connection 57 formed in the through-hole. Next, a second insulating layer 58 is formed to cover the metal core layer 51 and the interlayer connection 57 and fill the through-hole. Since the second insulating layer 58 is formed by coating, a depression occurs in the through-hole area (FIG. 7B). Next, a planarization process is performed to remove the depression (FIG. 7C). Next, the second insulating layer 58 is fully cured. Because the insulating layer in the through-hole area is thicker than other areas, a recess occurs due to resin shrinkage (curing shrinkage and shrinkage due to solvent evaporation) during full curing (FIG. 7D). Next, a second wiring layer 59 is formed on the second insulating layer 58. The formed second wiring layer 59 has a connection portion 59a formed on the through-hole and the interlayer connection portion 57, and another wiring portion 59b (FIG. 7E). Here, because the connection portion 59a is formed on the recess in the insulating layer, a recess occurs in the connection portion 59a following the recess. Although not shown, the connection portion 59a is connected to the wiring portion 59b. If the connection portion 59a has a recess, a disconnection or the like may occur between the connection portion 59a and the wiring portion 59b, which may reduce the yield.

[0006] The present invention aims to provide a wired circuit board that can suppress a decrease in yield due to breakage at interlayer connection points, a method for manufacturing the wired circuit board, and a semiconductor package and electronic device that include the wired circuit board. [Means for solving the problem]

[0007] The present inventors have conducted extensive research to solve the above problems, and as a result have found that the above problems can be solved, and have completed the present invention having the following gist.

[0008] That is, the present invention includes the following. [1] A metal core layer having through holes; a first insulating layer disposed on one surface of the metal core layer; a second insulating layer disposed on the other surface of the metal core layer; a first wiring layer disposed on the first insulating layer; a second wiring layer disposed on the second insulating layer; an interlayer connection portion that penetrates the through hole of the metal core layer, electrically connects the first wiring layer and the second wiring layer, and is not electrically connected to the metal core layer; and the second wiring layer has a connection portion in contact with the interlayer connection portion and a wiring portion, a ratio of a distance (Lb) between the metal core layer and the connection portion in the surface direction of the metal core layer to a distance (La) between the interlayer connection portion and the metal core layer (wherein, when the end of the connection portion is on an extension of the through hole, the distance (Lb) is a positive value, and when the end of the connection portion is not on an extension of the through hole, the distance (Lb) is a negative value) is 0.5 or less; Wiring circuit board. [2] The connection portion has a recess, a ratio of a depth (h2) of the recess of the connection portion to a total thickness (h1) of the metal core layer and the second insulating layer on the metal core layer is 0.25 or less; [1] The wired circuit board according to [1]. [3] The shape of the side surface of the metal core layer on the through hole side in a cross section in the thickness direction is: Is it a straight line in the same direction as the thickness direction? a straight line that slopes toward the through hole as it moves from the second insulating layer side to the first insulating layer side; Is it concavely curved? a straight line that slopes toward the through hole as it moves from the first insulating layer side to the second insulating layer side, or The wired circuit board according to [1] or [2], which has a convex shape. [4] The wired circuit board according to any one of [1] to [3], wherein the second insulating layer does not contain a filler. [5] The wired circuit board according to any one of [1] to [4], wherein the second insulating layer contains a polyimide resin or an epoxy resin as a constituent component. [6] A semiconductor package comprising the printed circuit board according to any one of [1] to [5]. [7] An electronic device including the semiconductor package described in [6]. [8] A laminate including a metal core layer having a through hole, a first insulating layer disposed on one surface of the metal core layer, a first wiring layer disposed on the first insulating layer, and an interlayer connection portion that penetrates the through hole of the metal core layer and is electrically connected to the first wiring layer but not electrically connected to the metal core layer, and a step of disposing a second insulating layer so as to cover the other surface of the metal core layer and the interlayer connection portion and to fill the through hole; planarizing the second insulating layer to eliminate any depressions that may have occurred when the second insulating layer was disposed; pre-curing the planarized second insulating layer; forming a second wiring layer on the pre-cured second insulating layer; a step of fully curing the second insulating layer in a state where the second wiring layer is formed; The method for manufacturing a wired circuit board includes the steps of: [9] A step of disposing a second insulating layer so as to cover the other surface of the metal core layer of a laminate having a metal core layer having a through hole, a first insulating layer disposed on one surface of the metal core layer, and a first wiring layer disposed on the first insulating layer and to fill the through hole; planarizing the second insulating layer to eliminate any depressions that may have occurred when the second insulating layer was disposed; pre-curing the planarized second insulating layer; forming an interlayer connection portion in the through hole of the metal core layer, and forming a second wiring layer on the precured second insulating layer and the interlayer connection portion; a step of fully curing the second insulating layer in a state where the second wiring layer is formed; The method for manufacturing a wired circuit board includes the steps of:

[10] The method for manufacturing a wired circuit board according to [9], wherein the interlayer connection portion and the second wiring layer are integrally formed. [Effects of the Invention]

[0009] According to the present invention, it is possible to provide a wired circuit board that can suppress a decrease in yield due to breaks at interlayer connection points, a method for manufacturing the wired circuit board, and a semiconductor package and electronic device that include the wired circuit board. [Brief explanation of the drawings]

[0010] [Figure 1A] FIG. 1A is a schematic diagram of one embodiment of a printed circuit board. [Figure 1B] FIG. 1B is a schematic diagram of one embodiment of a printed circuit board. [Figure 1C] FIG. 1C is a top view of the printed circuit board of FIGS. 1A and 1B. [Figure 2] FIG. 2 is a schematic diagram of another embodiment of the printed circuit board. [Figure 3] FIG. 3 is a schematic diagram of another embodiment of the printed circuit board. [Figure 4A] FIG. 4A is a diagram (part 1) for explaining how to obtain the distance (La) and the distance (Lb). [Figure 4B] FIG. 4B is a diagram (part 2) for explaining how to obtain the distance (La) and the distance (Lb). [Figure 4C] FIG. 4C is a diagram (part 3) for explaining how to obtain the distance (La) and the distance (Lb). [Figure 4D] FIG. 4D is a diagram (part 4) for explaining how to obtain the distance (La) and the distance (Lb). [Figure 4E] FIG. 4E is a diagram (part 5) for explaining how to determine the distance (La) and the distance (Lb). [Figure 4F] FIG. 4F is a diagram (part 6) for explaining how to determine the distance (La) and the distance (Lb). [Figure 4G] FIG. 4G is a diagram (part 7) for explaining how to calculate the distance (La) and the distance (Lb). [Figure 5A] FIG. 5A is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 1). [Figure 5B] FIG. 5B is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 2). [Figure 5C] FIG. 5C is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 3). [Figure 5D] FIG. 5D is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 4). [Figure 5E] FIG. 5E is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 5). [Figure 6A] FIG. 6A is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 1). [Figure 6B] FIG. 6B is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 2). [Figure 6C] FIG. 6C is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 3). [Figure 6D] FIG. 6D is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 4). [Figure 6E] FIG. 6E is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 5). [Figure 6F] FIG. 6F is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 6). [Figure 7A] FIG. 7A is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 1). [Figure 7B] FIG. 7B is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 2). [Figure 7C] FIG. 7C is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 3). [Figure 7D]FIG. 7D is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 4). [Figure 7E] FIG. 7E is a schematic diagram for explaining one example of a method for producing a wired circuit board (part 5). DETAILED DESCRIPTION OF THE INVENTION

[0011] (Wired circuit board and method for manufacturing the wired circuit board) The wired circuit board of the present invention has at least a metal core layer, a first insulating layer, a second insulating layer, a first wiring layer, a second wiring layer, and an interlayer connection portion, and may further have other components as necessary. The metal core layer has a through hole. A first insulating layer is disposed on one side of the metal core layer. A second insulating layer is disposed on the other side of the metal core layer. The first wiring layer is disposed on the first insulating layer. The second wiring layer is disposed on the second insulating layer. The interlayer connection portion passes through the through hole, electrically connects the first wiring layer and the second wiring layer, and is not electrically connected to the metal core layer. The second wiring layer has a connection portion and a wiring portion. The connection portion is in contact with the interlayer connection portion. The distance between the interlayer connection and the metal core layer is defined as distance (La). The distance between the metal core layer and the connection in the plane direction of the metal core layer is defined as distance (Lb). However, if the end of the connection is on the extension of the through hole, the distance (Lb) is a positive value, and if the end of the connection is not on the extension of the through hole, the distance (Lb) is a negative value. In this case, the ratio (Lb / La) of the distance (Lb) to the distance (La) is 0.5 or less.

[0012] As explained with reference to Figures 7A to 7E, when manufacturing a wired circuit board having an interlayer connection in a through-hole of a metal core layer, a depression usually occurs in the insulating layer around the interlayer connection. A connection formed on the depressed insulating layer in contact with the interlayer connection also has a depression that follows the depression. If a depression occurs in a connection, it can cause a break between the connection and the wiring in contact with it, resulting in a decrease in yield. On the other hand, when the ratio (Lb / La) is 0.5 or less, the connection points between the connection parts and the wiring parts are less susceptible to depressions, and disconnections between the connection parts and the wiring parts are less likely to occur, thereby suppressing a decrease in yield. The ratio (Lb / La) is, for example, 0.3 or less. There is no particular restriction on the lower limit of the ratio (Lb / La), but, for example, the ratio (Lb / La) may be -2.0 or more, -1.0 or more, -0.5 or more, 0 or more, or more than 0. From the viewpoint of the degree of freedom in designing the wiring portion, it is preferable that the connection portion is small, that is, the distance (Lb) and the ratio (Lb / La) are large.

[0013] Incidentally, Patent Document 1 (JP 2017-85073 A) and Patent Document 2 (JP 2017-73534 A) do not describe or suggest the occurrence of such a depression. Furthermore, in FIG. 1 of Patent Document 2 (JP 2017-73534 A), as shown in FIGS. 2 to 13 of Patent Document 2, the insulating material 140 around the through via 210 and the insulating layer 150 are formed in different processes. In this case, the insulating layer 150 and the connection via 220 are less susceptible to the effects of resin shrinkage, and therefore depressions are less likely to occur.

[0014] In the wired circuit board of the present invention, the connection portion has, for example, a recess. The ratio (h2 / h1) of the depth (h2) of the recess at the connection portion to the total thickness (h1) of the thickness of the metal core layer and the thickness of the second insulating layer on the metal core layer is not particularly limited, but is preferably 0.25 or less, more preferably 0.15 or less, and particularly preferably 0.10 or less, in order to make it less likely that breaks will occur between the connection portion and the wiring portion. The ratio (h2 / h1) is ideally 0, but is usually greater than 0 and may be 0.01 or greater.

[0015] An example of the wired circuit board of the present invention will be described below with reference to Figures 1A and 1B. Note that Figure 1B is a diagram for explaining the distance (La), distance (Lb), total thickness (h1), and depth (h2). Figures 1A and 1B have the same structure. Figures 1A and 1B are cross-sectional views in the thickness direction of the wired circuit board. This cross-section is a cross-section passing through the center of the through-hole of the metal core layer 1. 1A and 1B has a metal core layer 1, a first insulating layer 2, a second insulating layer 8, a first wiring layer 3, a second wiring layer 9, and an interlayer connection portion 7. The wired circuit board further has a third insulating layer 4, a third wiring layer 5, and a fourth insulating layer 6. The first insulating layer 2 is disposed on one surface of the metal core layer 1 . The second insulating layer 8 is disposed on the other surface of the metal core layer 1 . The first wiring layer 3 is disposed on the first insulating layer 2 . The second wiring layer 9 is disposed on the second insulating layer 8 . The third insulating layer 4 covers the first wiring layer 3. The third wiring layer 5 is disposed on the third insulating layer 4 . The fourth insulating layer 6 covers the third wiring layer 5 . The interlayer connection portion 7 passes through the through hole of the metal core layer 1. The interlayer connection portion 7 electrically connects the first wiring layer 3 and the second wiring layer 9. The interlayer connection portion 7 is not electrically connected to the metal core layer 1. The second wiring layer 9 has a connection portion 9a and a wiring portion 9b. The connection portion 9a is in contact with the interlayer connection portion . The distance between the interlayer connection portion 7 and the metal core layer 1 is defined as distance (La). The distance between the metal core layer 1 and the connection portion 9a in the plane direction of the metal core layer 1 is defined as distance (Lb). However, if the end of the connection portion 9a is on the extension of the through hole, the distance (Lb) is defined as a positive value, and if the end of the connection portion 9a is not on the extension of the through hole, the distance (Lb) is defined as a negative value. In this case, the ratio (Lb / La) of the distance (Lb) to the distance (La) is 0.5 or less. 1A and 1B, the connection portion 9a has a recess. The recess is formed in the connection portion between the metal core layer 1 and the interlayer connection portion 7. The recess is recessed toward the metal core layer 1 side. 1A and 1B, a part of the first insulating layer 2 is also present between the metal core layer 1 and the interlayer connection portion 7. In FIG.

[0016] Here, the distance (La), the distance (Lb), the total thickness (h1), and the depth (h2) will be explained with reference to FIG. 1B. Distance (La) is the distance between points A and B in FIG. 1B. Point A is an end point of the metal core layer 1, and is the intersection between the surface of the metal core layer 1 facing the second insulating layer 8 and the side surface of the metal core layer 1 facing the through hole. Point B is the intersection between a plane X1, which is the same as the surface of the metal core layer 1 facing the second insulating layer 8, and the side surface of the interlayer connection part 7. Note that if the height of the interlayer connection part 7 is low and the side surface of the interlayer connection part 7 does not intersect with the same plane X1, point B is the intersection between an imaginary plane extending from the side surface of the interlayer connection part 7 and the same plane X1. Distance (Lb) is the distance between imaginary lines Y1 and Y1' in FIG. 1B. Imaginary line Y1 is a line parallel to the thickness direction of the metal core layer 1 and passes through point A. Imaginary line Y1' is a line parallel to the thickness direction of the metal core layer 1 and passes through point C. Point C is the end point of connection portion 9a and the intersection point between the surface of connection portion 9a on the interlayer connection portion 7 side and the side surface of connection portion 9a. Note that points A, B, and C are determined from the same cross section. The total thickness (h1) is the sum of the thickness of the metal core layer 1 and the thickness of the second insulating layer 8. The thickness of the second insulating layer 8 here is the thickness of the second insulating layer 8 directly on the metal core layer 1. The depth (h2) is the depth of the recess in the connection portion 9a. The depth of the recess in the connection portion 9a is the distance between the same plane (s1: not shown) and a plane (s2: not shown) parallel to the same plane (s1). The same plane (s1: not shown) is the same plane as the surface of the second insulating layer 8 opposite to the metal core layer 1 side. The plane (s2: not shown) is a plane passing through the part of the recess in the connection portion 9a that is closest to the metal core layer 1 in the thickness direction of the metal core layer 1 and is parallel to the same plane (s). The total thickness (h1) and the depth (h2) are usually measured from the same cross section. The total thickness (h1) is preferably measured in the vicinity of the recess of the connecting portion 9a.

[0017] Next, Fig. 1C shows a view (top view) of the wired circuit board shown in Fig. 1A and Fig. 1B from the thickness direction. Note that Fig. 1C shows the metal core layer 1 and the second wiring layer 9, but does not show the second insulating layer 8. 1C, the through-hole of the metal core layer 1 has a circular shape (C1: symbol not shown) when viewed from above. In this case, the through-hole has a cylindrical shape. As shown in FIG. 1C, the shape of the connection portion 9a is a circle (C2: symbol not shown) when viewed from above. The center of the circle (C1) and the center of the circle (C2) are usually at approximately the same position when viewed from above. In other words, an imaginary line connecting the centers of the circles (C1) and (C2) is approximately parallel to the thickness direction. In Figure 1C, the circle (C1) is larger than the circle (C2). In this case, the distance (Lb) is a positive value. In this case, the ratio (Lb / La) is a positive value. On the other hand, if the circle (C2) is larger than the circle (C1), the distance (Lb) is a negative value. In this case, the ratio (Lb / La) is a negative value. Note that the case where the circle (C2) is larger than the circle (C1) means that the connecting portion 9a is larger than the opening of the through-hole. Note that points A, B, and C, which are determined when determining the distance (La) and the distance (Lb), are determined on a cross section that passes through the center of the through hole of the metal core layer 1 and that provides the largest distance (Lb). However, when actually measuring the distance (La) and the distance (Lb), it may be difficult to prepare a cross section that passes through the center of the through hole of the metal core layer 1. Therefore, even if the cross section does not pass through the center of the through hole of the metal core layer 1 and is shifted from the center, the cross section may be used to determine the distance (La) and the distance (Lb) by correcting for the shift.

[0018] 1C, the connection portion 9a is in contact with the wiring portion 9b. If there is a dent in the second insulating layer 8 between the metal core layer 1 and the interlayer connection portion 7, a dent will also be formed in the connection portion 9a. If there is a dent in the connection portion 9a, a break or the like may occur between the connection portion 9a and the wiring portion 9b in contact with it, which may result in a decrease in yield. When the above ratio (Lb / La) is 0.5 or less, the connection points between the connection portions 9a and the wiring portions 9b are less susceptible to depressions, and disconnections between the connection portions 9a and the wiring portions 9b are less likely to occur, thereby preventing a decrease in yield.

[0019] The wired circuit board shown in FIGS. 1A and 1B has a third insulating layer 4, a third wiring layer 5, and a fourth insulating layer 6 as optional components. The third insulating layer 4 covers the first wiring layer 3, and the third insulating layer 4 has a through-hole in part thereof. A part of the third wiring layer 5 contacts the first wiring layer 3 through the through-hole. The part of the first wiring layer 3 that is in contact with the third wiring layer 5 further contacts the interlayer connection portion 7. The fourth insulating layer 6 covers the third wiring layer 5, but the fourth insulating layer 6 has a through-hole in a part thereof, and a part of the third wiring layer 5 is exposed through the through-hole.

[0020] Next, another example of the wired circuit board of the present invention is shown in Fig. 2. Fig. 2 is a cross-sectional view in the thickness direction of the wired circuit board. In Fig. 2, the cross-sectional view shows the connection points between the connection portion 9a and the wiring portion 9b. The rest of the structure is the same as in Fig. 1A. When measuring the distances (La) and (Lb) using the cross-section of the wired circuit board, the distances (La) and (Lb) are measured at points where the connection portion 9a and the wiring portion 9b are not connected.

[0021] Next, another example of the wired circuit board of the present invention is shown in Fig. 3. Fig. 3 is a cross-sectional view in the thickness direction of the wired circuit board. 3, the cross-sectional view shows the connection points between the connection portion 9a and the wiring portion 9b. When measuring the distances (La) and (Lb) using the cross-section of the wired circuit board, the distances (La) and (Lb) are measured at points where the connection portion 9a and the wiring portion 9b are not connected. The wired circuit board shown in Fig. 3 has a fifth insulating layer 10 and a fourth wiring layer 11. The wired circuit board shown in Fig. 3 has the same structure as the wired circuit board shown in Fig. 2, except that it has the fifth insulating layer 10 and the fourth wiring layer 11. The fifth insulating layer 10 covers the second wiring layer 9. The fourth wiring layer 11 is disposed on the fifth insulating layer 10 . The fifth insulating layer 10 and the fourth wiring layer 11 directly above the recess of the connection portion 9a have recesses that follow the recesses. 3, if the fourth wiring layer 11 above the recess of the connection portion 9a is recessed, wires may collapse during formation of the fourth wiring layer 11, resulting in a decrease in yield. In this regard, the method for manufacturing a wired circuit board of the present invention, which will be described later, can reduce the recess and therefore the decrease in yield during formation of the fourth wiring layer 11. In the cross-sectional view of Figure 3, it appears that the fourth wiring layer 11 is not electrically connected to other wiring layers, but the fourth wiring layer 11 is usually electrically connected to other wiring layers.

[0022] Next, a method for determining the distance (La) and the distance (Lb) when the size of the connection portion is changed or when the shape of the side surface of the through hole in the metal core layer is changed will be described. 4A to 4G are diagrams for explaining how to determine the distance (La) and the distance (Lb), and are cross-sectional views of the printed circuit board in the thickness direction. In cases such as those shown in Figures 4A to 4G, the methods for determining points A, B, C, the same plane X1, the virtual line Y1, and the virtual line Y1' are the same as those for determining points A, B, C, the same plane X1, the virtual line Y1, and the virtual line Y1' described using Figures 1A and 1B, respectively.

[0023] 4A to 4C show examples in which the through hole in the metal core layer 1 has a cylindrical shape. Therefore, in the cross-sectional views of Figures 4A to 4C, the through hole is rectangular, and the side surface of the metal core layer 1 on the through hole side is a straight line extending in the same direction as the thickness direction. In this case, point A is an end point of the metal core layer 1, and is the intersection point between the surface of the metal core layer 1 on the second insulating layer 8 side and the side surface of the metal core layer 1 facing the through hole. The size of the connection portion 9a differs between FIGS. 4A to 4C. In Fig. 4A, as shown in Fig. 1C, the circle of the through hole in the metal core layer 1 when viewed from above is larger than the circle of the connection portion 9a when viewed from above. Therefore, the imaginary line Y1' is closer to the interlayer connection portion 7 than the imaginary line Y1. In other words, the imaginary line Y1' is between the imaginary line Y1 and the interlayer connection portion 7. Then, the distance (Lb) is a positive value. 4B, the circle of the through hole in the metal core layer 1 when viewed from above and the circle of the connection portion 9a when viewed from above are the same size. Therefore, the imaginary line Y1' and the imaginary line Y1 overlap. The distance (Lb) is 0. 4C, the circle of the connection portion 9a when viewed from above is larger than the circle of the through hole of the metal core layer 1 when viewed from above. Therefore, the imaginary line Y1 is closer to the interlayer connection portion 7 than the imaginary line Y1'. In other words, the imaginary line Y1 is between the imaginary line Y1' and the interlayer connection portion 7. The distance (Lb) is a negative value.

[0024] 4D to 4G show cases where the shape of the through-hole in the metal core layer 1 is different from that of FIG. 4A. 4D to 4G, point A is an end point of the metal core layer 1, and is the intersection point between the surface of the metal core layer 1 on the second insulating layer 8 side and the side surface of the metal core layer 1 facing the through hole. 4D, the through hole of the metal core layer 1 has a tapered shape that narrows downward when the first insulating layer 2 side is the lower side and the second insulating layer 8 side is the upper side. Therefore, the shape of the side surface of the metal core layer 1 on the through hole side is a straight line that slopes toward the through hole from the second insulating layer 8 side toward the first insulating layer 2 side in the cross section in the thickness direction of the wired circuit board. 4E, the through hole of the metal core layer 1 has a convexly curved side surface, and therefore the shape of the side surface of the metal core layer 1 on the through hole side is a concavely curved shape in a cross section in the thickness direction of the wired circuit board. 4F, the through hole of the metal core layer 1 has a tapered shape that narrows downward when the second insulating layer 8 side is the lower side and the first insulating layer 2 side is the upper side. Therefore, the shape of the side surface of the metal core layer 1 on the through hole side is a straight line that slopes toward the through hole from the first insulating layer 2 side toward the second insulating layer 8 side in the cross section in the thickness direction of the wired circuit board. 4G, the through hole of the metal core layer 1 has a side surface that is recessed at the center in the thickness direction, and therefore the side surface of the metal core layer 1 on the through hole side has a convex shape in the cross section in the thickness direction of the wired circuit board.

[0025] The metal core layer is, for example, an element for ensuring the rigidity of the printed circuit board. The material of the metal core layer is not particularly limited, and examples thereof include Cu, Cu alloys, Al, stainless steel, FeNi alloys such as alloy 42, and combinations thereof. Among these, from the viewpoint of thermal conductivity and electrical conductivity, Cu, Cu alloys, Al, and stainless steel are preferred. The thickness of the metal core layer is not particularly limited, and is, for example, 10 μm or more, preferably 15 μm or more, and is, for example, 500 μm or less, preferably 300 μm or less. In the present invention, the term "thickness" refers to the length of the metal core layer in the thickness direction thereof. The thickness direction of the metal core layer refers to the direction perpendicular to the surface direction of the metal core layer.

[0026] The material for the insulating layers (e.g., first insulating layer, second insulating layer, third insulating layer, fourth insulating layer, fifth insulating layer) in the wired circuit board is not particularly limited, and examples thereof include synthetic resins. Examples of synthetic resins include polyimide resins, epoxy resins, polyethernitrile, polyethersulfone, polyethylene terephthalate, polyethylene naphthalate, polyvinyl chloride, etc. Polyimide resins and epoxy resins are preferred because of their excellent heat resistance, low linear expansion coefficient, and dielectric strength. The insulating layer may or may not contain a filler, but if it does not contain a filler, it will have excellent insulating properties and excellent electrical leakage suppression. Examples of fillers include inorganic fillers and organic fillers. Examples of inorganic fillers include silicon oxide, silicon nitride, aluminum oxide, aluminum nitride, aluminum hydroxide, boron nitride, crystalline silica, barium sulfate, magnesium carbonate, calcium carbonate, etc. Examples of organic fillers include polyphenylene ether, rubber, etc. The insulating layer may or may not contain glass fiber. An insulating layer containing glass fiber is formed by impregnating a glass fiber cloth with a synthetic resin, such as a glass epoxy resin represented by FR4 (Flame Retardant Type 4). The thickness of the insulating layer is not particularly limited, and is, for example, 1 μm or more, preferably 3 μm or more, and for example, 35 μm or less, preferably 20 μm or less.

[0027] Examples of materials for the wiring layers (e.g., first wiring layer, second wiring layer, third wiring layer, and fourth wiring layer) in the printed circuit board include metal materials, such as copper, nickel, gold, solder, and alloys thereof. The thickness of the wiring layer is not particularly limited, and is, for example, 3 μm or more, preferably 5 μm or more, and for example, 50 μm or less, preferably 30 μm or less.

[0028] The main component of the interlayer connection is not particularly limited, and examples thereof include metal materials such as copper, nickel, gold, solder, and alloys thereof.

[0029] The shape of the through-holes in the metal core layer is not particularly limited. The through-holes in the metal core layer are preferably tapered, which increases the contact area with the resin inside the through-holes and improves reliability (for example, adhesion). In the present invention, a tapered shape refers to a shape in which one opening of a through hole is larger than the other opening, and therefore, when the through hole has a tapered shape, the shape of the side surface of the through hole is, for example, trapezoidal in a cross section parallel to the thickness direction of the metal core layer.

[0030] The shape of the side surface of the through hole in the metal core layer is not particularly limited. The shape of the side surface of the through hole in the metal core layer may be arc-shaped or linear in a cross section parallel to the thickness direction of the metal core layer. The term "arc-shaped" here refers to a shape that is recessed from the through-hole side toward the metal core layer side.

[0031] The printed circuit board may have a seed layer (not shown), which is used as a conductive layer for electrolytic plating. Examples of materials for the seed layer include copper, chromium, nickel, and alloys thereof.

[0032] A first embodiment of the method for producing a wired circuit board of the present invention includes the following steps. a step of disposing a second insulating layer so as to cover the other surface of the metal core layer of the first laminate and the interlayer connection portion and to fill the through hole; A process of flattening the second insulating layer to eliminate any dents that may have occurred when the second insulating layer was applied. Pre-curing the planarized second insulating layer A process of forming a second wiring layer on the pre-cured second insulating layer. A process of fully curing the second insulating layer after the second wiring layer has been formed. The first laminate has a metal core layer, a first insulating layer, a first wiring layer, and an interlayer connection portion. The metal core layer has a through hole. The first insulating layer is disposed on one surface of the metal core layer. The first wiring layer is disposed on the first insulating layer. The interlayer connection portion passes through the through hole of the metal core layer. The interlayer connection portion is electrically connected to the first wiring layer. The interlayer connection portion is not electrically connected to the metal core layer.

[0033] A second embodiment of the method for producing a wired circuit board of the present invention includes the following steps. a step of disposing a second insulating layer so as to cover the other surface of the metal core layer of the second laminate and fill the through-holes; A process of flattening the second insulating layer to eliminate any dents that may have occurred when the second insulating layer was applied. Pre-curing the planarized second insulating layer A process of forming an interlayer connection portion in the through hole of the metal core layer and forming a second wiring layer on the precured second insulating layer and the interlayer connection portion. A process of fully curing the second insulating layer after the second wiring layer has been formed. The second laminate has a metal core layer, a first insulating layer, and a first wiring layer. The metal core layer has a through hole. The first insulating layer is disposed on one surface of the metal core layer. The first wiring layer is disposed on the first insulating layer. In the second embodiment of the method for manufacturing a wired circuit board, for example, the interlayer connection portion and the second wiring layer are integrally formed.

[0034] The second insulating layer formed in the step of forming the second insulating layer is an insulating layer before being fully cured. The step of forming the second insulating layer can be carried out, for example, by applying a liquid thermosetting insulating layer-forming composition onto the laminate. Alternatively, the step of forming the second insulating layer can be carried out, for example, by attaching a film-like thermosetting insulating film onto the laminate. The liquid thermosetting insulating layer-forming composition and the thermosetting insulating film in this case contain, for example, a synthetic resin as a constituent component. Examples of the synthetic resin include the synthetic resins described above. The liquid thermosetting insulating layer-forming composition and the thermosetting insulating film may or may not contain a filler.

[0035] The step of planarizing the second insulating layer can be carried out, for example, by pressing a flat plate (for example, a metal plate) against the second insulating layer. The pressure and time for pressing are not particularly limited.

[0036] The pre-cure conditions (for example, pre-cure temperature and pre-cure time) in the step of pre-cure the second insulating layer are not particularly limited. Pre-cure refers to heating at a temperature lower than that required for full cure. The pre-curing conditions are appropriately selected so that a second wiring layer can be formed on the pre-cured second insulating layer. When forming the second wiring layer on the pre-cured second insulating layer, the pre-cured second insulating layer is exposed to a plating solution, a solvent, and a resist film. The pre-curing is performed to a degree that does not cause defects in such processes. Examples of defects include dissolution, swelling, and peeling of the second insulating layer. The pre-cure temperature may be, for example, 1 / 4 to 3 / 4 times (in degrees Celsius) the full-cure temperature. The pre-cure temperature may be, for example, 120°C to 240°C. The pre-cure time may be, for example, 1 minute to 1 hour.

[0037] The full cure conditions (e.g., full cure temperature and full cure time) in the step of fully curing the second insulating layer are set appropriately depending on the thermosetting resin used. Full cure refers to curing that is performed to sufficiently thermally harden the thermosetting resin to be cured.

[0038] A first embodiment of the method for producing a wired circuit board of the present invention will be described with reference to FIGS. 5A to 5E. First, a first laminate is prepared (FIG. 5A). The first laminate has a metal core layer 1, a first insulating layer 2, a first wiring layer 3, and an interlayer connection portion 7. The first laminate further has a third insulating layer 4, a third wiring layer 5, and a fourth insulating layer 6. The metal core layer 1 has a through hole. The first insulating layer 2 is disposed on one surface of the metal core layer 1. The first wiring layer 3 is disposed on the first insulating layer 2. The interlayer connection portion 7 passes through the through hole of the metal core layer 1. The interlayer connection portion 7 is electrically connected to the first wiring layer 3. The interlayer connection portion 7 is not electrically connected to the metal core layer 1. Furthermore, the third insulating layer 4 covers the first wiring layer 3. The third wiring layer 5 is disposed on the third insulating layer 4. The fourth insulating layer 6 covers the third wiring layer 5.

[0039] Next, a second insulating layer 8 is disposed so as to cover the other surface of the metal core layer 1 of the first laminate and the interlayer connection 7 and fill the through-hole (FIG. 5B). This step can be performed, for example, by applying and drying a liquid thermosetting composition for forming an insulating layer. During this process, as shown in FIG. 5B, a depression is formed in the insulating layer around the interlayer connection 7 (the insulating layer in the through-hole portion).

[0040] Next, the second insulating layer 8 is planarized to remove any depressions that may have occurred when the second insulating layer 8 was disposed (FIG. 5C). Planarization is performed, for example, by pressing a flat plate against the second insulating layer 8.

[0041] Next, the planarized second insulating layer 8 is pre-cured (FIG. 5D). When pre-cured, resin shrinkage causes a depression in the insulating layer around the interlayer connection 7 (the insulating layer in the through-hole portion), but this depression is smaller than the depression that occurs when the second insulating layer is fully cured after planarization, for example, as shown in FIG. 7D.

[0042] Next, a through hole (not shown) is formed in the pre-cured second insulating layer 8 on the interlayer connection portion 7. The through hole can be formed, for example, by a laser. By forming the through hole, a part of the interlayer connection portion 7 is exposed.

[0043] Next, a second wiring layer 9 is formed on the pre-cured second insulating layer 8 and the exposed interlayer connection portions 7 (FIG. 5E). The formed patterned second wiring layer 9 has connection portions 9a formed on the interlayer connection portions 7 and wiring portions 9b formed in the second insulating layer 8. The wiring portions 9b are wiring. The second wiring layer 9 can be formed, for example, as follows. Formation of a seed layer (not shown) on the second insulating layer 8 and the interlayer connection portion 7 Formation of a photoresist film (not shown) on the seed layer · Formation of resist patterns by selective exposure and development of photoresist film (partial exposure of seed layer) Plating on exposed seed layer Removal of photoresist film and unnecessary seed layer

[0044] Next, with the second wiring layer 9 formed, the second insulating layer 8 is fully cured (FIG. 5E). If the second insulating layer 8 is fully cured without the second wiring layer 9 being formed, a depression will occur in the insulating layer around the interlayer connection 7 (the insulating layer in the through-hole portion). On the other hand, if the second insulating layer 8 is fully cured with the second wiring layer 9 being formed, the connection portion 9a of the second wiring layer 9 will cover the insulating layer around the interlayer connection 7 (the insulating layer in the through-hole portion), making it difficult for the depression to grow (the depression will be difficult to deepen). As a result, compared to the manufacturing method shown in FIGS. 7A to 7E, it is possible to reduce the depression in the insulating layer around the interlayer connection 7 (the insulating layer in the through-hole portion). As a result, disconnections between the connection portion 59a and the wiring portion 59b are less likely to occur, and a decrease in yield can be suppressed.

[0045] The first laminate shown in FIG. 5A can be produced, for example, as follows. First, a metal core layer 1 is prepared. Next, a first insulating layer 2 is formed on one surface of the metal core layer 1. The first insulating layer 2 can be formed, for example, by applying and drying a photosensitive resin composition containing a photosensitive polyimide. Next, the first insulating layer 2 is processed into a pattern so as to have through holes. The processing into a pattern can be carried out, for example, by selectively exposing and developing the formed photosensitive polyimide film. Next, a patterned first wiring layer 3 is formed on the first insulating layer 2. The first wiring layer 3 can be formed, for example, as follows. Formation of a seed layer (not shown) on the first insulating layer 2 Formation of a photoresist film (not shown) on the seed layer · Formation of resist patterns by selective exposure and development of photoresist film (partial exposure of seed layer) Plating on exposed seed layer Removal of photoresist film and unnecessary seed layer The through-holes of the first insulating layer 2 are partially filled with the first wiring layer 3 . Next, a patterned third insulating layer 4 is formed on the first wiring layer 3. The patterned third insulating layer 4 can be formed, for example, by applying and drying a photosensitive resin composition containing a photosensitive polyimide, and selectively exposing and developing the formed photosensitive polyimide film. Next, the third wiring layer 5 is formed on the patterned third insulating layer 4. The third wiring layer 5 can be formed, for example, as follows. Formation of a seed layer (not shown) on the third insulating layer 4 Formation of a photoresist film (not shown) on the seed layer · Formation of resist patterns by selective exposure and development of photoresist film (partial exposure of seed layer) Electroplating on exposed seed layer Removal of photoresist film and unnecessary seed layer The patterned electroplated layer thus formed becomes the third wiring layer 5. In this way, the patterned third wiring layer 5 is formed. Note that a part of the third wiring layer 5 is in contact with the first wiring layer 3. Next, a patterned fourth insulating layer 6 is formed on the third wiring layer 5. The patterned fourth insulating layer 6 can be formed, for example, by applying and drying a photosensitive resin composition containing a photosensitive polyimide, and selectively exposing and developing the formed photosensitive polyimide film. Next, a through hole is formed in the metal core layer 1 so as to expose the surface of the first wiring layer 3, which has filled the through hole in the first insulating layer 2, on the metal core layer 1 side. The through hole can be formed, for example, as follows. Formation of a photoresist film (not shown) on the metal core layer 1 Formation of a resist pattern by selective exposure and development of a photoresist film (partial exposure of the metal core layer 1) Wet etching of the exposed metal core layer 1 (e.g., wet etching using ferric chloride) Photoresist film removal Next, an interlayer connection 7 is formed in the through hole of the metal core layer 1 so as to be in contact with the first wiring layer 3 but not electrically connected to the metal core layer 1. The interlayer connection 7 can be formed, for example, as follows. Formation of a seed layer (not shown) on the metal core layer 1 and the exposed first wiring layer 3 Formation of a photoresist film (not shown) on the seed layer · Formation of resist patterns by selective exposure and development of photoresist film (partial exposure of seed layer) Electroplating on exposed seed layer Removal of photoresist film and unnecessary seed layer In this way, the first laminate shown in FIG. 5A is obtained.

[0046] A second embodiment of the method for producing a wired circuit board of the present invention will be described with reference to FIGS. 6A to 6F. First, a second laminate is prepared (FIG. 6A). The second laminate has a metal core layer 1, a first insulating layer 2, and a first wiring layer 3. The second laminate further has a third insulating layer 4, a third wiring layer 5, and a fourth insulating layer 6. The metal core layer 1 has a through hole. The first insulating layer 2 is disposed on one surface of the metal core layer 1. The first wiring layer 3 is disposed on the first insulating layer 2. Furthermore, the third insulating layer 4 covers the first wiring layer 3. The third wiring layer 5 is disposed on the third insulating layer 4. The fourth insulating layer 6 covers the third wiring layer 5.

[0047] Next, a second insulating layer 8 is disposed so as to cover the other surface of the metal core layer 1 of the second laminate and fill the through-holes (FIG. 6B). This step can be performed, for example, by applying and drying a liquid thermosetting insulating layer-forming composition. During this process, a depression is formed in the insulating layer at the through-hole portion, as shown in FIG. 6B.

[0048] Next, the second insulating layer 8 is planarized to remove any depressions that may have occurred when the second insulating layer 8 was disposed (FIG. 6C). Planarization is performed, for example, by pressing a flat plate against the second insulating layer 8.

[0049] Next, the planarized second insulating layer 8 is pre-cured (FIG. 6D). When pre-cured, resin shrinkage causes depressions in the insulating layer at the through-hole portions, but these depressions are smaller than those that occur when the insulating layer is fully cured after planarization, as shown in FIG. 7D, for example.

[0050] Next, through holes 8a are formed in the pre-cured second insulating layer 8 (FIG. 6E). The through holes can be formed, for example, by a laser. The through holes are formed at positions where the interlayer connectors 7 are to be disposed. The interlayer connectors 7 are disposed so as to contact the first wiring layer 3.

[0051] Next, interlayer connections 7 are formed in the through holes of the metal core layer 1, and a second wiring layer 9 is formed on the pre-cured second insulating layer 8 and on the interlayer connections 7 (FIG. 6F). The formed patterned second wiring layer 9 has connection portions 9a formed on the interlayer connections 7 and wiring portions 9b formed on the second insulating layer 8. The wiring portions 9b are wiring. The interlayer connections 7 and the second wiring layer 9 can be formed integrally, for example, as follows. Formation of a seed layer (not shown) on the second insulating layer 8 and the exposed first wiring layer 3 Formation of a photoresist film (not shown) on the seed layer · Formation of resist patterns by selective exposure and development of photoresist film (partial exposure of seed layer) Plating on exposed seed layer Removal of photoresist film and unnecessary seed layer

[0052] Next, with the second wiring layer 9 formed, the second insulating layer 8 is fully cured (FIG. 6F). If the second insulating layer 8 is fully cured without the second wiring layer 9 being formed, a depression will occur in the insulating layer around the interlayer connection 7 (the insulating layer in the through-hole portion). On the other hand, if the second insulating layer 8 is fully cured with the second wiring layer 9 being formed, the connection portion 9a of the second wiring layer 9 will cover the insulating layer around the interlayer connection 7 (the insulating layer in the through-hole portion), making it difficult for the depression to grow (the depression will be difficult to deepen). As a result, compared to the manufacturing method shown in FIGS. 7A to 7E, it is possible to reduce the depression in the insulating layer around the interlayer connection 7 (the insulating layer in the through-hole portion). As a result, disconnections between the connection portion 59a and the wiring portion 59b are less likely to occur, and a decrease in yield can be suppressed.

[0053] (Semiconductor package) The semiconductor package of the present invention includes the wired circuit board of the present invention. The semiconductor package includes, for example, a semiconductor chip connected to a printed circuit board. The semiconductor package includes, for example, a sealing resin that seals the semiconductor chip. Examples of semiconductor packages include FC-CSP (Flip Chip-Chip Scale Package), MIS-BGA (Molded Interconnect Substrate-Ball Grid Array) package, ETS-BGA (Embedded Trace Substrate-Ball Grid Array) package, Fan-out WLP (Wafer Level Package), Fan-in WLP, Fan-out PLP (Panel Level Package), Fan-in PLP, FC-BGA (Flip Chip-Ball Grid Array), and high-end 2.5D and 3D packages.

[0054] (electronic equipment) An electronic device of the present invention includes the semiconductor package of the present invention. Examples of electronic devices include, but are not limited to, ICT infrastructure devices such as servers, routers, supercomputers, mainframes, and workstations; antennas such as GPS antennas, antennas for wireless base stations, millimeter-wave antennas, and RFID antennas; communication devices such as mobile phones, smartphones, PHS, PDAs, and tablet terminals; digital devices such as personal computers, televisions, digital cameras, digital video cameras, POS terminals, wearable terminals, and digital media players; in-vehicle electronic devices such as electronic control system devices, in-vehicle communication devices, car navigation devices, millimeter-wave radars, and in-vehicle camera modules; semiconductor testing devices, high-frequency measuring devices, and the like. [Explanation of symbols]

[0055] 1 Metal core layer 2. First insulating layer 3 First wiring layer 5 Third wiring layer 6 Fourth insulating layer 7 Interlayer connection 8 Second insulating layer 8a through hole 9 Second wiring layer 9a Connection 9b Wiring section 10 Fifth insulating layer 11 Fourth wiring layer 51 Metal core layer 52 First insulating layer 53 First wiring layer 54 Third insulating layer 55 Third wiring layer 56 Fourth insulating layer 57 Interlayer connection 58 Second insulating layer 59 Second wiring layer 59a Connection 59b Wiring section

Claims

1. a metal core layer having a through hole; a first insulating layer disposed on one surface of the metal core layer; a second insulating layer disposed on the other surface of the metal core layer; a first wiring layer disposed on the first insulating layer; a second wiring layer disposed on the second insulating layer; an interlayer connection portion that penetrates the through hole of the metal core layer, electrically connects the first wiring layer and the second wiring layer, and is not electrically connected to the metal core layer; and the second wiring layer has a connection portion in contact with the interlayer connection portion and a wiring portion, a ratio of a distance (Lb) between the metal core layer and the connection portion in the surface direction of the metal core layer to a distance (La) between the interlayer connection portion and the metal core layer (wherein, when an end of the connection portion is on an extension of the through hole, the distance (Lb) is a positive value, and when an end of the connection portion is not on an extension of the through hole, the distance (Lb) is a negative value) is 0.5 or less; Wiring circuit board.

2. the connecting portion has a recess, a ratio of a depth (h2) of the recess of the connection portion to a total thickness (h1) of the metal core layer and the second insulating layer on the metal core layer is 0.25 or less; The printed circuit board according to claim 1 .

3. The shape of the side surface of the metal core layer on the through hole side in a cross section in the thickness direction is Is it a straight line in the same direction as the thickness direction? a straight line that slopes toward the through hole as it moves from the second insulating layer side to the first insulating layer side; Is it concavely curved? a straight line that slopes toward the through hole as it moves from the first insulating layer side to the second insulating layer side, or The wired circuit board according to claim 1 , which has a convex shape.

4. The printed circuit board according to claim 1 , wherein the second insulating layer does not contain a filler.

5. The printed circuit board according to claim 1 , wherein the second insulating layer contains a polyimide resin or an epoxy resin as a constituent component.

6. A semiconductor package comprising the printed circuit board according to any one of claims 1 to 5.

7. An electronic device comprising the semiconductor package according to claim 6.

8. a step of disposing a second insulating layer so as to cover the other surface of the metal core layer and the interlayer connection portion of a laminate including a metal core layer having a through hole, a first insulating layer disposed on one surface of the metal core layer, a first wiring layer disposed on the first insulating layer, and an interlayer connection portion that penetrates the through hole of the metal core layer and is electrically connected to the first wiring layer but not electrically connected to the metal core layer, and to fill the through hole; planarizing the second insulating layer to eliminate any depressions that may have occurred when the second insulating layer was disposed; pre-curing the planarized second insulating layer; forming a second wiring layer on the pre-cured second insulating layer; a step of fully curing the second insulating layer in a state where the second wiring layer is formed; The method for manufacturing a wired circuit board includes the steps of:

9. a step of disposing a second insulating layer so as to cover the other surface of the metal core layer of a laminate having a metal core layer having a through hole, a first insulating layer disposed on one surface of the metal core layer, and a first wiring layer disposed on the first insulating layer, and to fill the through hole; planarizing the second insulating layer to eliminate any depressions that may have occurred when the second insulating layer was disposed; pre-curing the planarized second insulating layer; forming an interlayer connection portion in the through hole of the metal core layer, and forming a second wiring layer on the precured second insulating layer and the interlayer connection portion; a step of fully curing the second insulating layer in a state where the second wiring layer is formed; The method for manufacturing a wired circuit board includes the steps of:

10. The method for manufacturing a wired circuit board according to claim 9 , wherein the interlayer connection portion and the second wiring layer are integrally formed.

Citation Information

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