Semiconductor device

Abstract

To provide a transistor having a stable electrical characteristics.SOLUTION: A transistor 10 includes a first insulator 104 formed over a substrate 100, first to third oxide insulators 106a, 106c, and 106d formed thereover, a second insulator 112 formed over a third oxide insulator, a first conductor 114 formed thereover, and a third insulator 116 formed thereover. An energy level of a conduction band minimum of the first and second oxide insulators is closer to a vacuum level than the energy level of the conduction band minimum of an oxide semiconductor 106b, the energy level of the conduction band minimum of the third oxide insulator is closer to the vacuum level than the energy level of the conduction band minimum of the second oxide insulator, and the first insulator contains oxygen. An amount of desorption of an oxygen molecule in the first insulator in a thermal desorption analysis is greater than or equal to 1.0×1014 molecules / cm2 or more and 1.0×1016 molecules / cm2 or less.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to, for example, a transistor and a semiconductor device. For example, the present invention relates to a method for manufacturing a transistor and a semiconductor device. The present invention relates to a display device, a light-emitting device, a lighting device, a power storage device, a storage device, a processor, and an electronic device. The present invention also relates to a manufacturing method of a display device, a liquid crystal display device, a light emitting device, a storage device, and an electronic device. The present invention also relates to a display device, a liquid crystal display device, a light emitting device, a storage device, and a method for driving electronic equipment.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to an article, a method, or a manufacturing method. One aspect of the invention is a process, machine, manufacture, or composition of matter. It concerns the matter of matter.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to devices in general, including display devices, light-emitting devices, lighting devices, electro-optical devices, semiconductor circuits, and electronic devices. The vessel may include a semiconductor device. [Background technology]

[0004] The technology of constructing transistors using semiconductors on substrates with insulating surfaces is attracting attention. The transistor is widely used in semiconductor devices such as integrated circuits and display devices. Silicon is known as a semiconductor that can be used in transistors.

[0005] The silicon used as a semiconductor in transistors is either amorphous silicon or polycrystalline silicon depending on the application. For example, it is suitable for transistors that make up large display devices. When using amorphous silicon, it is preferable to use amorphous silicon, for which film formation technology for large-area substrates has been established. On the other hand, it is also applied to transistors that constitute high-performance display devices that are integrally formed with driving circuits. In this case, polycrystalline silicon is used, which allows for the fabrication of transistors with high field-effect mobility. Polycrystalline silicon is preferably obtained by heat treatment at high temperature or laser treatment on amorphous silicon. A method of forming the layer by phototreatment is known.

[0006] In recent years, transistors using oxide semiconductors (typically In-Ga-Zn oxide) have become The history of oxide semiconductors is long, and in 1988, crystalline In-Ga It has been disclosed that Zn oxide is used in semiconductor devices (see Patent Document 1). In 1995, a transistor using an oxide semiconductor was invented, and its electrical properties is disclosed (see Patent Document 2).

[0007] The transistor using an oxide semiconductor includes a transistor using amorphous silicon, and It has different characteristics from transistors using polycrystalline silicon. A display device using a transistor using such an oxide is known to have low power consumption. Semiconductors can be deposited using methods such as sputtering, making it possible to form large-scale display devices using semiconductors. In addition, a transistor using an oxide semiconductor can be used as a high-voltage transistor. Because it has field effect mobility, it is possible to realize a high-performance display device in which a driving circuit is integrally formed. In addition, it is possible to improve and use some of the production equipment for amorphous silicon transistors. This also has the advantage of reducing capital investment. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Patent Publication No. 63-239117 [Patent Document 2] Special table 11-505377 Summary of the Invention [Problem to be solved by the invention]

[0009] An object of the present invention is to provide a transistor having stable electrical characteristics. An object of the present invention is to provide a transistor with low leakage current when conducting. Another object of the present invention is to provide a transistor having excellent frequency characteristics. Another object of the present invention is to provide a transistor having turn-off electrical characteristics. An object of the present invention is to provide a transistor with a small threshold swing value. An object of the present invention is to provide a highly reliable transistor.

[0010] Another object is to provide a semiconductor device including the transistor. Another object of the present invention is to provide a module including the semiconductor device. It is an object of the present invention to provide an electronic device having the module. It is an object of the present invention to provide a novel semiconductor device. Another object of the present invention is to provide a novel electronic device.

[0011] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. It is possible to extract other issues from the drawings, claims, etc. [Means for solving the problem]

[0012] One aspect of the present invention is a semiconductor device including a first insulator formed on a substrate and a semiconductor layer formed on the first insulator. a first oxide insulator formed in contact with at least a portion of the top surface of the first oxide insulator; a second oxide semiconductor formed in contact with at least a portion of the top surface of the oxide semiconductor; a third oxide insulator formed on at least a portion of the top surface of the second oxide insulator; a second insulator formed on the third oxide insulator; and a second insulator formed on the second insulator. a first conductor formed on the first insulating layer and a third insulating layer formed on the first conductor; The energy level of the conduction band minimum of the oxide insulator in 1 is the same as that of the oxide semiconductor. The energy level of the bottom of the conduction band of the second oxide insulator is closer to the vacuum level than the Vcc level. The energy level is closer to the vacuum level than the bottom of the conduction band of oxide semiconductors, and the conduction band of the third oxide insulator The energy level of the conduction band edge is significantly lower than that of the second oxide insulator. The first insulator is close to an empty energy level and contains oxygen. The first insulator is , the number of desorbed oxygen molecules is 1.0×10 14 molecules / cm 2 Over 1.0 x 10 1 6 molecules / cm 2 The semiconductor device is characterized by the following:

[0013] Another aspect of the present invention is a semiconductor device including a first insulator formed on a substrate and a semiconductor layer on the first insulator. a first oxide insulator formed on the first oxide insulator and a second oxide insulator in contact with at least a portion of the top surface of the first oxide insulator; and a metal oxide semiconductor formed in contact with at least a portion of the top surface of the oxide semiconductor. a second oxide insulator and a second oxide insulator formed in contact with at least a portion of the top surface of the second oxide insulator; a third oxide insulator, a second insulator formed on the third oxide insulator, and a second insulator formed on the second insulator; a first conductor formed on the edge; and a third insulator formed on the first conductor; and the energy gap of the first oxide insulator is equal to the energy gap of the oxide semiconductor. The energy gap of the second oxide insulator is larger than that of the oxide semiconductor. The energy gap of the third oxide insulator is larger than that of the second oxide insulator. The first insulator contains oxygen, and the first insulator exhibits thermal desorption spectroscopy. In the outgassing analysis, the amount of desorbed oxygen molecules was 1.0 × 10 14 molecules / cm 2 Over 1.0 x 10 16 molecules / cm 2 A semiconductor device characterized by the following: It is a location.

[0014] The semiconductor device further includes a second conductor and a third conductor, The conductor is in contact with at least a portion of the top surface of the second oxide insulator and is located under the third oxide insulator. the third conductor contacts at least a portion of the top surface of the second oxide insulator; the first conductive layer is in contact with at least a portion of the lower surface of the third oxide insulator; At least a portion of the first conductor may be formed so as not to overlap with the second conductor and the third conductor. stomach.

[0015] In the semiconductor device, the second conductor and the third conductor are made of a first oxide insulator. In a region that does not overlap with the insulator and the oxide semiconductor, the second oxide insulator is formed in contact with the top surface of the second oxide insulator. It may be done.

[0016] Moreover, the semiconductor device described above may further include a second conductor and a third conductor, The second conductor is in contact with at least a portion of the top surface of the oxide semiconductor and is located under the second oxide insulator. the third conductor is in contact with at least a part of the top surface of the oxide semiconductor; a portion of the first conductor and a portion of the second oxide insulator's lower surface; At least a part of the second conductor and the third conductor may be formed so as not to overlap with each other.

[0017] In the semiconductor device, the third oxide insulator is an element M (Ti, Ga, Y, Zr, La, Ce, Nd, Sn or Hf), zinc and oxygen.

[0018] In the semiconductor device, the second conductor and the third conductor have a stacked structure, The upper layers of the second and third conductors may be made of silver, copper, ruthenium, iridium, platinum, and Metals containing one or more elements selected from silver, copper, ruthenium, iridium, An oxide containing one or more elements selected from platinum and gold may also be used.

[0019] Another aspect of the present invention is a semiconductor device including a first insulator formed on a substrate and a semiconductor layer on the first insulator. a first oxide insulator formed on the first oxide insulator and a second oxide insulator in contact with at least a portion of the top surface of the first oxide insulator; and a metal oxide semiconductor formed in contact with at least a portion of the top surface of the oxide semiconductor. a first conductor and a second conductor formed in contact with at least a portion of the top surface of the oxide semiconductor; and a second conductor formed on at least a portion of the top surface of the oxide semiconductor. a second oxide insulator formed in contact with the first oxide insulator; and a second oxide insulator formed on the second oxide insulator. an insulating layer and a second insulating layer formed on the insulating layer and at least partially connected to the first conductor and the second conductor; a third conductor formed so as not to overlap the body; and a second conductor formed on the third conductor and a third insulator formed so that a portion of the third insulator is in contact with the upper surface of the first insulator; The energy levels of the conduction band minimum of the oxide insulator and the second oxide insulator are the same as those of the conduction band minimum of the oxide semiconductor. The region where the first insulator and the third insulator meet is closer to the vacuum level than the energy level of the lower conduction band. and a third conductive layer in the oxide semiconductor, which does not overlap with the first conductive layer and the second conductive layer. The distance between the first insulator and the region overlapping with the body is 3 μm or less, the first insulator contains oxygen, and the first insulator In thermal desorption analysis, the amount of oxygen molecules desorbed was 1.0 × 10 14 molecul es / cm 2 Over 1.0 x 10 16 molecules / cm 2 Characterized by the following: It is a semiconductor device.

[0020] In the semiconductor device, the lower surface of the first conductor and the lower surface of the second conductor are It is not necessary for the upper surface of the insulator 1 to be in contact with the upper surface of the insulator 1.

[0021] In the semiconductor device, the first conductor and the second conductor are In the region where the second oxide insulator does not overlap the third insulator, at least a portion of the second oxide insulator is interposed between the third insulator and the second oxide insulator. It may overlap with.

[0022] The semiconductor device further includes a fourth conductor and a fourth insulator, The conductor is formed on the substrate below the first insulating film, and the fourth insulator is connected to the fourth conductor. The fourth insulator is formed between the first insulator and the second insulator. The fourth insulator is made of boron, aluminum, silicon, or silicon. Candium, titanium, gallium, yttrium, zirconium, indium, lanthanum, oxides or nitrides containing cerium, neodymium, hafnium or thallium good.

[0023] In the semiconductor device, the first oxide insulator, the oxide semiconductor, and the second oxide The insulators are indium, elements M (Ti, Ga, Y, Zr, La, Ce, Nd, Sn or may contain Hf), zinc and oxygen.

[0024] In the semiconductor device, the third insulating film contains oxygen and aluminum. That's fine.

[0025] Another aspect of the present invention is a method for forming a first insulator on a substrate, and forming a second insulating film on the first insulator. forming an oxide insulator, an oxide semiconductor, a first conductor, and a second conductor; forming a second oxide insulator on the first conductor, the first conductor and the second conductor; A second insulator and a third conductor are formed on the insulating member, and at least A third insulator is deposited using RF sputtering so that a portion of it is in contact with the first insulator. and performing heat treatment in an atmosphere containing oxygen.

[0026] Another aspect of the present invention is a method for forming a first insulator on a substrate, and forming a second insulating film on the first insulator. forming an oxide insulator, an oxide semiconductor, a first conductor, and a second conductor; forming a second oxide insulator on the first conductor, the first conductor and the second conductor; A second insulator and a third conductor are formed on the insulating member, and at least A third insulator is formed by atomic layer deposition so that a part of the third insulator is in contact with the first insulator. and adding oxygen to the insulator and subjecting the insulator to heat treatment in an oxygen-containing atmosphere. A method for making a body device.

[0027] In the above-described method for manufacturing a semiconductor device, oxygen is added by ion implantation. It is also possible.

[0028] In the above-described method for manufacturing a semiconductor device, The second oxide insulator is made of indium, element M (Ti, Ga, Y, Zr, La, Ce, Nd , Sn or Hf), zinc and oxygen.

[0029] In the above-described method for manufacturing a semiconductor device, the third insulating film is formed of a material containing oxygen and aluminum. may have [Effects of the Invention]

[0030] It is possible to provide a transistor having stable electrical characteristics. It is possible to provide a transistor with a small leakage current. Alternatively, a transistor having normally-off electrical characteristics can be provided. Alternatively, a transistor having a small subthreshold swing value can be provided. It is possible to provide a highly reliable transistor. This can be done.

[0031] Alternatively, a semiconductor device including the transistor can be provided. Alternatively, a module having the semiconductor device or the module can be provided. Alternatively, a novel semiconductor device can be provided. Or, a new module can be provided. Or, a new power supply can be provided. Child devices can be provided.

[0032] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these may be included in the description. The above is self-evident from the description, drawings, claims, etc. From the above descriptions, it is possible to extract other effects. [Brief explanation of the drawings]

[0033] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 2] FIG. 1 is a band diagram according to one embodiment of the present invention. [Figure 3] 1A and 1B are diagrams illustrating structural analysis of a CAAC-OS and a single-crystal oxide semiconductor by XRD, and a selected-area electron diffraction pattern of a CAAC-OS. [Figure 4] Cross-sectional TEM image of CAAC-OS, as well as planar TEM image and its image analysis. [Figure 5] Electron diffraction pattern of nc-OS and cross-sectional TEM image of nc-OS. [Figure 6] Cross-sectional TEM image of a-like OS. [Figure 7] FIG. 1 shows the change in the crystalline part of an In-Ga-Zn oxide due to electron irradiation. [Figure 8] Schematic diagram illustrating a film formation model of CAAC-OS. [Figure 9] A diagram explaining InGaZnO4 crystals and pellets. [Figure 10] Schematic diagram explaining the film formation model of nc-OS. [Figure 11] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 12] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 13] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 14] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 15] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 16] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 17] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 18] 1A to 1C are cross-sectional views illustrating a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 19] 1A to 1C are cross-sectional views illustrating a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 20] 1A to 1C are cross-sectional views illustrating a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 21] 1A and 1B are a schematic view and a cross-sectional view illustrating a film forming apparatus. [Figure 22] 1A to 1C are cross-sectional views illustrating a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 23] 1A and 1B are a top view and a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 24] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 25] 1A and 1B are a top view and a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 26] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 27] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 28] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 29] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 30] FIG. 1 is a cross-sectional view illustrating a transistor according to one embodiment of the present invention. [Figure 31] 1A to 1C are cross-sectional views illustrating a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 32] 1A to 1C are cross-sectional views illustrating a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 33] 1A to 1C are cross-sectional views illustrating a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 34] FIG. 1 is a circuit diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 35] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 36] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 37] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 38] FIG. 1 is a circuit diagram illustrating a memory device according to one embodiment of the present invention. [Figure 39] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 40] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 41] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 42] FIG. 1 is a circuit diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 43] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 44] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 45] FIG. 1 is a block diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 46] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 47] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 48] 1A and 1B are a perspective view and a cross-sectional view illustrating a semiconductor device of one embodiment of the present invention. [Figure 49] FIG. 1 is a block diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 50] FIG. 1 is a circuit diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 51] 1A to 1C are a circuit diagram, a top view, and a cross-sectional view illustrating a semiconductor device of one embodiment of the present invention. [Figure 52] 1A and 1B are a circuit diagram and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 53] FIG. 10 is a perspective view illustrating an electronic device according to one embodiment of the present invention. [Figure 54] FIG. 1 is a cross-sectional view of a model used in calculations in the examples. [Figure 55] Graph of energy levels calculated in the examples. [Figure 56] 1 is a graph showing Id-Vg characteristics calculated in an example. [Figure 57] 1 is a graph showing Id-Vg characteristics measured in an example. [Figure 58] Graph showing the results of TDS analysis measured in the examples. [Figure 59] Graph showing the results of SIMS analysis measured in the examples. [Figure 60] 1 is a graph showing Id-Vg characteristics measured in an example. [Figure 61] Graphs showing various variations measured in Examples. [Figure 62] 1 is a graph showing the variation in shift measured in an example. [Figure 63] Graph showing the results of a stress test measured in an example. [Figure 64] Graph showing the results of TDS analysis measured in the examples. [Figure 65] Graph of reaction rate curve measured in the examples. [Figure 66] Graph of the temperature rise rate measured in the examples. [Figure 67] 1 is a graph of a thermal desorption signal calculated in an example. [Figure 68] Graph showing the results of TDS analysis measured in the examples. [Figure 69] 1 is a graph showing Id-Vg characteristics calculated in an example. [Figure 70] Graph showing the results of a stress test measured in an example. [Figure 71] Graph showing the results of a stress test measured in an example. [Figure 72] Graph showing the results of a stress test measured in an example. [Figure 73] Graph showing the results of a stress test measured in an example. [Figure 74] Graph showing the results of a stress test measured in an example. [Figure 75] Graphs showing various fluctuations depending on stress time measured in Examples. [Figure 76] Graphs showing various fluctuations depending on stress time measured in Examples. [Figure 77] 1 is a graph showing the variation in ΔShift measured in an example. DETAILED DESCRIPTION OF THE INVENTION

[0034] The embodiments of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the description, and various modifications in form and details can be easily made by those skilled in the art. Furthermore, the present invention should not be construed as being limited to the description of the following embodiments. In explaining the configuration of the invention using the drawings, the same symbols are used It is used in common among different drawings. When referring to the same thing, the hatch pattern is used in the same way. In some cases, no particular symbol is given.

[0035] The configurations shown in the following embodiments may be applied or combined as appropriate with other configurations shown in the embodiments. Combinations, substitutions, etc. can be made to form one embodiment of the present invention.

[0036] In the drawings, the size, thickness of the film (layer), or area is exaggerated for clarity. This may be the case.

[0037] In this specification, the terms "film" and "layer" are interchangeable. It is possible to do this.

[0038] Also, a voltage is a voltage between a certain potential and a reference potential (for example, ground potential (GND) or source potential). Therefore, voltage can be replaced with potential. Generally, potential (voltage) is relative, and the magnitude is relative to a reference potential. Therefore, even if it is described as "ground potential", The potential is not necessarily 0V. For example, the lowest potential in a circuit may be the "ground potential." Or, the intermediate potential in the circuit may be the "ground potential." In this case, the positive potential and the negative potential are defined based on that potential.

[0039] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of processes or stacking. It does not indicate the layer order. Therefore, for example, "first" should not be changed to "second" or "third." In addition, the ordinal numbers described in this specification and the like can be replaced with the ordinal numbers The term and the ordinal number used to identify an aspect of the present invention may not match.

[0040] Even when written as "semiconductor," if the conductivity is sufficiently low, it may be called an "insulator." In addition, the boundary between "semiconductors" and "insulators" is unclear and cannot be clearly defined. Therefore, the term "semiconductor" as used herein is not necessarily an "insulator" Similarly, the term "insulator" used in this specification can be interpreted as "semiconductor." It can sometimes be rephrased as "body."

[0041] Also, even if a material is written as a "semiconductor," if the material has a sufficiently high conductivity, it may be written as a "conductor." In addition, the boundary between "semiconductor" and "conductor" is unclear and cannot be clearly defined. Therefore, the term "semiconductor" as used herein is not necessarily a "conductor" Similarly, the term "conductor" used in this specification can be interpreted as "semiconductor." It can sometimes be rephrased as "body."

[0042] The impurities in a semiconductor refer to, for example, anything other than the main component that constitutes the semiconductor. Elements present at concentrations of less than 0.1 atomic percent are considered impurities. The formation of DOS (Density of State) in the conductor and carrier movement The semiconductor may be an oxide semiconductor, and the crystallinity may decrease. In the case of a conductor, impurities that change the properties of the semiconductor include, for example, elements of Group 1, Group elements, Group 14 elements, Group 15 elements, transition metals other than the main component, etc., in particular, , hydrogen (also found in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen In the case of oxide semiconductors, oxygen vacancies can be created by the inclusion of impurities such as hydrogen. In addition, when the semiconductor is silicon, there are cases where an impurity that changes the properties of the semiconductor is formed. The pure substances include, for example, oxygen, Group 1 elements excluding hydrogen, Group 2 elements, Group 13 elements, and Group 1 elements. Group 5 elements, etc.

[0043] In this specification, when it is stated that A has a region of concentration B, for example, If the entire depth direction in a certain region is concentration B, the average depth direction in a certain region of A is If the average value is concentration B, then if the median value in the depth direction in a region of A is concentration B, If the maximum value of concentration B in the depth direction in a region of A is If the minimum value in the direction is concentration B, the convergence value in the depth direction in a region of A is concentration B. This includes cases where the area where a reliable value of A itself can be obtained in measurement is concentration B. .

[0044] In this specification, A represents an area of ​​size B, length B, thickness B, width B or distance B. When describing something as having a certain area of ​​A, for example, the whole of A has size B, length B, thickness B, etc. If B, width B or distance B, the average value in a certain area of ​​A is size B, length B, thickness B If the length B, width B, or distance B is the median value of a region of A, then the median value of A has size B, length B, or If thickness B, width B, or distance B, the maximum value in a certain area of ​​A is size B, length B , thickness B, width B, or distance B, the minimum value of A in a certain area is the size B, length If B, thickness B, width B or distance B, the convergence value in a region of A is magnitude B, length B When the length B, thickness B, width B or distance B is measured, the value of A itself is not certain. This includes cases where the area has size B, length B, thickness B, width B or distance B.

[0045] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is in the on state, the gate electrode overlaps with the semiconductor (the part where current flows). The source (source region or source The distance between the drain electrode and the drain region is called the distance between the In the transistor, the channel length does not necessarily have the same value in all regions. The channel length of a transistor may not be determined to a single value. In the detailed description, the channel length is any one value, the maximum value, in the region where the channel is formed. , the minimum or average value.

[0046] The channel width is the width of the semiconductor (or transistor) when it is in the on state. The region where the gate electrode overlaps with the electrode (the area where current flows) forms a channel. The length of the region where the source and drain face each other. In a transistor, the channel width does not necessarily have the same value in all regions. The channel width of a transistor may not be determined to a single value. In the detailed description, the channel width is any one value, the maximum value in the region where the channel is formed. , the minimum or average value.

[0047] Depending on the structure of the transistor, the channel in the region where the channel is actually formed may be The effective channel width is shown in the top view of the transistor. The channel width that is actually used (hereinafter referred to as the apparent channel width) may differ from the actual channel width. For example, In a transistor having a three-dimensional structure, the effective channel width is The apparent channel width shown in the figure becomes larger, and the effect becomes non-negligible. For example, in transistors with a fine, three-dimensional structure, the side surface of the semiconductor In this case, the ratio of the channel region formed in the top view may be increased. The effective channel width of the channel is actually formed rather than the apparent channel width shown. will be larger.

[0048] In a transistor having a three-dimensional structure, the effective channel width is For example, it may be difficult to estimate the effective channel width from the design value. In order for deposition to occur, it is necessary to assume that the shape of the semiconductor is known. It is difficult to accurately measure the effective channel width if the channel conditions are not precisely known. .

[0049] Therefore, in this specification, in a top view of a transistor, a semiconductor and a gate electrode are not mutually connected. The apparent length is the length of the part where the source and drain face each other in the overlapping region. The above channel width is called "Surrounded Channel Width (SCW)". In this specification, it is simply referred to as the channel width. In some cases, it may refer to the enclosed channel width or apparent channel width. In this specification, when simply referring to a channel width, it may refer to an effective channel width. The channel length, channel width, effective channel width, apparent channel width, and The width of the interstitial channel can be determined by acquiring a cross-sectional TEM image and analyzing the image. Thus, the value can be determined.

[0050] The field effect mobility of the transistor and the current value per channel width are calculated. In this case, the effective channel width is calculated using the enclosed channel width. The value may differ from that calculated using the channel width.

[0051] In this specification, when it is stated that A has a shape that protrudes more than B, it means that Or in the cross-sectional view, at least one end of A is outside at least one end of B. Therefore, it is written that A has a shape that protrudes more than B. For example, in the top view, one end of A is located outside one end of B. This can be read as having the following.

[0052] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Parallel" refers to a state in which two lines are arranged at an angle of between -30° and 30°. Also, "perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes cases where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0053] In this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. vinegar.

[0054] <Transistor 1> The following describes the structure of a transistor as an example of a semiconductor device according to one embodiment of the present invention. explain.

[0055] The structure of the transistor 10 will be described with reference to FIGS. 1A to 1C. FIG. 1(A) is a top view of the transistor 10. FIG. 1(B) is a cross section of the dashed line A1-A2 in FIG. 1(C) is a cross-sectional view corresponding to the dashed line A3-A4 in FIG. 1(A). In the region indicated by the dashed line A1-A2, the channel length of the transistor 10 is The region indicated by the dashed line A3-A4 shows the structure of the transistor 10. The structure in the channel width direction is shown. The semiconductor 106b and the insulator 106c are arranged so as to overlap the conductors 108a, 108b, etc. However, since it is difficult to see in the top view, the insulator 106a and the semiconductor 106 b, the insulator 106c is shown slightly offset by a thin dashed line.

[0056] As shown in FIGS. 1A to 1C, a transistor 10 is formed on a substrate 100. The insulator 101, the conductor 102, the insulator 103 and the insulator 104 are formed by the above-mentioned method. an insulator 106a, a semiconductor 106b, an insulator 106c, and an insulator 106d formed thereon; Conductors 108a, 108b, 110a, and 110b formed on insulator 106c The conductor 110b, the insulator 112 formed on the insulator 106d, and the insulator 112 A conductor 114 is formed on the insulating layer 116, and an insulator 116 is formed on the conductor 114. 8, conductor 120a and conductor 120b.

[0057] Here, the insulator 101, the insulator 103, the insulator 104, the insulator 106a, the insulator 106 c, the insulator 106d, the insulator 112, the insulator 116, and the insulator 118 are insulating films or insulating The conductor 102, the conductor 108a, the conductor 108b, and the conductor 110a, conductor 110b, conductor 114, conductor 120a and conductor 120b are conductors. The semiconductor 106b can also be called a semiconductor film or a semiconductor layer. It can also be said that.

[0058] As will be described later in detail, the insulators 106a, 106c, and 106d are each a single When used independently, it refers to a substance that can function as a conductor, semiconductor, or insulator. However, when a transistor is formed by stacking the semiconductor 106b, The electrons flow through the semiconductor 106b, the vicinity of the interface between the semiconductor 106b and the insulator 106a, and the semiconductor 106b. The gas flows near the interface between the insulator 106b and the insulator 106c, and flows through the insulator 106a, the insulator 106c, and the insulator 106b. The insulator 106d has a region that does not function as a channel of the transistor. In this specification and the like, the insulators 106a, 106c, and 106d are semiconductors. Instead of describing it as "insulator," it will be described as "insulator."

[0059] A conductor 102 is formed on an insulator 101 formed on a substrate 100. 102 is overlapped with an insulator 106a, a semiconductor 106b, an insulator 106c, and an insulator 106d. An insulator 103 is formed on the conductor 102 so as to contact the conductor 102 and cover the conductor 102. An insulator 104 is formed on the insulator 103.

[0060] An insulator 106a is formed on the insulator 104, and at least one of the upper surfaces of the insulator 106a is A semiconductor 106b is formed in contact with the upper surface of the semiconductor 106b. Insulator 106c is formed. In FIG. 1B, insulator 106a, semiconductor 106b, The insulator 106a, the semiconductor 106b, and the insulator 106c are arranged so that their ends are approximately aligned. Although the semiconductor device shown in this embodiment has a structure of 106c, the structure is not limited to this. It's not that.

[0061] The conductors 108a and 108b are in contact with at least a portion of the upper surface of the insulator 106c. The conductor 108a and the conductor 108b are formed apart from each other, as shown in FIG. ) it is preferable that they are formed facing each other with the conductor 114 in between. As shown in FIG. 1(B), a conductor 110a is formed on and in contact with the conductor 108a. The conductor 110b may be formed on and in contact with the conductor 110b, forming a laminated structure.

[0062] An insulator 106d is formed in contact with at least a portion of the upper surface of the insulator 106c. 106d is a region sandwiched between the conductor 108a and the conductor 108b and the insulator 106c. In FIG. 1B, the insulator 106d is in contact with the conductor 108a and the conductor The semiconductor device shown in this embodiment is formed so as to cover the body 108b. However, the present invention is not limited to these.

[0063] An insulator 112 is formed on the insulator 106d. The conductor 114 is formed so as to overlap between the conductor 108a and the conductor 108b. The insulator 112 is shaped to cover the insulator 106d, the conductor 108a, the conductor 108b, etc. However, the structure of the semiconductor device described in this embodiment mode is not limited to this.

[0064] An insulator 116 is formed on the conductor 114 and the insulator 112, and an insulating layer is formed on the insulator 116. An insulator 118 is formed. A conductor 120a and a conductor 120b are formed on the insulator 118. The conductor 120a and the conductor 120b are connected to the insulator 106d, the insulator 112, and the insulator 114. The conductor 110a and the conductor 111b are electrically connected to each other through openings formed in the edge 116 and the insulator 118. It is connected to 0b.

[0065] As shown in FIG. 1(E), the conductor 114 is made up of the insulator 112, the insulator 106d, and the insulator 106c. The conductor 102 is connected to the conductor 104 through an opening formed in the insulator 103, etc. It may also be possible to use the following.

[0066] <Semiconductor 1> The detailed configuration of the semiconductor 106b will be described below. Regarding the configuration of the insulators 106a, 106c, and 106d in addition to 106b, Also provides an explanation.

[0067] The semiconductor 106b is, for example, an oxide semiconductor containing indium. For example, when indium is contained, the carrier mobility (electron mobility) increases. The body 106b preferably contains the element M. The element M is preferably Ti, Ga, Y, Zr , La, Ce, Nd, Sn or Hf, where the element M is the aforementioned element The element M may have a bond energy with oxygen of, for example, For example, the bond energy with oxygen is higher than that of indium. Alternatively, the element M may have a function of increasing the energy gap of the oxide semiconductor, for example. The semiconductor 106b preferably contains zinc. If lead is included, crystallization may occur more easily.

[0068] However, the semiconductor 106b is not limited to an oxide semiconductor containing indium. 06b does not contain indium, such as zinc tin oxide, gallium tin oxide, etc. Oxide semiconductors containing zinc, oxide semiconductors containing gallium, oxide semiconductors containing tin, etc. It's okay if there is.

[0069] For example, the insulators 106a and 106c are made of oxygen other than the oxygen that constitutes the semiconductor 106b. The semiconductor 106b is an oxide semiconductor composed of one or more of the elements. The insulator 106a and the insulator 10 are made of one or more elements other than oxygen. 6c is formed, the interface between the insulator 106a and the semiconductor 106b and the semiconductor 106 At the interface between the layer 106b and the insulator 106c, defect levels are unlikely to be formed.

[0070] The insulator 106a, the semiconductor 106b, and the insulator 106c contain at least indium. When the insulator 106a is an In-M-Zn oxide, the sum of In and M is When the atomic percentage of In is 100, it is preferable that In is less than 50 atomic percent and M is 5. 0 atomic % or more, more preferably In is less than 25 atomic % and M is 75 When the semiconductor 106b is an In-M-Zn oxide, When the sum of In and M is 100 atomic %, In is preferably 25 atomic %. c%, M is less than 75 atomic %, and more preferably In is 34 atomic % %, and M is less than 66 atomic %. In the case of n-oxide, when the sum of In and M is 100 atomic %, preferably In is less than 50 atomic %, M is higher than 50 atomic %, and more preferably In is 25 atomic % or less, and M is higher than 75 atomic %. However, the same oxide as that of the insulator 106a may be used. And the insulator 106c may not contain indium. The body 106a and / or the insulator 106c are gallium oxide or Ga-Zn oxide. It is to be noted that the insulator 106a, the semiconductor 106b, and the insulator 106c may contain The number of atoms of each element does not have to be in a simple integer ratio.

[0071] For example, when a film is formed by sputtering, the target used for the insulator 106a is Typical examples of atomic ratios of metal elements are In:M:Zn=1:2:4, In:M:Zn =1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, In:M: Zn=1:3:8, In:M:Zn=1:4:3, In:M:Zn=1:4:4, In: M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn=1:6:3, I n:M:Zn=1:6:4, In:M:Zn=1:6:5, In:M:Zn=1:6:6 , In:M:Zn=1:6:7, In:M:Zn=1:6:8, In:M:Zn=1:6 :9, In:M:Zn=1:10:1, etc. The atomic ratio of the metal elements in the Zn alloy may be M:Zn=10:1.

[0072] In addition, for example, when a film is formed by sputtering, the substrate used for the semiconductor 106b is Typical examples of atomic ratios of metal elements in the get are In:M:Zn=1:1:1, In:M :Zn=1:1:1.2, In:M:Zn=2:1:1.5, In:M:Zn=2:1: 2.3, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn= 4:2:4.1, In:M:Zn=5:1:7, etc. In particular, sputtering targets When the atomic ratio of In:Ga:Zn=4:2:4.1 is used as the substrate, the semiconductor The atomic ratio of the body 106b may be approximately In:Ga:Zn=4:2:3.

[0073] In addition, for example, when a film is formed by sputtering, the substrate used for the insulator 106c is Typical examples of atomic ratios of metal elements in the get are In:M:Zn=1:2:4, In:M :Zn=1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, In :M:Zn=1:3:8, In:M:Zn=1:4:3, In:M:Zn=1:4:4, In:M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn=1:6: 3, In:M:Zn=1:6:4, In:M:Zn=1:6:5, In:M:Zn=1: 6:6, In:M:Zn=1:6:7, In:M:Zn=1:6:8, In:M:Zn= In:M:Zn=1:6:9, In:M:Zn=1:10:1, etc. The atomic ratio of the metal elements in the target may be M:Zn=10:1.

[0074] Indium gallium oxide has a small electron affinity and a high oxygen blocking property. Therefore, the insulator 106c preferably contains indium gallium oxide. The atomic ratio [Ga / (In+Ga)] is, for example, 70% or more, preferably 80% or more, and More preferably, it is 90% or more.

[0075] For example, the insulator 106d may contain one or more elements other than oxygen that constitute the insulator 106c, The insulator 106c is an oxide semiconductor composed of two or more elements other than oxygen. Since the insulator 106d is made of one or more elements, the insulator 106c and the insulator 106d are insulated from each other. Defect levels are unlikely to be formed at the interface with the insulator 106d.

[0076] The insulator 106d contains a smaller amount of indium than the insulator 106c. It is more preferable that the insulator 106d does not contain indium. The body 106d is made of gallium oxide, Ga-Zn oxide, In-Ga-Zn oxide, or the like. The number of atoms of each element contained in the insulator 106d can be expressed as a simple integer ratio. For example, when forming the insulator 106d by sputtering, A typical example of the atomic ratio of the metal elements in the target used is Ga:Zn=10:1. do.

[0077] In this way, the insulator 106d is preferably an oxide semiconductor with a low indium content. By using an oxide semiconductor that does not contain indium, the insulator 106d can be The insulator 112 functions as a gate insulating film for the transistor 10. Here, the insulating layer 112 or the interface between the insulating layer 112 and the insulating layer 106d is The diffusion of silicide can increase the leakage current of transistors. Between the insulator 106a, the semiconductor 106b, the insulator 106c and the insulator 112, An oxide semiconductor containing a small amount of indium is preferable, and an oxide semiconductor containing no indium is more preferable. By providing the insulator 106d, the insulator 112 or the insulator 112 and the insulator 106 This reduces the amount of indium at the interface between the gate electrode and the gate electrode, thereby suppressing an increase in leakage current. By adopting such a configuration, the increase in leakage current can be suppressed while the insulator 106a, The indium content in the semiconductor 106b and the insulator 106c is increased to increase the on-current. It is possible.

[0078] The semiconductor 106b is made of, for example, an oxide with a large energy gap. The energy gap of 6b is, for example, 2.5 eV or more and 4.2 eV or less, preferably 2. The value is preferably 8 eV or more and 3.8 eV or less, and more preferably 3 eV or more and 3.5 eV or less. The energy gap of the insulator 106a is larger than the energy gap of the semiconductor 106b. The energy gap of the insulator 106c is larger than that of the semiconductor 106b. The energy gap of the insulator 106d is larger than that of the insulator 106c. It is larger than the energy gap.

[0079] The semiconductor 106b is an oxide having a larger electron affinity than the insulators 106a and 106c. For example, the semiconductor 106b is made of a material having a higher conductivity than the insulators 106a and 106c. The electron affinity is 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less. 5 eV or less, more preferably, an oxide having a larger value of 0.15 eV or more and 0.4 eV or less is used. The insulator 106c is made of an oxide having a higher electron affinity than the insulator 106d. Electron affinity is the energy difference between the vacuum level and the bottom of the conduction band. The energy level of the conduction band minimum of 106a is the same as the energy level of the conduction band minimum of semiconductor 106b. The energy level of the insulator 106c at the bottom of the conduction band is closer to the vacuum level than that of the semiconductor. The energy level of the insulator 106d is closer to the vacuum level than the energy level of the bottom of the conduction band of the insulator 106b. The energy level of the conduction band edge is closer to the vacuum level than the energy level of the insulator 106c. stomach.

[0080] At this time, when a gate voltage is applied, the insulator 106a, the semiconductor 106b, and the insulator 106 A channel is formed in the semiconductor 106b having a larger electron affinity than the insulator 106d. do.

[0081] As described above, when the insulators 106a, 106c, and 106d are used alone, In this case, the material is made of a material that can function as a conductor, semiconductor, or insulator. However, when a transistor is formed by stacking the semiconductor 106b, electrons flow through the semiconductor 106b. , near the interface between the semiconductor 106b and the insulator 106a, and near the interface between the semiconductor 106b and the insulator 106c. The insulators 106a, 106c, and 106d flow near the interface. Therefore, in this specification and elsewhere, The insulators 106a, 106c, and 106d are not described as semiconductors but as insulators. The insulators 106a, 106c, and 106d are insulators. The description is based on the fact that the function of the transistor is closer to that of an insulator than that of the semiconductor 106b. Therefore, the insulators 106a, 106c, and 106d are made of semiconductors. In some cases, materials that can be used for the conductor 106b may be used.

[0082] Here, there is a gap between the insulator 106a and the semiconductor 106b. In addition, there may be a mixed region between the semiconductor 106b and the insulator 106c. In some cases, the semiconductor 106b and the insulator 106c are mixed together. Between the insulating layer 106c and the insulating layer 106d, there is a mixed region of the insulating layer 106c and the insulating layer 106d. The mixed region has a low defect level density. The laminate of the insulating layer 106b, the insulating layer 106c, and the insulating layer 106d has a thickness of 100 μm and a thickness of 100 μm. This results in a band diagram where the energy changes continuously (also called a continuous junction) (see Figure 2). The insulator 106a, the semiconductor 106b, the insulator 106c, and the insulator 106d are In some cases, the boundaries between the two layers may not be clearly distinguishable.

[0083] At this time, the electrons are not in the insulator 106a, the insulator 106c, and the insulator 106d. As described above, the electrons move mainly through the insulator 106a and the semiconductor 106b. The defect level density at the interface with the semiconductor 106b and the interface between the semiconductor 106b and the insulator 106c By reducing the defect level density in the semiconductor 106b, the movement of electrons in the semiconductor 106b is inhibited. This reduces the risk of leakage and increases the on-state current of the transistor.

[0084] As described above, an oxide semiconductor having a low indium content, more preferably an oxide semiconductor having a low indium content, is used. The insulator 106d, which is an oxide semiconductor containing no smectium, is used as an insulating film that functions as a gate insulating film. By forming the insulating layer 112 in contact with the insulating layer 112, the insulating layer 112 is This reduces the indium at the interface of transistor 1. However, the increase in leakage current of the insulator 106 on the semiconductor 106b can be suppressed. When the semiconductor 106b and the insulator 106d are formed in direct contact with each other, the difference in the metal elements contained in the semiconductor 106b and the insulator 106d In fact, due to the difference in electron affinity between the semiconductor 106b and the insulator 106d, There is a risk that the defect state density at the interface of the insulator 106d will increase.

[0085] In contrast, the insulator 106c has elements and electron affinities similar to those of the insulator 1. The insulator 106c is closer to the semiconductor 106b than to the semiconductor 106d. By forming the semiconductor 106b between the insulator 106d, the semiconductor 106b and the insulator 106d are in direct contact with each other. The interface between the semiconductor 106b and the insulator 106c is smaller than that between the semiconductor 106b and the insulator 106c. The defect level density at the interface can be reduced.

[0086] This reduces the defect level density at the interface between the semiconductor 106b and the insulator 106c. Therefore, the movement of electrons in the semiconductor 106b is less hindered. The mobility can be improved by using a structure of One of the causes of noise in flow is 1 / f noise. 1 / f noise is a frequency It refers to the frequency component of current fluctuations that increases in inverse proportion to f. One model is that the carrier electrons are scattered and their mobility changes. In other words, by reducing the defect level density and improving the mobility, 1 / f noise can be reduced. In addition, by reducing 1 / f noise, it is possible to Since it is possible to reduce transistor noise even when using a high-frequency transistor, can be provided.

[0087] In the above structure, the insulator 106a, the semiconductor 106b, the insulator 106c, and the insulator 106 By providing d, the increase in leakage current is suppressed and 1 / f noise is suppressed. can be done.

[0088] In addition, the on-current of the transistor can be increased by reducing the factors that hinder the movement of electrons. For example, if there are no factors that hinder the movement of electrons, electrons can move efficiently. It is estimated that the electron movement is slower when, for example, the physical unevenness of the channel formation region is large. is also inhibited.

[0089] In order to increase the on-current of the transistor, for example, The root mean square of the surface (the surface to be formed, in this case the insulator 106a) in a range of 1 μm×1 μm Root Mean Square (RMS) roughness should be less than 1 nm, preferably 0. If it is less than 6 nm, more preferably less than 0.5 nm, and even more preferably less than 0.4 nm, In addition, the average surface roughness (also called Ra) within a 1 μm x 1 μm area is less than 1 nm. , preferably less than 0.6 nm, more preferably less than 0.5 nm, and even more preferably less than 0.4 The maximum height difference (PV) in the area of ​​1 μm x 1 μm should be less than 1 μm. ) is less than 10 nm, preferably less than 9 nm, more preferably less than 8 nm, and even more preferably The RMS roughness, Ra and PV are measured by SII Nano Measurements were taken using a scanning probe microscope system SPA-500 manufactured by Technology Co., Ltd. It is possible.

[0090] In addition, in order to increase the on-state current of the transistor, the thickness of the insulator 106c is preferably as small as possible. The thickness of the insulator 106c is preferably smaller than the thickness of the insulator 106a. For example, the thickness is less than 10 nm, preferably 5 nm or less, More preferably, the insulator 106c has a region of 3 nm or less. 06c is a semiconductor 106b in which a channel is formed, and is formed by introducing oxygen other than oxygen constituting the adjacent insulator. It has the function of blocking elements (hydrogen, silicon, etc.) from entering. It is preferable that the insulator 106c has a certain thickness, for example, 0.3 nm or more. , preferably 1 nm or more, more preferably 2 nm or more insulator 10 In addition to oxygen released from the insulator 104, the insulator 106c In order to suppress lateral diffusion, it is preferable that the material has oxygen blocking properties.

[0091] In addition, in order to increase the on-state current of the transistor, the thickness of the insulator 106d is preferably as small as possible. The sum of the thickness of the insulator 106d and the thickness of the insulator 106c is preferably less than the thickness of the semiconductor 106b. It is preferable that the thickness is smaller than 1 / 2 mm.

[0092] In order to increase reliability, the insulator 106a is thick and the insulator 106c is thin. For example, it is preferably 10 nm or more, more preferably 20 nm or more, and even more preferably 40 nm or more. The insulator 106a may have a thickness of 60 nm or more, more preferably 60 nm or more. By increasing the thickness of the insulator 106a, the interface between the insulator 106a and the adjacent insulator can be improved. The distance from the semiconductor 106b where the channel is formed can be increased. Therefore, for example, the thickness is set to 200 nm or less, preferably 120 If the insulator 106a has a region with a thickness of 80 nm or less, more preferably 80 nm or less, good.

[0093] For example, the semiconductor 106b and the insulator 106a may be separated by, for example, secondary ion mass spectrometry ( SIMS (Secondary Ion Mass Spectrometry) 1×10 16 atoms / cm 3More than 1×10 19 atoms / cm 3 The following is preferred: 1×10 16 atoms / cm 3 5x10 or more 18 atoms / cm 3 Further details are as follows: Preferably 1 x 10 16 atoms / cm 3 Over 2×10 18 atoms / cm 3 below The semiconductor 106b and the insulator 106c have a region where the concentration of silicon is high. In IMS, 1 x 10 16 atoms / cm 3 More than 1×10 19 atoms / cm 3 Less than 1 × 10 16 atoms / cm 3 5x10 or more 18 atoms / cm 3 or less, more preferably 1 × 10 16 atoms / cm 3 Over 2×10 18 atoms / cm 3 The silicon concentration in the region is as follows:

[0094] In order to reduce the hydrogen concentration in the semiconductor 106b, the insulator 106a and the insulator 106b are It is preferable to reduce the hydrogen concentration in the insulator 106a and the insulator 106c. In S, 1×10 16 atoms / cm 3 Over 2×10 20 atoms / cm 3 below , preferably 1 x 10 16 atoms / cm 3 5x10 or more 19 atoms / cm 3 below , more preferably 1 × 10 16atoms / cm 3 More than 1×10 19 atoms / cm 3 or less, more preferably 1 × 10 16 atoms / cm 3 5x10 or more 18 atoms / cm 3 The hydrogen concentration in the semiconductor 106b is reduced. Therefore, it is preferable to reduce the nitrogen concentration in the insulators 106a and 106c. The 106a and the insulator 106c have a SIMS resolution of 1×10 15 atoms / cm 3 5x10 or more 19 atoms / cm 3 Less than 1 × 10 15 atoms / cm 3 5x10 or more 18 atoms / cm 3 Less than 1×10, more preferably 15 atoms / c m 3 More than 1×10 18 atoms / cm 3 or less, more preferably 1 × 10 15 atom s / cm 3 5x10 or more 17 atoms / cm 3 The nitrogen concentration ranges as follows:

[0095] Here, in FIG. 1D, the insulator 106a, the semiconductor 106b, and the insulator 106c are arranged in the vicinity of the center. As shown in FIGS. 1B and 1D, the semiconductor 106b or the insulator 10 6c, etc., which are in contact with the conductor 108a or the conductor 108b (FIGS. 1B and 1D). In this case, low resistance regions 109a and 109b may be formed in the region (shown by dotted lines). The low resistance region 109a and the low resistance region 109b are mainly formed of the semiconductor 106b or the insulator 106c. 6c is in contact with the conductor 108a or conductor 108b, or the conductor 10 The conductive material contained in the semiconductor 106b or the insulator 106c is Such low resistance region 109a and low resistance region 10 By forming the conductor 108a or 108b and the semiconductor 106b or 106c, Since the contact resistance with the insulator 106c can be reduced, the on-state voltage of the transistor 10 can be reduced. The flow can be increased.

[0096] Although not shown, the insulator 106a and the conductor 108a or the conductor 108b A low resistance region may also be formed in the contact region. Similar dotted lines indicate low resistance regions.

[0097] As shown in FIG. 1D, the insulator 106c is formed by the conductor 108a and the conductor 108b. There is a region between the conductive layers 108a and 108b that is thinner than the region where the conductive layers 108a and 108b overlap. This is because when the conductor 108a and the conductor 108b are formed, the insulator 106c The insulator 106c is formed by removing a portion of the upper surface of the conductor 10. When the conductors that will become the conductors 8a and 108b are formed, the low resistance regions 109a and 109b In this way, a low resistance region similar to that of the upper surface of the insulator 106c may be formed. The region located between the conductor 108a and the conductor 108b is removed to form the insulator 10 It is possible to prevent a channel from being formed in the low resistance region on the top surface of 6c. In subsequent drawings, even if an area with a thin film thickness is not shown in an enlarged view, it is assumed that the area with a thin film thickness is the same. Areas may be formed.

[0098] <Structure of oxide semiconductors> The structure of an oxide semiconductor will be described below.

[0099] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide Semiconductor, nc-OS (nanocrystalline oxide semiconductor) conductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- like oxide semiconductor) and amorphous oxide semiconductor be.

[0100] From another point of view, oxide semiconductors are classified into amorphous oxide semiconductors and other crystalline oxides. Crystalline oxide semiconductors are divided into single-crystal oxide semiconductors, CAAC -OS, polycrystalline oxide semiconductor, and nc-OS.

[0101] Amorphous structures are generally isotropic and have no heterogeneous structure, and are characterized by the arrangement of atoms in a metastable state. The position is not fixed, the bond angle is flexible, and there is short-range order but no long-range order. It is said that there is no such thing.

[0102] That is, a stable oxide semiconductor is completely amorphous. s) It cannot be called an oxide semiconductor. Also, it is not isotropic (for example, a periodic structure in a small area) An oxide semiconductor having an amorphous structure cannot be called a completely amorphous oxide semiconductor. ike OS is not isotropic, but has an unstable structure with voids. In terms of instability, a-like OS is similar in physical properties to amorphous oxide semiconductors. stomach.

[0103] <caac-os> First, let me explain about CAAC-OS.

[0104] CAAC-OS is an oxide having multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0105] CAAC-OS was analyzed by X-ray diffraction (XRD). For example, InGaZnO4, which is classified into the space group R-3m, The structure of CAAC-OS with crystals was analyzed by the out-of-plane method. As shown in Figure 3(A), a peak appears at a diffraction angle (2θ) of approximately 31°. The crystal structure is attributed to the (009) plane of InGaZnO4. The crystal has a c-axis orientation, and the c-axis is the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed). It can be seen that the crystal is oriented in a direction perpendicular to the surface, or in a direction approximately perpendicular to the surface. In addition to the peaks around 2θ around 36°, a peak may also appear. The peaks around the nucleus are due to the crystal structure classified into the space group Fd-3m. It is preferable that -OS does not exhibit such a peak.

[0106] On the other hand, in-pl X-ray irradiation is performed on CAAC-OS in a direction parallel to the surface to be formed. When structural analysis is performed using the ane method, a peak appears at 2θ around 56°. This peak is It is attributed to the (110) plane of the InGaZnO4 crystal. And, 2θ is fixed at around 56°. The sample is then rotated around the normal vector of the sample surface as the axis (φ axis) for analysis (φ scan). Even if this is done, no clear peak appears, as shown in Figure 3(B). When φ was scanned with 2θ fixed at around 56° for nO4, the results were as shown in Figure 3(C). Six peaks attributable to the crystal plane equivalent to the (110) plane are observed. From the structural analysis using D, it was found that the orientation of the a-axis and b-axis of CAAC-OS is irregular. can be confirmed.

[0107] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, the process was performed parallel to the surface on which the CAAC-OS was formed. When an electron beam with a probe diameter of 300 nm is incident, a diffraction pattern (control pattern) like that shown in Figure 3(D) is generated. This diffraction pattern may contain In. This includes spots due to the (009) plane of the GaZnO4 crystal. Even in such cases, the pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis is aligned with the surface on which the film is formed. On the other hand, for the same sample, the direction of the sample surface is The diffraction pattern when an electron beam with a probe diameter of 300 nm was incident perpendicularly is shown in Figure 3(E). A ring-shaped diffraction pattern is observed in Figure 3(E). The pellets contained in CAAC-OS were also identified by electron diffraction using a 300 nm electron beam. It can be seen that the a-axis and b-axis of the first phosphorus in FIG. The glitches are thought to be due to the (010) and (100) planes of the InGaZnO4 crystal. The second ring in Figure 3(E) is thought to be due to the (110) plane. do.

[0108] In addition, a transmission electron microscope (TEM) Combined analysis of bright-field images and diffraction patterns of CAAC-OS using a microscope When observing the image (also called a high-resolution TEM image), multiple pellets can be confirmed. On the other hand, even in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries (grain boundaries), are not clearly visible. It may not be possible to clearly identify the boundary. It can be said that C-OS is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0109] Figure 4(A) shows a high-resolution T image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. The TEM image shown here is a spherical aberration correction (SAC) image. The spherical aberration correction function was used. A high-resolution TEM image is specifically called a Cs-corrected high-resolution TEM image. For example, an atomic resolution analytical electron microscope JEM-ARM200F manufactured by JEOL Ltd. It can be observed that

[0110] From Figure 4(A), we can see the pellet, which is the region where metal atoms are arranged in layers. It has been found that the size of a single pellet can be 1 nm or more, or 3 nm or more. Therefore, the pellets are called nanocrystals (nc). Also, CAAC-OS can be used with CANC (C-Axis Aligned Nano The pellets can also be called oxide semiconductors with CAAC -OS surface or upper surface unevenness is reflected, and CAAC-OS surface or upper surface unevenness is reflected. is parallel to the surface.

[0111] In addition, Figures 4(B) and 4(C) show the CAAC- Figure 4(D) and Figure 4(E) show Cs-corrected high-resolution TEM images of the OS surface, respectively. These are images obtained by processing Figures 4(B) and 4(C). The image processing method is explained below. First, let us consider the case where the image in Figure 4(B) is subjected to a fast Fourier transform (FFT). Then, the FFT image is obtained by performing the r Transform process. 2.8nm based on the origin -1 to 5.0 nm -1 Masking to leave the range between Next, the masked FFT image is subjected to an inverse fast Fourier transform (IFFT). e Fast Fourier Transform (FTFT) processing is used to process the image. The image obtained in this way is called an FFT filtered image. FFT filtering The image is an image in which the periodic component is extracted from a Cs-corrected high-resolution TEM image, and shows the lattice arrangement. There are.

[0112] In Figure 4(D), the area where the lattice arrangement is disrupted is indicated by a dashed line. The area surrounded by the dashed line is The area indicated by the broken line is the connection between the pellets. The broken line indicates a hexagonal shape, which indicates that the pellets are hexagonal. The shape of the dot is not limited to a regular hexagon, and is often a non-regular hexagon.

[0113] In Figure 4(E), a dotted line separates a region with a uniform lattice arrangement from a region with a different uniform lattice arrangement. The lattice orientation is indicated by a dotted line, and the direction of the lattice arrangement is indicated by a dashed line. If you connect the grid points around the dotted line, you will get a distorted hexagon. In other words, by distorting the lattice arrangement, This is because the CAAC-OS has ab plane. The atomic arrangement is not dense in the direction, and the bond distance between atoms is reduced by the substitution of metal elements. This is thought to be because distortion can be tolerated by changing the

[0114] As described above, the CAAC-OS has a c-axis orientation and is Multiple pellets (nanocrystals) are connected to form a distorted crystal structure. AAC-OS, CAA crystal(c-axis-aligned abp It can also be called an oxide semiconductor with lane-anchored crystals. Cut.

[0115] In addition, the CAAC-OS is an oxide semiconductor with a low density of defect states. Defects include, for example, defects caused by impurities and oxygen vacancies. AC-OS can also be considered an oxide semiconductor with a low impurity concentration. S can be said to be an oxide semiconductor with few impurities and oxygen vacancies. CAAC-OS is an oxide semiconductor with low carrier density. Degrees to 8 x 10 11 / cm 3 Less than 1 x 10 11 / cm 3 Less than, preferably is 1 x 10 10 / cm 3 Less than 1 x 10 -9 / cm 3 It can be more than that. Such an oxide semiconductor is called a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. CAAC-OS has a low impurity concentration and a low density of defect states, which means it has stable characteristics. It can be said to be an oxide semiconductor.

[0116] Impurities contained in oxide semiconductors can act as carrier traps or as carrier generation sources. In addition, oxygen vacancies in an oxide semiconductor may become carrier traps or By capturing hydrogen, it may become a carrier generation source.

[0117] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon are more oxidative than metal elements that constitute oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0118] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor has fewer carrier traps. The charge trapped in the carrier traps of the oxide semiconductor is released in a short time. The charge is long and can behave as if it were a fixed charge. A transistor using an oxide semiconductor with a high density of defect states may have unstable electrical characteristics. On the other hand, transistors using CAAC-OS have small fluctuations in their electrical characteristics and are highly reliable. This results in a highly efficient transistor.

[0119] In addition, CAAC-OS has a low defect level density, so it is possible to generate Therefore, the carriers are less likely to be captured by the defect level. The electrical characteristics of a transistor are less susceptible to change when irradiated with visible light or ultraviolet light.

[0120] Hydrogen trapped in oxygen vacancies in oxide semiconductors (hereinafter referred to as V O It is sometimes called H. This acts as a scattering center for the carrier. O H is formed, Poor transistor mobility and S value (Subthreshold swing value) In response to this, reducing the amount of hydrogen impurities and oxygen vacancies will It is important to compensate for the oxygen vacancies by supplying oxygen to the oxide semiconductor. This can be done.

[0121] The oxygen vacancies are compensated for by the excess oxygen in the insulator such as silicon oxide provided in contact with the oxide semiconductor. It is preferable to use excess oxygen (hereinafter sometimes referred to as ex-O). Hydrogen V trapped in the defect O When excess oxygen ex-O reacts with H, OH may be formed. This OH is a shallow level DOS. This may cause the carriers in the semiconductor to function as The electrons that are carriers are captured by OH, and the captured electrons are released. .

[0122] [ka]

[0123] Such OH bonds with Zn contained in the oxide semiconductor to form ZnOH, In this way, OH is presumably lost as a shallow DOS. For this purpose, in the transistor 10, the insulator 106a, the semiconductor 106b, It is preferable that the insulators 106c and 106d contain excess zinc. The insulator 106a and / or the insulator 106c may be the above-mentioned ternary compound of In:M:Zn=1:4:5. It is preferable to use an oxide semiconductor film formed using a get. The insulator 106a is formed with an oxide semiconductor film using a target of In:M:Zn=1:4:5. By using the semiconductor 106b, Zn is released from the insulator 106a, and the semiconductor 106b and the insulator 106b are Zn diffuses into the bulk and / or interface of the insulating layer 106c and the insulating layer 106d. This allows more OH and Zn to bond.

[0124] With this structure, a shallow position in the oxide semiconductor of the transistor can be formed. This reduces the formation of DOS in the transistor. The factors that inhibit mobility are reduced, resulting in an increase in on-current, improved mobility, and a good S value. This can have effects such as:

[0125] In addition, zinc is relatively easy to form a crystalline structure in oxide semiconductors. By including a large amount of zinc in 106a, semiconductor 106b, and insulator 106c, CAAC-OS is more likely to form.

[0126] <nc-os> Next, we will explain nc-OS.

[0127] We will explain the analysis of nc-OS by XRD. However, when structural analysis was performed using the out-of-plane method, no peaks indicating orientation appeared. That is, the crystals of the nc-OS do not have any orientation.

[0128] For example, an nc-OS having InGaZnO4 crystals was thinned to a thickness of 34 nm. When an electron beam with a probe diameter of 50 nm is incident parallel to the surface to be formed on the region m, the A ring-shaped diffraction pattern (nanobeam electron diffraction pattern) as shown in (A) was observed. In addition, the diffraction pattern (nano) when an electron beam with a probe diameter of 1 nm is incident on the same sample. The electron diffraction pattern (BEM) is shown in Figure 5(B). Multiple spots are observed. Therefore, the nc-OS is an electron probe with a diameter of 50 nm. However, when an electron beam with a probe diameter of 1 nm is irradiated, the order is not confirmed. By doing so, order can be confirmed.

[0129] In addition, when an electron beam with a probe diameter of 1 nm is incident on an area with a thickness of less than 10 nm, As shown in Figure 5(C), an electron diffraction pattern was observed in which the spots were arranged in a roughly regular hexagonal shape. Therefore, in the range of thickness less than 10 nm, the nc-OS is ordered. It can be seen that the crystals are oriented in various directions. Therefore, there are some areas where no regular electron diffraction pattern is observed.

[0130] Figure 5(D) shows the Cs-corrected high-resolution image of the cross section of nc-OS observed from a direction approximately parallel to the surface on which the film was formed. The nc-OS is shown in the high-resolution TEM image, with the areas indicated by the auxiliary lines. There are two areas where crystals can be seen, as shown in Fig. 1, and areas where no clear crystals can be seen. The crystal part contained in the nc-OS has a size of 1 nm to 10 nm. In particular, the size is often between 1 nm and 3 nm. An oxide semiconductor having a size of more than 0 nm and not more than 100 nm is called a microcrystalline oxide semiconductor (microcrystalline oxide semiconductor). It is sometimes called a crystalline oxide semiconductor. For example, in the case of nc-OS, the grain boundaries cannot be clearly identified in high-resolution TEM images. It is possible that the nanocrystals originate from the same source as the pellets in CAAC-OS. Therefore, the crystalline part of nc-OS may be referred to as pellets below.

[0131] In this way, nc-OS can be used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially The atomic arrangement has periodicity in the region of 1 nm to 3 nm. In the case of the SiO2 film, there is no regularity in the crystal orientation between different pellets. Therefore, depending on the analytical method, nc-OS may be classified as a-like OS or amorphous OS. In some cases, it may be difficult to distinguish them from solid oxide semiconductors.

[0132] In addition, since there is no regularity in the crystal orientation between the pellets (nanocrystals), nc-OS , oxidation with RANC (Random Aligned nanocrystals) semiconductors or NANC (Non-Aligned nanocrystals) The oxide semiconductor may also be called an oxide semiconductor.

[0133] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, in nc-OS, there is no regularity in the crystal orientation between different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0134] <a-like OS> The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. It is a semiconductor.

[0135] Figure 6 shows high-resolution cross-sectional TEM images of the a-like OS. Figure 6(B) shows a high-resolution cross-sectional TEM image of the a-like OS at the start of irradiation. 4.3×10 8 e - / nm 2 electrons (e - ) High decomposition of a-like OS after irradiation Figures 6(A) and 6(B) show that the a-like OS is From the start of the irradiation, striped bright areas extending in the vertical direction are observed. It can be seen that the shape of the pores changes after electron irradiation. It is speculated.

[0136] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the structural changes caused by electron irradiation.

[0137] As samples, a-like OS, nc-OS, and CAAC-OS were prepared. Both samples are In-Ga-Zn oxides.

[0138] First, high-resolution cross-sectional TEM images of each sample are acquired. All of the materials have crystalline parts.

[0139] The unit cell of the InGaZnO4 crystal has three In-O layers and one Ga-Zn It is known that the structure has a total of nine layers, six of which are -O layers, stacked in layers along the c-axis. The distance between these adjacent layers is determined by the lattice spacing (also called the d value) of the (009) plane. The value is about the same, and is calculated to be 0.29 nm from crystal structure analysis. In the following, the area where the lattice spacing is 0.28 nm or more and 0.30 nm or less is referred to as InGaZ. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal. do.

[0140] Figure 7 shows an example of the average size of the crystal parts (22 to 30 locations) of each sample. The length of the lattice fringes mentioned above is the size of the crystal part. The crystal part of the OS grows in size according to the cumulative amount of electron irradiation used to obtain a TEM image. As can be seen from Figure 7, the size was about 1.2 nm at the beginning of the TEM observation. The crystal part (also called the initial nucleus) - ) cumulative exposure is 4.2 × 10 8 e - / n m 2 On the other hand, in the nc-O For S and CAAC-OS, the cumulative electron irradiation dose from the start of electron irradiation was 4.2 × 10 8 e - / nm 2 It can be seen that there is no change in the size of the crystals in the range of Regardless of the cumulative irradiation dose of the atoms, the size of the crystalline parts of nc-OS and CAAC-OS was The results show that the electron beam irradiation and T The EM observation was performed using a Hitachi transmission electron microscope H-9000NAR. The electron beam irradiation conditions were The voltage was 300 kV and the current density was 6.7 × 10 5 e - / (nm 2 s), the diameter of the irradiated area was set to 230 nm.

[0141] In this way, the growth of crystalline parts can be observed in a-like OS due to electron irradiation. On the other hand, in nc-OS and CAAC-OS, the growth of the crystals by electron irradiation is almost nonexistent. In other words, a-like OS is not seen in comparison with nc-OS and CAAC-OS. , it is clear that this is an unstable structure.

[0142] In addition, due to its porosity, a-like OS is more flexible than nc-OS and CAAC-OS. Specifically, the density of a-like OS is lower than that of a single crystal of the same composition. The density of the nc-OS is 78.6% or more and less than 92.3% of that of the nc-OS. The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0143] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 That is it. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0 g / cm 3 Less than 5.9 g / cm 3 and less. Also for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio] , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 or more and less than 6.3 g / cm 3 and less.

[0144] In addition, when there is no single crystal of the same composition, by combining single crystals with different compositions at an arbitrary ratio, the density corresponding to the single crystal in the desired composition can be estimated. The density corresponding to the single crystal of the desired composition may be estimated using a weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible. As described above, the oxide semiconductor has various structures and each has various characteristics. In addition, the oxide semiconductor may be a laminated film having two or more of, for example, an amorphous oxide semiconductor, a-like OS, nc-OS

[0145]

[0146] <CAAC-OS Film Formation Method> <00016;

[0147] Hereinafter, an example of a method for forming CAAC-OS will be described. <000;

[0148] FIG. 8 is a schematic diagram for explaining the inside of a film formation chamber. CAAC-OS can be formed by a sputtering method. As shown in FIG. 8, the substrate 5220 and the target 5230 are arranged to face each other.

[0149] There is a plasma 5240 between the substrate 5220 and the target 5230. The plasma 5240 has ions 5201 in which the components of the sputtering gas are ionized.

[0149] Ions 5201 are accelerated toward the target 5230, and the impact on the target 5230 peels off pellets 5200, which are pellet-shaped particles. At that time, particles 5203 composed of atoms constituting the target 5230 are also peeled off. And the pellets 5200 and particles 5203 are charged by receiving charges in the plasma 5240.

[0150] There is already an oxide thin film 5206 deposited on the substrate 5220. When the pellets 5200 and particles 5203 reach the oxide thin film 5206, they are deposited so as to avoid other pellets 5200. This is due to the repulsive force (repulsion) caused by the fact that the surface of the pellet 5200 is charged with the same polarity (negative here). The substrate 5220 is heated, and the deposited pellets 5200 and particles 5203 migrate on the surface of the substrate 5220.

[0151] Therefore, the oxide thin film 5206 and the pellets 5200 on the substrate 5220 have a cross-sectional shape as shown in FIG. 9 ( A).

[0152] The pellets 5200 have a shape in which the target 5230 is split. For example, in In-M-Zn oxide (M represents Ti, Ga, Y, Zr, La, Ce, Nd, Sn, or Hf), it has the cross-sectional shape shown in FIG. 9 (B) and the top surface shape shown in FIG. 9 (C).

[0153] <Film formation model of CAAC-OS and nc-OS> Next, the film formation model of CAAC-OS will be described in detail. ​​​

[0154] The distance d between the substrate 5220 and the target 5230 (target-substrate distance (TS distance) The distance is 0.01 m or more and 1 m or less, preferably 0.02 m or more and 0.5 m or less. The deposition chamber is mostly filled with deposition gas (e.g., oxygen, argon, or oxygen in a volume of 5). % or more), and the pressure is 0.01 Pa or more and 100 Pa or less, preferably is controlled to be 0.1 Pa or more and 10 Pa or less. By applying a voltage, a discharge starts and plasma 5240 is observed. A high density plasma region is formed near the nozzle 5230 by the magnetic field. In the region, the deposition gas is ionized to generate ions 5201. , for example, oxygen cations (O + ) and argon cations (Ar + ) etc. Although not shown, a heating mechanism may be provided below the substrate 5220 .

[0155] Although not shown, the target 5230 is also bonded to a backing plate. There are multiple magnets positioned facing the target 5230 via the backing plate. The sputtering method, which uses the magnetic field of a magnet to increase the film deposition rate, This is called the magnetron sputtering method.

[0156] The target 5230 has a polycrystalline structure having a plurality of crystal grains, and includes cleavage planes.

[0157] Ions 5201 generated in the high-density plasma region are attracted to the target 5230 by the electric field. The particles are accelerated and eventually collide with the target 5230. At this time, flat or planar particles are formed from the cleavage plane. The pellet 5200, which is a pellet-shaped sputtered particle, is peeled off. The cross section of the pellet 5200 is 9(B), and the top surface is as shown in FIG. 9(C). The impact of the ion 5201 collision may cause distortion in the structure.

[0158] The pellet 5200 is a flat or pellet-shaped pellet having a triangular, for example, equilateral triangular, plane. Alternatively, the pellet 5200 may have a hexagonal, for example, regular hexagonal, plane. The sputtered particles are in the form of plates or pellets. However, the shape of the pellets 5200 is not limited to triangles or hexagons, for example, when it is a shape made up of multiple triangles For example, a quadrilateral (e.g., a rhombus) is formed by joining two triangles (e.g., an equilateral triangle). ) may also be used.

[0159] The thickness of the pellet 5200 is determined depending on the type of deposition gas. 5200 has a thickness of 0.4 nm or more and 1 nm or less, preferably 0.6 nm or more and 0.8 nm or less. For example, the pellet 5200 has a width of 1 nm or more and 3 nm or less, preferably The thickness shall be between 1.2nm and 2.5nm.

[0160] As the pellet 5200 passes through the plasma 5240, its surface becomes negatively or positively charged. For example, the pellet 5200 may be in the plasma 5240. - from As a result, the oxygen atoms on the surface of the pellet 5200 become negatively charged. Also, when the pellet 5200 passes through the plasma 5240, The growth occurs when the element M combines with indium, zinc, or oxygen in Zuma 5240. There is a match.

[0161] The pellets 5200 and particles 5203 that have passed through the plasma 5240 are Some of the particles 5203 are small in mass and can be removed by a vacuum pump or other device. It may be discharged to the outside.

[0162] Also, when the particles 5203 have filled the gaps between the pellets 5200, they A layer (first layer) having a thickness of about 100 nm is formed. The integrated layer has a layer 5200 and is integrated by growing on a substrate 5220. A new first pellet 5200 is deposited on top, and a second layer is formed. Furthermore, by repeating this process, a thin film structure having a laminated body is formed.

[0163] The deposition pattern of the pellets 5200 also changes depending on the surface temperature of the substrate 5220. For example, if the surface temperature of the substrate 5220 is high, the pellet 5200 may be heated to the surface of the substrate 5220. As a result, pellet 5200 and another pellet 5200 However, the proportion of connections not via particle 5203 increases, resulting in highly oriented CAAC-OS. The surface temperature of the substrate 5220 during the CAAC-OS film formation is 100° C. or higher and 500° C. or lower. ° C. or less, preferably 140° C. or more and less than 450° C., and more preferably 170° C. or more and 400° C. Therefore, when a large-area substrate of the 8th generation or later is used as the substrate 5220, It can be seen that there is almost no warping or the like.

[0164] On the other hand, when the surface temperature of the substrate 5220 is low, the pellet 5200 moves to the surface of the substrate 5220. As a result, pellets 5200 do not pile up. In the case of nc-OS, the pellet is 520 0 is negatively charged, the pellets 5200 may be deposited at equal distances. Therefore, although the orientation is low, the presence of a slight regularity makes it possible to form an amorphous oxide semiconductor. It has a denser structure than the body.

[0165] In addition, the gaps between the pellets become extremely small, forming one large pellet. The inside of one large pellet has a single crystal structure. For example, The size of the particles is 10 nm or more and 200 nm or less, 15 nm or more and 100 nm or less when viewed from the top. Alternatively, it may be 20 nm or more and 50 nm or less.

[0166] According to the above-described film formation model, the pellets 5200 are deposited on the surface of the substrate 5220. It is considered that the CAAC-OS film can be formed even when the surface on which the film is formed does not have a crystalline structure. This indicates that the growth mechanism is different from epitaxial growth. In addition, CAAC-OS and nc-OS can be deposited uniformly even on large glass substrates. For example, if the structure of the surface (surface to be formed) of the substrate 5220 is an amorphous structure (for example, non-crystalline), It is possible to form a CAAC-OS film even on a silicon dioxide (crystalline silicon dioxide).

[0167] In addition, even if the surface of the substrate 5220 on which the film is to be formed is uneven, the film is formed along the shape of the uneven surface. It can be seen that let 5200 is arranged.

[0168] The film formation model shown above allows for highly crystalline films to be formed even on a surface with an amorphous structure. Therefore, a CAAC-OS having the desired properties can be obtained.

[0169] <Substrate, insulator, conductor 1> Each of the non-semiconductor components of transistor 10 will be described in detail below.

[0170] The substrate 100 may be, for example, an insulating substrate, a semiconductor substrate, or a conductive substrate. Examples of the substrate include a glass substrate, a quartz substrate, a sapphire substrate, and a stabilized zirconia substrate. Substrates (such as yttria-stabilized zirconia substrates), resin substrates, etc. Also, semiconductor substrates Examples of the substrate include a single semiconductor substrate such as silicon or germanium, or silicon carbide. , silicon germanium, gallium arsenide, indium phosphide, zinc oxide, gallium oxide, etc. Furthermore, there are semiconductor substrates having an insulating region inside the semiconductor substrate. Examples of suitable substrates include silicon-on-insulator (SOI) substrates. Conductive substrates include graphite substrates, metal substrates, alloy substrates, conductive resin substrates, etc. The substrates include substrates having metal nitrides and substrates having metal oxides. a substrate in which a conductor or a semiconductor is provided on a solid substrate, a substrate in which a conductor or an insulator is provided on a semiconductor substrate, and a substrate in which a semiconductor or an insulator is provided on a conductive substrate. The substrate may have elements mounted thereon. These include capacitors, resistors, switch elements, light-emitting elements, and memory elements.

[0171] In addition, a flexible substrate that can withstand the heat treatment during transistor fabrication is used as the substrate 100. As a method for providing a transistor on a flexible substrate, a non-flexible After forming the transistor on the substrate, the transistor is peeled off and the substrate 1, which is a flexible substrate, is removed. There is also a method to transpose it to 00. In that case, there is a peeling between the non-flexible substrate and the transistor. The substrate 100 may be a sheet, film or A foil or the like may be used. The substrate 100 may also have flexibility. The material may have the property of returning to its original shape when the bending or pulling is stopped. The thickness of the substrate 100 may be, for example, 5 μm to 700 μm. m or less, preferably 10 μm or more and 500 μm or less, and more preferably 15 μm or more and 300 μm or less The thickness of the substrate 100 is set to 1 μm or less. By making the substrate 100 thinner, the weight of the semiconductor device can be reduced. By making the substrate 100 thin, it is possible to make it flexible and foldable even when glass or the like is used. When the bending or pulling is stopped, the material may return to its original shape. The impact applied to the semiconductor device on the substrate 100 can be reduced by the support or the like. In other words, a robust semiconductor device can be provided.

[0172] The substrate 100, which is a flexible substrate, may be made of, for example, metal, alloy, resin, or glass. Alternatively, fibers thereof can be used. The substrate 100, which is a flexible substrate, has a linear expansion coefficient of 100. The lower the expansion ratio, the more preferable it is because deformation due to the environment is suppressed. For example, the linear expansion coefficient is 1×10 -3 / K or less, 5×10 -5 / K or less, or 1× 10 -5 The resin may be, for example, polyester, Polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate Aramid, in particular, has a low linear expansion coefficient, making it suitable for flexible substrates. It is suitable as the plate 100.

[0173] The insulator 101 is an insulator that has the function of blocking hydrogen or water. 6a, the semiconductor 106b, the insulator 106c, and the water in the insulator provided near the insulator 106d. The oxygen and water are mixed in the insulator 106a, the semiconductor 106b, and the insulator 106c, which also function as an oxide semiconductor. 6c, which is one of the factors that generate carriers in the insulator 106d. In particular, when the substrate 100 is made of a silicon material such as a switching element, the reliability of the substrate 10 may be reduced. When using a substrate with a semiconductor element, the dangling bonds of the semiconductor element must be terminated. Hydrogen is used to terminate the gate, and there is a risk that the hydrogen will diffuse to the transistor 10. In contrast, by providing an insulator 101 having the function of blocking hydrogen or water, The diffusion of hydrogen or water from the lower layer of the transistor 10 is suppressed, thereby improving the reliability of the transistor 10. can be improved.

[0174] In addition, the insulator 101 preferably has a function of blocking oxygen. By blocking oxygen diffusing from the insulator 104, The semiconductor 106a, the insulator 106c, and the insulator 106d can be effectively supplied with oxygen. This can be done.

[0175] The insulator 101 may be, for example, aluminum oxide, aluminum oxynitride, or gallium oxide. gallium oxide nitride, yttrium oxide, yttrium oxide nitride, hafnium oxide, Hafnium oxynitride or the like can be used. This allows the film to function as an insulating film that blocks the diffusion of oxygen, hydrogen, or water. The insulator 101 may be made of, for example, silicon nitride or silicon nitride oxide. By using these as the insulator 101, the diffusion of hydrogen and water can be blocked. It should be noted that in this specification and the like, the term "nitride" refers to a material that functions as an insulating film that exhibits a blocking effect. Silicon oxide is a material that contains more nitrogen than oxygen. Silicon nitride refers to a material whose composition contains more oxygen than nitrogen.

[0176] The conductor 102 has at least a region sandwiched between the conductors 108a and 108b. Preferably, the conductor 102 overlaps with the semiconductor 106b. By providing such a conductor 102, the transistor The threshold voltage of the transistor 10 can be controlled. However, the structure of the semiconductor device shown in this embodiment is not limited to this. It's not that.

[0177] The conductor 102 may be, for example, boron, nitrogen, oxygen, fluorine, silicon, phosphorus, or aluminum. Aluminum, titanium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, Thorium, zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum and Conductors containing one or more of tungsten and cerium may be used in a single layer or a multilayer. , alloys or compounds, and conductors containing aluminum, conductors containing copper and titanium Conductors containing copper and manganese, conductors containing indium, tin and oxygen, titanium and conductors containing nitrogen may also be used.

[0178] The insulator 103 is provided to cover the conductor 102. The insulator 103 blocks oxygen. By providing such an insulator 103, In other words, the conductor 102 draws oxygen from the insulator 104. This prevents the insulator 104 from being electrically connected to the insulator 106a and the semiconductor 106b. , oxygen can be effectively supplied to the insulators 106c and 106d. By increasing the coverage of the insulator 103, more oxygen is extracted from the insulator 104. The insulator 104 is reduced to the insulator 106a, the semiconductor 106b, the insulator 106c, and the insulator 106d. 06d can provide oxygen effectively.

[0179] The insulator 103 may be boron, aluminum, silicon, scandium, titanium, or gallium. Sodium, yttrium, zirconium, indium, lanthanum, cerium, neodymium, halide An oxide or nitride containing hafnium or thallium is used. Preferably, hafnium oxide is used. Aluminum or aluminum oxide is used.

[0180] In addition, when a conductor such as a wiring is provided in the same layer as the conductor 102, the conductor is also covered. It is preferable to form an insulator 103 thereon.

[0181] In addition, when the conductor 102 is not provided, it is not necessarily required to provide the insulator 103. When the insulator 103 is not provided, the insulator 101 has a function of blocking oxygen. It is preferable that:

[0182] The insulator 104 is preferably an insulator with excess oxygen. By providing the semiconductor 104, the insulator 104 is connected to the insulator 106a, the semiconductor 106b, and the insulator 10 Oxygen can be supplied to the oxide semiconductor 6c and the insulator 106d. The oxides that become defects in the insulator 106a, the semiconductor 106b, the insulator 106c, and the insulator 106d This reduces the element vacancies in the insulator 106a, the semiconductor 106b, and the insulator The insulator 106c is an oxide semiconductor having a low density of defect states and stable characteristics. It is possible.

[0183] The insulator 104 may be, for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, Aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium Insulators containing aluminum, zirconium, lanthanum, neodymium, hafnium or tantalum are used alone. For example, the insulator 104 may be a silicon oxide, a silicon dioxide, or a silicon dioxide film. Silicon nitride is preferably used. Aluminum oxide, magnesium oxide, and nitride are also usable. silicon oxide, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, Zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tantalum oxide It may be used.

[0184] The insulator 104 having excess oxygen has a temperature of 10 In the surface temperature range of 0°C to 700°C or 100°C to 500°C, the oxygen molecules The amount of desorption is 1.0×10 14 molecules / cm 2 Over 1.0 x 10 16 molec ules / cm 2 or less, more preferably 1.0 × 10 15 molecules / cm 2 Over 5.0 x 10 15 molecules / cm 2 The following is the result.

[0185] The method for measuring the amount of released oxygen using TDS analysis is described below.

[0186] The total amount of gas released when the measurement sample is subjected to TDS analysis is calculated by the integral value of the ion intensity of the released gas. By comparison with a standard sample, the total amount of gas released can be calculated.

[0187] For example, the TDS analysis results of a silicon substrate containing a specified density of hydrogen as a standard sample, and From the TDS analysis results of the measurement sample, the amount of oxygen molecules released from the measurement sample (N O2 ) is shown below Here, the gas detected at a mass-to-charge ratio of 32 obtained by TDS analysis can be calculated using the formula: We assume that all of the carbon atoms are derived from oxygen molecules. The mass-to-charge ratio of CH3OH is 32, but It is not considered here as it is unlikely. Also, the mass number of the isotope of the oxygen atom is 17. The existence of oxygen atoms with mass number 18 and oxygen molecules with mass number 18 in nature is also Not considered as the ratio is extremely small.

[0188] N O2 =N H2 / S H2 ×S O2 ×α

[0189] N H2 is the density converted value of hydrogen molecules desorbed from the standard sample. H2 is the standard This is the integrated value of the ion intensity when the sample is subjected to TDS analysis. Here, the reference value of the standard sample is N H2 / S H2 Let's say S O2 is the integral value of the ion intensity when the measurement sample is subjected to TDS analysis. α is a coefficient that affects the ion intensity in TDS analysis. Details of the above formula For details, see Japanese Patent Application Laid-Open No. 6-275697. A thermal desorption analyzer EMD-WA1000S / W manufactured by Kagaku Co., Ltd. was used as a standard sample. Measurements are made using a silicon substrate containing a fixed amount of hydrogen atoms.

[0190] In addition, some of the oxygen is detected as oxygen atoms in TDS analysis. The atomic ratio can be calculated from the ionization rate of oxygen molecules. Since it includes the ionization rate of the molecules, evaluating the amount of released oxygen molecules can be used to estimate the amount of released oxygen atoms. It is also possible to estimate.

[0191] In addition, N O2 is the amount of released oxygen molecules. The amount of released oxygen atoms is This is twice the amount of offspring released.

[0192] Alternatively, insulators that release oxygen upon heat treatment may contain peroxide radicals. Specifically, the spin density due to peroxide radicals is 5×10 17 spins / cm 3 Insulators containing peroxide radicals can be analyzed by electron spin resonance (E In SR (Electron Spin Resonance), the g value is around 2.01. It may also have an asymmetric signal.

[0193] The insulator 104 may also have a function of preventing the diffusion of impurities from the substrate 100. The insulator 104 may also be an insulator having hydrogen traps.

[0194] As mentioned above, it is preferable that the upper or lower surface of the semiconductor 106b is highly flat. Therefore, the upper surface of the insulator 104 is subjected to chemical mechanical polishing (CMP). To improve the flatness, a flattening process is performed using methods such as the CAL Polishing. Good too.

[0195] The conductor 108a and the conductor 108b are the source electrode or It functions as either a drain electrode or a gate electrode.

[0196] The conductor 108a and the conductor 108b may include, for example, boron, nitrogen, oxygen, fluorine, Silicon, phosphorus, aluminum, titanium, chromium, manganese, cobalt, nickel, copper, Zinc, gallium, yttrium, zirconium, molybdenum, ruthenium, silver, indium Conductors containing one or more of aluminum, tin, tantalum and tungsten are used in a single layer or multilayer. For example, alloys or compounds may be used, and conductors containing aluminum, copper, Conductors containing copper and manganese, conductors containing indium, tin and oxygen Conductors containing titanium and nitrogen, etc. may also be used.

[0197] The conductors 110a and 110b are made of materials with high Gibbs free energy of oxidation reaction. By providing such conductors 110a and 110b, This allows oxygen to be extracted from the films in contact with the upper surfaces of the conductors 108a and 108b. As a result, the conductors 108a and 108b are partially oxidized and the resistance is reduced. The insulator 106a, the semiconductor 106b, the insulator 106c, and the insulating layer 106b are formed in a uniform pattern. Oxygen can be effectively supplied to the insulator 106d.

[0198] The conductors 110a and 110b may be made of, for example, silver, copper, ruthenium, iridium, or the like. a metal or oxide containing one or more elements selected from aluminum, platinum and gold, in a single layer, or When oxides are used as the conductors 110a and 110b, In this case, it is preferable to use an oxide containing ruthenium or iridium because of its high conductivity. An example of an oxide containing ruthenium or iridium is RuO X (X is 0.5 or more below), IrO X (X is 0.5 or more and 3 or less), SrRuO X (X is 1 or more and 5 or less) The conductors 110a and 110b may be made of tungsten silicide or the like. Either may be used.

[0199] In FIG. 1B, the conductors 110a and 110b are the conductors 108a and 108b. Although it is formed on the conductor 108b, the configuration of the semiconductor device shown in this embodiment is For example, the conductor 110a and the conductor 110b are not formed, and the conductor The conductive member 108 may be configured with only the conductive member 108a and the conductive member 108b. Alternatively, the conductive material 110a and the conductive material 110b may be omitted and only the conductive material 110a and the conductive material 110b may be used. , the conductors 110a and 110b are provided under the conductors 108a and 108b. This may also be configured as follows.

[0200] The insulator 112 functions as a gate insulating film for the transistor 10. The insulator 112 may be an insulator having excess oxygen, similar to the insulator 104. By providing the insulating layer 112, the insulating layer 106a, the semiconductor layer 106b, and the insulating layer 106c , oxygen can be supplied to the insulator 106d.

[0201] The insulator 112 may be, for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, Aluminum, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium Insulators containing aluminum, zirconium, lanthanum, neodymium, hafnium or tantalum are used alone. For example, the insulator 112 may be made of aluminum oxide, Magnesium oxide, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride , gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide For example, tantalum oxide, neodymium oxide, hafnium oxide, or tantalum oxide may be used.

[0202] The conductor 114 functions as the gate electrode of the transistor 10. Any conductor that can be used as the conductor 102 may be used.

[0203] Here, as shown in FIG. 1C, the electric fields of the conductors 102 and 114 The semiconductor 106b can be electrically surrounded (the electric field generated by the conductor The structure of a transistor that electrically surrounds the body is called a surrounded channel ( Therefore, the entire semiconductor 106b (top, bottom, and In the s-channel structure, the channel is formed in the source and side of the transistor. A large current can be passed between the source and drain, and the current during conduction (on-state current) can be increased. can.

[0204] When the transistor has an s-channel structure, the side surface of the semiconductor 106b is Therefore, the thicker the semiconductor 106b, the larger the channel region. That is, the thicker the semiconductor 106b, the higher the on-current of the transistor. In addition, the thicker the semiconductor 106b, the greater the proportion of the region with high carrier controllability. For example, the subthreshold swing value can be reduced to 10 nm or more. Preferably 20 nm or more, further preferably 40 nm or more, and even more preferably 60 nm or more, More preferably, the semiconductor 106b has a region with a thickness of 100 nm or more. However, the productivity of the semiconductor device may be reduced. The semiconductor 106 has a region with a thickness of 200 nm or less, more preferably 150 nm or less. As the channel formation region shrinks, the semiconductor 106b becomes thinner. However, the electrical characteristics of the transistor may be improved. It may be less than nm.

[0205] Because of the high on-current, the s-channel structure is suitable for miniaturized transistors. Since the transistor can be miniaturized, the semiconductor device having the transistor The device can be a highly integrated, high density semiconductor device. The transistor preferably has a channel length of 40 nm or less, more preferably 30 nm or less. Preferably, the transistor has a channel width of 20 nm or less. or 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. It has a region.

[0206] The insulators 116 and 118 function as interlayer insulating films for the transistor 10. The insulator 116 may be an insulator having excess oxygen, similar to the insulator 104. By providing the insulator 116, the insulator 116 can be used to form the insulator 106a, the semiconductor 106b, Oxygen can be supplied to the insulators 106c and 106d. Any insulator that can be used as the insulator 104 may be used.

[0207] The insulator 118 may be, for example, carbon, nitrogen, oxygen, fluorine, magnesium, or aluminum. Umium, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zinc Insulators containing lanthanum, neodymium, hafnium or tantalum are used in single or double layers. The insulator 118 may be formed of oxygen, hydrogen, water, alkali metals, alkaline earth metals, or the like. It is preferable that the insulating material has an effect of blocking metals, etc. Examples of such insulating materials include The nitride insulating film may be made of silicon nitride, oxynitride, or the like. Silicon nitride, aluminum nitride, aluminum oxide nitride, etc. Alternatively, an oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like may be provided. Examples of the oxide insulating film include aluminum oxide, aluminum oxynitride, gallium oxide, and oxide Gallium nitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride Funium, etc.

[0208] Aluminum oxide makes the membrane permeable to both impurities such as hydrogen and moisture, and oxygen. It is preferable to apply it to the insulator 118 because it has a high blocking effect without being affected by the air. The oxygen contained in the semiconductor is absorbed through the insulator 116 and the like, and then the insulator 106a, the semiconductor 106b, and the insulator 106b. 106c, and may be diffused into the insulator 106d.

[0209] The conductor 120a and the conductor 120b are the source electrode and the drain electrode of the transistor 10. The conductors 120a and 120b function as wiring electrically connected to the electrodes. In this case, a conductor that can be used as the conductor 108a and the conductor 108b may be used. stomach.

[0210] By adopting the above-described structure, a transistor having stable electrical characteristics can be provided. Alternatively, it is possible to provide a transistor with a small leakage current when it is not conducting. Alternatively, a transistor having high frequency characteristics can be provided. In this way, a transistor having normally-off electrical characteristics can be provided. It is possible to provide a transistor with a small threshold swing value. This makes it possible to provide a highly reliable transistor.

[0211] <Transistor 1 Modification> Modifications of the transistor 10 will be described below with reference to FIGS. 11 to 17 are diagrams showing the channel length of a transistor, similar to FIGS. 1B and 1C. The cross-sectional view is a cross-sectional view in the direction of the channel width of the transistor.

[0212] The transistor 12 shown in FIGS. 11A and 11B includes a conductor 102 and an insulator 103. In this case, the insulator 101 blocks oxygen. By having the locking function, the insulator 104 can be more effectively separated from the insulator 106a and the semiconductor Oxygen can be supplied to the insulator 106b, the insulator 106c, and the insulator 106d.

[0213] The transistor 14 shown in FIGS. 11C and 11D has a conductor 122 formed on a conductor 102. The transistor 10 differs from the transistor 10 in that the insulator 103 is not formed. The conductor 122 is made of the same material as the conductors 110a and 110b. By adopting such a structure, oxygen is extracted from the insulator 104 on the upper surface of the conductor 102. This prevents a portion of the conductor 102 from being oxidized and increasing the resistivity. and is effective for the insulator 106a, the semiconductor 106b, the insulator 106c, and the insulator 106d. This effectively supplies oxygen.

[0214] The transistor 16 shown in FIGS. 12A and 12B has a conductor 114 and an insulator 112 at their ends. The transistor 10 differs from the transistor 10 in that it is formed to be approximately the same as the transistor 10. The transistor 17 shown in (C) and (D) has a conductor 114, an insulator 112, and an insulator 106. The transistor 10 differs from the transistor 10 in that the ends of the gates 11 and 12 are formed so as to be substantially aligned.

[0215] The transistor 18 shown in FIGS. 13A and 13B includes a conductor 108a and a conductor 108b. In the region that does not overlap with the semiconductor 106b and the insulator 106c, The transistor 16 differs from the transistor 16 in that the conductors 108a and The conductor 108b is formed apart from the insulator 104. As a result, oxygen is drawn from the insulator 104 at the lower surfaces of the conductors 108a and 108b. This can prevent the conductors 108a and 108b from being partially oxidized. The increase in resistivity due to the change in the insulating layer 104 is suppressed, and the insulating layer 106a and the semiconductor layer 10 6b, insulator 106c, and insulator 106d can be supplied with oxygen effectively.

[0216] The thickness of the insulator 106a in the region not overlapping with the semiconductor 106b is equal to that of the semiconductor 106b. This may be because the thickness of the semiconductor 106b is smaller than that of the region overlapping the semiconductor 106b. This is because, when the insulating layer 106 is removed, a part of the upper surface of the insulating layer 106a may be removed.

[0217] The transistor 19 shown in FIGS. 13C and 13D includes a conductor 114, an insulator 112, and an insulator 113. The transistor 106 differs from the transistor 18 in that the ends of the bodies 106d are formed so as to be substantially aligned. become.

[0218] The transistor 20 shown in FIGS. 14A and 14B includes the conductor 108a and the conductor 108b. In the region that does not overlap with the insulator 106a and the semiconductor 106b, The transistor 10 differs from the transistor 10 in that the conductors 108a and 108b are formed in contact with each other. The conductor 108b is formed apart from the insulator 104. As a result, oxygen is drawn from the insulator 104 at the lower surfaces of the conductors 108a and 108b. This can prevent the conductors 108a and 108b from being partially oxidized. The increase in resistivity due to the change in the insulating layer 104 is suppressed, and the insulating layer 106a and the semiconductor layer 10 6b, insulator 106c, and insulator 106d can be supplied with oxygen effectively.

[0219] The transistor 22 shown in FIGS. 14C and 14D includes a conductor 114, an insulator 112, and an insulating layer. The transistor 106 differs from the transistor 20 in that the ends of the bodies 106d are formed so as to be substantially aligned. become.

[0220] The transistor 24 shown in FIGS. 15A and 15B has a conductor 114 and an insulator 112. Insulator 118 is formed, and insulator 116 is formed on insulator 118. This is different from the transistor 10. By adopting such a configuration, the insulator 118 More oxygen can be supplied to the insulator 104, and the insulator 106a and the semiconductor Oxygen can be effectively supplied to the body 106b, the insulator 106c, and the insulator 106d.

[0221] The transistor 26 shown in FIGS. 15C and 15D has a conductor 108a and a conductor 108b. The lower surface of the insulator 106c is in contact only with the upper surface of the insulator 106c. As shown in FIGS. 15(C) and 15(D), one end of the conductor 108a is connected to the insulator 106. a, the semiconductor 106b, and the insulator 106c are formed so as to roughly coincide with one end of the conductor One end of the semiconductor 108b is connected to the other end of the insulator 106a, the semiconductor 106b, and the insulator 106c. Here, the conductor 108a and the conductor 108b may be formed so as to substantially coincide with each other. The conductive member 108 is formed at a distance from the conductive member 104. a and the lower surface of the conductor 108b, the extraction of oxygen from the insulator 104 can be suppressed. As a result, a portion of the conductor 108a and the conductor 108b is oxidized, increasing the resistivity. and the insulator 104 is transferred to the insulator 106a, the semiconductor 106b, and the insulator 106c. Therefore, oxygen can be effectively supplied to the insulator 106d.

[0222] The transistor 28 shown in FIGS. 16A and 16B includes a conductor 108a and a conductor 108b. contacts at least a portion of the upper surface of the semiconductor 106b and at least a portion of the lower surface of the insulator 106c. This differs from the transistor 10 in that it is formed in contact with a part of the By this, at least one of the upper surfaces of the conductors 108a and 108b and the semiconductor 106b is Since the portion is in direct contact with the transistor 28, the on-current of the transistor 28 can be improved.

[0223] In addition, oxide semiconductors such as In-Ga-Zn oxide have lower thermal conductivity than silicon. Therefore, oxide semiconductors are used for the insulator 106a, the semiconductor 106b, and the insulator 106c. When this occurs, heat is generated particularly at the drain side end of the channel forming region of the semiconductor 106b. However, the transistor 28 shown in FIGS. Since the conductors 108a and 108b have an area overlapping with the conductor 114, the conductors 108a and 108b The semiconductor 106b is disposed in the vicinity of the channel forming region. The heat generated in the panel forming region is conducted to the conductors 108a and 108b. Heat can be dissipated near the channel forming region by using 108a and 108b. This is not limited to the transistor 28, and the same applies to other transistors shown in this embodiment. This can be said.

[0224] The transistor 30 shown in FIGS. 16(C) and 16(D) includes a conductor 114, an insulator 112, an insulator The ends of the transistor 106c and the insulator 106d are formed so as to be substantially aligned with each other. It is different from Transitor 28.

[0225] The transistor 32 shown in FIGS. 17A and 17B includes a conductor 114, an insulator 112, an insulator The transistor 28 differs from the transistor 28 in that the ends of the transistors 106d are formed so as to be approximately aligned. do.

[0226] The transistor 34 shown in FIGS. 17C and 17D is made up of an insulator 103, an insulator 101, and a conductive material. The insulator 124 is formed between the insulator 112 and the insulator 112a to The transistor 30 differs from the transistor 30 in that it is formed of a stacked structure of insulators 112c. The insulator 24 can be made of the same insulator as the insulator 104. The insulator 112c can be made of the same insulator as the insulator 112, and the insulator 112b can be made of the same insulator as the insulator 112. An insulator similar to the insulator 103 can be used.

[0227] Here, among the insulators 112a to 112c, the insulator 112b has an electron trapping region. The electron trapping region has a function of trapping electrons. When the insulator 112c has a function of suppressing the emission of electrons, the electrons trapped in the insulator 112b are The insulator 112b behaves like a fixed negative charge. Instead of the insulator 112b, a conductor or a semiconductor may be used. However, since the insulator 112b is an insulator, the trapped electrons This may be able to suppress the release of

[0228] In addition, in the insulators 124, 103, and 104, the insulator 103 captures electrons. It is preferable that the insulator 124 and the insulator 104 have a function of suppressing electron emission. When the insulator 103 has the function of trapping electrons, the electrons trapped in the insulator 103 behave like fixed negative charges. Therefore, the insulator 103 functions as a floating gate. In some cases, a conductor or a semiconductor may be used instead of the insulator 103. Being an insulating material may be able to suppress the release of trapped electrons.

[0229] <Transistor 1 manufacturing method> A method for manufacturing the transistor 10 will be described below with reference to FIGS. do.

[0230] First, a substrate 100 is prepared. The substrate used for the substrate 100 may be any of the above-mentioned substrates. That's fine.

[0231] Next, the insulator 101 is formed. As the insulator 101, any of the above insulators may be used.

[0232] The insulator 101 is formed by a sputtering method, a chemical vapor deposition (CVD) method, or the like. Vapor Deposition method, Molecular Beam Epitaxy (MBE) Laser Beam Epitaxy (PLD) or Pulsed Laser Deposition (PLD) Atomic Layer Deposition (ALD) This can be done using a method such as er deposition.

[0233] The CVD method is a plasma CVD (PECVD) method that uses plasma. Enhanced CVD (TCVD) method, and thermal CVD (TCVD) method. These methods can be further classified into the VD method, which uses light, and the Photo CVD method. Depending on the source gas, metal CVD (MCVD) and metal organic CVD are used. (MOCVD: Metal Organic CVD) method.

[0234] The PECVD method can produce high-quality films at relatively low temperatures. This is a film formation method that can reduce plasma damage to the object to be treated because it does not use a plasma. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device When a charge is received from the plasma, it may be charged up. The accumulated charge may destroy the wiring, electrodes, elements, etc. contained in the semiconductor device. On the other hand, in the case of the TCVD method, which does not use plasma, such plasma damage does not occur. Therefore, the yield of semiconductor devices can be increased. Since no plasma damage occurs, a film with few defects can be obtained.

[0235] The ALD method is also a film formation method that can reduce plasma damage to the workpiece. In addition, the ALD method does not cause plasma damage during film formation, so films with few defects can be produced. is obtained.

[0236] The CVD and ALD methods are film formation methods in which particles emitted from a target are deposited. It is a film forming method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film forming method that is less affected by the shape of the workpiece and has good step coverage. In addition, the ALD method has excellent step coverage and thickness uniformity, making it suitable for forming thin films with high aspect ratios. This is suitable for coating the surface of a highly porous opening. However, the ALD method has a relatively slow film formation rate, It may be preferable to use it in combination with other film formation methods such as CVD, which has a high film formation rate. be.

[0237] In the CVD and ALD methods, the composition of the resulting film is controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any value. In addition, for example, in the CVD method and the ALD method, it is possible to form a film having the following composition. By changing the flow rate ratio of the source gases while oxidizing, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gases, multiple film forming chambers can be used. Compared to forming a film using a vacuum chamber, the time required for film formation is shorter due to the time required for transport and pressure adjustment. Therefore, the productivity of the semiconductor device can be increased in some cases.

[0238] In conventional film-forming equipment using the CVD method, one of the source gases for the reaction is used for film formation. Multiple species are supplied to the chamber simultaneously. A raw material gas (also called a precursor) and a gas that acts as a reactant (also called a reactant) These gases are introduced alternately into the chamber, and film formation is performed by repeating the introduction of these gases. The switching of the introduced gas is performed using, for example, the respective switching valves (also called high-speed valves) can be switched between.

[0239] For example, the film is formed in the following procedure: First, the precursor is introduced into the chamber. The precursor is adsorbed onto the substrate surface (first step). By depositing the precursor on the substrate, a self-limiting mechanism of the surface chemical reaction takes effect, and the precursor is deposited on the substrate. Furthermore, the self-limiting mechanism of the surface chemical reaction is at work. The optimum substrate temperature range is also called the ALD window. It is determined by the temperature characteristics of the case, vapor pressure, decomposition temperature, etc. Next, inert gas (argon or nitrogen) into the chamber, and excess precursors and reaction products are removed by The chamber is evacuated (second step). Excess precursors and reaction products may be discharged from the chamber by A reactant (e.g., an oxidizing agent (H2O, O3, etc.)) is introduced into the chamber, and the reactant is oxidized on the substrate surface. The film is reacted with the adsorbed precursor, and one of the precursors is removed while the constituent molecules of the film are adsorbed on the substrate. Next, the excess gas is removed by introducing an inert gas or by evacuating. The reactants and reaction products are then discharged from the chamber (fourth step).

[0240] In this way, a first monolayer can be formed on the surface of the substrate, and the first to fourth steps are carried out. By repeating the process, a second monolayer can be laminated on top of the first monolayer. Steps 1 to 4 are repeated multiple times while controlling the gas introduction until the film reaches the desired thickness. This allows the formation of a thin film with excellent step coverage. The thickness of the thin film increases depending on the number of repetitions. Therefore, precise film thickness control is possible, and fine transistors can be fabricated. It is suitable for manufacturing.

[0241] The ALD method is a film formation method in which precursors are reacted using thermal energy. In the reaction of the reactant, the reactant is converted into a radical state using plasma. The ALD method in which the process is performed as a plasma is sometimes called the plasma ALD method. The ALD method in which the reaction between precursors and reactants is carried out using thermal energy is called thermal ALD. There is.

[0242] The ALD method can deposit extremely thin films with uniform thickness. It also has a high surface coverage rate.

[0243] In addition, by forming the film using the plasma ALD method, it is possible to form the film at a lower temperature than with the thermal ALD method. The plasma ALD method can be used at temperatures below 100 degrees without reducing the film formation rate. In addition, plasma ALD can be used with not only oxidizing agents but also nitrogen gas. Many reactants can be used, so not only oxides but also nitrides and fluorides can be used. It is possible to form many types of films, including metal films.

[0244] In addition, when using the plasma ALD method, ICP (Inductively Coupled Plasma) It is also possible to generate plasma away from the substrate, such as with LED Plasma. By generating plasma in this way, plasma damage can be suppressed. can.

[0245] Here, as an example of an apparatus capable of forming a film using the ALD method, a film forming apparatus 1000 The configuration will be explained using Fig. 21(A) and Fig. 21(B). Fig. 21(A) shows the FIG. 21(B) is a schematic diagram of a multi-chamber type film forming apparatus 1000. FIG. 1 is a cross-sectional view of an ALD apparatus that can be used in the present invention.

[0246] <<Configuration example of film formation device>> The film forming apparatus 1000 includes a carry-in chamber 1002, a carry-out chamber 1004, a transfer chamber 1006, and a film forming chamber 1008. 1008, a film forming chamber 1009, a film forming chamber 1010, and a transfer arm 1014. Here, the loading chamber 1002, the unloading chamber 1004, and the film forming chambers 1008 to 1010 are a transfer chamber 10 06. This allows the film formation chambers 1008 to 1010 to be exposed to the atmosphere. This allows continuous film formation without the need for a separate process, and prevents impurities from being mixed into the film.

[0247] The loading chamber 1002, the unloading chamber 1004, the transfer chamber 1006, the film forming chambers 1008 to 1010, 0 is filled with an inert gas (nitrogen gas, etc.) with a controlled dew point to prevent moisture from adhering. It is preferable to keep the pressure reduced.

[0248] In addition, ALD equipment can be used in the film formation chambers 1008 to 1010. A film forming apparatus other than an ALD apparatus may be used in any of the film chambers 1008 to 1010. The film forming apparatus used in the film forming chambers 1008 to 1010 may be, for example, a sputtering There are various types of equipment, including PECVD equipment, TCVD equipment, and MOCVD equipment.

[0249] For example, the film formation chambers 1008 to 1010 may be configured to include an ALD apparatus and a PECVD apparatus. By doing so, the insulator made of silicon oxide of the transistor 34 shown in FIG. 124 is formed by PECVD, and the insulator 103 made of hafnium oxide is formed by ALD. The insulator 104 made of silicon oxide can be formed by the PECVD method. The film is formed continuously without exposing it to the atmosphere, so there is no contamination of impurities in the film. Film formation can be carried out.

[0250] The film forming apparatus 1000 includes a carry-in chamber 1002, a carry-out chamber 1004, and film forming chambers 1008 to 1009. However, the present invention is not limited to this. The number of film formation chambers may be four or more. The film forming apparatus 1000 may be of a single wafer type. A batch system in which films are formed on a plurality of substrates at once may also be used.

[0251] 《ALD equipment》 Next, the configuration of an ALD apparatus that can be used in the film formation apparatus 1000 will be described. The D device includes a film-forming chamber (chamber 1020), raw material supply units 1021a and 1021b, and a flow The high-speed valves 1022a and 1022b are volume controllers, and the raw material inlets 1023a and 1023b are b, a raw material outlet 1024, and an exhaust device 1025. The raw material inlets 1023a and 1023b are connected to the raw material supply unit 1021 via supply pipes and valves. The raw material outlet 1024 is connected to the discharge pipe, valve, and pressure It is connected to the exhaust device 1025 via a power regulator.

[0252] Also, as shown in FIG. 21(B), a plasma generator 1028 is connected to the chamber 1020. By connecting the two, film formation can be performed by the plasma ALD method in addition to the thermal ALD method. With the plasma ALD method, film formation can be performed at low temperatures without reducing the film formation rate, so there is no need to worry about low film formation efficiency. It is preferable to use it in a single-wafer deposition apparatus.

[0253] Inside the chamber, there is a substrate holder 1026 equipped with a heater. 6, a substrate 1030 on which a film is to be formed is placed.

[0254] In the raw material supply units 1021a and 1021b, solid raw materials and The raw material supply units 1021a and 1021b generate raw material gas from a liquid raw material. The gas may be supplied from the source material.

[0255] Although an example in which two raw material supply units 1021a and 1021b are provided is shown, there is no particular limitation. In addition, three or more high-speed valves 1022a and 1022b can be provided. The gas supply system is configured to supply either the raw material gas or the inert gas. The high-speed valves 1022a and 1022b are flow rate controllers for the source gases and also for the inert gas. It can also be called a flow rate controller.

[0256] In the film forming apparatus shown in FIG. 21(B), the substrate 1030 is carried onto the substrate holder 1026. After the chamber 1020 is sealed, the substrate 10 is heated by the heater of the substrate holder 1026. 30 is heated to a desired temperature (for example, 80°C or higher, 100°C or higher, or 150°C or higher), and the raw material Gas supply, exhaust by exhaust device 1025, inert gas supply, exhaust device 1025 By repeating this process and exhausting the gas, a thin film is formed on the surface of the substrate.

[0257] In the film forming apparatus shown in FIG. 21(B), the raw materials ( By appropriately selecting the appropriate volatile organic metal compounds, hafnium, aluminum, tantalum, Oxides (including composite oxides) containing one or more elements selected from tantalum, zirconium, etc. Specifically, an insulating layer containing hafnium oxide can be formed. an insulating layer containing aluminum oxide; an insulating layer containing hafnium silicate; an insulating layer comprising aluminum silicate; In addition, the raw material used in the raw material supply units 1021a and 1021b can be By appropriately selecting the appropriate organic compound (e.g., volatile organometallic compound), it is possible to form a tungsten layer, a titanium layer, etc. Any thin film such as a metal layer or a nitride layer, such as a titanium nitride layer, can be deposited.

[0258] For example, when forming a hafnium oxide layer using an ALD system, the solvent and the hafnium precursor are Liquids containing precursor compounds (hafnium alkoxides, tetrakisdimethylamidohafnium The raw material gas is vaporized hafnium amide (TDMAH) and ozone is used as an oxidizer. In this case, two kinds of gases are used: the first gas supplied from the raw material supply unit 1021a, and the second gas (O3). The first raw material gas is TDMAH, and the second raw material gas supplied from the raw material supply unit 1021b is O. The chemical formula of tetrakisdimethylamidohafnium is Hf[N(CH3) 2]4. Other material liquids include tetrakis(ethylmethylamide)hafnium. There are many examples.

[0259] When forming an aluminum oxide layer using an ALD system, a solvent and an aluminum precursor are used. The raw material gas is made by vaporizing a liquid containing a compound (TMA: trimethylaluminum, etc.) and an acid. In this case, two kinds of gases are used, one of which is a nitriding agent and the other is H2O. The first source gas supplied from the source supply unit 1021b is TMA, and the second source gas supplied from the source supply unit 1021b is The chemical formula for trimethylaluminum is Al(CH3)3. Other liquid materials include tris(dimethylamido)aluminum and triisobutylaluminum. Aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionato) (e.g., 'port').

[0260] When forming a tungsten layer using an ALD system, WF6 gas and B2H6 gas are used. The initial tungsten layer is formed by repeatedly introducing WF6 gas and H2 gas. The tungsten layer is formed by repeatedly introducing SiH instead of B2H6 gas. These gases may be controlled by a mass flow controller. This may also be configured as follows.

[0261] Next, a conductor that will become the conductor 102 is formed. The conductive material can be formed by a sputtering method, a CVD method, an MB method, etc. This can be carried out using the E method, PLD method, ALD method, or the like.

[0262] Next, a resist or the like is formed on the conductor, and the conductor 102 is processed using the resist. (See Figure 18(A)(B)). When simply saying that a resist is formed, it is This also includes the case where an anti-reflection layer is formed under the resist.

[0263] The resist is removed after the object is processed by etching or other methods. For this purpose, plasma treatment and / or wet etching are used. Plasma ashing is suitable for this purpose. If the removal of resist, etc. is insufficient, Hydrofluoric acid and / or ozone at a concentration of 1% by volume or more but not exceeding 1% by volume Residual resist may be removed using rinsing water or the like.

[0264] Next, the insulator 103 is formed. As the insulator 103, any of the above insulators may be used. The insulator 103 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. This can be done using methods such as the

[0265] Next, the insulator 104 is formed (see FIGS. 18(C) and (D)). The insulator 104 can be formed by a sputtering method, a CVD method, an MB method, or the like. This can be carried out using the E method, PLD method, ALD method, or the like.

[0266] In addition, it is preferable that the upper or lower surface of the semiconductor 106b to be formed later has high flatness. Therefore, as shown in FIG. 18(C)(D), the upper surface of the insulator 104 is subjected to a flattening treatment such as CMP. A chemical treatment may be carried out to improve the flatness.

[0267] Next, an insulator that will become the insulator 106a is formed. Any insulator or semiconductor that can be used as the insulator 106a described above may be used. The insulator film to be the insulator 106a can be formed by a sputtering method, a CVD method, an MBE method, or the like. This can be carried out using a PLD method, an ALD method, or the like.

[0268] Next, a semiconductor film that will become the semiconductor 106b is formed. The semiconductor 106b may be formed by sputtering. The deposition can be carried out by using a CVD method, an MBE method, a PLD method, an ALD method, or the like. The insulator film that becomes the insulator 106a and the semiconductor film that becomes the semiconductor 106b are formed in the atmosphere. By performing this process continuously without exposure, it is possible to reduce the incorporation of impurities into the film and the interface. can.

[0269] Next, an insulator that will become the insulator 106c is formed. Any insulator or semiconductor that can be used as the insulator 106c described above may be used. The semiconductor film that becomes the insulator 106c can be formed by a sputtering method, a CVD method, an MBE method, or the like. This can be done by using a PLD method, an ALD method, etc. The deposition of the insulating film and the deposition of the insulating film that will become the insulator 106c are performed successively without exposure to the atmosphere. This can reduce the amount of impurities entering the film and at the interface.

[0270] Next, heat treatment is preferably performed. By performing the heat treatment, the insulator 106a is formed. The hydrogen concentration in the insulator, the semiconductor that becomes the semiconductor 106b, and the insulator that becomes the insulator 106c is reduced. In addition, the insulator 106a and the semiconductor 106b may be In some cases, oxygen vacancies in the semiconductor and the insulator that become the insulator 106c can be reduced. The heat treatment is carried out at a temperature of 250°C or higher and 650°C or lower, preferably 450°C or higher and 600°C or lower, more preferably 450°C or higher and 600°C or lower. More preferably, the heat treatment is carried out at a temperature of 520° C. to 570° C. The heat treatment is carried out in an inert gas atmosphere. or in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas. The heat treatment may be performed under reduced pressure. Alternatively, the heat treatment may be performed in an inert gas atmosphere. After that, to compensate for the oxygen that has been removed, oxidizing gas is added at 10 ppm or more, 1% or more, or 10 % or more. The crystallinity of the insulator, the semiconductor that becomes the semiconductor 106b, and the insulator that becomes the insulator 106c is increased. The heat treatment can remove impurities such as hydrogen and water. An RTA device can also be used.

[0271] Next, a resist or the like is formed on the insulator that will become the insulator 106c, and the resist is used to apply heat. The insulator 106a, the semiconductor 106b, and the insulator 106c are formed (FIG. 18(E)(F)). )reference.).

[0272] Next, a conductor that will become the conductor 108a and the conductor 108b is formed. The conductor that will become the conductor 108b may be any of the above-described conductors. is performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. It is possible.

[0273] Next, a conductor that will become the conductor 110a and the conductor 110b is formed. The conductor that will become the conductor 110b may be any of the above-mentioned conductors. is performed using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, etc. It is possible.

[0274] Next, a resist or the like is formed on these conductors, and the conductors are processed using the resist. 108a, conductor 108b, conductor 110a, and conductor 110b are formed (FIG. 18(G) )(H). ).

[0275] In addition, the conductor 108a and the conductor 108b of the semiconductor 106b or the insulator 106c are In the region in contact with b, a low resistance region 109a and a low resistance region 109b are formed. Although not shown, the insulator 106a and the conductor 108a or the conductor 108 A low resistance region may also be formed in the region where b contacts.

[0276] As shown in FIG. 1D, the insulator 106c is a conductor 108a and a conductor A region having a thickness thinner than the region overlapping with the conductor 108a and the conductor 108b is provided between the conductor 108a and the conductor 108b. This is because when the conductors 108a and 108b are formed, an insulator It is formed by removing a portion of the top surface of 106c.

[0277] Next, the insulator 106d is formed. The insulator 106d may be formed using any of the above-mentioned semiconductors. The insulator 106d can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or the like. This can be done by using an ALD method or the like. Alternatively, the surfaces of the conductors 110a and 110b may be etched. The etching can be performed using a plasma containing a gas. By forming the insulator 106d in succession without forming a film, the insulator 106c, the conductor 110a, and The inclusion of impurities in the interface between the conductor 110b and the insulator 106d can be reduced. Impurities present at the interface between films may be more likely to diffuse than impurities within the film. Therefore, by reducing the amount of impurities mixed in, the transistor can have stable electrical characteristics. can be granted.

[0278] Next, the insulator 112 is formed (see FIGS. 19(A) and (B)). The insulator 112 can be formed using any of the above insulators. This can be done by using a BE method, a PLD method, an ALD method, or the like. The formation of the insulating film 112 and the formation of the insulating film 113 are carried out successively without exposure to the atmosphere. This can reduce the amount of impurities entering the interface.

[0279] Next, a conductor that will become the conductor 114 is formed. The conductive material can be formed by a sputtering method, a CVD method, an MB method, etc. This can be carried out using the E method, PLD method, ALD method, or the like.

[0280] Next, a resist or the like is formed on the conductor, and the conductor 114 is processed using the resist. (See Figure 19(C)(D)).

[0281] Next, the insulator 116 is formed. As the insulator 116, any of the above insulators may be used. The insulator 116 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. This can be done using methods such as the

[0282] Next, the insulator 118 is formed (see FIGS. 19(E) and (F)). The insulator 118 can be formed using any of the above insulators. This can be carried out using a BE method, a PLD method, an ALD method, or the like.

[0283] Here, the insulator 118 is a material such as aluminum oxide that blocks oxygen, hydrogen, water, etc. It is preferable to provide an oxide insulating film having a blocking effect. By using the LD method, the formation of voids in convex parts is reduced, and insulation with good coating properties is achieved. The insulator 118 can be deposited.

[0284] Alternatively, the insulator 118 may be formed to have a layered structure. After forming an aluminum nitride film using the ALD method, RF sputtering, which has a higher film formation rate, is used. An aluminum oxide film may be further formed by a method such as a ring method. As a result, a film with good coverage is formed near the interface with the insulator 116 by the ALD method, and The film thereon can be formed with good throughput. When 8 is a laminated structure, after forming the first film, oxygen ions are added as described below, Then, a second film may be formed.

[0285] Alternatively, the insulator 118 can be formed by sputtering. The sputtering method uses RF (Radio Frequency) power supply, which is a high frequency power source. The reactive sputtering method or reactive sputtering in a reactive gas atmosphere is used. This can be done.

[0286] Here, RF sputtering or reactive sputtering is performed in an atmosphere containing oxygen. By doing so, excess oxygen can penetrate the insulator 118 and be contained in the insulator 116 and the like. Here, the oxygen gas flow rate and film formation power for sputtering are determined by the amount of oxygen ions added. The amount of the insulating material may be determined appropriately depending on the amount of the insulating material. When excess oxygen is contained in the body 118, the oxygen ions shown in Figures 20(A) and 20(B) are No addition is necessary.

[0287] Next, oxygen ions 126 are added to penetrate the insulator 118 and penetrate the insulator 11. 6. Excess oxygen may be included in the insulator 112 and / or the insulator 104 (FIG. 20(A)). ) (B).) Oxygen ions can be added by ion implantation, ion doping, plasma ion implantation, etc. For example, ion implantation, etc. can be used. The implantation method uses an acceleration voltage of 2 kV to 10 kV, and a dose of 5 × 10 14 ion s / cm 2 5x10 or more 16 ions / cm 2 This can be done as follows.

[0288] 20(A) and 20(B), oxygen ions 126 are added in the normal direction to the substrate plane. Although the case where the number of the digits is added is shown, the present invention is not limited to this. As shown, oxygen ions 126 may be added at an angle relative to the normal to the substrate plane. The tilt angle and twist angle may be appropriately determined depending on the amount of oxygen ions added, etc.

[0289] In addition, oxygen ions are added by sputtering or ion implantation as described above. When the conductor 114 is heated, oxygen may be added to the vicinity of the surface of the conductor 114. A region with a higher oxygen concentration than the insulator 112 side of the conductor 114 is formed near the surface of the conductor 114. There is a saying.

[0290] Next, it is preferable to perform a heat treatment. By performing the heat treatment, the insulator 116 and the insulating film 118 are The excess oxygen supplied to the insulator 112 and / or the insulator 104 is diffused to the insulator 106a. , can be supplied to the semiconductor 106b, the insulator 106c, and the insulator 106d. The heating may be carried out at a temperature of 250°C or higher and 650°C or lower, preferably 350°C or higher and 450°C or lower. Heat treatment is carried out in an inert gas atmosphere or in an atmosphere containing oxidizing gases at 10 ppm or more, 1% or more, or 1 The heat treatment is carried out in an atmosphere containing 0% or more of fluorine. The heat treatment may be carried out under reduced pressure. A thermal RTA device can also be used.

[0291] The heat treatment after the addition of oxygen ions may be carried out at any time after the addition of oxygen ions. For example, this may be done after the formation of the conductors 120a and 120b.

[0292] Next, a resist or the like is formed on the insulator 118, and the insulators 118, 116, and An opening is then formed in the conductor 120a and the insulator 106d. The conductors to be the conductors 120a and 120b are formed as follows: The conductive material can be formed by a sputtering method, a CVD method, or the like. This can be done using the MBE method, PLD method, ALD method, or the like.

[0293] Next, a resist or the like is formed on the conductor, and the resist is used to process the conductor 120a. And the conductor 120b is formed (see FIGS. 20(C) and (D)).

[0294] Through the above steps, a transistor according to one embodiment of the present invention can be manufactured.

[0295] <Transistor 2> The following describes the structure of a transistor as an example of a semiconductor device according to one embodiment of the present invention. explain.

[0296] The structure of the transistor 50 will be described with reference to FIGS. 23(A) is a top view of the transistor 50. FIG. 23(B) is a diagram showing the structure of the transistor 50 shown in FIG. 23(A) along the dashed line. 23(C) is a cross-sectional view corresponding to the dashed line B3-B4 in FIG. 23(A). In the region indicated by the dashed dotted line B1-B2, the transistor 50 The structure in the channel length direction is shown. In the region indicated by the dashed line B3-B4, 23A shows the structure of the transistor 50 in the channel width direction. , insulator 156a and semiconductor 156b, insulator 156c are conductor 152, conductor 158 a, 158b, and the conductor 164, but in the top view To avoid making it difficult to see, the insulator 156a, the semiconductor 156b, and the insulator 156c are slightly shifted and thinned. It is represented by a dashed line.

[0297] As shown in FIGS. 23A to 23C, the transistor 50 is formed on a substrate 150. The formed insulator 151, conductor 152, insulator 153 and insulator 154, and insulator 15 4, an insulator 156a, a semiconductor 156b, and an insulator 156c are formed on the semiconductor 1 Conductors 158a and 158b are formed on the insulating material 156b, and conductive material 158a and conductive material 158b are formed on the insulating material 156c. an insulator 162 formed on the insulating layer 162; a conductor 164 formed on the insulator 162; and an insulator 166, an insulator 168, a conductor 170a, and a conductor 170b formed thereon; It has.

[0298] Here, the insulator 151, the insulator 153, the insulator 154, the insulator 156a, the insulator 156 c. The insulators 162, 166, and 168 may also be called insulating films or insulating layers. In addition, the conductor 152, the conductor 158a, the conductor 158b, the conductor 164, the conductor 1 The semiconductor 15a and the conductor 170b can also be called a conductive film or a conductive layer. 6b can also be called a semiconductor film or semiconductor layer.

[0299] As will be described in detail later, when the insulator 156a and the insulator 156c are used alone, In some cases, materials may be used that can function as conductors, semiconductors, or insulators. However, when a transistor is formed by stacking the semiconductor 156b, electrons 156b, the vicinity of the interface between the semiconductor 156b and the insulator 156a, and the interface between the semiconductor 156b and the insulator The insulators 156a and 156c flow near the interface of the transistor. Therefore, in this specification and the like, the insulator 1 56a and insulator 156c will not be described as semiconductors but as insulators.

[0300] A conductor 152 is formed on an insulator 151 formed on a substrate 150. The conductive material 152 is overlapped with an insulator 156a, a semiconductor 156b, and an insulator 156c. An insulator 153 is formed on the conductor 152 so as to cover the conductor 152. An insulator 154 is formed on 53 .

[0301] An insulator 156a is formed on the insulator 154, and at least one of the upper surfaces of the insulator 156a In FIG. 23(B), the insulator 156a and the semiconductor 156b are formed in contact with each other. The insulator 156a and the semiconductor 156b are formed so that the ends of the insulator 156a and the semiconductor 156b are approximately aligned. However, the structure of the semiconductor device described in this embodiment mode is not limited to this.

[0302] The conductors 158a and 158b are in contact with at least a portion of the upper surface of the semiconductor 156b. The conductor 158a and the conductor 158b are formed apart from each other, as shown in FIG. As shown in A), it is preferable that they are formed facing each other with the conductor 164 interposed therebetween.

[0303] An insulator 156c is formed in contact with at least a portion of the top surface of the semiconductor 156b. The region 156c is sandwiched between the conductor 158a and the conductor 158b and the semiconductor 156b. It is preferable to contact

[0304] An insulator 162 is formed on the insulator 156c. A conductor 158 is formed on the insulator 162. The conductor 164 is formed so as to overlap between a and the conductor 158b. The ends of the insulators 162 and 156c are aligned so that they are substantially aligned with each other. However, the structure of the semiconductor device shown in this embodiment is not limited to this. There is no.

[0305] An insulator 166 is formed on the conductor 164 and the insulator 162, and an insulating layer is formed on the insulator 166. An insulator 168 is formed. A conductor 170a and a conductor 170b are formed on the insulator 168. The conductor 170a and the conductor 170b are connected to the insulator 156c, the insulator 162, and the insulator 164. The conductor 158a and the conductor 158b are electrically connected to each other through openings formed in the edge 166 and the insulator 168. 8b and is electrically connected to the

[0306] Here, the insulator 166 is formed so that at least a portion thereof is in contact with the upper surface of the insulator 154. As shown in FIG. 23(B), the insulator 166 is made up of an insulator 156a, a semiconductor 156b, and an insulator 166c. 56c, the conductor 158a, the conductor 158b, and the insulator 162 are formed to cover them. The insulators 166 are preferably arranged in the areas where they are not overlapped with the insulators 154, e.g., In the region outside the insulator 156a, the semiconductor 156b, and the insulator 156c shown in FIG. 23(A), It is preferable that the insulating material 154 contacts the insulating material 154 through the insulating material 154 .

[0307] <Semiconductor 2> The detailed configuration of the semiconductor 156b will be described below. In addition to 156b, the configurations of the insulators 156a and 156c will also be described. The insulator 156a, the semiconductor 156b, and the insulator 156c may be the insulator 106a described above. , semiconductor 106b, and insulator 106c can be used correspondingly.

[0308] The semiconductor 156b is, for example, an oxide semiconductor containing indium. For example, when indium is contained, the carrier mobility (electron mobility) increases. The body 156b preferably contains the element M. The element M is preferably Ti, Ga, Y, or Zr. , La, Ce, Nd, Sn or Hf, where the element M is the aforementioned element The element M may have a bond energy with oxygen of, for example, For example, the bond energy with oxygen is higher than that of indium. Alternatively, the element M may have a function of increasing the energy gap of the oxide semiconductor, for example. The semiconductor 156b preferably contains zinc. If lead is included, crystallization may occur more easily.

[0309] However, the semiconductor 156b is not limited to an oxide semiconductor containing indium. 56b is an indium-free material, such as zinc tin oxide or gallium tin oxide; Oxide semiconductors containing zinc, oxide semiconductors containing gallium, oxide semiconductors containing tin, etc. It's okay if there is.

[0310] For example, the insulators 156a and 156c are made of oxygen other than the oxygen that constitutes the semiconductor 156b. The semiconductor 156b is an oxide semiconductor composed of one or more of the elements. The insulator 156a and the insulator 15 are made of one or more elements other than oxygen. 6c is formed, the interface between the insulator 156a and the semiconductor 156b and the semiconductor 156 At the interface between the layer 156b and the insulator 156c, defect levels are unlikely to be formed.

[0311] The insulator 156a, the semiconductor 156b, and the insulator 156c contain at least indium. When the insulator 156a is an In-M-Zn oxide, the sum of In and M is When the atomic percentage of In is 100, it is preferable that In is less than 50 atomic percent and M is 5. 0 atomic % or more, more preferably In is less than 25 atomic % and M is 75 In addition, when the semiconductor 156b is an In-M-Zn oxide, When the sum of In and M is 100 atomic %, In is preferably 25 atomic %. c%, M is less than 75 atomic %, and more preferably In is 34 atomic % %, and M is less than 66 atomic %. In the case of n-oxide, when the sum of In and M is 100 atomic %, preferably In is less than 50 atomic %, M is higher than 50 atomic %, and more preferably In is 25 atomic % or less, and M is higher than 75 atomic %. However, the same oxide as that of the insulator 156a may be used. And the insulator 156c may not contain indium. The body 156a and / or the insulator 156c are gallium oxide or Ga-Zn oxide. It is to be noted that the insulator 156a, the semiconductor 156b, and the insulator 156c may contain The number of atoms of each element does not have to be in a simple integer ratio.

[0312] For example, when a film is formed by sputtering, the target used for the insulator 156a is Typical examples of atomic ratios of metal elements are In:M:Zn=1:2:4, In:M:Zn =1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, In:M: Zn=1:3:8, In:M:Zn=1:4:3, In:M:Zn=1:4:4, In: M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn=1:6:3, I n:M:Zn=1:6:4, In:M:Zn=1:6:5, In:M:Zn=1:6:6 , In:M:Zn=1:6:7, In:M:Zn=1:6:8, In:M:Zn=1:6 :9, In:M:Zn=1:10:1, etc. The atomic ratio of the metal elements in the Zn alloy may be M:Zn=10:1.

[0313] In addition, for example, when forming a film using a sputtering method, the substrate used for the semiconductor 156b Typical examples of atomic ratios of metal elements in the get are In:M:Zn=1:1:1, In:M :Zn=1:1:1.2, In:M:Zn=2:1:1.5, In:M:Zn=2:1: 2.3, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn= 4:2:4.1, In:M:Zn=5:1:7, etc. In particular, sputtering targets When the atomic ratio of In:Ga:Zn=4:2:4.1 is used as the substrate, the semiconductor The atomic ratio of the bodies 156b may be approximately In:Ga:Zn=4:2:3.

[0314] In addition, for example, when a film is formed by a sputtering method, the substrate used for the insulator 156c Typical examples of atomic ratios of metal elements in the get are In:M:Zn=1:2:4, In:M :Zn=1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, In :M:Zn=1:3:8, In:M:Zn=1:4:3, In:M:Zn=1:4:4, In:M:Zn=1:4:5, In:M:Zn=1:4:6, In:M:Zn=1:6: 3, In:M:Zn=1:6:4, In:M:Zn=1:6:5, In:M:Zn=1: 6:6, In:M:Zn=1:6:7, In:M:Zn=1:6:8, In:M:Zn= In:M:Zn=1:6:9, In:M:Zn=1:10:1, etc. The atomic ratio of the metal elements in the target may be M:Zn=10:1.

[0315] Indium gallium oxide has a small electron affinity and a high oxygen blocking property. Therefore, it is preferable that the insulator 156c contains indium gallium oxide. The atomic ratio [Ga / (In+Ga)] is, for example, 70% or more, preferably 80% or more, and More preferably, it is 90% or more.

[0316] The semiconductor 156b is made of, for example, an oxide with a large energy gap. The energy gap of 6b is, for example, 2.5 eV or more and 4.2 eV or less, preferably 2. The value is preferably 8 eV or more and 3.8 eV or less, and more preferably 3 eV or more and 3.5 eV or less. The energy gap of the insulator 156a is larger than the energy gap of the semiconductor 156b. The energy gap of the insulator 156c is larger than that of the semiconductor 156b. Bigger than a cup.

[0317] The semiconductor 156b is an oxide having a larger electron affinity than the insulators 156a and 156c. For example, the semiconductor 156b is made of a material having a higher conductivity than the insulators 156a and 156c. The electron affinity is 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less. 5 or less, more preferably, an oxide having a larger energy level than the above by 0.15 eV or more and 0.4 eV or less. , electron affinity is the energy difference between the vacuum level and the bottom of the conduction band. The energy level of the conduction band minimum of the semiconductor 156a is The energy level of the conduction band minimum of the insulator 156c is closer to the vacuum level than that of the semiconductor. The energy level is closer to the vacuum level than the energy level of the bottom of the conduction band of the body 156b.

[0318] At this time, when a gate voltage is applied, the insulator 156a, the semiconductor 156b, and the insulator 156 Of the semiconductors 6c, a channel is formed in the semiconductor 156b having a large electron affinity.

[0319] As described above, when the insulators 156a and 156c are used alone, they are not conductive or semi-conductive. However, semiconductors are made up of materials that can function as either semiconductors or insulators. When a transistor is formed by stacking the semiconductor 156b and the semiconductor 156b, electrons The flow occurs near the interface between the semiconductor 156b and the insulator 156a, and near the interface between the semiconductor 156b and the insulator 156c. The insulators 156a and 156c do not function as the channel of the transistor. Therefore, in this specification and the like, the insulator 156a and the insulator 156c The insulator 156a and the insulator 156b are not referred to as semiconductors but as insulators. The reason why 56c is described as an insulator is that it has a transistor function compared to the semiconductor 156b. Since the insulators 156a and 156c have a function similar to that of the upper insulator, In some cases, materials that can be used for the conductor 156b may be used.

[0320] Here, the insulator 156a and the semiconductor 156b are separated from each other by a thin film. In addition, there may be a mixed region between the semiconductor 156b and the insulator 156c. , a mixed region of semiconductor 156b and insulator 156c may be present. Therefore, the level density is reduced. In this laminate, the energy changes continuously near each interface (continuous junction). The insulator 156a, the semiconductor 156b, and the insulator 156c are each The interface may not be clearly discernible.

[0321] At this time, the electrons are not in the insulator 156a and the insulator 156c but in the semiconductor 156b. As described above, the electrons move mainly through the interface between the insulator 156a and the semiconductor 156b. The defect density in the semiconductor 156b and the defect density at the interface between the semiconductor 156b and the insulator 156c. By lowering the concentration, the movement of electrons in the semiconductor 156b is less hindered, The on-state current of the transistor can be increased.

[0322] In addition, the on-current of the transistor can be increased by reducing the factors that hinder the movement of electrons. For example, if there are no factors that hinder the movement of electrons, electrons can move efficiently. It is estimated that the electron movement is slower when, for example, the physical unevenness of the channel formation region is large. is also inhibited.

[0323] In addition, in order to increase the on-state current of the transistor, the thickness of the insulator 156c is preferably as small as possible. The thickness of the insulator 156c is preferably smaller than the thickness of the insulator 156a. For example, the thickness is less than 10 nm, preferably 5 nm or less, More preferably, the insulator 156c has a region of 3 nm or less. 56c is a semiconductor 156b in which a channel is formed, and is formed by introducing oxygen other than the oxygen constituting the adjacent insulator. It has the function of blocking elements (hydrogen, silicon, etc.) from entering. It is preferable that the insulator 156c has a certain thickness, for example, 0.3 nm or more. , preferably 1 nm or more, more preferably 2 nm or more insulator 15 In addition to oxygen released from the insulator 154, the insulator 156c In order to suppress lateral diffusion, it is preferable that the material has oxygen blocking properties.

[0324] In order to increase reliability, the insulator 156a is thick and the insulator 156c is thin. For example, it is preferably 10 nm or more, more preferably 20 nm or more, and even more preferably 40 nm or more. The insulator 156a may have a thickness of 60 nm or more, more preferably 60 nm or more. By increasing the thickness of the insulator 156a, the interface between the insulator 156a and the adjacent insulator can be improved. The distance from the semiconductor 156b where the channel is formed can be increased. Therefore, for example, the thickness is set to 200 nm or less, preferably 120 If the insulator 156a has a region with a thickness of 80 nm or less, more preferably 80 nm or less, good.

[0325] For example, a secondary ion mass spectrometry ( SIMS (Secondary Ion Mass Spectrometry) 1×10 16 atoms / cm 3 More than 1×10 19 atoms / cm 3 The following is preferred: 1×10 16 atoms / cm 3 5x10 or more 18 atoms / cm 3 Further details are as follows: Preferably 1 x 10 16 atoms / cm 3 Over 2×10 18 atoms / cm 3 below The semiconductor 156b and the insulator 156c have a region where the concentration of silicon is high. In IMS, 1 x 10 16 atoms / cm 3 More than 1×10 19 atoms / cm 3 Less than 1 × 10 16 atoms / cm 3 5x10 or more 18 atoms / cm 3 or less, more preferably 1 × 10 16 atoms / cm 3 Over 2×10 18 atoms / cm 3 The silicon concentration in the region is as follows:

[0326] In order to reduce the hydrogen concentration in the semiconductor 156b, the insulator 156a and the insulator 156b are It is preferable to reduce the hydrogen concentration in the insulator 156a and the insulator 156c. In S, 1×10 16 atoms / cm 3 Over 2×10 20 atoms / cm 3 below , preferably 1 x 10 16 atoms / cm 3 5x10 or more 19 atoms / cm 3 below , more preferably 1 × 10 16 atoms / cm 3 More than 1×10 19 atoms / cm 3 or less, more preferably 1 × 10 16 atoms / cm 3 5x10 or more 18 atoms / cm 3 The semiconductor 156b has a region where the hydrogen concentration is as follows: Therefore, it is preferable to reduce the nitrogen concentration in the insulators 156a and 156c. The 156a and the insulator 156c have a SIMS resolution of 1×10 15 atoms / cm 3 5x10 or more 19 atoms / cm 3 Less than 1 × 10 15 atoms / cm 3 5x10 or more 18 atoms / cm 3 Less than 1×10, more preferably 15 atoms / c m 3 More than 1×10 18 atoms / cm 3 or less, more preferably 1 × 10 15 atom s / cm 3 5x10 or more 17 atoms / cm 3 The nitrogen concentration ranges as follows:

[0327] As shown in FIG. 23B, a conductor 158a or a conductor 158b such as a semiconductor 156b The low resistance region 159a and the low resistance region 15 are in contact with each other (shown by dotted lines in FIG. 23(B)). The low resistance region 159a and the low resistance region 159b are mainly formed by the semiconductor The conductor 156b is in contact with the conductor 158a or the conductor 158b, and oxygen is drawn out or introduced. The conductive material contained in the conductor 158a or the conductor 158b bonds with the elements in the semiconductor 156b. Such low resistance regions 159a and 159b are formed. By this, the contact resistance between the conductor 158a or the conductor 158b and the semiconductor 156b can be reduced. Since it is possible to reduce the ON current of the transistor 50, the ON current of the transistor 50 can be increased.

[0328] In addition, in the region where the insulator 156a and the conductor 158a or the conductor 158b contact each other, In the following drawings, similar dotted lines indicate low resistance regions. This refers to the area.

[0329] As in the case of FIG. 1D, the semiconductor 156b is formed by the conductor 158a and the conductor A region having a thickness thinner than the region overlapping with the conductor 158a and the conductor 158b is provided between the conductors 158a and 158b. It may have.

[0330] The above-mentioned three-layer structure is an example. Alternatively, a two-layer structure may be used, such as above or below the insulator 156a, or Above or below 156c, an insulator 156a, a semiconductor 156b and an insulator 156c are provided. Alternatively, the semiconductor layer 15 may have a four-layer structure including any one of the semiconductors exemplified above. 6a, below the insulator 156a, above the insulator 156c, or below the insulator 156c. The semiconductors exemplified above as the insulator 156a, the semiconductor 156b, and the insulator 156c are Alternatively, it may have an n-layer structure (n is an integer of 5 or more) having any one of the layers.

[0331] In addition, the insulator 156a, the semiconductor 106b, and the insulator 106c are It is preferable that the conductor 156b and the insulator 156c also use CAAC-OS. AAC-OS is an oxide semiconductor with few impurities and oxygen vacancies and low carrier density. Specifically, the carrier density is set to 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 The CAAC-OS has a low impurity concentration and a low density of defect states. That is, it can be said that the oxide semiconductor has stable characteristics.

[0332] Therefore, transistors using CAAC-OS have small fluctuations in their electrical characteristics and high reliability. This results in a high-performance transistor.

[0333] In addition, CAAC-OS has a low defect level density, so it is possible to generate Therefore, the carriers are less likely to be captured by the defect level. The electrical characteristics of a transistor are less susceptible to change when irradiated with visible light or ultraviolet light.

[0334] <Substrate, insulator, conductor 2> Each non-semiconductor component of transistor 50 will be described in detail below.

[0335] The substrate 150 may be the same as the substrate 100 described above.

[0336] The insulator 151 is made of an insulator that has a function of blocking hydrogen or water. 6a, the semiconductor 156b, and the hydrogen and water in the insulator provided near the insulator 156c are converted into oxides. Carriers are generated in the semiconductor insulator 156a, semiconductor 156b, and insulator 156c. This may result in a decrease in the reliability of the transistor 50. When a substrate provided with a silicon-based semiconductor element such as a switch element is used as the substrate 150, Hydrogen is used to terminate the dangling bonds of the semiconductor element, and the hydrogen There is a risk that hydrogen or water may diffuse into the transistor 50. By providing the insulator 151 having the above structure, hydrogen or water can be prevented from diffusing from the lower layer of the transistor 50. This can suppress the occurrence of breakdown, thereby improving the reliability of the transistor 50.

[0337] In addition, the insulator 151 preferably has a function of blocking oxygen. By blocking oxygen diffusing from the insulator 154, Oxygen can be effectively supplied to the insulating layer 56a, the semiconductor 156b, and the insulator 156c. The body 151 can be made of an insulator similar to the insulator 101 described above.

[0338] At least a portion of the conductor 152 is located in a region sandwiched between the conductors 158a and 158b. The conductor 152 preferably overlaps the semiconductor 156b in the By providing such a conductor 152, the transistor The threshold voltage of the transistor 50 can be controlled. However, the structure of the semiconductor device shown in this embodiment is not limited to this. isn't it.

[0339] The conductor 152 can be the same as the conductor 102 described above.

[0340] The insulator 153 is provided to cover the conductor 152. The insulator 153 blocks oxygen. By providing such an insulator 153, In other words, the conductor 152 draws oxygen from the insulator 154. This prevents the insulator 154 from being electrically connected to the insulator 156a and the semiconductor 156b. In addition, the insulator 153 can effectively supply oxygen to the insulator 156c. By increasing the temperature, the amount of oxygen extracted from the insulator 154 is further reduced, and the insulator 1 54 to the insulator 156a, the semiconductor 156b, and the insulator 156c. It is possible.

[0341] As the insulator 153, an insulator similar to the insulator 103 described above can be used.

[0342] In addition, when a conductor such as wiring is provided in the same layer as the conductor 152, the conductor is also covered. It is preferable to form an insulator 153 therebetween.

[0343] In addition, when the conductor 152 is not provided, it is not necessarily required to provide the insulator 153. If the insulator 153 is not provided, the insulator 151 has a function of blocking oxygen. It is preferable that:

[0344] The insulator 154 is preferably an insulator with excess oxygen. By providing the semiconductor 154, the insulator 154 is connected to the insulator 156a, the semiconductor 156b, and the insulator 15 Oxygen can be supplied to the oxide semiconductor insulator 156. a) It is possible to reduce oxygen vacancies that cause defects in the semiconductor 156b and the insulator 156c. This allows the insulator 156a, the semiconductor 156b, and the insulator 156c to have a low defect level density and a stable The oxide semiconductor can have stable characteristics.

[0345] As the insulator 154, an insulator similar to the insulator 104 described above can be used.

[0346] The insulator 154 having excess oxygen was analyzed by thermal desorption spectroscopy (TDS analysis) and found to have a In the surface temperature range of 0°C to 700°C or 100°C to 500°C, the oxygen molecules The amount of desorption is 1.0×10 14 molecules / cm 2 Over 1.0 x 10 16 molec ules / cm 2 or less, more preferably 1.0 × 10 15 molecules / cm 2 Over 5.0 x 10 15 molecules / cm 2 The following is the result.

[0347] Alternatively, insulators that release oxygen upon heat treatment may contain peroxide radicals. Specifically, the spin density due to peroxide radicals is 5×10 17 spins / cm 3 Insulators containing peroxide radicals can be analyzed by electron spin resonance (E SR), there may be an asymmetric signal around the g value of 2.01.

[0348] Note that the top surface of the insulator 154 does not contain elements that become impurities or defects in the oxide semiconductor. The upper surface of the insulator 154 is the interface between the insulator 154 and the insulator 156a. Therefore, if there are many impurities or defects here, the defect level at the interface between the insulator 156a and the insulator 154 will increase. The potential density increases.

[0349] The insulator 154 may also have the function of preventing the diffusion of impurities from the substrate 150. The insulator 154 may also be an insulator having hydrogen traps.

[0350] Conductor 158a and conductor 158b are the source electrode or The conductor 158a and the conductor 158b function as either a drain electrode or a drain electrode. A conductor similar to the above-described conductor 108a and conductor 108b can be used.

[0351] Here, it is preferable that the lower surfaces of the conductors 158a and 158b do not come into contact with the upper surface of the insulator 154. For example, as shown in FIG. 23(B), the lower surfaces of the conductors 158a and 158b It is sufficient that the semiconductor 156b is formed in contact with only the upper surface of the semiconductor 156b. As a result, oxygen is drawn from the insulator 154 at the lower surfaces of the conductors 158a and 158b. This prevents the conductors 158a and 158b from being partially oxidized. The increase in resistivity due to the change in the insulating layer 154 is suppressed, and the insulating layer 156a and the semiconductor layer 155 are separated. 6b and the insulator 156c can be supplied with oxygen effectively.

[0352] In addition, the conductors 158a and 158b are at least partially overlapped with the conductor 164 in the region where they do not overlap. It is preferable that at least a part of the insulating material 156 overlaps with the insulating material 162 via the insulating material 156c. As shown in FIG. 23(B), most of the upper surfaces of the conductors 158a and 158b are covered with an insulator 1. By using such a configuration, the conductors 158a and 56c can be covered. On the upper surface of the conductor 158b, oxygen can be prevented from being extracted from the insulator 162. As a result, a part of the conductor 158a and the conductor 158b is oxidized, and the resistivity increases. and from the insulator 162 to the insulator 156a, the semiconductor 156b and the insulator 156c. It can provide oxygen effectively.

[0353] The insulator 162 functions as a gate insulating film for the transistor 50. The insulator 162 may be an insulator having excess oxygen, similar to the insulator 154. By providing the insulator 162, the insulator 156a, the semiconductor 156b, and the insulator 156c The insulator 162 can be made of a material similar to the insulator 112 described above. An insulator may be used.

[0354] The conductor 164 functions as the gate electrode of the transistor 50. Any conductor that can be used as the conductor 152 may be used. A region with a higher oxygen concentration than the insulator 162 side of the conductor 164 is formed near the surface. There is.

[0355] Here, as shown in FIG. 23(C), the electric fields of the conductors 152 and 164 , the semiconductor 156b can be electrically surrounded. The semiconductor 156b has an s-channel structure similar to that of the transistor 10. A channel is formed on the entire surface (top, bottom and side). In the s-channel structure, A large current can flow between the source and drain of the transistor, and the current when it is conducting (on-current) ) can be increased.

[0356] When the transistor has an s-channel structure, the side surface of the semiconductor 156b is Therefore, the thicker the semiconductor 156b, the larger the channel region. That is, the thicker the semiconductor 156b, the higher the on-current of the transistor. In addition, the thicker the semiconductor 156b, the greater the proportion of the region with high carrier controllability. For example, the subthreshold swing value can be reduced to 10 nm or more. Preferably 20 nm or more, further preferably 40 nm or more, and even more preferably 60 nm or more, More preferably, the semiconductor 156b has a region with a thickness of 100 nm or more. However, the productivity of the semiconductor device may be reduced. The semiconductor 156 has a region with a thickness of 200 nm or less, more preferably 150 nm or less. As the channel formation region shrinks, the semiconductor 156b becomes thinner. However, the electrical characteristics of the transistor may be improved. It may be less than nm.

[0357] Because of the high on-current, the s-channel structure is suitable for miniaturized transistors. Since the transistor can be miniaturized, the semiconductor device having the transistor The device can be a highly integrated, high density semiconductor device. The transistor preferably has a channel length of 40 nm or less, more preferably 30 nm or less. Preferably, the transistor has a channel width of 20 nm or less. or 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. It has a region.

[0358] The insulators 166 and 168 function as interlayer insulating films for the transistor 50. Here, the film thickness of the insulator 166 can be set to, for example, 5 nm or more, or 20 nm or more. The insulator 166 is an insulator that is less permeable to oxygen than the insulator 154. It is preferable that the insulator 166 has a function of blocking the This allows oxygen to be supplied from the insulator 154 to the insulator 156a, the semiconductor 156b, and the insulator 156c. When the oxygen is released, it is possible to prevent the oxygen from being released to the outside above the insulator 154. As a result, the insulator 154 is divided into the insulator 156a, the semiconductor 156b, and the insulator 156c. As will be described later in detail, the insulator 16 6 is formed into a film by using a sputtering method or the like in an atmosphere containing oxygen. Oxygen can be added to the insulator 154 during film formation.

[0359] The insulator 166 may be, for example, carbon, nitrogen, oxygen, fluorine, magnesium, or aluminum. Umium, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, zinc Insulators containing lanthanum, neodymium, hafnium or tantalum are used in single or double layers. The insulator 166 may be made of oxygen, hydrogen, water, alkali metals, alkaline earth metals, or the like. It is preferable that the insulating material has an effect of blocking metals, etc. Examples of such insulating materials include The nitride insulating film may be made of silicon nitride, oxynitride, or the like. Silicon nitride, aluminum nitride, aluminum oxide nitride, etc. Alternatively, an oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like may be provided. Examples of the oxide insulating film include aluminum oxide, aluminum oxynitride, gallium oxide, and oxide Gallium nitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride Funium, etc.

[0360] Aluminum oxide makes the membrane permeable to both impurities such as hydrogen and moisture, and oxygen. It is preferable to apply it to the insulator 166 because it has a high blocking effect without being affected by the heat. Since the film can be easily formed by sputtering, the insulator 154 Oxygen is added to the insulator 154 and the like, and the insulator 156a, the semiconductor 156b, the insulator 15 It can also be diffused to 6c.

[0361] The insulator 166 only needs to function as a film that is difficult for oxygen to pass through. The oxide that can be used as the insulator 156a or the insulator 156c is used as the insulator 166. As such an insulator 166, an oxide insulator containing In can be used. It is preferable to use In-Al oxide, In-Ga oxide, In-Ga-Z, etc. In oxides containing In are generated when films are formed by sputtering. Since the number of particles generated is small, it is suitable for use as the insulator 166.

[0362] As described above, the insulator 166 is formed at least partially in contact with the upper surface of the insulator 154. In the transistor 50, oxygen is introduced into the region of the insulator 154 that contacts the insulator 166. The oxygen is then diffused from the semiconductor 156a to the insulator 156b and the semiconductor 156c. 25(A) and 25(B) show the state in which oxygen is supplied to the transistor 50. 25(A) is a top view of the transistor 50, and FIG. 25(B) is a bottom view of the transistor 50. 2 is a cross-sectional view corresponding to the dashed line B1-B2 in FIG.

[0363] The hatched outer regions of the insulator 156c shown in FIG. 25(A) are insulators. The upper surface of the insulating material 154 is in contact with the insulating material 166 (region 187). In the semiconductor 156b shown in FIG. 1, the region sandwiched between the conductors 158a and 158b is 25(A) and 25(B), the arrows in the drawings indicate the channel forming region 188. The symbols indicate the oxygen diffusion paths.

[0364] FIG. 24 is an enlarged view of the vicinity of the interface between the insulator 154 and the insulator 166 shown in FIG. 25(B). The following shows the structure of the insulator 154, the insulator 156a, the semiconductor 156b, and the insulator 156c. In the following description, the process by which oxygen is supplied to the insulator 154 SiOx is typically used as the insulator 154 (hereinafter, it may be referred to as insulator 154 (SiOx)). ), and AlOx is typically used as the insulator 166 (hereinafter referred to as the insulator 166 (AlOx) It may be written as follows.)

[0365] First, an insulator 166 (AlOx) is formed on an insulator 154 (SiOx) (FIG. 24( A). Here, the insulator 166 (AlOx) is deposited by sputtering. It is preferable to carry out the deposition by sputtering in an oxygen-containing atmosphere. By forming a film of insulator 166 (AlOx) by sputtering, At the same time, the surface of the insulator 154 (SiOx) (insulator 166 (AlOx) after the formation of the film) Oxygen 131 is added near the interface between 54 (SiOx) and insulator 166 (AlOx). Here, the oxygen 131 is added to the insulator 154 (SiOx) as, for example, oxygen radicals. However, the state in which oxygen-131 is added is not limited to this. The insulator 154 (SiOx) may be doped with oxygen atoms or oxygen ions. With the addition of oxygen 131, the oxygen content in the insulator 154 (SiOx) exceeds the stoichiometric composition. In this case, oxygen-131 can also be called excess oxygen.

[0366] In addition, a mixed region is formed in the region where the insulator 154 (SiOx) contacts the insulator 166 (AlOx). In the mixed region 130, an insulator 154 (SiOx) is formed. It contains both the components that make up the insulator 166 (AlOx) and the components that make up the insulator 166 (AlOx), and The mixed region 130 can be expressed as insulator 154 (SiOx) and insulator 16 (SiOx). 6 (AlOx) in the mixed region 130. The concentration may be increased compared to the layers below the mixed region 130 .

[0367] In this way, oxygen 131 is added to region 187 of insulator 154 (SiOx). The oxygen 131 added to the region 187 is removed from the region 187 to the insulator 154 (S At least during the heat treatment, the insulating 154(SiOx) has a sufficiently large interatomic distance for the diffusion of oxygen 131, and oxygen 13 Therefore, the insulator 154 (S By performing heat treatment on the iOx, oxygen 131 can be diffused very easily. Here, the heat treatment is carried out at a temperature of, for example, 250° C. or higher and 650° C. or lower, preferably 350° C. This allows the mixed region 13 where the concentration of oxygen 131 is high to be formed. Oxygen 131 can be diffused into the insulator 154 (SiOx) with 0 as the center.

[0368] Here, the insulator 166 (AlOx) allows oxygen to permeate more than the insulator 154 (SiOx). It is an insulator that is difficult to break down and functions as a barrier film that blocks oxygen. Since 66 (AlOx) is formed on the insulator 154 (SiOx), the insulator 154 ( Oxygen 131 diffusing in the insulator 154 (SiOx) does not diffuse upward into the insulator 154 (SiOx), The insulator 154 (SiOx) is diffused mainly in the lateral direction or downward direction. The oxygen 131 diffused into the insulator 156a, the semiconductor 156b, and the insulator 154 (SiOx) is 6c, particularly to the channel forming region 188 of the semiconductor 156b.

[0369] At this time, the conductor 152 is covered with an insulator 153 having a function of blocking oxygen. The oxygen 131 diffused into the insulator 154 can be prevented from being drawn into the conductor 152. In addition, by providing the insulator 153 or the insulator 151 with a function of blocking oxygen, Therefore, the oxygen 131 diffused into the insulator 154 can be prevented from diffusing to a layer below the insulator 154. This allows oxygen 131 to be transported to the layer above the insulator 154, i.e., the insulator 156a, the semiconductor Conductor 156b may be fed into insulator 156c.

[0370] In addition, an insulator 156a is provided between the lower surfaces of the conductors 158a and 158b and the insulator 154. and semiconductor 156b, and conductor 158a and conductor 158b are directly connected to insulator 154. By preventing contact, oxygen 131 diffused into insulator 154 is transferred to conductor 158a. In addition, it is possible to prevent the wire 158 from being pulled out by the conductor 158b.

[0371] Thus, the conductor 152, the conductor 158a, and the conductor 158b of the transistor 50 , by preventing direct contact with the insulator 154 through which oxygen 131 diffuses, the insulator 1 56a, semiconductor 156b, insulator 156c, and particularly the channel forming region 18 of the semiconductor 156b. 8 can effectively supply oxygen 131.

[0372] In this way, the insulator 156a, the semiconductor 156b, and the insulator 156c shown in FIG. By supplying oxygen 131 to the insulator 156a, the semiconductor 1 can reduce oxygen vacancies. Hydrogen is trapped in the oxygen vacancies in the insulator 156b and the insulator 156c, forming shallow donors. In other words, by reducing the oxygen vacancy, high purity intrinsic or substantially A highly pure intrinsic oxide semiconductor can be obtained.

[0373] In addition, in the heat treatment at 400°C for 1 hour, the diffusion length of oxygen in the insulator 154 is about 3 μm. Therefore, the distance between the region 187 and the channel forming region 188 is set to 3 μm or less. Preferably, the thickness of the insulator 154 is 1 μm or less, and more preferably, 1 μm or less. The distance between the mixed region 130 formed in the region in contact with the edge 166 and the channel forming region 188 is The distance is preferably 3 μm or less, and more preferably 1 μm or less. The details of the diffusion length will be described in the Examples below.

[0374] In the above description, the insulator 154 is considered to be the main oxygen diffusion path. The semiconductor device is not limited to this. In the case where the insulator 162 serves as a diffusion path for the oxygen 131, the insulator 16 Oxygen 131 is added to the region where the SiO 2 and the insulator 162 contact each other, and oxygen 131 flows from the region through the insulator 162. The oxygen 131 is supplied to the insulator 156c and the semiconductor 156b. By forming the insulator 156c in contact with the upper surfaces of the insulator 18a and the conductor 158b, 62 is prevented from being drawn out by the conductors 158a and 158b. In addition, a mixed region 130 is also formed in the region where the insulator 162 contacts the insulator 166. This may be achieved.

[0375] In addition, in the same manner as above, in the heat treatment at 400° C. for 1 hour, the diffusion length of oxygen in the insulator 162 Therefore, the thickness of the insulator 162 is estimated to be about 3 μm. 66 and the boundary between the conductor 164 (or the periphery of the conductor 164) and the channel forming region 188 The distance is preferably 3 μm or less, and more preferably 1 μm or less. The mixed region 130 is formed in the region where the insulator 162 contacts the insulator 166, and the channel forming region The distance between the region 188 and the surface 184 is preferably 3 μm or less, and more preferably 1 μm or less. .

[0376] The insulator 168 may be an insulator that can be used as the insulator 154. .

[0377] Conductor 170a and conductor 170b are the source electrode and drain electrode of transistor 50. The conductors 170a and 170b function as wiring electrically connected to the electrodes. In this case, a conductor that can be used as the conductor 158a and the conductor 158b may be used. stomach.

[0378] By forming a transistor with the above structure, a transistor having stable electrical characteristics can be obtained. Alternatively, a transistor with low leakage current when non-conducting can be provided. Alternatively, a transistor having high frequency characteristics can be provided. Alternatively, a transistor having normally-off electrical characteristics can be provided. Alternatively, it is possible to provide a transistor with a small subthreshold swing value. Alternatively, a highly reliable transistor can be provided.

[0379] <Transistor 2 Modification> Modifications of the transistor 50 will be described below with reference to FIGS. 26 to 30. 26 to 30 are cross-sectional views in the channel length direction of a transistor, similar to FIGS. 23(B) and 23(C). The figure shows a plan view and a cross-sectional view in the channel width direction of the transistor.

[0380] The transistor 52 shown in FIGS. 26A and 26B includes a conductor 152 and an insulator 153. In this case, the insulator 151 blocks oxygen. By having the locking function, the insulator 154 can be more effectively separated from the insulator 156a and the semiconductor Oxygen can be supplied to the insulator 156b and the insulator 156c.

[0381] The transistor 54 shown in FIGS. 26(C) and 26(D) has a conductor 172 formed on the conductor 152. The transistor 50 differs from the transistor 50 in that the insulator 153 is not formed. It is preferable to use a substance with a high Gibbs free energy of oxidation reaction. By adopting such a structure, oxygen is extracted from the insulator 154 on the upper surface of the conductor 152. As a result, even if the insulator 153 is not formed, a part of the conductor 152 can be prevented from being broken. The insulator 156a, the semiconductor 156b, and the insulating layer 156c are prevented from being oxidized and increasing in resistivity. The conductor 172 can effectively supply oxygen to the conductor 156c. Conductors similar to conductors 110a and 110b can be used.

[0382] The transistor 56 shown in FIGS. 27A and 27B includes a conductor 164, an insulator 162, and an insulating The ends of the conductors 156c are formed so as to be substantially aligned with each other, and the conductors 158a are formed so as to be in contact with each other. The conductor 160a is formed, and the conductor 160b is formed on and in contact with the conductor 158b. This configuration differs from the transistor 50 in that the conductor 158a In addition, the upper surface of the conductor 158b can suppress the extraction of oxygen from the insulator 166. As a result, a portion of the conductor 158a and the conductor 158b is oxidized, increasing the resistivity. and effectively supply oxygen to the insulator 156a, the semiconductor 156b, and the insulator 156c. The conductors 160a and 160b can be the conductors 110a and 110b. A conductor similar to the conductor 110b can be used.

[0383] The transistor 58 shown in FIGS. 27(C) and 27(D) has a conductor 172 formed on the conductor 152. The transistor 56 differs from the transistor 56 in that the insulator 153 is not formed. By adopting such a configuration, oxygen is drawn from the insulator 154 on the upper surface of the conductor 152. This prevents the conductor 152 from being pulled out without forming the insulator 153. The insulator 156a, the semiconductor 156b, and the insulating layer 156c are formed in a uniform shape. Oxygen can be effectively supplied to the insulator 156c.

[0384] The transistor 60 shown in FIGS. 28A and 28B includes a conductor 158a and a conductor 158b. The insulator 156a and the semiconductor 156b protrude outward in the channel width direction. The conductor 174a is formed in contact with the lower surface of the conductor 158a, and the conductor 174b is formed in contact with the lower surface of the conductor 158b. The transistor 50 differs from the transistor 50 in that the conductor 174a and the conductor 174b are formed. The conductor 174b may be the same as the conductors 110a and 110b. With this configuration, the lower surfaces of the conductors 158a and 158b In this case, oxygen can be prevented from being extracted from the insulator 154. The insulator 158a and the conductor 158b are prevented from being partially oxidized and the resistivity is prevented from increasing. Oxygen can be effectively supplied to the semiconductor 156a, the insulator 156b, and the semiconductor 156c.

[0385] The transistor 62 shown in FIGS. 28(C) and 28(D) includes a conductor 164, an insulator 162, and an insulating The ends of the conductive body 156c are formed so as to be substantially aligned with each other, and the conductive body 156c is in contact with the upper surface of the conductive body 158a. The conductor 160a is formed by the conductor 158a, and the conductor 160b is formed in contact with the upper surface of the conductor 158b. This configuration differs from the transistor 60 in that the conductor 15 The upper and lower surfaces of the insulator 166 and the insulator 154 are exposed to the oxygen. This prevents the conductors 158a and 158b from being pulled out. The insulator 156a, the semiconductor 156b, and the insulating layer 156c are prevented from being oxidized and increasing in resistivity. In addition, as shown in the transistor 62, oxygen can be effectively supplied to the body 156c. Additionally, the top surface of the insulator 154 may be subjected to CMP or the like to improve flatness.

[0386] The transistor 64 shown in FIGS. 29A and 29B includes a conductor 158a and a conductor 158b. In the region where it does not overlap with the semiconductor 156b, it is formed in contact with the upper surface of the insulator 156a. The transistor 50 differs from the transistor 50 in that the conductor 158a and the conductor 158b The conductor 15 is formed at a distance from the insulator 154. The lower surface of the insulating body 154a and the lower surface of the conductor 158b can suppress the extraction of oxygen from the insulating body 154. As a result, a portion of the conductor 158a and the conductor 158b is oxidized, and the resistivity increases. and the insulator 154 is transferred to the insulator 156a, the semiconductor 156b, and the insulator 156 c can effectively supply oxygen.

[0387] The insulator 156a has a thickness of 1 / 2 times that of the semiconductor 156b in the region where it does not overlap with the semiconductor 156b. The thickness of the semiconductor 156b may be thinner than that of the region overlapping the semiconductor 156b. This is because, when the insulating material 156 is removed, a part of the upper surface of the insulating material 156a may be removed.

[0388] The transistor 66 shown in FIGS. 29(C) and 29(D) is a transistor having a conductor 164 and an insulator 162 at the end thereof. 1. The transistor 64 differs from the transistor 64 in that the

[0389] The transistor 68 shown in FIGS. 30A and 30B includes an insulator 153, an insulator 151, and a conductive The insulator 155 is formed between the insulator 152 and the insulator 162. The transistor 50 differs from the transistor 50 in that it is formed of a stacked structure of insulators 162c. The insulator 55 can be made of the same insulator as the insulator 104. The insulator 162c can be made of the same insulator as the insulator 162, and the insulator 162b can be made of An insulator similar to the insulator 153 can be used.

[0390] Here, among the insulators 162a to 162c, the insulator 162b has an electron capture region. The electron trapping region has a function of trapping electrons. When the insulator 162c has a function of suppressing the emission of electrons, the electrons captured by the insulator 162b are The insulator 162b behaves like a fixed negative charge. Instead of the insulator 162b, a conductor or a semiconductor may be used. However, since the insulator 162b is an insulator, the trapped electrons This may be able to suppress the release of

[0391] In addition, in the insulators 155, 153, and 154, the insulator 153 captures electrons. It is preferable that the insulator 155 and the insulator 154 have a function of suppressing the emission of electrons. When the insulator 153 has the function of trapping electrons, the electrons trapped in the insulator 153 behave like fixed negative charges. Therefore, the insulator 153 functions as a floating gate. In some cases, a conductor or a semiconductor may be used instead of the insulator 153. Being an insulating material may be able to suppress the release of trapped electrons.

[0392] The transistor 68 is not limited to the configuration shown in FIGS. 30(A) and 30(B). For example, For example, instead of the stacked structure of the insulators 162a to 162c, the insulators 162b and 162c shown in the transistor 50 may be A configuration in which an edge body 162 is provided may also be used.

[0393] The transistor 70 shown in FIGS. 30C and 30D has a structure in which, between the insulator 154 and the insulator 151, In the point where the conductor 152, the insulator 157, the insulator 155 and the insulator 153 are provided, The conductor 152 is different from the transistor 52 in that the conductor 152 is an opening provided in the insulator 157. The upper surfaces of the conductor 152 and the insulator 157 are formed so as to be embedded in the opening. It is preferable that the insulator 155 is planarized by P treatment or the like. The same insulator as in 04 can be used.

[0394] In addition, in the insulators 155, 153, and 154, the insulator 153 captures electrons. It is preferable that the insulator 155 and the insulator 154 have a function of suppressing the emission of electrons. When the insulator 153 has the function of trapping electrons, the electrons trapped in the insulator 153 behave like fixed negative charges. Therefore, the insulator 153 functions as a floating gate. In some cases, a conductor or a semiconductor may be used instead of the insulator 153. Being an insulating material may be able to suppress the release of trapped electrons.

[0395] <Transistor 2 manufacturing method> A method for manufacturing the transistor 50 will be described below with reference to FIGS. do.

[0396] First, a substrate 150 is prepared. The substrate used for the substrate 150 may be any of the above-mentioned substrates. That's fine.

[0397] Next, the insulator 151 is formed. As the insulator 151, any of the above insulators may be used. The insulator 151 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. This can be done using methods such as the

[0398] Next, a conductor that will become the conductor 152 is formed. The conductive material can be formed by a sputtering method, a CVD method, an MB method, etc. This can be carried out using the E method, PLD method, ALD method, or the like.

[0399] Next, a resist or the like is formed on the conductor, and the conductor 152 is processed using the resist. (See Figures 31(A) and (B)).

[0400] Next, the insulator 153 is formed. The insulator 153 may be any of the above-described insulators. The insulator 153 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. This can be done using methods such as the

[0401] Next, an insulator 154 is formed (see FIGS. 31(C) and (D)). The insulator 154 may be formed by a sputtering method, a CVD method, an M method, or the like. This can be done by using the BE method, PLD method, ALD method, etc. By forming the insulator 154 using a deposition method that does not use plasma, such as the LD method, the insulating To form an insulator 154 on the upper surface of the body 154 without causing damage due to plasma. can be done.

[0402] In addition, it is preferable that the upper or lower surface of the semiconductor 156b to be formed later has high flatness. Therefore, as in the insulator 104 shown in FIGS. 18(C) and 18(D), a CM is formed on the top surface of the insulator 154. A planarization process such as P treatment may be carried out to improve the planarization.

[0403] Next, an insulator 176a is formed. The insulator 176a may be formed from an insulator or a semiconductor that can be used in various ways. The method can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. This can be done.

[0404] Next, a semiconductor 176b is formed. The semiconductor 176b can be formed by sputtering. This can be done by using a method such as a CVD method, an MBE method, a PLD method, or an ALD method. The insulator 176a and the semiconductor 176b are successively formed without being exposed to the atmosphere. By carrying out this treatment, it is possible to reduce the amount of impurities entering the film and the interface.

[0405] Next, it is preferable to perform heat treatment. By performing heat treatment, the insulator 176a and the semiconductor In some cases, the hydrogen concentration in the conductor 176b can be reduced. The heat treatment may reduce oxygen vacancies in the semiconductor 176b. ° C. or higher and 650 ° C. or lower, preferably 450 ° C. or higher and 600 ° C. or lower, more preferably 520 ° C. The heat treatment may be carried out at a temperature of 570°C or higher. The heat treatment is carried out in an atmosphere containing 0 ppm or more, 1% or more, or 10% or more. Alternatively, the heat treatment may be carried out in an inert gas atmosphere, followed by desorbing oxygen. To compensate for this, heating is performed in an atmosphere containing oxidizing gases of 10 ppm or more, 1% or more, or 10% or more. Heat treatment may be performed to improve the crystallinity of the insulator 176a and the semiconductor 176b. The heat treatment can be performed by using a lamp. An RTA device can also be used. Heat treatment using an RTA device is more efficient than a furnace. This process takes a short time, which is effective in increasing productivity. When CAAC-OS is used as b, the peak intensity increases by heat treatment. The full width at half maximum is decreased, which means that the crystallinity of the CAAC-OS is increased by the heat treatment.

[0406] Next, a conductor 178 is formed (see FIGS. 31(E) and (F)). Any conductor that can be used as the conductor 158a and the conductor 158b described above may be used. The conductor 178 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an A method. This can be done using the LD method or the like.

[0407] Next, a resist or the like is formed on the conductor 178, and the resist is used to process the conductor 1 58a and the conductor 158b.

[0408] Next, a resist or the like is formed on the semiconductor 176b, and the resist, the conductor 158a and the conductor The insulating layer 156a and the semiconductor layer 156b are formed by processing using the insulating layer 158b (FIG. 31( See G)(H). ).

[0409] In addition, in the region of the semiconductor 156b that contacts the conductor 158a and the conductor 158b, In this case, low resistance regions 159a and 159b may be formed. The conductive body 156b is provided between the conductive body 158a and the conductive body 158b. The thickness of the conductive material 158a may be thinner than that of the conductive material 158b. When forming the conductor 158b, a part of the upper surface of the semiconductor 156b is removed. will be done.

[0410] After the conductor 178 is formed, the insulator 176a, the semiconductor 176b, and the conductor 178 are The insulator 156a, the semiconductor 156b, and the semiconductor 156b are processed together to form a shape overlapping the insulator 156a, the semiconductor 156b, and the semiconductor 156b. The conductor having a shape overlapping with the semiconductor 156b is further processed to form the conductor 15 8a and conductor 158b may be formed.

[0411] Next, heat treatment is preferably performed. By the heat treatment, the insulator 153 and the insulating film It is possible to further reduce the amount of water or hydrogen in the body 154. In the case of the transistor 68, the water or hydrogen in the insulator 155 can be further reduced. The heat treatment is carried out at a temperature of 250°C to 650°C, preferably 450°C to 600°C. The heat treatment is preferably carried out at a temperature of 520° C. or higher and more preferably at a temperature of 570° C. or lower. The heat treatment is preferably carried out in an atmosphere containing an oxidizing gas. Alternatively, the heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under an inert gas atmosphere. To compensate for the oxygen that has been removed, oxidizing gases are added at 10 ppm or more, 1% or more, or 10% or more. The heat treatment may be performed in an atmosphere containing the fluorine-containing compound. Heat treatment using an RTA device takes less time than using a furnace, which increases productivity. It is effective for

[0412] If a semiconductor element layer is provided below the transistor 50, a relatively low temperature It is preferable to heat the material in a temperature range of about 350° C. to 445° C., for example. For example, the insulators 153 and 154 (the insulators in the transistor 68 shown in FIG. 30) The substrate heating temperature during film formation should be equal to or lower than the highest heating temperature of any of the following: It is preferable that:

[0413] As described above, the insulator 156a, the semiconductor 156b, and the insulator 156c are desorbed. Heat treatment is necessary for hydration, dehydrogenation, or reducing oxygen vacancies. However, there is a risk that the layers below the insulator 154 may be deteriorated by performing high-temperature heat treatment. In particular, the transistor 50 shown in this embodiment is made of a semiconductor ( For example, when the insulating film is formed on a semiconductor element layer having an active layer made of silicon, The heat treatment may damage or alter the various elements and wirings included in the semiconductor element layer. There is a risk.

[0414] For example, when forming a semiconductor element layer on a silicon substrate, in order to miniaturize the elements, There is a demand for lower resistance in elements. For example, Cu wiring, which has low resistivity, is formed as the wiring material. To form the source and drain regions of the transistor, nickel silicon is deposited in the regions. However, both Cu wiring and nickel silicide are heat-resistant. For example, high-temperature heat treatment of Cu wiring can cause voids and hillocks. Deterioration occurs due to the formation of nickel silicide or Cu diffusion. High-temperature heat treatment expands the silicide region and forms the source and drain regions of the transistor. Deterioration such as short circuiting occurs.

[0415] For this reason, the above heat treatment should be carried out within a temperature range that does not deteriorate the underlying semiconductor element layer. However, if the insulator 154 contains a large amount of water or hydrogen during film formation, Even if a heat treatment is performed within a temperature range that does not deteriorate the underlying semiconductor element layer, the insulating layer 154 There is a risk that water, hydrogen, etc. may not be sufficiently removed. When the semiconductor 156b and the insulator 156c are subjected to heat treatment in the same temperature range after being formed, the insulating Water, hydrogen, etc. may be supplied from the body 154 to the semiconductor 156b, etc., and defect levels may be formed. There is a problem.

[0416] In contrast, as described above, the insulator 156a and the semiconductor 156b are formed, and the insulator 1 By performing a heat treatment at the stage when the surface of 54 is exposed, the insulator 156a and the semiconductor While suppressing the supply of water and hydrogen to the insulator 156b, the insulator 154 and the insulator 153 (shape This can further reduce the amount of water or hydrogen in the insulating material (including the insulating material 155 if it is made of a material that is not oxidized). Insulator 154 and insulator 153 (including insulator 155 if formed) By further reducing the amount of water or hydrogen, the Heating (temperature range of about 45°C or less) can sufficiently remove water, hydrogen, etc., and This can suppress the formation of defect levels in 156b and other regions. Therefore, a highly reliable transistor can be provided.

[0417] Next, an insulator 176c is formed. The insulator 176c may be formed from an insulator or a semiconductor that can be used in various ways. The method can be performed by using a sputtering method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. Before the insulator 176c is formed, the semiconductor 156b, the conductor 158a, and the conductor The surface of the body 158b may be etched, for example, using a plasma containing a rare gas. Then, the insulator 176c is continuously etched without being exposed to the atmosphere. By forming the film, the semiconductor 156b, the conductors 158a and 158b, and the insulator 156c, and can reduce the inclusion of impurities at the interface between the films. Impurities present in the film may be more diffusible than impurities in the film. By reducing the input, stable electrical characteristics can be imparted to the transistor.

[0418] Next, an insulator 182 is formed. The insulator 182 is the same as the insulator 162 described above. The insulator 182 can be formed by a sputtering method, a CV method, or the like. This can be done by using the D method, MBE method, PLD method, ALD method, etc. The deposition of the insulating film 176c and the deposition of the insulating film 182 are performed successively without exposure to the atmosphere. This can reduce the amount of impurities entering the film and at the interface.

[0419] Next, a conductor 184 is formed (see FIGS. 32(A) and (B)). The conductor 184 may be any conductor that can be used as the conductor 164 described above. The film is formed using the sputtering method, CVD method, MBE method, PLD method, ALD method, etc. The deposition of the insulator 182 and the deposition of the conductor 184 can be performed by exposing the insulator 182 and the conductor 184 to the atmosphere. By performing this process continuously without any additional steps, it is possible to reduce the inclusion of impurities in the film and at the interface. do.

[0420] Next, a resist or the like is formed on the conductor 184, and the resist is used to process the conductor 184. Form 64.

[0421] Next, a resist or the like is formed on the conductor 164 and the insulator 182, and the resist is used to The insulating material 156c and the insulating material 162 are formed by processing (see FIGS. 32(C) and (D)). At this time, the conductors 170a and 170b to be formed later are aligned with the conductors 158a and 158b. The insulators 156c and 162 are formed so as to expose the area in contact with the inductor 158b. Good too.

[0422] Next, an insulator 166 is formed (see FIGS. 32(E) and (F)). The insulator 166 may be formed by a sputtering method, a CVD method, an M method, or the like. This can be carried out using a BE method, a PLD method, an ALD method, or the like.

[0423] Here, the insulator 166 is a material such as aluminum oxide that blocks oxygen, hydrogen, water, etc. It is preferable to provide an oxide insulating film having a blocking effect. By using the LD method, voids are formed even in the protruding portions (for example, the side surfaces of the conductor 164). This reduces the risk of contamination and allows the insulator 166 to be formed with good coverage.

[0424] Alternatively, the insulator 166 may be formed in a laminated structure. After forming an aluminum nitride film using the ALD method, RF sputtering, which has a higher film formation rate, is used. An aluminum oxide film may be further formed by a method such as a ring method. As a result, the insulator 166 is formed by the ALD method in the vicinity of the interface between the insulator 162 and the conductor 164. A film with good coating properties can be formed, and the film thereon can be formed with good throughput. In addition, when the insulator 166 has a laminated structure, after the first film is formed, Alternatively, the second film may be formed after adding oxygen ions as described above.

[0425] The insulator 166 is preferably formed by using plasma, and is preferably formed by sputtering. It is more preferable to use a sputtering method in an oxygen-containing atmosphere. It is more preferable to use a high frequency power supply as the sputtering power supply. RF (Radio Frequency) sputtering and reactive gas atmospheres are used. In addition, a DC power supply is used as the sputtering power supply. DC (Direct Current) sputtering method, which uses pulsed bias Alternatively, a pulse DC sputtering method may be used. Magnetron sputtering, which is a method that uses a voltage applied to the substrate during film formation, and bias sputtering, which is a method that applies a voltage to the substrate during film formation. A coating method or the like may also be used.

[0426] Here, the insulator 166 is formed by sputtering in an atmosphere containing oxygen. Therefore, the surface of the insulator 154 (or the insulator 162) is formed at the same time as the film is formed (after the insulator 166 is formed, Oxygen is added near the interface between the insulator 154 (or the insulator 162 and the insulator 166). The oxygen is added to the insulator 154 (or the insulator 162) as, for example, oxygen radicals. However, the state in which oxygen is added is not limited to this. The oxygen may be an oxygen atom or The oxygen ions may be added to the insulator 154 (or the insulator 162) in the form of oxygen ions or the like. With the addition of oxygen, the oxygen in the insulator 154 (or the insulator 162) becomes stoichiometric. In some cases, the oxygen contained exceeds the limit, and this oxygen can be called excess oxygen. The oxygen gas flow rate and film formation power for sputtering are determined appropriately depending on the amount of oxygen ions added, etc. In this way, the insulator 166 may be formed simultaneously with the formation of the insulator 154 (or the insulator 154). 62), the addition of oxygen ions shown in Figure 33(A)(B) below is not performed. It's not necessary.

[0427] In addition, when the insulator 166 is formed by sputtering and oxygen ions are added at the same time, When the insulator 166 is formed in an atmosphere containing a rare gas such as argon, the rare gas such as argon The gas is also added to the insulator 154. As a result, the insulator 154 is In the region 187 shown in FIG. 1, other regions (for example, the channel forming region of the insulator 154) The concentration of rare gases such as argon may be greater than that of the region overlapping with 188.

[0428] In addition, a mixed region is formed in the region near the interface between the insulator 154 (or the insulator 162) and the insulator 166. The mixed region 130 may be formed between the insulator 154 (or the insulator 16 2) is formed in the region near the interface between the insulator 166 and the oxygen concentration in the mixed region 130. The degree of the interfacial tension may be greater than that of the layers below the interfacial tension region 130 .

[0429] The insulator 166 also functions as a membrane that is less permeable to oxygen than the insulator 154. The oxide that can be used as the insulator 156a described above is used as the insulator 166. As such an insulator 166, an oxide insulator containing In is used. It is preferable to use In-Al oxide, In-Ga oxide, In-Ga-Zn oxide, for example. An oxide containing In may be used as the insulator 166. For example, oxygen can be added to the insulator 154 in the same manner as described above. Oxide insulators containing In generate fewer particles when they are deposited by sputtering. Therefore, it is suitable for use as the insulator 166.

[0430] Next, oxygen ions 186 are added to penetrate the insulator 166 and penetrate the insulator 15 4 (or insulator 162) is made to contain excess oxygen (see Figures 33(A) and (B)). The addition of ions is performed by ion implantation, ion doping, plasma immersion ion implantation, etc. For example, the ion implantation method can be used to set the acceleration voltage The voltage is between 2 kV and 10 kV, and the dose is 5 × 10 14 ions / cm 2 5x10 or more 1 6 ions / cm 2 This can be done as follows.

[0431] In addition, in FIGS. 33(A) and 33(B), oxygen ions 186 are added in the normal direction to the substrate plane. Although the above description has been given of the case where the number of times the signal is added is omitted, the present invention is not limited to this. As shown, oxygen ions 186 may be added at an angle relative to the normal to the substrate plane. Here, the tilt angle and twist angle may be appropriately determined depending on the amount of oxygen ions added, etc. .

[0432] In addition, when oxygen ions are added using ion implantation, oxygen ions with a mass number of 16 are mainly used. The oxygen ions are added to the insulator 154. In that case, 16 The abundance ratio of O is 16 than the natural abundance of O (99.762 atomic%) Therefore, the insulator 154 is formed such that, in the region 187 shown in FIG. than other regions (for example, the region overlapping with the channel forming region 188 of the insulator 154). 16 The abundance ratio of O is high, 16 It may be greater than the natural abundance of O.

[0433] In addition, oxygen ions are added by sputtering or ion implantation as described above. When the conductor 164 is heated, oxygen may be added to the vicinity of the surface of the conductor 164. A region with a higher oxygen concentration than the insulator 162 side of the conductor 164 is formed near the surface of the conductor 164. There is a fault.

[0434] Next, it is preferable to carry out a heat treatment (see Figures 33(C) and (D)). As a result, the oxygen added to the insulator 154 (or the insulator 162) is diffused, and the insulator 15 6a, semiconductor 156b, and insulator 156c. The heat treatment may be carried out at a temperature of from 350°C to 650°C, preferably from 350°C to 450°C. Active gas atmosphere or oxidizing gas containing 10 ppm or more, 1% or more, or 10% or more The heat treatment is carried out in a RT atmosphere. The heat treatment may be carried out under reduced pressure. A device can also be used.

[0435] The temperature of this heat treatment is preferably lower than that of the heat treatment performed after the formation of the semiconductor 176b. The temperature difference between the heat treatment after the semiconductor 176b film formation and the heat treatment after the semiconductor 176b film formation is 20°C or more and 150°C or less, preferably 4 The temperature is set to 0°C or higher and 100°C or lower. This allows excess oxygen (oxygen) to be released from the insulator 154 and the like. ) can be suppressed. When the heat treatment for the insulating layer 166 can be performed by heating the insulating layer 166 during film formation, In some cases, it may not be necessary to perform the heating process (if the same heating process is performed in the deposition of the insulator 16). 6 The heat treatment after film formation may be carried out at any time after the addition of oxygen ions. This may be done after the formation of 68 or after the formation of conductors 170a and 170b.

[0436] The heat treatment diffuses oxygen 131 into the insulator 154 (or the insulator 162). (See Fig. 33(C)(D)). The insulating layer is formed around the mixed region 130 where the concentration of oxygen 131 is high. Oxygen 131 can be diffused into the insulator 154 (or insulator 162).

[0437] Here, the insulator 166 is more permeable to oxygen than the insulator 154 (or the insulator 162). It is a strong insulator and functions as a barrier film that blocks oxygen. 6 is formed on the insulator 154 (or the insulator 162), Oxygen 131 diffusing through the insulator 154 (or insulator 162) flows upward from the insulator 154 (or insulator 162). The insulator 154 (or the insulator 162) is mainly diffused laterally or downwardly. In this way, the oxygen 131 diffused into the insulator 154 (or the insulator 162) 156a, semiconductor 156b, insulator 156c, particularly the channel forming region 1 of the semiconductor 156b. It is supplied to 88.

[0438] At this time, the conductor 152 is covered with an insulator 153 having a function of blocking oxygen. The oxygen 131 diffused into the insulator 154 can be prevented from being drawn into the conductor 152. In addition, by providing the insulator 153 or the insulator 151 with a function of blocking oxygen, The oxygen 131 diffused into the insulator 154 does not diffuse to a layer below the insulator 154, but The layers above the insulator 154, namely the insulator 156a, the semiconductor 156b, and the insulator 156c, are supplied with It is possible.

[0439] In addition, an insulator 156a is provided between the lower surfaces of the conductors 158a and 158b and the insulator 154. and semiconductor 156b, and conductor 158a and conductor 158b are directly connected to insulator 154. By preventing contact, oxygen 131 diffused into insulator 154 is transferred to conductor 158a. In addition, it is possible to prevent the wire 158 from being pulled out by the conductor 158b.

[0440] Thus, the conductor 152, the conductor 158a, and the conductor 158b of the transistor 50 , by preventing direct contact with the insulator 154 through which oxygen 131 diffuses, the insulator 1 56a, semiconductor 156b, insulator 156c, and particularly the channel forming region 18 of the semiconductor 156b. 8 can effectively supply oxygen 131.

[0441] In this way, oxygen 131 is introduced into the insulator 156a, the semiconductor 156b, and the insulator 156c. By supplying oxygen 131, oxygen vacancies can be filled and reduced. By doing so, it is possible to reduce hydrogen trapped in oxygen vacancies, In the body 156b, the formation of shallow donor levels can be reduced. and a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor having a low density of defect states. can be done.

[0442] When the oxide insulator containing In is used as the insulator 168, the heat treatment After that, the oxide insulator containing In is removed by etching or the like, and a new insulating film is formed using another material. Alternatively, the insulator 168 may be deposited again.

[0443] Next, the insulator 168 is formed. The insulator 168 may be any of the above-described insulators. The insulator 168 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or an ALD method. This can be done using methods such as the

[0444] Next, a resist or the like is formed on the insulator 168, and the insulators 168, 166, and An opening is then formed in the conductor 170a and the insulator 156c. The conductors to be the conductors 170a and 170b are formed as follows: The conductive material can be formed by a sputtering method, a CVD method, or the like. This can be done using the MBE method, PLD method, ALD method, or the like.

[0445] Next, a resist or the like is formed on the conductor, and the resist is used to process the conductor 170a. And the conductor 170b is formed (see FIGS. 33(E) and (F)).

[0446] Through the above steps, a transistor according to one embodiment of the present invention can be manufactured. <Circuit> An example of a circuit of a semiconductor device using a transistor according to one embodiment of the present invention will be described below. This article explains:

[0447] <CMOSインバータ> The circuit diagram shown in FIG. 34A includes a p-channel transistor 2200 and an n-channel transistor The transistors 2100 are connected in series and the gates of the transistors are connected together. The configuration of the OS inverter is shown.

[0448] <Structure of semiconductor device> 35 is a cross-sectional view of the semiconductor device corresponding to FIG. 34(A). The device includes a transistor 2200 and a transistor 2100. The transistor 2100 is disposed above the transistor 2200. 26A is used as an example, but The semiconductor device according to the present invention is not limited to the above. The transistor 2100 can be a transistor having a structure similar to that shown in FIG. 11 to 17, 23, 26 to 29, etc. Therefore, the transistor 2100 may be used as Please refer to the above description of the transistor.

[0449] The transistor 2200 shown in FIG. 35 is a transistor using a semiconductor substrate 450. The transistor 2200 includes a region 472a in the semiconductor substrate 450 and a region 472b in the semiconductor substrate 450. The region 472b includes an insulator 462 and a conductor 454.

[0450] In transistor 2200, regions 472a and 472b are source and drain regions. The insulator 462 also functions as a gate insulator. The conductor 454 also functions as a gate electrode. The resistance of the channel forming region can be controlled by the potential applied to the electrode 454 . That is, the potential applied to the conductor 454 causes conduction between the region 472a and the region 472b. Non-conduction can be controlled.

[0451] The semiconductor substrate 450 may be, for example, a single semiconductor substrate such as silicon or germanium. or silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide A semiconductor substrate such as lead or gallium oxide may be used. Preferably, the semiconductor substrate 450 A single crystal silicon substrate is used as the substrate.

[0452] The semiconductor substrate 450 is a semiconductor substrate containing impurities that impart n-type conductivity. However, a semiconductor substrate having impurities that impart p-type conductivity is used as the semiconductor substrate 450. In that case, the region that will become the transistor 2200 is given n-type conductivity. Alternatively, if the semiconductor substrate 450 is an i-type, It's okay.

[0453] The upper surface of the semiconductor substrate 450 preferably has a (110) surface. The on-state characteristics of the transistor 2200 can be improved.

[0454] The regions 472a and 472b are regions containing impurities that impart p-type conductivity. In this way, the transistor 2200 constitutes a p-channel transistor.

[0455] Note that the transistor 2200 is separated from adjacent transistors by a region 460 or the like. The region 460 is an insulating region.

[0456] The semiconductor device shown in FIG. 35 includes an insulator 464, an insulator 466, an insulator 468, and a conductive Conductor 480a, conductor 480b, conductor 480c, conductor 478a, and conductor 478 b, conductor 478c, conductor 476a, conductor 476b, conductor 474a, and conductor Conductor 474b, conductor 474c, conductor 496a, conductor 496b, and conductor 49 6c, conductor 496d, conductor 498a, conductor 498b, conductor 498c, Insulator 489, insulator 490, insulator 491, insulator 492, insulator 493, and an insulator 494.

[0457] The insulator 464 is disposed on the transistor 2200. The insulator 466 is disposed on the 464. Insulator 468 is disposed on insulator 466. Insulator 489 is disposed on the insulator 468. Also, the transistor 2100 is disposed on the insulator 489. The insulator 493 is disposed on the transistor 2100. 494 is disposed on the insulator 493 .

[0458] The insulator 464 has an opening that reaches the region 472a, an opening that reaches the region 472b, and a conductive The openings also include openings that reach the conductors 480a and 454. The conductor 480b or the conductor 480c is embedded.

[0459] Insulator 466 also has an opening that reaches conductor 480a and an opening that reaches conductor 480b. The openings each have a mouth and an opening that reaches the conductor 480c. The conductive body 478a, the conductive body 478b, or the conductive body 478c is embedded therein.

[0460] Insulator 468 also has an opening that reaches conductor 478b and an opening that reaches conductor 478c. The openings each have a conductor 476a or a conductor 476b. It is embedded.

[0461] The insulator 489 has an opening overlapping with a channel formation region of the transistor 2100 and It has an opening that reaches the conductor 476a and an opening that reaches the conductor 476b. The openings are filled with a conductor 474a, a conductor 474b, or a conductor 474c. It is being done.

[0462] The conductor 474a may function as the gate electrode of the transistor 2100. Alternatively, for example, applying a constant potential to the conductor 474a can turn on the transistor 21. The electrical properties of the conductor 47 may be controlled, such as the threshold voltage of the conductor 47. 4a and the conductor 504 that functions as the gate electrode of the transistor 2100 are electrically connected. This increases the on-state current of the transistor 2100. In addition, since the punch-through phenomenon can be suppressed, the transistor 21 The electrical characteristics in the saturated region of 00 can be stabilized. Since this corresponds to the conductor 152 in the embodiment, please refer to the description of the conductor 152 for details. It is possible.

[0463] Insulator 490 also has an opening that reaches conductor 474b and an opening that reaches conductor 474c. The insulator 490 corresponds to the insulator 153 in the above embodiment. For details, the description of the insulator 153 can be referred to. As shown in FIG. 1, an insulator 490 is placed over the conductors 474a to 474c except for the openings. By providing the insulating material 491, the conductors 474a to 474c can extract oxygen from the insulating material 491. This prevents the oxide semiconductor of the transistor 2100 from being exposed to the insulator 491. It can provide oxygen to the body effectively.

[0464] The insulator 491 has an opening that reaches the conductor 474b and an opening that reaches the conductor 474c. The insulator 491 corresponds to the insulator 154 in the above embodiment. For details, please refer to the description of the insulator 154.

[0465] The insulator 492 is also connected to one of the source and drain electrodes of the transistor 2100. An opening through conductor 516b, which is the transistor 210, to conductor 474b. An opening that reaches the conductor 516a, which is the other of the source electrode or drain electrode of 0, and An opening reaching the conductor 504, which is the gate electrode of the transistor 2100, and an opening reaching the conductor 474c The insulator 492 corresponds to the insulator 166 in the above embodiment. Therefore, for details, the description of the insulator 166 can be referred to.

[0466] The insulator 493 is connected to one of the source and drain electrodes of the transistor 2100. An opening through conductor 516b, which is the transistor 210, to conductor 474b. An opening that reaches the conductor 516a, which is the other of the source electrode or drain electrode of 0, and An opening reaching the conductor 504, which is the gate electrode of the transistor 2100, and an opening reaching the conductor 474c The openings are provided with a conductor 496a and a conductor 496b. b, the conductor 496c or the conductor 496d is embedded. The portion may also be connected through an opening in any of the components, such as the transistor 2100. There is a match.

[0467] The insulator 494 also has an opening that reaches the conductor 496a and an opening that reaches the conductor 496b and the conductor The opening extends to the conductive body 496d and the opening extends to the conductive body 496c. The conductive body 498a, the conductive body 498b, and the conductive body 498c are embedded in the respective portions. There are.

[0468] Insulator 464, insulator 466, insulator 468, insulator 489, insulator 493 and insulator The body 494 may be, for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, or aluminum. Nitride, silicon, phosphorus, chlorine, argon, gallium, germanium, yttrium, di a single layer of an insulator containing zinc, lanthanum, neodymium, hafnium or tantalum; Alternatively, they may be used in a laminated form.

[0469] Insulator 464, Insulator 466, Insulator 468, Insulator 489, Insulator 493 or Insulator At least one of the bodies 494 is made of an insulator that has the function of blocking impurities such as hydrogen and oxygen. It is preferable to provide impurities such as hydrogen and oxygen near the transistor 2100. By disposing an insulator with a blocking function, the electrical The characteristics can be stabilized.

[0470] Examples of insulators that have the function of blocking impurities such as hydrogen and oxygen include fluorine, Uron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine , argon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium Insulators containing titanium, hafnium or tantalum may be used in single or multilayer configurations.

[0471] Conductor 480a, conductor 480b, conductor 480c, conductor 478a, conductor 478b , conductor 478c, conductor 476a, conductor 476b, conductor 474a, conductor 474b , conductor 474c, conductor 496a, conductor 496b, conductor 496c, conductor 496d The conductors 498a, 498b, and 498c may include, for example, boron, nitrogen, and the like. element, oxygen, fluorine, silicon, phosphorus, aluminum, titanium, chromium, manganese, cobalt Nickel, Copper, Zinc, Gallium, Yttrium, Zirconium, Molybdenum, Ruthenium Conductors containing one or more of aluminum, silver, indium, tin, tantalum and tungsten are used. It may be used in layers or laminates. For example, it may be an alloy or compound, such as aluminum. Conductors containing copper and titanium, conductors containing copper and manganese, indium Conductors containing titanium, tin and oxygen, and conductors containing titanium and nitrogen may also be used.

[0472] The semiconductor device shown in FIG. 36 is the same as the transistor 2200 of the semiconductor device shown in FIG. Therefore, the semiconductor device shown in FIG. 36 is different from that shown in FIG. Specifically, the semiconductor device shown in FIG. The transistor 2200 is a Fin type. As a result, the effective channel width is increased, and the on-characteristics of the transistor 2200 are improved. In addition, the contribution of the electric field of the gate electrode can be increased, The off characteristics of the transistor 2200 can be improved.

[0473] 37 is a circuit diagram of the semiconductor device shown in FIG. 35. Therefore, the semiconductor device shown in FIG. 37 is different from that shown in FIG. Specifically, the semiconductor device shown in FIG. 37 shows a case where the semiconductor substrate 450 is provided with the semiconductor substrate 2200. shows a structure in which an insulator 452 separates a region 456 from a semiconductor substrate 450 . By using an SOI substrate as the semiconductor substrate 450, punch-through phenomena and the like are suppressed. Therefore, the off characteristics of the transistor 2200 can be improved. The insulator 452 can be formed by insulating the semiconductor substrate 450. For example, the insulator 452 can be silicon oxide.

[0474] The semiconductor device shown in FIGS. 35 to 37 is a p-channel transistor formed on a semiconductor substrate. The area occupied by the element is reduced by fabricating a capacitor and fabricating an n-channel transistor above it. In other words, the degree of integration of the semiconductor device can be increased. A p-channel transistor and a p-channel transistor are fabricated using the same semiconductor substrate. Since the process can be simplified compared to the conventional method, the productivity of semiconductor devices can be increased. Furthermore, the yield of the semiconductor device can be increased. The transistor has an LDD (Lightly Doped Drain) region, a shallow It may be possible to omit complex processes such as wrench structure and distortion design. Compared to fabricating a silicon-doped transistor using a semiconductor substrate, productivity and yield are improved. It may be possible to make it higher.

[0475] <CMOSアナログスイッチ> The circuit diagram shown in FIG. 34B shows the transistors 2100 and 2200. The figure shows a configuration in which the source and drain of each are connected. It can function as a so-called CMOS analog switch.

[0476] <Storage device 1> A memory device using a transistor according to one embodiment of the present invention and capable of storing stored contents even when power is not supplied An example of a semiconductor device (memory device) that can retain data and has no limit on the number of times it can be written is shown in Figure 3. Shown in 8.

[0477] The semiconductor device shown in FIG. 38A includes a transistor 3200 using a first semiconductor and a second semiconductor. The semiconductor device includes a transistor 3300 and a capacitor 3400. The transistor 3300 is the same as the transistor 2100 described above. You can be there.

[0478] The transistor 3300 is preferably a transistor with low off-state current. For example, a transistor using an oxide semiconductor can be used as the transistor 300. The low off-state current of the STAR 3300 allows for long-term storage of specific nodes in the semiconductor device. It is possible to retain the stored contents, i.e., no refresh operation is required, and This allows for extremely low frequency refresh operations, resulting in low power consumption. It becomes a conductor device.

[0479] In FIG. 38A, a first wiring 3001 is electrically connected to the source of a transistor 3200. The second wiring 3002 is electrically connected to the drain of the transistor 3200. The third wiring 3003 is electrically connected to one of the source and drain of the transistor 3300. The fourth wiring 3004 is electrically connected to the gate of the transistor 3300. The gate of the transistor 3200 and the source of the transistor 3300 are connected to each other. The other of the drains is electrically connected to one of the electrodes of the capacitor 3400 and is connected to the fifth wiring 3 005 is electrically connected to the other electrode of the capacitor 3400 .

[0480] The semiconductor device shown in FIG. 38A can hold the potential of the gate of the transistor 3200. This property makes it possible to write, store, and read information, as shown below. be.

[0481] Writing and holding of information will be described. First, the potential of the fourth wiring 3004 is set to The transistor 3300 is set to a potential at which it becomes conductive, thereby making the transistor 3300 conductive. As a result, the potential of the third wiring 3003 is applied to the gate of the transistor 3200 and The voltage is applied to a node FG electrically connected to one electrode of the capacitor 3400. A predetermined charge is applied to the gate of the transistor 3200 (write). The charges that give two potential levels (hereinafter referred to as low-level charge and high-level charge) ) is given. Then, the potential of the fourth wiring 3004 is given to the transistor. The potential is set to a level at which the transistor 3300 is in a non-conducting state. As a result, charge is held (retained) at node FG.

[0482] Since the off-state current of the transistor 3300 is small, the charge of the node FG is maintained for a long period of time. Retained.

[0483] Next, reading of information will be described. In this state, when an appropriate potential (read potential) is applied to the fifth wiring 3005, the second wiring The line 3002 takes on a potential corresponding to the amount of charge held in the node FG. If the transistor 3200 is an n-channel type, a high level voltage is applied to the gate of the transistor 3200. The apparent threshold voltage V under load th_H is a transistor 3200 The apparent threshold voltage V when a low-level charge is applied to the gate of th_L Here, the apparent threshold voltage is the voltage at which the transistor 3200 The potential of the fifth wiring 3005 required to make the fifth wiring 3005 in a "conductive state" is referred to as the potential of the fifth wiring 3005. Then, the potential of the fifth wiring 3005 is V th_H and V th_L The potential between For example, in a write operation, the charge applied to node FG can be determined by When a high level charge is applied to G, the potential of the fifth wiring 3005 becomes V0 ( >V th_H ), transistor 3200 is in a "conducting state." Meanwhile, node F When a low level charge is applied to G, the potential of the fifth wiring 3005 becomes V0 (< V th_L ), transistor 3200 remains in a "non-conducting state." Therefore, by determining the potential of the second wiring 3002, the data stored in the node FG can be read. It can be seen.

[0484] When memory cells are arranged in an array, the information of a desired memory cell is read out. In order to avoid reading information from other memory cells, The voltage at which transistor 3200 is in a "non-conducting state" regardless of the charge applied to the FG. Place, that is, V th_H A lower potential may be applied to the fifth wiring 3005. The voltage at which transistor 3200 is in a "conducting state" regardless of the charge applied to node FG is Place, that is, V th_L A higher potential may be applied to the fifth wiring 3005 .

[0485] In the above, an example in which two types of charges are held at node FG is shown. The semiconductor device according to the present invention is not limited to this. For example, the node FG of the semiconductor device It is also possible to have a configuration in which three or more types of charges can be held in the electrode. The semiconductor device can be made multi-valued to increase the storage capacity.

[0486] <Structure of memory device 1> 39 is a cross-sectional view of the semiconductor device corresponding to FIG. 38(A). The device includes a transistor 3200, a transistor 3300, and a capacitor 3400. The transistor 3300 and the capacitor 3400 are connected to the upper side of the transistor 3200. The transistor 3300 is arranged in the same manner as the transistor 2100. The transistor 3200 may be the transistor shown in FIG. Please refer to the description of the transistor 2200. Note that in FIG. Although the case where the transistor 3200 is a p-channel transistor has been described, A channel transistor may also be used.

[0487] The transistor 3200 shown in FIG. 39 is a transistor using a semiconductor substrate 450. The transistor 3200 includes a region 472a in the semiconductor substrate 450 and a region 472b in the semiconductor substrate 450. The region 472b includes an insulator 462 and a conductor 454.

[0488] The semiconductor device shown in FIG. 39 includes an insulator 464, an insulator 466, an insulator 468, and a conductive Conductor 480a, conductor 480b, conductor 480c, conductor 478a, and conductor 478 b, conductor 478c, conductor 476a, conductor 476b, conductor 474a, and conductor Conductor 474b, conductor 474c, conductor 496a, conductor 496b, and conductor 49 6c, conductor 496d, conductor 498a, conductor 498b, conductor 498c, Insulator 489, insulator 490, insulator 491, insulator 492, insulator 493, and an insulator 494.

[0489] The insulator 464 is disposed on the transistor 3200. The insulator 466 is disposed on the insulator 464. Insulator 468 is disposed on insulator 466. Insulator 489 is disposed on the insulator 468. Also, the transistor 3300 is disposed on the insulator 489. The insulator 493 is disposed on the transistor 3300. 494 is disposed on the insulator 493 .

[0490] The insulator 464 has an opening that reaches the region 472a, an opening that reaches the region 472b, and a conductive The openings also include openings that reach the conductors 480a and 454. The conductor 480b or the conductor 480c is embedded.

[0491] Insulator 466 also has an opening that reaches conductor 480a and an opening that reaches conductor 480b. The openings each have a mouth and an opening that reaches the conductor 480c. The conductive body 478a, the conductive body 478b, or the conductive body 478c is embedded therein.

[0492] Insulator 468 also has an opening that reaches conductor 478b and an opening that reaches conductor 478c. The openings each have a conductor 476a or a conductor 476b. It is embedded.

[0493] The insulator 489 has an opening overlapping with a channel formation region of the transistor 3300 and It has an opening that reaches the conductor 476a and an opening that reaches the conductor 476b. The openings are filled with a conductor 474a, a conductor 474b, or a conductor 474c. It is being done.

[0494] The conductor 474a may function as a bottom gate electrode of the transistor 3300. Alternatively, for example, applying a constant potential to the conductor 474a can The electrical properties of the capacitor 3300, such as the threshold voltage, may be controlled. The body 474a and the conductor 504, which is the top gate electrode of the transistor 3300, are electrically connected. This can increase the on-state current of the transistor 3300. In addition, since the punch-through phenomenon can be suppressed, the transistor 330 This makes it possible to stabilize the electrical characteristics in the saturated region of 0.

[0495] Insulator 490 also has an opening that reaches conductor 474b and an opening that reaches conductor 474c. The insulator 490 corresponds to the insulator 153 in the above embodiment. For details, the description of the insulator 153 can be referred to. As shown in FIG. 1, an insulator 490 is placed over the conductors 474a to 474c except for the openings. By providing the insulating material 491, the conductors 474a to 474c can extract oxygen from the insulating material 491. This prevents the oxide semiconductor of the transistor 3300 from being exposed to the insulator 491. It can provide oxygen to the body effectively.

[0496] The insulator 491 has an opening that reaches the conductor 474b and an opening that reaches the conductor 474c. The insulator 491 corresponds to the insulator 154 in the above embodiment. For details, please refer to the description of the insulator 154.

[0497] The insulator 492 is connected to one of the source and drain electrodes of the transistor 3300. An opening through conductor 516b, which is the transistor 330, to conductor 474b. 516a, which is the other of the source electrode or drain electrode of 0, and the insulator 511. An opening reaching the overlying conductor 514 and the conductor that is the gate electrode of transistor 3300 504 and the other of the source electrode or drain electrode of transistor 3300. and an opening that passes through the conductor 516a, which is an insulator, and reaches the conductor 474c. The insulator 492 corresponds to the insulator 166 in the above embodiment, and therefore, the details thereof will be the same as those of the insulator 16. The description in 6 can be taken into consideration.

[0498] The insulator 493 is connected to one of the source and drain electrodes of the transistor 3300. An opening through conductor 516b, which is the transistor 330, to conductor 474b. 516a, which is the other of the source electrode or drain electrode of 0, and the insulator 511. An opening reaching the overlying conductor 514 and the conductor that is the gate electrode of transistor 3300 504 and the other of the source electrode or drain electrode of transistor 3300. and an opening through the conductor 516a, which is the opening, to the conductor 474c. The openings are provided with conductors 496a, 496b, 496c, and 496d. However, each opening is filled with a transistor 3300 or the like. This may be through an opening in any of the components.

[0499] In addition, the insulator 494 has an opening that reaches the conductor 496a and an opening that reaches the conductor 496b. The openings each have a mouth and an opening that reaches the conductor 496c. The conductive body 498a, the conductive body 498b, or the conductive body 498c is embedded therein.

[0500] Insulator 464, Insulator 466, Insulator 468, Insulator 489, Insulator 493 or Insulator At least one of the bodies 494 is made of an insulator that has the function of blocking impurities such as hydrogen and oxygen. It is preferable to have impurities such as hydrogen and oxygen near the transistor 3300. By disposing an insulator with a blocking function, the electrical The characteristics can be stabilized.

[0501] The source or drain of transistor 3200 is connected to conductor 480b and conductor 478b. , the conductor 476a, the conductor 474b, and the conductor 496c. The conductive material 516b is electrically connected to the source electrode or the drain electrode of the semiconductor device 300. The conductor 454, which is the gate electrode of the transistor 3200, is connected to the conductor 480c. via the conductor 478c, the conductor 476b, the conductor 474c, and the conductor 496d The conductor 516a, which is the other of the source electrode and the drain electrode of the transistor 3300, and Connect emotionally.

[0502] The capacitor 3400 is connected to the other of the source electrode and the drain electrode of the transistor 3300. The insulating film 51 includes a conductor 516a, a conductor 514, and an insulator 511. 1 is formed through the same process as the insulator that functions as the gate insulator of the transistor 3300. This can be preferable in some cases because it can increase productivity. The conductor 504 that functions as the gate electrode of the transistor 3300 is formed in the same process. In some cases, using a layer formed on the substrate can be preferable because it can increase productivity.

[0503] For other structures, please refer to the descriptions in Figure 35 etc. as appropriate.

[0504] The semiconductor device shown in FIG. 40 is the same as the transistor 3200 of the semiconductor device shown in FIG. Therefore, the semiconductor device shown in FIG. 40 is different from that shown in FIG. Specifically, the semiconductor device shown in FIG. The figure shows the case where the transistor 3200 is a fin type. For details, refer to the description of the transistor 2200 shown in FIG. The transistor 2200 is a p-channel transistor. The transistor 3200 may be an n-channel transistor.

[0505] 41 is a circuit diagram of the semiconductor device shown in FIG. 39. Therefore, the semiconductor device shown in FIG. 41 is different from that shown in FIG. Specifically, the semiconductor device shown in FIG. 3200 is provided on a semiconductor substrate 450 which is an SOI substrate. The transistor 3200 provided on the semiconductor substrate 450 is shown in FIG. Please refer to the description of the transistor 2200. Note that in FIG. Although the case where the transistor 3200 is a p-channel transistor has been described, A channel transistor may also be used.

[0506] <Storage device 2> The semiconductor device shown in FIG. 38B is different from the semiconductor device shown in FIG. 38A in that it does not include the transistor 3200. This is different from the semiconductor device shown in FIG. This allows information to be written and retained.

[0507] How to read data from the semiconductor device shown in FIG. When the capacitor 3300 is brought into a conductive state, the third wiring 3003 and the capacitor element 340, which are in a floating state, 0 is electrically connected, and charge is redistributed between the third wiring 3003 and the capacitor 3400. As a result, the potential of the third wiring 3003 changes. The amount of change in the potential of the third wiring 3003 is The potential of one of the electrodes of the capacitor 3400 (or the charge stored in the capacitor 3400) and take different values.

[0508] For example, the potential of one electrode of the capacitor 3400 is V, the capacitance of the capacitor 3400 is C, and the The capacitance component of the third wiring 3003 is CB, and the capacitance of the third wiring 3003 before the charge is redistributed is If the potential of the third wiring 3003 after the charge is redistributed is VB0, the potential of the third wiring 3003 after the charge is redistributed is (CB ×VB0+C×V) / (CB+C). Therefore, the state of the memory cell is The potential of one of the electrodes of the element 3400 takes two states: V1 and V0 (V1>V0). and the potential of the third wiring 3003 when the potential V1 is maintained (=(CB×VB0+C× V1) / (CB+C)) is the potential of the third wiring 3003 when the potential V0 is maintained. =(CB×VB0+C×V0) / (CB+C)).

[0509] Then, the potential of the third wiring 3003 is compared with a predetermined potential, thereby reading out information. This can be done.

[0510] In this case, the first semiconductor is applied to a driving circuit for driving the memory cell. A transistor in which a second semiconductor is applied as the transistor 3300. may be stacked on the drive circuit.

[0511] The semiconductor device described above includes a transistor using an oxide semiconductor and having low off-state current. By using this function, it is possible to retain the memory contents for a long period of time. This eliminates the need for refresh operations or makes it possible to reduce the frequency of refresh operations to an extremely low level. Therefore, a semiconductor device with low power consumption can be realized. Even if the potential is fixed, it is possible to store it for a long period of time. The content can be preserved.

[0512] Furthermore, since the semiconductor device does not require a high voltage to write information, deterioration of the elements does not occur. For example, unlike conventional non-volatile memory, the flow of electrons to the floating gate Since there is no injection or extraction of electrons from the floating gate, there is no degradation of the insulator. That is, the semiconductor device according to one embodiment of the present invention does not have the same problem as the conventional nonvolatile memory. There is no limit to the number of times that data can be rewritten, which is a problem in the past, and reliability has improved dramatically. Furthermore, information is written depending on whether the transistor is conductive or non-conductive. This allows for high-speed operation.

[0513] <Storage device 3> Regarding a modification of the semiconductor device (memory device) shown in FIG. 38(A), the circuit diagram shown in FIG. This will be used to explain.

[0514] The semiconductor device shown in FIG. 42 includes transistors 4100 to 4400 and capacitors The transistor 4100 includes an element 4500 and a capacitor 4600. A transistor similar to the transistor 3200 can be used, and the transistor 420 0 to 4400 can be transistors similar to the transistor 3300 described above. Although not shown in FIG. 42, the semiconductor device shown in FIG. The semiconductor device shown in FIG. 5 to 4009, the writing and reading of the data voltage is controlled according to the signal or potential applied to It is possible.

[0515] One of the source and the drain of the transistor 4100 is connected to a wiring 4003. The other of the source and drain of the transistor 4100 is connected to a wiring 4001. In FIG. 42, the conductivity type of the transistor 4100 is shown as a p-channel type, but it is an n-channel type. Good too.

[0516] The semiconductor device shown in FIG. 42 has two data holding units. For example, the first data holding unit is one of the source and drain of the transistor 4400 connected to the node FG1, Between one electrode of the element 4600 and one of the source and drain of the transistor 4200 The second data storage unit stores the charge in the transistor connected to node FG2. the gate of the transistor 4100, the other of the source or drain of the transistor 4200, A charge is transferred between one of the source or drain of 4300 and one electrode of the capacitor element 4500. Hold.

[0517] The other of the source and the drain of the transistor 4300 is connected to a wiring 4003. The other of the source and drain of the transistor 4400 is connected to a wiring 4001. The gate of the transistor 4400 is connected to the wiring 4005. The gate of the transistor 4300 is connected to a wiring 4007. The other electrode of the capacitor 4600 is connected to the wiring 4008. The other electrode of the element 0 is connected to a wiring 4009.

[0518] The transistors 4200 to 4400 control writing of data voltages and retention of electric charges. The transistors 4200 to 4400 function as switches. In this case, a transistor with a low current (off-state current) that flows between the source and drain is used. As a transistor with a low off-state current, it is preferable to use a transistor having an oxide layer in the channel formation region. Preferably, the transistor is an OS transistor having an oxide semiconductor. The advantage of silicon-based transistors is that they have low off-state current and can be stacked with silicon-based transistors. In FIG. 42, the conductivity types of the transistors 4200 to 4400 are n-channel. However, it may be a p-channel type.

[0519] The transistors 4200, 4300, and 4400 are oxidized. Even if the transistor uses a compound semiconductor, it is preferable to provide it in a separate layer. The semiconductor device shown in FIG. 2 includes a first layer 4 having a transistor 4100 as shown in FIG. 021, and a second layer 4022 having transistors 4200 and 4300. and a third layer 4023 having a transistor 4400. By stacking layers having transistors, the circuit area can be reduced, and The device can be made smaller.

[0520] Next, the operation of writing information into the semiconductor device shown in FIG. 42 will be described.

[0521] First, the data voltage is written to the data storage unit connected to node FG1 (hereinafter referred to as This will be referred to as write operation 1. The data voltage to be written to the connected data storage unit is V D1 and the threshold voltage of the transistor 4100 is Voltage is V th Let's say.

[0522] In write operation 1, the wiring 4003 is connected to V D1 After setting the wiring 4001 to ground potential, , and are electrically floating. Also, the wirings 4005 and 4006 are set to high level. 4007 to 4009 are set to a low level. Then, the node FG The potential of the wiring 4 rises, and a current flows through the transistor 4100. The potential of 001 rises. Also, the transistor 4400 and the transistor 4200 are in a conducting state. Therefore, as the potential of the wiring 4001 increases, the potentials of the nodes FG1 and FG2 The potential of the node FG2 rises, and the potential between the gate and source of the transistor 4100 rises. Voltage (V gs ) is the threshold voltage V of the transistor 4100 th Then, transistor 41 Therefore, the potential of the wiring 4001 and the nodes FG1 and FG2 The rise of V stopped. D1 From V th The V dropped by D1 -V th " and becomes constant.

[0523] In other words, the V given to wire 4003 D1 is generated by the current flowing through transistor 4100. The potential is applied to the wiring 4001, and the potentials of the nodes FG1 and FG2 increase. The potential of node FG2 becomes "V D1 -V th " Then, the V of the transistor 4100 gs V th Therefore, the current stops.

[0524] Next, a data voltage write operation (hereinafter, This will be called write operation 2. The data voltage written to the memory is V D2 It will be explained as follows.

[0525] In write operation 2, wire 4001 is connected to V D2 After setting the wiring 4003 to ground potential, , and are electrically floating. The wiring 4007 is set to a high level. 4006, 4008, and 4009 are set to low level. Transistor 4300 is set to the conductive state. Therefore, the potential of the node FG2 is also set to low level. The voltage of the wiring 4003 decreases, and a current flows through the transistor 4100. The potential rises. In addition, the transistor 4300 is turned on. As the potential at node FG2 rises, the potential at node FG3 rises. V at transistor 4100 gs is the V of the transistor 4100 th When the transistor Therefore, the current flowing through the wiring 4003 and the node FG2 is increased. The rise stops, V D2 From V th The V dropped by D2 -V th " and becomes constant.

[0526] In other words, the V given to wire 4001 D2 is generated by the current flowing through transistor 4100. is applied to the wiring 4003, and the potential of the node FG2 increases. The potential of FG2 is "V D2 -V th " Then, the V of the transistor 4100 gs V th At this time, the potential of the node FG1 is 4400 are in a non-conducting state, and the "V D1 -V th " is held will be done.

[0527] In the semiconductor device shown in FIG. 42, after writing data voltages to a plurality of data holding units, The line 4009 is set to a high level, and the potentials of the nodes FG1 and FG2 are raised. The transistor is turned off, preventing the transfer of charge and maintaining the written data voltage. do.

[0528] By the above-described operation of writing data voltages to the nodes FG1 and FG2, multiple data The data voltage can be held in the data holding section. D1 -V th " and "V D2 -V th " was used as an example, but these are multi-valued data. Therefore, each data storage unit stores 4 bits of data. When holding data, 16 values ​​of "V D1 -V th " and "V D2 -V th " can be taken.

[0529] Next, the operation of reading information from the semiconductor device shown in FIG. 42 will be described.

[0530] First, the data voltage is read from the data storage unit connected to node FG2 (hereinafter referred to as (This is called read operation 1.) will now be described.

[0531] In the read operation 1, the wiring 400 is precharged and then brought into an electrically floating state. 3 is discharged. The wirings 4005 to 4008 are set to a low level. The wiring 4009 is set to a low level. The potential of the electrically floating node FG2 is set to low level. D2 -V th "and When the potential of the node FG2 decreases, a current flows through the transistor 4100. The flow of current reduces the potential of the wiring 4003, which is in an electrically floating state. As the voltage drops, the V gs becomes smaller. Transistor 4100 V gs is the V of the transistor 4100 th When this happens, the current flowing through transistor 4100 That is, the potential of the wiring 4003 becomes smaller than the potential of the node FG2, D2 -V th " to V th The value "V D2 The potential of this wiring 4003 is This corresponds to the data voltage of the data storage section connected to FG2. The data voltage undergoes A / D conversion and the data is acquired from the data storage section connected to node FG2. do.

[0532] That is, the wiring 4003 after precharging is in a floating state, and the potential of the wiring 4009 is set to a high level. Switching from high to low allows current to flow through transistor 4100. As a result, the potential of the floating wiring 4003 drops to "V D2 " Tiger In Transistor 4100, the "V D2 -V th "V between gs V th Tona The current stops. Then, the wiring 4003 is connected to the "V D 2" is read out.

[0533] After acquiring the data from the data storage section connected to node FG2, transistor 4300 is in a conducting state, and "V D2 -V th " is discharged.

[0534] Next, the charge held at node FG1 is distributed to node FG2, and the charge held at node FG1 is transferred to node FG3. The data voltage of the data storage unit connected to node FG1 is transferred to the data storage unit connected to node FG2. Then, the wirings 4001 and 4003 are set to low level, and the wiring 4006 is set to high level. In addition, the wiring 4005 and the wirings 4007 to 4009 are set to low level. When node FG1 is in a conductive state, the charge of node FG1 is shared with node FG2.

[0535] Here, the potential after the charge distribution is the written potential "V D1 -V th " will decrease from Therefore, the capacitance value of the capacitor 4600 is set to be larger than the capacitance value of the capacitor 4500. Alternatively, the potential "V D1 -V th " is the same design The potential "V D2 -V th It is preferable to make the capacitance larger than . By changing the ratio of the values ​​and increasing the potential to be written in advance, the potential after the charge distribution The change in potential due to the distribution of charge will be described later.

[0536] Next, the data voltage is read from the data storage unit connected to the node FG1 (hereinafter, This will be referred to as read operation 2.

[0537] In the read operation 2, the wiring 400 is precharged and then brought into an electrically floating state. 3 is discharged. The wirings 4005 to 4008 are set to a low level. The wiring 4009 is The line 4009 is set to a high level during precharge and then set to a low level. By using this as a bell, the electrically floating node FG2 is set to the potential "V D1 -V th " When the potential of the node FG2 decreases, a current flows through the transistor 4100. The flow of current reduces the potential of the electrically floating wiring 4003. As V decreases, the V of transistor 4100 gs becomes smaller. V gs is the V of the transistor 4100 th When the current through transistor 4100 becomes That is, the potential of the wiring 4003 becomes smaller than the potential of the node FG2 “V D1 -V th " From V th The value "V D1 The potential of the wiring 4003 is The data voltage of the data storage section connected to G1 corresponds to the data of the analog value that is read out. The voltage of the capacitor undergoes A / D conversion and acquires data from the data storage section connected to node FG1. This completes the read operation of the data voltage to the data storage unit connected to node FG1. .

[0538] That is, the wiring 4003 after precharging is in a floating state, and the potential of the wiring 4009 is set to a high level. Switching from high to low allows current to flow through transistor 4100. As a result, the potential of the floating wiring 4003 drops to "V D1 " Tiger In Transistor 4100, the "V D1 -V th "V between gs V th Tona The current stops. Then, the wiring 4003 is connected to the "V D "1" is read out.

[0539] By the above-described operation of reading the data voltages from the nodes FG1 and FG2, a plurality of The data voltage can be read from the data storage unit. For example, the node FG1 and the node FG2 stores 4 bits (16 values) of data, for a total of 8 bits (256 values) In FIG. 42, the first layer 4021 to the third layer 4022 can store data. However, by forming further layers, the surface of the semiconductor device can be It is possible to increase the storage capacity without increasing the product.

[0540] The potential that is read out is V th It is read as a voltage larger than Therefore, the "V D1 -V th " and "V D2 -V th "V th As a result, the memory cell This improves the storage capacity per unit and makes the read data closer to the correct data. Therefore, the reliability of the data can be improved.

[0541] 43 shows a cross-sectional view of the semiconductor device corresponding to FIG. 42. The semiconductor device shown in FIG. The transistors 4100 to 4400, the capacitor 4500, and the capacitor 4600, where the transistor 4100 is formed in the first layer 4021, The transistors 4200 and 4300 and the capacitor 4500 are formed in the second layer 4022. The transistor 4400 and the capacitor 4600 are formed in the third layer 4023 .

[0542] Here, the transistors 4200 to 4400 are the transistor 3300. The description of the transistor 3200 can be referred to for the transistor 4100. In addition, the description in Figure 39 can be taken into consideration as appropriate for other wiring, insulators, etc.

[0543] In the capacitor element 3400 of the semiconductor device shown in FIG. 39, the conductive layer is set parallel to the substrate. The capacitor elements 4500 and 4600 have a trench-shaped conductive layer. By using this structure, the same occupied area can be Even if the capacitance is a product, a large capacitance value can be ensured.

[0544] <Imaging device> An imaging device according to one aspect of the present invention will be described below.

[0545] 44(A) is a plan view showing an example of an imaging device 200 according to one aspect of the present invention. The device 200 includes a pixel section 210, a peripheral circuit 260 for driving the pixel section 210, and a peripheral The pixel section 210 has a pixel circuit 270, a peripheral circuit 280, and a peripheral circuit 290. It has a plurality of pixels 211 arranged in a matrix of columns (p and q are integers of 2 or more). The peripheral circuits 260, 270, 280, and 290 are respectively The pixel 211 is connected to the plurality of pixels 211 and has a function of supplying signals for driving the plurality of pixels 211. In this specification and the like, the peripheral circuits 260, 270, 280, and The peripheral circuit 290 and the like may be referred to as the "peripheral circuit" or the "drive circuit." For example, peripheral circuit 260 can be considered a part of the peripheral circuit.

[0546] The imaging device 200 preferably includes a light source 291. The light source 291 emits detection light. It can emit P1.

[0547] The peripheral circuits include at least a logic circuit, a switch, a buffer, an amplifier, or a converter. The peripheral circuits may be formed on the substrate on which the pixel section 210 is formed. Also, semiconductor devices such as IC chips may be used for part or all of the peripheral circuits. The peripheral circuits are peripheral circuits 260, 270, 280, and 29. One or more of the 0s may be omitted.

[0548] Also, as shown in FIG. 44(B), in the pixel section 210 of the imaging device 200, The pixels 211 may be arranged at an angle. By arranging the pixels 211 at an angle, the pixel This allows the pixel interval (pitch) in the column direction to be shortened. This can further improve the quality of imaging in the imaging device.

[0549] <Pixel configuration example 1> One pixel 211 included in the imaging device 200 is composed of a plurality of sub-pixels 212, and each The sub-pixel 212 is combined with a filter (color filter) that transmits light of a specific wavelength band. By doing so, it is possible to obtain information for realizing a color image display.

[0550] FIG. 45(A) is a plan view showing an example of a pixel 211 for acquiring a color image. The pixel 211 shown in FIG. 45(A) has a color filter that transmits light in the red (R) wavelength band. The subpixel 212 (hereinafter also referred to as "subpixel 212R") provided with the A sub-pixel 212 (hereinafter referred to as "sub-pixel 212G") is provided with a color filter that transmits the band. Subpixel 2 is provided with a color filter that transmits light in the wavelength bands of blue (B) and red (C). The subpixel 212 has a photo sensor and a It can be made to function as such.

[0551] The subpixels 212 (subpixels 212R, 212G, and 212B) are connected to the wiring 2 31, and are electrically connected to wiring 247, wiring 248, wiring 249, and wiring 250. The subpixels 212R, 212G, and 212B are each connected to an independent wiring 2 53. In this specification, for example, the pixel connected to the n-th row pixel 211 is The wiring 248 and the wiring 249 are respectively referred to as wiring 248[n] and wiring 249[n]. For example, the wiring 253 connected to the pixel 211 in the m-th column is referred to as wiring 253[m In FIG. 45A, the sub-pixel 212 of the pixel 211 in the m-th column is written as The wiring 253 connected to R is the wiring 253[m]R, and the wiring 253 connected to the subpixel 212G is the wiring 253[m]R. The wiring 253[m]G and the wiring 253 connected to the subpixel 212B are referred to as wiring 253[m]B. The subpixel 212 is electrically connected to the peripheral circuit via the wiring.

[0552] In addition, the imaging device 200 detects color components of adjacent pixels 211 that transmit light in the same wavelength band. The sub-pixels 212 provided with the filters are electrically connected to each other via switches. In Figure 45(B), there are n rows (n is an integer between 1 and p) and m columns (m is an integer between 1 and q). and a sub-pixel 212 of a pixel 211 arranged in the (n+1)th row and the (m)th column adjacent to the pixel 211. 45B shows an example of connection of the sub-pixels 212 included in the pixel 211 arranged in the The sub-pixel 212R arranged in the nth row and the mth column and the sub-pixel 212R arranged in the n+1th row and the mth column are The sub-pixels 212G are connected via a switch 201. The sub-pixels 212G are arranged in n rows and m columns. The sub-pixels 212G arranged in the n+1th row and the mth column are connected via the switches 202. In addition, the sub-pixel 212B arranged in the nth row and the mth column and the sub-pixel 212B arranged in the n+1th row and the mth column are connected via a switch 203.

[0553] The color filters used for the subpixel 212 are limited to red (R), green (G), and blue (B). color filters that transmit cyan (C), yellow (Y) and magenta (M) light, respectively. A sub-pixel for detecting light of three different wavelength bands may be used in one pixel 211. By providing the element 212, a full color image can be obtained.

[0554] Alternatively, color filters that transmit red (R), green (G), and blue (B) light are used. In addition to the sub-pixel 212, a color filter that transmits yellow (Y) light is provided. Alternatively, a pixel 211 having sub-pixels 212 may be used. The sub-pixel 212 is provided with a color filter that transmits light of blue (Y) and magenta (M). In addition, a pixel 212 having a sub-pixel 212 provided with a color filter that transmits blue (B) light is 11 may be used. One pixel 211 may have four sub-pixels that detect light in different wavelength bands. By providing 212, the color reproducibility of the acquired image can be further improved.

[0555] Also, for example, in FIG. 45(A), the sub-pixel 212 for detecting the red wavelength band and the sub-pixel 213 for detecting the green wavelength band are The ratio of the number of sub-pixels 212 that detect the long wavelength band and the number of sub-pixels 212 that detect the blue wavelength band (or light receiving area ratio) does not have to be 1:1:1. For example, The ratio of red to green to blue may be set to 1:2:1. Alternatively, the ratio of the number of pixels ( The light receiving area ratio may be red:green:blue=1:6:1.

[0556] The number of sub-pixels 212 provided in the pixel 211 may be one, but it is preferable that the number is two or more. For example, by providing two or more sub-pixels 212 that detect the same wavelength band, redundancy can be increased and imaging can be performed more efficiently. The reliability of the device 200 can be improved.

[0557] In addition, IR (Infrared) filters absorb or reflect visible light and transmit infrared light. ) filter, an imaging device 200 that detects infrared light can be realized.

[0558] In addition, ND (Neutral Density) filters (light-reducing filters) are used. This prevents output saturation that occurs when a large amount of light is incident on the photoelectric conversion element (light receiving element). By combining ND filters with different light reduction levels, The dynamic range of the device can be increased.

[0559] In addition to the above-mentioned filter, a lens may be provided in the pixel 211. An example of the arrangement of the pixel 211, the filter 254, and the lens 255 will be described using the cross-sectional view of the pixel 211. By providing the lens 255, the photoelectric conversion element can efficiently receive incident light. Specifically, as shown in FIG. 46(A), a lens 255 and a filter 256 are formed in the pixel 211. 54 (filter 254R, filter 254G and filter 254B), and pixel circuit A structure can be adopted in which light 256 is incident on the photoelectric conversion element 220 through 230 or the like.

[0560] However, as shown in the area surrounded by the dashed line, part of the light 256 indicated by the arrow is connected to the wiring 257. Therefore, as shown in Figure 46(B), the light is blocked by a part of the A lens 255 and a filter 254 are arranged on the photoelectric conversion element 220 side. A structure in which the light 256 is efficiently received by the photoelectric conversion element 220 is preferable. By making the light incident on the photoelectric conversion element 220, an imaging device 200 with high detection sensitivity can be provided. This can be done.

[0561] As the photoelectric conversion element 220 shown in FIG. 46, a pn-type junction or a pin-type junction is formed. Alternatively, a photoelectric conversion element may be used...

Claims

[Claim 1] a first insulator formed on a substrate; a first oxide insulator formed on the first insulator; an oxide semiconductor formed in contact with at least a portion of an upper surface of the first oxide insulator; a second oxide insulator formed in contact with at least a portion of the top surface of the oxide semiconductor; a third oxide insulator formed in contact with at least a portion of an upper surface of the second oxide insulator; a second insulator formed on the third oxide insulator; a first conductor formed on the second insulator; a third insulator formed on the first conductor; an energy level of the conduction band minimum of the first oxide insulator is closer to a vacuum level than an energy level of the conduction band minimum of the oxide semiconductor; the energy level of the conduction band minimum of the second oxide insulator is closer to the vacuum level than the energy level of the conduction band minimum of the oxide semiconductor; the energy level of the conduction band minimum of the third oxide insulator is closer to the vacuum level than the energy level of the conduction band minimum of the second oxide insulator; the first insulator includes oxygen; The first insulator has a desorption amount of oxygen molecules of 1.0×10 in thermal desorption gas analysis. １４ molecules / cm ２ Above 1.0 x 10 １６ molecules / cm ２ A semiconductor device characterized by:

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