Light-emitting device

Abstract

To provide a light-emitting device capable of improving luminance in a front direction.SOLUTION: A light-emitting device comprises: a semiconductor structure including a p-side semiconductor layer and an n-side semiconductor layer including an active layer, a first layer having a first face and a second layer disposed in a part of the first face, the n-side semiconductor layer having a first region in which the second layer is not disposed and a second region in which the second layer is disposed in a planar view in the semiconductor structure; and an n-side electrode which is electrically connected with the n-side semiconductor layer. The second layer is disposed in an outer peripheral region of the semiconductor structure in the planar view. The semiconductor structure includes a through hole which is disposed continuously to the p-side semiconductor layer, the active layer and the first layer in the second region, and the n-side electrode is disposed on the side of the second face which is positioned on an opposite side of the active layer in the p-side semiconductor layer and electrically connected with the second layer in the through hole.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to light-emitting devices. [Background technology]

[0002] For example, Patent Document 1 proposes a red-emitting light-emitting element made of an AlGaInP-based semiconductor material, which has an n-side electrode and a p-side electrode on one surface and extracts light from the surface opposite to the surface on which the electrodes are arranged. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2018-64006 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present disclosure is to provide a light-emitting element that can improve brightness in the front direction. [Means for solving the problem]

[0005] According to one aspect of the present disclosure, a light-emitting element is a semiconductor structure having a p-side semiconductor layer, an active layer disposed on the p-side semiconductor layer, an n-side semiconductor layer including a first layer disposed on the active layer and having a first surface located opposite the active layer, and a second layer disposed on a part of the first surface, wherein the n-side semiconductor layer has, in a planar view, a first region where the second layer is not disposed and a second region where the second layer is disposed, and an n-side electrode electrically connected to the n-side semiconductor layer, wherein a peak wavelength of light emitted by the active layer is not less than 620 nm and not more than 700 nm, and the band gap energy of the second layer is smaller than the band gap energy of the first layer, and the second layer is disposed in a peripheral region of the semiconductor structure in a planar view, and the semiconductor structure has a through hole continuously disposed through the p-side semiconductor layer, the active layer, and the first layer in the second region, and the n-side electrode is disposed on a second surface side of the p-side semiconductor layer located opposite the active layer, and is electrically connected to the second layer via the through hole. [Effects of the Invention]

[0006] According to the present disclosure, it is possible to provide a light-emitting element that can improve brightness in the front direction. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a schematic plan view of a light-emitting element according to a first embodiment. [Figure 2] FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. [Figure 3] FIG. 10 is a schematic plan view of a light-emitting element according to a second embodiment. [Figure 4] FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. [Figure 5] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 6] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 7]3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 8] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 9] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 10] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 11] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 12] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 13] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 14] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 15] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 16] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 17] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. [Figure 18] 3 is a schematic cross-sectional view illustrating one step of the method for manufacturing the light-emitting element according to the first embodiment. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, light-emitting devices according to embodiments will be described with reference to the drawings. The dimensions, materials, shapes, relative arrangements, and the like of components described in the embodiments are not intended to be limiting unless otherwise specified, and are merely illustrative examples. The sizes and positional relationships of components shown in the drawings may be exaggerated for clarity. In the following description, the same names and symbols indicate identical or similar components, and detailed descriptions will be omitted as appropriate. In addition, cross-sectional views may be shown as end views showing only the cut surface.

[0009] In the following description, terms indicating specific directions or positions (for example, "upper," "lower," and other terms including these terms) may be used. However, these terms are used merely to facilitate understanding of relative directions or positions in the referenced drawings. As long as the relationship of relative directions or positions indicated by terms such as "upper," "lower," etc. in the referenced drawings is the same, drawings other than those of the present disclosure, actual products, etc. may not be arranged in the same manner as in the referenced drawings.

[0010] In the drawings shown below, directions may be indicated by the mutually orthogonal X-axis, Y-axis, and Z-axis. For example, in this specification, the direction along the Z-axis is referred to as the first direction Z, the direction along the X-axis is referred to as the second direction X, and the direction along the Y-axis is referred to as the third direction Y. Furthermore, the positive direction of the Z-axis is referred to as a relatively upward direction, and the negative direction is referred to as a relatively downward direction. Furthermore, in this specification, the front direction of the light-emitting element refers to the positive direction of the Z-axis.

[0011] [Light-emitting device according to the first embodiment] A light-emitting element 1 according to a first embodiment will be described with reference to FIGS.

[0012] The light-emitting element 1 according to the first embodiment includes a semiconductor structure 100 and an n-side electrode 41. In cross-sectional views such as Fig. 2, the semiconductor structure 100 is not hatched to make it easier to see the boundaries between layers in the semiconductor structure 100. In plan views such as Fig. 1, the second layer 12 in the n-side semiconductor layer 10 is represented by a dot pattern to make it easier to see.

[0013] <Semiconductor structure> The semiconductor structure 100 has a p-side semiconductor layer 30, an active layer 20 disposed on the p-side semiconductor layer 30, and an n-side semiconductor layer 10 disposed on the active layer 20. The semiconductor structure 100 has a square shape in a plan view. The length of one side of the semiconductor structure 100 is, for example, 200 μm or more and 3000 μm or less. The thickness of the semiconductor structure 100 is, for example, 2 μm or more and 10 μm or less.

[0014] The active layer 20 is located between the p-side semiconductor layer 30 and the n-side semiconductor layer 10 in the first direction Z. The active layer 20 is a light-emitting layer that emits light, and the peak wavelength of the light emitted by the active layer 20 is 620 nm or more and 700 nm or less. The active layer 20 is made of, for example, Al x Ga y In 1-x-y P(x≧0, y≧0, x+y≦1). The active layer 20 may have, for example, a multiple quantum well (MQW) structure including multiple well layers and multiple barrier layers. The well layers include, for example, GaInP. The barrier layers include, for example, AlGaInP.

[0015] The p-side semiconductor layer 30 includes a semiconductor layer containing p-type impurities. The p-side semiconductor layer 30 includes a third layer 33 and a fourth layer 34. The fourth layer 34 is located between the third layer 33 and the active layer 20 in the first direction Z. The active layer 20 is disposed on the fourth layer 34. The third layer 33 includes, for example, GaP. The fourth layer 34 includes, for example, AlGaInP or AlInP. The p-side semiconductor layer 30 has a second surface 30S2 located on the opposite side of the active layer 20 in the first direction Z. For example, the surface of the third layer 33 located on the opposite side of the fourth layer 34 is the second surface 30S2.

[0016] The n-side semiconductor layer 10 includes a semiconductor layer containing n-type impurities. The n-side semiconductor layer 10 includes a first layer 11 and a second layer 12. The first layer 11 is disposed on the active layer 20 and has a first surface 11S1 located on the opposite side of the active layer 20 in the first direction Z. The second layer 12 is disposed on a part of the first surface 11S1 of the first layer 11. The first layer 11 functions as a semiconductor layer that promotes recombination of electrons and holes in the active layer 20. The second layer 12 functions as a semiconductor layer that reduces the contact resistance between the n-side electrode 41 and the n-side semiconductor layer 10.

[0017] As shown in FIG. 1 , the light-emitting element 1 has two sides extending in the second direction X and two sides extending in the third direction Y in a plan view, and the shape of the light-emitting element 1 in a plan view is square or rectangular. In this specification, "plan view" means that the light-emitting element is observed from the first surface 11S1 side. In a plan view, the second layer 12 is disposed in a peripheral region 100B of the semiconductor structure 100. In a plan view, the peripheral region 100B of the semiconductor structure 100 represents a range within 50 μm from an outer edge 100A of the semiconductor structure 100. The outer edge 100A of the semiconductor structure 100 extends in the second direction X and the third direction Y.

[0018] The bandgap energy of the second layer 12 is smaller than the bandgap energy of the first layer 11. In other words, the absorption rate of the second layer 12 for light emitted from the active layer 20 is higher than the absorption rate of the first layer 11 for light emitted from the active layer 20. For example, the first layer 11 contains AlGaInP, and the second layer 12 contains GaAs.

[0019] The n-side semiconductor layer 10 has, in plan view, a first region 10A1 where the second layer 12 is not disposed and a second region 10A2 where the second layer 12 is disposed. The second region 10A2 is included in the outer peripheral region 100B of the semiconductor structure 100. The area of the active layer 20 in the first region 10A1 is larger than the area of the active layer 20 in the second region 10A2, and the first region 10A1 serves as the main light-emitting region of the semiconductor structure 100. The first surface 11S1 of the first layer 11 of the first region 10A1 is exposed from the second layer 12 and serves as the main light extraction surface of the semiconductor structure 100 from which light from the active layer 20 is extracted.

[0020] The thickness of the second layer 12 is thinner than the thickness of the first layer 11 in the second region 10A2. Thereby, light absorption by the second layer 12 can be reduced. In this specification, the thickness of each layer represents the maximum thickness in the first direction Z. The thickness of the second layer 12 is, for example, 0.1 μm or more and 0.3 μm or less. The thickness of the first layer 11 in the second region 10A2 is, for example, 1 μm or more and 4 μm or less.

[0021] As shown in FIG. 2, the semiconductor structure 100 has a through hole H continuously disposed with the p-side semiconductor layer 30, the active layer 20, and the first layer 11 in the second region 10A2. The through hole H extends in the first direction Z through the p-side semiconductor layer 30, the active layer 20, and the first layer 11 in the second region 10A2 from the second surface 30S2 and reaches the second layer 12. The through hole H is located below the second layer 12. The through hole H is located within a range overlapping the second layer 12 disposed in the second region 10A2 in plan view. The maximum width of the through hole H in the second direction X is smaller than the maximum width of the second layer 12 in the second direction X, and the maximum width of the through hole H in the third direction Y is smaller than the maximum width of the second layer 12 in the third direction Y. By setting the width of the through hole H in this manner, a decrease in luminance due to a reduction in the area of the active layer 20 can be reduced. The maximum width of the through hole H in plan view is, for example, 10 μm or more and 30 μm or less. The maximum width of the second layer 12 in plan view is, for example, 20 μm or more and 40 μm or less.

[0022] <n-side electrode> The n-side electrode 41 is disposed on the second surface 30S2 side of the p-side semiconductor layer 30 and is electrically connected to the second layer 12 of the n-side semiconductor layer 10 via the through hole H. The n-side electrode 41 is electrically connected to the n-side semiconductor layer 10 via the second layer 12. The n-side electrode 41 extends in the first direction Z from the portion disposed on the second surface 30S2 side through the through hole H, and the upper end of the n-side electrode 41 contacts the lower surface of the second layer 12. The n-side electrode 41 is preferably made of a metal having high reflectivity with respect to light emitted from the active layer 20. For example, the n-side electrode 41 is preferably made of a metal having a reflectivity of 60% or more, preferably 70% or more, with respect to the peak wavelength of light emitted from the active layer 20. Examples of materials that can be used for the n-side electrode 41 include metals such as Au, Ge, Ni, Ti, Pt, and Ag.

[0023] From the viewpoint of reducing light absorption by the n-side semiconductor layer 10, it is conceivable to form the n-side semiconductor layer 10 from only the first layer 11, which has a larger bandgap energy than the second layer 12. However, the contact resistance between a semiconductor material with a larger bandgap energy and the metal constituting the n-side electrode 41 is likely to be high. For this reason, according to this embodiment, the n-side electrode 41 is in contact with the second layer 12, which has a smaller bandgap energy than the first layer 11. This makes it possible to make the contact resistance between the n-side electrode 41 and the second layer 12 lower than the contact resistance between the n-side electrode 41 and the first layer 11, thereby reducing the forward voltage Vf of the light-emitting element 1.

[0024] On the other hand, the area of ​​the second region 10A2, in which the second layer 12 having a higher absorption rate than the first layer 11 is disposed, is smaller than the area of ​​the first region 10A1, in which the second layer 12 is not disposed. This allows the light emitting element 1 to have reduced light absorption while reducing the forward voltage Vf.

[0025] Furthermore, according to this embodiment, light traveling from the active layer 20 toward the side surface of the semiconductor structure 100 and light reflected by the first surface 11S1 or the second surface 30S2 toward the side surface of the semiconductor structure 100 can be reflected by the n-side electrode 41 extending in the first direction Z within the through hole H and directed toward the first surface 11S1 side of the first region 10A1. This reduces the light emitted from the side surface of the semiconductor structure 100, thereby improving the brightness in the front direction.

[0026] Furthermore, light directed toward the second face 30S2 side of the p-side semiconductor layer 30 can be reflected upward by the n-side electrode 41 arranged on the second face 30S2 side, thereby improving brightness in the front direction.

[0027] 1, the first region 10A1 is surrounded by the second region 10A2 in a planar view. In other words, the first region 10A1 is surrounded by the second layer 12 disposed in the second region 10A2 and the n-side electrode 41 located in the through-hole H below the second layer 12 in a planar view. With this configuration, the portion where the n-side electrode 41 and the second layer 12 are electrically connected surrounds the main light-emitting region of the semiconductor structure 100 in a planar view, thereby reducing bias in the current density distribution in the main light-emitting region and reducing variations in the luminance distribution in the front direction.

[0028] 1, the second layer 12 continuously surrounds the first region 10A1 in plan view. In accordance with the arrangement of the second layer 12, the through-hole H and the n-side electrode 41 located within the through-hole H continuously surround the first region 10A1 in plan view. This makes it easier to improve luminance in the front direction and reduce variations in luminance distribution in the front direction, compared to a case where the n-side electrode 41 located within the through-hole H is discontinuous and surrounds the first region 10A1 in plan view.

[0029] According to this embodiment, as shown in FIG. 2, the first surface 11S1 of the first layer 11 in the first region 10A1, which is the main light extraction surface, has a plurality of convex portions 11C. Thereby, the light extraction efficiency from the first surface 11S1 can be improved. The arithmetic mean roughness of the first surface 11S1 can be, for example, 0.01 μm or more and 0.5 μm or less.

[0030] <n-side pad electrode> According to this embodiment, the light-emitting element 1 can further include an n-side pad electrode 42. As shown in FIG. 1, the n-side pad electrode 42 is disposed outside the semiconductor structure 100 in a plan view. As shown in FIG. 2, the n-side electrode 41 extends from inside the through-hole H to the outside of the semiconductor structure 100, and the n-side pad electrode 42 is disposed on the n-side electrode 41 outside the semiconductor structure 100 and is electrically connected to the n-side electrode 41. The n-side pad electrode 42 is electrically connected to an external circuit, for example, via a wire such as Au. For the n-side pad electrode 42, Ti, Pt, Au, Rh, Ni, Al, W, Ru, Ge, etc. can be used. The shape of the n-side pad electrode 42 in a plan view is, for example, circular, rectangular, or the like. The size of the n-side pad electrode 42 is, for example, 40 μm or more and 120 μm or less. The size of the n-side pad electrode 42 represents the maximum diameter of the n-side pad electrode 42 in a plan view.

[0031] As shown in FIG. 1, in a plan view, the second region 10A2 is located between the n-side pad electrode 42 and the first region 10A1. With such an arrangement, light traveling from the main light-emitting region toward the n-side pad electrode 42 can be reflected by the n-side electrode 41 in the through-hole H disposed in the second region 10A2. Thereby, light absorption in the n-side pad electrode 42 can be reduced and the luminance in the front direction can be improved.

[0032] According to this embodiment, as shown in FIG. 2, the light-emitting element 1 can further include a substrate 200, a translucent conductive layer 53, a bonding member 60, and a p-side pad electrode 52.

[0033] <substrate> The substrate 200 supports the semiconductor structure 100. Examples of materials that can be used for the substrate 200 include aluminum nitride and silicon. The substrate 200 may be a conductive substrate or an insulating substrate. The thickness of the substrate 200 is, for example, 50 μm to 1000 μm.

[0034] <Transparent conductive layer> The translucent conductive layer 53 is disposed on the second surface 30S2 of the p-side semiconductor layer 30 and is electrically connected to the p-side semiconductor layer 30. The translucent conductive layer 53 is in contact with the second surface 30S2. A current is supplied to the p-side semiconductor layer 30 through the translucent conductive layer 53. The translucent conductive layer 53 is disposed on the second surface 30S2 of the p-side semiconductor layer 30 below the first surface 11S1 of the first layer 11 of the n-side semiconductor layer 10. As shown in FIG. 1 , a plurality of translucent conductive layers 53 spaced apart from each other in the second direction X and the third direction Y are disposed on the second surface 30S2 of the p-side semiconductor layer 30. This can reduce the optical absorption of light emitted from the active layer 20 by the translucent conductive layer 53 compared to when the translucent conductive layer 53 is disposed over substantially the entire surface of the second surface 30S2 of the p-side semiconductor layer 30. The light transmittance of the translucent conductive layer 53 at the peak wavelength of light emitted by the active layer 20 is, for example, 60% or more, and preferably 70% or more. Examples of materials that can be used for the translucent conductive layer 53 include ITO (Indium Tin Oxide) and ZnO (Zinc Oxide).

[0035] The third layer 33, including the second surface 30S2 with which the translucent conductive layer 53 is in contact, functions as a semiconductor layer that reduces the contact resistance between the translucent conductive layer 53 and the p-side semiconductor layer 30. The third layer 33 also functions as a current diffusion layer that diffuses current in a direction parallel to the second surface 30S2. The fourth layer 34, disposed between the third layer 33 and the active layer 20, functions as a semiconductor layer that promotes recombination of electrons and holes in the active layer 20.

[0036] <Jointing materials> The bonding member 60 is disposed on the substrate 200 and is electrically connected to the light-transmitting conductive layer 53. The bonding member 60 bonds the semiconductor structure 100 and the substrate 200 together.

[0037] The joining member 60 can have a laminated structure of a plurality of metal layers. The joining member 60 preferably includes a reflective layer on the side facing the second surface 30S2 of the p-side semiconductor layer 30 in the first direction Z (including the contact surface with the translucent conductive layer 53). The reflective layer includes Au, Ag, or Al having a high reflectance with respect to the light emitted by the active layer 20. Thereby, since the light directed toward the second surface 30S2 side is easily reflected upward by the reflective layer of the joining member 60, the luminance in the front direction can be improved.

[0038] A part of the joining member 60 may be arranged to extend in the first direction Z within the through-hole H. Thereby, the light directed toward the through-hole H can be reflected by the joining member 60 within the through-hole H and made to go upward, improving the luminance in the front direction.

[0039] The joining member 60 can have a laminated structure including, for example, an Au layer, a Pt layer, a Ti layer, a NiSn layer, and a Ti layer in order from the side facing the second surface 30S2 of the p-side semiconductor layer 30. For example, as will be described later, using diffusion bonding between NiSn, the semiconductor structure 100 and the substrate 200 are joined via the joining member 60. The thickness of the joining member 60 is, for example, 1 μm or more and 6 μm or less.

[0040] <p-side pad electrode> As shown in FIG. 1, the p-side pad electrode 52 is disposed on the joining member 60 outside the semiconductor structure 100 in a plan view and is electrically connected to the joining member 60. For example, the n-side pad electrode 42 and the p-side pad electrode 52 are respectively located near the facing corner portions of the light-emitting element 1 in a plan view and are separated from each other in the diagonal direction connecting those corner portions. Thereby, the deviation of the current density distribution can be reduced.

[0041] [[ID=2,0]] [[ID=2,1]]The p-side semiconductor layer 30 is electrically connected to the p-side pad electrode 52 via the translucent conductive layer 53 and the joining member 60. The p-side pad electrode <52> is electrically connected to an external circuit via, for example, a wire such as Au. [[ID=2,2]] [[ID=2,3]]

[0042] The p-side pad electrode 52 may not be disposed, and the lower surface of the bonding member 60 may be bonded to the wiring portion of the wiring substrate on which the light-emitting element 1 is mounted. In the case where the p-side pad electrode 52 is not disposed, the substrate 200 may be a conductive substrate, and the lower surface of the substrate 200 may be bonded to the wiring portion of the wiring substrate. The p-side pad electrode 52 may be formed of Ti, Pt, Au, Rh, Ni, Al, W, Ru, Ge, or the like. The shape of the p-side pad electrode 52 in a planar view is, for example, circular or rectangular. The size of the p-side pad electrode 52 is, for example, 40 μm or more and 120 μm or less. The size of the p-side pad electrode 52 refers to the maximum diameter of the p-side pad electrode 52 in a planar view.

[0043] According to this embodiment, the light emitting element 1 can further include a first insulating film 71 and a second insulating film 72, as shown in FIG.

[0044] <First insulating film> The first insulating film 71 is disposed on the second surface 30S2 of the p-side semiconductor layer 30. The first insulating film 71 is disposed in a region of the second surface 30S2 where the through-holes H and the translucent conductive layer 53 are not disposed. The first insulating film 71 is disposed between the second surface 30S2 and the n-side electrode 41 disposed on the second surface 30S2 side, and insulates the second surface 30S2 from the n-side electrode 41. The first insulating film 71 may be, for example, a silicon oxide film (SiO2 film), a silicon oxynitride film (SiON film), or an aluminum oxide film (Al2O3 film). Light directed toward the second surface 30S2 side can be totally reflected at the interface between the second surface 30S2 and the first insulating film 71 and directed upward, thereby improving brightness in the front direction. The thickness of the first insulating film 71 is, for example, 0.1 μm or more and 1.2 μm or less.

[0045] Moreover, the first insulating film 71 is disposed inside the through hole H. The first insulating film 71 is disposed on the side surface of the first layer 11, the side surface of the active layer 20, and the side surface of the p-side semiconductor layer 30, which define the through hole H. This allows light directed toward the through hole H to be totally reflected at the interface between the side surfaces of the above-mentioned layers defining the through hole H and the first insulating film 71 and directed upward, thereby improving brightness in the front direction.

[0046] <Second insulating film> The second insulating film 72 is disposed between the n-side electrode 41, which is disposed on the second surface 30S2 side, and the bonding member 60, and insulates the n-side electrode 41 from the bonding member 60. The second insulating film 72 is disposed between the n-side electrode 41 and the bonding member 60 in the through hole H, and insulates the n-side electrode 41 from the bonding member 60 in the through hole H. The second insulating film 72 may be, for example, a silicon oxide film (SiO2 film), a silicon oxynitride film (SiON film), or an aluminum oxide film (Al2O3 film). The thickness of the second insulating film 72 is, for example, not less than 0.1 μm and not more than 1.2 μm.

[0047] The first insulating film 71 and the second insulating film 72 have a first opening 70A that exposes the translucent conductive layer 53 from the first insulating film 71 and the second insulating film 72. Furthermore, the n-side electrode 41 arranged on the second surface 30S2 side has a second opening 41A that surrounds the first opening 70A, as shown in FIG. 1 . The bonding member 60 is connected to the translucent conductive layer 53 through the first opening 70A and the second opening 41A. A plurality of first openings 70A and a plurality of second openings 41A are arranged corresponding to the plurality of translucent conductive layers 53.

[0048] <Protective film> According to this embodiment, the light-emitting element 1 can further include a protective film 73. The protective film 73 covers the side surfaces of the p-side semiconductor layer 30, the side surfaces of the active layer 20, the side surfaces of the n-side semiconductor layer 10, the upper surface of the second layer 12, and the first surface 11S1 of the first layer 11, thereby protecting the semiconductor structure 100. As the protective film 73, for example, a silicon oxide film (SiO2 film), a silicon oxynitride film (SiON film), or an aluminum oxide film (Al2O3 film) can be used.

[0049] In addition, the protective film 73 covers the portion of the n-side electrode 41 located outside the semiconductor structure 100, the n-side pad electrode 42, the portion of the bonding member 60 located outside the semiconductor structure 100, and the p-side pad electrode 52.

[0050] The protective film 73 disposed on the upper surface of the n-side pad electrode 42 has an n-side pad opening 73A that exposes the upper surface of the n-side pad electrode 42. A wire is bonded to the upper surface of the n-side pad electrode 42 in the n-side pad opening 73A.

[0051] The protective film 73 disposed on the upper surface of the p-side pad electrode 52 has a p-side pad opening 73B that exposes the upper surface of the p-side pad electrode 52. A wire is bonded to the upper surface of the p-side pad electrode 52 in the p-side pad opening 73B.

[0052] [Light-emitting device according to the second embodiment] The light-emitting element 2 according to the second embodiment will be described with reference to Figures 3 and 4. The configuration of the light-emitting element 2 according to the second embodiment is substantially the same as that of the light-emitting element 1 according to the first embodiment, and the following mainly describes the configuration of the light-emitting element 2 according to the second embodiment that differs from that of the light-emitting element 1 according to the first embodiment.

[0053] The light-emitting element 2 according to the second embodiment is disposed below the semiconductor structure 100 and includes a p-side electrode 51 electrically connected to the light-transmitting conductive layer 53. The p-side electrode 51 is disposed between a first insulating film 71 and a second insulating film 72. On the second surface 30S2 side of the p-side semiconductor layer 30, the n-side electrode 41 and the p-side electrode 51 are disposed apart from each other. In a plan view, the n-side electrode 41 and the p-side electrode 51 are disposed apart from each other. The first insulating film 71 is disposed between the p-side electrode 51 and the second surface 30S2. The second insulating film 72 is disposed between the p-side electrode 51 and the bonding member 60.

[0054] In a plan view, the area of ​​the p-side electrode 51 arranged to overlap the second surface 30S2 is larger than the area of ​​the n-side electrode 41 arranged to overlap the second surface 30S2. Light directed toward the second surface 30S2 can be reflected upward by the p-side electrode 51, thereby improving brightness in the front direction. The metals listed as materials for the n-side electrode 41 can be used as the material for the p-side electrode 51.

[0055] The p-side electrode 51 extends from a portion located on the second surface 30S2 side to the outside of the semiconductor structure 100 in a plan view. The p-side pad electrode 52 is located on the p-side electrode 51 outside the semiconductor structure 100 in a plan view and is electrically connected to the p-side electrode 51. The p-side semiconductor layer 30 is electrically connected to the p-side pad electrode 52 via the translucent conductive layer 53 and the p-side electrode 51.

[0056] In a plan view, there is a region 12A where the second layer 12 is not arranged between the first region 10A1 and the p-side pad electrode 52. No through-hole H is arranged in the region 12A. Since there is no through-hole H in the region 12A, no n-side electrode 41 is arranged in the region 12A. A part of the p-side electrode 51 is arranged in the region 12A, and the part of the p-side electrode 51 arranged on the second surface 30S2 side and the part of the p-side electrode 51 connected to the p-side pad electrode 52 are connected through the p-side electrode 51 arranged in the region 12A.

[0057] In the light-emitting device 2 according to the second embodiment, the bonding member 60 is not electrically connected to the translucent conductive layer 53 and the p-side pad electrode 52, and functions as a bonding member that bonds the semiconductor structure 100 and the substrate 200. The bonding member 60 can also function as a reflective member that reflects light directed toward the second surface 30S2 upward.

[0058] [Method for manufacturing the light-emitting element according to the first embodiment] The light emitting device 1 according to the first embodiment can be manufactured by the steps described below with reference to FIGS.

[0059] 5, a wafer W is prepared. The wafer W can be prepared by sequentially forming an underlayer 102, an n-side semiconductor layer 10, an active layer 20, and a p-side semiconductor layer 30 on an element substrate 101. Each layer can be formed on the element substrate 101 by, for example, MOCVD (metal organic chemical vapor deposition). The wafer W may also be purchased and prepared.

[0060] The element substrate 101 may be, for example, a GaAs substrate. The base layer 102 includes, for example, GaInP. As described above, the n-side semiconductor layer 10 has a first layer 11 and a second layer 12. The second layer 12 is formed on the base layer 102, and the first layer 11 is formed on the second layer 12. The active layer 20 is formed on the first layer 11. The p-side semiconductor layer 30 has a fourth layer 34 formed on the active layer 20 and a third layer 33 formed on the fourth layer 34. The third layer 33 includes the second surface 30S2 described above.

[0061] After preparing the wafer W, as shown in FIG. 6, a light-transmitting conductive layer 53 is formed on the second surface 30S2 of the p-side semiconductor layer 30. For example, a material layer for the light-transmitting conductive layer 53 is formed on the entire surface of the second surface 30S2, and then a portion of the material layer is removed by etching using a mask to form a plurality of light-transmitting conductive layers 53 spaced apart from one another on the second surface 30S2. The light-transmitting conductive layer 53 can be formed by a vapor deposition method such as a sputtering method or a CVD (Chemical Vapor Deposition) method. The light-transmitting conductive layer 53 can be removed by a dry etching method such as a wet etching method or an RIE (Reactive Ion Etching) method.

[0062] 7, a through-hole H is formed from the second surface 30S2 through the p-side semiconductor layer 30, the active layer 20, and the first layer 11 to reach the second layer 12. For example, the through-hole H is formed by an RIE method using a mask.

[0063] After forming the through hole H, as shown in FIG. 8, a first insulating film 71 is formed to cover the second surface 30S2 and the light-transmitting conductive layer 53. For example, the first insulating film 71 is formed by a CVD method. The first insulating film 71 is also formed on the side surfaces of the layers that define the through hole H and on the second layer 12. The first insulating film 71 formed on the second layer 12 inside the through hole H is removed by, for example, an RIE method, and the second layer 12 is exposed at the bottom of the through hole H.

[0064] 9, after the first insulating film 71 is formed, the n-side electrode 41 is formed. For example, the n-side electrode 41 is formed by a sputtering method. The n-side electrode 41 is formed on the first insulating film 71 in an area of ​​the second surface 30S2 where the translucent conductive layer 53 is not formed. The n-side electrode 41 is also formed in the through hole H, covers the first insulating film 71 in the through hole H, and contacts the second layer 12 at the bottom of the through hole H.

[0065] After the n-side electrode 41 is formed, a second insulating film 72 is formed to cover the n-side electrode 41 and the first insulating film 71, as shown in Fig. 10. For example, the second insulating film 72 is formed by a CVD method.

[0066] After forming the second insulating film 72, a part of the second insulating film 72 and a part of the first insulating film 71 above the light-transmitting conductive layer 53 are removed to form a first opening 70A in the second insulating film 72 and the first insulating film 71, as shown in FIG. 11 . The first opening 70A is formed by, for example, an RIE method. In the first opening 70A, the light-transmitting conductive layer 53 is exposed from the second insulating film 72 and the first insulating film 71.

[0067] After the first opening 70A is formed, the wafer W is bonded to the substrate 200 via the bonding member 60, as shown in Fig. 12. In Fig. 12 and subsequent figures, the top and bottom positions of the wafer W are shown reversed from those in the figures up to Fig. 11.

[0068] The bonding member 60 has a layered structure as described above. For example, an Au layer, a Pt layer, a Ti layer, and a NiSn layer are formed in this order on the wafer W side so as to cover the second insulating film 72. An NiSn layer and a Ti layer are formed in this order on the substrate 200 side. The NiSn layers formed on the wafer W side and the substrate 200 side are then diffusion bonded together. Note that the layers to be diffusion bonded are not limited to NiSn layers, and Au layers, InAu layers, AuSn layers, or SnPb layers may also be diffusion bonded together. The bonding member 60 can be formed by, for example, sputtering or vapor deposition.

[0069] The bonding member 60 contacts the translucent conductive layer 53 at the first opening 70A. The bonding member 60 may also be formed inside the through hole H.

[0070] After bonding the wafer W to the substrate 200, the element substrate 101 is removed. For example, the element substrate 101 is removed by etching. By removing the element substrate 101, the base layer 102 is exposed as shown in FIG. 13. The base layer 102 functions as an etching stop layer when etching is performed to remove the element substrate 101. The element substrate 101 can be removed by, for example, wet etching, dry etching, or the like.

[0071] After the underlying layer 102 is exposed, the underlying layer 102 is removed. By removing the underlying layer 102, the second layer 12 of the n-side semiconductor layer 10 is exposed as shown in Fig. 14. The underlying layer 102 can be removed by, for example, wet etching or dry etching.

[0072] After exposing the second layer 12, a portion of the second layer 12 is removed. For example, the portion of the second layer 12 is removed by an RIE method using a mask. As shown in FIG. 15, the second layer 12 is left above the through-hole H. The n-side semiconductor layer 10 has a first region 10A1 where the second layer 12 has been removed. In the first region 10A1, a first surface 11S1 of the first layer 11 is exposed.

[0073] After the first surface 11S1 of the first region 10A1 is exposed, the first surface 11S1 of the first region 10A1 is roughened, and a plurality of protrusions 11C are formed on the first surface 11S1 of the first region 10A1 as shown in Fig. 16. The first surface 11S1 is roughened by, for example, wet etching.

[0074] After roughening the first surface 11S1 of the first region 10A1, the semiconductor structure 100 is separated into each element portion, including the n-side semiconductor layer 10, the active layer 20, and the p-side semiconductor layer 30. Partial regions of the first layer 11, the active layer 20, and the p-side semiconductor layer 30 are removed by etching, and the semiconductor structure 100 is separated into each element portion, in which the second layer 12 surrounds the first region 10A1 in plan view.

[0075] By isolating the semiconductor structure 100, the first insulating film 71 is exposed in a region outside the semiconductor structure 100. As shown in FIG. 17 , a portion of the first insulating film 71 exposed in the region outside the semiconductor structure 100 is removed to form a third opening 71A in the first insulating film 71. The n-side electrode 41 is exposed in the third opening 71A. Furthermore, a portion of the first insulating film 71 and a portion of the second insulating film 72 are removed in the region outside the semiconductor structure 100 to form a fourth opening 70B in the first insulating film 71 and the second insulating film 72. The bonding member 60 is exposed in the fourth opening 70B. The first insulating film 71 and the second insulating film 72 can be removed by, for example, wet etching or dry etching.

[0076] 18, an n-side pad electrode 42 is formed on the n-side electrode 41 exposed in the third opening 71A, and a p-side pad electrode 52 is formed on the bonding member 60 exposed in the fourth opening 70B. The n-side pad electrode 42 and the p-side pad electrode 52 can be formed by, for example, sputtering or vapor deposition.

[0077] After the n-side pad electrode 42 and the p-side pad electrode 52 are formed, a protective film 73 is formed to cover the n-side pad electrode 42, the p-side pad electrode 52, and the semiconductor structure 100, as shown in FIG. 2. An n-side pad opening 73A that exposes the upper surface of the n-side pad electrode 42 is formed in the protective film 73 by removing a portion of the protective film 73 formed on the upper surface of the n-side pad electrode 42. A p-side pad opening 73B that exposes the upper surface of the p-side pad electrode 52 is formed in the protective film 73 by removing a portion of the protective film 73 formed on the upper surface of the p-side pad electrode 52. The protective film 73 can be formed by, for example, sputtering or vapor deposition. The protective film 73 can be removed by, for example, wet etching or dry etching.

[0078] Thereafter, in the region outside the semiconductor structure 100, the protective film 73, the first insulating film 71, the second insulating film 72, the bonding member 60, and the substrate 200 are cut to separate the light-emitting elements 1. For example, blade dicing or laser dicing can be used to separate the light-emitting elements 1.

[0079] The p-side electrode 51 in the light-emitting element 2 according to the second embodiment can be formed on the first insulating film 71 using the same material as the n-side electrode 41 in the step of forming the n-side electrode 41.

[0080] Embodiments of the present disclosure can include the following light emitting elements.

[0081] [Section 1] a semiconductor structure including a p-side semiconductor layer, an active layer disposed on the p-side semiconductor layer, an n-side semiconductor layer including a first layer disposed on the active layer and having a first surface located on the opposite side of the active layer, and a second layer disposed on a part of the first surface, wherein the n-side semiconductor layer has, in a plan view, a first region in which the second layer is not disposed and a second region in which the second layer is disposed; an n-side electrode electrically connected to the n-side semiconductor layer; Equipped with the peak wavelength of light emitted by the active layer is 620 nm or more and 700 nm or less; the band gap energy of the second layer is smaller than the band gap energy of the first layer; In a plan view, the second layer is disposed in a peripheral region of the semiconductor structure, the semiconductor structure has a through hole arranged continuously through the p-side semiconductor layer, the active layer, and the first layer in the second region; The n-side electrode is disposed on a second surface side of the p-side semiconductor layer opposite the active layer, and is electrically connected to the second layer through the through hole. [Section 2] Item 2. The light-emitting device according to item 1, wherein the first region is surrounded by the second region in a plan view. [Section 3] Item 3. The light-emitting device according to item 1 or 2, wherein the first surface of the first layer in the first region has a plurality of protrusions. [Section 4] an n-side pad electrode disposed outside the semiconductor structure in a plan view and electrically connected to the n-side electrode; 4. The light-emitting device according to any one of items 1 to 3, wherein the second region is located between the n-side pad electrode and the first region in a plan view. [Section 5] A substrate; a transparent conductive layer electrically connected to the p-side semiconductor layer; a bonding member disposed on the substrate and electrically connected to the light-transmitting conductive layer; a p-side pad electrode disposed on the bonding member outside the semiconductor structure in a plan view and electrically connected to the bonding member; Item 5. The light-emitting device according to any one of items 1 to 4, further comprising: [Section 6] a transparent conductive layer electrically connected to the p-side semiconductor layer; a p-side electrode disposed below the semiconductor structure and electrically connected to the transparent conductive layer; a p-side pad electrode disposed on the p-side electrode outside the semiconductor structure in a plan view and electrically connected to the p-side electrode; Item 5. The light-emitting device according to any one of items 1 to 4, further comprising: [Section 7] the first layer includes AlGaInP; Item 7. The light-emitting device according to any one of items 1 to 6, wherein the second layer contains GaAs. [Section 8] Item 8. The light-emitting device according to any one of items 1 to 7, wherein the thickness of the second layer is thinner than the thickness of the first layer in the second region. [Section 9] the thickness of the first layer in the second region is 1 μm or more and 4 μm or less; Item 9. The light-emitting device according to any one of items 1 to 8, wherein the second layer has a thickness of 0.1 μm or more and 0.3 μm or less.

[0082] The embodiments of the present disclosure have been described above with reference to specific examples. However, the present disclosure is not limited to these specific examples. All forms that can be implemented by a person skilled in the art through appropriate design modifications based on the above-described embodiments of the present disclosure also fall within the scope of the present disclosure, as long as they include the gist of the present disclosure. In addition, within the scope of the concept of the present disclosure, a person skilled in the art may come up with various modifications and alterations, and these modifications and alterations also fall within the scope of the present disclosure. [Explanation of symbols]

[0083] 1, 2...light-emitting element, 10...n-side semiconductor layer, 10A1...first region, 10A2...second region, 11...first layer, 11S1...first surface, 11C...convex portion, 12...second layer, 20...active layer, 30...p-side semiconductor layer, 30S2...second surface, 33...third layer, 34...fourth layer, 41...n-side electrode, 41A...second opening, 42...n-side pad electrode, 51...p-side electrode, 52...p-side pad electrode, 53...transparent conductive layer Electrical layer, 60... bonding member, 70A... first opening, 70B... fourth opening, 71... first insulating film, 71A... third opening, 72... second insulating film, 73... protective film, 73A... n-side pad opening, 73B... p-side pad opening, 100... semiconductor structure, 100A... outer edge of semiconductor structure, 100B... peripheral region of semiconductor structure, 101... element substrate, 102... underlayer, 200... substrate, H... through hole

Claims

1. a semiconductor structure including a p-side semiconductor layer, an active layer disposed on the p-side semiconductor layer, an n-side semiconductor layer including a first layer disposed on the active layer and having a first surface located on the opposite side of the active layer, and a second layer disposed on a part of the first surface, wherein the n-side semiconductor layer has, in a plan view, a first region in which the second layer is not disposed and a second region in which the second layer is disposed; an n-side electrode electrically connected to the n-side semiconductor layer; Equipped with the peak wavelength of light emitted by the active layer is 620 nm or more and 700 nm or less; the band gap energy of the second layer is smaller than the band gap energy of the first layer; In a plan view, the second layer is disposed in a peripheral region of the semiconductor structure, the semiconductor structure has a through hole arranged continuously through the p-side semiconductor layer, the active layer, and the first layer in the second region; the n-side electrode is disposed on a second surface side of the p-side semiconductor layer opposite to the active layer, and is electrically connected to the second layer through the through hole.

2. The light-emitting element according to claim 1 , wherein the first region is surrounded by the second region in a plan view.

3. The light-emitting element according to claim 1 , wherein the first surface of the first layer in the first region has a plurality of convex portions.

4. an n-side pad electrode disposed outside the semiconductor structure in a plan view and electrically connected to the n-side electrode; The light-emitting element according to claim 1 , wherein the second region is located between the n-side pad electrode and the first region in a plan view.

5. A substrate; a transparent conductive layer electrically connected to the p-side semiconductor layer; a bonding member disposed on the substrate and electrically connected to the light-transmitting conductive layer; a p-side pad electrode disposed on the bonding member outside the semiconductor structure in a plan view and electrically connected to the bonding member; The light-emitting device according to claim 1 or 2, further comprising:

6. a transparent conductive layer electrically connected to the p-side semiconductor layer; a p-side electrode disposed below the semiconductor structure and electrically connected to the light-transmitting conductive layer; a p-side pad electrode disposed on the p-side electrode outside the semiconductor structure in a plan view and electrically connected to the p-side electrode; The light-emitting device according to claim 1 or 2, further comprising:

7. the first layer includes AlGaInP; The light-emitting device according to claim 1 , wherein the second layer contains GaAs.

8. The light-emitting element according to claim 1 , wherein the thickness of the second layer is thinner than the thickness of the first layer in the second region.

9. the thickness of the first layer in the second region is 1 μm or more and 4 μm or less; The light-emitting element according to claim 1 , wherein the second layer has a thickness of 0.1 μm or more and 0.3 μm or less.

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