Battery pack

Abstract

To provide a battery pack.SOLUTION: A battery pack is configured to be coupled to an electrical device. The battery pack includes: a battery cell; a printed circuit board (PCB) having a metal base layer; and an intermediate layer positioned between the battery cell and the PCB, the intermediate layer including a first section formed of a first material and a second section formed of a second material, the first material having a lower thermal conductivity than the second material.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to battery packs, and more particularly to printed circuit boards (PCBs) for battery packs. [Background technology]

[0002] Cordless tools, such as power tools (e.g., drills, drivers, saws, nail guns, grinders, etc.), outdoor tools (e.g., pruning tools, pole saws, blowers, etc.), and other electrical devices (e.g., motorized devices, non-motorized devices, chargers, etc.) (generally referred to herein as "devices") are powered by rechargeable battery packs. The battery packs can be removed from the devices for charging or for use in other devices. Summary of the Invention [Means for solving the problem]

[0003] In one aspect, the present disclosure provides a battery pack including a battery cell, a first PCB, and a second PCB. The first PCB is electrically connected to the battery cell. The first PCB includes an aluminum base layer. The second PCB is electrically connected to the first PCB. The second PCB is disposed on a side of the first PCB opposite the side of the battery cell.

[0004] In another aspect, the present disclosure provides a battery pack including a battery cell, a PCB, and an intermediate layer. The PCB has a metal base layer. The intermediate layer is disposed between the battery cell and the PCB. The intermediate layer includes a first section formed of a first material and a second section formed of a second material. The first material has a lower thermal conductivity than the second material.

[0005] Other independent aspects of the present invention may become apparent by consideration of the detailed description and accompanying drawings. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a perspective view of a battery pack according to one embodiment of the present disclosure. [Figure 2A] FIG. 2 is a perspective view of the inside of the battery pack of FIG. [Figure 2B] FIG. 2 is a perspective view of another embodiment of the interior of the battery pack of FIG. 1. [Figure 3] 3 is a perspective view of the battery pack of FIG. 1 taken along line 3-3. [Figure 4A] FIG. 2 is a perspective view of the inner housing of the battery pack of FIG. 1. [Figure 4B] FIG. 2 is a perspective view of another embodiment of the inner housing of the battery pack of FIG. 1. [Figure 4C] FIG. 2 is a perspective view of the inner housing, including the end plates, of the battery pack of FIG. 1. [Figure 5A] FIG. 2 is a perspective view of a pouch cell of the battery pack of FIG. 1. [Figure 5B] FIG. 2 is a perspective view of a stack of pouch cells of the battery pack of FIG. 1. [Figure 6] FIG. 2 is a schematic diagram of the PCB of the battery pack of FIG. 1. [Figure 7A] FIG. 2 is a perspective view of a PCB of the battery pack of FIG. 1. [Figure 7B] FIG. 2 is a perspective view of one embodiment of a first PCB and a second PCB of the battery pack of FIG. 1. [Figure 8A] FIG. 2 is a top view of the PCB of the battery pack of FIG. 1. [Figure 8B] FIG. 2 is a top view of another embodiment of the PCB of the battery pack of FIG. 1. [Figure 9] FIG. 2B is a schematic diagram of a portion of the interior of the battery pack of FIG. 2A. DETAILED DESCRIPTION OF THE INVENTION

[0007] Before describing embodiments of the present invention in detail, it is to be understood that the invention is not limited in its application to the details of construction and the arrangement of components set forth in the following description or illustrated in the following drawings. The invention is capable of other embodiments and of being practiced or carried out in various ways.

[0008] FIG. 1 shows a battery pack 10. The battery pack includes an outer housing 14 with an output port 18 that can supply current to a device, such as a power tool. The battery pack 10 includes a plurality of battery cells 22 (FIGS. 5A, 5B) for generating the current. In the illustrated embodiment, the battery cells 22 (FIGS. 5A, 5B) are pouch cells. In other embodiments, the battery pack 10 may include lithium-ion battery cells, nickel-cadmium battery cells, or other similar battery cells.

[0009] As shown in FIGS. 2 and 3 , the battery pack 10 includes an inner housing 26 (also referred to as a core box) that houses a plurality of pouch cells 22, a first PCB 30, a second PCB 34, and terminals 38. Referring to FIG. 4A , in the illustrated embodiment, the inner housing 26 includes three walls 26 a, 26 b, and 26 c that partially define at least one opening 42. Referring further to FIG. 2A , the first PCB 30 contacts the three walls 26 a, 26 b, and 26 c of the inner housing 26. In other words, the first PCB 30 substantially covers the at least one opening 42 such that the first PCB 30 forms a surface of the inner housing 26. Referring again to FIGS. 2 and 3 , the second PCB 34 is disposed on a side of the first PCB 30 opposite the side of the pouch cells 22. In other words, the first PCB 30 is disposed between the pouch cell 22 and the second PCB 34. The terminals 38 are attached to the second PCB 34 and are positioned to align with the output ports 18 (FIG. 1) for outputting current from the output ports 18 (FIG. 1) to the device.

[0010] Referring to FIG. 4B, in the illustrated embodiment, inner housing 26 includes three walls 26a, 26b, and 26c that also partially define at least one opening 42. In the illustrated embodiment, compressible lining 28 is attached (e.g., with an adhesive) to the inner surface of each of the three walls 26a, 26b, and 26c and to the top surface of bottom portion 26e of inner housing 26. In some embodiments, inner housing 26 includes end plate 26e as a fourth wall that defines at least one opening 42 (see FIG. 4C). In some embodiments, compressible lining 28 is attached to the inner surface of end plate 26e and / or to bottom pouch cell 22a (FIG. 5B). In some embodiments, compressible lining 28 comprises foam. In some embodiments, compressible lining 28 mitigates electrolyte leakage and protects pouch seams in impact scenarios. In some embodiments, the compressible lining 28 includes adhesive on both the top and bottom surfaces, and the adhesive adheres to both sides of the compressible lining 28, the walls 26a, 26b, 26c, the bottom portion 26e or end plate 26e, and the stack of pouch cells 22a-22e (FIG. 5B).

[0011] Referring to FIG. 5A , the pouch cell 22 is one of a plurality of pouch cells 22, although only one pouch cell 22 is shown in FIG. 5A . In the illustrated embodiment, the battery pack 10 ( FIG. 1 ) includes five pouch cells 22. In other embodiments, the battery pack 10 ( FIG. 1 ) may include six or more pouch cells 22. In further embodiments, the battery pack 10 ( FIG. 1 ) may include fewer than five pouch cells 22. As shown in FIG. 5A , each pouch cell 22 includes a body 46, a first face 50, a second face 54, a positive cell tab 58, and a negative cell tab 62. The positive cell tab 58 and the negative cell tab 62 extend from the first face 50 of the pouch cell 22 away from the body 46.

[0012] 2 and 3, five pouch cells 22 are arranged in a stack within the inner housing 26. The first pouch cell 22a, which is arranged farthest from the first PCB 30, is oriented so that a first surface 50 (FIG. 5A) of the first pouch cell 22a faces the first PCB 30. The next pouch cell 22 in the stack, the second pouch cell 22b, is oriented so that a first surface 50 (FIG. 5A) of the second pouch cell 22b faces the first pouch cell 22a and a second surface 54 (FIG. 5A) of the second pouch cell 22b faces the first PCB 30. The third pouch cell 22c is oriented such that a first surface 50 (FIG. 5A) of the third pouch cell 22c faces the first PCB 30, the fourth pouch cell 22d is oriented such that a first surface 50 (FIG. 5A) of the fourth pouch cell 22d faces away from the first PCB 30, and the fifth pouch cell 22e is oriented such that a first surface 50 (FIG. 5A) of the fifth pouch cell 22e faces the first PCB 30. In this manner, the plurality of pouch cells 22 are housed in the internal housing 26 with their orientations alternating such that the first surfaces 50 (FIG. 5A) of every other pouch cell 22 face the first PCB 30.

[0013] Referring to FIG. 5B, in the illustrated embodiment, an adhesive gap pad 24 is included between each of the stacked pouch cells 22a-22e. In some embodiments, the top and bottom surfaces of the gap pad 24 include an adhesive that adheres to each of the corresponding pouch cells 22. In some embodiments, the gap pad 24 includes foam. In the illustrated embodiment, a top pad 25 is disposed on the top pouch cell 22e. In some embodiments, the top pad 25 includes an adhesive on the surface that attaches to the top pouch cell 22e. In some embodiments, the top pad 25 includes an adhesive on the top surface that attaches to the bottom surface of the first PCB 30 (not shown). In some embodiments, an adhesive sheet (not shown) is attached to the bottom of the bottom pouch cell 22a. In some embodiments, the adhesive sheet is attached directly to the bottom portion 26e (not shown) of the inner housing 26 or to a compressible lining 28 (not shown) attached to the bottom portion 26e. The adhesive gap pad 24, top pad 25 and adhesive sheet prevent the pouch cell 22 from bulging or expanding.

[0014] 2 and 3, the stack of pouch cells 22a-22e within inner housing 26 forms a first row of cell tabs 66 and a second row of cell tabs 70. For pouch cells 22a, 22c, and 22e oriented with their first sides 50 (FIG. 5A) facing first PCB 30, the positive cell tabs 58 are positioned in first row 66 and the negative cell tabs 62 are positioned in second row 70. For pouch cells 22b and 22d oriented with their second sides 54 (FIG. 5A) facing first PCB 30, the negative cell tabs 62 are positioned in first row 66 and the positive cell tabs 58 are positioned in second row 70. Thus, the first row 66 includes three positive cell tabs 58 and two negative cell tabs 62, and the second row 70 includes three negative cell tabs 62 and two positive cell tabs 58. The first row 66 has a net positive charge, and the second row 70 has a net negative charge.

[0015] The battery pack 10 further includes a positive cell strap 78, a negative cell strap 82, a plurality of connection pads 86 (although only one connection pad 86 is shown in FIG. 2A ), a plurality of voltage taps 90, and a flex circuit 94. The positive cell strap 78 is electrically connected to a first row of cell tabs 66 and therefore has a net positive charge. The negative cell strap 82 is electrically connected to a second row of cell tabs 70 and therefore has a net negative charge. The positive cell strap 78 is welded to a first connection pad 86 a ( FIG. 7A ), providing an electrical and thermal connection between the positive cell strap 78 and the first PCB 30. The negative cell strap 82 is welded to a second connection pad 86 b ( FIG. 7A ), providing an electrical and thermal connection between the negative cell strap 82 and the first PCB 30. Multiple voltage taps 90 between the cell tabs 58, 62 measure the voltage output of the pouch cells 22a-22e. The voltage taps 90 relay the voltage measurements to a flex circuit 94, which then routes the voltage measurements to the first PCB 30. In some embodiments, the flex circuit 94 connects to the first PCB 30 and / or the second PCB 34 via corresponding locking connectors 96 (see FIG. 2B) to reduce the amount of adhesive and avoid blocking the terminal contacts.

[0016] Referring now to FIG. 6, the first PCB 30 (FIG. 2A) is formed of at least a metal base layer 98, a dielectric layer 102, and a circuit copper layer 106. In the illustrated embodiment, the metal base layer 98 comprises aluminum. The dielectric layer 102 is disposed between the metal base layer 98 and the circuit copper layer 106. The dielectric layer 102 comprises a thermally conductive and electrically insulating material. The circuit copper layer 106 electrically connects components mounted on the first PCB 30 (FIG. 2A) at the surface of the first PCB 30 (FIG. 2A), as described below. Referring to FIG. 7A, the first PCB 30 further includes a first surface 108 and a second surface 110 opposite the first surface 108. The second surface 110 is closer to the pouch cells 22a-22e (FIG. 3) than the first surface 108.

[0017] Referring again to FIG. 6 , in the illustrated embodiment, the metal base layer 98 may be formed of a metal having a thermal conductivity of at least 80 watts per meter per Kelvin (W / mK). In other embodiments, the metal base layer 98 may be formed of a metal having a thermal conductivity of up to 260 W / mK. In further embodiments, the metal base layer 98 may be formed of a metal having a thermal conductivity in the range of 80 W / m to 260 W / mK. In the illustrated embodiment, the metal base layer 98 may be formed of up to 25% aluminum. In other embodiments, the metal base layer 98 may be formed of up to 50% aluminum. In further embodiments, the metal base layer 98 may be formed of up to 75% aluminum. In even further embodiments, the metal base layer 98 may be formed entirely of aluminum. In the illustrated embodiment, the metal base layer 98 may be formed of an aluminum alloy, such as aluminum alloy 6061, aluminum alloy 3003, aluminum alloy 1100, or another similar aluminum alloy.

[0018] As shown in FIG. 7A , the first PCB 30 includes multiple electrical components mounted thereon. The multiple electrical components include at least a charge field-effect transistor 112, a discharge field-effect transistor 116, and a sense resistor 120. The charge field-effect transistor 112 and the discharge field-effect transistor 116 are operable to control and direct the flow of current through the first PCB 30. Specifically, the charge field-effect transistor 112 can control the level and direction of current flow through the copper circuit layer 106 of the first PCB 30. The charge field-effect transistor 112 controls the flow of current when the battery pack 10 is being charged. The first PCB 30 can include multiple charge field-effect transistors 112. The discharge field-effect transistor 116 can also control the level and direction of current flow through the copper circuit layer 106 of the first PCB 30. The discharge field-effect transistor 116 controls the flow of current discharging from the battery pack 10 (e.g., to a power tool). The first PCB 30 may include a plurality of discharge field-effect transistors 116. The sense resistor 120 may be used to detect and measure the level of current passing through the first PCB 30 as controlled by the charge field-effect transistor 112 and the discharge field-effect transistor 116. The first PCB 30 further includes at least one thermistor 124 mounted thereon. More specifically, the first PCB 30 includes a plurality of thermistors 124. The thermistors 124 are configured to detect and measure the temperature of the battery pack 10. The multiple thermistors 124 enable fault tolerance of the battery pack 10 (FIG. 3) such that if one thermistor 124 fails, the battery pack 10 has a backup thermistor 124.

[0019] 8A, 8B, and 9, the battery pack 10 (FIG. 3) further includes an intermediate layer 128 disposed between the pouch cell 22 and the first PCB 30. The intermediate layer 128 includes a first section 132 formed of a first material and a second section 136 formed of a second material. The first material has a lower thermal conductivity than the second material. Therefore, the first material is a thermal insulating material (e.g., fiberglass, polyurethane foam, etc.), and the second material is a thermally conductive material (e.g., graphite, zinc, etc.). Therefore, heat generated by the pouch cell 22 can be insulated from the first PCB 30 in a region of the first PCB 30 that overlaps or covers the first section 132 of the intermediate layer 128. Additionally, heat generated by the pouch cell 22 may be thermally conducted to the first PCB 30 in an area of ​​the first PCB 30 that overlaps or covers the second section 136 of the intermediate layer 128. The first section 132 of the intermediate layer 128 covers more than half of the second surface 110 of the first PCB 30. In the embodiment shown in FIG. 8A , the first section 132 of the intermediate layer 128 covers approximately two-thirds of the second surface 110 of the first PCB 30. In other embodiments, the first section 132 of the intermediate layer 128 may overlap less than two-thirds of the second surface 110 of the first PCB 30. In further embodiments, the first section 132 of the intermediate layer 128 may overlap more than two-thirds of the second surface 110 of the first PCB 30. In the embodiment shown in Figure 8B, a first section 132 of the intermediate layer 128 forms an interior portion of the first PCB 30, and a second section 136 of the intermediate layer 128 forms a peripheral portion of the first PCB 30. In some embodiments, the first section 132 is an inner compressible pad, and the second section 136 is an outer thermally conductive periphery. The embodiment shown in Figure 8B allows for compression in the center between the cells (the cells expand more in the center) but still allows heat to be transferred along the edges. In some embodiments, the inner compressible pad is removed to reduce weight.

[0020] 8A, 8B, and 9, the electrical components (e.g., charge field-effect transistor 112, discharge field-effect transistor 116, and sense resistor 120), positive cell strap 78 (FIG. 2A), and negative cell strap 82 (FIG. 2A) mounted on first PCB 30 may generate or conduct heat during use of battery pack 10. Therefore, metal base layer 98 (FIG. 6) of first PCB 30 provides a heat sink for any heat-generating components of battery pack 10 (FIG. 1). In other words, metal base layer 98 (FIG. 6) dissipates heat from the electrical components, positive cell strap 78 (FIG. 2A), and negative cell strap 82 (FIG. 2A) to prevent overheating of battery pack 10 (FIG. 1). Each of the electrical components (e.g., the charge field-effect transistor 112, the discharge field-effect transistor 116, and the sense resistor 120) is coupled to the first PCB 30 on the opposite side of the first PCB 30 from the first section 132 of the intermediate layer 128. Additionally, both the positive cell strap 78 (FIG. 2A) and the negative cell strap 82 (FIG. 2A) are coupled to the first PCB 30 on the opposite side of the first PCB 30 from the first section 132 of the intermediate layer 128. In this manner, the first section 132 of the intermediate layer 128 further prevents overheating of the electrical components and the cell straps 78, 82 (FIG. 2A) by reducing heat conduction between the pouch cell 22 and the first PCB 30. Conventional battery packs do not include aluminum PCBs and therefore require additional heat sinks to draw heat away from the electrical components and the cell straps 78, 82 (FIG. 2A). In this manner, the first PCB 30 allows for a reduction in the size of the battery pack 10 (FIG. 1).

[0021] At least one thermistor 124 is coupled to the first PCB 30 on an opposite side of the first PCB 30 from the second section 136 of the intermediate layer 128. The second section 136 of the intermediate layer 128 enables thermal conduction between the pouch cell 22 and the first PCB 30. Thus, the first PCB 30 has substantially the same temperature as the pouch cell 22 in an area of ​​the first PCB 30 that covers or overlaps the second section 136 of the first PCB 30. As such, the at least one thermistor 124 can be disposed directly on the first surface 108 of the first PCB 30 to obtain an accurate reading of the true temperature of the battery pack 10 ( FIG. 1 ). Conventional battery packs have PCBs that are not as thermally conductive as the first PCB 30 and therefore do not reach temperatures similar to those of the battery cells. Therefore, the thermistor 124 located on the PCB of a conventional battery pack inadequately detects and measures the true temperature of said conventional battery pack.

[0022] 2 and 3 , the second PCB 34 is attached to the first PCB 30. Specifically, the second PCB 34 is attached to the first PCB 30 on the opposite side of the first PCB 30. Therefore, the first PCB 30 is disposed between the pouch cell 22 and the second PCB 34. The battery pack 10 includes a plurality of posts 140 for attaching the second PCB 34 to the first PCB 30. The plurality of posts 140 offset the second PCB 34 from the first PCB 30 so that a space is defined between the first PCB 30 and the second PCB 34. One of the posts 140 extends from the first PCB 30 through the second PCB 34 and the terminal 38, thereby securing the terminal 38 to the second PCB 34. In the embodiment shown in FIG. 7B, at least one of the plurality of posts 140 is attached to the first PCB 30 and the second PCB 34 using epoxy 142 .

[0023] In some embodiments, the second PCB 34 is an FR-4 PCB. As such, the second PCB 34 includes a thin layer of copper foil that may be laminated or surface-welded to each side of a glass epoxy panel. In the illustrated embodiment, the second PCB 34 does not include aluminum. In other embodiments, the second PCB 34 may include some aluminum. In still further embodiments, the second PCB 34 may be formed identically to the first PCB 30.

[0024] 2 and 3 , the terminal 38 is attached to the second PCB 34 and electrically connected to both the first PCB 30 and the second PCB 34. The current loop formed by the positive cell strap 78 and the negative cell strap 82 passes through the terminal 38. As such, the terminal 38 includes a positive terminal 38a and a negative terminal 38b. The terminal 38 may output current from the battery pack 10 to a device such as a power tool. Both the positive terminal 38a and the negative terminal 38b are electrically connected to the first PCB 30 and the second PCB 34. The terminal 38 is electrically and thermally connected to the first PCB 30 at a first connection pad 86a and a third connection pad 86c. More specifically, the positive terminal 38a is electrically and thermally connected to the first PCB 30 by welding or soldering to the first connection pad 86a. The negative terminal 38b is electrically and thermally connected to the first PCB 30 by welding or soldering to the third connection pad 86c. The thermal connection of the terminals 38a, 38b to the aluminum first PCB 30 provides a heat sink for the terminals 38a, 38b, thus preventing them from rising to inoperable or potentially damaging temperatures. In some embodiments, the terminals 38a, 38b are soldered to the second PCB 34. In some embodiments, the terminals 38a, 38b are laser welded to the first PCB 30 to provide a stronger, thermally robust connection.

[0025] Various components of the described embodiments of the interior of battery pack 10, including the stack and overall interior of pouch cells 22a-22e, may be sprayed with a coating material, such as a polymer. In some embodiments, the coating material is heated before being sprayed onto the various components of the interior of battery pack 10. In some embodiments, the coating material is dried in an exothermic reaction after spraying. In some embodiments, the coating material allows the stack of pouch cells 22a-22e to expand and / or contract during use. In some embodiments, the coating material helps maintain the integrity of the stack of pouch cells 22a-22e (i.e., helps hold the pouch cells together), thereby limiting the extent to which the cells may expand.

[0026] Although the present disclosure has been described in detail with reference to certain preferred embodiments, variations and modifications exist within the scope and spirit of one or more independent aspects of the disclosure described.

[0027] Exemplary Configurations Various aspects of the present disclosure may take on any one or more of the following exemplary configurations.

[0028] EEE(1) A battery pack including: a battery cell; a first PCB electrically connected to the battery cell, the first PCB including an aluminum base layer; and a second PCB electrically connected to the first PCB, the second PCB being positioned on a side of the first PCB opposite the side of the battery cell.

[0029] EEE(2) The battery pack of EEE(1), further comprising a thermal insulating layer disposed at least partially between the PCB and the battery cell.

[0030] EEE(3) The battery pack according to EEE(1) or EEE(2), wherein the second PCB does not contain aluminum.

[0031] EEE(4) The battery pack according to any one of EEE(1) to EEE(3), wherein the battery cell is a pouch cell.

[0032] EEE(5) The battery pack according to any one of EEE(1) to EEE(4), further including a terminal for outputting a current, the terminal being attached to the second PCB.

[0033] The battery pack according to any one of EEE(1) to EEE(5), wherein the EEE(6) battery cell is one of the plurality of battery cells.

[0034] EEE(7) The battery pack according to any one of EEE(1) to EEE(6), wherein the inner housing of the battery pack houses a plurality of battery cells.

[0035] EEE(8) The battery pack according to any one of EEE(1) to EEE(7), wherein the first PCB contacts three walls of the inner housing.

[0036] EEE(9) The battery pack according to any one of EEE(1) to EEE(8), wherein the compressible lining is attached to each of three walls of the inner housing and contacts the plurality of battery cells.

[0037] EEE(10) The battery pack according to any one of EEE(1) to EEE(9), wherein the gap pad is disposed between each of the plurality of battery cells.

[0038] EEE(11) The battery pack according to any one of EEE(1) to EEE(10), wherein the gap pads are attached to each of the adjacent battery cells.

[0039] EEE(12) The battery pack according to any one of EEE(1) to EEE(11), wherein the upper pad is attached to an uppermost battery cell among the plurality of battery cells.

[0040] EEE(13) The battery pack according to any one of EEE(1) to EEE(12), further comprising a coating material covering the first PCB, the second PCB, and the plurality of battery cells.

[0041] EEE(14) The battery pack according to any one of EEE(1) to EEE(13), wherein the coating material includes a polymer.

[0042] EEE(15) The battery pack according to any one of EEE(1) to EEE(14), wherein the second PCB is attached to the first PCB.

[0043] EEE(16) The battery pack according to any one of EEE(1) to EEE(15), wherein the second PCB is offset from the first PCB by a plurality of posts.

[0044] EEE(17) The battery pack of any one of EEE(1) to EEE(16), wherein each of the plurality of posts is attached to the first PCB using epoxy.

[0045] EEE(22) The battery pack of any one of EEE(1) to EEE(17), further comprising a positive cell strap electrically connected to the first PCB.

[0046] EEE(19) The battery pack of any one of EEE(1) to EEE(22), wherein the aluminum base layer of the first PCB dissipates heat from the positive cell strap.

[0047] EEE(20) The battery pack according to any one of EEE(1) to EEE(19), further comprising a negative cell strap electrically connected to the first PCB.

[0048] EEE(21) ​​The battery pack of any one of EEE(1) to EEE(20), wherein the aluminum base layer of the first PCB dissipates heat from the negative cell strap.

[0049] A battery pack including an EEE(22) battery cell, a PCB having a metal base layer, and an intermediate layer disposed between the battery cell and the PCB, the intermediate layer including a first section formed of a first material and a second section formed of a second material, the first material having a lower thermal conductivity than the second material.

[0050] EEE(23) The battery pack of EEE(22), further comprising a sense resistor coupled to the PCB on an opposite side of the PCB from the first section of the intermediate layer.

[0051] EEE(24) The battery pack of EEE(22) or EEE(23), further comprising a field effect transistor coupled to the PCB on an opposite side of the PCB from the first section of the intermediate layer.

[0052] EEE(25) The battery pack of any one of EEE(22) to EEE(24), further comprising a thermistor coupled to the PCB on an opposite side of the PCB from the second section of the intermediate layer.

[0053] EEE(26) The battery pack of any one of EEE(22) to EEE(25), wherein the thermistor is one of a plurality of thermistors coupled to the PCB on an opposite side of the PCB from the second section of the intermediate layer.

[0054] EEE(27) The battery pack according to any one of EEE(22) to EEE(26), wherein the PCB further includes a first surface and a second surface opposite the first surface.

[0055] EEE(28) The battery pack according to any one of EEE(22) to EEE(27), wherein the second surface is closer to the battery cell than the first surface.

[0056] EEE(29) The battery pack of any one of EEE(22) to EEE(28), wherein the first section of the intermediate layer covers more than half of the second surface of the PCB.

[0057] EEE(30) The battery pack of any one of EEE(22) to EEE(29), wherein the first section of the intermediate layer covers two-thirds of the second surface of the PCB.

[0058] EEE(31) The battery pack according to any one of EEE(22) to EEE(30), wherein the PCB further includes a first surface forming an interior portion and a second surface forming a peripheral portion.

[0059] EEE(32) The battery pack according to any one of EEE(22) to EEE(31), wherein the metal base layer has a thermal conductivity in the range of 80 W / mK to 260 W / mK.

[0060] EEE(33) The battery pack according to any one of EEE(22) to EEE(32), wherein the metal base layer includes aluminum.

[0061] EEE(34) The battery pack of any one of EEE(22) to EEE(33), further comprising a positive cell strap and a negative cell strap coupled to the PCB on opposite sides of the PCB from the first section of the intermediate layer. [Explanation of symbols]

[0062] 10 Battery pack 22, 22a, 22b, 22c, 22d, 22e battery cells 24 Gap Pad 25 Upper Pad 26 Inner housing 26a, 26b, 26c Wall 28 Compressible Lining 30 First PCB 34 Second PCB 38, 38a, 38b terminals 78 Positive Cell Strap 82 Negative cell strap 98 Metal Base Layer 108 First Surface 110 Second Surface 112, 116 Field effect transistor 120 Detector resistor 124 Thermistor 128 Middle Class 132 First Section 136 Second Section 140 posts 142 Epoxy

Claims

[Claim 1] 1. A battery pack comprising: A battery cell; a first printed circuit board (PCB) electrically connected to the battery cell, the first printed circuit board (PCB) including an aluminum base layer; a second PCB electrically connected to the first PCB, the second PCB being disposed on a side of the first PCB opposite to the side of the battery cell; Includes battery pack.

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