Motor driver circuit

Abstract

To provide a motor driver circuit capable of operating over a wide range of input voltages.SOLUTION: A constant voltage circuit 220 receives power supply voltage VCC and generates constant voltage VREG. A first charge pump circuit 230 becomes enabled when the power supply voltage VCC is higher than the constant voltage VREG, and in the enabled state, generates a first voltage VCP1 by adding the constant voltage VREG to the power supply voltage VCC as a reference. A second charge pump circuit 240 becomes enabled when the power supply voltage VCC is lower than the constant voltage VREG, and becomes disabled when the power supply voltage VCC is higher than the constant voltage VREG, and in the enabled state, generates a second voltage VCP2 by adding the constant voltage VREG as a reference. A current source 250 receives the first voltage VCP1 and the second voltage VCP2, supplying current to a bootstrap terminal BS.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a motor driver circuit. [Background technology]

[0002] A three-phase inverter circuit is used to drive a three-phase brushless motor. A three-phase inverter circuit has three phase legs corresponding to the three phase coils, and each leg includes a high-side transistor and a low-side transistor. When the high-side transistor is configured with an N-type transistor, a bootstrap circuit is used.

[0003] The bootstrap circuit utilizes the switching operation of the inverter circuit, so if you want to generate a 100% duty cycle output without switching in the inverter circuit, you need a boost circuit in addition to the bootstrap circuit. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2023-120946

[0005] [overview] The present disclosure has been made in light of such a situation, and one exemplary purpose of an embodiment thereof is to provide a motor driver circuit that can accommodate a wide range of power supply voltages.

[0006] A motor driver circuit according to one embodiment of the present disclosure drives a three-phase brushless motor and includes a power supply terminal that receives a power supply voltage, a bootstrap terminal, a constant voltage circuit that receives the power supply voltage and generates a constant voltage, a first charge pump circuit that is enabled when the power supply voltage is higher than the constant voltage and that, in the enabled state, generates a first voltage by adding the constant voltage to the power supply voltage as a reference, a second charge pump circuit that is enabled when the power supply voltage is lower than the constant voltage and is disabled when the power supply voltage is higher than the constant voltage and that, in the enabled state, generates a second voltage by adding the constant voltage to the constant voltage as a reference, and a current source that receives the first voltage and the second voltage and supplies a current to the bootstrap terminal.

[0007] Any combination of the above elements, or mutual substitution of elements or expressions between methods, devices, systems, etc., are also valid aspects of the present invention or the present disclosure. Furthermore, the description in this section (Means for Solving the Problems) does not explain all essential features of the present invention, and therefore, subcombinations of the described features may also constitute the present invention. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram of a motor circuit according to an embodiment. [Figure 2] FIG. 2 is a circuit diagram of a first charge pump circuit, a second charge pump circuit, and a current source according to an embodiment. [Figure 3] FIG. 3 is a circuit diagram of an example of the configuration of a constant voltage circuit. [Figure 4] FIG. 4 is a diagram showing the input / output characteristics of the constant voltage circuit. [Figure 5] FIG. 5 is a diagram showing voltage characteristics of the motor driver circuit. [Figure 6] FIG. 6 is an operational waveform diagram of the constant voltage circuit of FIG. [Figure 7] FIG. 7 is a circuit diagram of a constant voltage circuit according to a comparative technique. [Figure 8]FIG. 8 is a circuit diagram of the constant voltage circuit according to the first embodiment. [Figure 9] FIG. 9 is an operational waveform diagram of the constant voltage circuit of FIG. [Figure 10] FIG. 10 is a circuit diagram of a constant voltage circuit according to the second embodiment. [Figure 11] FIG. 11 is a circuit diagram of a constant voltage circuit according to the third embodiment. [Figure 12] FIG. 12 is a circuit diagram of a constant voltage circuit according to a fourth embodiment.

[0009] [Detailed explanation] (Outline of the embodiment) A summary of some exemplary embodiments of the present disclosure is provided. This summary is intended to provide a simplified overview of some concepts of one or more embodiments in order to provide a basic understanding of the embodiments as a prelude to the more detailed description that follows. It is not intended to limit the scope of the invention or disclosure. This summary is not an exhaustive overview of all possible embodiments, and is not intended to identify key elements of all embodiments or to delineate the scope of some or all aspects. For convenience, the term "one embodiment" may refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed herein.

[0010] A motor driver circuit according to one embodiment drives a three-phase brushless motor and includes a power supply terminal receiving a power supply voltage, a bootstrap terminal, a constant voltage circuit receiving the power supply voltage and generating a constant voltage, a first charge pump circuit enabled when the power supply voltage is higher than the constant voltage and generating a first voltage by adding the constant voltage to the power supply voltage in the enabled state, a second charge pump circuit enabled when the power supply voltage is lower than the constant voltage and disabled when the power supply voltage is higher than the constant voltage and generating a second voltage by adding the constant voltage to the constant voltage in the enabled state, and a current source receiving the first voltage and the second voltage and supplying a current to the bootstrap terminal.

[0011] According to this configuration, in a reduced voltage state where the power supply voltage becomes very low, the second charge pump circuit is used to double the constant voltage, allowing the current source to charge the bootstrap terminal to an appropriate gate high voltage.

[0012] In one embodiment, the first charge pump circuit may be enabled even when the power supply voltage is lower than the constant voltage, thereby eliminating discontinuities caused by the first charge pump circuit switching on and off.

[0013] In one embodiment, the first charge pump circuit may be disabled when the power supply voltage is lower than the constant voltage, thereby reducing the power consumption of the circuit.

[0014] In one embodiment, the second charge pump circuit may include a diode in its output path to prevent reverse current flow when both the first charge pump circuit and the second charge pump circuit are enabled.

[0015] In one embodiment, the constant voltage circuit may include a linear regulator having an input node connected to a power supply terminal and an output node, the linear regulator adjusting an intermediate voltage generated at the output node so that the constant voltage approaches a first target voltage, and a Dickson-type charge pump circuit having a first input node receiving the intermediate voltage, a second input node receiving a power supply voltage, and an output node at which the constant voltage is generated. The charge pump circuit may be disabled when the constant voltage is higher than a threshold voltage set lower than the first target voltage, and in the disabled state, output the voltage of the first input node to the output node. The charge pump circuit may be enabled when the constant voltage is lower than the threshold voltage, and in the enabled state, stabilize the constant voltage to a second target voltage set lower than the first target voltage.

[0016] With this constant voltage circuit, when the power supply voltage is sufficiently high, the charge pump circuit is disabled and its output constant voltage is stabilized at a first target voltage. When the power supply voltage drops and the linear regulator circuit can no longer maintain the output constant voltage at the first target voltage, causing the constant voltage to fall below the threshold voltage, the charge pump circuit is enabled and the constant voltage can be stabilized at a second target voltage set slightly lower than the first target voltage. Note that even when the power supply voltage drops, the linear regulator remains operational and in a full-on state, supplying an intermediate voltage close to the power supply voltage to the charge pump circuit. Because the linear regulator operates constantly, discontinuous changes in the output voltage caused by switching between these states can be prevented.

[0017] In one embodiment, the charge pump circuit may include a first comparator having hysteresis that compares a monitored voltage corresponding to a constant voltage with an upper threshold and a lower threshold corresponding to a second target voltage. In an enabled state, the charge pump circuit may alternate between an active period and a quiescent period according to the output of the first comparator. With this configuration, in the enabled state of the charge pump circuit, the output voltage can be stabilized within a voltage range determined by the upper threshold and the lower threshold.

[0018] In one embodiment, the charge pump circuit may include a flying capacitor, a driver circuit that, in an enabled state, alternately applies a power supply voltage and a ground voltage to a first end of the flying capacitor, a first rectifying element disposed between a first input node and a second end of the flying capacitor, and a second rectifying element disposed between the second end of the flying capacitor and an output node.

[0019] In one embodiment, the charge pump circuit may further include a second comparator that compares a constant voltage with the voltage at the second end of the flying capacitor while the first end of the flying capacitor is low during an enabled state of the charge pump circuit and asserts a stop signal when the constant voltage is lower. The charge pump circuit may be disabled when the stop signal is asserted. If the capacity of the charge pump circuit is small compared to the load current, operating the charge pump circuit may result in a situation where the output voltage is lower than the intermediate voltage. This situation can be detected by the second comparator, and the charge pump circuit can be disabled in response to the stop signal generated by the second comparator, thereby preventing a drop in the output voltage.

[0020] In one embodiment, the first rectifying element may be a first synchronous rectifying transistor that switches in an enabled state and is on in a disabled state, and the second rectifying element may be a second synchronous rectifying transistor that switches complementarily to the first synchronous rectifying transistor in an enabled state and is on in a disabled state.

[0021] In one embodiment, the first rectifying element and the second rectifying element may be diodes.

[0022] In one embodiment, the charge pump circuit may further include a second comparator that compares the constant voltage with the intermediate voltage and asserts a stop signal when the constant voltage is lower, and the charge pump circuit may be disabled when the stop signal is asserted. If the capacity of the charge pump circuit is small compared to the load current, operating the charge pump circuit may result in a situation where the constant voltage is lower than the intermediate voltage. This situation can be detected by the second comparator, and the charge pump circuit can be disabled in response to the stop signal generated by the second comparator, thereby preventing the constant voltage from dropping.

[0023] In one embodiment, the charge pump circuit may further include a second comparator that compares the constant voltage with a voltage based on the power supply voltage and asserts a stop signal when the constant voltage is lower. The charge pump circuit may be disabled when the stop signal is asserted. If the capacity of the charge pump circuit is small compared to the load current, operating the charge pump circuit may result in a situation where the output voltage is lower than the intermediate voltage. This situation can be detected by the second comparator, and the charge pump circuit can be disabled in response to the stop signal generated by the second comparator, thereby preventing a drop in the output voltage.

[0024] In one embodiment, the linear regulator may include a first transistor having a source connected to an input node and a drain connected to an output node, a second transistor having a source connected to the input node and a gate and a drain connected to the gate of the first transistor, and an error amplifier that receives a feedback voltage corresponding to a constant voltage and a reference voltage and has an output connected to the gate of the first transistor and the gate and drain of the second transistor.

[0025] In one embodiment, the motor driver circuit may be integrated on a single semiconductor substrate. "Monopoly integration" includes cases where all of the circuit components are formed on a semiconductor substrate, or where the main circuit components are monopoly integrated, and some resistors and capacitors for adjusting circuit constants may be provided outside the semiconductor substrate. By integrating the circuit on a single chip, the circuit area can be reduced and the characteristics of the circuit elements can be maintained uniform.

[0026] (Embodiment) Preferred embodiments will be described below with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing will be given the same reference numerals, and redundant explanations will be omitted as appropriate. Furthermore, the embodiments are examples and do not limit the disclosure and invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the disclosure and invention.

[0027] In this specification, "a state in which component A is connected to component B" includes not only a case in which component A and component B are directly physically connected to each other, but also a case in which component A and component B are indirectly connected to each other via other components that do not substantially affect the electrical connection between them or that do not impair the function or effect achieved by their connection.

[0028] Similarly, "a state in which component C is connected (provided) between component A and component B" includes not only a case in which component A and component C, or component B and component C, are directly connected, but also a case in which they are indirectly connected via other components that do not substantially affect the electrical connection state between them or that do not impair the function or effect achieved by their combination.

[0029] 1 is a block diagram of a motor circuit 400 according to an embodiment. The motor circuit 400 includes a three-phase brushless motor 402, a three-phase inverter 410, and a motor driver circuit 200. The three-phase inverter 410 includes three phase U, V, and W legs, and each phase leg includes a high-side transistor MH as an upper arm and a low-side transistor ML as a lower arm.

[0030] The high-side transistor MH and the low-side transistor ML are both N-type transistors, i.e., N-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) or NPN-type bipolar transistors. The legs of each phase (U, V, W are indicated by #) are connected to the bootstrap capacitor C BS# Includes the bootstrap capacitor C BS# One end of each of these terminals is connected to the corresponding bootstrap terminal BS# of the motor driver circuit 200, and the other end is connected to the corresponding switching terminal OUT# of the motor driver circuit 200.

[0031] The motor driver circuit 200 includes gate driver circuits 210U, 210V, and 210W for U, V, and W phases, a constant voltage circuit 220, a first charge pump circuit 230, a second charge pump circuit 240, and current sources 250U, 250V, and 250W. The motor driver circuit 200 is a functional IC integrated on a single semiconductor substrate. The motor driver circuit 200 can further include a controller circuit that generates control signals that indicate the states of the high-side transistor MH and low-side transistor ML of each phase.

[0032] The power supply terminal VCC of the motor driver circuit 200 is connected to the power supply voltage V CC This power supply voltage V CC is the power supply voltage V supplied to the three-phase inverter 410 CC The same as the power supply voltage V CC The voltage level varies depending on the application of the motor circuit 400 and is not particularly limited.

[0033] The constant voltage circuit 220 is CC The constant voltage V is stabilized to a predetermined target level. REG Generates a constant voltage V REG The target level of the power supply voltage V is set to about 12 V. CC is the constant voltage V REG Even if the voltage drops below the target level, the constant voltage V REG A boost circuit such as a charge pump circuit may be included to maintain the voltage at a target level.

[0034] The gate driver circuit 210# for each phase includes a high-side driver 212, a low-side driver 214, and a rectifying element 216. The rectifying element 216 is connected to an external bootstrap capacitor C BS# The cathode of the rectifier element 216 is connected to the bootstrap terminal BS#, and the anode of the rectifier element 216 is connected to the bootstrap terminal BS#. The constant voltage V REG The bootstrap terminal BS# is supplied with the voltage (called the switching voltage) V of the corresponding switching terminal OUT#. OUT# Rather than VREG -Vf higher bootstrap voltage V BS# Vf is the forward voltage of the rectifying element 216.

[0035] The high-side driver 212 generates a bootstrap voltage V BS# and the switching voltage V generated at the switching terminal OUT# OUT# When the control signal HCTRL instructs the corresponding high-side transistor MH# to be turned on, the high-side driver 212 applies a bootstrap voltage V to the gate terminal H# connected to the gate of the high-side transistor MH#. BS# When the control signal HCTRL instructs the corresponding high-side transistor MH# to be turned off, the high-side driver 212 generates a gate high voltage equal to the switching voltage V OUT# generates a gate low voltage equal to

[0036] The low-side driver 214 is connected to the constant voltage V REG and ground voltage (or a voltage close to it). When the control signal LCTRL instructs the corresponding low-side transistor ML# to be turned on, the low-side driver 214 supplies a constant voltage V REG Furthermore, when the control signal LCTRL instructs the corresponding low-side transistor ML# to be turned off, the low-side driver 214 generates a gate low voltage at or near the ground voltage at the gate terminal L#.

[0037] This motor driver circuit 200 supports an operation mode in which the high-side transistors MHU, MHV, and MHW of the three-phase inverter 410 are turned on with a 100% duty cycle. In the 100% duty cycle operation mode, the bootstrap circuit does not operate.

[0038] In an operation mode with a duty cycle of 100%, the first charge pump circuit 230, the second charge pump circuit 240, and the current sources 250U, 250V, and 250W supply the power supply voltage V CC The gate voltage is provided to generate a high gate voltage higher than the

[0039] The first charge pump circuit 230 is connected to the power supply voltage V CC is the constant voltage V REG In the enabled state, the first charge pump circuit 230 is enabled when the power supply voltage V CC Based on the constant voltage V REG The first voltage V CP1 Generate. V CP1 ≒V CC +V REG Vf is the voltage drop across the rectifier transistor.

[0040] In this embodiment, the first charge pump circuit 230 is CC is the constant voltage V REG It remains enabled and operational when the voltage is lower.

[0041] The second charge pump circuit 240 is connected to the power supply voltage V CC is the constant voltage V REG Enabled when the supply voltage V CC is the constant voltage V REG When the second charge pump circuit 240 is enabled, it outputs a constant voltage V REG Based on the constant voltage V REG The second voltage V CP2 Generate. V CP2 ≒V REG +V REG

[0042] The current source 250# supplies a first voltage V CP1 and the second voltage V CP2 , and the bootstrap terminal BS# receives the charging current I CHGsupply.

[0043] The motor driver circuit 200 is configured as described above.

[0044] The present disclosure covers various devices and methods that can be understood as the block diagram or circuit diagram of Figure 1 or derived from the above description, and is not limited to a specific configuration. Below, more specific configuration examples and examples will be described not to narrow the scope of the present disclosure, but to aid in understanding and clarify the essence and operation of the present disclosure and the present invention.

[0045] An example of the configuration of the first charge pump circuit 230, the second charge pump circuit 240, and the current sources 250U to 250W will be described.

[0046] FIG. 2 is a circuit diagram of a first charge pump circuit 230, a second charge pump circuit 240, and current sources 250U to 250W according to one embodiment.

[0047] The first charge pump circuit 230 and the second charge pump circuit 240 are both Dickson type charge pump circuits, and include inverters INV1 and INV2, flying capacitors Cf1 and Cf2, and rectifier transistors M1, M2, M3, and M4.

[0048] In the first charge pump circuit 230, the inverters INV1 and INV2 are switched in opposite phases in synchronization with the clock signal CLK. The rectifying transistors M1 and M2 are supplied with the power supply voltage V CC is supplied to the power supply lines of the inverters INV1 and INV2, and a constant voltage V REG is supplied.

[0049] The first voltage V generated by the first charge pump circuit 230 CP1 teeth, V CP1 =V REG +V CC -Vf Vf is the voltage drop across the rectifier transistors M1 and M2.

[0050] The second charge pump circuit 240 can be switched between enabled and disabled. CC and constant voltage V REG The controller 242 compares the clock signal CLK with the inverter INV1 when the enable signal EN is asserted, and cuts off the supply of the clock signal CLK when the enable signal EN is negated. The rectifier transistors M1 and M2 are supplied with a constant voltage V as a reference voltage. REG is supplied to the power supply lines of the inverters INV1 and INV2, and a constant voltage V REG The output line of the second charge pump circuit 240 is provided with a diode D1.

[0051] The second voltage V generated by the second charge pump circuit 240 CP2 teeth, V CP2 =2×V REG -Vf1-Vf2 Vf1 is the voltage drop across the rectifier transistors M1 and M2, and Vf2 is the voltage drop across the diode D1.

[0052] Current sources 250U to 250W have a first voltage V CP1 , second voltage V CP2 A voltage TCPOUT according to either of the above is supplied.

[0053] Diode D1 isolates second charge pump circuit 240 from first charge pump circuit 230, and when both are enabled, the voltage V generated by second charge pump circuit 240 is CP2 is supplied to current sources 250U to 250W with priority.

[0054] A common smoothing capacitor C1 is connected to the outputs of the first charge pump circuit 230 and the second charge pump circuit 240. In this example, one end of the smoothing capacitor C1 is connected to the power supply terminal VCC, but it may also be connected to ground.

[0055] Current sources 250U to 250W include a constant current source CS1, transistors M5 to M8, and resistors R1 to R3. Constant current source CS1 generates a constant current Ic. Transistors M5 to M8 form a current mirror circuit with transistor M5 as an input, and a charging current proportional to the constant current Ic flows through transistors M6 to M8.

[0056] Next, an example of the configuration of the constant voltage circuit 220 will be described.

[0057] 3 is a circuit diagram of a configuration example of the constant voltage circuit 220. The constant voltage circuit 220 includes an input terminal 102 and an output terminal 104. The constant voltage circuit 220 supplies an input voltage (power supply voltage) V CC and a stabilized output voltage (the constant voltage described above) V REG For example, output voltage V REG is about 12V, and the input voltage V CC can be between a first voltage greater than 12V (eg, 15V, 24V, 60V) and a second voltage less than 12V (eg, 6V).

[0058] The constant voltage circuit 220 includes a linear regulator 110 and a charge pump circuit 120. The linear regulator 110 is also called an LDO (Low Drop Output) regulator, and has an input node IN connected to an input terminal 102, an output node OUT, and a feedback node FB. The linear regulator 110 supplies an output voltage V 1 generated at an output terminal 104 to the feedback node FB. REG Feedback voltage V according to FB The feedback voltage V FB is the reference voltage V REF In other words, the output voltage V REG is the first target voltage V OUT(REF1) The intermediate voltage V that appears at the output node OUT approaches REGOUT The constant voltage circuit 220 includes a voltage divider circuit 106 including resistors R11 and R12.FB is the output voltage V REG is divided by resistors R11 and R12, and the first target voltage V OUT(REF1) is expressed by equation (1). V OUT(REF1) =V REF ×(R11+R12) / R12 …(1)

[0059] The charge pump circuit 120 is a Dickson type and includes a flying capacitor Cf, an output capacitor Co, a first input node IN1, a second input node IN2, and an output node OUT. The first input node IN1 is connected to the output node OUT of the linear regulator 110, and supplies an intermediate voltage V REGOUT The second input node IN2 is connected to the input terminal 102 and receives the input voltage V CC The output node OUT of the charge pump circuit 120 is connected to the output terminal 104.

[0060] The charge pump circuit 120 generates an output voltage V REG The charge pump circuit 120 can be switched between an enabled state and a disabled state depending on the first target voltage V OUT(REF1) Lower threshold voltage V TH(CP) is set, and V REG >V TH(CP) In the disabled state, the charge pump circuit 120 is through (conductive), and the intermediate voltage V REGOUT is output to the output node OUT as is. The output voltage V REG is expressed by the following formula: V REG =V REGOUT -ΔV CP ΔV CP is the voltage drop across the charge pump circuit 120 in the disabled state.

[0061] The charge pump circuit 120 is V REG <V TH(CP)In the enabled state, the charge pump circuit 120 operates in synchronization with the clock signal CLK, and the voltage V of the first input node IN1 REGOUT The flying capacitor Cf is charged with the voltage V of the second input node IN2. CC When the charge pump circuit 120 is allowed to free-run, the output voltage V REG is expressed by the following formula: V REG =V CC +V REGOUT

[0062] The charge pump circuit 120 has an output regulation function, and in an enabled state, the output voltage V REG The first target voltage V OUT(REF1) The second target voltage V is set lower OUT(REF2) The second target voltage V OUT(REF2) is the threshold voltage V TH(CP) can be defined as substantially equal to

[0063] For example, the first target voltage V OUT(REF1) When is 12.5V, the second target voltage V OUT(REF2) and threshold voltage V TH(CP) can be set to about 11.5V, which is 1V lower than that.

[0064] The above is the configuration of the motor driver circuit 200. Next, the operation of the motor driver circuit 200 will be described.

[0065] 4 is a diagram showing the input / output characteristics of the constant voltage circuit 220. The horizontal axis represents the power supply voltage V CC The vertical axis is the constant voltage V REG The constant voltage circuit 220 is V CC >6V, constant voltage V REG can be stabilized to the target level of 11V to 12V. CC <6V, the constant voltage V REG will not be able to maintain within the target range.

[0066] 5 is a diagram showing the voltage characteristics (simulation results) of the motor driver circuit 200. The horizontal axis represents the power supply voltage V CC The vertical axis is TCPOUT-V CC 5 shows the characteristics (i) of the motor driver circuit 200 according to the embodiment and the characteristics (ii) of the motor driver circuit according to the comparative technique. The comparative technique has a configuration in which the second charge pump circuit 240 is omitted, and the current source 250 is the output voltage V CP1 =V CC +V REG is what is supplied.

[0067] TCPOUT corresponds to the charging voltage of the bootstrap terminal BS, and corresponds to the gate voltage of the high-side transistor MH when it is on. V CC corresponds to the drain and source voltages when the high-side transistor MH is on, i.e., TCPOUT-V CC is the gate-source voltage V when the high-side transistor MH is on. GS is equivalent to

[0068] First, we explain the characteristics (ii) of the comparison technology. CC =V REG Therefore, the power supply voltage V CC When V drops below 6V, as shown in Figure 4, REG Therefore, the gate-source voltage V of the high-side transistor MH GS (=TCPOUT-V CC ) falls below 8V, making it difficult to keep the high-side transistor MH on.

[0069] Next, the characteristic (i) of the embodiment will be described. CC <V REG Then, the second charge pump circuit 240 is enabled, and TCPOUT=V CP2 In other words, TCPOUT = 2 × VREG This results in the power supply voltage V CC Even if the voltage drops to a range of 6 V or less, specifically to about 4 V, the gate-source voltage of the high-side transistor MH (TCPOUT-V CC ) can be kept at 8 V or higher, and the high-side transistor MH can be reliably maintained in the on state.

[0070] Furthermore, the advantages of using the constant voltage circuit 220 with the configuration shown in FIG. 3 will be described.

[0071] 6 is an operational waveform diagram of the constant voltage circuit 220 of FIG. CC is shown decreasing over time from a high voltage level to a low voltage level.

[0072] Between times t0 and t1, the input voltage V CC is the first target voltage V OUT(REF1) is higher than the output voltage V REG is generated by the linear regulator 110 as a first target voltage V OUT(REF1) This state is called LDO mode.

[0073] Input voltage V CC is the first target voltage V OUT(REF1) When the voltage drops below 1 V, the linear regulator 110 reduces the output voltage V REG the first target voltage V OUT(REF1) The output voltage V REG is the input voltage V CC During this period from t1 to t2, the output transistor inside the linear regulator 110 is in a fully on state, and the intermediate voltage V REGOUT is the input voltage V CC The voltage level is slightly lower than V REGOUT =V CC -ΔV LDO ΔV LDO is the voltage drop of the linear regulator 110. REG >V TH(CP)Therefore, the charge pump circuit 120 is disabled and the output voltage V REG is expressed by the following formula: V REG =V REGOUT -ΔV CP =V CC -ΔV LDO -ΔV CP This section from t1 to t2 is called a through mode.

[0074] At time t2, the output voltage V REG is the threshold voltage V TH(CP) When the voltage drops to , the charge pump circuit 120 is enabled and the output voltage V REG is the second target voltage V OUT(REF2) The period from time t2 onwards is called the charge pump (CP) mode.

[0075] The above is the operation of the constant voltage circuit 220. This constant voltage circuit 220 can handle a wide range of input voltages V CC At this point, the output voltage V REG within a given voltage range (V OUT(REF2) ~V OUT(REF1) ) can be maintained.

[0076] The advantages of the constant voltage circuit 220 of FIG. 3 become clear when compared with comparative techniques.

[0077] (Comparative Technology) 7 is a circuit diagram of a constant voltage circuit 220R according to the comparative technique. The constant voltage circuit 220R includes a linear regulator 110R and a charge pump circuit 120R, but the connection between them is different from that of the constant voltage circuit 220 shown in FIG. 3. That is, in the comparative technique, the linear regulator 110R and the charge pump circuit 120R are connected completely in parallel and operate complementarily. Specifically, the input voltage V CC is the threshold voltage V TH Compared with V CC >V THWhen this occurs, the switch SW1 connected to the output of the linear regulator 110R turns on, enabling the linear regulator 110R and outputting the output voltage V REG , the target voltage V OUT(REF1) At this time, the charge pump circuit 120R is in a disabled state.

[0078] V CC <V TH At this time, the switch SW1 connected to the output of the linear regulator 110R is turned off, and the linear regulator 110R is in a disabled state. At this time, the charge pump circuit 120R is in an enabled state. In the enabled state, the charge pump circuit 120R generates an output voltage V OUT , the target voltage V OUT(REF2) In the comparative technology, V OUT(REF2) ≧V OUT(REF1) The target voltage is determined so that:

[0079] The above is the configuration of the constant voltage circuit 220R. In the constant voltage circuit 220R, the input voltage V CC and threshold voltage V TH The linear regulator 110R and the charge pump circuit 120R operate in a complementary manner depending on the comparison result. Therefore, there is a problem that the operation becomes discontinuous when switching.

[0080] The constant voltage circuit 220 according to the embodiment differs from the comparative technique in that the linear regulator 110 operates constantly. OUT(REF1) and V OUT(REF2) But V OUT(REF2) <V OUT(REF1) As a result, as shown in Figure 6, a through mode is inserted between the LDO mode and the CP mode, which allows for continuous transition.

[0081] Example 1 8 is a circuit diagram of a constant voltage circuit 220A according to the first embodiment. The linear regulator 110 includes an error amplifier 112 and an output stage 114. The output stage 114 includes a first transistor M21 and a second transistor M22. The source of the first transistor M21 is connected to the input node IN, and the drain is connected to the output node OUT. The source of the second transistor M22 is connected to the input node IN, and the gate and drain are connected to the gate of the first transistor M21. The error amplifier 112 outputs an output voltage V OUT Feedback voltage V according to FB and the reference voltage V REF The error amplifier 112 receives the feedback voltage V and has an output connected to the gate of the first transistor M21 and the gate and drain of the second transistor M22. FB and the reference voltage V REF The error is amplified and the gate voltage of the first transistor M21 is feedback-controlled. FB is generated by a voltage divider circuit 106 including resistors R11 to R13, V FB =V OUT ×R13 / (R11+R12+R13) The linear regulator 110 generates an output voltage V OUT is the first target voltage V OUT(REF1) is stabilized to V OUT(REF1) =(R11+R12+R13) / R13×V REF

[0082] The configuration of the linear regulator 110 is not limited to that shown in Fig. 8. For example, the second transistor M22 may be omitted.

[0083] The charge pump circuit 120A includes a flying capacitor Cf, a controller 122, a driver circuit 124, a first rectifying element 126, and a second rectifying element 128.

[0084] The controller 122 generates the clock signal CLK when the charge pump circuit 120A is in an enabled state.

[0085] The driver circuit 124 is connected to the second input node IN2 and receives the input voltage V CC The driver circuit 124 receives the input voltage V CC and the ground voltage (0 V) are applied alternately. The driver circuit 124 is, for example, an inverter, and includes transistors M31 and M32.

[0086] The first rectifier element 126 is connected between the first input node IN1 and the second terminal CPH of the flying capacitor Cf. The second rectifier element 128 is connected between the second terminal CPH of the flying capacitor Cf and the output node OUT. In the first embodiment, the first rectifier element 126 and the second rectifier element 128 are P-channel MOSFETs.

[0087] The gate of the first rectifier element 126 receives the inverted clock signal / CLK, and the gate of the second rectifier element 128 receives the clock signal CLK.

[0088] The free-running operation of the charge pump circuit 120A will now be described. The charge pump circuit 120A alternates between a high state φ1 of the clock signal CLK and a low state φ2 of the clock signal CLK.

[0089] When the clock signal CLK is in a high state φ1, the first rectifier element 126 is on, the output of the driver circuit 124 is low (0 V), and the second rectifier element 128 is off. In this state, the flying capacitor Cf is connected to the voltage V REGOUT It is charged with.

[0090] When the clock signal CLK is in the low state φ2, the first rectifier element 126 is off, and the output of the driver circuit 124 is high (V CC ), the second rectifying element 128 is off. In this state, the output capacitor Co connected to the output node OUT is V OUT =V CC +V REGOUT In the free-running state where the two states are repeated, the output terminal 104 is charged to an output voltage V OUT occurs. V OUT =V CC +V REGOUT

[0091] As described above, the charge pump circuit 120A has a regulation function, and does not free-run when enabled, and the output voltage V OUT to the second target voltage V OUT(REF2) For voltage regulation, the charge pump circuit 120A includes a first comparator COMP1.

[0092] The first comparator COMP1 is a hysteresis comparator that controls the output voltage V OUT The monitored voltage V MON The second target voltage V OUT(REF2) The upper threshold V THH and the lower threshold V THL Compare with the monitored voltage V MON teeth, V MON =V OUT ×(R12+R13) / (R11+R12+R13) The first comparator COMP1 is MON and the upper threshold V THH and the lower threshold V THL The enable signal EN is generated according to the relationship between the

[0093] Specifically, the monitored voltage V MON is the lower threshold V THL When the voltage V MON is the upper threshold V THH , the enable signal EN is negated (second level, for example, low).

[0094] When the enable signal EN is asserted, the controller 122 enters an operating period and generates the clock signals CLK and / CLK, and when the enable signal EN is negated, the controller 122 enters a stop period and stops generating the clock signals CLK and / CLK.

[0095] When the charge pump circuit 120A is enabled, the controller 122 preferably fixes the gate of the MOSFET that is the first rectifier element 126 and the gate of the MOSFET that is the second rectifier element 128 to low, putting the two MOSFETs in a fully on state. This reduces the voltage drop ΔV of the charge pump circuit 120A in the disabled state. CP can be reduced to reduce losses.

[0096] The above is the configuration of the constant voltage circuit 220A. Next, the operation of the constant voltage circuit 220A will be described.

[0097] 9 is an operational waveform diagram of the constant voltage circuit 220A of FIG. 8. The operation from time t0 to t2 is the same as that of FIG. 6. At time t2, the monitored voltage V MON is the lower threshold V THL When the output voltage V OUT The output voltage V OUT As the monitoring voltage V MON rises, and at time t3, the monitored voltage V MON is the upper threshold V THH When the load current exceeds 10 V, the enable signal EN is negated, the clock signal CLK stops, and the stop period begins. During the stop period, the output capacitor Co is discharged by the load current, and the output voltage V OUT decreases, and the monitored voltage V MON also decreases.

[0098] At time t4, the monitored voltage V MON is the lower threshold V THL When the voltage drops to , the enable signal EN is asserted again, and the operation period begins. After that, the same operation is repeated.

[0099] The above is the operation of the constant voltage circuit 220A. The enable signal EN is MON There are two thresholds V THH ,V THL The charge pump circuit 120A alternates between high and low states so that the output voltage V OUT is V THH × (R11 + R12 + R13) / (R12 + R13) as the upper limit, V THL The charge pump circuit 120A is stabilized within a voltage range with a lower limit of ×(R11+R12+R13) / (R12+R13). The state in which the enable signal EN alternates between high and low is the enable state of the charge pump circuit 120A.

[0100] Output voltage V OUT But V THL If the state where ×(R11+R12+R13) / (R12+R13) is exceeded continues, the enable signal EN is fixed to be negated. This state is the disabled state of the charge pump circuit 120A.

[0101] That is, the first comparator COMP1 has a function of switching between the enable state and the disable state of the charge pump circuit 120A, and a function of regulating the charge pump circuit 120A in the enable state. OUT <V THL × (R11 + R12 + R13) / (R12 + R13), so V THL × (R11+R12+R13) / (R12+R13) is the above-mentioned threshold voltage V TH(CP) It is considered to be equivalent to

[0102] Example 2 10 is a circuit diagram of a constant voltage circuit 220B according to the second embodiment. The difference from the first embodiment is the configuration of a charge pump circuit 120B. The charge pump circuit 120B further includes a second comparator COMP2 in addition to the charge pump circuit 120A of FIG.

[0103] The second comparator COMP2 is active when the charge pump circuit 120B is enabled. The second comparator COMP2 is active when the first terminal CPL of the flying capacitor Cf is low and the output voltage V OUT is compared with the voltage at the second terminal CPH of the flying capacitor Cf. Then, the output voltage V OUT is lower, the stop signal STOP is asserted.

[0104] When the stop signal STOP is asserted, the controller 122 forcibly puts the charge pump circuit 120B into a disabled state.

[0105] The above is the operation of the constant voltage circuit 220B.

[0106] The second comparator COMP2 is active during the period φ1 when the clock signal CLK is high and the first rectifier element 126 is on. At this time, the voltage at the second end CPH of the flying capacitor Cf is equal to the intermediate voltage V REGOUT In other words, the second comparator COMP2 outputs the voltage V OUT and the intermediate voltage V REGOUT are compared.

[0107] If the capacity of the charge pump circuit 120B is small compared to the load current, the output voltage V OUT is the intermediate voltage V REGOUT In the constant voltage circuit 220B according to the embodiment, this situation can be detected by the second comparator COMP2. OUT <V REGOUT In this case, by disabling the charge pump circuit 120B, the intermediate voltage V REGOUT output voltage V OUT and a higher output voltage V OUT can be supplied to the load.

[0108] Example 3 Fig. 11 is a circuit diagram of a constant voltage circuit 220C according to Example 3. The difference from Fig. 8 is the configuration of a charge pump circuit 120C. In the charge pump circuit 120C, the first rectifier element 126 and the second rectifier element 128 are each formed of a diode.

[0109] Example 4 12 is a circuit diagram of a constant voltage circuit 220D according to a fourth embodiment. In the charge pump circuit 120D, a second comparator COMP2 outputs an intermediate voltage V REGOUT The voltage Vx corresponding to the output voltage V OUT The voltage Vx is compared with the intermediate voltage V REGOUT It can be itself, or the intermediate voltage V REGOUT 12, it is possible to realize the same function as in the third embodiment. Furthermore, voltage comparison is possible regardless of the states φ1 and φ2 of the charge pump circuit 120D.

[0110] Alternatively, the second comparator COMP2 operates based on the input voltage V CC The voltage Vy according to the output voltage V OUT The voltage Vy can be compared with the input voltage V CC It can be itself or the input voltage V CC Alternatively, the voltage may be reduced by a predetermined voltage step.

[0111] As mentioned above, the input voltage V CC When V decreases, REGOUT =V CC -ΔV LDO and the input voltage V CC and intermediate voltage V REGOUT are essentially equal. Therefore, the intermediate voltage V REGOUT Instead of the input voltage V IN , the output voltage V OUT By comparing with the above, it is possible to realize the same function as in the third embodiment.

[0112] (Variation) The above-described embodiment is merely an example, and it will be understood by those skilled in the art that various modifications are possible in the combination of the components and the processing steps. Such modifications will be described below.

[0113] (Variation 1) In the embodiment, the power supply voltage V CC and constant voltage V REG However, the present disclosure is not limited to this. CC is the constant voltage V REG When the voltage is lower than , the first charge pump circuit 230 may be put into a disabled state, thereby reducing the power consumption of the circuit.

[0114] (Variation 2) In the constant voltage circuits 220B and 220D of FIGS. 10 and 12, the rectifying elements 126 and 128 may be configured with diodes.

[0115] (Variation 3) The implementation of the linear regulator 110 with a regulation function is not limited to intermittent operation using a hysteresis comparator. For example, the regulation function may be implemented by incorporating a feedback loop using an error amplifier.

[0116] Although the embodiments of the present disclosure have been described using specific terms, this description is merely an example to facilitate understanding and does not limit the scope of the present disclosure or the claims. The scope of the present invention is defined by the claims, and therefore, embodiments, examples, and modifications not described herein are also included in the scope of the present invention.

[0117] (Addendum) The present disclosure discloses the following techniques.

[0118] (Item 1) A motor driver circuit for driving a three-phase brushless motor, a power supply terminal for receiving a power supply voltage; A bootstrap terminal; a constant voltage circuit that receives the power supply voltage and generates a constant voltage; a first charge pump circuit that is enabled when the power supply voltage is higher than the constant voltage, and that, in the enabled state, generates a first voltage by adding the constant voltage to the power supply voltage as a reference; a second charge pump circuit that is enabled when the power supply voltage is lower than the constant voltage and is disabled when the power supply voltage is higher than the constant voltage, and that generates a second voltage by adding the constant voltage to the constant voltage in the enabled state; a current source that receives the first voltage and the second voltage and supplies a current to the bootstrap terminal; A motor driver circuit comprising:

[0119] (Item 2) 2. The motor driver circuit according to item 1, wherein the first charge pump circuit is enabled even when the power supply voltage is lower than the constant voltage.

[0120] (Item 3) 2. The motor driver circuit according to item 1, wherein the first charge pump circuit is disabled when the power supply voltage is lower than the constant voltage.

[0121] (Item 4) 4. The motor driver circuit according to any one of items 1 to 3, wherein the second charge pump circuit includes a diode provided in its output path.

[0122] (Item 5) The constant voltage circuit is a linear regulator having an input node connected to the power supply terminal and an output node, the linear regulator adjusting an intermediate voltage generated at the output node so that the constant voltage approaches a first target voltage; a Dickson charge pump circuit having a first input node receiving the intermediate voltage, a second input node receiving the power supply voltage, and an output node generating the constant voltage; Equipped with 5. The motor driver circuit according to any one of items 1 to 4, wherein the charge pump circuit is disabled when the constant voltage is higher than a threshold voltage that is set lower than the first target voltage, and in the disabled state outputs the voltage of the first input node to the output node, and is enabled when the constant voltage is lower than the threshold voltage, and in the enabled state stabilizes the constant voltage to a second target voltage that is set lower than the first target voltage.

[0123] (Item 6) the charge pump circuit includes a first comparator having hysteresis for comparing a monitored voltage corresponding to the constant voltage with an upper threshold and a lower threshold corresponding to the second target voltage; 6. The motor driver circuit according to item 5, wherein the charge pump circuit, in the enabled state, alternates between an operating period and a pause period depending on the output of the first comparator.

[0124] (Item 7) The charge pump circuit Flying capacitors, a driver circuit that alternately applies the power supply voltage and a ground voltage to a first end of the flying capacitor in the enabled state; a first rectifying element provided between the first input node and the second end of the flying capacitor; a second rectifying element provided between a second end of the flying capacitor and the output node; 7. The motor driver circuit according to item 5 or 6, comprising:

[0125] (Item 8) the charge pump circuit further includes a second comparator that compares the constant voltage with a voltage at the second end of the flying capacitor during a period when the first end of the flying capacitor is low while the charge pump circuit is in the enabled state, and asserts a stop signal when the constant voltage is lower; 8. The motor driver circuit according to item 7, wherein the charge pump circuit is in the disabled state when the stop signal is asserted.

[0126] (Item 9) the first rectifying element is a first synchronous rectifying transistor that switches in the enabled state and is in an on state in the disabled state; Item 9. The motor driver circuit of item 7 or 8, wherein the second rectifier element is a second synchronous rectifier transistor that switches complementarily to the first synchronous rectifier transistor in the enable state and is in an on state in the disable state.

[0127] (Item 10) 9. The motor driver circuit according to claim 7, wherein the first rectifying element and the second rectifying element are diodes.

[0128] (Item 11) the charge pump circuit further includes a second comparator that compares the constant voltage with the intermediate voltage and asserts a stop signal when the constant voltage is lower; 7. The motor driver circuit according to item 5 or 6, wherein the charge pump circuit is in the disabled state when the stop signal is asserted.

[0129] (Item 12) the charge pump circuit further includes a second comparator that compares the constant voltage with a voltage based on the power supply voltage and asserts a stop signal when the constant voltage is lower; 7. The motor driver circuit according to item 5 or 6, wherein the charge pump circuit is in the disabled state when the stop signal is asserted.

[0130] (Item 13) The linear regulator a first transistor having a source connected to the input node and a drain connected to the output node; a second transistor having a source connected to the input node and a gate and a drain connected to the gate of the first transistor; an error amplifier that receives a feedback voltage corresponding to the constant voltage and a reference voltage, and has an output connected to the gate of the first transistor and the gate and drain of the second transistor; 13. The motor driver circuit according to any one of items 5 to 12, comprising:

[0131] (Item 14) 14. The motor driver circuit according to any one of items 1 to 13, which is integrated on a single semiconductor substrate. [Explanation of symbols]

[0132] 110 Linear Regulator IN input node OUT output node FB Feedback Node 112 Error Amplifier 114 Output Stage 120 Charge pump circuit IN1 First input node IN2 Second input node Cf Flying Capacitor Co Output Capacitor COMP1 First comparator COMP2 Second comparator 122 Controller 124 Driver Circuit 126 First rectifier element 128 Second rectifier element 400 Motor Circuit 402 Three-phase motor 410 Three-phase inverter 200 Motor driver circuit 210 Gate driver circuit 212 High Side Driver 214 Low Side Driver 216 Rectifying element 220 Constant voltage circuit 102 Input terminal 104 Output terminal 230 First charge pump circuit 240 Second charge pump circuit 250 current source

Claims

1. A motor driver circuit for driving a three-phase brushless motor, a power supply terminal for receiving a power supply voltage; A bootstrap terminal; a constant voltage circuit that receives the power supply voltage and generates a constant voltage; a first charge pump circuit that is enabled when the power supply voltage is higher than the constant voltage, and that, in the enabled state, generates a first voltage by adding the constant voltage to the power supply voltage as a reference; a second charge pump circuit that is enabled when the power supply voltage is lower than the constant voltage and is disabled when the power supply voltage is higher than the constant voltage, and that, in the enabled state, generates a second voltage by adding the constant voltage to the constant voltage as a reference; a current source that receives the first voltage and the second voltage and supplies a current to the bootstrap terminal; A motor driver circuit comprising:

2. 2. The motor driver circuit according to claim 1, wherein the first charge pump circuit is enabled even when the power supply voltage is lower than the constant voltage.

3. 2. The motor driver circuit according to claim 1, wherein the first charge pump circuit is disabled when the power supply voltage is lower than the constant voltage.

4. 4. The motor driver circuit according to claim 1, wherein the second charge pump circuit includes a diode provided in an output path thereof.

5. The constant voltage circuit is a linear regulator having an input node connected to the power supply terminal and an output node, the linear regulator adjusting an intermediate voltage generated at the output node so that the constant voltage approaches a first target voltage; a Dickson-type charge pump circuit having a first input node receiving the intermediate voltage, a second input node receiving the power supply voltage, and an output node generating the constant voltage; Equipped with 4. The motor driver circuit according to claim 1, wherein the charge pump circuit is disabled when the constant voltage is higher than a threshold voltage that is set lower than the first target voltage, and in the disabled state outputs the voltage of the first input node to the output node, and is enabled when the constant voltage is lower than the threshold voltage, and in the enabled state stabilizes the constant voltage to a second target voltage that is set lower than the first target voltage.

6. the charge pump circuit includes a first comparator having hysteresis for comparing a monitored voltage corresponding to the constant voltage with an upper threshold and a lower threshold corresponding to the second target voltage; 6. The motor driver circuit according to claim 5, wherein the charge pump circuit, in the enabled state, alternates between an active period and a quiescent period in response to the output of the first comparator.

7. The charge pump circuit Flying capacitors, a driver circuit that alternately applies the power supply voltage and a ground voltage to a first end of the flying capacitor in the enabled state; a first rectifying element provided between the first input node and the second end of the flying capacitor; a second rectifying element provided between a second end of the flying capacitor and the output node; 6. The motor driver circuit of claim 5, comprising:

8. the charge pump circuit further includes a second comparator that compares the constant voltage with a voltage at the second end of the flying capacitor during a period when the charge pump circuit is in the enabled state and the first end of the flying capacitor is low, and asserts a stop signal when the constant voltage is lower; 8. The motor driver circuit according to claim 7, wherein the charge pump circuit is put into the disabled state when the stop signal is asserted.

9. the first rectifying element is a first synchronous rectifying transistor that switches in the enabled state and is in an on state in the disabled state; 8. The motor driver circuit according to claim 7, wherein the second rectifying element is a second synchronous rectifying transistor that switches complementarily to the first synchronous rectifying transistor in the enabled state and is in an on state in the disabled state.

10. The motor driver circuit according to claim 7 , wherein the first rectifying element and the second rectifying element are diodes.

11. the charge pump circuit further includes a second comparator that compares the constant voltage with the intermediate voltage and asserts a stop signal when the constant voltage is lower; 6. The motor driver circuit according to claim 5, wherein the charge pump circuit is put into the disabled state when the stop signal is asserted.

12. the charge pump circuit further includes a second comparator that compares the constant voltage with a voltage based on the power supply voltage and asserts a stop signal when the constant voltage is lower; 6. The motor driver circuit according to claim 5, wherein the charge pump circuit is put into the disabled state when the stop signal is asserted.

13. The linear regulator a first transistor having a source connected to the input node and a drain connected to the output node; a second transistor having a source connected to the input node and a gate and a drain connected to the gate of the first transistor; an error amplifier that receives a feedback voltage corresponding to the constant voltage and a reference voltage, and has an output connected to the gate of the first transistor and the gate and drain of the second transistor; 6. The motor driver circuit of claim 5, comprising:

14. 4. The motor driver circuit according to claim 1, which is integrated on a single semiconductor substrate.

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