Semiconductor device
By using oxide semiconductor transistors and capacitors, the issue of increased power consumption and operational delays in semiconductor integrated circuits is addressed, achieving reduced power usage and rapid operation resumption.
JP2025169414AActive Publication Date: 2025-11-12SEMICON ENERGY LAB CO LTD
Patent Information
- Application Number
- JP2025139511
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2011-05-13
- Filing Date
- 2025-08-25
- Publication Date
- 2025-11-12
- Estimated Expiration
- 2031-08-02
AI Technical Summary
Technical Problem
In semiconductor integrated circuits with a large number of elements, power consumption increases due to leakage current when power gating is used, leading to data loss in memory circuits and operational delays.
Method used
Incorporating transistors with a channel formation region made of an oxide semiconductor and a capacitor to maintain node potential during power gating, reducing leakage current and allowing seamless resumption of operations without data loss.
Benefits of technology
The solution effectively reduces power consumption and operational delays by maintaining node potential during power gating, ensuring data integrity and swift resumption of operations.
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Smart Images
Figure 2025169414000001_ABST
Abstract
To provide a semiconductor integrated circuit in which the consumption power can be reduced and the delay of the operation can be reduced.SOLUTION: In each of a plurality of sequential circuits 21_1 to 21_n included in a storage circuit 11, which is a semiconductor integrated circuit, a transistor 31 whose channel formation region is formed of an oxide semiconductor and a capacitative element 32 in which a node with one electrode electrically connected becomes floating when the transistor is turned off are provided. When the channel formation region of the transistor is formed of the oxide semiconductor, the transistor whose off current (leak current) is extremely low can be achieved. Therefore, in a period for which a power supply voltage is not supplied to the storage circuit, the transistor is turned off, so that the potential of the node to which one electrode of the capacitative element is electrically connected in this period can be kept constant or substantially constant.SELECTED DRAWING: Figure 1
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Citation Information
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