Failure inference apparatus for power supply circuit, electronic control apparatus, failure learning apparatus for power supply circuit, failure inference method for power supply circuit, and failure learning method for power supply circuit

Abstract

To provide a failure inference apparatus for a power supply circuit, an electronic control apparatus, a failure learning apparatus for a power supply circuit, a failure inference method for a power supply circuit, and a failure learning method for a power supply circuit, capable of predicting a failure before the failure occurs.SOLUTION: A failure inference apparatus 110A for a power supply circuit includes: a data acquisition unit 111A for acquiring multiple sets each including an operating time of a power supply circuit 301A and an output voltage of the power supply circuit 301A during the operating time; and an inference unit 111A for estimating a time until the power supply circuit 301A result in failure by inputting the acquired multiple sets into a learned model for estimating the time until the power supply circuit 301A result in failure from multiple sets each including the operating time of the power supply circuit 301A and the output voltage of the power supply circuit 301A during the operating time.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] The present disclosure relates to a power supply circuit fault inference device, an electronic control device, a power supply circuit fault learning device, a power supply circuit fault inference method, and a power supply circuit fault learning method. [Background technology]

[0002] Electronic control devices are equipped with power supply circuits that generate and output the necessary voltage from the input voltage. If the power supply circuit fails and is no longer able to output the necessary voltage, the electronic control device will no longer function properly, so methods for detecting power supply circuit failures are known.

[0003] For example, a fault detection device described in Patent Document 1 includes a plurality of sensors, an AD converter that converts the output voltages of the plurality of sensors into digital values, and a reference voltage supply means that supplies a reference voltage to the plurality of sensors and the AD converter. This fault detection device also includes a means for determining that a sensor has failed when it is detected that the AD-converted value of the output voltage of any of the plurality of sensors is outside a predetermined range set for that sensor, and a means for determining that the reference voltage generation means has failed when it is detected that at least two of the AD-converted values ​​of the output voltages of the plurality of sensors are outside the predetermined range. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 4-81615 Summary of the Invention [Problem to be solved by the invention]

[0005] Some electronic control devices can simply handle the abnormality as soon as a malfunction is detected, but for example, electronic control devices installed in vehicles where human lives are at stake have the problem that handling the abnormality after malfunction detection is not fast enough.

[0006] Therefore, an object of the present disclosure is to provide a power supply circuit fault inference device, an electronic control device, a power supply circuit fault learning device, a power supply circuit fault inference method, and a power supply circuit fault learning method that can predict a fault before the fault occurs. [Means for solving the problem]

[0007] The power supply circuit failure inference device disclosed herein includes a data acquisition unit that acquires multiple sets of operating times of the power supply circuit and output voltages of the power supply circuit during those operating times, and an inference unit that inputs the multiple acquired sets into a trained model that estimates the time until the power supply circuit fails from the operating times of the power supply circuit and the multiple sets of output voltages of the power supply circuit during those operating times, thereby estimating the time until the power supply circuit fails. [Effects of the Invention]

[0008] According to the present disclosure, failures can be predicted before they occur. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 2 is a diagram showing the configuration of a model generating device 5. [Figure 2] 1 is a flowchart showing a procedure for generating a trained model according to the first embodiment. [Figure 3] 10 is a flowchart showing the procedure of step S107. [Figure 4] FIG. 3 is a diagram for explaining learning data according to the first embodiment. [Figure 5] 10(a), (b), and (c) are diagrams showing training data LR(1), LR(2), and LR(3) according to the first embodiment. [Figure 6] FIG. 1 is a diagram illustrating a neural network. [Figure 7] 1 is a diagram showing the configuration of an electronic control device 1 according to a first embodiment. [Figure 8] 4 is a flowchart showing a procedure of fault inference according to the first embodiment. [Figure 9]10 is a flowchart showing the procedure of step S306. [Figure 10] FIG. 10 is a diagram illustrating a configuration of a model generating device 5A according to a second embodiment. [Figure 11] 10 is a flowchart showing the procedure for generating a trained model according to the second embodiment. [Figure 12] 10 is a flowchart showing the procedure of step S107A. [Figure 13] 10(a), (b), and (c) are diagrams showing training data LR(1), LR(2), and LR(3) according to the second embodiment. [Figure 14] FIG. 10 is a diagram showing the configuration of an electronic control device 1A according to a second embodiment. [Figure 15] 10 is a flowchart showing a procedure for fault inference according to the second embodiment. [Figure 16] 10 is a flowchart showing the procedure of step S306A. [Figure 17] 10 is a flowchart showing the procedure for generating a trained model according to the third embodiment. [Figure 18] 10 is a flowchart showing the procedure of step S107B. [Figure 19] FIG. 11 is a diagram for explaining learning data according to the third embodiment. [Figure 20] 10(a), (b), and (c) are diagrams showing training data LR(1), LR(2), and LR(3) according to the third embodiment. [Figure 21] 11 is a flowchart showing a procedure of fault inference according to the third embodiment. [Figure 22] 10 is a flowchart showing the procedure of step S306B. DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments will be described with reference to the drawings. Embodiment 1

[0011] The electronic control unit of this embodiment uses a trained model to infer a failure. In the following description, first, a model generation device and a model generation method for creating the trained model will be described. (Model generation device)

[0012] 1 is a diagram showing the configuration of a model generating device 5. The model generating device 5 includes a power supply circuit 301, an ADC 701, a CPU processing unit 600, and a plurality of electronic components 3-1 to 3-M. The model generating device 5 controls a plurality of control target components 2-1 to 2-N.

[0013] The power supply circuit 301 generates and outputs a required voltage from an input voltage from the external power supply 400. The power supply circuit 301 outputs a voltage V. The ADC 701, each component in the CPU processing unit 600, and multiple electronic components 3-1 to 3-M operate on the output voltage V from the power supply circuit 301. The ADC 701 converts the voltage output by the power supply circuit 301 into a digital value.

[0014] The CPU processing unit 600 includes a CPU 603, an I / O 601, a ROM 602, a RAM 604, a nonvolatile memory 605, and a fault learning device 610. The I / O 601 is a component that connects the CPU processing unit 600 and the ADC 701. The ROM 602 is a non-rewritable memory that stores a program for a series of processing procedures of the CPU processing unit 600. When the model generating device 5 is started, the CPU 603 can perform the series of processing procedures by reading data from the ROM 602. The RAM 604 is a rewritable memory that can be used to temporarily store data. The non-volatile memory 605 is a rewritable memory that can store data even when power is not supplied to the model generating device 5.

[0015] The fault learning device 610 is provided corresponding to the power supply circuit 301. The fault learning device 610 is not a general-purpose component, and therefore can use a component whose configuration can be changed, such as an FPGA (Field Programmable Gate Array). The fault learning device 610 includes a learning data creation unit 611, a learning data storage unit 612, a data acquisition unit 613, a model generation unit 614, and a trained model storage unit 615.

[0016] The learning data creation unit 611 creates learning data from a set of the operating time of the power supply circuit 301, the output voltage of the power supply circuit 301 during that operating time, and the lifetime of the power supply circuit 301. When the power supply circuit 301 fails, multiple pieces of learning data can be obtained by replacing the power supply circuit 301 with another power supply circuit 301 of the same type.

[0017] The learning data storage unit 612 stores the learning data created by the learning data creation unit 611.

[0018] The data acquisition unit 613 acquires multiple pieces of learning data from the learning data storage unit 612, with input data being a set of the operating time of the power supply circuit 301 and the output voltage of the power supply circuit 301 during that operating time, and output data being the time until the power supply circuit 301 fails.

[0019] The model generation unit 614 uses the acquired learning data to generate a trained model that estimates the time until the power supply circuit 301 fails based on the operating time of the power supply circuit 301 and multiple sets of output voltages of the power supply circuit 301 during that operating time.

[0020] The trained model storage unit 615 stores the trained model generated by the model generation unit 614. (Fault learning procedure) FIG. 2 is a flowchart showing a procedure for generating a trained model according to the first embodiment.

[0021] In step S101, when a voltage is supplied from the external power supply 400 to the electronic control device 1, the model generating device 5 is started. The power supply circuit 301 generates and outputs a voltage V.

[0022] In step S102, the timer included in the CPU 603 reads the count values ​​(operating time of the model generating device 5 and operating time of the power supply circuit 301) stored in the volatile memory 605, updates the count values ​​by the increased operating time, and stores the updated count values ​​in the volatile memory 605. When the model generating device 5 is operating, it is assumed that the CPU 603 and the power supply circuit 301 are always running. The CPU 603 updates the count values ​​(operating time) stored in the non-volatile memory 605.

[0023] In step S103, when the operating time reaches a predetermined interval time K×T1, the process proceeds to step S104, where K is a natural number equal to or greater than 1. T1 may be set to, for example, 10 hours.

[0024] In step S104, the CPU 603 drives the ADC 701 via the I / O 101 to obtain a digital value obtained by converting the output voltage of the power supply circuit 301. The CPU 603 saves a set of the operating time of the power supply circuit 301 and the digital value obtained by converting the output voltage of the power supply circuit 301 in the non-volatile memory 605. A similar operation is repeated every fixed period of operating time. This provides a set of the operating time t(1) of the power supply circuit 301 and the output voltage V(1) of the power supply circuit 301 during that operating time t(1), a set of the operating time t(2) of the power supply circuit 301 and the output voltage V(2) of the power supply circuit 301 during that operating time t(2), a set of the operating time t(3) of the power supply circuit 301 and the output voltage V(3) of the power supply circuit 301 during that operating time t(3), and so on.

[0025] In step S105, if the digital value V of the output voltage of the power supply circuit 301 is not within the defined range, that is, if it exceeds the upper limit value VU or is less than the lower limit value VL, the process proceeds to step S106.

[0026] In step S106, the CPU 603 determines that the power supply circuit 301 has failed, and sets the operating time at that time as the life time R of the power supply circuit 301, and stores this in the nonvolatile memory 605.

[0027] By performing the processing of steps S101 to S106 for a plurality of power supply circuits 301 of the same type, data for the plurality of power supply circuits 301 is obtained.

[0028] In step S107, the CPU 103 outputs a command to learn a fault to the fault learning device 610. The fault learning device 610 generates the trained model of the first embodiment. FIG. 3 is a flowchart showing the procedure of step S107.

[0029] In step S201, the learning data creation unit 611 creates learning data and stores it in the learning data storage unit 612.

[0030] 4 is a diagram for explaining the learning data of the first embodiment. The output voltages V(1), V(2), V(3), and V(4) of the power supply circuit 301 at operating times t(1), t(2), t(3), and t(4) are shown. The lifetime R of the power supply circuit 301, which is the operating time when the output voltage of the power supply circuit 301 exceeds the upper limit value VU, is shown. The operating times WT(1), WT(2), WT(3), and WT(4) from operating times t(1), t(2), t(3), and t(4) until the lifetime R is reached, i.e., until failure, are shown.

[0031] 5(a), (b), and (c) are diagrams showing the learning data LR(1), LR(2), and LR(3) of the first embodiment. The learning data creation unit 611 receives as input data a set of the operating time t(i) of the power supply circuit 301 and the output voltage V(i) of the power supply circuit 301 during that operating time t(i), and generates learning data LR(1) having as output data the operating time WT(10) (=Rt(10)) of the power supply circuit 301 from operating time t(10) until a failure occurs, where i = 1 to 10. The learning data creation unit 611 receives as input data a set of the operating time t(i) of the power supply circuit 301 and the output voltage V(i) of the power supply circuit 301 during that operating time t(i), and generates learning data LR(2) having as output data the operating time WT(20) (=Rt(20)) of the power supply circuit 301 from operating time t(20) until a failure occurs, where i = 1 to 20. The learning data creation unit 611 receives as input data a set of the operating time t(i) of the power supply circuit 301 and the output voltage V(i) of the power supply circuit 301 during that operating time t(i), and creates learning data LR(3) having as output data the operating time WT(30) (=Rt(30)) of the power supply circuit 301 from operating time t(30) until a failure occurs, where i = 1 to 30. In a similar manner, the learning data creation unit 611 creates learning data LR(4), LR(5), etc. A plurality of pieces of learning data LR(1), LR(2), LR(3), etc. are obtained from data on a plurality of power supply circuits 301.

[0032] In step S202, the data acquisition unit 613 acquires a plurality of pieces of learning data LR(1), LR(2), LR(3), . . . from the learning data storage unit 612.

[0033] In step S203, the model generation unit 614 uses multiple pieces of learning data LR(1), LR(2), LR(3), etc. to generate a trained model MR that estimates the operating time of the power supply circuit 301 from its current operating time until a failure occurs, based on time series data of a set of the operating time of the power supply circuit 301 and the output voltage of the power supply circuit 301 during that operating time, and stores the trained model MR in the trained model storage unit 615.

[0034] The learning algorithm used by the model generation unit 614 may be a known algorithm such as supervised learning, unsupervised learning, or reinforcement learning. As an example, a case where a neural network is applied will be described.

[0035] The model generation unit 614 performs so-called supervised learning, for example, according to a neural network model. Here, supervised learning refers to a technique in which a learning device is provided with a set of input and result (label) data, and the device learns the features of the learning data and infers the result from the input.

[0036] A neural network consists of an input layer consisting of multiple neurons, an intermediate layer (hidden layer) consisting of multiple neurons, and an output layer consisting of multiple neurons. The intermediate layer may be one or more layers.

[0037] For example, in a neural network like the one shown in Figure 6, when input data is input to the input layer, the value is multiplied by a weight and then input to the intermediate layer. The value of the data input to the intermediate layer is again multiplied by a weight and then input to the next intermediate layer. Finally, the result is output from the output layer. The output result changes depending on the value of the neural network's weight.

[0038] In the present application, the neural network generates a trained model through supervised learning based on a combination of input data of the training data acquired by the data acquisition unit 613 and output data (correct answers) of the training data.

[0039] That is, by inputting the training data into the input layer and adjusting the weights of the neural network so that the results output from the output layer approach the training data output data, a trained model represented by the trained weights is generated. (Electronic control unit) FIG. 7 is a diagram showing the configuration of the electronic control device 1 according to the first embodiment.

[0040] The electronic control device 1 includes power supply circuits 301A, 301B, and 301C, an ADC 201, a CPU processing unit 100, and multiple electronic components 3-1 to 3-M. For the sake of explanation, there are three power supply circuits and one ADC, but the number of power supply circuits and the number of ADCs may be any number. The electronic control device 1 controls multiple control target components 2-1 to 2-N. The electronic control device 1 is connected to a higher-level management device 4.

[0041] The power supply circuits 301A, 301B, and 301C generate and output the required voltages from the input voltage from the external power supply 400.

[0042] ADC 201, each component in CPU processing unit 100, and multiple electronic components 3-1 to 3-N operate on any one of the output voltages from power supply circuit 301A, the output voltage from power supply circuit 301B, and the output voltage from power supply circuit 301C. By generating multiple voltages using multiple power supply circuits 301A, 301B, and 301C and supplying them to the components, the number of types of input voltages supplied to electronic control device 1 can be minimized (here, to one).

[0043] The ADC 201 converts the voltages output by the power supply circuits 301A, 301B, and 301C into digital values. The CPU processing unit 100 includes a CPU 103, an I / O 101, a ROM 102, a RAM 104, a nonvolatile memory 105, and fault inference devices 110A, 110B, and 110C. The I / O 101 is a component that connects the CPU processing unit 100 and the ADC 201. The ROM 102 is a non-rewritable memory that stores a program for a series of processing procedures of the CPU processing unit 100. When the electronic control unit 1 is started, the CPU 103 can perform the series of processing procedures by reading data from the ROM 102. The RAM 104 is a rewritable memory that can be used to temporarily store data. The non-volatile memory 105 is a rewritable memory that can store data even when power is not supplied to the electronic control unit 1.

[0044] The fault inference devices 110A, 110B, and 110C are provided corresponding to the power supply circuits 301A, 301B, and 301C, respectively. The fault inference devices 110A, 110B, and 110C are not general-purpose components, and therefore can use components whose configuration can be changed, such as FPGAs. The fault inference device 110A includes a data acquisition unit 111A, an inference unit 112A, and a trained model storage unit 113A.

[0045] The data acquiring unit 111A acquires a plurality of sets of the operating time of the power supply circuit 301A and the output voltage of the power supply circuit 301A during that operating time.

[0046] The trained model storage unit 113A stores the trained model MRA generated by the model generation device 5 including the power supply circuit 301A.

[0047] The inference unit 112A inputs the acquired multiple sets into a learned model MRA that estimates the time until the power supply circuit 301A fails from the operating time of the power supply circuit 301A and multiple sets of the output voltage of the power supply circuit during that operating time, and estimates the time until the power supply circuit 301A fails.

[0048] The configurations of the fault inference devices 110B and 110C are similar to that of the fault inference device 110A, and therefore description thereof will not be repeated. The trained model storage unit 113B of the fault inference device 110B stores the trained model MRB generated by the model generation device 5 including the power supply circuit 301B. The trained model storage unit 113C of the fault inference device 110C stores the trained model MRC generated by the model generation device 5 including the power supply circuit 301C. (Fault inference procedure) FIG. 8 is a flowchart showing the procedure of fault inference according to the first embodiment.

[0049] In step S301, when a voltage is supplied to the electronic control unit 1 from the external power supply 400, the electronic control unit 1 starts up. The power supply circuits 301A, 301B, and 301C each generate a voltage from the input voltage from the external power supply 400 and output the voltage.

[0050] In step S302, a timer included in CPU 103 counts the operating time of electronic control device 1 and power supply circuits 301A, 301B, and 301C. When electronic control device 1 is operating, CPU 103 and power supply circuits 301A, 301B, and 301C are assumed to be always active. CPU 103 updates the count value (operating time) stored in nonvolatile memory 105.

[0051] In step S303, when the operating time reaches a predetermined interval time K×T1, the process proceeds to step S304, where K is a natural number equal to or greater than 1. T1 may be set to, for example, 10 hours.

[0052] In step S304, the CPU 103 drives the ADC 201 via the I / O 101 to obtain digital values ​​VA, VB, and VC converted from the output voltages of the power supply circuits 301A, 301B, and 301C. The CPU 103 stores a set of the operating times of the power supply circuits 301A, 301B, and 301C and the digital values ​​converted from the output voltages of the power supply circuits 301A, 301B, and 301C in the nonvolatile memory 105. The same operation is repeated every fixed time interval of the operating time. This sets the operating time t(1) of the power supply circuit 301A and the output voltage VA(1) of the power supply circuit 301A during that operating time t(1), the operating time t(1) of the power supply circuit 301B and the output voltage VB(1) of the power supply circuit 301B during that operating time t(1), the operating time t(1) of the power supply circuit 301C and the output voltage VC(1) of the power supply circuit 301C during that operating time t(1), the operating time t(2) of the power supply circuit 301A and the output voltage VA(2) of the power supply circuit 301A during that operating time t(2), the operating time t(2) of the power supply circuit 301B and the output voltage VC(1) of the power supply circuit 301C during that operating time t(2), (2) A set of output voltage VB(2) of power supply circuit 301B for operation time t(2) of power supply circuit 301C and a set of output voltage VC(2) of power supply circuit 301C for that operation time t(2) A set of output voltage VA(3) of power supply circuit 301A for operation time t(3) of power supply circuit 301A and a set of output voltage VB(3) of power supply circuit 301B for operation time t(3) of power supply circuit 301B and a set of output voltage VC(3) of power supply circuit 301C for operation time t(3)

[0053] In step S305, if the operating time reaches a predetermined interval time K×T2, or if a specific event occurs, the process proceeds to step S306. K is a natural number equal to or greater than 1. T2 may be, for example, 100 hours. The specific event may be, for example, the startup of the electronic control unit 1 or the shutdown of the electronic control unit 1.

[0054] In step S306, the CPU 103 outputs a command to infer a fault to the fault inference devices 110A, 110B, and 110C. The fault inference devices 110A, 110B, and 110C infer faults in the power supply circuits 301A, 301B, and 301C, respectively. FIG. 9 is a flowchart showing the procedure of step S306.

[0055] In step S401, data acquisition unit 111A acquires from nonvolatile memory 105 a set of operation time t(i) of power supply circuit 301A and the output voltage VA(i) of power supply circuit 301A during that operation time t(i). Data acquisition unit 111B acquires from nonvolatile memory 105 a set of operation time t(i) of power supply circuit 301B and the output voltage VB(i) of power supply circuit 301B during that operation time t(i). Data acquisition unit 111C acquires from nonvolatile memory 105 a set of operation time t(i) of power supply circuit 301C and the output voltage VC(i) of power supply circuit 301C during that operation time t(i), where i = 1 to n, and n is the total number of data sets stored in nonvolatile memory 105.

[0056] In step S402, the inference unit 112A infers the operating time WTA of the power supply circuit 301A from the current operating time until a failure by inputting the time series data of the set of operating time acquired by the data acquisition unit 111A and the output voltage VA of the power supply circuit 301A at that operating time into the trained model MRA, and outputs the inference result to the CPU 103. The inference unit 112B infers the operating time WTB of the power supply circuit 301B from the current operating time until a failure by inputting the time series data of the set of operating time acquired by the data acquisition unit 111B and the output voltage VB of the power supply circuit 301B at that operating time into the trained model MRB, and outputs the inference result to the CPU 103. The inference unit 112C infers the operating time WTC of the power supply circuit 301C from the current operating time until a failure by inputting the time series data of the set of operating time acquired by the data acquisition unit 111C and the output voltage VC of the power supply circuit 301C at that operating time into the trained model MRC, and outputs the inference result to the CPU 103. The description will continue with reference to FIG.

[0057] In step S307, CPU 103 estimates the minimum of the following values ​​as the time WT1 from the current operating time to the failure of power supply circuit 301A: WTA, the time WTB from the current operating time to the failure of power supply circuit 301B: WTC, and the time WTC from the current operating time to the failure of power supply circuit 301C. CPU 103 transmits at least one of the following values ​​to the host management device 4: WTA, the time WTB from the current operating time to the failure of power supply circuit 301A: WTC, the time WTC from the current operating time to the failure of power supply circuit 301B: WTC, and the time WT1 from the current operating time to the failure of power supply circuit 301C. Based on the received operating time information, the host management device 4 can determine when to replace the electronic control device 1 and notify the user. Alternatively, the host management device 4 may shut down the electronic control device 1 when the determined replacement time for the electronic control device 1 is reached.

[0058] If it is determined in step S308 that the fault inference is not to be ended, the process returns to step S302.

[0059] As described above, according to this embodiment, by predicting the operating time until the power supply circuit and electronic control device fail based on the time series data of the set of operating time and output voltage of the power supply circuit, it is possible to predict a failure of the power supply circuit and electronic control device before the failure actually occurs. Embodiment 2 (Model generation device)

[0060] 10 is a diagram showing the configuration of a model generation device 5A according to embodiment 2. Model generation device 5A according to embodiment 2 differs from model generation device 5 according to embodiment 1 in that model generation device 5A according to embodiment 2 includes a temperature sensor 7.

[0061] The temperature sensor 7 is disposed adjacent to the power supply circuit 301. The temperature sensor 7 detects the temperature of the power supply circuit 301.

[0062] The learning data creation unit 611 creates learning data from the operating time of the power supply circuit 301, a set of the output voltage and temperature of the power supply circuit 301 during that operating time, and the lifetime of the power supply circuit 301.

[0063] The learning data storage unit 612 stores the learning data created by the learning data creation unit 611.

[0064] The data acquisition unit 613 acquires multiple pieces of learning data in which input data is a set of the operating time of the power supply circuit 301 and the output voltage and temperature of the power supply circuit 301 during that operating time, and output data is the time until the power supply circuit 301 fails.

[0065] The model generation unit 614 uses the acquired learning data to generate a trained model that estimates the time until the power supply circuit 301 fails based on the operating time of the power supply circuit 301 and multiple sets of the output voltage and temperature of the power supply circuit 301 during that operating time.

[0066] The trained model storage unit 615 stores the trained model generated by the model generation unit 614. (Fault learning procedure)

[0067] Fig. 11 is a flowchart showing the procedure for generating a trained model according to embodiment 2. The flowchart in Fig. 11 differs from the flowchart in Fig. 2 according to embodiment 1 in that the flowchart in Fig. 11 includes steps S104A and S107A instead of steps S104 and S107.

[0068] In step S104A, the CPU 603 drives the ADC 701 via the I / O 101 to obtain a digital value obtained by converting the output voltage of the power supply circuit 301. The CPU 603 obtains the temperature of the power supply circuit 301 from the temperature sensor 7. The CPU 603 stores a set of the operating time of the power supply circuit 301, the digital value obtained by converting the output voltage of the power supply circuit 301, and the temperature of the power supply circuit 301 in the non-volatile memory 605. A similar operation is repeated every fixed period of operating time. This provides a set of the operating time t(1) of the power supply circuit 301 and the output voltage V(1) and temperature C(1) of the power supply circuit 301 during that operating time t(1), a set of the operating time t(2) of the power supply circuit 301 and the output voltage V(2) and temperature C(2) of the power supply circuit 301 during that operating time t(2), a set of the operating time t(3) of the power supply circuit 301 and the output voltage V(3) and temperature C(3) of the power supply circuit 301 during that operating time t(3), and so on.

[0069] In step S107A, the CPU 103 outputs a command to learn a fault to the fault learning device 610. The fault learning device 610 generates the trained model of the second embodiment. FIG. 12 is a flowchart showing the procedure of step S107A.

[0070] In step S201A, the learning data creation unit 611 creates learning data and stores it in the learning data storage unit 612.

[0071] 13(a), (b), and (c) are diagrams showing the learning data LR(1), LR(2), and LR(3) of the second embodiment. The learning data creation unit 611 receives as input data the operating time t(i) of the power supply circuit 301 and a set of the output voltage V(i) and temperature C(i) of the power supply circuit 301 during that operating time t(i), and creates learning data LR(1) having as output data the operating time WT(10) (=Rt(10)) of the power supply circuit 301 from operating time t(10) until it fails, where i = 1 to 10. The learning data creation unit 611 receives as input data the operating time t(i) of the power supply circuit 301 and a set of the output voltage V(i) and temperature C(i) of the power supply circuit 301 during that operating time t(i), and creates learning data LR(2) having as output data the operating time WT(20) (=Rt(20)) of the power supply circuit 301 from operating time t(20) until it fails. Here, i = 1 to 20. The learning data creation unit 611 receives as input data the operating time t(i) of the power supply circuit 301 and a set of the output voltage V(i) and temperature C(i) of the power supply circuit 301 during that operating time t(i), and creates learning data LR(3) having as output data the operating time WT(30) (= Rt(30)) of the power supply circuit 301 from operating time t(30) until a failure occurs. Here, i = 1 to 30. In a similar manner, the learning data creation unit 611 creates learning data LR(4), LR(5), etc. A plurality of pieces of learning data LR(1), LR(2), LR(3), etc. are obtained from data on a plurality of power supply circuits 301.

[0072] In step S202, the data acquisition unit 613 acquires a plurality of pieces of learning data LR(1), LR(2), LR(3), . . . from the learning data storage unit 612.

[0073] In step S203, the model generation unit 614 uses multiple pieces of learning data LR(1), LR(2), LR(3), etc. to generate a trained model MR that estimates the operating time of the power supply circuit 301 from the current operating time until a failure occurs, based on time series data of the operating time of the power supply circuit 301 and the set of output voltage and temperature of the power supply circuit 301 during that operating time, and stores the trained model MR in the trained model storage unit 615. (Electronic control unit) FIG. 14 is a diagram showing the configuration of an electronic control device 1A according to the second embodiment.

[0074] The electronic control device 1A of the second embodiment differs from the electronic control device 1 of the first embodiment in that the electronic control device 1A of the second embodiment includes temperature sensors 7A, 7B, and 7C.

[0075] Temperature sensor 7A is arranged adjacent to power supply circuit 301A. Temperature sensor 7A detects the temperature of power supply circuit 301A. Temperature sensor 7B is arranged adjacent to power supply circuit 301B. Temperature sensor 7B detects the temperature of power supply circuit 301B. Temperature sensor 7C is arranged adjacent to power supply circuit 301C. Temperature sensor 7C detects the temperature of power supply circuit 301C.

[0076] The data acquisition unit 111A acquires a plurality of sets of the operating time of the power supply circuit 301A and the output voltage and temperature of the power supply circuit 301A during that operating time.

[0077] The trained model storage unit 113A stores the trained model MRA generated by the model generation device 5 including the power supply circuit 301A.

[0078] The inference unit 112A inputs the acquired multiple sets into a trained model that estimates the time until the power supply circuit 301A fails from the operating time of the power supply circuit 301A and multiple sets of the output voltage and temperature of the power supply circuit during that operating time, and estimates the time until the power supply circuit 301A fails.

[0079] The configurations of the fault inference devices 110B and 110C are similar to that of the fault inference device 110A, and therefore description thereof will not be repeated. The trained model storage unit 113B of the fault inference device 110B stores the trained model MRB generated by the model generation device 5 including the power supply circuit 301B. The trained model storage unit 113C of the fault inference device 110C stores the trained model MRC generated by the model generation device 5 including the power supply circuit 301C. (Fault inference procedure) FIG. 15 is a flowchart showing the procedure of fault inference according to the second embodiment.

[0080] The flowchart in FIG. 15 differs from the flowchart in FIG. 8 of the first embodiment in that the flowchart in FIG. 15 includes steps S304A and S306A instead of steps S304 and S306.

[0081] In step S304A, CPU 103 drives ADC 201 via I / O 101 to obtain digital values ​​VA, VB, and VC converted from the output voltages of power supply circuits 301A, 301B, and 301C. CPU 103 obtains the temperatures of power supply circuits 301A, 301B, and 301C from temperature sensors 7A, 7B, and 7C. CPU 103 stores a set of the operating times of power supply circuits 301A, 301B, and 301C, the digital values ​​converted from the output voltages of power supply circuits 301A, 301B, and 301C, and the temperatures in non-volatile memory 105. The same operation is repeated every fixed time interval of the operating time. This results in a set of the operating time t(1) of the power supply circuit 301A and the output voltage VA(1) and temperature CA(1) of the power supply circuit 301A during that operating time t(1), a set of the operating time t(1) of the power supply circuit 301B and the output voltage VB(1) and temperature CB(1) of the power supply circuit 301B during that operating time t(1), a set of the operating time t(1) of the power supply circuit 301C and the output voltage VC(1) and temperature CC(1) of the power supply circuit 301C during that operating time t(1), a set of the operating time t(2) of the power supply circuit 301A and the output voltage VA(2) and temperature CA(2) of the power supply circuit 301A during that operating time t(2), and a set of the operating time t(2) of the power supply circuit 301B during that operating time t (2) a set of output voltage VB(2) and temperature CB(2) of power supply circuit 301B, an operating time t(2) of power supply circuit 301C and a set of output voltage VC(2) of power supply circuit 301C during that operating time t(2), a set of output voltage VA(3) and temperature CA(3) of power supply circuit 301A during that operating time t(3), a set of output voltage VB(3) and temperature CB(3) of power supply circuit 301B during that operating time t(3), and a set of output voltage VC(3) and temperature CC(3) of power supply circuit 301C during that operating time t(3).

[0082] In step S306A, the CPU 103 outputs a command to infer a fault to the fault inference devices 110A, 110B, and 110C. The fault inference devices 110A, 110B, and 110C infer faults in the power supply circuits 301A, 301B, and 301C, respectively. FIG. 16 is a flowchart showing the procedure of step S306A.

[0083] In step S401A, data acquisition unit 111A acquires from nonvolatile memory 105 the set of operation time t(i) of power supply circuit 301A and the output voltage VA(i) and temperature CA(i) of power supply circuit 301A during that operation time t(i). Data acquisition unit 111B acquires from nonvolatile memory 105 the set of operation time t(i) of power supply circuit 301B and the output voltage VB(i) and temperature CB(i) of power supply circuit 301B during that operation time t(i). Data acquisition unit 111C acquires from nonvolatile memory 105 the set of operation time t(i) of power supply circuit 301C and the output voltage VC(i) and temperature CC(i) of power supply circuit 301C during that operation time t(i), where i = 1 to n. t(n) is the current operation time.

[0084] In step S402A, the inference unit 112A inputs the time series data of the set of the operating time acquired by the data acquisition unit 111A and the output voltage VA and temperature CA of the power supply circuit 301A at that operating time into the trained model MRA, thereby inferring the operating time WTA of the power supply circuit 301A from the current operating time until a failure occurs, and outputs the inference result to the CPU 103. The inference unit 112B inputs the time series data of the set of the operating time acquired by the data acquisition unit 111B and the output voltage VB and temperature CB of the power supply circuit 301B at that operating time into the trained model MRB, thereby inferring the operating time WTB of the power supply circuit 301B from the current operating time until a failure occurs, and outputs the inference result to the CPU 103. The inference unit 112C inputs the time series data of the set of operating time acquired by the data acquisition unit 111C and the output voltage VC and temperature CC of the power supply circuit 301C at that operating time into the learned model MRC, thereby inferring the operating time WTC of the power supply circuit 301C from the current operating time until a failure occurs, and outputs the inference data to the CPU 103.

[0085] As described above, according to this embodiment, by predicting the operating time until the power supply circuit and electronic control device fail based on the time series data of the set of operating time, output voltage, and temperature of the power supply circuit, it is possible to predict a failure of the power supply circuit and electronic control device before the failure actually occurs. Embodiment 3 (Model generation device)

[0086] The learning data creation unit 611 in FIG. 1 creates learning data from a set of the operating time of the power supply circuit 301 and the output voltage of the power supply circuit 301 during that operating time.

[0087] The learning data storage unit 612 stores the learning data created by the learning data creation unit 611.

[0088] The data acquisition unit 613 acquires multiple pieces of learning data in which a set of the operating time of the power supply circuit 301 and the output voltage of the power supply circuit 301 during that operating time is used as input data, and the output voltage of the power supply circuit 301 during the next operating time of the power supply circuit 301 is used as output data.

[0089] The model generation unit 614 uses the acquired learning data to generate a trained model that estimates the output voltage of the power supply circuit 301 during the next operating time of the power supply circuit 301 from multiple sets of the operating time of the power supply circuit 301 and the output voltage of the power supply circuit 301 during that operating time.

[0090] The trained model storage unit 615 stores the trained model generated by the model generation unit 614. (Fault learning procedure)

[0091] Fig. 17 is a flowchart showing the procedure for generating a trained model according to embodiment 3. The flowchart in Fig. 17 differs from the flowchart in Fig. 2 according to embodiment 1 in that the flowchart in Fig. 17 includes step S107B instead of step S107.

[0092] In step S107B, the CPU 103 outputs a command to learn a fault to the fault learning device 610. The fault learning device 610 generates the trained model of the third embodiment. FIG. 18 is a flowchart showing the procedure of step S107B.

[0093] In step S201B, the learning data creating unit 611 creates learning data and stores it in the learning data storage unit 612.

[0094] 19 is a diagram for explaining the learning data of the third embodiment. The diagram shows the output voltages V(1), V(2), V(3), V(4), V(n), and V(n+1) of the power supply circuit 301 at operating times t(1), t(2), t(3), t(4), t(n), and t(n+1).

[0095] 20(a), (b), and (c) are diagrams showing the learning data LR(1), LR(2), and LR(3) of the third embodiment. The learning data creation unit 611 receives as input data a set of the operating time t(i) of the power supply circuit 301 and the output voltage V(i) of the power supply circuit 301 during that operating time t(i), and creates learning data LR(1) having as output data the output voltage V(11) of the power supply circuit 301 during the operating time t(11) of the power supply circuit 301, where i=1 to 10. The learning data creation unit 611 receives as input data a set of the operating time t(i) of the power supply circuit 301 and the output voltage V(i) of the power supply circuit 301 during that operating time t(i), and creates learning data LR(2) having as output data the output voltage V(21) of the power supply circuit 301 during the operating time t(21) of the power supply circuit 301, where i=1 to 20. The learning data creation unit 611 receives as input data a set of the operating time t(i) of the power supply circuit 301 and the output voltage V(i) of the power supply circuit 301 during that operating time t(i), and creates learning data LR(3) having as output data the output voltage V(31) of the power supply circuit 301 during the operating time t(31) of the power supply circuit 301, where i = 1 to 30. In a similar manner, the learning data creation unit 611 creates learning data LR(4), LR(5), etc. A plurality of pieces of learning data LR(1), LR(2), LR(3), etc. are obtained from data on a plurality of power supply circuits 301.

[0096] In step S202B, the data acquisition unit 613 acquires a plurality of pieces of learning data LR(1), LR(2), LR(3), . . . from the learning data storage unit 612.

[0097] In step S203B, the model generation unit 614 uses multiple pieces of learning data LR(1), LR(2), LR(3), etc. to generate a trained model MR that estimates the output voltage of the power supply circuit 301 during the next operating time of the power supply circuit 301 from the time series data of the set of operating time of the power supply circuit 301 and the output voltage of the power supply circuit 301 during that operating time, and stores the trained model MR in the trained model storage unit 615. (Electronic control unit)

[0098] The trained model storage unit 113A shown in FIG. 1 stores the trained model MRA generated by the model generation device 5 including the power supply circuit 301A.

[0099] The data acquiring unit 111A acquires a plurality of sets of the operating time of the power supply circuit 301A and the output voltage of the power supply circuit 301A during that operating time.

[0100] The inference unit 112A inputs the acquired multiple sets into a learned model MRA that estimates the output voltage of the power supply circuit 301A in the next operating time of the power supply circuit 301A from the operating time of the power supply circuit 301A and multiple sets of the output voltage of the power supply circuit 301A during that operating time, and estimates the output voltage of the power supply circuit 301A in the next operating time.

[0101] The configurations of the fault inference devices 110B and 110C are similar to that of the fault inference device 110A, and therefore description thereof will not be repeated. The trained model storage unit 113B of the fault inference device 110B stores the trained model MRB generated by the model generation device 5 including the power supply circuit 301B. The trained model storage unit 113C of the fault inference device 110C stores the trained model MRC generated by the model generation device 5 including the power supply circuit 301C. FIG. 21 is a flowchart showing the procedure of fault inference according to the third embodiment. (Fault inference procedure)

[0102] The flowchart in FIG. 21 differs from the flowchart in FIG. 8 of the first embodiment in that the flowchart in FIG. 21 includes step S306B instead of step S306, and steps S307B and S3071B instead of step S307.

[0103] In step S306B, the CPU 103 outputs a command to infer a fault to the fault inference devices 110A, 110B, and 110C. The fault inference devices 110A, 110B, and 110C estimate the output voltages of the power supply circuits 301A, 301B, and 301C in the next operating time, respectively. FIG. 22 is a flowchart showing the procedure of step S306B.

[0104] In step S401B, the data acquisition unit 111A acquires a set of the operating time t(i) of the power supply circuit 301A and the output voltage VA(i) of the power supply circuit 301A during that operating time t(i) from the nonvolatile memory 105. The data acquisition unit 111B acquires a set of the operating time t(i) of the power supply circuit 301B and the output voltage VB(i) of the power supply circuit 301B during that operating time t(i) from the nonvolatile memory 105. The data acquisition unit 111C acquires a set of the operating time t(i) of the power supply circuit 301C and the output voltage VC(i) of the power supply circuit 301C during that operating time t(i) from the nonvolatile memory 105, where i = 1 to n. t(n) is the current operating time.

[0105] In step S402B, the inference unit 112A infers the output voltage VA(n+1) of the power supply circuit 301A at the next operating time t(n+1) by inputting the time series data (t(i), VA(i):i=1 to n) of the set of operating time and the output voltage of the power supply circuit 301A at that operating time acquired by the data acquisition unit 111A into the trained model MRA, and outputs the inference result to the CPU 103. The inference unit 112B infers the output voltage VB(n+1) of the power supply circuit 301B at the next operating time t(n+1) by inputting the time series data (t(i), VB(i):i=1 to n) of the set of operating time and the output voltage of the power supply circuit 301B at that operating time acquired by the data acquisition unit 111B into the trained model MRB, and outputs the inference result to the CPU 103. The inference unit 112C inputs the time series data (t(i), VC(i): i = 1 to n) of the set of operating times and the output voltages of the power supply circuit 301C at those operating times acquired by the data acquisition unit 111C into the trained model MRC, thereby inferring the output voltage VC(n+1) of the power supply circuit 301C at the next operating time t(n+1) and outputting it to the CPU 103. The description will continue with reference to FIG.

[0106] In step S307B, if any of the output voltages VA(n+1), VB(n+1), and VC(n+1) is not within the defined range, i.e., if any of the output voltages exceeds the upper limit value VU or is less than the lower limit value VL, the process proceeds to step S307C.

[0107] In step S3071B, the CPU 103 estimates that the electronic control unit 1 will fail at the next operating time t(n+1). The CPU 103 transmits the estimation result to the host management device 4. Based on the notification, the host management device 4 can determine the replacement time for the electronic control unit 1 and notify the user. Alternatively, the host management device 4 may shut down the electronic control unit 1 when the determined replacement time for the electronic control unit 1 arrives.

[0108] As described above, according to this embodiment, by predicting the output voltage during the next operating time of the power supply circuit based on the time series data of the set of operating time and output voltage of the power supply circuit, it is possible to predict a failure of the power supply circuit and electronic control device before the failure occurs. Variant. The present disclosure also includes the following modifications.

[0109] (1) In the above embodiment, the power supply circuits 301A, 301B, 301B, the ADC 201, and the CPU processing unit 100 are each independent components, but this is not limited to this and they may also be configured inside an IC. (2) Model generation

[0110] In the above embodiment, a case where supervised learning is applied to the learning algorithm used by the model generation unit has been described, but the present invention is not limited to this. As for the learning algorithm, in addition to supervised learning, reinforcement learning, unsupervised learning, semi-supervised learning, etc. can also be applied. The learning algorithm used in the model generation unit can be deep learning, which learns to extract features themselves, or machine learning can be performed according to other known methods, such as genetic programming, functional logic programming, or support vector machines. (3) Number of input sets

[0111] In the above embodiments, the number of sets of input data input to the input layer of the neural network is variable, but it may be fixed. For example, in the first embodiment, the training data creation unit 611 uses as input data a set of the operating time t(i) of the power supply circuit 301 and the output voltage V(i) of the power supply circuit 301 for that operating time t(i), and creates training data LR(2) having as output data the operating time WT(20) (=Rt(20)) of the power supply circuit 301 from the operating time t(20) until a failure. Here, instead of i=1 to 20, i=11 to 20 may be used. When creating LR(3), the training data creation unit 611 may use i=21 to 30 instead of i=1 to 30. The same applies to the second and third embodiments. (4) Prediction of output voltage during future operating hours

[0112] In the third embodiment, the fault inference device estimates the output voltage of the power supply circuit 301 at the next operation time t(n+1) using data up to the operation time t(n), but the present invention is not limited to this. The fault inference device may also infer the output voltage of the power supply circuit 301 at any future operation time t(n+2), t(n+3), etc. (4) Operating hours

[0113] In the above embodiment, the operating time of the power supply circuit 301 is the same as the operating time of the model generating device 5, and the operating time of the power supply circuits 301A, 301B, and 301C is the same as the operating time of the electronic control device, but this is not limited to this. If there is a possibility that one of them may stop, the operating times of these may be counted individually. (5) Accelerated testing In the above embodiment, the operating time during the learning phase is assumed to be actual time, but this is not limited to this. Temperature-based accelerated testing can also be used during the learning phase. For example, if a power supply circuit has a characteristic in which its lifespan is halved for every 10°C increase in temperature, fault learning can be performed with the temperature raised by 10°C, and the operating time can be set to half the actual time. (6) Model generation device In the above embodiment, it is assumed that the model generating device includes the same electronic components as those included in the electronic control device, but this is not limited to this. The model generating device may include electronic components different from those included in the electronic control values. Various aspects of the present disclosure are summarized below as appendices.

[0114] (Appendix 1) A fault inference device for a power supply circuit, a data acquisition unit that acquires a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times; an inference unit that inputs the acquired multiple sets into a trained model that estimates the time until the power supply circuit fails from multiple sets of operating time of the power supply circuit and output voltages of the power supply circuit during the operating time, and estimates the time until the power supply circuit fails.

[0115] (Appendix 2) the data acquisition unit further acquires a plurality of sets each including a temperature of the power supply circuit during the operating time of the power supply circuit; the inference unit inputs the acquired multiple sets into a trained model that estimates the time until the power supply circuit fails from the operating time of the power supply circuit and multiple sets of the output voltage and temperature of the power supply circuit during the operating time, thereby estimating the time until the power supply circuit fails.

[0116] (Appendix 3) 3. A fault inference device for a power supply circuit according to claim 1, wherein the operating times of the plurality of sets are a plurality of times at regular time intervals.

[0117] (Appendix 4) An electronic control device, a plurality of power supply circuits for supplying power to components within the electronic control device; a fault inference device according to any one of appendices 1 to 3, each of which infers a time until a failure occurs in a corresponding power supply circuit; a processor; The processor estimates the shortest time among the estimated times to failure of the plurality of power supply circuits as the time to failure of the electronic control device.

[0118] (Appendix 5) The electronic control device described in Appendix 4, wherein the processor transmits at least one of the estimated time to failure of the multiple power supply circuits and the time to failure of the electronic control device to a higher-level management device.

[0119] (Appendix 6) A fault inference device for a power supply circuit, a data acquisition unit that acquires a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times; an inference unit that inputs the acquired multiple sets into a trained model that estimates the output voltage of the power supply circuit during a future operating time of the power supply circuit from multiple sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times, and estimates the output voltage during the future operating time of the power supply circuit.

[0120] (Appendix 7) 7. A fault inference device for a power supply circuit as described in Appendix 6, wherein the operating times of the plurality of sets are a plurality of times at regular time intervals.

[0121] (Appendix 8) An electronic control device, a plurality of power supply circuits for supplying power to components within the electronic control device; a fault inference device according to claim 6 or 7, each of which infers an output voltage of a corresponding power supply circuit in a future operating time; a processor; The processor infers that the electronic control device will fail during a future operating time if any of the output voltages of the plurality of power supply circuits during the future operating time exceeds an upper limit value or is below a lower limit value.

[0122] (Appendix 9) 9. The electronic control device according to claim 8, wherein, when the processor infers that the electronic control device will fail during the future operating time, the processor transmits a result of the inference to a host management device.

[0123] (Appendix 10) A fault learning device for a power supply circuit, comprising: a data acquisition unit that acquires a plurality of learning data sets, each set having an operating time of the power supply circuit and an output voltage of the power supply circuit during the operating time as input data, and a time until the power supply circuit fails as output data; and a model generation unit that uses the acquired learning data to generate a trained model that estimates the time until the power supply circuit fails from a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times.

[0124] (Appendix 11) the data acquisition unit acquires learning data using the set as input data, the set further including a temperature of the power supply circuit during the operating time of the power supply circuit; 11. The power supply circuit fault learning device according to claim 10, wherein the model generation unit uses the acquired learning data to generate a trained model that estimates the time until the power supply circuit fails from a plurality of sets of the operating time of the power supply circuit and the output voltage and temperature of the power supply circuit during the operating time.

[0125] (Appendix 12) A fault learning device for a power supply circuit, comprising: a data acquisition unit that acquires a plurality of learning data sets in which input data are a plurality of sets of operation times of the power supply circuit and output voltages of the power supply circuit during the operation times, and output data are output voltages of the power supply circuit during future operation times of the power supply circuit; and a model generation unit that uses the acquired learning data to generate a trained model that estimates the output voltage of the power supply circuit during a future operating time of the power supply circuit from the operating time of the power supply circuit and multiple sets of output voltages of the power supply circuit during the operating time.

[0126] (Appendix 13) A fault inference method for a power supply circuit, comprising: acquiring a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times; and inputting the acquired multiple sets into a trained model that estimates the time until the power supply circuit fails from multiple sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times, thereby estimating the time until the power supply circuit fails.

[0127] (Appendix 14) A fault inference method for a power supply circuit, comprising: acquiring a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times; and inputting the acquired multiple sets into a trained model that estimates the output voltage of the power supply circuit during a future operating time of the power supply circuit from multiple sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times, thereby estimating the output voltage of the power supply circuit during a future operating time of the power supply circuit.

[0128] (Appendix 15) A fault learning method for a power supply circuit, comprising: acquiring a plurality of sets of learning data in which input data are a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times, and output data is a time until the power supply circuit fails; and using the acquired learning data, estimating a time until the power supply circuit fails from a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times.

[0129] (Appendix 16) A fault learning method for a power supply circuit, comprising: acquiring a plurality of sets of input data including an operating time of the power supply circuit and an output voltage of the power supply circuit during the operating time, and output data including an output voltage of the power supply circuit during a future operating time of the power supply circuit; and generating a trained model that estimates the output voltage of the power supply circuit during a future operating time of the power supply circuit from a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times, using the acquired training data.

[0130] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0131] 1,1A Electronic control device, 2 Control target component, 3 Electronic component, 4 Upper management device, 5,5A Model generation device, 7,7A,7B,7C Temperature sensor, 100,600 CPU processing unit, 102,602 ROM, 103,603 CPU, 104,604 RAM, 105,605 Non-volatile memory, 110A,110B,110C Fault inference device, 111A,111B,111C,613 Data acquisition unit, 112A,112B,112C Inference unit, 113A,113B,113C,615 Trained model storage unit, 301,301A,301B,301C Power supply circuit, 400 External power supply, 610 Fault learning device, 611 Training data creation unit, 612 Training data storage unit, 614 Model generation unit.

Claims

1. A fault inference device for a power supply circuit, a data acquisition unit that acquires a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times; an inference unit that inputs the acquired multiple sets into a trained model that estimates the time until the power supply circuit fails from multiple sets of operating time of the power supply circuit and output voltages of the power supply circuit during the operating time, and estimates the time until the power supply circuit fails.

2. the data acquisition unit further acquires a plurality of sets each including a temperature of the power supply circuit during the operating time of the power supply circuit; 2. The power supply circuit fault inference device according to claim 1, wherein the inference unit inputs the acquired multiple sets into a trained model that estimates a time until the power supply circuit fails from an operating time of the power supply circuit and multiple sets of output voltages and temperatures of the power supply circuit during the operating time, thereby estimating a time until the power supply circuit fails.

3. 2. The fault inference device for a power supply circuit according to claim 1, wherein the plurality of sets of operating times are a plurality of times at regular time intervals.

4. An electronic control device, a plurality of power supply circuits for supplying power to components within the electronic control device; 2. The fault inference device according to claim 1, wherein each of the fault inference devices infers a time to failure of a corresponding power supply circuit; a processor; The processor estimates the shortest time among the estimated times to failure of the plurality of power supply circuits as the time to failure of the electronic control device.

5. 5. The electronic control device according to claim 4, wherein the processor transmits at least one of the estimated times to failure of the plurality of power supply circuits and the estimated time to failure of the electronic control device to a host management device.

6. A fault inference device for a power supply circuit, a data acquisition unit that acquires a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times; an inference unit that inputs the acquired multiple sets into a trained model that estimates the output voltage of the power supply circuit during a future operating time of the power supply circuit from multiple sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times, and estimates the output voltage during the future operating time of the power supply circuit.

7. 7. The fault inference device for a power supply circuit according to claim 6, wherein the plurality of sets of operating times are a plurality of times at regular time intervals.

8. An electronic control device, a plurality of power supply circuits for supplying power to components within the electronic control device; 7. The fault inference device according to claim 6, wherein each of the fault inference devices infers an output voltage of a corresponding power supply circuit in a future operating time; a processor; The processor infers that the electronic control device will fail during a future operating time if any of the output voltages of the plurality of power supply circuits during the future operating time exceeds an upper limit value or is below a lower limit value.

9. The electronic control device according to claim 8 , wherein the processor, when inferring that the electronic control device will fail during the future operating time, transmits a result of the inference to a host management device.

10. A fault learning device for a power supply circuit, comprising: a data acquisition unit that acquires a plurality of learning data sets, each set having an operating time of the power supply circuit and an output voltage of the power supply circuit during the operating time as input data, and a time until the power supply circuit fails as output data; and a model generation unit that uses the acquired learning data to generate a trained model that estimates the time until the power supply circuit fails from a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times.

11. the data acquisition unit acquires learning data using the set as input data, the set further including a temperature of the power supply circuit during the operating time of the power supply circuit; 11. The power supply circuit fault learning device according to claim 10, wherein the model generation unit uses the acquired learning data to generate a trained model that estimates a time until the power supply circuit fails from a plurality of sets of an operating time of the power supply circuit and an output voltage and a temperature of the power supply circuit during the operating time.

12. A fault learning device for a power supply circuit, comprising: a data acquisition unit that acquires a plurality of learning data sets in which input data are a plurality of sets of operation times of the power supply circuit and output voltages of the power supply circuit during the operation times, and output data are output voltages of the power supply circuit during future operation times of the power supply circuit; and a model generation unit that uses the acquired learning data to generate a trained model that estimates the output voltage of the power supply circuit during a future operating time of the power supply circuit from the operating time of the power supply circuit and multiple sets of output voltages of the power supply circuit during the operating time.

13. A fault inference method for a power supply circuit, comprising: acquiring a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times; and inputting the acquired multiple sets into a trained model that estimates the time until the power supply circuit fails from multiple sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times, thereby estimating the time until the power supply circuit fails.

14. A fault inference method for a power supply circuit, comprising: acquiring a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times; and inputting the acquired multiple sets into a trained model that estimates the output voltage of the power supply circuit during a future operating time of the power supply circuit from multiple sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times, thereby estimating the output voltage of the power supply circuit during a future operating time of the power supply circuit.

15. A fault learning method for a power supply circuit, comprising: acquiring a plurality of sets of input data each including an operating time of the power supply circuit and an output voltage of the power supply circuit during the operating time, and output data each including a time until the power supply circuit fails; and using the acquired learning data, estimating a time until the power supply circuit fails from a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times.

16. A fault learning method for a power supply circuit, comprising: acquiring a plurality of sets of input data including an operating time of the power supply circuit and an output voltage of the power supply circuit during the operating time, and output data including an output voltage of the power supply circuit during a future operating time of the power supply circuit; and generating a trained model that estimates the output voltage of the power supply circuit during a future operating time of the power supply circuit from a plurality of sets of operating times of the power supply circuit and output voltages of the power supply circuit during the operating times, using the acquired training data.

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