Avalanche photodiode

Abstract

To provide an avalanche photodiode with excellent characteristics and reliability.SOLUTION: An avalanche photodiode includes a substrate, an n-type contact layer formed on the substrate, and a mesa structure formed on the n-type contact layer. The mesa structure includes a multiplication layer, a light absorption layer, and a p-type contact layer. The multiplication layer is larger than the light absorption layer in plan view. The light absorption layer is larger than the p-type contact layer in plan view.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to an avalanche photodiode. [Background technology]

[0002] One known semiconductor light-receiving element is the avalanche photodiode (hereinafter referred to as APD). An APD generally comprises a light absorption layer that absorbs light and generates carriers, and a multiplication layer that multiplies the generated carriers (Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] WO2008 / 090733 [Patent Document 2] Patent Publication No. 2018-152489 Summary of the Invention [Problem to be solved by the invention]

[0004] APDs, which require high-speed operation, preferably have a mesa structure, which allows for a small element capacitance. Furthermore, APDs are driven at higher voltages than PiN-PDs. For example, when a strong electric field is applied to the multiplication layer, local breakdown can occur on the side of the multiplication layer in the mesa structure. When breakdown occurs, the APD will not operate normally. Similarly, a strong electric field can increase leakage current on the side of the light absorption layer in the mesa structure, potentially affecting its characteristics.

[0005] An object of the present invention is to provide an avalanche photodiode that suppresses the occurrence of breakdown and is compatible with high-speed operation. [Means for solving the problem]

[0006] The avalanche photodiode comprises a substrate, an n-type contact layer formed on the substrate, a multiplication layer formed on the n-type contact layer, a light absorption layer formed on the multiplication layer, and a p-type contact layer formed on the light absorption layer, wherein the multiplication layer, the light absorption layer, and the light p-type contact layer form a mesa structure, and the multiplication layer is larger than the light absorption layer in a planar view, and the light absorption layer is larger than the p-type contact layer in a planar view. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a top view of an avalanche photodiode according to a first embodiment. [Figure 2] 2 is a schematic cross-sectional view of the avalanche photodiode taken along line II-II of FIG. 1. [Figure 3A] 1 is a schematic cross-sectional view showing a part of an avalanche photodiode according to Comparative Example 1. FIG. [Figure 3B] FIG. 10 is a schematic cross-sectional view showing a part of an avalanche photodiode according to Comparative Example 2. [Figure 3C] FIG. 10 is a schematic cross-sectional view showing a part of an avalanche photodiode according to Comparative Example 3. [Figure 3D] 1 is a schematic cross-sectional view showing a part of an avalanche photodiode according to a first embodiment. [Figure 4] FIG. 10 is a schematic cross-sectional view of an avalanche photodiode according to a second embodiment. [Figure 5] FIG. 10 is a schematic cross-sectional view of an avalanche photodiode according to a modified example of the second embodiment. [Figure 6] FIG. 10 is a schematic cross-sectional view of an avalanche photodiode according to a third embodiment. [Figure 7] FIG. 10 is a top view of an avalanche photodiode according to a fourth embodiment. [Figure 8] 8 is a schematic cross-sectional view of the avalanche photodiode shown in FIG. 7 taken along line VIII-VIII. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Elements with the same reference numerals in all the drawings have the same or equivalent functions, and their repeated explanation will be omitted. Note that the size of the figures does not necessarily correspond to the magnification.

[0009] [First embodiment] FIG. 1 is a top view of an avalanche photodiode (APD) according to a first embodiment. The APD according to this embodiment is a front-illuminated type. Although not shown in the top view of FIG. 1, the positions of the outer edges of the multiplication layer 5, the light absorption layer 9, and the p-type contact layer 11 are indicated by dashed lines. FIG. 2 is a cross-sectional view schematically showing the II-II cross section of FIG. 1.

[0010] [Semiconductor multilayer] The APD has a semiconductor multilayer on a substrate 1. The substrate 1 is a semi-insulating, insulating, or n-type semiconductor. The semiconductor multilayer has an n-type contact layer 3, a multiplication layer 5, a p-type field adjustment layer 7, a light absorption layer 9, and a p-type contact layer 11. The n-type contact layer 3 is a semiconductor layer doped with n-type impurities. For example, the impurity concentration is 1×10 18 cm -3 That is all. An n-side electrode 17 is connected to the n-type contact layer 3. The multiplication layer 5 and the light absorption layer 9 are undoped layers to which no impurities have been intentionally added. Here, the undoped layer is a layer in which the impurity concentration is at the background level, for example, the impurity concentration is 1×10 16 cm -3 The thickness of the light absorption layer 9 is greater than that of the multiplication layer 5. The p-type field adjustment layer 7 is a layer for creating a difference in the electric field strength applied to the light absorption layer 9 and the multiplication layer 5. The p-type contact layer 11 is a semiconductor layer doped with p-type impurities. For example, the impurity concentration is 1×10 18 cm -3That is all. A p-side electrode 15 is connected to the p-type contact layer 11. The p-side electrode 15 has a substantially circular shape in a plan view, and the area inside the circular shape serves as a light receiving portion. Note that if the substrate 1 is an n-type semiconductor, the n-type contact layer 3 does not need to be disposed.

[0011] Examples of each semiconductor layer are listed below. The substrate 1 is Fe-doped InP. The n-type contact layer 3 is InP, the multiplication layer 5 is InAlAs, the field adjustment layer 7 is InP, the light absorption layer 9 is InGaAs, and the p-type contact layer 11 is InGaAs. Note that the band gap of the light absorption layer 9 corresponds to light absorption of 1250 to 1600 nm. These are merely examples, and other materials or materials corresponding to other wavelength bands may also be used.

[0012] [Mesa structure] The APD according to this embodiment has a mesa structure in at least the region from the multiplication layer 5 to the p-type contact layer 11. An insulating film 19 is disposed on the surface of the substrate 1 and on the side surfaces of the mesa structure. An insulating film 19 is also disposed on the top of the mesa structure. The insulating film 19 on the top of the mesa structure and the insulating film 19 disposed on the side surfaces of the mesa structure may be made of different materials and may have different thicknesses.

[0013] The mesa structure is circular in plan view. In the mesa structure of the present invention, the multiplication layer 5 is the largest in plan view, followed by the light absorption layer 9. The p-type contact layer 11 is the smallest. In other words, the mesa structure has three stages: a lower stage M1, a middle stage M2, and an upper stage M3. In this embodiment, the lower stage M1 includes the multiplication layer 5 and the field adjustment layer 7. The middle stage M2 includes the light absorption layer 9. The upper stage M3 includes the p-type contact layer 11. In FIG. 1, the multiplication layer 5, the light absorption layer 9, and the p-type contact layer 11, which are each circular in plan view, have the same center. However, the centers of the multiplication layer 5, the light absorption layer 9, and the p-type contact layer 11 do not have to be the same.

[0014] [effect] The effects of this embodiment will be described using Comparative Examples 1, 2, and 3. FIGS. 3A, 3B, and 3C are cross-sectional views showing portions of APDs according to Comparative Examples 1, 2, and 3, respectively. For simplicity of explanation, insulating films and electrodes are not shown. Note that the size of the p-type contact layer 11 in a plan view is the same in this embodiment and Comparative Examples 1, 2, and 3. Furthermore, the size of the multiplication layer 5 and the field adjustment layer 7 in a plan view is the same in this embodiment and Comparative Examples 2 and 3.

[0015] Comparative Example 1 has a mesa structure without a step. Comparative Example 2 has a two-stage mesa structure, and like the present embodiment, the multiplication layer 5 and the field adjustment layer 7 are larger than the light absorption layer 9. Comparative Example 3 has a two-stage mesa structure, and the multiplication layer 5, the field adjustment layer 7, and the light absorption layer 9 are the same size in a planar view, and each is larger than the p-type contact layer 11. Note that the planar size of the multiplication layer 5 in this embodiment, Comparative Example 2, and Comparative Example 3 is the same. Note that "same size in a planar view" refers to a state in which the side surfaces of the mesa structure are approximately aligned, as shown in Figure 2 and Figures 3A to 3D. Patent Document 1 discloses structures similar to Comparative Examples 1, 2, and 3. Patent Document 2 discloses structures similar to Comparative Examples 2 and 3.

[0016] [Comparative Example 1] In an APD, the strongest electric field is applied to the undoped multiplication layer 5. The next strongest electric field is applied to the light absorption layer 9. These two layers are depleted depending on the strength of the electric field, increasing carriers and absorbing light. The p-type contact layer 11 is a highly doped p-type semiconductor layer. When a reverse bias voltage is applied to the p-side electrode 15, an electric field is applied to the light absorption layer 9, field adjustment layer 7, and multiplication layer 5, which are located between the p-type contact layer 11 and the n-type contact layer 3. The field adjustment layer 7 is a highly doped p-type layer, and its concentration is adjusted so that appropriate electric field strengths are applied to the light absorption layer 9 and the multiplication layer 5. In Comparative Example 1, the side surfaces of the p-type contact layer 11 and the other semiconductor layers are substantially aligned. The electric field strength distribution on the surface of the multiplication layer 5 facing the field adjustment layer 7 is substantially uniform. However, the voltage at which breakdown occurs tends to be lower on the side surfaces of the mesa structure compared to the center. Therefore, if the applied voltage is increased, breakdown occurs on the side surface of the multiplication layer 5, and the APD no longer operates normally.

[0017] Comparative Example 2 In Comparative Example 2, the side surfaces of the p-type contact layer 11 and the multiplication layer 5 do not coincide. On the other hand, the side surfaces of the p-type contact layer 11 and the light absorption layer 9 are approximately coincident. As in Comparative Example 1, an electric field is applied to the light absorption layer 9, the field adjustment layer 7, and the multiplication layer 5. Here, the contact point between the side surface of the light absorption layer 9 and the field adjustment layer 7 is defined as edge E1. The electric field in the field adjustment layer 7 spreads from edge E1 in a first direction D1 perpendicular to the stacking direction of the semiconductor multilayer and is applied to the multiplication layer 5. However, because the field adjustment layer 7 is thinner than the multiplication layer 5, it does not spread very widely. The electric field also spreads in the multiplication layer 5 in a similar manner. The spread of the electric field distribution is indicated by a dotted line. This is merely an illustration for illustrative purposes and does not strictly represent the spread of the electric field distribution. By increasing the distance between the side surface of the multiplication layer 5 and edge E1, the electric field strength at the side surface of the multiplication layer 5 can be reduced compared to the central portion of the multiplication layer 5. For example, in FIG. 3B , the electric field distribution does not reach the side surface of the multiplication layer 5, and breakdown does not occur at the side surface. In other words, breakdown can be suppressed by making the multiplication layer 5 larger than the light absorption layer 9 in a planar view so that breakdown does not occur at the side surface of the multiplication layer 5. However, the structure of Comparative Example 2 has another problem. The electric field distribution of the field adjustment layer 7 is not uniform in the first direction D1, and the electric field intensity immediately below the edge E1 is locally high. This strong electric field immediately below the edge E1 propagates to the multiplication layer 5, resulting in an electric field distribution in the multiplication layer 5 where the electric field intensity immediately below the edge E1 is high. As a result, local breakdown may occur immediately below the edge E1. Therefore, although Comparative Example 2 can suppress breakdown at the side surface of the multiplication layer 5, there is a concern that breakdown may occur immediately below the edge E1.

[0018] Comparative Example 3 has a two-tiered mesa structure consisting of a p-type contact layer 11 and other layers. The sides of the p-type contact layer 11, the field adjustment layer 7, and the multiplication layer 5 are substantially aligned. The point where the side of the p-type contact layer 11 meets the light absorption layer 9 is referred to as edge E2. The electric field distribution within the light absorption layer 9 spreads in the first direction D1 from edge E2. As in Comparative Example 2, the electric field distribution is depicted by dotted lines. As in Comparative Example 2, the electric field distribution does not reach the side of the multiplication layer 5, and breakdown does not occur there. Furthermore, there is no region corresponding to edge E1, and no location within the multiplication layer 5 where the electric field intensity is high enough to cause breakdown. The electric field also concentrates directly below edge E2. However, the light absorption layer 9 is relatively thick, and its strong electric field does not affect the multiplication layer 5 to the extent that it causes breakdown. Therefore, Comparative Example 3 can suppress breakdown in the multiplication layer 5. However, it is disadvantageous for high-speed operation in terms of capacitance. The capacitance is proportional to the size of the area in plan view where the electric field spreads. As shown in Figure 3C, the electric field spreads from the edge E2 and spreads over many areas of the multiplication layer 5. Therefore, the capacitance is large, which hinders high-speed operation.

[0019] To summarize the above, Comparative Example 1 has the lowest parasitic capacitance, but there is a concern that breakdown may occur on the side surface of the multiplication layer 5. Comparative Example 2 is superior to Comparative Example 3 in terms of parasitic capacitance, but there is a concern that breakdown may occur inside the multiplication layer 5. Comparative Example 3 does not have the concern that breakdown may occur in the multiplication layer 5, but cannot support high-speed operation in terms of parasitic capacitance.

[0020] For comparison with Comparative Examples 1, 2, and 3, FIG. 3D shows a partial structure of the APD of this embodiment. In this APD, the p-type contact layer 11, light absorption layer 9, and multiplication layer 5 are all different sizes in a plan view. That is, the side surfaces of the p-type contact layer 11, light absorption layer 9, and multiplication layer 5 do not coincide. As in the comparative example, the spread of the electric field distribution is indicated by a dotted line in FIG. 3D. As shown in FIG. 3D, the electric field distribution in the light absorption layer 9 spreads in the first direction D1 from the edge E2, and the electric field is transmitted to the multiplication layer 5 via the field adjustment layer 7. As in Comparative Examples 2 and 3, the electric field distribution does not reach the side surface of the multiplication layer 5. Therefore, no breakdown occurs at the side surface of the multiplication layer 5. Furthermore, the electric field is concentrated directly below edge E1, resulting in a higher electric field intensity than in other regions. However, the electric field intensity is lower than that directly below edge E1 in Comparative Example 2, and no breakdown occurs inside the multiplication layer 5. This is because in Comparative Example 2, the side surfaces of the p-type contact layer 11 and the light absorption layer 9 are aligned, and a strong electric field is also applied to the side surfaces of the light absorption layer 9. Therefore, the electric field intensity concentrated directly below the edge E1 in Comparative Example 2 is high. In contrast, in this embodiment, the side surfaces of the p-type contact layer 11 and the light absorption layer 9 are not aligned. As shown by the dotted line in FIG. 3D , the electric field spreads from the edge E2 toward the side surfaces of the light absorption layer 9, and the electric field intensity decreases along the way. Even if the reduced electric field intensity concentrates directly below the edge E1, it is not strong enough to cause a breakdown of the multiplication layer 5. As described above, this embodiment can suppress breakdown of the multiplication layer 5. Furthermore, compared to Comparative Example 3, this embodiment can reduce parasitic capacitance and support high-speed operation for two reasons: the size of the light absorption layer 9 in a plan view is smaller than that of the multiplication layer 5, and the electric field spread in the multiplication layer 5 is small. More specifically, the electric field of the light absorbing layer 9 spreads to the side surface of the light absorbing layer 9 before reaching the interface between the light absorbing layer 9 and the electric field adjusting layer 7. Therefore, the electric field in this embodiment spreads less from the edge E2 to the n-type contact layer 3 than in Comparative Example 3. The region where parasitic capacitance occurs is the region where the electric field spreads.In this embodiment, the multiplication layer 5, which is a factor in generating parasitic capacitance, is larger in plan view than the p-type contact layer 11 and the light absorption layer 9, but the electric field does not spread over the entire region, so it is possible to suppress an increase in parasitic capacitance. With the above configuration, an APD is realized that excels in high-speed operation and suppresses the occurrence of breakdown.

[0021] The light-absorbing layer 9 is an important layer that determines the characteristics of the APD. Its size is determined to achieve both high-speed operation and a large light-receiving diameter. A large surface area in plan view is advantageous in terms of the light-receiving diameter, but results in a large capacitance, which is detrimental to high-speed operation. Conversely, a small surface area is advantageous for high-speed operation, but is disadvantageous in terms of the light-receiving diameter, making optical alignment difficult. The size and thickness of the light-absorbing layer 9 are determined taking this into consideration, as well as the prevention of breakdown in the multiplication layer 5. For example, the planar size of the light-absorbing layer 9 in an APD compatible with 25 Gbps is preferably approximately 20 μm in diameter because the mesa structure is circular. However, considering the spread of the electric field and the prevention of breakdown, it is desirable that the p-type contact layer 11 be at least 1 μm smaller than the diameter of the light-absorbing layer 9 and that the multiplication layer 5 be at least 1 μm larger. Furthermore, taking into account manufacturing variations, it is desirable that the diameter of the multiplication layer 5 be at least 2 μm larger than the diameter of the light-absorbing layer 9. Similarly, the diameter of the p-type contact layer 11 is preferably at least 2 μm smaller than the diameter of the light absorbing layer 9. Furthermore, as shown in FIG. 3D, the thickness of the light absorbing layer 9 is determined so that the electric field of the light absorbing layer 9 spreads to the side surface of the light absorbing layer 9 before reaching the interface between the light absorbing layer 9 and the electric field adjusting layer 7.

[0022] For simplicity, the side surfaces of the mesa structure are shown as vertical surfaces, but this is not limiting. For example, the side surfaces of the mesa structure may be inclined. If the side surfaces of the mesa structure are, for example, forward tapered, the multiplication layer 5 and the field adjustment layer 7 are not, strictly speaking, the same size in a planar view (the multiplication layer 5 is slightly larger). However, in this specification, the two semiconductor layers are defined as having the same size (i.e., the side surfaces of both layers are aligned) as long as the surface of the lower semiconductor layer is not exposed at the interface between them. Conversely, if the surface of the field adjustment layer 7 is exposed from the light absorption layer 9, such as at the interface between the field adjustment layer 7 and the light absorption layer 9, the two layers are defined as having different sizes in a planar view (i.e., the side surfaces of both layers are not aligned). Note that each level of the mesa structure may include other layers. For example, the upper level M3 may include multiple p-type contact layers 11.

[0023] Although the mesa structure has been shown as being circular in plan view, it is not limited to this and may be, for example, elliptical or polygonal.

[0024] [Second embodiment] 4 is a schematic cross-sectional view of an APD according to the second embodiment. The difference from the first embodiment is that the light absorption layer 209 has a two-layer structure. The other structures are the same as those of the first embodiment.

[0025] In this embodiment, the light absorption layer 209 is composed of a first light absorption layer 9a and a second light absorption layer 9b. The first light absorption layer 9a and the second light absorption layer 9b have the same size in a planar view (their side surfaces are approximately the same). The first light absorption layer 9a is an undoped InGaAs layer to which no impurities have been intentionally added. The second light absorption layer 9b is a low-concentration p-type InGaAs layer to which p-type impurities have been added at a low concentration to the extent that they cause depletion. Here, the low concentration to the extent that they cause depletion means, for example, an impurity concentration of 1×10 17 cm -3 More preferably, the impurity concentration of the second light absorbing layer 9b is less than 0.5×10 17 cm -3 The semiconductor material is just one example.

[0026] The APD of the first embodiment suppresses the occurrence of breakdown in the multiplication layer 5. However, an electric field also concentrates below the edge E2, which is the contact point between the side surface of the p-type contact layer 11 and the light absorption layer 9, and there is a possibility that breakdown will occur in the light absorption layer 9. The APD of the second embodiment suppresses this.

[0027] When a low-concentration p-type semiconductor layer (second photoabsorption layer 9b) is sandwiched between the p-type contact layer 11 and the undoped first photoabsorption layer 9a, the location of the highest electric field strength in the photoabsorption layer 209 is the interface between the first photoabsorption layer 9a and the second photoabsorption layer 9b. Therefore, the electric field strength at the interface between the second photoabsorption layer 9b and the p-type contact layer 11 is lower than the electric field strength at the interface between the first photoabsorption layer 9a and the second photoabsorption layer 9b. The electric field concentrates in the region directly below the edge E2, and the electric field strength is higher than in the vicinity of the center of the photoabsorption layer 209. However, because the electric field strength at the interface between the p-type contact layer 11 and the second photoabsorption layer 9b is originally low, even if the electric field concentrates in the region directly below the edge E2, the breakdown voltage is not reached, and breakdown of the photoabsorption layer 209 can be suppressed.

[0028] [Variations] FIG. 5 is a schematic cross-sectional view of an APD according to a modification of the second embodiment. The difference from the second embodiment is that an etching stop layer 210 is disposed between the second photoabsorption layer 9b and the p-type contact layer 11. The etching stop layer 210 has the same size as the second photoabsorption layer 9b in plan view. That is, the etching stop layer 210 is disposed in the middle stage M2 of the mesa structure. The etching stop layer 210 is the uppermost layer of the middle stage M2 and is made of a different material from the lowermost layer of the upper stage M1 (the p-type contact layer 11 in this case). For example, if the p-type contact layer 11 is made of InGaAs, the etching stop layer 210 is made of InGaAsP. Alternatively, it may be made of InGaAlAs. The etching stop layer 210 is a p-type semiconductor layer.

[0029] A mesa structure with multiple steps is formed by performing multiple etching steps after crystal growth of semiconductor multilayers on the substrate 1. For example, when forming the upper step M3, the area that will ultimately remain as the upper step M3 is masked and the other areas are removed. If the etching stop layer 210 is provided, the middle step M2 can be prevented from being etched together with the upper step M3 during formation, and a mesa structure with multiple steps can be stably formed. Note that the etching stop layer 210 may be provided in the first embodiment.

[0030] The field adjustment layer 7 also functions as an etching stop layer. The field adjustment layer 7 is the top layer of the lower stage M1. Therefore, if the top layer of the lower stage M1 and the bottom layer of the middle stage M2 are made of different materials, the top layer of the lower stage M1 functions as an etching stop layer when forming the middle stage M2. In this case, the field adjustment layer 7, which is the top layer of the lower stage M1, is InP, and the bottom layer of the middle stage M2 is the first light absorption layer 9a, which is InGaAs. Because these two layers are made of different materials, the field adjustment layer 7 functions as an etching stop layer when etching to form the middle stage M2, allowing the middle stage M2 to be formed stably.

[0031] It is possible to form a mesa structure with multiple steps by controlling the etching time even without providing an etching stop layer. Therefore, a three-step mesa structure can be formed in the first embodiment. Therefore, the field adjustment layer 7 may be included in the middle step M2.

[0032] [Third embodiment] 6 is a schematic cross-sectional view of an APD according to the third embodiment. The difference from the second embodiment is that an electron transit layer 320 and an electric field reduction layer 330 are disposed between the n-type contact layer 3 and the multiplication layer 5. Here, the electron transit layer 320 and the electric field reduction layer 330 have the same size as the multiplication layer 5 in plan view (their side surfaces are substantially aligned). In other words, they are disposed in the lower stage M1 of the mesa structure.

[0033] The electron transit layer 320 is an undoped layer with a larger band gap than the light absorption layer 209. Specifically, the electron transit layer 320 is a semiconductor layer with a band gap that does not absorb the wavelength of light to be received. The electric field reduction layer 330 is a highly doped n-type semiconductor layer that creates a difference in electric field strength between the electron transit layer 320 and the multiplication layer 5. The electron transit layer is an undoped layer that is depleted during APD operation, which reduces the capacitance of the entire APD.

[0034] In the third embodiment, an APD compatible with high-speed operation is also realized by suppressing the occurrence of breakdown on the side surfaces or inside the multiplication layer 5 and the light absorption layer 209. Furthermore, an electron transit layer 320 and an electric field reduction layer 330 may be disposed in the APD shown in the first embodiment.

[0035] [Fourth embodiment] Fig. 7 is a schematic diagram of an avalanche photodiode (APD) according to a fourth embodiment. The APD according to this embodiment is a back-illuminated type, Fig. 7 is a top view, and Fig. 8 is a cross-sectional view schematically showing the VIII-VIII cross section of Fig. 7.

[0036] The semiconductor multilayer of the APD according to this embodiment is the same as that of the first embodiment. The main difference is that a lens 450 is formed on the back surface of the substrate 401. The shapes of the n-side electrode 417 and the p-side electrode 415 are also different. Furthermore, in addition to the first mesa structure 460 having a light-receiving function, a second mesa structure 470 on which a part of the n-side electrode 417 is arranged is also provided.

[0037] The lens 450 formed on the back surface of the substrate 401 has the effect of focusing incident light onto the light absorption layer 9 and increasing light-receiving sensitivity. The lens 450 may be omitted. The multilayer structure of the first mesa structure 460 is the same as that of the mesa structure of the first embodiment, and as described above, it suppresses the occurrence of breakdown. A reflective film 440 made of an insulating film is disposed on the upper surface of the p-type contact layer 11. A circular p-side electrode 415 is disposed on the top of the first mesa structure 460. An insulating film 419 is disposed on the side surfaces of the first mesa structure 460 and a second mesa structure 470 (described later). The reflective film 440 and the insulating film 419 may be made of the same material.

[0038] The APD of this embodiment includes a second mesa structure 470. The semiconductor multilayer included in the second mesa structure 470 is the same as that of the first mesa structure 460. The second mesa structure 470 is a mesa structure that does not have a circular step structure in a plan view. Note that a step structure similar to that of the first mesa structure 460 may be formed. An n-side electrode 417 is disposed on the top surface of the second mesa structure 470. The n-side electrode 417 is connected to the n-type contact layer 3 via the side surface of the second mesa structure 470.

[0039] As described above, it is not necessary for all mesa structures formed in an APD to have a step structure, and the effects of the present invention can be obtained as long as the mesa structure having a light-receiving function has the step structure described above.

[0040] The present invention improves high-speed operation and reliability in avalanche photodiodes having a mesa structure. In an embodiment of the present invention, the mesa structure includes a multiplication layer, a light absorption layer, and a contact layer. In plan view, the multiplication layer is larger than the light absorption layer, and the light absorption layer is larger than the contact layer. In other words, in a cross-sectional view, the mesa structure has a three-tier structure: a lower tier including the multiplication layer, a middle tier including the light absorption layer, and an upper tier including the contact layer. The side surfaces of the multiplication layer, the light absorption layer, and the contact layer do not form the same plane. A field adjustment layer may be disposed between the multiplication layer and the light absorption layer. The field adjustment layer is made of a different material from the light absorption layer. The field adjustment layer may be included in the lower or middle tier of the mesa structure. The uppermost layer of the middle tier of the mesa structure may include an etching stop layer. The etching stop layer is made of a different material from the bottommost layer of the upper tier. The light absorption layer may have a two-layer structure consisting of an undoped absorption layer disposed on the multiplication layer side and a low-concentration absorption layer disposed on the contact layer side. Here, the low-concentration absorption layer is depleted when a voltage is applied. An electron transit layer and an electric field reduction layer may be included between the multiplication layer and the substrate. The electron transit layer and the electric field reduction layer are included in the lower part of the mesa structure. The avalanche photodiode may be a front-illuminated type or a back-illuminated type. In the case of a back-illuminated type, a lens may be formed on the surface of the substrate opposite to the surface on which the mesa structure is formed. The avalanche photodiode is compatible with light of 1250 to 1600 nm. The mesa structure is circular in plan view, and the diameter of the multiplication layer is 1 μm or more larger than the diameter of the light absorption layer in plan view. The diameter of the light absorption layer is 1 μm or more larger than the diameter of the p-type contact layer in plan view. [Explanation of symbols]

[0041] 1, 401 board 3 n-type contact layer 5 Multiplication layer 7. Field adjustment layer 9, 209 Light absorbing layer 9a First light absorbing layer 9b Second light absorbing layer 11 p-type contact layer 15, 415 p side electrode 17, 417 n-side electrode 19, 419 insulating film 210 Etch stop layer 320 Electron Transport Layer 330 Electric field reduction layer 440 Reflective film 450 lens 460 First Mesa Structure 470 Second Mesa Structure E1, E2 edges M1 Lower part of mesa structure M2 Middle section of mesa structure M3 Upper mesa structure

Claims

1. A substrate; an n-type contact layer formed on the substrate; a multiplication layer formed on the n-type contact layer; a light absorbing layer formed on the multiplication layer; a p-type contact layer formed on the light absorption layer, the multiplication layer, the light absorption layer, and the optical p-type contact layer form a mesa structure; In a plan view, the multiplication layer is larger than the light absorption layer; In a plan view, the light absorption layer is larger than the p-type contact layer.

2. 2. The avalanche photodiode according to claim 1, the light absorption layer includes a first light absorption layer disposed on the multiplication layer side and a second light absorption layer disposed on the p-type contact layer side, the first light absorbing layer is an undoped layer, The second light absorption layer is a low-concentration p-type layer.

3. 3. The avalanche photodiode according to claim 2, The second light absorption layer is depleted when a voltage is applied.

4. 2. The avalanche photodiode according to claim 1, The avalanche photodiode further comprises an electric field adjustment layer between the multiplication layer and the light absorption layer.

5. 5. The avalanche photodiode according to claim 4, The avalanche photodiode, wherein the electric field adjustment layer has the same size as the multiplication layer in a plan view.

6. 6. The avalanche photodiode according to claim 5, The avalanche photodiode, wherein the field adjustment layer is made of a different material from the light absorption layer.

7. 2. The avalanche photodiode according to claim 1, The avalanche photodiode further comprises an etching stop layer between the light absorption layer and the p-type contact layer.

8. 8. The avalanche photodiode according to claim 7, The etching stop layer has the same size as the light absorption layer in a plan view.

9. 9. The avalanche photodiode according to claim 8, The avalanche photodiode, wherein the etch stop layer is a different material from the p-type contact layer.

10. 2. The avalanche photodiode according to claim 1, The avalanche photodiode further comprises, between the multiplication layer and the substrate, an electron transit layer disposed on the substrate side, and an electric field reduction layer disposed on the multiplication layer side.

11. 2. The avalanche photodiode according to claim 1, a p-side electrode in contact with the p-type contact layer; The avalanche photodiode further comprises an n-side electrode in contact with the n-type contact layer.

12. 12. The avalanche photodiode according to claim 11, the mesa structure is a first mesa structure having the p-side electrode disposed on an uppermost surface thereof, an avalanche photodiode having a second mesa structure including the same semiconductor multilayer as the first mesa structure, with a part of the n-side electrode disposed on the top surface thereof;

13. 13. The avalanche photodiode according to claim 12, An avalanche photodiode, wherein the side surface of the second mesa structure does not include a step in cross section.

14. 2. The avalanche photodiode according to claim 1, The avalanche photodiode is a surface-illuminated type in which light is incident from the p-type contact layer side.

15. 2. The avalanche photodiode according to claim 1, The avalanche photodiode is a back-illuminated type in which light is incident from the substrate side.

16. 16. The avalanche photodiode according to claim 15, An avalanche photodiode, wherein a lens is formed on the surface of the substrate on which light is incident.

17. 2. The avalanche photodiode according to claim 1, the mesa structure has a circular shape in a plan view, the diameter of the multiplication layer is larger than the diameter of the light absorption layer by 1 μm or more in a plan view; The avalanche photodiode, wherein the diameter of the light absorption layer is larger than the diameter of the p-type contact layer by 1 μm or more in plan view.

18. 5. The avalanche photodiode according to claim 4, The avalanche photodiode, wherein the electric field applied to the mesa structure spreads to a side surface of the light absorption layer before reaching an interface between the light absorption layer and the field adjustment layer.

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