Voltage regulator

Abstract

To suppress overshoots that occur when the voltage of an external power supply fluctuates greatly, temporarily drops below the target output value, and then returns to the normal range.SOLUTION: A voltage regulator outputs a target voltage corresponding to a reference voltage Vref from a power supply voltage Vin. The voltage regulator includes: a feedback loop circuit that receives the reference voltage Vref, feeds back a feedback voltage obtained by dividing an output voltage Vout, and controls the output voltage in accordance with the reference voltage; and a voltage division ratio changing circuit that changes the feedback voltage by changing the voltage division ratio of the output voltage Vout. When the power supply voltage Vin drops and the target voltage can no longer be maintained, the voltage division ratio changing circuit increases the feedback voltage in accordance with the power supply voltage, thereby lowering the target voltage.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to a voltage regulator that outputs a target voltage according to a reference voltage from a power supply voltage. [Background technology]

[0002] In semiconductor integrated circuits such as ICs, a voltage regulator is sometimes installed to obtain a specified internal power supply voltage from an external power supply. If a large-capacity output capacitor is installed at the output of the voltage regulator, the voltage of the internal power line can be stabilized, but this increases the circuit size. Therefore, it is common to not install an output capacitor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US 9,983,607B1 [Patent Document 2] US 2007 / 0018623A1 Summary of the Invention [Problem to be solved by the invention]

[0004] In a voltage regulator, if the voltage of the external power supply fluctuates significantly and temporarily falls below the target output value, and then returns to the normal range, an overshoot is likely to occur. This is because the feedback control loop temporarily collapses, causing the output driver to enter a full-on state, which results in it taking time to return to a controlled state.

[0005] Overshoot can be prevented by using a Zener diode or a circuit that detects the voltage and pulls it down to prevent it from exceeding a predetermined value, but this requires a relatively large surface area. Furthermore, since the reference voltage of the Zener diode or voltage detection must be set close to the regulator's output target, there is a risk of unintended output dropout due to false detection. Furthermore, while it is possible to change the reference voltage of the voltage detection according to the input voltage, this requires an operational amplifier or other device, which increases the circuit size. [Means for solving the problem]

[0006] The voltage regulator according to the present disclosure comprises: A voltage regulator that outputs a target voltage corresponding to a reference voltage from a power supply voltage, a feedback loop circuit to which a reference voltage is input, a feedback voltage obtained by dividing the output voltage is fed back, and the output voltage is controlled in accordance with the reference voltage; a voltage division ratio changing circuit that changes a feedback voltage by changing a voltage division ratio of an output voltage; Including, When the power supply voltage drops and the target voltage can no longer be maintained, the voltage division ratio change circuit reduces the feedback voltage in accordance with the power supply voltage, thereby reducing the target voltage. [Effects of the Invention]

[0007] The voltage regulator according to the present disclosure can suppress overshoot with a relatively simple circuit when the voltage of an external power supply fluctuates significantly, temporarily dropping below the target output value, and then returning to the normal range. [Brief explanation of the drawings]

[0008] [Figure 1] 1 is a circuit diagram showing a basic configuration of a voltage regulator according to an embodiment. [Figure 2] 2 is a diagram showing the operation when the power supply voltage Vin drops below the output voltage Vout in the circuit of the basic configuration of FIG. 1. FIG. [Figure 3] 1 is a circuit diagram illustrating a configuration of a voltage regulator according to an embodiment. [Figure 4] FIG. 10 is a diagram illustrating an example of the relationship between a power supply voltage Vin and a current I_pldn. [Figure 5] FIG. 2 is a circuit diagram showing a configuration of a voltage-controlled current source I_pldn. [Figure 6] 10 is a diagram showing the relationship between the power supply voltage Vin and the current of the voltage controlled current source I_pldn. [Figure 7] 7 is a diagram showing the characteristics of the output voltage Vout when the voltage controlled current source I_pldn has two types of characteristics as shown in FIG. 6. FIG. [Figure 8] 6 is a diagram showing a transient waveform when the slope of the IV characteristics is set relatively large using a voltage controlled current source I_pldn having the delay circuit shown in FIG. 5. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that the following embodiments do not limit the present disclosure, and configurations formed by selectively combining multiple examples are also included in the present disclosure.

[0010] "Basic configuration" FIG. 1 is a circuit diagram showing the basic configuration of a voltage regulator according to an embodiment. An operational amplifier 10 receives a power supply voltage Vin from an external source as an operating power supply. A reference voltage Vref is input to the negative input terminal of the operational amplifier 10, and the output terminal is connected to the gate of a transistor MP_drv. The operational amplifier 10 is a drive circuit that outputs a gate drive signal for the transistor MP_drv. The transistor MP_drv is a p-channel MOSFET.

[0011] The source of the transistor MP_drv is supplied with the power supply voltage Vin, and its drain serves as the output terminal Vout, which outputs the output voltage Vout. A capacitor Cout is connected to the output terminal Vout. The capacitor Cout is the capacitance of the internal circuitry connected to the output terminal Vout. A smoothing capacitor may also be connected to the output terminal Vout.

[0012] One end of an upper voltage dividing resistor R_top is connected to the drain of the transistor MP_drv. The other end of the upper voltage dividing resistor R_top is connected to one end of a lower voltage dividing resistor R_bot. The other end of the lower voltage dividing resistor R_bot is connected to ground.

[0013] The midpoint between the upper voltage dividing resistor R_top and the lower voltage dividing resistor R_bot is connected to the positive input terminal of the operational amplifier 10, and the voltage at the midpoint is fed back as a feedback voltage Vfb to the positive input terminal of the operational amplifier 10. In other words, the operational amplifier 10, the transistor MP_drv, and a circuit that feeds back the midpoint between the upper voltage dividing resistor R_top and the lower voltage dividing resistor R_bot to the positive input terminal of the operational amplifier 10 form a feedback loop circuit.

[0014] In such a circuit, the operational amplifier 10 operates so that the feedback voltage Vfb = Vref. That is, the operational amplifier 10 determines the gate-source voltage Vgs of the transistor MP_drv in response to the input reference voltage Vref so that the feedback voltage Vfb, which is the drain voltage, matches the reference voltage Vref. Therefore, Vout = Vref · (R_top + R_bot) / R_bot.

[0015] Figure 2 shows the operation of the circuit with the basic configuration shown in Figure 1 when the power supply voltage Vin drops below the output voltage Vout. In this example, it is assumed that the target voltage for the output voltage Vout is 5V and the power supply voltage Vin drops to 3.5V. In this case, it is sufficient to set R_bot / (R_top+R_bot)=Vref / 5.

[0016] In a circuit with a basic configuration, when the power supply voltage Vin fluctuates significantly and temporarily falls below the output voltage Vout, a large overshoot is likely to occur when it returns to the normal range. This is because when the power supply voltage Vin is below Vout, the feedback control loop temporarily collapses, causing the transistor MP_drv to enter a full-on state, and as a result, it takes time to return to the feedback control state.

[0017] "Configuration of the embodiment" 3 is a circuit diagram showing the configuration of a voltage regulator according to an embodiment. As shown, one end of each of the additional resistor Radd and the voltage-controlled current source I_pldn is connected in parallel to the lower side of the lower voltage-dividing resistor R_bot, and the other end of each of the additional resistor Radd and the voltage-controlled current source I_pldn is connected to ground. The voltage-controlled current source I_pldn is a voltage-controlled current source whose current I_pldn changes depending on the voltage of the power supply voltage Vin. The current flowing through the voltage-controlled current source I_pldn is also referred to as I_pldn. The additional resistor Radd and the voltage-controlled current source I_pldn form a voltage-dividing ratio changing circuit.

[0018] The other configuration is the same as in FIG. 1, with the midpoint between the upper voltage dividing resistor R_top and the lower voltage dividing resistor R_bot being connected to the positive input terminal of the operational amplifier 10.

[0019] In this way, the additional resistor Radd and the voltage-controlled current source I_pldn are connected in parallel below the two voltage-dividing resistors R_top and R_bot on the lower side of the output voltage Vout. Therefore, the amount of current flowing through the additional resistor Radd changes depending on the amount of current in the voltage-controlled current source I_pldn. Therefore, the two resistors together essentially function as a variable resistor.

[0020] When the power supply voltage Vin is equal to or higher than the target voltage, the maximum current is passed through the additional resistor Radd so that its resistance becomes essentially zero. When the power supply voltage Vin drops below the normal target voltage, the current passing through the voltage-controlled current source I_pldn is reduced according to the power supply voltage Vin. When the current passing through the voltage-controlled current source I_pldn is zero, the minimum target voltage for the output voltage Vout is Vout=Vref·(R_top+R_bot+Radd) / (R_bot+Radd).

[0021] 4 is a diagram showing an example of the relationship between the power supply voltage Vin and the current I_pldn. When three times the reference voltage Vref corresponds to the lowest target voltage, as shown in FIG. 4, by controlling the current value of the voltage-controlled current source I_pldn, it is possible to maintain the feedback loop until the power supply voltage Vin decreases to 3*Vref.

[0022] For example, if the reference voltage is 1V and the target voltage is 5V, setting the resistance ratio of the upper voltage divider resistor R_top and the lower voltage divider resistor R_bot to 4:1 will result in the feedback voltage Vfb = 1V. Then, setting the resistance ratio of the upper voltage divider resistor R_top, the lower voltage divider resistor R_bot, and the additional resistor Radd to 4:1:1 will make the target voltage 3V.

[0023] In this way, by maintaining the feedback loop, the control does not fail, and it is possible to prevent the target voltage from overshooting when the control is restored.

[0024] If a variable resistor can be used, a variable resistor whose resistance value changes depending on the value of the power supply voltage Vin may be used instead of the parallel arrangement of the additional resistor Radd and the voltage controlled current source I_pldn.

[0025] "Voltage controlled current source I_pldn" 5 is a circuit diagram showing the configuration of a voltage-controlled current source I_pldn. Multiple resistors are placed between the power supply voltage Vin and ground to divide the power supply voltage Vin, resulting in a divided voltage Vin / n that changes depending on the power supply voltage Vin. In the example shown, three voltage-dividing resistors with a resistance value of R1 are provided, and a divided voltage of Vin / 3, where n=3, is obtained.

[0026] The source of p-channel transistor MP4, whose gate and drain are shorted, is connected to the output voltage Vout, and the drain of transistor MP4 is connected to the drain of n-channel transistor MN4. The gate of transistor MN4 is supplied with reference voltage Vref, and its source is connected to ground via resistor R4. Therefore, a current of (Vref-Vgs_MN4) / R4 flows through transistor MN4 and transistor MP4.

[0027] The gate of transistor MP4 is connected to the gate of p-channel transistor MP3. The source of transistor MP3 is connected to output voltage Vout, and transistors MP4 and MP3 form a current mirror. The drain of transistor MP3 is connected to the drain of n-channel transistor MN3, and the source of transistor MN3 is connected to ground via resistor R3.

[0028] A divided voltage of the power supply voltage Vin is supplied to the gate of the transistor MN3, so that a current of (Vin / n-Vgs_MN3) / R3 flows through the resistor R3 and the transistor MN3.

[0029] The drain of a p-channel transistor MP2, whose gate and drain are shorted, is connected to the connection point between the transistors MP3 and MN3. The output voltage Vout is supplied to the source of the transistor MP2.

[0030] Therefore, the current flowing through transistor MP2 is (Vin / n-Vgs_MN3) / R3-(Vref-Vgs_MN4) / R4.

[0031] With this configuration, the current flowing through transistor MP2 changes depending on the power supply voltage Vin. For example, if transistors MP4 and MP3 are the same size, transistors MN4 and MN3 have the same Vgs, and resistance values ​​R4 = R3 = R, then a current of (Vin / n - Vref) / R flows through transistor MP2.

[0032] The gate and drain of the transistor MP2 are shorted, and its gate is connected to the gate of the p-channel transistor MP1. The source of the transistor MP1 is connected to the output voltage Vout, and the transistors MP2 and MP1 form a current mirror.

[0033] The drain of transistor MP1 is connected to the drain of n-channel transistor MN2. The gate and drain of transistor MN2 are shorted, and the source is connected to ground. For example, if transistor MP2 and transistor MP1 are the same size, the same current will flow through transistor MP1 and transistor MN2 as through transistor MP2.

[0034] The gate of transistor MN2 is connected to the gate of n-channel transistor MN1 via resistor Rdly, and the gate of transistor MN1 is connected to ground via capacitor Cdly. The combination of resistor Rdly and capacitor Cdly functions as a delay circuit that delays the transmission of a signal from the gate of transistor MN2 to the gate of transistor MN1.

[0035] The source of the transistor MN1 is connected to the ground, and the current flowing through this transistor MN1 becomes the current I_pldn of the voltage controlled current source I_pldn. That is, the drain of the transistor MN1 is connected to the lower voltage dividing resistor R_bot in FIG.

[0036] It should be noted that the power consumption of the circuit in FIG. 5 can be made relatively small by setting the ratio of transistor MN2 to transistor MN1 to 1:N and making the current flowing through transistor MN2 relatively small.

[0037] Here, when the power supply voltage Vin is decreasing, the Vin voltage at which the output target begins to decrease is determined by the slope of the IV characteristic. Figure 6 shows the relationship between the power supply voltage Vin and the current of the voltage-controlled current source I_pldn. The two characteristics have different slopes, although the power supply voltage Vin at which the current I_pldn becomes zero is 3.6V. The characteristic shown by the dashed line has a small slope, while the characteristic shown by the solid line has a large slope. In the characteristic shown by the dashed line, the current I_pldn begins to decrease when the power supply voltage Vin reaches approximately 5.5V. On the other hand, in the characteristic shown by the solid line, the current I_pldn begins to decrease when the power supply voltage Vin reaches approximately 4.5V.

[0038] Fig. 7 is a diagram showing the characteristics of the output voltage Vout when the voltage-controlled current source I_pldn has two types of characteristics as shown in Fig. 6. As shown in the characteristics shown by the dashed line, when the power supply voltage reaches about 5.5V, the current I_pldn begins to decrease, and the output voltage Vout gradually decreases, eventually reaching 3.3V.

[0039] On the other hand, in the characteristics shown by the solid line, when the power supply voltage Vin reaches 5V, the feedback loop breaks down, the transistor MP_drv turns fully on, and the output voltage Vout decreases along with the power supply voltage Vin. Then, the current I_pldn begins to decrease, and as the target voltage decreases, the output voltage Vout also decreases, dropping to 3.3V. In this way, if the slope of the IV characteristics is increased, MP_drv turns fully on within a certain range of VIN, and the output voltage Vout becomes the same level as the power supply voltage Vin.

[0040] The output voltage Vout shown by the solid line exhibits a relatively small drop, making it ideal for circuit blocks that use it as a power supply. However, if the power supply voltage Vin suddenly returns to normal, the feedback loop control will not be able to recover in time, making it impossible to prevent overshoot.

[0041] 5 includes a delay circuit configured with a resistor Rdly and a capacitor Cdly, which delays the change in the current I_pldn relative to the change in the difference between the power supply voltage Vin and the reference voltage Vref.

[0042] FIG. 8 is a diagram showing a transient waveform when the slope of the IV characteristics is set relatively large using the voltage controlled current source I_pldn having the delay circuit shown in FIG.

[0043] In this way, when the power supply voltage Vin falls below the output voltage Vout, the delay circuit delays the decrease in the current I_pldn, breaking the feedback loop and turning the transistor MP_drv fully on. However, the current I_pldn subsequently decreases, maintaining the feedback loop. Then, when the power supply voltage Vin rises and returns to above the output voltage Vout, the feedback loop is maintained, preventing overshoot. As shown in Figure 8, the delay in the recovery of the current I_pldn slightly reduces the slope of the rise in the output voltage Vout.

[0044] In this way, by providing a delay circuit, it is possible to prevent a large drop in the output voltage Vout when the power supply voltage Vin drops, and also to prevent the occurrence of an overshoot when the power supply voltage Vin rises.

[0045] "Effects of the embodiment" In this embodiment, the voltage division ratio can be seamlessly changed by changing the current value of the voltage-controlled current source I_pldn to maintain the feedback loop, thereby preventing the transistor MP_drv from turning on fully and preventing overshoot of the output voltage Vout during the recovery of the power supply voltage Vin.

[0046] Moreover, by making the slope of the IV characteristics of the voltage controlled current source I_pldn with respect to the power supply voltage Vin relatively large and adding a delay circuit, it is possible to avoid overshoot and at the same time maintain a wide range of the output voltage.

[0047] The control according to this embodiment is feedforward control that responds to the power supply voltage Vin, so there is no need to handle a large current corresponding to the output of the transistor MP_drv, and the circuit scale for control can be made relatively small.

[0048] The circuit in Figure 5 uses a differential input configuration to compare the power supply voltage Vin with an accurate reference voltage to control the current flow of the voltage-controlled current source I_pldn, thereby accurately setting the threshold voltage at which the power supply voltage Vin begins to change. [Explanation of symbols]

[0049] 10 Op-amp, I_pldn Voltage controlled current source, R_bot Lower voltage divider resistor, R_top Upper voltage divider resistor, Radd Additional resistor, Vin Power supply voltage, Vref Reference voltage, Vout Output voltage.

Claims

1. A voltage regulator that outputs a target voltage corresponding to a reference voltage from a power supply voltage, a feedback loop circuit to which a reference voltage is input, a feedback voltage obtained by dividing the output voltage is fed back, and the output voltage is controlled in accordance with the reference voltage; a voltage division ratio changing circuit that changes a feedback voltage by changing a voltage division ratio of an output voltage; Including, When the power supply voltage drops and the target voltage cannot be maintained, the voltage division ratio change circuit increases the feedback voltage in accordance with the power supply voltage, thereby lowering the target voltage. Voltage regulator.

2. 2. The voltage regulator according to claim 1, The voltage division ratio changing circuit includes a voltage dividing resistor that outputs a feedback voltage from a midpoint, an additional resistor connected downstream of the voltage dividing resistor, and a voltage controlled current source that is connected in parallel with the additional resistor and whose current amount is changed according to the power supply voltage. Including, Voltage regulator.

3. 2. The voltage regulator according to claim 1, the voltage division ratio changing circuit includes a delay circuit, and a change in the power supply voltage is delayed by the delay circuit and transmitted to the voltage controlled current source; Voltage regulator.

Images