Electric power conversion system

Abstract

To reduce a peak value of a current flowing through a reactor.SOLUTION: A control part (80) causes a booster (40) to operate in a continuous current mode. A voltage of a second capacitor (41) is adjusted by controlling a charging switch (43) so that a peak value of a current flowing through a second reactor (42) becomes smaller than the peak value (Pk1) of the current flowing through the second reactor (42) when the voltage of the second capacitor (41) is a peak value (Vm) of a power supply voltage and the peak value (Pk2) of the current flowing through the second reactor (42) when the voltage of the second capacitor (41) is the element withstand voltage (Vbr) of the second capacitor (41).SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present disclosure relates to a power conversion device including a rectifier circuit, an inverter, and a booster. [Background technology]

[0002] Patent Document 1 discloses a power conversion device including: a rectifier circuit that rectifies an AC voltage output from a single-phase AC power supply and outputs the rectified voltage; a DC link; an inverter that converts DC power input from the DC link into AC power and supplies it to a load; a capacitor; a reactor provided in a charging path that passes current from the single-phase AC power supply to the capacitor; a booster that has a charging switch that switches between a state in which energy is stored in the reactor and a state in which energy is released from the reactor, and that boosts the rectified voltage and outputs the boosted voltage to the capacitor; and a discharge switch connected between the capacitor and the DC link so as to intermittently apply the boosted voltage from the capacitor to the DC link. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 5626435 Summary of the Invention [Problem to be solved by the invention]

[0004] In the power conversion device disclosed in Patent Document 1, there is a demand to reduce the peak value of the current flowing through the reactor.

[0005] An object of the present disclosure is to reduce the peak value of the current flowing through the reactor. [Means for solving the problem]

[0006] A first aspect of the present disclosure provides a power supply system including: a rectifier circuit (10, 90) that rectifies an AC voltage output from a single-phase AC power source (2) and outputs the rectified voltage; a DC link (20); an inverter (60) that converts DC power input from the DC link (20) into AC power and supplies the AC power to a load (3); a booster (40) that includes: a capacitor (41); a reactor (42) provided in a charging path that passes a current from the single-phase AC power source (2) to the capacitor (41); and a charging switch (43) that switches between a state in which energy is stored in the reactor (42) and a state in which energy is released from the reactor (42), and that boosts the rectified voltage and outputs the boosted voltage to the capacitor (41); and a discharge switch (43) connected between the capacitor (41) and the DC link (20) so as to intermittently apply the boosted voltage from the capacitor (41) to the DC link (20). The power conversion device includes a switch (50) and a control unit (80) that controls the charging switch (43) and the discharging switch (50), wherein the booster (40) is operated in a continuous current mode, and the control unit (80) adjusts the voltage of the capacitor (41) by controlling the charging switch (43) so that the peak value of the current flowing through the reactor (42) is smaller than a peak value (Pk1) of the current flowing through the reactor (42) when the voltage of the capacitor (41) is set to a peak value (Vm) of the power supply voltage and a peak value (Pk2) of the current flowing through the reactor (42) when the voltage of the capacitor (41) is set to a device withstand voltage (Vbr) of the capacitor (41), and the voltage of the capacitor (41) is greater than the peak value (Vm) of the power supply voltage and less than the device withstand voltage (Vbr) of the capacitor (41).

[0007] In the first aspect, by adjusting the voltage of the capacitor (41), it is possible to make the peak value of the current flowing through the reactor (42) smaller than the peak value (Pk1) of the current flowing through the reactor (42) when the voltage of the capacitor (41) is set to the peak value (Vm) of the power supply voltage and the peak value (Pk2) of the current flowing through the reactor (42) when the voltage of the capacitor (41) is set to the element withstand voltage (Vbr) of the capacitor (41).

[0008] A second aspect of the present disclosure is characterized in that, in the first aspect, the control unit (80) controls the charging switch (43) so that a difference between the voltage of the capacitor (41) and a voltage at which a peak value of a current flowing through the reactor (42) is smallest, among voltages that are greater than a peak value (Vm) of the power supply voltage and less than an element withstand voltage (Vbr) of the capacitor (41), is 10 V or less.

[0009] In the second mode, the peak value of the current flowing through the reactor (42) can be set to a value close to the minimum value.

[0010] A third aspect of the present disclosure is characterized in that in the first or second aspect, the control unit (80) controls the charging switch (43) so that the voltage of the capacitor (41) changes depending on the power consumption of the load (3).

[0011] In the third aspect, the voltage of the capacitor (41) can be controlled in accordance with the power consumption of the load (3).

[0012] A fourth aspect of the present disclosure is characterized in that, in the third aspect, the control unit (80) controls the charging switch (43) so that the voltage of the capacitor (41) increases as the power consumption of the load (3) increases.

[0013] In the fourth aspect, the voltage of the capacitor (41) can be increased in response to an increase in the power consumption of the load (3).

[0014] A fifth aspect of the present disclosure is characterized in that, in any one of the first to fourth aspects, the peak value of the current flowing through the reactor (42) is equal to or less than a magnetic saturation allowable current (Is) of the reactor (42).

[0015] In the fifth aspect, magnetic saturation of the reactor (42) can be suppressed. [Brief explanation of the drawings]

[0016] [Figure 1] FIG. 1 is a circuit diagram showing a configuration of a power conversion device according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a timing chart showing the current flowing through the second reactor. [Figure 3] FIG. 3 is a graph illustrating the relationship between the buffer voltage and the peak value of the switching frequency component of the current flowing through the second reactor, the peak value of the power supply double frequency component of the current flowing through the second reactor, and the sum of these peak values. [Figure 4] FIG. 4 is a graph illustrating the relationship between the buffer voltage and the peak value of the current flowing through the second reactor. [Figure 5] FIG. 5 is a graph showing the relationship between the current flowing through the second reactor and the inductance of the second reactor. [Figure 6] FIG. 6 is a graph illustrating the relationship between the buffer voltage and the peak value of the current flowing through the second reactor when there is no variation in the current flowing through the second reactor, under conditions where the current flowing through the second reactor is at its minimum, and under conditions where the current flowing through the second reactor is at its maximum. [Figure 7] FIG. 7 is a timing chart of the buffer voltage and the current flowing through the second reactor when the average voltage of the buffer voltage is set to 365V and when the average voltage of the buffer voltage is set to 440V. [Figure 8] 1 is a circuit diagram showing an equivalent circuit of a circuit portion of a power conversion device according to a first embodiment of the present disclosure. [Figure 9] FIG. 1 is a view corresponding to FIG. 1 of the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0017] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that the following embodiments are essentially preferred examples and are not intended to limit the scope of the present invention, its applications, or its uses.

[0018] (Embodiment 1) <Summary> 1 shows a power converter (1) according to a first embodiment of the present disclosure. The power converter (1) includes a first rectifier circuit (10), a DC link (20), a low-pass filter (30), an active buffer (Buf), an inverter (60), first to third current detectors (71 to 73), and a control unit (80).

[0019] The first rectifier circuit (10) converts AC power output from the single-phase AC power supply (2) into DC power and outputs first instantaneous power.

[0020] The active buffer (Buf) receives a second instantaneous power, which is a portion of the first instantaneous power output by the first rectifier circuit (10). The active buffer (Buf) outputs a third instantaneous power and buffers a fourth instantaneous power, which is the difference between the third instantaneous power and the second instantaneous power.

[0021] The inverter (60) receives a fifth instantaneous power obtained by subtracting the second instantaneous power from the first instantaneous power from the first rectifier circuit (10), and receives a third instantaneous power from the active buffer (Buf). The inverter (60) converts a sixth instantaneous power, which is the sum of the fifth instantaneous power and the third instantaneous power, into an output instantaneous power and outputs the sixth instantaneous power.

[0022] <1st rectifier circuit> The first rectifier circuit (10) full-wave rectifies the AC voltage output from the single-phase AC power supply (2) and outputs a first rectified voltage to the DC link (20). The first rectifier circuit (10) has four diodes (11-14) connected in a bridge configuration.

[0023] <DC link> The DC link (20) has a high-potential power supply line (21) and a low-potential power supply line (22). A higher potential is applied to the high-potential power supply line (21) than to the low-potential power supply line (22) by the first rectifier circuit (10).

[0024] <Low-pass filter> The low-pass filter (30) includes a first reactor (31) and a first capacitor (32).

[0025] The first reactor (31) is provided on the high-potential side power supply line (21) and is connected between the first rectifier circuit (10) and a first capacitor (32) described later.

[0026] The first capacitor (32) is connected between the high potential side power supply line (21) and the low potential side power supply line (22).

[0027] The low-pass filter (30) suppresses propagation of a ripple current caused by switching associated with operation of the active buffer (Buf) and operation of the inverter (60) to the single-phase AC power supply (2). On the other hand, the low-pass filter (30) also has a function of transmitting the first rectified voltage output by the first rectifier circuit (10) to the active buffer (Buf). Therefore, the cutoff frequency of the low-pass filter (30) is set to a level high enough to transmit the first rectified voltage output by the first rectifier circuit (10) from the first rectifier circuit (10) to the active buffer (Buf) and a level low enough to suppress propagation of a ripple current caused by switching to the single-phase AC power supply (2).

[0028] <active buffer> The active buffer (Buf) includes a booster (40), a discharge switch (50), a first diode (50a), and a second diode (51).

[0029] The booster (40) includes a second capacitor (41), a second reactor (42), a charging switch (43), a third diode (43a), and a fourth diode (44).

[0030] The second reactor (42), the fourth diode (44), and the second capacitor (41) are connected between the high potential side power supply line (21) and the low potential side power supply line (22) in this order from the high potential side power supply line (21) side.

[0031] The second reactor (42) is provided in a charging path through which a current flows from the single-phase AC power supply (2) to the second capacitor (41). One end of the second reactor (42) is connected to the high-potential power supply line (21).

[0032] The anode of the fourth diode (44) is connected to the other end of the second reactor (42).

[0033] One end of the second capacitor (41) is connected to the cathode of the fourth diode (44), and the other end of the second capacitor (41) is connected to the low potential side power supply line (22).

[0034] The charging switch (43) is formed of, for example, an insulated-gate bipolar transistor (IGBT). The collector of the charging switch (43) is connected to the anode of the fourth diode (44) and the other end of the second reactor (42). The emitter of the charging switch (43) is connected to the low potential side power supply line (22). The charging switch (43) can be switched between a state in which energy is stored in the second reactor (42) and a state in which energy is released from the second reactor (42) by turning on and off.

[0035] The cathode of the third diode (43a) is connected to the collector of the charging switch (43), and the anode of the third diode (43a) is connected to the emitter of the charging switch (43).

[0036] The booster (40) configured as described above can boost the first rectified voltage output by the first rectifier circuit (10) and output the boosted voltage to the second capacitor (41). Hereinafter, the voltage of the second capacitor (41) will be referred to as a buffer voltage.

[0037] The discharge switch (50) is configured, for example, by an insulated gate bipolar transistor. The discharge switch (50) is connected between the high potential side power supply line (21) and one end of the second capacitor (41) (one end on the opposite side to the low potential side power supply line (22)). The emitter of the discharge switch (50) is connected to the high potential side power supply line (21), and the collector of the discharge switch (50) is connected to the second capacitor (41). The discharge switch (50) intermittently applies the boosted voltage from the second capacitor (41) to the DC link (20).

[0038] The anode of the first diode (50a) is connected to the emitter of the discharge switch (50), and the cathode of the first diode (50a) is connected to the collector of the discharge switch (50).

[0039] The second diode (51) is provided on the high-potential side power supply line (21). The anode of the second diode (51) is connected to one end of the second reactor (42), and the cathode of the second diode (51) is connected to the emitter of the discharge switch (50). The second diode (51) prevents a current from flowing from the second capacitor (41) to the low-pass filter (30) via the high-potential side power supply line (21). The second diode (51) also prevents the first capacitor (32) from being charged by the charge stored in the second capacitor (41).

[0040] <Inverter> The inverter (60) converts DC power input from the DC link (20) into AC power and supplies it to the load (3). Specifically, one input node of the inverter (60) is connected to the cathode of the second diode (51). The other input node of the inverter (60) is connected to the low-potential side power line (22).

[0041] The inverter (60) has a plurality of switching elements (61-66) and freewheeling diodes (61a-66a). The plurality of switching elements (61-66) include three upper arm switching elements (61-63) and three lower arm switching elements (64-66). Each of the upper arm switching elements (61-63) is connected in series to a corresponding lower arm switching element (64-66). Midpoints between the upper arm switching elements (61-63) and the lower arm switching elements (64-66) are connected to the coils of each phase (U-phase coil, V-phase coil, W-phase coil) of the load (3), respectively, and form output nodes of the inverter (60). Hereinafter, the output current of the inverter (60) flowing from the inverter (60) to the U phase of the load (3) will be referred to as a U-phase current, the output current of the inverter (60) flowing from the inverter (60) to the V phase of the load (3) will be referred to as a V-phase current, and the output current of the inverter (60) flowing from the inverter (60) to the W phase of the load (3) will be referred to as a W-phase current.

[0042] Each of the switching elements (61 to 66) is formed of, for example, an insulated gate bipolar transistor.

[0043] The freewheeling diodes (61a-66a) are connected in parallel to the corresponding switching elements (61-66), respectively.

[0044] <First to third current detectors> The first current detector (71) detects a U-phase current output by the inverter (60).

[0045] The second current detector (72) detects the V-phase current output by the inverter (60).

[0046] The third current detector (73) detects a W-phase current output by the inverter (60).

[0047] <Load> The load (3) is, for example, an interior permanent magnet (IPM) motor. The load (3) can be represented by an equivalent circuit including a U-phase series connection of a U-phase coil and a U-phase resistor, a V-phase series connection of a V-phase coil and a V-phase resistor, and a W-phase series connection of a W-phase coil and a W-phase resistor. One end of the U-phase series connection is connected to a U-phase output of the inverter (60), one end of the V-phase series connection is connected to a V-phase output of the inverter (60), and one end of the W-phase series connection is connected to a W-phase output of the inverter (60). The other end of the U-phase series connection, the other end of the V-phase series connection, and the other end of the W-phase series connection are connected to each other. The load (3) forms a so-called star connection.

[0048] <Control unit> The control unit (80) converts the U-phase current, V-phase current, and W-phase current detected by the first to third current detectors (71 to 73) into a dq coordinate system, and calculates the d-axis current, the q-axis current, and the rotational angular velocity of the load (3).

[0049] The control unit (80) generates a command value for a d-axis voltage, a command value for a q-axis voltage, and command values ​​for three-phase voltages based on the d-axis current, the q-axis current, the rotational angular velocity of the load (3), and a command value for the rotational angular velocity input from outside, so as to reduce the deviation between the calculated rotational angular velocity and its command value. The d-axis voltage and the q-axis voltage are obtained by converting the three-phase voltages output by the inverter (60) into a dq coordinate system.

[0050] The control unit (80) also determines a command value for an equivalent DC voltage based on the command value for the d-axis voltage, the command value for the q-axis voltage, the d-axis current, and the q-axis current. Here, the equivalent DC voltage is a DC voltage that is applied to the DC link (20) and is obtained by dividing the sixth instantaneous power by the DC current supplied to the inverter (60).

[0051] The control unit (80) then controls the on / off of the discharge switch (50) so that the equivalent DC voltage follows the command value.

[0052] The control unit (80) also determines a command value for the current flowing through the second reactor (42) so that the buffer voltage (the voltage of the second capacitor (41)) follows a predetermined command value for the buffer voltage. A method for determining the command value for the buffer voltage will be described later.

[0053] Furthermore, the control unit (80) controls the charging switch (43) so that the buffer voltage (the voltage of the second capacitor (41)) changes depending on the power consumption of the load (3). Specifically, the control unit (80) controls the charging switch (43) so that the buffer voltage increases as the power consumption of the load (3) increases.

[0054] The control unit (80) controls the on / off of the charging switch (43) based on the amplitude of the AC voltage input from the single-phase AC power supply (2) to the first rectifier circuit (10), a command value for the buffer voltage, a command value for the current flowing through the second reactor (42), and a power supply angular velocity.

[0055] The control unit (80) also controls the on / off of the switching elements (61-66) of the inverter (60) by a well-known method based on the d-axis current, the q-axis current, and the rotational angular velocity of the load (3) and a command value of the rotational angular velocity input from outside.

[0056] The technology for controlling the discharge switch (50), the charge switch (43), and the switching elements (61-66) as described above is known from, for example, JP 2023-165461 A.

[0057] The control unit (80) operates the booster (40) in a continuous current mode. In Fig. 2, the current flowing through the second reactor (42) is indicated by a solid line. As shown in Fig. 2, the continuous current mode is a mode in which the current flowing through the second reactor (42) is continuous without being reduced to 0 A midway.

[0058] The current flowing through the second reactor (42) is a double frequency component of the power supply indicated by the dashed line in FIG. 2 and a frequency component indicated by the symbol I LRIPPLE This is the sum of the ripple current due to the switching of the charging switch (43) shown by

[0059] The peak value of the power supply double frequency component contained in the current flowing through the second reactor (42) during the power supply period is expressed by the following equation (1). (2f) is the peak value of the power supply double frequency component contained in the current flowing through the second reactor (42), and p out is the input power of the inverter (60), and V m is the peak value of the power supply voltage (peak value of the output voltage of the single-phase AC power supply (2)), and V dc is the equivalent DC voltage, and the buffer voltage (the voltage of the second capacitor (41)) is V c Let's say.

[0060]

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[0061] The peak value of the switching frequency component included in the current flowing through the second reactor (42) is expressed by the following equation (2): (fs) is the peak value of the switching frequency component contained in the current flowing through the second reactor (42), and f S is the switching frequency of the charging switch (43), and L is the inductance value of the second reactor (42).

[0062]

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[0063] The lower part of Fig. 3 illustrates the relationship between the buffer voltage and the peak value of the switching frequency component of the current flowing through the second reactor 42 and the peak value of the power supply double frequency component of the current flowing through the second reactor 42. The upper part of Fig. 4 illustrates the relationship between the buffer voltage and the sum of the peak value of the switching frequency component and the peak value of the power supply double frequency component.

[0064] FIG. 4 illustrates the relationship between the buffer voltage and the peak value of the current flowing through the second reactor (42).

[0065] The control unit (80) adjusts the voltage of the second capacitor (41) by controlling the charging switch (43) so that the peak value (Pk1) of the current flowing through the second reactor (42) when the voltage (buffer voltage) of the second capacitor (41) is set to the peak value (Vm) of the power supply voltage is smaller than the peak value (Pk2) of the current flowing through the second reactor (42) when the voltage of the second capacitor (41) is set to the element withstand voltage (Vbr) of the second capacitor (41).

[0066] For example, when the power supply voltage is 200V, the peak value (Vm) of the power supply voltage is 282.8V.

[0067] Furthermore, the control unit (80) controls the voltage of the second capacitor (41) so that it is greater than the peak value (Vm) of the power supply voltage and less than the withstand voltage (Vbr) of the second capacitor (41).

[0068] Furthermore, the control unit (80) controls the voltage of the second capacitor (41) so that the peak value of the current flowing through the second reactor (42) is equal to or less than the magnetic saturation allowable current (Is) of the second reactor (42) (see FIG. 5).

[0069] In the example of FIG. 4, the control unit (80) controls the charging switch (43) to set the voltage of the second capacitor (41) to a value included in the range indicated by the symbol RV.

[0070] Specifically, the control unit (80) determines a command value for the buffer voltage (the voltage of the second capacitor (41)) with reference to the U-phase current, the V-phase current, and the W-phase current detected by the first to third current detectors (71 to 73) so that the buffer voltage increases as the power consumption of the load (3) increases. The control unit (80) selects a command value for the buffer voltage (the voltage of the second capacitor (41)) from preset and stored set values ​​based on the U-phase current, the V-phase current, and the W-phase current detected by the first to third current detectors (71 to 73). The set value is set to be greater than the peak value (Vm) of the power supply voltage and less than the element breakdown voltage (Vbr) of the second capacitor (41). The set value is set to a voltage that makes the peak value of the current flowing through the second reactor (42) smaller than the peak value (Pk1) of the current flowing through the second reactor (42) when the buffer voltage is the peak value (Vm) of the power supply voltage and the peak value (Pk2) of the current flowing through the second reactor (42) when the buffer voltage is the element withstand voltage (Vbr) of the second capacitor (41). The set value is set to a voltage that makes the peak value of the current flowing through the second reactor (42) equal to or smaller than the magnetic saturation allowable current (Is) of the second reactor (42). The relationship between the buffer voltage and the peak value of the current flowing through the second reactor (42) changes depending on the power consumption of the load (3). Specifically, as the power consumption of the load (3) increases, the buffer voltage at which the peak value of the current flowing through the second reactor (42) is minimum increases. Therefore, by determining the command value of the buffer voltage so that the buffer voltage increases as the power consumption of the load (3) increases, the peak value of the current flowing through the second reactor (42) can be reduced regardless of the power consumption of the load (3).

[0071] Among the factors that change the current flowing through the second reactor (42), the inductance value of the second reactor (42) and the switching frequency of the charging switch (43) are likely to cause numerical variations during operation.

[0072] As shown in Fig. 5, even if the current flowing through the second reactor (42) is equal to or less than the magnetic saturation allowable current (Is), there is a difference (Lf) between the minimum and maximum inductance values ​​[µF] of the second reactor (42). The difference (Lf) is approximately 10% of the maximum value. In a region where the current flowing through the second reactor (42) is large, the inductance value [µF] becomes small.

[0073] When the charging switch (43) is digitally controlled by a microcomputer, the switching frequency of the charging switch (43) does not vary.

[0074] On the other hand, when the charging switch (43) is controlled by an analog circuit including a capacitor, for example, the charging switch (43) may be controlled by an analog IC circuit L4984D from STMicroelectronics (registered trademark). In such a case, the switching frequency is determined by the charging and discharging of the capacitor externally connected to the TIMER terminal. If the capacitance of the capacitor varies within a range of ±5%, the switching frequency of the charging switch (43) will also vary within a range of ±5%.

[0075] In Fig. 6, graph X1 illustrates the relationship between the buffer voltage and the peak value of the current flowing through the second reactor (42) when there is no variation in the current flowing through the second reactor (42). The case where there is no variation in the current flowing through the second reactor (42) refers to the case where there is no variation in the inductance value of the second reactor (42) and the switching frequency of the charging switch (43). Graph X2 illustrates the relationship between the buffer voltage and the peak value of the current flowing through the second reactor (42) under the condition where the current flowing through the second reactor (42) is minimized. The condition where the current flowing through the second reactor (42) is minimized refers to the case where the inductance value of the second reactor (42) is the maximum value within its variation range and the switching frequency of the charging switch (43) is the highest value within its variation range. Graph X3 illustrates the relationship between the buffer voltage and the peak value of the current flowing through the second reactor (42) under the condition that the current flowing through the second reactor (42) is maximized. The condition that the current flowing through the second reactor (42) is maximized is when the inductance value of the second reactor (42) is at its minimum within its variation range and the switching frequency of the charging switch (43) is at its minimum within its variation range. In graph X2, the buffer voltage when the peak value of the current flowing through the second reactor (42) is at its minimum (point M2) is 5 V higher than the buffer voltage when the peak value of the current flowing through the second reactor (42) is at its minimum (point M1) in graph X1. In graph X3, the buffer voltage at point M3 when the peak value of the current flowing through the second reactor (42) is smallest is 10 V lower than the buffer voltage at point M1 when the peak value of the current flowing through the second reactor (42) is smallest in graph X1. In this way, the buffer voltage at which the peak value of the current flowing through the second reactor (42) is smallest varies within a predetermined range of −5 V to +10 V.

[0076] Therefore, it is preferable that the control unit (80) controls the charging switch (43) so that the difference between the buffer voltage and the voltage at which the peak value of the current flowing through the second reactor (42) is smallest, among voltages that are greater than the peak value (Vm) of the power supply voltage and less than the element withstand voltage (Vbr) of the second capacitor (41), is 10 V or less.

[0077] For example, when the relationship between the buffer voltage and the peak value of the current flowing through the second reactor (42) is as shown in Fig. 4, the peak value of the current flowing through the second reactor (42) is smallest when the buffer voltage is about 365 V. In this case, as shown in Fig. 7, when the average value of the buffer voltage is adjusted to 365 V, the peak value of the current flowing through the second reactor (42) can be made smaller than when the average value of the buffer voltage is adjusted to 440 V.

[0078] <Derivation of Equation (1)> Here, a method for deriving equation (1) that expresses the double power supply frequency component of the current flowing through the second reactor (42) will be described.

[0079] The peak value of the power supply voltage Vm is V m , the peak value of the power supply current is I m , input power is p in If the power supply angular velocity is ω, the input power is expressed by the following equation (3): The input power is expressed as the sum of a steady component and a pulsating component that is twice the power supply frequency.

[0080]

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[0081] Here, the power buffered in the active buffer (Buf) is the compensation power p buf Then,

[0082]

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[0083] Input power pin and compensation power p buf The output power p out is expressed as the following equation (5): dc Let be the current flowing into the input terminal of the inverter (60).

[0084]

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[0085] FIG. 8 is an equivalent circuit of the power conversion device (1) according to the first embodiment of the present disclosure.

[0086] The inverter (60) is a DC current source (I dc ) and the current distribution ratio d rec , d c , d z For each current i rec1 ,i c ,i z current I dc The current flowing through the load (3) via the inverter (60) when the output terminals (81, 82, 83) of the inverter (60) are commonly connected to either the high-potential side power line (21) or the low-potential side power line (22) of the DC link (20) is referred to as the zero-phase current i z The current distribution ratio d z is always the zero-phase current i z is the distribution rate that i rec1 is the S of the direct conversion part rec is the current flowing through i c is the discharge part S c The current flowing through the direct conversion section is S rec current flowing through the discharge section, S c The current distribution ratio of the current flowing through the rec , d c , d z Then, the following equation (6) holds.

[0087]

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[0088] Zero-sequence current i z During the period when d flows, the DC voltage in the DC link (20) is not available. z = 0, the equivalent DC voltage V that can be used for power conversion by the inverter (60) dc The maximum voltage is obtained, and the following equation (7) holds.

[0089]

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[0090] From equation (7), the current distribution ratio d rec can be expressed by the following equation (8).

[0091]

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[0092] The current distribution ratio of the discharge circuit can be expressed by the following equation (9) based on equations (6) and (8).

[0093]

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[0094] From equation (5), the following equation (10) holds.

[0095]

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[0096] The current flowing through the rectifier is i rec1 Then, i rec1 can be expressed by the following equation (11) from equation (6).

[0097]

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[0098] Power supply current (i rec ) to I m Assuming that sin(ωt), the fundamental component of the current flowing through the second reactor (42) can be expressed by the following equation (12).

[0099]

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[0100] By substituting equation (11) into equation (12), the current flowing through the second reactor (42) can be expressed by the following equation (13).

[0101]

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[0102] By substituting equation (9) into equation (13), the current flowing through the second reactor (42) can be expressed by the following equation (14).

[0103]

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[0104] As a prerequisite for boost operation, V dc >V in and V c >V in holds, equation (14) can be rewritten as equation (15) below.

[0105]

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[0106] V c When becomes large, from equation (9), d c becomes smaller. d rec and d c Since the sum of and is 1, d recAs a result, the values ​​of the two terms on the right-hand sides of equations (13) to (15) increase, and the current flowing through the second reactor (42) decreases.

[0107] The current flowing through the second reactor (42) reaches its peak value when the power supply phase is 90 degrees. When a phase of 90 degrees is applied to equation (15), the current flowing through the second reactor (42) is expressed by the following equation (16).

[0108]

number

[0109] From equation (16) and equation (5), the current flowing through the second reactor (42) can be expressed by the following equation (17).

[0110]

number

[0111] From equation (5), the current flowing through the second reactor (42) is expressed by equation (1) below.

[0112]

number

[0113] Therefore, according to the first embodiment, by adjusting the buffer voltage, the peak value (Pk1) of the current flowing through the second reactor (42) when the buffer voltage is set to the peak value (Vm) of the power supply voltage can be made smaller than the peak value (Pk2) of the current flowing through the second reactor (42) when the buffer voltage is set to the withstand voltage (Vbr) of the second capacitor (41). Therefore, it is possible to reduce the size of the second reactor (42) and extend the life of the second capacitor (41).

[0114] Furthermore, the control unit (80) controls the voltage of the second capacitor (41) so that the peak value of the current flowing through the second reactor (42) is equal to or less than the magnetic saturation allowable current (Is) of the second reactor (42) (see FIG. 5), thereby suppressing magnetic saturation of the second reactor (42).

[0115] (Embodiment 2) FIG. 9 is a diagram corresponding to FIG. 1 of the second embodiment. In the second embodiment, the low-pass filter (30) are provided between the single-phase AC power supply (2) and the first rectifier circuit (10). More specifically, a first reactor (31) is connected between the single-phase AC power supply (2) and one input terminal of the first rectifier circuit (10). Also, a first capacitor (32) is connected between a pair of input terminals of the first rectifier circuit (10).

[0116] The power conversion device (1) further includes a second rectifier circuit (90). The second rectifier circuit (90) rectifies an AC voltage output from the single-phase AC power supply (2) and outputs a second rectified voltage. The second rectifier circuit (90) includes a fifth diode (91) and a sixth diode (92). The anode of the fifth diode (91) is connected to one end of the first capacitor (32). The cathode of the fifth diode (91) is connected to one end of the second reactor (42) of the booster (40). The anode of the sixth diode (92) is connected to the other end of the first capacitor (32). The cathode of the sixth diode (92) is connected to one end of the second reactor (42) of the booster (40). The booster (40) boosts the second rectified voltage output by the second rectifier circuit (90) instead of the first rectified voltage output by the first rectifier circuit (10) and outputs the boosted voltage to the second capacitor (41). Further, the power conversion device (1) does not include a second diode (51).

[0117] The other configurations are the same as those in the first embodiment, so the same reference numerals are used for the common configurations and detailed description thereof will be omitted.

[0118] Although the embodiments have been described above, it will be understood that various modifications of form and details are possible without departing from the spirit and scope of the claims. Furthermore, the above embodiments and modifications may be combined or substituted as appropriate as long as the functionality of the subject matter of the present disclosure is not impaired. [Industrial Applicability]

[0119] The present disclosure is useful as a power conversion device including a rectifier circuit, an inverter, and a booster. [Explanation of symbols]

[0120] 1 Power conversion device 2 Single-phase AC power supply 3. Load 10 1st rectifier circuit 20 DC Link 40 Booster 41 Second capacitor 42 Second reactor 43 Charging switch 50 Discharge switch 60 inverter 80 Control Unit 90 Second rectifier circuit Is magnetic saturation allowable current Pk1, Pk2 peak value Vm Peak value of power supply voltage Vbr element breakdown voltage

Claims

1. a rectifier circuit (10, 90) that rectifies an AC voltage output from a single-phase AC power supply (2) and outputs a rectified voltage; DC link (20) and an inverter (60) that converts DC power input from the DC link (20) into AC power and supplies the AC power to a load (3); a booster (40) that includes: a capacitor (41); a reactor (42) provided in a charging path through which a current flows from the single-phase AC power supply (2) to the capacitor (41); and a charging switch (43) that switches between a state in which energy is stored in the reactor (42) and a state in which energy is released from the reactor (42), and that boosts the rectified voltage and outputs the boosted voltage to the capacitor (41); a discharge switch (50) connected between the capacitor (41) and the DC link (20) so as to intermittently apply the boosted voltage from the capacitor (41) to the DC link (20); a control unit (80) that controls the charging switch (43) and the discharging switch (50), operating the booster (40) in a continuous current mode; the control unit (80) adjusts the voltage of the capacitor (41) by controlling the charging switch (43) so that a peak value of the current flowing through the reactor (42) is smaller than a peak value (Pk1) of the current flowing through the reactor (42) when the voltage of the capacitor (41) is set to a peak value (Vm) of a power supply voltage and a peak value (Pk2) of the current flowing through the reactor (42) when the voltage of the capacitor (41) is set to an element withstand voltage (Vbr) of the capacitor (41); The power conversion device, wherein the voltage of the capacitor (41) is greater than a peak value (Vm) of the power supply voltage and less than a breakdown voltage (Vbr) of the capacitor (41).

2. The power conversion device according to claim 1, the control unit (80) controls the charging switch (43) so that a difference between a voltage of the capacitor (41) and a voltage at which a peak value of a current flowing through the reactor (42) is smallest, the voltage being greater than a peak value (Vm) of the power supply voltage and less than an element withstand voltage (Vbr) of the capacitor (41), is 10 V or less.

3. The power conversion device according to claim 1, The power conversion device, wherein the control unit (80) controls the charging switch (43) so that the voltage of the capacitor (41) changes in accordance with the power consumption of the load (3).

4. The power conversion device according to claim 3, The power conversion device is characterized in that the control unit (80) controls the charging switch (43) so that the voltage of the capacitor (41) increases as the power consumption of the load (3) increases.

5. The power conversion device according to claim 1, The power conversion device, wherein a peak value of the current flowing through the reactor (42) is equal to or less than a magnetic saturation allowable current (Is) of the reactor (42).

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