Thermal resistance measurement jig
The thermal resistance measurement jig addresses the challenge of accurate thermal resistance measurement by using pogo pins and controlled pressing force to connect and press semiconductor devices, ensuring precise results for diverse package types.
Patent Information
- Application Number
- JP2024090194
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-06-03
- Publication Date
- 2025-12-15
AI Technical Summary
Existing methods struggle to accurately measure thermal resistance from the junction to the heat dissipation surface of semiconductor devices, especially for small surface-mount and leadless packages, due to difficulties in establishing electrical connections and applying consistent pressing force without introducing heat conduction errors.
A thermal resistance measurement jig that uses pogo pins to establish electrical connections and apply a controlled pressing force, combined with a temperature-controlled stage and load meter, to facilitate accurate thermal resistance measurement.
Enables precise thermal resistance measurement by eliminating heat transfer and ensuring consistent pressure application, suitable for various package types including surface-mount and leadless packages.
Smart Images

Figure 2025182557000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a thermal resistance measuring jig used in a transient thermal resistance measuring method. [Background technology]
[0002] In recent years, in the field of power electronics, such as for automotive and electric power systems, power semiconductor devices and power semiconductor modules (hereinafter collectively referred to as power modules), which are modularized by mounting one or more of these devices, have become increasingly sophisticated. However, with this increased functionality, the amount of heat generated has become an issue, and heat dissipation design has become one of the important design elements for power semiconductors. In other words, the challenge is to reduce the thermal resistance from the semiconductor junction to the heat dissipation surface.
[0003] The thermal resistance of semiconductor devices is generally evaluated according to the static transient thermal resistance measurement method (JEDEC JESD51-14; see Non-Patent Document 1, hereafter referred to as the JESD51-14 measurement method). In the JESD51-14 measurement method, a predetermined measurement current is passed through the device under test (DUT), and the junction temperature is calculated based on the measured voltage. This measurement is performed in a typical measurement system shown in Figure 1, with the heat dissipation surface of the device under test pressed against a cold plate at a predetermined temperature with a predetermined clamping force.
[0004] Furthermore, Patent Document 1 discloses a method of measuring the temperature of a device under test by using a semiconductor tester and contacting a probe needle with a semiconductor wafer. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] JP 2016-99300 A [Non-patent literature]
[0006] [Non-Patent Document 1] JESD51-14, JEDEC (2010) Summary of the Invention [Problem to be solved by the invention]
[0007] The method described in Patent Document 1 can measure the temperature of a semiconductor in a wafer state, but cannot evaluate the thermal resistance from the junction through the package to the heat dissipation surface.
[0008] Furthermore, in the JESD51-14 measurement method, as mentioned above, in order to measure temperature, it is necessary to pass a measurement current through the terminals of the device under test and measure the voltage while pressing the device under test against a cooling plate at a specified temperature with a specified pressing force.For devices under test that have electrode leads extending from the package, such as the one shown in Figure 1, it is easy to attach wires to the electrode leads to supply the measurement current, but for small surface-mount packages (such as SO8-FL) and leadless packages such as SON (Small Outline Non-leaded package) and QFN (Quad Flat Non-leaded package), it is difficult to attach wires to supply current to the electrode terminals.
[0009] Electrical measurements are possible if the device is soldered to a printed circuit board with pads that match the package, but heat conduction occurs through the soldered terminals and the printed circuit board, making it impossible to measure the thermal resistance accurately, and it is also impossible to press the heat dissipation surface of the device under test against the heat sink with the correct pressure.
[0010] It is also possible to measure the electrical resistance by placing the device under test in a socket that fits the package, but heat conduction occurs through the socket, making it impossible to measure the thermal resistance accurately, and the socket mechanism prevents the heat dissipation surface of the device under test from being pressed against the heat sink with the correct pressure.
[0011] The present invention has been made in view of the above-mentioned problems, and has as its object to provide a thermal resistance measuring jig that makes it easy to measure the thermal resistance of devices under test enclosed in various packages. [Means for solving the problem]
[0012] A thermal resistance measurement jig according to an embodiment of the present invention applies a predetermined pressing force to a device under test while establishing electrical connection with the terminals of the device under test. The thermal resistance measurement jig includes a support plate on which the device under test is placed, a plurality of pogo pins that contact the device under test from the sides, a base that is disposed on the support plate and supports the pogo pins so that they are in a predetermined position and orientation, and a pressure mechanism that applies a pressing force to the device under test from above.
[0013] The thermal resistance measuring jig may further include a temperature control stage on which the support plate is placed and whose temperature can be adjusted to a desired temperature. The thermal resistance measuring jig may also include a load meter that measures and displays the pressing force applied by the pressing mechanism.
[0014] In the present invention, the base may be detachably attached to the support plate with the plurality of pogo pins fixed thereto. [Brief explanation of the drawings]
[0015] [Figure 1] FIG. 1 is a diagram of a typical measurement system shown in Non-Patent Document 1. [Figure 2] 1 is a schematic diagram showing the configuration of a thermal resistance measurement system 100 to which a thermal resistance measurement jig 1 is applied. [Figure 3] FIG. 2 is a diagram illustrating an example of the structure of a device under test DUT. [Figure 4] 1 is a schematic diagram showing the configuration of a thermal resistance measuring jig 1 together with a device under test DUT. [Figure 5] 2 is a schematic diagram showing the structure of a pogo pin 14. FIG. [Figure 6] 3A and 3B are diagrams showing the tip shape of a pogo pin 14. FIG. [Figure 7] 10 is a diagram showing a method for arranging a device under test DUT on a support plate 12. FIG. DETAILED DESCRIPTION OF THE INVENTION
[0016] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. In this specification and each drawing, elements similar to those described above with reference to the previous drawings will be designated by the same reference numerals, and detailed description thereof will be omitted as appropriate.
[0017] 2 is a schematic diagram showing the configuration of a thermal resistance measurement system 100 to which the thermal resistance measurement jig 1 according to the embodiment of the present invention is applied. As shown in FIG. 2, the thermal resistance measurement system 100 includes the thermal resistance measurement jig 1, a transient thermal resistance analysis device 2, and a temperature controller 3.
[0018] In this embodiment, a semiconductor device having a structure in which a die is encapsulated in a so-called SON-type leadless package is assumed as an example of a device under test (DUT) measured by the thermal resistance measurement system 100. FIG. 3(a) is a perspective view of a SON-type leadless package as viewed from the front side, and FIG. 3(b) is a perspective view as viewed from the back side. In a SON-type package, electrode pads P are exposed on two opposing sides of the package of the device under test DUT, extending from the bottom surface to the lower portions of the sides. Heat dissipation pads HP are also provided on the bottom surface of the device under test DUT. When measuring the thermal resistance of this device under test DUT, a measurement current is supplied via the electrode pads P while the heat dissipation pads HP are pressed against a cooling plate (i.e., a temperature control stage 11 described below) with a predetermined pressing force. The device under test DUT may be encapsulated in a surface-mount package or a QFN-type package, or may be a semiconductor device encapsulated in a package other than these. Furthermore, instead of a semiconductor device, it may be a passive component.
[0019] The transient thermal resistance analyzer 2 measures the junction temperature and internal thermal resistance of the device under test (DUT) by applying an external measurement current to the device under test (DUT) and measuring the voltage. One example of a transient thermal resistance analyzer 2 is the Siemens T3Ster. The transient thermal resistance analyzer 2 measures Vf by applying a moderate positive voltage to the gate of a transistor formed in the device under test (DUT), passing a constant current from drain to source, and measuring the diode forward voltage (Vf) between the drain and source. Alternatively, it applies 0V or a negative voltage to the gate, passing a constant current from source to drain, and measuring Vf between the source and drain. The junction temperature is then calculated from the temperature dependence of Vf.
[0020] The thermal resistance measurement jig 1 provides a measurement environment suitable for measuring the thermal resistance of a device under test (DUT) using a transient thermal resistance analysis apparatus 2. Specifically, the thermal resistance measurement jig 1 realizes electrical connection between the transient thermal resistance analysis apparatus 2 and the electrodes of the device under test (DUT), application of a controlled pressing force to the device under test (DUT), and temperature control of the stage on which the device under test (DUT) is placed.
[0021] 4 is a schematic diagram showing the configuration of the thermal resistance measurement jig 1 together with the device under test DUT. As shown in FIG. 4, the thermal resistance measurement jig 1 includes a temperature control stage 11, a support plate 12, a base 13, pogo pins 14, a pressure mechanism 15, and a load meter 16.
[0022] The temperature control stage 11 is a stage on which a device under test (DUT) is placed via a support plate 12. The temperature of the temperature control stage 11 is controlled by a temperature controller 3 so that the stage temperature is kept at a predetermined temperature. The temperature control stage 11 may be realized by a method of regulating the temperature by circulating a heat medium through a flow path, a method of regulating the temperature by a Peltier element, or a method that combines these methods.
[0023] The support plate 12 is a plate material that supports the base 13, the pogo pins 14, and the device under test (DUT). The support plate 12 is required to be an insulator because it contacts the bottom surface of the device under test (DUT) on which the electrode pads are provided. Furthermore, since the support plate 12 is located between the temperature control stage 11 and the device under test (DUT), it is required to have low thermal resistance in the thickness direction. To satisfy these characteristics, the support plate 12 is preferably formed from a ceramic with high thermal conductivity (preferably, a thermal conductivity of approximately 100 W / m·K or higher), such as aluminum nitride. To suppress the thermal resistance in the thickness direction, it is preferable to make the thickness of the support plate 12 as thin as possible (e.g., approximately 0.6 mm or less) while still ensuring the necessary strength.
[0024] The pedestal 13 is an insulating member disposed on the upper surface of the support plate 12. The pedestal 13 supports the pogo pins 14, which are to contact the electrode pads of the device under test (DUT), at predetermined positions (i.e., height and horizontal position) and orientations. To facilitate positioning of the pogo pins 14, it is preferable to provide guide grooves or guide lines on the upper surface of the pedestal 13. The pogo pins 14 are metal members used as probes to establish electrical connections with the electrode pads of the device under test (DUT). The pogo pins 14 are supported by the pedestal 13 and fixed to the upper surface of the support plate 12 with UV resin 13A. It is preferable that one pedestal 13 supports multiple pogo pins 14. For example, it is preferable that one pedestal 13 supports multiple pogo pins 14 for contacting multiple electrode pads provided on one side of the device under test (DUT). It is also preferable that the pedestal 13 be configured so that it can be attached to and detached from the support plate 12 with multiple pogo pins 14 fixed thereto.
[0025] FIG. 5 is a schematic diagram showing the structure of the pogo pin 14. As shown in FIG. 5, the pogo pin 14 is composed of a cylindrical barrel 141 with one open end, a spring 142, and a plunger 143, which is a rod-shaped contact. The barrel 141 accommodates the spring 142. The plunger 143 is inserted into the barrel 141 while being biased by the spring 142. The base end of the plunger 143 is located inside the barrel 141, and the tip end is exposed from the open end of the barrel 141. When the spring 142 comes into contact with the device under test (DUT) and receives a pressing force, it slides and is pushed into the barrel 141, and the repulsive force of the spring 142 presses the tip end against the device under test (DUT). One end of the electric wire 30 is connected to the barrel 141. The other end of the electric wire 30 is connected to a terminal that outputs a measurement current of the transient thermal resistance analyzer 2.
[0026] The tip of plunger 143, which is the contact point with the electrode pad of the device under test DUT, may be formed in a needle shape as shown in Fig. 6(a), but is preferably formed in a crown shape as shown in Fig. 6(b) or a tapered crown shape as shown in Fig. 6(c). By forming the tip of plunger 143 in a crown shape or a tapered crown shape, it is possible to increase the number of contact points with the terminal, thereby reducing contact resistance and increasing current capacity.
[0027] As shown in FIG. 7(a), a plurality of pogo pins 14 are arranged on the support plate 12 so as to sandwich the sides of the DUT from both sides. To balance the force acting on the DUT, it is preferable to sandwich the DUT from both sides with the same number of pogo pins 14. When placing the DUT on the support plate 12, a thermal conductor 31 such as thermal grease is placed at the position where the DUT will be placed, as needed. Then, the DUT is inserted by pushing it toward one row of pogo pins 14, and the repulsive force of the pushed-in pogo pins 14 presses it against the other row of pogo pins 14. This holds the DUT sandwiched between the pogo pins 14. In this way, the pogo pins 14 are used to fix the DUT and simultaneously configure a measurement circuit, thereby enabling accurate thermal resistance measurement.
[0028] For a DUT with a narrow terminal pitch, it is preferable to arrange the pogo pins 14 at an angle as shown in Fig. 7(b) to avoid interference between the pogo pins 14. Also, if the electrode pads of the DUT are low, it is preferable to tilt the upper surface of the base 13 and bring the pogo pins 14 into contact with the electrode pads from above at an angle as shown in Fig. 7(c). Note that some of the multiple pogo pins 14 may contact parts of the DUT other than the terminals and serve to support the DUT.
[0029] The pressure mechanism 15 presses the DUT, which is mounted on the support plate 12 and placed on the temperature-controlled stage 11, toward the temperature-controlled stage 11 from above. The pressure mechanism 15 includes a pressure pin 151 and an elevating mechanism 152. The pressure pin 151 is a member that contacts the DUT from above. The pressure pin 151 is preferably made of metal, ceramic, or the like. The tip of the pressure pin 151 is preferably formed into a pointed or hemispherical shape to reduce the contact area with the DUT. This reduces the contact area, unlike the method of applying pressure to the entire top surface of the DUT via a contact block as specified in the JESD51-14 measurement method, thereby suppressing heat conduction upward via the pressure mechanism 15 and enabling more accurate thermal resistance measurement. The pressure pin 151 is attached to the elevating mechanism 152.
[0030] The lifting means 152 is a means for moving the pressure pin 151 in the vertical direction (up and down), and lowers the pressure pin 151 to abut against the DUT, and then presses it further downward to press the DUT against the temperature control stage 11. The lifting means 152 may be a manual lifting mechanism combining a feed screw and a handle as shown in FIGS. 2 and 4, or may be realized by a lifting mechanism combining a motor and a ball screw. The load meter 16 measures the pressing pressure applied by the pressure mechanism 15 and displays the measured value. When the lifting means 152 is realized by a lifting mechanism combining a motor and a ball screw, it is preferable to perform feedback control on the lifting means 152 so that the measured value by the load meter 16 matches the set value. By providing such a load meter 16, it is possible to accurately apply a desired pressing pressure to the DUT.
[0031] The thermal resistance measurement jig 1 according to the embodiment of the present invention described above can eliminate heat transfer to the measurement jig, etc., when measuring the thermal resistance of a device under test that is a surface-mount package or a leadless package, thereby enabling accurate thermal resistance measurement.
[0032] [Modifications of the embodiment] Although the embodiments of the present invention have been described above, the present invention is not limited to these examples.
[0033] In the above embodiment, an example has been described in which the DUT is placed on the support plate 12 by pushing it against one of the pogo pins and inserting it into a position sandwiched between the pogo pins, but other methods of placement are also possible. For example, the DUT may be placed in a predetermined position on the support plate 12, and then the base 13 to which multiple pogo pins 14 are fixed may be attached to the support plate 12 so that each pogo pin 14 contacts an appropriate position on the DUT. This method of attaching the pogo pins 14 after placing the DUT is effective for packages such as QFN packages in which electrode pads are provided on all four sides of the DUT. By fixing the multiple pogo pins 14 to the base 13 in advance, the multiple pogo pins 14 can be brought into accurate and quick contact with the DUT.
[0034] Furthermore, any combination of the features of the above-described embodiments, in which a person skilled in the art appropriately adds, deletes, or modifies components, is also included within the scope of the present invention, as long as it includes the gist of the present invention. [Explanation of symbols]
[0035] 1 Thermal resistance measurement jig 11 Temperature control stage 12 Support plate 13 Pedestal 14 pogo pins 15 Pressure mechanism 16 Load cell 2 Transient thermal resistance analysis device 100 Thermal Resistance Measurement System DUT Device under test
Claims
1. A thermal resistance measuring tool that applies a predetermined pressing force to a device under test while establishing electrical connection with a terminal of the device under test, a support plate on which the device under test is placed; a plurality of pogo pins that contact the device under test from the sides; a base disposed on the support plate and supporting the pogo pins at predetermined positions and in predetermined directions; a pressure mechanism that applies a pressing force to the device under test from above; A thermal resistance measuring jig comprising:
2. 2. The thermal resistance measuring jig according to claim 1, further comprising a temperature control stage on which the support plate is placed and whose temperature can be adjusted to a desired temperature.
3. 3. The thermal resistance measuring jig according to claim 1, further comprising a load meter that measures and displays the pressing force of the pressing mechanism.
4. 3. The thermal resistance measuring jig according to claim 1, wherein the base is detachable from the support plate with the plurality of pogo pins fixed thereto.
Citation Information
Patent Citations
Probe card, prober device and testing method of semiconductor device
JP2016099300A
Cited By
DISPLACER DEVICE AND REFRIGERATOR
DE112024001123T5