Insulation chip and signal transmission device

Abstract

To suppress reduction in a breakdown voltage of an insulation chip.SOLUTION: An insulation chip includes a first coil and a second coil 42 facing the first coil in a Z-direction. The second coil 42 includes: a second upper surface 42S; a second lower surface 42R on a side opposite to the second upper surface 42S; a second side surface 42A provided between the second upper surface 42S and the second lower surface 42R in the Z direction; and a second corner portion 42C between the second side surface 42A and the second upper surface 42S. At the second corner portion 42C, a second recess 44 is provided including a second curved surface recessed so as to be convex toward the inside of the second coil 42.SELECTED DRAWING: Figure 13

Description

[Technical Field]

[0001] The present disclosure relates to insulating tips and signaling devices. [Background technology]

[0002] Conventionally, signal transmission devices that transmit pulse signals while isolating input and output have been used in various applications such as power supplies and motor drive devices. One example of a signal transmission device is an insulated gate driver that applies a gate voltage to the gate of a switching element such as a transistor. One example of an insulating chip used in such a gate driver is a structure that includes a coil formed within an insulating layer stack structure (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2018-78169

[0004] [overview] Incidentally, in an insulating chip used in a signal transmission device, if an electric field concentrates on the first conductor and the second conductor that form the insulating element, there is a risk that the withstand voltage of the insulating chip will decrease.

[0005] An insulating chip according to one embodiment of the present disclosure includes an insulator including an insulating upper surface and an insulating lower surface opposite the insulating upper surface, the insulator being composed of multiple insulating layers stacked in a thickness direction; a first conductor arranged within the insulator closer to the insulating lower surface; and a second conductor arranged within the insulator closer to the insulating upper surface than the first conductor and facing the first conductor in the thickness direction, the second conductor including a second upper surface arranged closer to the insulating upper surface, a second lower surface opposite the second upper surface, a second side surface provided between the second upper surface and the second lower surface in the thickness direction, and a second corner portion between the second side surface and the second upper surface, the second corner portion having a second recess including a second curved surface that is concave so as to be convex toward the inside of the second conductor. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic circuit diagram of an exemplary signal transmission device according to the first embodiment. [Figure 2] FIG. 2 is a schematic plan view showing the configuration of the signal transmission device of FIG. [Figure 3] FIG. 3 is a schematic cross-sectional view of the signal transmission device taken along line F3-F3 in FIG. [Figure 4] FIG. 4 is a schematic perspective view showing the insulating tip of the first embodiment. [Figure 5] FIG. 5 is a schematic plan view of the insulating chip of FIG. [Figure 6] FIG. 6 is a schematic cross-sectional view showing the first coil of the insulating chip of FIG. [Figure 7] FIG. 7 is a schematic cross-sectional view showing the second coil of the insulating chip of FIG. [Figure 8] FIG. 8 is a schematic cross-sectional view of the insulating chip taken along line F8-F8 in FIG. [Figure 9] FIG. 9 is a schematic cross-sectional view of the insulating chip taken along line F9-F9 in FIG. [Figure 10] FIG. 10 is a schematic cross-sectional view showing an enlarged view of the first coil and its periphery of the insulating chip of FIG. [Figure 11] FIG. 11 is a schematic cross-sectional view showing an enlarged portion of the first coil of FIG. [Figure 12] FIG. 12 is a schematic cross-sectional view showing an enlarged portion of the inner end wiring of FIG. [Figure 13] FIG. 13 is an enlarged schematic cross-sectional view of the second coil and its periphery of the insulating chip of FIG. [Figure 14] FIG. 14 is a schematic cross-sectional view showing an enlarged portion of the second coil of FIG. [Figure 15] 15A to 15C are schematic cross-sectional views illustrating a manufacturing process for the second coil of FIG. [Figure 16] FIG. 16 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 17] FIG. 17 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 18] FIG. 18 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 19] FIG. 19 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 20] FIG. 20 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 21] FIG. 21 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 22] FIG. 22 is a schematic cross-sectional view showing a manufacturing step subsequent to FIG. [Figure 23] FIG. 23 is a schematic cross-sectional view of a through-wire and its periphery in an exemplary insulating chip according to the second embodiment. [Figure 24] FIG. 24 is a schematic cross-sectional view showing an enlarged portion of the first layer wiring of FIG. [Figure 25] FIG. 25 is a schematic cross-sectional view showing an enlarged portion of the second layer wiring of FIG. [Figure 26] FIG. 26 is a schematic enlarged cross-sectional view of a sealing portion in the insulating tip of the third embodiment. [Figure 27] FIG. 27 is a schematic cross-sectional view of the first seal portion and its periphery in FIG. [Figure 28]FIG. 28 is a schematic cross-sectional view of the second seal portion and its periphery in FIG. [Figure 29] FIG. 29 is a schematic circuit diagram of an exemplary signal transmission device according to the fourth embodiment. [Figure 30] 30 is a schematic cross-sectional view of an insulating tip in the signal transmission device of FIG. [Figure 31] FIG. 31 is a schematic cross-sectional view showing an enlarged view of the first electrode plate, the second electrode plate, and the surrounding area of ​​the insulating chip of FIG. [Figure 32] FIG. 32 is a schematic cross-sectional view showing an enlarged view of a part of the first electrode plate and its periphery in FIG. [Figure 33] FIG. 33 is a schematic cross-sectional view showing an enlarged view of a part of the second electrode plate and its periphery in FIG. [Figure 34] FIG. 34 is a schematic cross-sectional view showing an enlarged view of a part of the second coil and its surrounding area in the insulating chip of the modified example. [Figure 35] FIG. 35 is a schematic cross-sectional view showing an enlarged view of a part of the first coil and its surrounding area in the insulating chip of the modified example. [Figure 36] FIG. 36 is a schematic plan view of a modified insulating chip. [Figure 37] FIG. 37 is a schematic cross-sectional view of a modified insulating tip. [Figure 38] FIG. 38 is a schematic cross-sectional view showing an enlarged view of the through wiring and its periphery in FIG. [Figure 39] FIG. 39 is a schematic cross-sectional view showing an enlarged portion of each of the first via and the second via in FIG. [Figure 40] FIG. 40 is a schematic cross-sectional view of a through-wire and its periphery in an insulating chip according to a modified example. [Figure 41] FIG. 41 is a schematic cross-sectional view of a portion of each of the first via and the second via in the through wiring of FIG. [Figure 42] FIG. 42 is a schematic cross-sectional view of a through-wire and its periphery in an insulating chip according to a modified example. [Figure 43] FIG. 43 is a schematic cross-sectional view of a through-wire and its periphery in an insulating chip according to a modified example. [Figure 44] FIG. 44 is a schematic cross-sectional view of a portion of each of the first via and the second via in an insulating chip according to a modified example. [Figure 45] FIG. 45 is a schematic cross-sectional view of a portion of each of the first via and the second via in an insulating chip according to a modified example. [Figure 46] FIG. 46 is a schematic cross-sectional view of a portion of each of the first via and the second via in an insulating chip according to a modified example. [Figure 47] FIG. 47 is a schematic cross-sectional view of a portion of each of the first via and the second via in an insulating chip according to a modified example. [Figure 48] FIG. 48 is a schematic plan view of a signal transmission device according to a modified example.

[0007] [Detailed explanation] Hereinafter, several embodiments of the insulating chip and signal transmission device of the present disclosure will be described with reference to the accompanying drawings. Note that for simplicity and clarity of explanation, the components shown in the drawings are not necessarily drawn to scale. Also, for ease of understanding, hatching lines may be omitted in cross-sectional views. The accompanying drawings merely illustrate embodiments of the present disclosure and should not be considered as limiting the present disclosure.

[0008] The following detailed description includes devices, systems, and methods embodying exemplary embodiments of the present disclosure. This detailed description is merely illustrative in nature and is not intended to limit the embodiments of the present disclosure or the application and uses of such embodiments.

[0009] Terms such as "first," "second," and "third" are used in this disclosure merely to label and are not necessarily intended to dictate any ordering of their objects. The phrase "at least one" used in this disclosure means "one or more" of the desired options. As an example, the phrase "at least one" used in this disclosure means "only one option" or "both of two options" when the number of options is two. As another example, the phrase "at least one" used in this disclosure means "only one option" or "any combination of two or more options" when the number of options is three or more.

[0010] As used in this disclosure, "the dimensions (width, length) of A are equal to the dimensions (width, length) of B" or "the dimensions (width, length) of A and the dimensions (width, length) of B are equal to each other" also includes a relationship in which the difference between the dimensions (width, length) of A and the dimensions (width, length) of B is, for example, within 10% of the dimensions (width, length) of A.

[0011] First Embodiment [Overall configuration of the signal transmission device] The overall configuration of a signal transmission device 10 of the first embodiment will be described with reference to Figs. 1 to 3. Fig. 1 schematically shows an example of the circuit configuration of the signal transmission device 10. Fig. 2 shows an example of a planar structure that schematically shows the internal structure of the signal transmission device 10. Fig. 3 shows an example of a cross-sectional structure that schematically shows a portion of the internal structure of the signal transmission device 10. Note that hatching lines have been omitted in Fig. 3 to make the drawing easier to understand.

[0012] As shown in FIG. 1, the signal transmission device 10 includes a plurality of first terminals 11 and a plurality of second terminals 12. The plurality of first terminals 11 and the plurality of second terminals 12 are external terminals that are electrically connected to wiring on a circuit board (not shown) when the signal transmission device 10 is mounted on the circuit board. The plurality of first terminals 11 and the plurality of second terminals 12 are used as signal input / output terminals (input terminals, output terminals) for the signal transmission device 10, power supply terminals for supplying drive power, ground terminals, etc. The signal transmission device 10 is a device that transmits signals while electrically insulating the first terminals 11 and the second terminals 12 used as input and output terminals. The signal transmission device 10 is, for example, a digital isolator.

[0013] The signal transmission device 10 includes a first circuit 20 electrically connected to a first terminal 11, a second circuit 30 electrically connected to a second terminal 12, and a transformer 40 connected between the first circuit 20 and the second circuit 30.

[0014] The first circuit 20 is a circuit configured to operate when a first voltage V1 is applied thereto. The first circuit 20 is electrically connected to, for example, an external control device (not shown). The second circuit 30 is a circuit configured to operate when a second voltage V2 is applied thereto. In one example, the second voltage V2 may be a voltage different from the first voltage V1. In one example, the second voltage V2 may be a voltage higher than the first voltage V1. Note that the second voltage V2 may be a voltage lower than the first voltage V1. Also, the second voltage V2 may be equal to the first voltage V1. The first voltage V1 and the second voltage V2 are DC voltages. The second circuit 30 is electrically connected to, for example, a drive circuit that is controlled by the control device. An example of a drive circuit is a switching circuit. Note that the second circuit 30 may include a drive circuit.

[0015] In the signal transmission device 10, the ground of the second circuit 30 and the ground of the first circuit 20 are provided independently. In one example, the potential of each of the ground of the first circuit 20 and the ground of the second circuit 30 may be set as a reference potential. That is, the potential of the ground GND1 of the first circuit 20 may be set as a first reference potential, and the potential of the ground GND2 of the second circuit 30 may be set as a second reference potential. The first voltage V1 is a voltage from the first reference potential, and the second voltage V2 is a voltage from the second reference potential.

[0016] 1 is configured to output two signals from a first circuit 20 to a second circuit 30. A transformer 40 includes two transformers 40A and 40B corresponding to the two signals.

[0017] Each of the transformers 40A and 40B includes a first coil 41 and a second coil 42. The first coil 41 and the second coil 42 of each of the transformers 40A and 40B are electrically insulated from each other and configured to be magnetically coupled. Therefore, the first circuit 20 and the second circuit 30 can be said to be electrically insulated from each other. Furthermore, the first circuit 20 and the second circuit 30 can be said to be connected so as to be capable of transmitting signals due to the magnetic coupling between the first coil 41 and the second coil 42 of the transformers 40A and 40B.

[0018] The first coils 41 of the transformers 40A and 40B are electrically connected to the first circuit 20. The second coils 42 of the transformers 40A and 40B are electrically connected to the second circuit 30. In one example, a control signal from, for example, a control device is input to the first circuit 20 through the first terminal 11. The first circuit 20 outputs a transmission signal corresponding to the control signal to the second circuit 30. The transmission signal is received by the second circuit 30 via the transformers 40A and 40B. The second circuit 30 outputs a signal corresponding to the received signal, such as a gate drive signal, to the drive circuit through the second terminal 12. Note that the second circuit 30 may be configured to output a signal to the first circuit 20, and the first circuit 20 may be configured to receive the signal. Alternatively, the first circuit 20 and the second circuit 30 may each be configured to transmit and receive signals.

[0019] As described above, in the signal transmission device 10, the first circuit 20 and the second circuit 30 are electrically isolated by the transformer 40. More specifically, the transformer 40 restricts the transmission of DC voltage between the first circuit 20 and the second circuit 30. On the other hand, the transformer 40 allows the transmission of pulse signals between the first circuit 20 and the second circuit 30. The transformer 40 is an insulating element that electrically isolates the second circuit 30 from the first circuit 20 and transmits signals between the second circuit 30 and the first circuit 20.

[0020] That is, the state in which the first circuit 20 and the second circuit 30 are insulated means a state in which the transmission of DC voltage between the first circuit 20 and the second circuit 30 is blocked, but the transmission of pulse signals from the first circuit 20 to the second circuit 30 is permitted. Thus, in the first embodiment, the second circuit 30 is configured to receive signals from the first circuit 20.

[0021] The first circuit 20 and the second circuit 30 can also be referred to as a primary circuit and a secondary circuit with respect to the transformer 40. In one example, the second circuit 30 is a secondary circuit and the first circuit 20 is a primary circuit. Alternatively, the second circuit 30 may be a primary circuit and the first circuit 20 may be a secondary circuit. Alternatively, each of the second circuit 30 and the first circuit 20 may include a primary circuit and a secondary circuit.

[0022] As shown in FIGS. 2 and 3, the signal transmission device 10 includes a first support member 110, a second support member 120, an insulating chip 80, a first circuit chip 160, a second circuit chip 170, and a sealing resin 130. The first circuit chip 160 and the insulating chip 80 are mounted on the first support member 110. The second circuit chip 170 is mounted on the second support member 120. In this manner, the signal transmission device 10 is a semiconductor module in which the first circuit chip 160, the second circuit chip 170, and the insulating chip 80 are packaged. The insulating chip 80 includes the transformers 40A and 40B shown in FIG. 1. The first circuit chip 160 includes the first circuit 20 shown in FIG. 1. The second circuit chip 170 includes the second circuit 30 shown in FIG. 1. The configuration of the signal transmission device 10 can be changed as desired. In one example, the signal transmission device 10 may include chips other than the first circuit chip 160, the second circuit chip 170, and the insulating chip 80.

[0023] The package format of the signal transmission device 10 is an SO (Small Outline) type, for example, an SOP (Small Outline Package). The package format of the signal transmission device 10 can be changed as desired. The package format of the signal transmission device 10 is not limited to an SOP, and may be a QFN (Quad For Non-Lead Package), a DFP (Dual Flat Package), a DIP (Dual Inline Package), or an SOJ (Small Outline J-leaded Package), or various other similar package formats.

[0024] The sealing resin 130 seals the first circuit chip 160, the second circuit chip 170, and the insulating chip 80, and also partially seals the first support member 110 and the second support member 120. In Fig. 2, the sealing resin 130 is shown by a two-dot chain line for the convenience of explaining the internal structure of the signal transmission device 10.

[0025] The sealing resin 130 is made of an electrically insulating resin material. For example, a resin containing epoxy resin is used as the resin material. The resin may be colored black or the like. The sealing resin 130 is a rectangular plate with its thickness direction in the Z direction. The sealing resin 130 includes four resin side surfaces 131 to 134. The resin side surfaces 131 and 132 form both end surfaces of the sealing resin 130 in the X direction. The resin side surfaces 133 and 134 form both end surfaces of the sealing resin 130 in the Y direction. Here, the X direction and the Y direction are directions orthogonal to the Z direction. The X direction and the Y direction are orthogonal to each other. In the following description, "plan view" means viewing the signal transmission device 10 or each component of the signal transmission device 10 from the Z direction.

[0026] Each of the first support member 110 and the second support member 120 is electrically conductive. Each of the first support member 110 and the second support member 120 is made of a conductive material including Cu (copper), Fe (iron), Al (aluminum), etc. Each of the first support member 110 and the second support member 120 is provided across the inside and outside of the sealing resin 130.

[0027] The first support member 110 includes a first die pad 111 disposed within the sealing resin 130, and a plurality of first lead terminals 112 disposed across the inside and outside of the sealing resin 130. The first die pad 111 has a flat plate shape with its thickness direction in the Z direction. In plan view, the first die pad 111 is disposed so that its center in the Y direction is closer to the resin side surface 133 than the center in the Y direction of the sealing resin 130. The first die pad 111 is not exposed from the sealing resin 130. In one example, the first die pad 111 has a rectangular shape with its long side direction in the X direction and its short side direction in the Y direction in plan view. Note that the shape of the first die pad 111 in plan view can be changed as desired.

[0028] The multiple first lead terminals 112 are arranged spaced apart from each other in the X direction. Of the multiple first lead terminals 112, the first lead terminals 112 arranged at both ends in the X direction are each integrated with the first die pad 111. A portion of each first lead terminal 112 protrudes outward from the resin side surface 133 of the sealing resin 130. The multiple first lead terminals 112 are external terminals of the signal transmission device 10 and correspond to the first terminals 11 in FIG. 1. Here, since FIG. 1 shows a simplified circuit configuration of the signal transmission device 10, the number of first lead terminals 112 shown in FIG. 2 is greater than the number of first terminals 11 shown in FIG. 1.

[0029] The second support member 120 includes a second die pad 121 disposed within the sealing resin 130, and a plurality of second lead terminals 122 disposed across the inside and outside of the sealing resin 130. The second die pad 121 has a flat plate shape with its thickness direction aligned in the Z direction. In plan view, the second die pad 121 is disposed closer to the resin side surface 134 than the first die pad 111. The second die pad 121 is not exposed from the sealing resin 130. In one example, the second die pad 121 has a rectangular shape with its long side aligned in the X direction and its short side aligned in the Y direction in plan view.

[0030] The first die pad 111 and the second die pad 121 are arranged apart from each other in the Y direction. Therefore, the Y direction can also be said to be the direction in which the first die pad 111 and the second die pad 121 are arranged.

[0031] The dimensions in the Y direction of the first die pad 111 and the second die pad 121 are set according to the size and number of semiconductor chips to be mounted. In the first embodiment, both the first circuit chip 160 and the insulating chip 80 are mounted on the first die pad 111, and the second circuit chip 170 is mounted on the second die pad 121. For this reason, the dimension in the Y direction of the first die pad 111 is set to be larger than the dimension in the Y direction of the second die pad 121.

[0032] The multiple second lead terminals 122 are arranged spaced apart from each other in the X direction. Two of the multiple second lead terminals 122 are integrated with the second die pad 121. A portion of each second lead terminal 122 protrudes outward from the resin side surface 134 of the sealing resin 130. The multiple second lead terminals 122 are external terminals of the signal transmission device 10 and correspond to the second terminals 12 in FIG. 1. Here, since FIG. 1 shows a simplified circuit configuration of the signal transmission device 10, the number of second lead terminals 122 shown in FIG. 2 is greater than the number of second terminals 12 shown in FIG. 1.

[0033] In the first embodiment, the number of second lead terminals 122 is the same as the number of first lead terminals 112. As can be seen from Fig. 2, the multiple first lead terminals 112 and the multiple second lead terminals 122 are arranged in a direction (X direction) perpendicular to the arrangement direction (Y direction) of the first die pad 111 and the second die pad 121. Note that the number of second lead terminals 122 and the number of first lead terminals 112 can each be changed arbitrarily.

[0034] The first support member 110 and the second support member 120 are made of a lead frame (not shown). In the manufacturing process of the signal transmission device 10, the first die pad 111, the plurality of first lead terminals 112, the second die pad 121, and the plurality of second lead terminals 122 are formed from the same lead frame.

[0035] The lead frame includes an outer frame formed to surround the first support member 110 and the second support member 120. The first lead terminal 112 and the second lead terminal 122 are connected to the outer frame. During the manufacturing process of the signal transmission device 10, the first lead terminal 112 and the second lead terminal 122 are formed by being cut from the outer frame.

[0036] The first die pad 111 is integrated with two first lead terminals 112. The first die pad 111 is supported by the two first lead terminals 112 integrated with the first die pad 111. The second die pad 121 is integrated with two second lead terminals 122. The second die pad 121 is supported by the two second lead terminals 122 integrated with the second die pad 121. Therefore, the first die pad 111 and the second die pad 121 are not provided with suspension leads exposed from the resin side surfaces 131, 132. This allows a large insulation distance (creepage distance) to be secured between the first support member 110 and the second support member 120.

[0037] The first die pad 111 may be supported by one first lead terminal 112. Similarly, the second die pad 121 may be supported by one second lead terminal 122.

[0038] The first circuit chip 160 and insulating chip 80 mounted on the first die pad 111 and the second circuit chip 170 mounted on the second die pad 121 are arranged at a distance from each other in the Y direction. In the Y direction, the first circuit chip 160, insulating chip 80, and second circuit chip 170 are arranged in this order from the first lead terminal 112 toward the second lead terminal 122. Therefore, the Y direction can be said to be the arrangement direction of the first circuit chip 160, insulating chip 80, and second circuit chip 170. The insulating chip 80 is disposed between the first circuit chip 160 and the second circuit chip 170 in the Y direction.

[0039] The first circuit chip 160 has a rectangular shape having short and long sides in a plan view. In one example, the first circuit chip 160 is mounted on the first die pad 111 so that the long sides are aligned in the X direction and the short sides are aligned in the Y direction in a plan view.

[0040] 3, the first circuit chip 160 includes a chip main surface 160S and a chip back surface 160R that face opposite each other in the Z direction. The chip back surface 160R is bonded to the first die pad 111 by a conductive bonding material SD. The conductive bonding material SD may be, for example, solder or Ag (silver) paste.

[0041] 2, a plurality of first electrode pads 161, a plurality of second electrode pads 162, and a plurality of third electrode pads 163 are provided on the chip main surface 160S of the first circuit chip 160. At least one of the plurality of first electrode pads 161, at least one of the plurality of second electrode pads 162, and at least one of the plurality of third electrode pads 163 are each electrically connected to the first circuit 20 shown in FIG.

[0042] The multiple first electrode pads 161 are arranged on the chip main surface 160S closer to the first lead terminal 112 than the center of the chip main surface 160S in the Y direction. In one example, the multiple first electrode pads 161 are arranged in the X direction. The multiple second electrode pads 162 are arranged at one of both ends of the chip main surface 160S in the Y direction that is closer to the insulating chip 80. The multiple second electrode pads 162 are arranged in the X direction. The multiple third electrode pads 163 are arranged at both ends of the chip main surface 160S in the X direction.

[0043] The second circuit chip 170 is rectangular in shape having short and long sides in a plan view, and is mounted on the second die pad 121 so that the long sides extend along the X direction and the short sides extend along the Y direction in a plan view.

[0044] 3, the second circuit chip 170 includes a chip main surface 170S and a chip back surface 170R that face opposite to each other in the Z direction. The chip back surface 170R is bonded to the second die pad 121 by a conductive bonding material SD.

[0045] 2, a plurality of first electrode pads 171, a plurality of second electrode pads 172, and a plurality of third electrode pads 173 are provided on the chip main surface 170S of the second circuit chip 170. At least one of the plurality of first electrode pads 171, at least one of the plurality of second electrode pads 172, and at least one of the plurality of third electrode pads 173 are each electrically connected to the second circuit 30 shown in FIG.

[0046] The multiple first electrode pads 171 are arranged at the end closer to the insulating chip 80 of both end portions in the Y direction of the chip main surface 170S. The multiple first electrode pads 171 are arranged in the X direction. The multiple second electrode pads 172 are arranged at the end farther from the insulating chip 80 of both end portions in the Y direction of the chip main surface 170S. In other words, the multiple second electrode pads 172 are arranged at the end closer to the second lead terminal 122 of both end portions in the Y direction of the chip main surface 170S. The multiple second electrode pads 172 are arranged in the X direction. The multiple third electrode pads 173 are arranged at both end portions in the X direction of the chip main surface 170S.

[0047] The insulating chip 80 has a rectangular shape having short and long sides in a plan view. The insulating chip 80 is mounted on the first die pad 111 with the long sides aligned in the X direction and the short sides aligned in the Y direction. In one example, the X-direction dimension of the insulating chip 80 is smaller than the X-direction dimension of the first circuit chip 160. In one example, the X-direction dimension of the insulating chip 80 is smaller than the X-direction dimension of the second circuit chip 170. Note that the X-direction dimension of the insulating chip 80 can be changed as desired. In one example, the X-direction dimension of the insulating chip 80 may be changed depending on the number of transformers.

[0048] The insulating chip 80 is a semiconductor chip that integrates the transformers 40A and 40B into a single chip. In other words, the insulating chip 80 is provided as a semiconductor chip separate from the first circuit chip 160 and the second circuit chip 170. The insulating chip 80 is disposed adjacent to the first circuit chip 160 in the Y direction.

[0049] 3, the insulating chip 80 includes a chip main surface 80S and a chip back surface 80R that face opposite to each other in the Z direction. The chip back surface 80R is bonded to the first die pad 111 by a conductive bonding material SD.

[0050] As shown in FIG. 2, the insulating chip 80 includes a plurality of first electrode pads 81 and a plurality of second electrode pads 82. The plurality of first electrode pads 81 and the plurality of second electrode pads 82 are each provided on the chip main surface 80S of the insulating chip 80. The plurality of first electrode pads 81 are arranged at one of both ends in the Y direction of the chip main surface 80S that is closer to the first circuit chip 160. The plurality of first electrode pads 81 are arranged in the X direction. The plurality of second electrode pads 82 are arranged near the center of the chip main surface 80S in the Y direction. The plurality of second electrode pads 82 are arranged in the X direction.

[0051] In order to set the dielectric strength voltage of the signal transmission device 10 to a preset dielectric strength voltage, the first die pad 111 and the second die pad 121, which are closest to the first support member 110 and the second support member 120, need to be spaced apart from each other. For this reason, the insulating chip 80 is disposed closer to the second circuit chip 170 than the first circuit chip 160. In other words, the distance between the insulating chip 80 and the second circuit chip 170 in the Y direction is greater than the distance between the insulating chip 80 and the first circuit chip 160 in the Y direction.

[0052] A plurality of wires W1 to W4 are connected to each of the first circuit chip 160, the insulating chip 80, and the second circuit chip 170. Each of the wires W1 to W4 is a bonding wire formed by a wire bonding device. Each of the wires W1 to W4 is made of a conductive material including, for example, Au (gold), Al, Cu, etc.

[0053] The first circuit chip 160 is electrically connected to the first lead terminals 112 by wires W1. More specifically, the multiple first electrode pads 161 are individually electrically connected to the multiple first lead terminals 112 by multiple wires W1. The multiple third electrode pads 163 are individually electrically connected to two first lead terminals 112 integrated with the first die pad 111 by multiple wires W1. This electrically connects the first circuit 20 shown in FIG. 1 to the multiple first lead terminals 112. The first lead terminal 112 integrated with the first die pad 111 constitutes a ground terminal, and the first circuit 20 and the first die pad 111 are electrically connected by the wires W1. Therefore, the first ground GND1 of the first circuit 20 shown in FIG. 1 has the same potential as the first die pad 111.

[0054] The second circuit chip 170 is electrically connected to the second lead terminals 122 by wires W4. More specifically, the multiple second electrode pads 172 and the multiple third electrode pads 173 are individually electrically connected to the multiple second lead terminals 122 by multiple wires W4. Some of the multiple third electrode pads 173 are individually electrically connected to two second lead terminals 122 integrated with the second die pad 121 by multiple wires W4. This electrically connects the second circuit 30 shown in FIG. 1 to the multiple second lead terminals 122. The second lead terminal 122 integrated with the second die pad 121 constitutes a ground terminal, and the second circuit 30 and the second die pad 121 are electrically connected by the wires W4. Therefore, the second ground GND2 of the second circuit 30 shown in FIG. 1 has the same potential as the second die pad 121.

[0055] The insulating chip 80 is connected to the first circuit chip 160 by wires W2. The insulating chip 80 is also connected to the second circuit chip 170 by wires W3. More specifically, the first electrode pads 81 of the insulating chip 80 are individually electrically connected to the second electrode pads 162 of the first circuit chip 160 by wires W2. The second electrode pads 82 of the insulating chip 80 are individually electrically connected to the first electrode pads 171 of the second circuit chip 170 by wires W3.

[0056] 1 are electrically connected to a first ground GND1 of the first circuit chip 160 by a wire W1. The second coils 42 of the transformers 40A and 40B are electrically connected to a second ground GND2 of the second circuit chip 170 by a wire W4.

[0057] The configuration of the signal transmission device 10 shown in FIG. 1 is merely an example, and the circuit configurations included in the first circuit chip 160 and the second circuit chip 170 may be modified as appropriate. For example, the first circuit 20 may include an analog-to-digital conversion circuit. In this case, the signal transmission device 10 is configured as an isolated A / D conversion device. For example, the second circuit 30 may include a driver circuit that drives the gate of a switching element. The driver circuit may be connected to a terminal of the signal transmission device 10. For example, the driver circuit may be electrically connected to the second lead terminal 122. In this case, the signal transmission device 10 is configured as an isolated gate driver that drives the switching element. The switching element may be a power semiconductor element such as a Si Metal-Oxide-Semiconductor Field-Effect Transistor (SiMOSFET), a SiCMOSFET, or an IGBT (Insulated Gate Bipolar Transistor). The switching element is used in a motor driver circuit in an inverter device. The driver circuit generally uses a half-bridge circuit in which a low-side switching element and a high-side switching element are connected in a totem pole configuration.

[0058] A signal transmission device 10 used as an isolated gate driver applies a drive voltage signal to the control terminal of a switching element. In this case, a first circuit 20 converts a control signal input from, for example, a control device into a pulse signal. A driver circuit of a second circuit 30 outputs a drive voltage signal to the control terminal of the switching element based on a signal received through transformers 40A and 40B. The first circuit 20 and the second circuit 30 may be used to transmit a detection signal from, for example, a temperature sensor disposed near a motor to the control device.

[0059] Thus, in the signal transmission device 10 used as an isolated gate driver, the first voltage V1 of the first circuit 20 that receives a signal from the control device is 5 V, 3.3 V, or the like, with respect to the ground potential. On the other hand, in the case of the second circuit 30 connected to the high-side switching element, a voltage equivalent to the voltage applied to the drain of the high-side switching element (e.g., 600 V or more) is transiently applied. For this reason, the withstand voltage of the signal transmission device 10 is 2500 Vrms or more and 7500 Vrms or less. Note that the specific value of the withstand voltage of the signal transmission device 10 is not limited to this and can be any value.

[0060] [Insulation chip configuration] The overall configuration of the insulating chip 80 will be described with reference to FIGS. In the following description, the direction from the chip back surface 80R toward the chip main surface 80S of the insulating chip 80 shown in FIGS. 8 and 9 is referred to as "upward," and the direction from the chip main surface 80S toward the chip back surface 80R is referred to as "downward."

[0061] Fig. 4 schematically shows a perspective view of insulating chip 80. Fig. 5 schematically shows a plan view of insulating chip 80. For ease of explanation, transformers 40A and 40B and a dummy pattern 55 (described later) are indicated by dashed lines in Fig. 5. Also, in Fig. 5, first electrode pads 81 and second electrode pads 82 are indicated by two-dot chain lines, and resin openings in a resin layer 92 (described later) are indicated by solid lines.

[0062] FIG. 6 schematically shows a cross-sectional structure cut in the XY plane at a position in the Z direction where the first coil 41 of the insulating chip 80 of FIG. 5 is disposed. FIG. 6 mainly shows the connection relationship of the first coil 41. FIG. 7 schematically shows a cross-sectional structure cut in the XY plane at a position in the Z direction where the second coil 42 of the insulating chip 80 of FIG. 5 is disposed. FIG. 7 mainly shows the connection relationship of the second coil 42. For convenience, hatched lines are omitted in FIGS. 6 and 7.

[0063] FIG. 8 is a schematic cross-sectional view of the insulating chip 80 taken along line F8-F8 in FIG. 5. FIG. 8 also shows the cross-sectional structures of the insulator 84, first coil 41, second coil 42, dummy pattern 55, first electrode pad 81, second electrode pad 82, and first connection wiring 60A (described later). FIG. 9 is a schematic cross-sectional view of the insulating chip 80 taken along line F9-F9 in FIG. 5. FIG. 9 also shows the cross-sectional structures of the insulator 84, dummy pattern 55, first electrode pad 81, second electrode pad 82, and second connection wiring 60B (described later). Detailed shapes of the first conductor 51, second conductor 52, and first connection wiring 60A are omitted in FIGS. 8 and 9.

[0064] 5, the transformers 40A and 40B are disposed near the center of the chip main surface 80S in the Y direction in a plan view. In one example, the first electrode pads 81 and the transformers 40A and 40B are disposed at positions where they do not overlap each other in a plan view. The first electrode pads 81 and the second electrode pads 82 are electrically connected to the transformers 40A and 40B, respectively.

[0065] As shown in FIGS. 4 and 5, the insulating chip 80 includes four chip side surfaces 801 to 804 that connect the chip main surface 80S and the chip back surface 80R. The chip side surfaces 801 and 802 form both end surfaces of the insulating chip 80 in the Y direction. The chip side surfaces 803 and 804 form both end surfaces of the insulating chip 80 in the X direction. In a plan view, the chip side surfaces 801 and 802 form the long sides of the insulating chip 80, and the chip side surfaces 803 and 804 form the short sides of the insulating chip 80. As shown in FIG. 2, the chip side surface 801 is closer to the second circuit chip 170 than the chip side surface 802. The chip side surface 802 is closer to the first circuit chip 160 than the chip side surface 801.

[0066] As shown in FIGS. 4, 8, and 9, the insulating chip 80 includes a substrate 83 and an insulator 84. The substrate 83 is made of, for example, a semiconductor substrate. The substrate 83 is made of a material containing Si (silicon). In one example, a Si substrate is used as the substrate 83. Examples of the Si substrate used for the substrate 83 include a semiconductor substrate made of a single-crystal intrinsic semiconductor material, a p-type semiconductor substrate containing acceptor-type impurities, and an n-type semiconductor substrate containing donor-type impurities.

[0067] The substrate 83 may be a semiconductor substrate made of a wide bandgap semiconductor or a compound semiconductor. Alternatively, the substrate 83 may be an insulating substrate made of a material containing glass, instead of a semiconductor substrate. The wide bandgap semiconductor is a semiconductor substrate having a bandgap of 2.0 eV or more. The wide bandgap semiconductor may be SiC (silicon carbide), GaN (gallium nitride), Ga2O3 (gallium oxide), or the like. The compound semiconductor may be a III-V compound semiconductor. The compound semiconductor may include at least one of AlN (aluminum nitride), InN (indium nitride), GaN, and GaAs (gallium arsenide).

[0068] The substrate 83 is flat and has a thickness in the Z direction. The substrate 83 includes a substrate upper surface 83S and a substrate lower surface 83R that face opposite each other in the Z direction. In one example, the substrate lower surface 83R forms the chip back surface 80R of the insulating chip 80. The substrate 83 is quadrangular in plan view. In one example, the substrate 83 is rectangular in plan view with its longer sides in the X direction and its shorter sides in the Y direction.

[0069] 8 and 9, the insulator 84 is provided on the substrate upper surface 83S of the substrate 83. The insulator 84 includes an insulating upper surface 84S and an insulating lower surface 84R opposite the insulating upper surface 84S. In one example, the insulating lower surface 84R is in contact with the substrate upper surface 83S.

[0070] The insulator 84 includes a plurality of insulating layers 85 arranged in the Z direction from the substrate upper surface 83S of the substrate 83. The plurality of insulating layers 85 are stacked on the substrate upper surface 83S of the substrate 83. It can be said that the insulator 84 includes a plurality of insulating layers 85 stacked in the Z direction from the substrate upper surface 83S. It can be said that the Z direction is the thickness direction of the insulator 84. It can also be said that the Z direction is the stacking direction of the insulating layers 85.

[0071] The multiple insulating layers 85 include multiple thick insulating layers 85A and multiple thin insulating layers 85B. The insulator 84 is configured as an insulating laminate in which multiple thick insulating layers 85A and multiple thin insulating layers 85B are alternately stacked one by one. Of the multiple insulating layers 85, the lowest insulating layer 85L is configured from a thick insulating layer 85A. The uppermost insulating layer 85U is configured from a thin insulating layer 85B and a thick insulating layer 85A stacked on the thin insulating layer 85B.

[0072] The thick insulating layer 85A is, for example, an interlayer insulating film. The thick insulating layer 85A is made of, for example, a material having a linear expansion coefficient smaller than that of the first conductor 51 and the second conductor 52 described below. In other words, the thick insulating layer 85A is made of a material having a linear expansion coefficient smaller than that of the first conductor 51 and the second conductor 52. The thick insulating layer 85A is made of a material containing SiO (silicon oxide). In one example, the thick insulating layer 85A is made of a material containing SiO2. In one example, the thick insulating layer 85A is an SiO2 film.

[0073] The thin insulating layer 85B is a thin film, such as an etching stopper layer. The thin insulating layer 85B is made of a material having a thermal expansion coefficient greater than that of the thick insulating layer 85A and smaller than that of each of the first conductor 51 and the second conductor 52. In other words, the thin insulating layer 85B is made of a material having a linear expansion coefficient greater than that of the thick insulating layer 85A and smaller than that of each of the first conductor 51 and the second conductor 52. The thin insulating layer 85B is made of a material containing SiN (silicon nitride), SiC, SiCN (nitrogen-doped silicon carbide), etc. The thin insulating layer 85B is made of a material containing SiN. In one example, the thin insulating layer 85B is a SiN film.

[0074] The thickness of the thick insulating layer 85A may be 1000 nm or more and 3000 nm or less. In one example, the thickness of the thick insulating layer 85A is about 2300 nm. The thickness of the thin insulating layer 85B may be 100 nm or more and less than 1000 nm. In one example, the thickness of the thin insulating layer 85B is about 300 nm.

[0075] The lower surface of the lowermost insulating layer 85L constitutes the insulating lower surface 84R of the insulator 84. The upper surface of the uppermost insulating layer 85U constitutes the insulating upper surface 84S. In one example, the thickness of both the lowermost insulating layer 85L and the uppermost insulating layer 85U may be equal to or greater than the thickness of the thin insulating layer 85B and equal to or less than the thickness of the thick insulating layer 85A. The thicknesses of both the lowermost insulating layer 85L and the uppermost insulating layer 85U can be arbitrarily changed. In one example, the thickness of both the lowermost insulating layer 85L and the uppermost insulating layer 85U may be greater than the thickness of the thick insulating layer 85A, or may be equal to or greater than the thickness of the insulating layer 85 constituted by the thick insulating layer 85A and the thin insulating layer 85B.

[0076] As shown in FIGS. 6 to 9, the insulating chip 80 includes a first conductor 51 and a second conductor 52 that constitute the transformers 40A and 40B. In the first embodiment, both the first conductor 51 and the second conductor 52 are coils. The first conductor 51 and the second conductor 52 are embedded in an insulator 84. The first conductor 51 and the second conductor 52 are provided in different insulating layers 85 within the insulator 84. The first conductor 51 and the second conductor 52 face each other in the Z direction.

[0077] In the first embodiment, the multiple insulating layers 85 include insulating layers 851-857 provided between the lowest insulating layer 85L and the highest insulating layer 85U. Each of the insulating layers 851-857 is composed of a thin insulating layer 85B and a thick insulating layer 85A laminated on the thin insulating layer 85B. The insulating layer 851 is in contact with the lowest insulating layer 85L. The insulating layer 857 is in contact with the highest insulating layer 85U.

[0078] As shown in FIGS. 8 and 9, the first conductor 51 of the transformers 40A, 40B is configured as a conductive layer embedded in one insulating layer 85 included in the insulator 84. The first conductor 51 is embedded in an insulating layer 853, one of the multiple insulating layers 85 that constitute the insulator 84, that is closer to the insulating lower surface 84R. The insulating layer 853 includes a first groove 86A that penetrates both the thick insulating layer 85A and the thin insulating layer 85B in the Z direction. The first conductor 51 is embedded in the first groove 86A of the insulating layer 853. The first conductor 51 and the insulating layer 853 are covered by an insulating layer 854.

[0079] As shown in FIGS. 6, 8, and 9, the first conductor 51 includes a first coil 41, a first inner end wiring 51A, and a first outer end wiring 51B. The first coil 41, the first inner end wiring 51A, and the first outer end wiring 51B are each made of a material including one or more appropriately selected from Ti (titanium), TiN (titanium nitride), Au, Ag, Cu, Al, and W (tungsten). In one example, the first coil 41, the first inner end wiring 51A, and the first outer end wiring 51B may be made of the same material. In another example, the first coil 41, the first inner end wiring 51A, and the first outer end wiring 51B may be made of different materials.

[0080] As shown in FIG. 6, the first coil 41 has a spiral shape in a plan view. In one example, the first coil 41 has an elliptical shape in a plan view. The first coil 41 of the transformers 40A and 40B includes a first end and a second end opposite to the first end. The first end is an inner end of the first coil 41, and the second end is an outer end of the first coil 41. The first ends of the first coils 41 of the transformers 40A and 40B are individually electrically connected to the first inner end wiring 51A. The second ends of the first coils 41 of the transformers 40A and 40B are individually electrically connected to the first outer end wiring 51B.

[0081] The first inner end wirings 51A are arranged inside the first coils 41 of the transformers 40A and 40B. In the first embodiment, two first inner end wirings 51A are provided corresponding to the two first coils 41. The first outer end wirings 51B are arranged outside the first coils 41. The first outer end wirings 51B are arranged between the first coils 41 of the transformer 40A and the first coils 41 of the transformer 40B. The first outer end wirings 51B are configured as common end wirings for the first coils 41 of the transformers 40A and 40B. Note that a configuration may be adopted in which a first outer end wiring 51B is provided for each of the first coils 41 of the transformers 40A and 40B.

[0082] As shown in FIGS. 8 and 9, the second conductor 52 is configured as a conductive layer embedded in one insulating layer 85 included in the insulator 84. The second conductor 52 is embedded in insulating layer 857, which is one of the insulating layers 851 to 857 that constitute the insulator 84 and is closer to the insulating upper surface 84S. Therefore, the second conductor 52 is disposed closer to the insulating upper surface 84S than the first conductor 51 within the insulator 84. The insulating layer 857 includes a second groove 86B that penetrates both the thick insulating layer 85A and the thin insulating layer 85B in the Z direction. The second conductor 52 is embedded in the second groove 86B of the insulating layer 857. The second conductor 52 and the insulating layer 857 are covered by an insulating layer 85U.

[0083] As shown in FIGS. 7 to 9 , the second conductor 52 includes a second coil 42, a second inner end wiring 52A, and a second outer end wiring 52B. The second coil 42, the second inner end wiring 52A, and the second outer end wiring 52B are each made of a material including one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. In one example, the second coil 42, the second inner end wiring 52A, and the second outer end wiring 52B may be made of the same material. In another example, the second coil 42, the second inner end wiring 52A, and the second outer end wiring 52B may be made of different materials. In one example, the first coil 41 and the second coil 42 may be made of the same material. In another example, the first coil 41 and the second coil 42 may be made of different materials.

[0084] As shown in FIG. 7 , the second coil 42 has a spiral shape in a plan view. In one example, the second coil 42 has an elliptical shape in a plan view. In one example, the size and number of turns of the second coil 42 are the same as those of the first coil 41. The second coil 42 of the transformers 40A and 40B includes a first end and a second end opposite to the first end. The first end is an inner end of the second coil 42, and the second end is an outer end of the second coil 42. The first ends of the second coils 42 of the transformers 40A and 40B are individually electrically connected to the second inner end wiring 52A. The second ends of the second coils 42 of the transformers 40A and 40B are individually electrically connected to the second outer end wiring 52B.

[0085] The second inner end wirings 52A are arranged inside the second coils 42 of the transformers 40A and 40B. In the first embodiment, two second inner end wirings 52A are provided corresponding to the two second coils 42. The second outer end wirings 52B are arranged outside the second coils 42. The second outer end wirings 52B are arranged between the second coils 42 of the transformer 40A and the second coils 42 of the transformer 40B. The second outer end wirings 52B are configured as common end wirings for the second coils 42 of the transformers 40A and 40B. Note that a configuration may also be adopted in which a second outer end wiring 52B is provided for each of the second coils 42 of the transformers 40A and 40B.

[0086] As shown in FIG. 8 , multiple insulating layers 85 are interposed between the first conductor 51 and the second conductor 52. In the insulating chip 80 of the first embodiment, three insulating layers 854 to 856 are interposed between the first conductor 51 and the second conductor 52. Therefore, the insulating chip 80 of the first embodiment can be said to include a first insulator 841 including an insulating layer 853 in which the first conductor 51 is embedded, a second insulator 842 including an insulating layer 857 in which the second conductor 52 is embedded, and a third insulator 843 including insulating layers 854 to 856 arranged between the first insulator 841 and the second insulator 842 in the Z direction. The first conductor 51 embedded in the first insulator 841 can be said to be covered by the third insulator 843. The second conductor 52 can be said to be provided on the third insulator 843 that covers the first conductor 51. In the first embodiment, the first insulator 841 includes a lowermost insulating layer 85L and insulating layers 851 to 853. The second insulator 842 includes an insulating layer 857 and an uppermost insulating layer 85U.

[0087] 8 and 9, a first electrode pad 81 is provided on an insulating upper surface 84S of an insulator 84. As shown in Fig. 5, the first electrode pad 81 is arranged on the insulating upper surface 84S closer to the chip side surface 802. The first electrode pad 81 is made of a material containing one or more appropriately selected from Cu, Al, Ni (nickel), Pd (palladium), and W.

[0088] 5, 8, and 9, the first electrode pad 81 includes a first pad 81A and a second pad 81B. The first electrode pad 81 includes two first pads 81A electrically connected to the first coil 41 of the transformer 40A and two first pads 81A electrically connected to the first coil 41 of the transformer 40B. The first electrode pad 81 includes two second pads 81B common to the first coils 41 of the transformers 40A and 40B. The two first pads 81A are arranged side by side in the X direction. The two second pads 81B are arranged side by side in the X direction.

[0089] 8 and 9, the first electrode pad 81 is electrically connected to the first conductor 51. More specifically, the insulating chip 80 includes a connection wiring 60 that connects the first conductor 51 and the first electrode pad 81. The connection wiring 60 is provided within the insulator 84. The connection wiring 60 includes a first connection wiring 60A shown in FIG. 8 and a second connection wiring 60B shown in FIG. 9.

[0090] 8, the first pad 81A is electrically connected to the first inner end wiring 51A of the first conductor 51 by a first connection wiring 60A. As shown in Fig. 9, the second pad 81B is electrically connected to the first outer end wiring 51B of the first conductor 51 by a second connection wiring 60B. The first connection wiring 60A and the second connection wiring 60B will be described in detail later.

[0091] 5, 8, and 9, a second electrode pad 82 is provided on an insulating upper surface 84S of the insulator 84. The second electrode pad 82 is made of a material containing one or more appropriately selected from Cu, Al, Ni, Pd, and W. In one example, the second electrode pad 82 is made of the same material as the first electrode pad 81.

[0092] As shown in FIGS. 5 and 8 , the second electrode pad 82 includes a third pad 82A and a fourth pad 82B. The second electrode pad 82 includes two third pads 82A electrically connected to the second coil 42 of the transformer 40A and two third pads 82A electrically connected to the second coil 42 of the transformer 40B. The second electrode pad 82 includes two fourth pads 82B common to the second coils 42 of the transformers 40A and 40B. The two third pads 82A are arranged side by side in the X direction. The two fourth pads 82B are arranged side by side in the X direction. The two third pads 82A are arranged inside the second coil 42 of the second conductor 52 in a plan view. As shown in FIG. 8 , the third pad 82A is arranged so as to overlap the second inner end wiring 52A of the second conductor 52 in a plan view. 5, the two fourth pads 82B are arranged outside the second coils 42 of the transformers 40A and 40B in a plan view. The two fourth pads 82B are arranged between the second coil 42 of the transformer 40A and the second coil 42 of the transformer 40B. As shown in FIG. 9, the two fourth pads 82B are arranged so as to overlap the second outer end wiring 52B of the second conductor 52 in a plan view.

[0093] 8 and 9, the second electrode pad 82 is electrically connected to the second conductor 52. More specifically, the third pad 82A of the second electrode pad 82 is electrically connected to the second inner end wiring 52A of the second conductor 52 by a via wiring 56A that penetrates the uppermost insulating layer 85U. As shown in FIG. 9, the fourth pad 82B of the second electrode pad 82 is electrically connected to the second outer end wiring 52B of the second conductor 52 by a via wiring 56B that penetrates the uppermost insulating layer 85U. The via wirings 56A and 56B are made of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W.

[0094] The insulating chip 80 may include a passivation film 91. The passivation film 91 is a surface protection film for the insulating chip 80. The passivation film 91 is made of a material containing, for example, SiO2, SiN, or the like.

[0095] The first electrode pad 81 and the second electrode pad 82 are covered with a passivation film 91. The passivation film 91 has openings that expose a portion of each of the first electrode pad 81 and the second electrode pad 82. As a result, the first electrode pad 81 has an exposed surface for connecting the wire W2 shown in FIG. 2. The second electrode pad 82 has an exposed surface for connecting the wire W3 shown in FIG. 2.

[0096] The insulating chip 80 may include a resin layer 92 provided on a passivation film 91. The resin layer 92 may be made of a material containing, for example, PI (polyimide). The resin layer 92 is separated into an inner resin layer 921 and an outer resin layer 922 by a separation groove 923. As shown in FIG. 4, the separation groove 923 is provided so as to surround the transformers 40A and 40B. The resin layer 92 includes a first resin opening 924 exposing the first electrode pad 81 and a second resin opening 925 exposing the second electrode pad 82. The first resin opening 924 and the second resin opening 925 are in communication with the openings in the passivation film 91.

[0097] 5 and 7 to 9, the insulating chip 80 includes a dummy pattern 55 provided around the second coil 42 of the transformers 40A, 40B. The dummy pattern 55 may be omitted. As shown in FIGS. 8 and 9, the dummy pattern 55 is embedded in the insulating layer 857 of the insulator 84, similar to the second conductor 52.

[0098] 5 and 7, the dummy pattern 55 includes a first dummy pattern 551, a second dummy pattern 552, and a third dummy pattern 553. Each of the first dummy pattern 551, the second dummy pattern 552, and the third dummy pattern 553 is made of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W.

[0099] As shown in FIGS. 5 and 7 , the first dummy pattern 551 is provided in a region between the second coil 42 of the transformer 40A and the second coil 42 of the transformer 40B in the X direction in a plan view. The first dummy pattern 551 is formed in a pattern different from that of the second coil 42. The first dummy pattern 551 is electrically connected to the second outer end wiring 52B. Note that it is sufficient for the first dummy pattern 551 to be electrically connected to at least one of the two second outer end wirings 52B. In this way, the first dummy pattern 551 has the same potential as the second coil 42. Therefore, as the second reference potential of the second coil 42 changes, the voltage of the first dummy pattern 551 may become higher than that of the first coil 41, just like the second coil 42.

[0100] Although not shown, the first dummy pattern 551 is disposed at the same position as the second coil 42 in the Z direction. In other words, the first dummy pattern 551 is disposed at a position farther from the substrate 83 than the first coil 41. In other words, the dummy pattern 55 is provided around the coil of one of the transformers 40A and 40B that is closer to the chip main surface 80S of the insulating chip 80.

[0101] The first dummy pattern 551 has the same voltage as the second coil 42, thereby suppressing a voltage drop between the second coil 42 and the first dummy pattern 551. Therefore, electric field concentration on the second coil 42 can be suppressed.

[0102] 7, the third dummy pattern 553 surrounds the second coil 42 of the transformers 40A and 40B in a plan view. The third dummy pattern 553 is electrically connected to the first dummy pattern 551. Therefore, similar to the first dummy pattern 551, the voltage of the third dummy pattern 553 may become higher than that of the first coil 41 as the second reference potential of the second coil 42 changes.

[0103] 8 and 9, the third dummy pattern 553 is disposed at the same position in the Z direction as the second coil 42. In other words, the third dummy pattern 553 is disposed at a position farther from the substrate 83 than the first coil 41. In this way, the dummy patterns 551 to 553 are disposed at the same positions as one another in the Z direction.

[0104] The third dummy pattern 553 has the same voltage as the second coil 42, thereby suppressing a voltage drop between the second coil 42 and the third dummy pattern 553. Therefore, electric field concentration on the second coil 42 can be suppressed.

[0105] 7, the second dummy pattern 552 surrounds the third dummy pattern 553 in a plan view. The second dummy pattern 552 is independent from the second coil 42. In other words, the second dummy pattern 552 is not electrically connected to the second coil 42.

[0106] 8 and 9, the second dummy pattern 552 is disposed at the same position in the Z direction as the second coil 42. The second dummy pattern 552 is disposed at a position farther from the substrate 83 than the first coil 41. The second dummy pattern 552 can suppress an increase in the electric field strength around the second coil 42 and can also suppress electric field concentration on the second electrode pads 82 (the third pad 82A and the fourth pad 82B).

[0107] 6 to 9, the insulating chip 80 includes a sealing portion 93. The sealing portion 93 is provided on the outer periphery of the insulator 84 in a plan view. The sealing portion 93 has a rectangular frame shape in a plan view. The sealing portion 93 surrounds the plurality of first electrode pads 81, the plurality of second electrode pads 82, the transformers 40A and 40B, the first connection wiring 60A, and the second connection wiring 60B in a plan view.

[0108] 8 and 9, the sealing portion 93 extends in the Z direction within the insulator 84 so as to surround the transformers 40A, 40B and the first and second connection wirings 60A and 60B. The sealing portion 93 has the function of preventing moisture and other foreign matter from entering from outside the insulating chip 80. The sealing portion 93 is made of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W, for example.

[0109] [Connection Wiring Configuration] As shown in FIG. 8, the first connection wiring 60A includes a first wiring portion 61A that extends in the Z direction so as to penetrate through the insulating layers 85, and a second wiring portion 66A that extends in the Y direction.

[0110] The first wiring portion 61A is disposed at a position overlapping with the first pad 81A in a plan view. The first wiring portion 61A is connected to the first pad 81A. The first wiring portion 61A penetrates from the uppermost insulating layer 85U of the multiple insulating layers 85 to the insulating layer 853 closest to the lowermost insulating layer 85L.

[0111] The first wiring section 61A includes first-layer wiring 62A, second-layer wiring 63A, through-hole wiring 64A, and surface-side via wiring 65A. Each of the first-layer wiring 62A, second-layer wiring 63A, through-hole wiring 64A, and surface-side via wiring 65A is made of a material including one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. In one example, the first-layer wiring 62A, second-layer wiring 63A, and through-hole wiring 64A may be made of the same material. In another example, the first-layer wiring 62A, second-layer wiring 63A, through-hole wiring 64A, and surface-side via wiring 65A may be made of different materials. In one example, the first-layer wiring 62A may be made of the same material as the first conductor 51. In one example, the second conductor 52 may be made of the same material as the second conductor 52. In one example, the front-side via wiring 65A may be made of the same material as the via wirings 56A and 56B.

[0112] The first-layer wiring 62A is disposed closer to the insulating lower surface 84R within the insulator 84. In one example, the first-layer wiring 62A is disposed at the same position as the first conductor 51 in the Z direction. The first-layer wiring 62A is embedded in an insulating layer 853. More specifically, the first-layer wiring 62A is embedded in a through-hole 87A that penetrates the insulating layer 853 in the Z direction. The first-layer wiring 62A is covered with an insulating layer 854.

[0113] The second-layer wiring 63A is disposed within the insulator 84, closer to the insulating upper surface 84S. In one example, the second-layer wiring 63A is disposed at the same position as the second conductor 52 in the Z direction. The second-layer wiring 63A faces the first-layer wiring 62A in the Z direction. The second-layer wiring 63A is embedded in an insulating layer 857. More specifically, the second-layer wiring 63A is embedded in a through-hole 87B that penetrates the insulating layer 857 in the Z direction. The second-layer wiring 63A is covered with the uppermost insulating layer 85U.

[0114] The through wiring 64A connects the first layer wiring 62A and the second layer wiring 63A. In one example, the through wiring 64A penetrates three insulating layers 854 to 856 interposed between the first layer wiring 62A and the second layer wiring 63A. A plurality of through wirings 64A are provided spaced apart in the X direction and the Y direction. The through wiring 64A is formed by a via 70. In one example, the via 70 penetrates three insulating layers 854 to 856. The via 70 has a tapered shape that narrows from the second layer wiring 63A toward the first layer wiring 62A. Note that the configuration of the through wiring 64A can be changed as desired. In one example, the through wiring 64A may be formed by a stacked structure of a plurality of vias 70.

[0115] The surface-side via wiring 65A connects the second-layer wiring 63A and the first electrode pad 81. More specifically, the first pad 81A of the first electrode pad 81 is electrically connected to the second-layer wiring 63A by the surface-side via wiring 65A that penetrates the uppermost insulating layer 85U. In one example, a plurality of surface-side via wirings 65A are provided spaced apart from each other in the X and Y directions.

[0116] The second wiring portion 66A is electrically connected to the first conductor 51. In plan view, the second wiring portion 66A extends outward further than the first conductor 51. In one example, the second wiring portion 66A extends further toward the chip side surface 802 of the insulating chip 80 than the first conductor 51 in plan view.

[0117] The second wiring section 66A includes an outgoing wiring 67A, a first back-side via wiring 68A, and a second back-side via wiring 69A. The outgoing wiring 67A, the first back-side via wiring 68A, and the second back-side via wiring 69A are each made of a material including one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. In one example, the outgoing wiring 67A, the first back-side via wiring 68A, and the second back-side via wiring 69A may be made of the same material. In another example, the outgoing wiring 67A, the first back-side via wiring 68A, and the second back-side via wiring 69A may be made of different materials. In one example, the outgoing wiring 67A may be made of the same material as the first conductor 51. In one example, the outgoing wiring 67A may be made of the same material as the second conductor 52.

[0118] The lead wiring 67A is provided closer to the substrate 83 in the Z direction than the first wiring portion 61A. The lead wiring 67A is provided closer to the substrate 83 in the Z direction than the first conductor 51. In one example, the lead wiring 67A is provided in an insulating layer 851 that is one layer above the lowest insulating layer 85L among the multiple insulating layers 85. Of both ends of the lead wiring 67A in the X direction, a first end that is closer to the chip side surface 802 of the insulating chip 80 is provided at a position overlapping with the first wiring portion 61A in a plan view. The first end of the lead wiring 67A is connected to the first-layer wiring 62A by multiple first back-surface-side via wirings 68A. A second end of the lead wiring 67A, which is on the opposite side to the first end, is provided at a position overlapping with the first inner end wiring 51A of the first conductor 51 in a plan view. A second end of the lead wiring 67A is connected to the first inner end wiring 51A by a plurality of second rear surface side via wirings 69A.

[0119] As shown in FIG. 9, the second connection wiring 60B includes a first wiring portion 61B and a second wiring portion 66B, similar to the first connection wiring 60A shown in FIG. Like the first wiring portion 61A of the first connection wiring 60A, the first wiring portion 61B includes a first-layer wiring 62B, a second-layer wiring 63B, a through wiring 64B, and a surface-side via wiring 65B. Each of the first-layer wiring 62B, the second-layer wiring 63B, the through wiring 64B, and the surface-side via wiring 65B is made of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. In one example, the first-layer wiring 62B, the second-layer wiring 63B, the through wiring 64B, and the surface-side via wiring 65B are made of the same material as the first-layer wiring 62A, the second-layer wiring 63A, the through wiring 64A, and the surface-side via wiring 65A shown in FIG.

[0120] The first-layer wiring 62B is provided at the same position in the Z direction as the first-layer wiring 62A. The second-layer wiring 63B is provided at the same position in the Z direction as the second-layer wiring 63A. The first-layer wiring 62B, the second-layer wiring 63B, the through wiring 64B, and the surface-side via wiring 65B have the same configurations as the first-layer wiring 62A, the second-layer wiring 63A, the through wiring 64A, and the surface-side via wiring 65A.

[0121] The second wiring portion 66B connects the first outer end wiring 51B of the first conductor 51 and the first-layer wiring 62B. The second wiring portion 66B extends outward from the first conductor 51 in a plan view. Similar to the second wiring portion 66A shown in FIG. 8, the second wiring portion 66B includes an outgoing wiring 67B, a first back-side via wiring 68B, and a second back-side via wiring 69B. The outgoing wiring 67B, the first back-side via wiring 68B, and the second back-side via wiring 69B are each made of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. In one example, the outgoing wiring 67B, the first back-side via wiring 68B, and the second back-side via wiring 69B are made of the same material as the outgoing wiring 67A, the first back-side via wiring 68A, and the second back-side via wiring 69A shown in FIG. 8.

[0122] The lead wiring 67B is provided at the same position as the lead wiring 67A in the Z direction. A first end of the lead wiring 67B is provided at a position overlapping with the second pad 81B of the first electrode pad 81 in a plan view. The first end of the lead wiring 67B is connected to the first-layer wiring 62B by a first back-side via wiring 68B. A second end of the lead wiring 67B is provided at a position overlapping with the first outer end wiring 51B of the first conductor 51 in a plan view. The second end of the lead wiring 67B is connected to the first outer end wiring 51B by a second back-side via wiring 69B. The configurations of the first back-side via wiring 68B and the second back-side via wiring 69B are the same as the configurations of the first back-side via wiring 68A and the second back-side via wiring 69A.

[0123] The second wiring portion 66B includes a third back-side via wiring 69C that connects the lead-out wiring 67B and the substrate 83. This electrically connects the second connection wiring 60B to the substrate 83. The third back-side via wiring 69C penetrates the lowermost insulating layer 85L. The third back-side via wiring 69C is made of a material containing one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W.

[0124] [Configuration of the first conductor and the second conductor] The detailed configurations of the first conductor 51 and the second conductor 52 will be described with reference to Figures 10 to 14. Figure 10 shows an enlarged cross-sectional structure of a portion of the first conductor 51 in Figure 8. Figure 11 shows a further enlarged cross-sectional structure of a portion of the first coil 41 of the first conductor 51 in Figure 10. Figure 12 shows an enlarged cross-sectional structure of a portion of the first inner end wiring 51A of the first conductor 51 in Figure 10. Figure 13 shows an enlarged cross-sectional structure of a portion of the second conductor 52 in Figure 8. Figure 14 shows a further enlarged cross-sectional structure of a portion of the second conductor 52 in Figure 13.

[0125] (first conductor) 10, as described above, the first coil 41 of the first conductor 51 is provided in the insulating layer 853 among the insulating layers 851 to 857 of the insulator 84. The first coil 41 penetrates the insulating layer 853 in the Z direction. The first coil 41 is sandwiched between the insulating layers 852 and 854. Here, the insulating layer 853 corresponds to the "first insulating layer," and the insulating layer 854 corresponds to the "second insulating layer."

[0126] The first groove 86A formed in the insulating layer 853 penetrates the insulating layer 853 in the Z direction, exposing the thick insulating layer 85A of the insulating layer 852. Therefore, the first conductor 51 embedded in the first groove 86A is in contact with the thick insulating layer 85A of the insulating layer 852. In one example, the first groove 86A is tapered from the upper surface 853S of the insulating layer 853 toward the lower surface 853R. The angle θ1 of the side surface 853A of the insulating layer 853 is equal to or greater than 80° and equal to or less than 90°. In one example, the angle θ1 is 85°. Here, the side surface 853A of the insulating layer 853 is a surface that constitutes the first groove 86A. The angle θ1 can be defined as the angle between the lower surface 853R of the insulating layer 853 and the side surface 853A.

[0127] The first coil 41 of the first conductor 51 is formed of coil wiring 41P having a predetermined width. The first coil 41 includes a first upper surface 41S, a first lower surface 41R, and a first side surface 41A. The first upper surface 41S is disposed on the first coil 41 closer to the insulating upper surface 84S of the insulator 84. The first lower surface 41R constitutes the surface opposite to the first upper surface 41S. The first lower surface 41R is disposed on the first coil 41 closer to the insulating lower surface 84R of the insulator 84. The first side surface 41A is provided between the first upper surface 41S and the first lower surface 41R in the Z direction.

[0128] In the first embodiment, the first upper surface 41S is located at the same position in the Z direction as the upper surface 853S of the insulating layer 853. Here, the upper surface 853S of the insulating layer 853 is formed by the upper surface of the thick insulating layer 85A of the insulating layer 853. The position of the first upper surface 41S in the Z direction can be changed arbitrarily. In one example, the first upper surface 41S may be located closer to the lower surface 853R of the insulating layer 853 than the upper surface 853S of the insulating layer 853 in the Z direction.

[0129] The first side surface 41A includes a first inner side surface 41AA and a first outer side surface 41AB. The first inner side surface 41AA is provided on the inner side in the width direction of the first conductor 51. In other words, the first inner side surface 41AA forms the inner side in the width direction of the coil wiring 41P that forms the first coil 41. The first outer side surface 41AB is provided on the outer side in the width direction of the first conductor 51. In other words, the first outer side surface 41AB forms the outer side in the width direction of the coil wiring 41P that forms the first coil 41.

[0130] In one example, the first conductor 51 has a tapered shape in which the first side surface 41A is inclined so as to taper from the first upper surface 41S toward the first lower surface 41R. In other words, the coil wiring 41P constituting the first coil 41 has a tapered shape in which the first side surface 41A is inclined so as to taper from the first upper surface 41S toward the first lower surface 41R. Therefore, the first inner side surface 41AA and the first outer side surface 41AB are inclined so as to approach each other from the first upper surface 41S toward the first lower surface 41R.

[0131] The first coil 41 includes a seed layer 45A and a plating layer 46A provided on the seed layer 45A. The seed layer 45A is provided on the side surface (side surface 853A of the insulating layer 853) that defines the first groove 86A and on the upper surface 852S of the insulating layer 852 exposed by the first groove 86A. Therefore, both the first lower surface 41R and the first side surface 41A are formed by the seed layer 45A. The first upper surface 41S is formed by the plating layer 46A. The seed layer 45A is a sputtered film formed by sputtering, for example. The seed layer 45A may have a laminated structure of, for example, a Ti film and a Cu film. The plating layer 46A is formed by a material containing Cu, for example.

[0132] The first coil 41 includes a first corner portion 41C between the first side surface 41A and the first top surface 41S. The first corner portion 41C includes a first inner corner portion 41CA and a first outer corner portion 41CB. The first inner corner portion 41CA is the portion between the first inner side surface 41AA and the first top surface 41S. The first outer corner portion 41CB is the portion between the first outer side surface 41AB and the first top surface 41S.

[0133] As shown in FIG. 11, a first recess 43 is provided in the first corner portion 41C. The first recess 43 includes a first curved surface 43P. The first recess 43 is recessed so as to protrude inward of the first coil 41. The cross-sectional shape of the first curved surface 43P in the cross-sectional view shown in FIG. 11 is an arc. The first recess 43 is arc-shaped with its center at the intersection of a first virtual line L1 along the first upper surface 41S and a second virtual line LA2 (LB2) along the first side surface 41A. The first recess 43 is provided across both the seed layer 45A and the plating layer 46A.

[0134] The first recess 43 extends over the entire length of the coil wiring 41P. Specifically, as shown in Fig. 6, the first coil 41 includes a pair of first straight portions 41D and a pair of first curved portions 41E that terminate both ends of the pair of first straight portions 41D. The first recess 43 shown in Fig. 11 is provided continuously with both the pair of first straight portions 41D and the pair of first curved portions 41E.

[0135] 11, the first recess 43 includes a first inner recess 43A including a first inner curved surface 43PA and a first outer recess 43B including a first outer curved surface 43PB. The first inner recess 43A is provided in the first inner corner portion 41CA. The first outer recess 43B is provided in the first outer corner portion 41CB.

[0136] The cross-sectional shape of the first inner curved surface 43PA in the cross-sectional view shown in Fig. 11 is an arc. That is, the cross-sectional shape of the first inner curved surface 43PA is an arc centered at a first inner center of curvature CA1. The first inner center of curvature CA1 of the first inner curved surface 43PA is located outward from the coil wiring 41P. In one example, the first inner center of curvature CA1 is the intersection of a first imaginary line L1 along the first upper surface 41S and a second imaginary line LA2 along the first inner side surface 41AA.

[0137] The cross-sectional shape of the first outer curved surface 43PB in the cross-sectional view shown in Fig. 11 is an arc. That is, the cross-sectional shape of the first outer curved surface 43PB is an arc centered at a first outer center of curvature CB1. The first outer center of curvature CB1 of the first inner curved surface 43PA is located outward from the coil wiring 41P. In one example, the first outer center of curvature CB1 is the intersection of a first imaginary line L1 along the first upper surface 41S and a second imaginary line LB2 along the first outer side surface 41AB.

[0138] In one example, the arc length of the cross-sectional shape of first inner curved surface 43PA is equal to the arc length of the cross-sectional shape of first outer curved surface 43PB. It can also be said that the radius of curvature of first inner curved surface 43PA is equal to the radius of curvature of first outer curved surface 43PB. The radii of curvature of first inner curved surface 43PA and first outer curved surface 43PB are each greater than the film thickness of thin insulating layer 85B and less than the film thickness of thick insulating layer 85A. The radii of curvature of first inner curved surface 43PA and first outer curved surface 43PB are each, for example, 1 μm.

[0139] The thick insulating layer 85A of the insulating layer 853 includes a first exposed side surface 85AA exposed from the first side surface 41A of the first coil 41 by the first recess 43. The first exposed side surface 85AA is a portion of the side surface 853A of the insulating layer 853 between the upper edge of the first side surface 41A and the upper surface 853S of the insulating layer 853. The first exposed side surface 85AA faces the first curved surface 43P of the first recess 43 in a direction perpendicular to the Z direction. In one example, the length of the first exposed side surface 85AA is equal to the radius of curvature of the first curved surface 43P (e.g., the radius of curvature of the first inner curved surface 43PA). Here, the length of the first exposed side surface 85AA can be defined by the distance between the upper edge of the first side surface 41A and the upper surface 853S of the insulating layer 853.

[0140] The first coil 41 is covered by a thin insulating layer 85B of the insulating layer 854. The thin insulating layer 85B of the insulating layer 854 includes a first upper surface portion 85CA, a first side surface portion 85CB, a first curved portion 85CC, and a first coil upper surface portion 85CD. The first upper surface portion 85CA, the first side surface portion 85CB, the first curved portion 85CC, and the first coil upper surface portion 85CD are integrated together. Here, the first coil upper surface portion 85CD is an example of a "first conductor upper surface portion."

[0141] The first upper surface portion 85CA covers the upper surface 853S of the insulating layer 853. The first side surface portion 85CB is provided along the first exposed side surface 85AA. The first upper surface portion 85CA is connected to the first side surface portion 85CB. The first curved portion 85CC is in contact with the first curved surface 43P along the first curved surface 43P. The first curved portion 85CC is in contact with the first inner curved surface 43PA and the first outer curved surface 43PB. The first coil upper surface portion 85CD covers the first upper surface 41S of the first coil 41. The first coil upper surface portion 85CD is located between the first curved portion 85CC in contact with the first inner curved surface 43PA and the first curved portion 85CC in contact with the first outer curved surface 43PB, and is connected to these first curved portions 85CC.

[0142] The thick insulating layer 85A of the insulating layer 854 is embedded in the first recess 43. More specifically, the thick insulating layer 85A of the insulating layer 854 is embedded in a recess space formed by the first side surface portion 85CB and the first curved portion 85CC of the thin insulating layer 85B of the insulating layer 854. In this manner, it can be said that the insulating layer 854 is embedded in the first recess 43. More specifically, the thick insulating layer 85A of the insulating layer 854 is embedded in an inner recess space formed by the first side surface portion 85CB and the first curved portion 85CC of the thin insulating layer 85B of the insulating layer 854 corresponding to the first inner recess 43A. Furthermore, the thick insulating layer 85A of the insulating layer 854 is embedded in an outer recess space formed by the first side surface portion 85CB and the first curved portion 85CC of the thin insulating layer 85B of the insulating layer 854 corresponding to the first outer recess 43B.

[0143] 10, the first inner end wiring 51A of the first conductor 51 is embedded in the first groove 86A of the insulating layer 853. The first inner end wiring 51A penetrates the insulating layer 853 in the Z direction and is in contact with the thick insulating layer 85A of the insulating layer 852.

[0144] The first inner end wiring 51A includes a first inner upper surface 51AS, a first inner lower surface 51AR, and a first inner side surface 51AA. The first inner upper surface 51AS is disposed closer to the insulating upper surface 84S of the insulator 84 of the first inner end wiring 51A. The first inner lower surface 51AR forms the surface opposite to the first inner upper surface 51AS. The first inner lower surface 51AR is disposed closer to the insulating lower surface 84R (see FIG. 8) of the insulator 84 of the first inner end wiring 51A. The first inner side surface 51AA is provided between the first inner upper surface 51AS and the first inner lower surface 51AR in the Z direction.

[0145] The first inner upper surface 51AS is located at the same position in the Z direction as the upper surface 853S of the insulating layer 853. Therefore, it can be said that the first inner upper surface 51AS is located at the same position in the Z direction as the first upper surface 41S of the first coil 41. The position of the first inner upper surface 51AS in the Z direction can be changed arbitrarily. In one example, the first inner upper surface 51AS may be located closer to the lower surface 853R of the insulating layer 853 than the upper surface 853S of the insulating layer 853 in the Z direction.

[0146] In one example, the first inner end wiring 51A has a tapered shape that narrows from the first inner upper surface 51AS toward the first inner lower surface 51AR. Therefore, the pair of opposing first inner side surfaces 51AA are inclined so as to approach each other from the first inner upper surface 51AS toward the first inner lower surface 51AR.

[0147] The first inner end wiring 51A includes a seed layer 51AP and a plating layer 51AQ provided on the seed layer 51AP. The seed layer 51AP is provided on the side surface (side surface 853A of the insulating layer 853) that defines the first groove 86A and on the upper surface of the insulating layer 852 exposed by the first groove 86A. Therefore, both the first inner lower surface 51AR and the first inner side surface 51AA are formed by the seed layer 51AP. The first inner upper surface 51AS is formed by the plating layer 51AQ. The seed layer 51AP is a sputtered film formed by sputtering, for example. The seed layer 51AP may have a laminated structure of, for example, a Ti film and a Cu film. The plating layer 51AQ is formed by, for example, a material containing Cu. The seed layer 51AP may be made of the same material as the seed layer 45A of the first coil 41. The plating layer 51AQ may be made of the same material as the plating layer 46A of the first coil 41.

[0148] As shown in FIG. 12 , the first inner end wiring 51A includes a first inner corner portion 57A between the first inner side surface 51AA and the first inner upper surface 51AS. The first inner corner portion 57A is provided with a first inner recess 57AA. The first inner recess 57AA includes a first inner curved surface 57AP. The first inner recess 57AA is recessed so as to be convex toward the inside of the first inner end wiring 51A. The first inner recess 57AA is provided around the entire periphery of the first inner end wiring 51A in a plan view. The cross-sectional shape of the first inner curved surface 57AP in the cross-sectional view shown in FIG. 12 is an arc. The first inner curved surface 57AP has an arc shape centered at the intersection of an imaginary line along the first inner upper surface 51AS and an imaginary line along the first inner side surface 51AA. The first inner recess 57AA is provided over both the seed layer 51AP and the plating layer 51AQ.

[0149] In one example, the arc length of the cross-sectional shape of first inner curved surface 57AP is equal to the arc length of the cross-sectional shape of first curved surface 43P of first recess 43 of first coil 41. It can also be said that the radius of curvature of first inner curved surface 57AP is equal to the radius of curvature of first curved surface 43P. Therefore, the radius of curvature of first inner curved surface 57AP is, for example, 1 μm.

[0150] The thick insulating layer 85A of the insulating layer 853 includes an inner exposed side surface 85AP exposed from the first inner side surface 51AA of the first inner end wiring 51A by the first inner recess 57AA. The inner exposed side surface 85AP is a portion of the side surface 853A of the insulating layer 853 between the upper edge of the first inner side surface 51AA and the upper surface 853S of the insulating layer 853. The inner exposed side surface 85AP faces the first inner recess 57AA in a direction perpendicular to the Z direction. In one example, the length of the inner exposed side surface 85AP is equal to the radius of curvature of the first inner curved surface 57AP. In one example, the length of the inner exposed side surface 85AP is equal to the length of the first exposed side surface 85AA (see FIG. 11 ) corresponding to the first coil 41. Here, the length of the inner exposed side surface 85AP can be defined by the distance between the upper edge of the first inner side surface 51AA and the upper surface 853S of the insulating layer 853.

[0151] The first inner end wiring 51A is covered by a thin insulating layer 85B of the insulating layer 854. A portion of the thin insulating layer 85B of the insulating layer 854 that corresponds to the first inner end wiring 51A includes a wiring upper surface portion 85CE. A portion of the thin insulating layer 85B that covers the first inner recess 57AA includes a first side surface portion 85CB and a first curved portion 85CC. The first side surface portion 85CB is provided along the inner exposed side surface 85AP. The first curved portion 85CC is in contact with the first inner curved surface 57AP along the first. Here, the wiring upper surface portion 85CE is an example of a "first conductor upper surface portion."

[0152] The thick insulating layer 85A of the insulating layer 854 is embedded in the first inner recess 57AA. More specifically, the thick insulating layer 85A of the insulating layer 854 is embedded in a recess space formed by the first side surface portion 85CB and the first curved portion 85CC of the thin insulating layer 85B of the insulating layer 854. In this way, it can be said that the insulating layer 854 is embedded in the first inner recess 57AA.

[0153] Although not shown, the first outer end wiring 51B of the first conductor 51 has the same configuration as the first inner end wiring 51A. Similar to the first inner end wiring 51A, the thin insulating layer 85B of the insulating layer 854 covers the first outer end wiring 51B. Similar to the first inner end wiring 51A, the thick insulating layer 85A of the insulating layer 854 is embedded in a first outer recess provided in the first outer end wiring 51B.

[0154] (Second conductor) 13, as described above, the second coil 42 of the second conductor 52 is provided in insulating layer 857 of the insulating layers 851 to 857 of the insulator 84. The second coil 42 penetrates through the insulating layer 857 in the Z direction. The second coil 42 is sandwiched between the insulating layer 856 and the uppermost insulating layer 85U. Here, the insulating layer 857 corresponds to the "third insulating layer," and the uppermost insulating layer 85U corresponds to the "fourth insulating layer."

[0155] The second groove 86B formed in the insulating layer 857 penetrates the insulating layer 857 in the Z direction, exposing the thick insulating layer 85A of the insulating layer 856. Therefore, the second conductor 52 embedded in the second groove 86B is in contact with the thick insulating layer 85A of the insulating layer 856. In one example, the second groove 86B is tapered from the upper surface 857S of the insulating layer 857 toward the lower surface 857R. The angle θ2 of the side surface 857A of the insulating layer 857 is equal to or greater than 80° and equal to or less than 90°. In one example, the angle θ2 is 85°. Here, the side surface 857A of the insulating layer 857 is a surface that constitutes the second groove 86B. The angle θ2 can be defined as the angle between the lower surface 857R of the insulating layer 857 and the side surface 857A.

[0156] The second coil 42 of the second conductor 52 is formed by coil wiring 41Q having a predetermined width. The second coil 42 includes a second upper surface 42S, a second lower surface 42R, and a second side surface 42A. The second upper surface 42S is disposed on the second coil 42 closer to the insulating upper surface 84S of the insulator 84. The second lower surface 42R constitutes the surface opposite to the second upper surface 42S. The second lower surface 42R is disposed on the second coil 42 closer to the insulating lower surface 84R (see FIG. 8) of the insulator 84. The second side surface 42A is provided between the second upper surface 42S and the second lower surface 42R in the Z direction.

[0157] In the first embodiment, the second upper surface 42S is located at the same position in the Z direction as the upper surface 857S of the insulating layer 857. Here, the upper surface 857S of the insulating layer 857 is formed by the upper surface of the thick insulating layer 85A of the insulating layer 857. The position of the second upper surface 42S in the Z direction can be changed arbitrarily. In one example, the second upper surface 42S may be located closer to the lower surface 857R of the insulating layer 857 than the upper surface 857S of the insulating layer 857 in the Z direction.

[0158] The second side surface 42A includes a second inner side surface 42AA and a second outer side surface 42AB. The second inner side surface 42AA is provided on the inner side in the width direction of the second conductor 52. In other words, the second inner side surface 42AA forms the inner side in the width direction of the coil wiring 41Q that forms the second coil 42. The second outer side surface 42AB is provided on the outer side in the width direction of the second conductor 52. In other words, the second outer side surface 42AB forms the outer side in the width direction of the coil wiring 41Q that forms the second coil 42.

[0159] In one example, the second conductor 52 has a tapered shape in which the second side surface 42A is inclined so as to taper from the second upper surface 42S toward the second lower surface 42R. That is, the coil wiring 41Q constituting the second coil 42 has a tapered shape in which the second side surface 42A is inclined so as to taper from the second upper surface 42S toward the second lower surface 42R. Therefore, the second inner side surface 42AA and the second outer side surface 42AB are inclined so as to approach each other from the second upper surface 42S toward the second lower surface 42R. In the first embodiment, the shape of the coil wiring 41Q is the same as the shape of the coil wiring 41P.

[0160] The second coil 42 includes a seed layer 45B and a plating layer 46B provided on the seed layer 45B. The seed layer 45B is provided on the side surface (side surface 857A of the insulating layer 857) that defines the second groove 86B and on the upper surface of the insulating layer 856 exposed by the second groove 86B. Therefore, both the second lower surface 42R and the second side surface 42A are formed by the seed layer 45B. The second upper surface 42S is formed by the plating layer 46B. The seed layer 45B has the same configuration as the seed layer 45A, and the plating layer 46B has the same configuration as the plating layer 46A.

[0161] The second coil 42 includes a second corner portion 42C between the second side surface 42A and the second top surface 42S. The second corner portion 42C includes a second inner corner portion 42CA and a second outer corner portion 42CB. The second inner corner portion 42CA is the portion between the second inner side surface 42AA and the second top surface 42S. The second outer corner portion 42CB is the portion between the second outer side surface 42AB and the second top surface 42S.

[0162] As shown in FIG. 14, a second recess 44 is provided in the second corner portion 42C. The second recess 44 includes a second curved surface 44P. The second recess 44 is recessed so as to protrude inward of the second coil 42. The cross-sectional shape of the second curved surface 44P in the cross-sectional view shown in FIG. 14 is an arc. The second recess 44 is arc-shaped with its center at the intersection of a third imaginary line L3 along the second upper surface 42S and a fourth imaginary line LA4 (LB4) along the second side surface 42A. The second recess 44 is provided across both the seed layer 45B and the plating layer 46B.

[0163] The second recess 44 extends over the entire length of the coil wiring 41Q. Specifically, as shown in Fig. 5, the second coil 42 includes a pair of second straight portions 42D and a pair of second curved portions 42E that terminate both ends of the pair of second straight portions 42D. The second recess 44 shown in Fig. 14 is provided contiguous to both the pair of second straight portions 42D and the pair of second curved portions 42E.

[0164] 14, the second recess 44 includes a second inner recess 44A including a second inner curved surface 44PA and a second outer recess 44B including a second outer curved surface 44PB. The second inner recess 44A is provided in the second inner corner portion 42CA. The second outer recess 44B is provided in the second outer corner portion 42CB.

[0165] The cross-sectional shape of the second inner curved surface 44PA in the cross-sectional view shown in Fig. 14 is an arc. That is, the cross-sectional shape of the second inner curved surface 44PA is an arc centered at the second inner center of curvature CA2. The second inner center of curvature CA2 of the second inner curved surface 44PA is located outward from the coil wiring 41Q. In one example, the second inner center of curvature CA2 is the intersection of a third imaginary line L3 along the second upper surface 42S and a fourth imaginary line LA4 along the second inner side surface 42AA.

[0166] The cross-sectional shape of the second outer curved surface 44PB in the cross-sectional view shown in Fig. 14 is an arc. That is, the cross-sectional shape of the second outer curved surface 44PB is an arc centered at the second outer center of curvature CB2. The second outer center of curvature CB2 of the second inner curved surface 44PA is located outward from the coil wiring 41Q. In one example, the second outer center of curvature CB2 is the intersection of a third imaginary line L3 along the second upper surface 42S and a fourth imaginary line LB4 along the second outer side surface 42AB.

[0167] In one example, the arc length of the cross-sectional shape of the second inner curved surface 44PA is equal to the arc length of the cross-sectional shape of the second outer curved surface 44PB. It can also be said that the radius of curvature of the second inner curved surface 44PA is equal to the radius of curvature of the second outer curved surface 44PB. Each of the radii of curvature of the second inner curved surface 44PA and the second outer curved surface 44PB is greater than the film thickness of the thin insulating layer 85B and less than the film thickness of the thick insulating layer 85A. In one example, the arc length of the cross-sectional shape of the second inner curved surface 44PA is equal to the arc length of the cross-sectional shape of the first inner curved surface 43PA shown in FIG. 11. In one example, the arc length of the cross-sectional shape of the second outer curved surface 44PB is equal to the arc length of the cross-sectional shape of the first outer curved surface 43PB shown in FIG. Each of the radii of curvature of the second inner curved surface 44PA and the second outer curved surface 44PB is, for example, 1 μm. In this way, the arc length of the cross-sectional shape of the second curved surface 44P is equal to the arc length of the cross-sectional shape of the first curved surface 43P shown in FIG.

[0168] The thick insulating layer 85A of the insulating layer 857 includes a second exposed side surface 85AB exposed from the second side surface 42A of the second coil 42 by the second recess 44. The second exposed side surface 85AB is a portion of the side surface 857A of the insulating layer 857 between the upper edge of the second side surface 42A and the upper surface 857S of the insulating layer 857. The second exposed side surface 85AB faces the second curved surface 44P of the second recess 44 in a direction perpendicular to the Z direction. In one example, the length of the second exposed side surface 85AB is equal to the radius of curvature of the second curved surface 44P (e.g., the radius of curvature of the second inner curved surface 44PA). Here, the length of the second exposed side surface 85AB can be defined by the distance between the upper edge of the second side surface 42A and the upper surface 857S of the insulating layer 857.

[0169] The second coil 42 is covered by a thin insulating layer 85B of the uppermost insulating layer 85U. The thin insulating layer 85B of the uppermost insulating layer 85U includes a second upper surface portion 85DA, a second side surface portion 85DB, a second curved portion 85DC, and a second coil upper surface portion 85DD. The second upper surface portion 85DA, the second side surface portion 85DB, the second curved portion 85DC, and the second coil upper surface portion 85DD are integrated. Here, the second coil upper surface portion 85DD is an example of a "second conductor upper surface portion."

[0170] The second upper surface portion 85DA covers the upper surface 857S of the insulating layer 857. The second side surface portion 85DB is provided along the second exposed side surface 85AB. The second upper surface portion 85DA is connected to the second side surface portion 85DB. The second curved portion 85DC is in contact with the second curved surface 44P along the second curved surface 44P. The second curved portion 85DC is in contact with the second inner curved surface 44PA and the second outer curved surface 44PB. The second coil upper surface portion 85DD covers the second upper surface 42S of the second coil 42. The second coil upper surface portion 85DD is located between the second curved portion 85DC in contact with the second inner curved surface 44PA and the second curved portion 85DC in contact with the second outer curved surface 44PB, and is connected to these second curved portions 85DC.

[0171] The thick insulating layer 85A of the uppermost insulating layer 85U is embedded in the second recess 44. More specifically, the thick insulating layer 85A of the uppermost insulating layer 85U is embedded in a recess space formed by the second side surface portion 85DB and the second curved portion 85DC of the thin insulating layer 85B of the uppermost insulating layer 85U. In this manner, it can be said that the uppermost insulating layer 85U is embedded in the second recess 44. Even more specifically, the thick insulating layer 85A of the uppermost insulating layer 85U is embedded in an inner recess space formed by the second side surface portion 85DB and the second curved portion 85DC of the thin insulating layer 85B of the uppermost insulating layer 85U corresponding to the second inner recess 44A. In addition, the thick insulating layer 85A of the top insulating layer 85U is embedded in the outer recess space formed by the second side portion 85DB and the second curved portion 85DC in the thin insulating layer 85B of the top insulating layer 85U corresponding to the second outer recess 44B.

[0172] 13, the second inner end wiring 52A of the second conductor 52 is embedded in the second groove 86B of the insulating layer 857. The second inner end wiring 52A penetrates the insulating layer 857 in the Z direction and contacts the thick insulating layer 85A of the insulating layer 856. The configuration of the second inner end wiring 52A is the same as the configuration of the first inner end wiring 51A shown in FIG. 12. Therefore, a detailed description of the second inner end wiring 52A will be omitted.

[0173] Although not shown, the second outer end wiring 52B of the second conductor 52 has the same configuration as the second inner end wiring 52A. The thin insulating layer 85B of the uppermost insulating layer 85U covers both the second inner end wiring 52A and the second outer end wiring 52B. The thick insulating layer 85A of the uppermost insulating layer 85U is embedded in the second inner recess provided in the second inner end wiring 52A and the second outer recess provided in the second outer end wiring 52B.

[0174] (dummy pattern) 13, the dummy pattern 55 is embedded in the second groove 86B in the same manner as the second coil 42. The cross-sectional shape of the dummy wiring 55P constituting the dummy pattern 55 is the same as the cross-sectional shape of the coil wiring 41Q constituting the second coil 42. In other words, the dummy wiring 55P is provided with a recess 55Q including a curved surface 55R.

[0175] The thin insulating layer 85B of the uppermost insulating layer 85U covers the dummy pattern 55, as does the second coil 42. Therefore, the thin insulating layer 85B is provided so as to be in contact with the curved surface 55R. The thick insulating layer 85A of the uppermost insulating layer 85U is embedded in the recess 55Q.

[0176] [Insulating chip manufacturing method] An example of a method for manufacturing the insulating chip 80 will be described with reference to FIGS. 15 to 22 are schematic cross-sectional views showing an exemplary method for manufacturing the second coil 42 of the second conductor 52 of the insulating chip 80. Note that FIGS. 15 to 22 are part of the insulating chip 80 shown in FIG. 8, and schematically show part of the cross-sectional structure of the second coil 42 shown in FIG. 13. For this reason, FIGS. 15 to 22 omit components other than the second coil 42 and the insulating layer 85 therearound. For reference numerals not shown, please refer to FIGS. 8 to 13. For ease of understanding, FIGS. 15 to 22 partially show the reference numerals of FIGS. 8 to 13 in parentheses for components that include the final components of the insulating chip 80 or components corresponding to them.

[0177] As shown in FIG. 15, the method for manufacturing insulating chip 80 includes forming insulating layers 856 and 857. In one example, insulating layers 856 and 857 are formed on insulating layer 855 (see FIG. 8) by chemical vapor deposition (CVD). In one example, insulating layers 856 and 857 are formed by repeatedly stacking thick insulating layers 85A and thin insulating layers 85B. Insulating layers 856 and 857 are formed by repeatedly stacking thin insulating layers 85B and thick insulating layers 85A alternately.

[0178] 16, the method for manufacturing insulating chip 80 includes a step of forming second groove 86B. In one example, second groove 86B is formed in insulating layer 857 by selectively etching a portion of insulating layer 857 to expose a portion of the top surface of insulating layer 856. This forms side surface 857A of insulating layer 857.

[0179] As shown in FIGS. 17 to 20, the method for manufacturing the insulating chip 80 includes the step of forming the second conductor 52. As shown in FIG. 17 , the step of forming the second conductor 52 includes the step of forming a conductive layer 700. In this step, the conductive layer 700 is formed on the side surfaces of the second grooves 86B and on the upper surface of the insulating layer 856 exposed by the second grooves 86B by, for example, electrolytic plating. The conductive layer 700 may include, for example, a seed layer 45B and a plating layer 46B. In one example, the seed layer 45B is formed by, for example, sputtering, to cover the side surfaces of the second grooves 86B and the upper surface of the insulating layer 856 exposed by the second grooves 86B. Subsequently, the conductive layer 700 is formed by plating a conductive material containing, for example, Cu from the seed layer 45B. The conductive layer 700 is formed so as to fill the second grooves 86B.

[0180] 18, the step of forming second conductor 52 includes a step of thinning insulating layer 857. In this step, thick insulating layer 85A of insulating layer 857 is partially removed by, for example, dry etching so that the thickness of thick insulating layer 85A of insulating layer 857 is reduced. As a result, conductive layer 700 protrudes from thick insulating layer 85A of insulating layer 857, as shown in FIG.

[0181] 19, the step of forming second conductors 52 includes a step of partially removing conductive layer 700. In this step, the portions of conductive layer 700 that protrude beyond thick insulating layer 85A of insulating layer 857 are removed by, for example, wet etching (isotropic etching).

[0182] 20, the step of forming the second conductor 52 includes the step of forming the second recess 44. In this step, the second recess 44 is formed by, for example, wet etching (isotropic etching). By forming this second recess 44, the second upper surface 42S and the second side surface 42A are formed. Although not shown, the second inner end wiring 52A (see FIG. 10) and the second outer end wiring 52B (see FIG. 13) are formed in the steps shown in FIGS. 17 to 20. Through the above steps, the second conductor 52 is formed. In addition, by forming the second recess 44, the second exposed side surface 85AB is formed in the insulating layer 857.

[0183] 21, the method for manufacturing the insulating chip 80 includes a step of forming a thin insulating layer 85B of the uppermost insulating layer 85U. In this step, the thin insulating layer 85B is formed to cover the upper surface of the thick insulating layer 85A of the insulating layer 857, the second exposed side surface 85AB, the second curved surface 44P of the second recess 44, and the second upper surface 42S.

[0184] 22, the method for manufacturing the insulating chip 80 includes a step of forming a thick insulating layer 85A of the uppermost insulating layer 85U. In this step, the thick insulating layer 85A is formed by, for example, a CVD method. Here, in the step of forming the thick insulating layer 85A, the thick insulating layer 85A of the uppermost insulating layer 85U is formed so as to fill the second recess 44. Through the above steps, the second conductor 52 is formed.

[0185] [Operation of the first embodiment] The operation of the first embodiment will be described. The second coil 42 of the second conductor 52 includes a second corner portion 42C between the second side surface 42A and the second upper surface 42S. The second corner portion 42C is provided with a second recess 44 including a second curved surface 44P that protrudes inward of the second conductor 52 (the coil wiring 41Q of the second coil 42). This prevents the second corner portion 42C from forming an edge that directly connects the second side surface 42A and the second upper surface 42S. In addition, the second recess 44 including the second curved surface 44P gives the second corner portion 42C a rounded shape, thereby reducing electric field concentration at the second corner portion 42C of the second coil 42.

[0186] [Effects of the first embodiment] According to the first embodiment, the following effects can be obtained. (1-1) The insulating chip 80 includes an insulator 84 including an insulating upper surface 84S and an insulating lower surface 84R opposite the insulating upper surface 84S, and including a plurality of insulating layers 85 stacked in the Z direction, a first conductor 51 disposed within the insulator 84 closer to the insulating lower surface 84R, and a second conductor 52 disposed within the insulator 84 closer to the insulating upper surface 84S than the first conductor 51 and facing the first conductor 51 in the Z direction. The second coil 42 serving as the second conductor 52 includes a second upper surface 42S disposed closer to the insulating upper surface 84S, a second lower surface 42R opposite the second upper surface 42S, a second side surface 42A provided between the second upper surface 42S and the second lower surface 42R in the Z direction, and a second corner portion 42C between the second side surface 42A and the second upper surface 42S. The second corner portion 42C is provided with a second recess 44 including a second curved surface 44P that is recessed so as to be convex toward the inside of the second coil 42 serving as the second conductor 52.

[0187] According to this configuration, the second recess 44 prevents an edge from being formed at the second corner portion 42C of the second coil 42, thereby mitigating electric field concentration at the second corner portion 42C. Therefore, it is possible to suppress a decrease in the withstand voltage of the insulating chip 80 caused by the electric field concentration at the second corner portion 42C.

[0188] In addition, because the second recess 44 forms an inverse tapered shape from the second upper surface 42S to the second side surface 42A, stress generated in the second recess 44 is applied to the inside of the second coil 42. In other words, stress is less likely to be applied to the insulating layer 85 from the second recess 44. Therefore, the occurrence of cracks in the insulating layer 85 can be suppressed.

[0189] (1-2) The cross-sectional shape of the second curved surface 44P is an arc shape. According to this configuration, the second recess 44 forms an inversely tapered curved shape from the second upper surface 42S to the second side surface 42A, so that stress generated in the second recess 44 is applied to the inside of the second coil 42. In other words, stress is less likely to be applied to the insulating layer 85 from the second recess 44. Therefore, the occurrence of cracks in the insulating layer 85 can be suppressed.

[0190] (1-3) The second coil 42 serving as the second conductor 52 has a predetermined width. The second side surface 42A includes a second inner side surface 42AA located on the inner side in the X direction, which is the width direction of the second conductor 52, and a second outer side surface 42AB located on the outer side in the X direction. The second corner portion 42C includes a second inner corner portion 42CA located between the second inner side surface 42AA and the second top surface 42S, and a second outer corner portion 42CB located between the second outer side surface 42AB and the second top surface 42S. The second recess 44 includes a second inner recess 44A including a second inner curved surface 44PA provided in the second inner corner portion 42CA, and a second outer recess 44B including a second outer curved surface 44PB provided in the second outer corner portion 42CB.

[0191] According to this configuration, recesses are provided on both the inside and outside of the second coil 42, in other words, edges are not formed on both the inside and outside of the second coil 42, which reduces electric field concentration at both the inside and outside corners of the second coil 42. Therefore, it is possible to suppress a decrease in the withstand voltage of the insulating tip 80 due to this electric field concentration.

[0192] In addition, the second inner recess 44A and the second outer recess 44B form an inverse tapered shape from the second upper surface 42S toward the second inner side surface 42AA and the second outer side surface 42AB. Therefore, stress generated in both the second inner recess 44A and the second outer recess 44B is applied to the inside of the second coil 42. In other words, stress generated in the recesses on both the inside and outside of the second coil 42 is applied to the inside of the second coil 42. Therefore, stress is less likely to be applied to the insulating layer 85 from both the second inner recess 44A and the second outer recess 44B. Therefore, cracks in the insulating layer 85 can be suppressed.

[0193] (1-4) The arc length of the cross-sectional shape of the second inner curved surface 44PA is equal to the arc length of the cross-sectional shape of the second outer curved surface 44PB. This configuration can prevent the electric field from concentrating on one of second inner corner portion 42CA and second outer corner portion 42CB due to the difference in size between second inner curved surface 44PA and second outer curved surface 44PB.

[0194] (1-5) The second coil 42 serving as the second conductor 52 has a tapered shape in which the second side surface 42A is inclined so as to taper from the second upper surface 42S toward the second lower surface 42R. According to this configuration, when the second side surface 42A is inclined and the second side surface 42A and the second top surface 42S are directly connected, an edge is likely to be formed at the second corner portion 42C. In this regard, by providing the second recess 44 at the second corner portion 42C, an edge is not formed, and therefore, even if the second coil 42 is tapered, electric field concentration at the second corner portion 42C can be alleviated.

[0195] (1-6) The first coil 41 serving as the first conductor 51 includes a first upper surface 41S, a first lower surface 41R opposite to the first upper surface 41S, a first side surface 41A provided between the first upper surface 41S and the first lower surface 41R in the Z direction, and a first corner portion 41C between the first side surface 41A and the first upper surface 41S. The first corner portion 41C is provided with a first recess 43 including a first curved surface 43P that is recessed so as to be convex toward the inside of the first coil 41 serving as the first conductor 51.

[0196] According to this configuration, the first recess 43 prevents an edge from being formed at the first corner portion 41C of the first coil 41, thereby mitigating the electric field concentration at the first corner portion 41C. Therefore, it is possible to suppress a decrease in the withstand voltage of the insulating chip 80 caused by the electric field concentration at the first corner portion 41C.

[0197] In addition, because the first recess 43 forms an inverse tapered shape from the first upper surface 41S to the first side surface 41A, stress generated in the first recess 43 is applied to the inside of the first coil 41. In other words, stress is less likely to be applied to the insulating layer 85 from the first recess 43. Therefore, the occurrence of cracks in the insulating layer 85 can be suppressed.

[0198] (1-7) The cross-sectional shape of the first curved surface 43P is an arc shape. According to this configuration, the first recess 43 forms an inversely tapered curved shape from the first upper surface 41S to the first side surface 41A, so that stress generated in the first recess 43 is applied to the inside of the first coil 41. In other words, stress is less likely to be applied to the insulating layer 85 from the first recess 43. Therefore, it is possible to suppress the occurrence of cracks in the insulating layer 85.

[0199] (1-8) The first coil 41 serving as the first conductor 51 has a predetermined width. The first side surface 41A includes a first inner side surface 41AA located on the inner side in the X direction, which is the width direction of the first conductor 51, and a first outer side surface 41AB located on the outer side in the X direction. The first corner portion 41C includes a first inner corner portion 41CA located between the first inner side surface 41AA and the first top surface 41S, and a first outer corner portion 41CB located between the first outer side surface 41AB and the first top surface 41S. The first recess 43 includes a first inner recess 43A including a first inner curved surface 43PA provided in the first inner corner portion 41CA, and a first outer recess 43B including a first outer curved surface 43PB provided in the first outer corner portion 41CB.

[0200] According to this configuration, recesses are provided on both the inside and outside of the first coil 41, in other words, edges are not formed on both the inside and outside of the first coil 41, which reduces electric field concentration at both the inside and outside corners of the first coil 41. Therefore, it is possible to suppress a decrease in the withstand voltage of the insulating tip 80 due to this electric field concentration.

[0201] (1-9) The arc length of the cross-sectional shape of the first inner curved surface 43PA is equal to the arc length of the cross-sectional shape of the first outer curved surface 43PB. This configuration can prevent the electric field from concentrating on one of first inner corner portion 41CA and first outer corner portion 41CB due to the difference in size between first inner curved surface 43PA and first outer curved surface 43PB.

[0202] (1-10) The first coil 41 serving as the first conductor 51 has a tapered shape in which the first side surface 41A is inclined so as to taper from the first upper surface 41S toward the first lower surface 41R. According to this configuration, when first side surface 41A is inclined and first top surface 41S is directly connected to first corner portion 41C, an edge is likely to be formed at first corner portion 41C. In this regard, by providing first recess 43 at first corner portion 41C, an edge is not formed, and therefore electric field concentration at first corner portion 41C can be alleviated even if first coil 41 is tapered.

[0203] Second Embodiment 23 to 25, an insulating chip 80 of the second embodiment will be described. The insulating chip 80 of the second embodiment differs from the insulating chip 80 of the first embodiment mainly in the configuration of the connection wiring 60. In the following, components common to the first embodiment are given the same reference numerals, and their description will be omitted.

[0204] Fig. 23 shows an enlarged cross-sectional structure of a portion of the first connection wiring 60A. Fig. 24 shows an enlarged cross-sectional structure of a portion of the first layer wiring 62A of the first connection wiring 60A. Fig. 25 shows an enlarged cross-sectional structure of a portion of the second layer wiring 63A of the first connection wiring 60A.

[0205] [1st layer wiring] The configuration of the first layer wiring 62A will be described with reference to FIGS. 23 and 24, the first-layer wiring 62A is provided in the insulating layer 853 of the insulating layers 851 to 857 of the insulator 84. The first-layer wiring 62A penetrates the insulating layer 853 in the Z direction. The first-layer wiring 62A is sandwiched between the insulating layer 852 and the insulating layer 854.

[0206] The through hole 87A provided in the insulating layer 853 penetrates the insulating layer 853 in the Z direction, thereby exposing the thick insulating layer 85A of the insulating layer 852. Therefore, the first-layer wiring 62A embedded in the through hole 87A contacts the thick insulating layer 85A of the insulating layer 852. In one example, the through hole 87A has a tapered shape that narrows from the upper surface 853S to the lower surface 853R of the insulating layer 853. The angle θ3 of the side surface 853B of the insulating layer 853 that constitutes the through hole 87A is equal to or greater than 80° and equal to or less than 90°. In one example, the angle θ3 is 85°. Here, the angle θ3 can be defined as the angle between the lower surface 853R and the side surface 853B of the insulating layer 853.

[0207] The first-layer wiring 62A has, for example, a rectangular shape in a plan view. The first-layer wiring 62A includes a first wiring upper surface 62AS, a first wiring lower surface 62AR, and a first wiring side surface 62AA. The first wiring upper surface 62AS is disposed on the first-layer wiring 62A closer to the insulating upper surface 84S of the insulator 84. The first wiring lower surface 62AR forms the surface opposite to the first wiring upper surface 62AS. The first wiring lower surface 62AR is disposed on the first-layer wiring 62A closer to the insulating lower surface 84R of the insulator 84. The first wiring side surface 62AA is provided between the first wiring upper surface 62AS and the first wiring lower surface 62AR in the Z direction.

[0208] In the second embodiment, the first wiring upper surface 62AS is located at the same position in the Z direction as the upper surface 853S of the insulating layer 853. Here, the upper surface 853S of the insulating layer 853 is formed by the upper surface of the thick insulating layer 85A of the insulating layer 853. The position of the first wiring upper surface 62AS in the Z direction can be arbitrarily changed. For example, the first wiring upper surface 62AS may be located closer to the lower surface 853R of the insulating layer 853 than the upper surface 853S of the insulating layer 853 in the Z direction. The first-layer wiring 62A embedded in the through hole 87A has a tapered shape in which the first wiring side surface 62AA is inclined so as to taper from the first wiring upper surface 62AS toward the first wiring lower surface 62AR. In other words, the opposing first wiring side surfaces 62AA are inclined so as to approach each other from the first wiring upper surface 62AS toward the first wiring lower surface 62AR.

[0209] The first-layer wiring 62A includes a seed layer 62AB and a plating layer 62AC provided on the seed layer 62AB. The seed layer 62AB is provided on the side surface (side surface 853B of the insulating layer 853) that constitutes the through hole 87A and on the upper surface of the insulating layer 852 exposed by the through hole 87A. Therefore, both the first wiring lower surface 62AR and the first wiring side surface 62AA are formed by the seed layer 62AB. The first wiring upper surface 62AS is formed by the plating layer 62AC. In one example, the seed layer 62AB has the same configuration as the seed layer 45A shown in FIG. 11, and the plating layer 62AC has the same configuration as the plating layer 46A shown in FIG. 11.

[0210] As shown in FIG. 24, the first-layer wiring 62A includes a first wiring corner portion 62AD between the first wiring side surface 62AA and the first wiring top surface 62AS. A third recess 62AE is provided in the first wiring corner portion 62AD. The third recess 62AE includes a third curved surface 62AP. The third recess 62AE is recessed so as to be convex toward the inside of the first-layer wiring 62A. The cross-sectional shape of the third curved surface 62AP in the cross-sectional view shown in FIG. 24 is an arc. The third recess 62AE is arc-shaped, with a third center of curvature C3 being the intersection of a fifth virtual line L5 along the first wiring top surface 62AS and a sixth virtual line L6 along the first wiring side surface 62AA. The third center of curvature C3 is located outside the first-layer wiring 62A. The third recess 62AE is provided across both the seed layer 62AB and the plating layer 62AC. In one example, the third recess 62AE is provided over the entire periphery of the first layer wiring 62A in plan view.

[0211] The arc length of the cross-sectional shape of the third curved surface 62AP is equal to the arc length of the cross-sectional shape of the first curved surface 43P of the first recess 43 shown in FIG. 11. It can also be said that the radius of curvature of the third curved surface 62AP is equal to the radius of curvature of the first curved surface 43P. The arc length of the cross-sectional shape of the third curved surface 62AP is equal to the arc length of the cross-sectional shape of the second curved surface 44P of the second recess 44 shown in FIG. It can also be said that the radius of curvature of the third curved surface 62AP is equal to the radius of curvature of the second curved surface 44P. The radius of curvature of the third curved surface 62AP is, for example, 1 μm.

[0212] The thick insulating layer 85A of the insulating layer 853 includes a third exposed side surface 85AC exposed from the first wiring side surface 62AA of the first-layer wiring 62A by the third recess 62AE. The third exposed side surface 85AC is a portion of the side surface 853B of the insulating layer 853 between the upper edge of the first wiring side surface 62AA and the upper surface 853S of the insulating layer 853. The third exposed side surface 85AC faces the third curved surface 62AP of the third recess 62AE in a direction perpendicular to the Z direction. In one example, the length of the third exposed side surface 85AC is equal to the radius of curvature of the third curved surface 62AP. Here, the length of the third exposed side surface 85AC can be defined by the distance between the upper edge of the first wiring side surface 62AA and the upper surface 853S of the insulating layer 853.

[0213] The first-layer wiring 62A is covered with a thin insulating layer 85B of the insulating layer 854. The portion of the thin insulating layer 85B of the insulating layer 854 corresponding to the first-layer wiring 62A includes a third upper surface portion 85EA, a third side surface portion 85EB, a third curved portion 85EC, and a first wiring upper surface portion 85ED. The third upper surface portion 85EA, the third side surface portion 85EB, the third curved portion 85EC, and the first wiring upper surface portion 85ED are integrated. The third upper surface portion 85EA covers an upper surface 853S of the insulating layer 853. The third upper surface portion 85EA is in contact with the upper surface 853S of the insulating layer 853. The third upper surface portion 85EA may be integrated with, for example, the first upper surface portion 85CA (see FIG. 11). The third side surface portion 85EB is provided along a third exposed side surface 85AC. The third side surface portion 85EB is connected to the third upper surface portion 85EA. The third curved portion 85EC is in contact along the third curved surface 62AP. The third curved portion 85EC is connected to the third side surface portion 85EB. The first wiring upper surface portion 85ED covers the first wiring upper surface 62AS of the first-layer wiring 62A. The first wiring upper surface portion 85ED is in contact with the first wiring upper surface 62AS. The first wiring upper surface portion 85ED is connected to the third curved portion 85EC.

[0214] The thick insulating layer 85A of the insulating layer 854 is embedded in the third recess 62AE. More specifically, the thick insulating layer 85A of the insulating layer 854 is embedded in a recess space formed by the third side surface portion 85EB and the third curved portion 85EC of the thin insulating layer 85B of the insulating layer 854. In this way, it can be said that the insulating layer 854 is embedded in the third recess 62AE.

[0215] [2nd layer wiring] The configuration of the second layer wiring 63A will be described with reference to FIGS. 23 and 25, the second-layer wiring 63A is provided in insulating layer 857 of insulating layers 851 to 857 of insulator 84. The second-layer wiring 63A penetrates insulating layer 857 in the Z direction. The second-layer wiring 63A is sandwiched between insulating layer 856 and the uppermost insulating layer 85U.

[0216] The through-hole 87B provided in the insulating layer 857 penetrates the insulating layer 857 in the Z direction, thereby exposing the thick insulating layer 85A of the insulating layer 856. Therefore, the second-layer wiring 63A embedded in the through-hole 87B contacts the thick insulating layer 85A of the insulating layer 852. In one example, the through-hole 87B is tapered from the upper surface 857S of the insulating layer 857 toward the lower surface 857R. The angle θ4 of the side surface 857B of the insulating layer 857 constituting the through-hole 87B is equal to or greater than 80° and equal to or less than 90°. In one example, the angle θ4 is 85°. Here, the angle θ4 can be defined as the angle between the lower surface 857R of the insulating layer 857 and the side surface 857B.

[0217] The second-layer wiring 63A has, for example, a rectangular shape in a plan view. The second-layer wiring 63A includes a second wiring upper surface 63AS, a second wiring lower surface 63AR, and a second wiring side surface 63AA. The second wiring upper surface 63AS is disposed on the second-layer wiring 63A closer to the insulating upper surface 84S of the insulator 84. The second wiring lower surface 63AR forms the surface opposite to the second wiring upper surface 63AS. The second wiring lower surface 63AR is disposed on the second-layer wiring 63A closer to the insulating lower surface 84R (see FIG. 8) of the insulator 84. The second wiring side surface 63AA is provided between the second wiring upper surface 63AS and the second wiring lower surface 63AR in the Z direction.

[0218] In the second embodiment, the second wiring upper surface 63AS is located at the same position in the Z direction as the upper surface 857S of the insulating layer 857. Here, the upper surface 857S of the insulating layer 857 is formed by the upper surface of the thick insulating layer 85A of the insulating layer 857. The position of the second wiring upper surface 63AS in the Z direction can be arbitrarily changed. For example, the second wiring upper surface 63AS may be located closer to the lower surface 857R of the insulating layer 857 than the upper surface 857S of the insulating layer 857 in the Z direction. The second-layer wiring 63A embedded in the through hole 87B has a tapered shape in which the second wiring side surface 63AA is inclined so as to taper from the second wiring upper surface 63AS toward the second wiring lower surface 63AR. In other words, the opposing second wiring side surfaces 63AA are inclined so as to approach each other from the second wiring upper surface 63AS toward the second wiring lower surface 63AR.

[0219] The second-layer wiring 63A includes a seed layer 63AB and a plating layer 63AC provided on the seed layer 63AB. The seed layer 63AB is provided on the side surface (side surface 857B of the insulating layer 857) that constitutes the through hole 87B and on the upper surface of the insulating layer 856 exposed by the through hole 87B. Therefore, both the second wiring lower surface 63AR and the second wiring side surface 63AA are formed by the seed layer 63AB. The second wiring upper surface 63AS is formed by the plating layer 63AC. In one example, the seed layer 63AB has the same configuration as the seed layer 45B shown in FIG. 14, and the plating layer 63AC has the same configuration as the plating layer 46B shown in FIG. 14.

[0220] As shown in FIG. 25, the second-layer wiring 63A includes a second wiring corner portion 63AD between the second wiring side surface 63AA and the second wiring top surface 63AS. A fourth recess 63AE is provided in the second wiring corner portion 63AD. The fourth recess 63AE includes a fourth curved surface 63AP. The fourth recess 63AE is recessed so as to be convex toward the inside of the second-layer wiring 63A. The cross-sectional shape of the fourth curved surface 63AP in the cross-sectional view shown in FIG. 25 is an arc. The fourth recess 63AE is arc-shaped, with a fourth center of curvature C4 at the intersection of a seventh virtual line L7 along the second wiring top surface 63AS and an eighth virtual line L8 along the second wiring side surface 63AA. The fourth center of curvature C4 is located outside the second-layer wiring 63A. The fourth recess 63AE is provided across both the seed layer 63AB and the plating layer 63AC. In one example, the fourth recess 63AE is provided over the entire periphery of the second layer wiring 63A in plan view.

[0221] The arc length of the cross-sectional shape of the fourth curved surface 63AP is equal to the arc length of the cross-sectional shape of the second curved surface 44P of the second recess 44 shown in FIG. 14. It can also be said that the radius of curvature of the fourth curved surface 63AP is equal to the radius of curvature of the second curved surface 44P. The arc length of the cross-sectional shape of the fourth curved surface 63AP is equal to the arc length of the cross-sectional shape of the third curved surface 62AP shown in FIG. 24. It can also be said that the radius of curvature of the fourth curved surface 63AP is equal to the radius of curvature of the third curved surface 62AP. The radius of curvature of the fourth curved surface 63AP is, for example, 1 μm.

[0222] The thick insulating layer 85A of the insulating layer 857 includes a fourth exposed side surface 85AD exposed from the second wiring side surface 63AA of the second-layer wiring 63A by the fourth recess 63AE. The fourth exposed side surface 85AD is a portion of the side surface 857B of the insulating layer 857 between the upper edge of the second wiring side surface 63AA and the upper surface 857S of the insulating layer 857. The fourth exposed side surface 85AD faces the fourth curved surface 63AP of the fourth recess 63AE in a direction perpendicular to the Z direction. In one example, the length of the fourth exposed side surface 85AD is equal to the radius of curvature of the fourth curved surface 63AP. Here, the length of the fourth exposed side surface 85AD can be defined by the distance between the upper edge of the second wiring side surface 63AA and the upper surface 857S of the insulating layer 857.

[0223] The second-layer wiring 63A is covered by a thin insulating layer 85B of the uppermost insulating layer 85U. The portion of the thin insulating layer 85B of the uppermost insulating layer 85U corresponding to the second-layer wiring 63A includes a fourth upper surface portion 85FA, a fourth side surface portion 85FB, a fourth curved portion 85FC, and a second wiring upper surface portion 85FD. The fourth upper surface portion 85FA, the fourth side surface portion 85FB, the fourth curved portion 85FC, and the second wiring upper surface portion 85FD are integrated. The fourth upper surface portion 85FA covers an upper surface 857S of the insulating layer 857. The fourth upper surface portion 85FA is in contact with the upper surface 857S of the insulating layer 857. The fourth upper surface portion 85FA may be integrated with, for example, the second upper surface portion 85DA. The fourth side surface portion 85FB covers a fourth exposed side surface 85AD. The fourth side surface portion 85FB is provided along the fourth exposed side surface 85AD. The fourth side surface portion 85FB is connected to the fourth top surface portion 85FA. The fourth side surface portion 85FB is in contact with the fourth exposed side surface 85AD. The fourth curved portion 85FC covers the fourth curved surface 63AP. The fourth curved portion 85FC is in contact with the fourth curved surface 63AP along the fourth curved surface 63AP. The fourth curved portion 85FC is connected to the fourth side surface portion 85FB. The second wiring top surface portion 85FD covers the second wiring top surface 63AS of the second-layer wiring 63A. The second wiring top surface portion 85FD is in contact with the second wiring top surface 63AS. The second wiring top surface portion 85FD is connected to the fourth curved portion 85FC.

[0224] The thick insulating layer 85A of the uppermost insulating layer 85U is embedded in the fourth recess 63AE. More specifically, the thick insulating layer 85A of the uppermost insulating layer 85U is embedded in a recess space formed by the fourth side surface portion 85FB and the fourth curved portion 85FC of the thin insulating layer 85B of the uppermost insulating layer 85U. In this way, it can be said that the uppermost insulating layer 85U is embedded in the fourth recess 63AE.

[0225] [Insulating chip manufacturing method] A method for manufacturing the second layer wiring 63A in the manufacturing method of the insulating chip 80 will be described. The manufacturing method of the second-layer wiring 63A includes forming a through hole 87B. The step of forming the through hole 87B may be the same step as the step of forming the second groove 86B of the first embodiment. In other words, the second groove 86B and the through hole 87B may be formed at the same time.

[0226] The manufacturing method of the second-layer wiring 63A includes forming a conductive layer 700 (see FIG. 17) so as to fill the through hole 87B. The step of forming the conductive layer 700 so as to fill the through hole 87B may be the same step as the step of forming the conductive layer 700 so as to fill the second groove 86B of the first embodiment. In other words, the conductive layer 700 is simultaneously filled in the through hole 87B and the second groove 86B.

[0227] The manufacturing method of the second-layer wiring 63A includes thinning the insulating layer 857 and partially removing the conductive layer 700. These steps are common to the first embodiment. Therefore, the conductive layer 700 embedded in the through hole 87B and the conductive layer 700 embedded in the second groove 86B are partially removed at the same time.

[0228] The manufacturing method of the second-layer wiring 63A includes forming a fourth recess 63AE. Forming the fourth recess 63AE may be a common step with forming the second recess 44 of the first embodiment. That is, the fourth recess 63AE and the second recess 44 may be formed simultaneously. Through the above steps, the second-layer wiring 63A is formed. In this way, the second-layer wiring 63A may be formed simultaneously with the second conductor 52. Note that the first-layer wiring 62A may also be formed simultaneously with the first conductor 51.

[0229] [Effects of the second embodiment] According to the second embodiment, the following effects can be obtained. (2-1) The insulating chip 80 includes a first electrode pad 81 electrically connected to the first conductor 51, a second electrode pad 82 electrically connected to the second conductor 52, and a connection wiring 60 provided in the insulator 84 and connecting the first conductor 51 and the first electrode pad 81. The connection wiring 60 includes a first wiring portion 61A connected to the first electrode pad 81 and extending in the Z direction, and a second wiring portion 66A connected to the first conductor 51 and extending outward beyond the first conductor 51 in a plan view. The first wiring portion 61A includes a first-layer wiring 62A provided at the same position as the first conductor 51 in the Z direction and electrically connected to the second wiring portion 66A, a second-layer wiring 63A provided at the same position as the second conductor 52 in the Z direction, a through wiring 64A provided between the first-layer wiring 62A and the second-layer wiring 63A in the Z direction, and a front-side via wiring 65A connecting the second-layer wiring 63A and the first electrode pad 81. The second-layer wiring 63A includes a second wiring upper surface 63AS, a second wiring lower surface 63AR opposite the second wiring upper surface 63AS, a second wiring side surface 63AA connecting the second wiring upper surface 63AS and the second wiring lower surface 63AR, and a second wiring corner portion 63AD between the second wiring side surface 63AA and the second wiring upper surface 63AS. The second wiring corner portion 63AD is provided with a fourth recess 63AE including a fourth curved surface 63AP that is recessed so as to be convex toward the inside of the second-layer wiring 63A.

[0230] With this configuration, the fourth recess 63AE prevents an edge from being formed at the second wiring corner portion 63AD of the second-layer wiring 63A, thereby mitigating electric field concentration at the second wiring corner portion 63AD, thereby suppressing a decrease in the breakdown voltage of the insulating chip 80 due to electric field concentration at the second wiring corner portion 63AD.

[0231] In addition, because the fourth recess 63AE forms an inverse tapered shape from the second wiring upper surface 63AS to the second wiring side surface 63AA, stress generated in the fourth recess 63AE is applied inward to the second-layer wiring 63A. In other words, stress is less likely to be applied to the insulating layer 85 from the fourth recess 63AE. Therefore, it is possible to suppress the occurrence of cracks in the insulating layer 85.

[0232] (2-2) The cross-sectional shape of the fourth curved surface 63AP is an arc shape. With this configuration, the fourth recess 63AE forms a reverse-tapered curved shape from the second wiring upper surface 63AS toward the second wiring side surface 63AA, so that stress generated in the fourth recess 63AE is applied inward to the second-layer wiring 63A. In other words, stress is less likely to be applied to the insulating layer 85 from the fourth recess 63AE. Therefore, it is possible to suppress the occurrence of cracks in the insulating layer 85.

[0233] (2-3) The second-layer wiring 63A has a tapered shape in which the second wiring side surface 63AA is inclined so as to taper from the second wiring upper surface 63AS toward the second wiring lower surface 63AR. According to this configuration, since the second wiring side surface 63AA is inclined, an edge is likely to be formed at the second wiring corner portion 63AD when the second wiring side surface 63AA and the second wiring top surface 63AS are directly connected. In this regard, since the fourth recess 63AE is provided at the second wiring corner portion 63AD, an edge is not formed, and therefore, even if the second-layer wiring 63A is tapered, electric field concentration at the second wiring corner portion 63AD can be alleviated.

[0234] (2-4) The first-layer wiring 62A includes a first wiring upper surface 62AS, a first wiring lower surface 62AR opposite to the first wiring upper surface 62AS, a first wiring side surface 62AA provided between the first wiring upper surface 62AS and the first wiring lower surface 62AR in the Z direction, and a first wiring corner portion 62AD between the first wiring side surface 62AA and the first wiring upper surface 62AS. The first wiring corner portion 62AD is provided with a third recess 62AE including a third curved surface 62AP recessed so as to be convex toward the inside of the first-layer wiring 62A.

[0235] With this configuration, the third recess 62AE prevents an edge from being formed at the first wiring corner portion 62AD of the first-layer wiring 62A, thereby mitigating electric field concentration at the first wiring corner portion 62AD, thereby suppressing a decrease in the breakdown voltage of the insulating chip 80 due to electric field concentration at the first wiring corner portion 62AD.

[0236] In addition, because the third recess 62AE forms an inverse tapered shape from the first wiring upper surface 62AS toward the first wiring side surface 62AA, stress generated in the third recess 62AE is applied inward to the first-layer wiring 62A. In other words, stress is less likely to be applied to the insulating layer 85 from the third recess 62AE. Therefore, it is possible to suppress the occurrence of cracks in the insulating layer 85.

[0237] (2-5) The cross-sectional shape of the third curved surface 62AP is an arc shape. With this configuration, the third recess 62AE forms a reverse-tapered curved shape from the first wiring upper surface 62AS toward the first wiring side surface 62AA, so that stress generated in the third recess 62AE is applied inward to the first-layer wiring 62A. In other words, stress is less likely to be applied to the insulating layer 85 from the third recess 62AE. Therefore, it is possible to suppress the occurrence of cracks in the insulating layer 85.

[0238] (2-6) The first-layer wiring 62A has a tapered shape in which the first wiring side surface 62AA is inclined so as to taper from the first wiring upper surface 62AS toward the first wiring lower surface 62AR. According to this configuration, since the first wiring side surface 62AA is inclined, an edge is likely to be formed at the first wiring corner portion 62AD when the first wiring side surface 62AA and the first wiring top surface 62AS are directly connected. In this regard, since the third recess 62AE is provided in the first wiring corner portion 62AD, an edge is not formed, and therefore, even if the first-layer wiring 62A is tapered, electric field concentration at the first wiring corner portion 62AD can be alleviated.

[0239] Third Embodiment 26 to 28, an insulating tip 80 of the third embodiment will be described. The insulating tip 80 of the third embodiment differs from the insulating tip 80 of the first embodiment mainly in the configuration of the seal portion 93. In the following, components common to the first embodiment will be assigned the same reference numerals, and their description will be omitted.

[0240] Fig. 26 shows an enlarged cross-sectional view of a portion of the seal portion 93. Fig. 27 shows an enlarged cross-sectional view of a portion of a first seal portion 94 (described later) of the seal portion 93. Fig. 28 shows an enlarged cross-sectional view of a portion of a second seal portion 95 (described later) of the seal portion 93.

[0241] As shown in FIG. 26 , the seal portion 93 includes a first seal portion 94, a second seal portion 95, a first connection seal portion 96, and a second connection seal portion 97. The first seal portion 94 is disposed at the same position in the Z direction as the first conductor 51 (see FIG. 8 ). That is, the first seal portion 94 is provided on the insulating layer 853. The second seal portion 95 is disposed at the same position in the Z direction as the second conductor 52 (see FIG. 8 ). That is, the second seal portion 95 is provided on the insulating layer 857. The first connection seal portion 96 is provided between the first seal portion 94 and the second seal portion 95 in the Z direction. The first connection seal portion 96 connects the first seal portion 94 and the second seal portion 95. The first connection seal portion 96 penetrates the insulating layers 854 to 856 in the Z direction. The second connection seal portion 97 connects the first seal portion 94 and the substrate 83 (see FIG. 8 ). The detailed configurations of the first seal portion 94 and the second seal portion 95 will be described below.

[0242] [First seal part] 26 and 27, a through-hole 89A is provided in the insulating layer 853. A first seal portion 94 is embedded in the through-hole 89A.

[0243] The through hole 89A penetrates the insulating layer 853 in the Z direction, exposing the thick insulating layer 85A of the insulating layer 852. Therefore, the first seal portion 94 embedded in the through hole 89A contacts the thick insulating layer 85A of the insulating layer 852. In one example, the through hole 89A is tapered from the upper surface 853S of the insulating layer 853 to the lower surface 853R. The angle θ5 of the side surface 853C of the insulating layer 853 that constitutes the through hole 89A is greater than or equal to 80° and less than or equal to 90°. In one example, the angle θ5 is 85°. Here, the angle θ5 can be defined as the angle between the lower surface 853R and the side surface 853C of the insulating layer 853.

[0244] The first seal portion 94 has, for example, a rectangular frame shape in a plan view. The first seal portion 94 includes a first seal upper surface 94S, a first seal lower surface 94R, and a first seal side surface 94A. The first seal upper surface 94S is disposed on the first seal portion 94 closer to the insulating upper surface 84S of the insulator 84. The first seal lower surface 94R forms the surface opposite to the first seal upper surface 94S. The first seal lower surface 94R is disposed on the first seal portion 94 closer to the insulating lower surface 84R of the insulator 84. The first seal side surface 94A is provided between the first seal upper surface 94S and the first seal lower surface 94R in the Z direction.

[0245] In the third embodiment, the first seal upper surface 94S is located at the same position in the Z direction as the upper surface 853S of the insulating layer 853. The position of the first seal upper surface 94S in the Z direction can be changed as desired. For example, the first seal upper surface 94S may be located closer to the lower surface 853R of the insulating layer 853 than the upper surface 853S of the insulating layer 853 in the Z direction. The first seal portion 94 embedded in the through-hole 89A has a tapered shape in which the first seal side surface 94A is inclined so as to taper from the first seal upper surface 94S toward the first seal lower surface 94R. In other words, the opposing first seal side surfaces 94A are inclined so as to approach each other from the first seal upper surface 94S toward the first seal lower surface 94R.

[0246] The first seal portion 94 includes a seed layer 94P and a plating layer 94Q provided on the seed layer 94P. The seed layer 94P is provided on the side surface (side surface 853C of the insulating layer 853) that defines the through hole 89A and on the upper surface of the insulating layer 852 exposed by the through hole 89A. Therefore, both the first seal lower surface 94R and the first seal side surface 94A are formed by the seed layer 94P. The first seal upper surface 94S is formed by the plating layer 94Q. In one example, the seed layer 94P has the same configuration as the seed layer 45A shown in FIG. 11, and the plating layer 94Q has the same configuration as the plating layer 46A shown in FIG. 11.

[0247] As shown in FIG. 27 , the first seal portion 94 includes a first seal corner portion 94C between the first seal side surface 94A and the first seal upper surface 94S. A fifth recess 94CA is provided in the first seal corner portion 94C. The fifth recess 94CA includes a fifth curved surface 94CP. The fifth recess 94CA is recessed so as to be convex toward the inside of the first seal portion 94. The cross-sectional shape of the fifth curved surface 94CP in the cross-sectional view shown in FIG. 27 is an arc. The fifth recess 94CA is arc-shaped, with a fifth center of curvature C5 at the intersection of a ninth imaginary line L9 along the first seal upper surface 94S and a tenth imaginary line L10 along the first seal side surface 94A. The fifth center of curvature C5 is located outside the first seal portion 94. The fifth recess 94CA is provided in both the seed layer 94P and the plating layer 94Q. In one example, the fifth recess 94CA is provided around the entire periphery of the first seal portion 94 in plan view.

[0248] The arc length of the cross-sectional shape of the fifth curved surface 94CP is equal to the arc length of the cross-sectional shape of the first curved surface 43P of the first recess 43 shown in Figure 11. It can also be said that the radius of curvature of the fifth curved surface 94CP is equal to the radius of curvature of the first curved surface 43P. The arc length of the cross-sectional shape of the fifth curved surface 94CP is equal to the arc length of the cross-sectional shape of the second curved surface 44P of the second recess 44 shown in Figure 14. It can also be said that the radius of curvature of the fifth curved surface 94CP is equal to the radius of curvature of the second curved surface 44P. The radius of curvature of the fifth curved surface 94CP is, for example, 1 µm.

[0249] The thick insulating layer 85A of the insulating layer 853 includes a fifth exposed side surface 85AE exposed from the first seal side surface 94A of the first seal portion 94 by the fifth recess 94CA. The fifth exposed side surface 85AE is a portion of the side surface 853C of the insulating layer 853 between the upper edge of the first seal side surface 94A and the upper surface 853S of the insulating layer 853. The fifth exposed side surface 85AE faces the fifth curved surface 94CP of the fifth recess 94CA in a direction perpendicular to the Z direction. In one example, the length of the fifth exposed side surface 85AE is equal to the radius of curvature of the fifth curved surface 94CP. Here, the length of the fifth exposed side surface 85AE can be defined by the distance between the upper edge of the first seal side surface 94A and the upper surface 853S of the insulating layer 853.

[0250] The first seal portion 94 is covered by the thin insulating layer 85B of the insulating layer 854. The portion of the thin insulating layer 85B of the insulating layer 854 corresponding to the first seal portion 94 includes a fifth upper surface portion 85GA, a fifth side surface portion 85GB, a fifth curved portion 85GC, and a first seal upper surface portion 85GD. The fifth upper surface portion 85GA, the fifth side surface portion 85GB, the fifth curved portion 85GC, and the first seal upper surface portion 85GD are integrated together. The fifth upper surface portion 85GA covers the upper surface 853S of the insulating layer 853. The fifth upper surface portion 85GA is in contact with the upper surface 853S of the insulating layer 853. The fifth upper surface portion 85GA may be integrated with the third upper surface portion 85EA (see FIG. 24). The fifth side surface portion 85GB covers the fifth exposed side surface 85AE. The fifth side surface portion 85GB is provided along the fifth exposed side surface 85AE. The fifth side surface portion 85GB is connected to the fifth upper surface portion 85GA. The fifth curved portion 85GC covers the fifth curved surface 94CP. The fifth curved portion 85GC is in contact with the fifth curved surface 94CP. The fifth curved portion 85GC is connected to the fifth side surface portion 85GB. The first seal upper surface portion 85GD covers the first seal upper surface 94S of the first seal portion 94. The first seal upper surface portion 85GD is in contact with the first seal upper surface 94S. The first seal upper surface portion 85GD is connected to the fifth curved portion 85GC.

[0251] The thick insulating layer 85A of the insulating layer 854 is embedded in the fifth recess 94CA. More specifically, the thick insulating layer 85A of the insulating layer 854 is embedded in a recess space formed by the fifth side surface portion 85GB and the fifth curved portion 85GC of the thin insulating layer 85B of the insulating layer 854. In this way, it can be said that the insulating layer 854 is embedded in the fifth recess 94CA.

[0252] [Second seal part] 26 and 28, a through-hole 89B is provided in the insulating layer 857. A second seal portion 95 is embedded in the through-hole 89B.

[0253] The through hole 89B penetrates the insulating layer 857 in the Z direction, exposing the thick insulating layer 85A of the insulating layer 856. Therefore, the second seal portion 95 embedded in the through hole 89B contacts the thick insulating layer 85A of the insulating layer 856. In one example, the through hole 89B is tapered from the upper surface 857S of the insulating layer 857 toward the lower surface 857R. The angle θ6 of the side surface 857C of the insulating layer 857 that constitutes the through hole 89B is greater than or equal to 80° and less than or equal to 90°. In one example, the angle θ6 is 85°. Here, the angle θ6 can be defined as the angle between the lower surface 857R of the insulating layer 857 and the side surface 857C.

[0254] The second seal portion 95 has, for example, a rectangular frame shape in a plan view. The width of the second seal portion 95 is smaller than the width of the first seal portion 94. Here, the width of the second seal portion 95 is the dimension in a direction perpendicular to the direction in which the second seal portion 95 extends in a plan view. The width of the first seal portion 94 is the dimension in a direction perpendicular to the direction in which the first seal portion 94 extends in a plan view.

[0255] The second seal portion 95 includes a second seal upper surface 95S, a second seal lower surface 95R, and a second seal side surface 95A. The second seal upper surface 95S is disposed closer to the insulating upper surface 84S of the insulator 84 within the second seal portion 95. The second seal lower surface 95R forms the surface opposite to the second seal upper surface 95S. The second seal lower surface 95R is disposed closer to the insulating lower surface 84R of the insulator 84 within the second seal portion 95. The second seal side surface 95A is provided between the second seal upper surface 95S and the second seal lower surface 95R in the Z direction.

[0256] In the third embodiment, the second seal upper surface 95S is located at the same position in the Z direction as the upper surface 857S of the insulating layer 857. The position of the second seal upper surface 95S in the Z direction can be changed as desired. In one example, the second seal upper surface 95S may be located closer to the lower surface 857R of the insulating layer 857 than the upper surface 857S of the insulating layer 857 in the Z direction. The second seal portion 95 embedded in the through hole 89B has a tapered shape in which the second seal side surface 95A is inclined so as to taper from the second seal upper surface 95S toward the second seal lower surface 95R. In other words, the opposing second seal side surfaces 95A are inclined so as to approach each other from the second seal upper surface 95S toward the second seal lower surface 95R.

[0257] The second seal portion 95 includes a seed layer 95P and a plating layer 95Q provided on the seed layer 95P. The seed layer 95P is provided on the side surface (side surface 857C of the insulating layer 857) that defines the through hole 89B and on the upper surface of the insulating layer 856 exposed by the through hole 89B. Therefore, both the second seal lower surface 95R and the second seal side surface 95A are formed by the seed layer 95P. The second seal upper surface 95S is formed by the plating layer 95Q. In one example, the seed layer 95P has the same configuration as the seed layer 45B shown in FIG. 13, and the plating layer 95Q has the same configuration as the plating layer 46B shown in FIG. 13.

[0258] As shown in FIG. 28 , the second seal portion 95 includes a second seal corner portion 95C between the second seal side surface 95A and the second seal upper surface 95S. The second seal corner portion 95C includes a sixth recess 95CA. The sixth recess 95CA includes a sixth curved surface 95CP. The sixth recess 95CA is recessed so as to be convex toward the inside of the second seal portion 95. The cross-sectional shape of the sixth curved surface 95CP in the cross-sectional view shown in FIG. 28 is an arc. The sixth recess 95CA is arc-shaped, with a sixth center of curvature C6 at the intersection of an eleventh imaginary line L11 along the second seal upper surface 95S and a twelfth imaginary line L12 along the second seal side surface 95A. The sixth center of curvature C6 is located outside the second seal portion 95. The sixth recess 95CA is provided in both the seed layer 95P and the plating layer 95Q. In one example, the sixth recess 95CA is provided over the entire periphery of the second seal portion 95 in plan view.

[0259] In one example, the arc length of the cross-sectional shape of the sixth curved surface 95CP is equal to the arc length of the cross-sectional shape of the fifth curved surface 94CP shown in FIG. 27. It can also be said that the radius of curvature of the sixth curved surface 95CP is equal to the radius of curvature of the fifth curved surface 94CP. Furthermore, the arc length of the cross-sectional shape of the sixth curved surface 95CP is equal to the arc length of the cross-sectional shape of the second curved surface 44P of the second recess 44 shown in FIG. 14. It can also be said that the radius of curvature of the sixth curved surface 95CP is equal to the radius of curvature of the second curved surface 44P. The radius of curvature of the sixth curved surface 95CP is, for example, 1 μm.

[0260] The thick insulating layer 85A of the insulating layer 857 includes a sixth exposed side surface 85AF exposed from the second seal side surface 95A of the second seal portion 95 by the sixth recess 95CA. The sixth exposed side surface 85AF is a portion of the side surface 857C of the insulating layer 857 between the upper edge of the second seal side surface 95A and the upper surface 857S of the insulating layer 857. The sixth exposed side surface 85AF faces the sixth curved surface 95CP of the sixth recess 95CA in a direction perpendicular to the Z direction. In one example, the length of the sixth exposed side surface 85AF is equal to the radius of curvature of the sixth curved surface 95CP. Here, the length of the sixth exposed side surface 85AF can be defined by the distance between the upper edge of the second seal side surface 95A and the upper surface 857S of the insulating layer 857.

[0261] The second seal portion 95 is covered by the thin insulating layer 85B of the uppermost insulating layer 85U. The portion of the thin insulating layer 85B of the uppermost insulating layer 85U corresponding to the second seal portion 95 includes a sixth upper surface portion 85HA, a sixth side surface portion 85HB, a sixth curved portion 85HC, and a second seal upper surface portion 85HD. The sixth upper surface portion 85HA, the sixth side surface portion 85HB, the sixth curved portion 85HC, and the second seal upper surface portion 85HD are integrated. The sixth upper surface portion 85HA covers the upper surface 857S of the insulating layer 857. The sixth upper surface portion 85HA is in contact with the upper surface 857S of the insulating layer 857. The sixth upper surface portion 85HA may be integrated with, for example, the fourth upper surface portion 85FA (see FIG. 25). The sixth side surface portion 85HB covers the sixth exposed side surface 85AF. The sixth side surface portion 85HB is provided along the sixth exposed side surface 85AF. The sixth side surface portion 85HB is in contact with the sixth exposed side surface 85AF. The sixth side surface portion 85HB is connected to the sixth upper surface portion 85HA. The sixth curved portion 85HC covers the sixth curved surface 95CP. The sixth curved portion 85HC is in contact along the sixth curved surface 95CP. The sixth curved portion 85HC is connected to the sixth side surface portion 85HB. The second seal upper surface portion 85HD covers the second seal upper surface 95S of the second seal portion 95. The second seal upper surface portion 85HD is in contact with the second seal upper surface 95S. The second seal upper surface portion 85HD is connected to the sixth curved portion 85HC.

[0262] The thick insulating layer 85A of the uppermost insulating layer 85U is embedded in the sixth recess 95CA. More specifically, the thick insulating layer 85A of the uppermost insulating layer 85U is embedded in a recess space formed by the sixth side portion 85HB and the sixth curved portion 85HC of the thin insulating layer 85B of the uppermost insulating layer 85U. In this way, it can be said that the uppermost insulating layer 85U is embedded in the sixth recess 95CA.

[0263] [First connection seal part and second connection seal part] 26, the first connection seal portion 96 is configured with a laminated structure of vias provided in each of the insulating layers 854 to 856. Although not shown, each via of the first connection seal portion 96 is configured with a seed layer and a plating layer, similar to the first seal portion 94 and the second seal portion 95.

[0264] The second connection seal portion 97 is configured with a stacked structure of vias and layer wiring provided in each of the lowest insulating layer 85 and insulating layers 851 and 852. Vias are provided in the lowest insulating layer 85 and insulating layer 852. Layer wiring is provided in the insulating layer 851. Although not shown, each of the multiple vias and layer wiring of the second connection seal portion 97 is configured with a seed layer and a plating layer, similar to the first seal portion 94 and the second seal portion 95.

[0265] [Method of manufacturing chip insulating layer] A method for manufacturing the second seal portion 95 of the insulating chip 80 will now be described. The manufacturing method of the second seal portion 95 includes forming the through hole 89B. The step of forming the through hole 89B may be the same step as the step of forming the second groove 86B of the first embodiment. In other words, the second groove 86B and the through hole 89B may be formed at the same time.

[0266] The manufacturing method of the second sealing portion 95 includes forming a conductive layer 700 (see FIG. 17) so as to fill the through hole 89B. The step of forming the conductive layer 700 so as to fill the through hole 89B may be the same step as the step of forming the conductive layer 700 so as to fill the second groove 86B of the first embodiment. In other words, the conductive layer 700 is simultaneously filled in the through hole 89B and the second groove 86B.

[0267] The method for manufacturing the second sealing portion 95 includes thinning the insulating layer 857 and partially removing the conductive layer 700. These steps are the same as those in the first embodiment. Therefore, the conductive layer 700 embedded in the through hole 89B and the conductive layer 700 embedded in the second groove 86B are partially removed at the same time.

[0268] The manufacturing method of the second seal portion 95 includes forming a sixth recess 95CA. Forming the sixth recess 95CA may be a common step with forming the second recess 44 of the first embodiment. In other words, the sixth recess 95CA and the second recess 44 may be formed simultaneously. The second seal portion 95 is formed through the above steps. In this way, the second seal portion 95 may be formed simultaneously with the second conductor 52. Note that the first seal portion 94 may also be formed simultaneously with the first conductor 51.

[0269] [Effects of the third embodiment] According to the third embodiment, the following effects can be obtained. (3-1) The insulating tip 80 includes a seal portion 93 that is provided on the outer periphery of the insulator 84 and surrounds the first conductor 51 and the second conductor 52 in a plan view. The seal portion 93 includes a first seal portion 94 that is provided at the same position as the first conductor 51 in the Z direction, a second seal portion 95 that is provided at the same position as the second conductor 52 in the Z direction, and a first connecting seal portion 96 that connects the first seal portion 94 and the second seal portion 95 in the Z direction. The second seal portion 95 includes a second seal upper surface 95S, a second seal lower surface 95R opposite the second seal upper surface 95S, a second seal side surface 95A that connects the second seal upper surface 95S and the second seal lower surface 95R, and a second seal corner portion 95C between the second seal side surface 95A and the second seal upper surface 95S. The second seal corner portion 95C is provided with a sixth recess 95CA including a sixth curved surface 95CP that is recessed so as to be convex toward the inside of the second seal portion 95.

[0270] With this configuration, the sixth recess 95CA prevents an edge from being formed in the second seal corner portion 95C of the second seal portion 95, thereby mitigating electric field concentration in the second seal corner portion 95C. This makes it possible to suppress a decrease in the withstand voltage of the insulating tip 80 due to electric field concentration in the second seal corner portion 95C.

[0271] In addition, the sixth recess 95CA creates a reverse tapered shape from the second seal upper surface 95S to the second seal side surface 95A, so that stress generated in the sixth recess 95CA is applied to the inside of the second seal portion 95. In other words, stress is less likely to be applied to the insulating layer 85 from the sixth recess 95CA. Therefore, the occurrence of cracks in the insulating layer 85 can be suppressed.

[0272] (3-2) The cross-sectional shape of the sixth curved surface 95CP is an arc shape. According to this configuration, the sixth recess 95CA forms a reverse-tapered curved shape from the second seal upper surface 95S to the second seal side surface 95A, so that stress generated in the sixth recess 95CA is applied to the inside of the second seal portion 95. In other words, stress is less likely to be applied to the insulating layer 85 from the sixth recess 95CA. Therefore, the occurrence of cracks in the insulating layer 85 can be suppressed.

[0273] (3-3) The second seal portion 95 has a tapered shape in which the second seal side surface 95A is inclined so as to taper from the second seal upper surface 95S toward the second seal lower surface 95R. With this configuration, when the second seal side surface 95A is inclined and the second seal upper surface 95S is directly connected to the second seal corner portion 95C, an edge is likely to be formed in the second seal corner portion 95C. In this regard, the provision of the sixth recess 95CA in the second seal corner portion 95C prevents an edge from being formed, and therefore, even if the second seal portion 95 is tapered, electric field concentration in the second seal corner portion 95C can be alleviated.

[0274] (3-4) The first seal portion 94 includes a first seal upper surface 94S, a first seal lower surface 94R opposite the first seal upper surface 94S, a first seal side surface 94A provided between the first seal upper surface 94S and the first seal lower surface 94R in the Z direction, and a first seal corner portion 94C between the first seal side surface 94A and the first seal upper surface 94S. The first seal corner portion 94C is provided with a fifth recessed portion 94CA including a fifth curved surface 94CP that is recessed so as to be convex toward the inside of the first seal portion 94.

[0275] With this configuration, the fifth recess 94CA prevents an edge from being formed in the first seal corner portion 94C of the first seal portion 94, thereby mitigating electric field concentration in the first seal corner portion 94C. This makes it possible to suppress a decrease in the withstand voltage of the insulating tip 80 due to electric field concentration in the first seal corner portion 94C.

[0276] In addition, because the fifth recess 94CA creates a reverse tapered shape from the first seal upper surface 94S to the first seal side surface 94A, stress generated in the fifth recess 94CA is applied to the inside of the first seal portion 94. In other words, stress is less likely to be applied to the insulating layer 85 from the fifth recess 94CA. Therefore, the occurrence of cracks in the insulating layer 85 can be suppressed.

[0277] (3-5) The cross-sectional shape of the fifth curved surface 94CP is an arc shape. According to this configuration, the fifth recess 94CA forms a reverse-tapered curved shape from the first seal upper surface 94S to the first seal side surface 94A, so that stress generated in the fifth recess 94CA is applied to the inside of the first seal portion 94. In other words, stress is less likely to be applied to the insulating layer 85 from the fifth recess 94CA. Therefore, the occurrence of cracks in the insulating layer 85 can be suppressed.

[0278] (3-6) The first seal portion 94 has a tapered shape in which the first seal side surface 94A is inclined so as to taper from the first seal upper surface 94S toward the first seal lower surface 94R. With this configuration, when the first seal side surface 94A is inclined and the first seal upper surface 94S is directly connected to the first seal side surface 94A, an edge is likely to be formed in the first seal corner portion 94C. In this regard, by providing the fifth recess 94CA in the first seal corner portion 94C, an edge is not formed, and therefore, even if the first seal portion 94 is tapered, electric field concentration in the first seal corner portion 94C can be alleviated.

[0279] <Fourth embodiment> 29 to 33, an insulating chip 80 and a signal transmission device 10 of the fourth embodiment will be described. The insulating chip 80 and the signal transmission device 10 of the fourth embodiment differ from the insulating chip 80 and the signal transmission device 10 of the first embodiment mainly in the configurations of the first conductor 51 and the second conductor 52 of the insulating chip 80. In the following, components common to the first embodiment are assigned the same reference numerals, and their description will be omitted.

[0280] [Configuration of signal transmission device] 29 is a schematic diagram showing an example of the circuit configuration of the signal transmission device 10. This signal transmission device 10 includes a capacitor 200 instead of the transformers 40A and 40B shown in FIG.

[0281] 29, the signal transmission device 10 includes a capacitor 200 connected between a first circuit 20 and a second circuit 30. The signal transmission device 10 includes two capacitors 200 corresponding to two signals transmitted between the first circuit 20 and the second circuit 30. When distinguishing between the two capacitors 200, they will be described as a first capacitor 200A and a second capacitor 200B.

[0282] The first circuit 20 and the second circuit 30 are connected by a first capacitor 200A and a second capacitor 200B. The signal transmission device 10 is configured to transmit a signal between the first circuit 20 and the second circuit 30 through the first capacitor 200A and the second capacitor 200B.

[0283] Both the first capacitor 200A and the second capacitor 200B include a first electrode plate 201 and a second electrode plate 202. The first electrode plate 201 is electrically connected to the first circuit 20. The second electrode plate 202 is electrically connected to the second circuit 30.

[0284] [Insulation chip configuration] 30 is a schematic diagram showing the cross-sectional structure of an insulating chip 80 according to the fourth embodiment. The insulating chip 80 according to the fourth embodiment differs from the insulating chip 80 according to the first embodiment mainly in that the insulating chip 80 according to the fourth embodiment includes a first electrode plate 201 and a second electrode plate 202 instead of the first coil 41 and the second coil 42 of the transformers 40A and 40B.

[0285] The insulating chip 80 shown in Fig. 30 can be used in place of the insulating chip 80 shown in Fig. 2 and Fig. 3. Therefore, the signal transmission device 10 including the insulating chip 80 of the fourth embodiment is configured to include the first circuit chip 160 and the second circuit chip 170 shown in Fig. 2.

[0286] 30 , the first conductor 51 of the insulating chip 80 includes a first electrode plate 201. The second conductor 52 of the insulating chip 80 includes a second electrode plate 202. The first electrode plate 201 and the second electrode plate 202 are each made of a material including one or more appropriately selected from Ti, TiN, Au, Ag, Cu, Al, and W. In one example, the first electrode plate 201 and the second electrode plate 202 are made of the same material. In another example, the first electrode plate 201 and the second electrode plate 202 may be made of different materials.

[0287] Both the first electrode plate 201 and the second electrode plate 202 have an oval shape that is long in the X direction in a plan view. In one example, the first electrode plate 201 and the second electrode plate 202 have the same size in a plan view. In another example, the first electrode plate 201 and the second electrode plate 202 may have different sizes in a plan view. Note that the shapes of the first electrode plate 201 and the second electrode plate 202 in a plan view can be changed as desired.

[0288] The first electrode plate 201 and the second electrode plate 202 face each other in the Z direction. The first electrode plate 201 is disposed closer to the insulating lower surface 84R of the insulator 84. The second electrode plate 202 is disposed closer to the insulating upper surface 84S of the insulator 84. A plurality of insulating layers 85 are interposed between the first electrode plate 201 and the second electrode plate 202 in the Z direction. The first electrode plate 201 is electrically connected to the first electrode pad 81 by a first connection wiring 60A. Here, the configuration of the first connection wiring 60A in the third embodiment is the same as the configuration of the first connection wiring 60A in the first embodiment. The second electrode plate 202 is electrically connected to the second electrode pad 82 by a via wiring 56A. The configurations of the first electrode plate 201 and the second electrode plate 202 will be described in detail below.

[0289] [First electrode plate] The configuration of the first electrode plate 201 will be described with reference to Fig. 31 and Fig. 32. Fig. 31 shows an enlarged cross-sectional structure of the first electrode plate 201 and its surroundings in Fig. 30. Fig. 32 shows an enlarged cross-sectional structure of a portion of the first electrode plate 201 in Fig. 31.

[0290] 31, a through hole 210 is provided in the insulating layer 853. A first electrode plate 201 is embedded in the through hole 210. Because the through-hole 210 penetrates the insulating layer 853 in the Z direction, the thick insulating layer 85A of the insulating layer 852 is exposed. Therefore, the first electrode plate 201 embedded in the through-hole 210 contacts the thick insulating layer 85A of the insulating layer 852. In one example, the through-hole 210 is tapered from the upper surface 853S to the lower surface 853R of the insulating layer 853. The angle θ7 of the side surface 853D of the insulating layer 853 constituting the through-hole 210 is equal to or greater than 80° and equal to or less than 90°. In one example, the angle θ7 is 85°. Here, the angle θ7 can be defined as the angle between the lower surface 853R and the side surface 853D of the insulating layer 853.

[0291] The first electrode plate 201 includes a first electrode upper surface 201S, a first electrode lower surface 201R, and a first electrode side surface 201A. The first electrode upper surface 201S is disposed on the first electrode plate 201 closer to the insulating upper surface 84S of the insulator 84. The first electrode lower surface 201R forms the surface opposite to the first electrode upper surface 201S. The first electrode lower surface 201R is disposed on the first electrode plate 201 closer to the insulating lower surface 84R of the insulator 84. The first electrode side surface 201A is provided between the first electrode upper surface 201S and the first electrode lower surface 201R in the Z direction.

[0292] In the fourth embodiment, the first electrode upper surface 201S is located at the same position in the Z direction as the upper surface 853S of the insulating layer 853. The position of the first electrode upper surface 201S in the Z direction can be changed arbitrarily. For example, the first electrode upper surface 201S may be located closer to the lower surface 853R of the insulating layer 853 than the upper surface 853S of the insulating layer 853 in the Z direction. The first electrode plate 201 embedded in the through-hole 210 has a tapered shape in which the first electrode side surface 201A is inclined so as to taper from the first electrode upper surface 201S toward the first electrode lower surface 201R. In other words, the first electrode side surfaces 201A facing each other are inclined so as to approach each other from the first electrode upper surface 201S toward the first electrode lower surface 201R.

[0293] The first electrode plate 201 includes a seed layer 201P and a plating layer 201Q provided on the seed layer 201P. The seed layer 201P is provided on the side surface (side surface 853D of the insulating layer 853) that defines the through hole 210 and on the upper surface of the insulating layer 852 that is exposed by the through hole 210. Therefore, both the first electrode lower surface 201R and the first electrode side surface 201A are formed by the seed layer 201P. The first electrode upper surface 201S is formed by the plating layer 201Q. In one example, the seed layer 201P has the same configuration as the seed layer 45A shown in FIG. 11, and the plating layer 201Q has the same configuration as the plating layer 46A shown in FIG. 11.

[0294] As shown in FIG. 32, the first electrode plate 201 includes a first electrode corner portion 201C between the first electrode side surface 201A and the first electrode upper surface 201S. A first recess 201CA is provided in the first electrode corner portion 201C. The first recess 201CA includes a first curved surface 201CP. The first recess 201CA is recessed so as to be convex toward the inside of the first electrode plate 201. The cross-sectional shape of the first curved surface 201CP in the cross-sectional view shown in FIG. 32 is an arc. The first recess 201CA is arc-shaped, with a first center of curvature CE1 being the intersection of a first virtual line LE1 along the first electrode upper surface 201S and a second virtual line LE2 along the first electrode side surface 201A. The first center of curvature CE1 is located outward from the first electrode plate 201. The first recess 201CA is provided over both the seed layer 201P and the plating layer 201Q. In one example, the first recess 201CA is provided over the entire periphery of the first electrode plate 201 in a plan view.

[0295] The thick insulating layer 85A of the insulating layer 853 includes a first exposed side surface 85AA exposed from the first electrode side surface 201A of the first electrode plate 201 by the first recess 201CA. The first exposed side surface 85AA is a portion of the side surface 853D of the insulating layer 853 between the upper edge of the first electrode side surface 201A and the upper surface 853S of the insulating layer 853. The first exposed side surface 85AA faces the first curved surface 201CP of the first recess 201CA in a direction perpendicular to the Z direction. In one example, the length of the first exposed side surface 85AA is equal to the radius of curvature of the first curved surface 201CP. Here, the length of the first exposed side surface 85AA can be defined as the distance between the upper edge of the first electrode side surface 201A and the upper surface 853S of the insulating layer 853.

[0296] The first electrode plate 201 is covered by a thin insulating layer 85B of the insulating layer 854. The portion of the thin insulating layer 85B of the insulating layer 854 corresponding to the first electrode plate 201 includes a first upper surface portion 85CA, a first side surface portion 85CB, a first curved portion 85CC, and a first electrode upper surface portion 85JD. The first upper surface portion 85CA, the first side surface portion 85CB, the first curved portion 85CC, and the first electrode upper surface portion 85JD are integrated. The first upper surface portion 85CA is covered by the upper surface 853S of the insulating layer 853, as in the first embodiment. The first side surface portion 85CB is in contact with the first exposed side surface 85AA, as in the first embodiment. The first side surface portion 85CB is connected to the first upper surface portion 85CA. The first curved portion 85CC is in contact along the first curved surface 201CP, as in the first embodiment. The first curved portion 85CC is connected to the first side surface portion 85CB. The first electrode upper surface portion 85JD covers the first electrode upper surface 201S of the first electrode plate 201. The first electrode upper surface portion 85JD is in contact with the first electrode upper surface 201S. The first electrode upper surface portion 85JD is connected to the first curved portion 85CC.

[0297] The thick insulating layer 85A of the insulating layer 854 is embedded in the first recess 201CA. More specifically, the thick insulating layer 85A of the insulating layer 854 is embedded in a recess space formed by the first side surface portion 85CB and the first curved portion 85CC of the thin insulating layer 85B of the insulating layer 854. In this way, it can be said that the insulating layer 854 is embedded in the first recess 201CA.

[0298] [Second electrode plate] The configuration of the second electrode plate 202 will be described with reference to Figures 31 and 33. Figure 33 shows an enlarged cross-sectional structure of the second electrode plate 202 and its surrounding area in Figure 31.

[0299] 31 and 33, a through hole 211 is provided in the insulating layer 857. A second electrode plate 202 is embedded in the through hole 211. Because the through-hole 211 penetrates the insulating layer 857 in the Z direction, the thick insulating layer 85A of the insulating layer 856 is exposed. Therefore, the second electrode plate 202 embedded in the through-hole 211 contacts the thick insulating layer 85A of the insulating layer 856. In one example, the through-hole 211 is tapered from the upper surface 857S to the lower surface 857R of the insulating layer 857. The angle θ8 of the side surface 857D of the insulating layer 857 that constitutes the through-hole 211 is equal to or greater than 80° and equal to or less than 90°. In one example, the angle θ8 is 85°. Here, the angle θ8 can be defined as the angle between the lower surface 857R and the side surface 857D of the insulating layer 857.

[0300] The second electrode plate 202 includes a second electrode upper surface 202S, a second electrode lower surface 202R, and a second electrode side surface 202A. The second electrode upper surface 202S is disposed on the second electrode plate 202 closer to the insulating upper surface 84S of the insulator 84. The second electrode lower surface 202R forms the surface opposite to the second electrode upper surface 202S. The second electrode lower surface 202R is disposed on the second electrode plate 202 closer to the insulating lower surface 84R of the insulator 84. The second electrode side surface 202A is provided between the second electrode upper surface 202S and the second electrode lower surface 202R in the Z direction.

[0301] In the fourth embodiment, the second electrode upper surface 202S is located at the same position in the Z direction as the upper surface 857S of the insulating layer 857. The position of the second electrode upper surface 202S in the Z direction can be changed arbitrarily. For example, the second electrode upper surface 202S may be located closer to the lower surface 857R of the insulating layer 857 than the upper surface 857S of the insulating layer 857 in the Z direction. The second electrode plate 202 embedded in the through-hole 211 has a tapered shape in which the second electrode side surface 202A is inclined so as to taper from the second electrode upper surface 202S toward the second electrode lower surface 202R. In other words, the opposing second electrode side surfaces 202A are inclined so as to approach each other from the second electrode upper surface 202S toward the second electrode lower surface 202R.

[0302] The second electrode plate 202 includes a seed layer 202P and a plating layer 202Q provided on the seed layer 202P. The seed layer 202P is provided on the side surface of the through hole 211 (side surface 857D of the insulating layer 857) and on the upper surface of the insulating layer 856 exposed by the through hole 211. Therefore, both the second electrode lower surface 202R and the second electrode side surface 202A are formed by the seed layer 202P. The second electrode upper surface 202S is formed by the plating layer 202Q. In one example, the seed layer 202P has the same configuration as the seed layer 45B shown in FIG. 13, and the plating layer 202Q has the same configuration as the plating layer 46B shown in FIG. 13.

[0303] As shown in FIG. 33, the second electrode plate 202 includes a second electrode corner portion 202C between the second electrode side surface 202A and the second electrode upper surface 202S. A second recess 202CA is provided in the second electrode corner portion 202C. The second recess 202CA includes a second curved surface 202CP. The second recess 202CA is recessed so as to be convex toward the inside of the second electrode plate 202. The cross-sectional shape of the second curved surface 202CP in the cross-sectional view shown in FIG. 34 is an arc. The second recess 202CA is arc-shaped, with a second center of curvature CE2 being the intersection of a third imaginary line LE3 along the second electrode upper surface 202S and a fourth imaginary line LE4 along the second electrode side surface 202A. The second center of curvature CE2 is located outward from the second electrode plate 202. The second recess 202CA is provided over both the seed layer 202P and the plating layer 202Q. In one example, the second recess 202CA is provided over the entire periphery of the second electrode plate 202 in a plan view.

[0304] In one example, the arc length of the cross-sectional shape of second curved surface 202CP is equal to the arc length of the cross-sectional shape of first curved surface 201CP shown in Fig. 32. It can also be said that the radius of curvature of second curved surface 202CP is equal to the radius of curvature of first curved surface 201CP. The radius of curvature of second curved surface 202CP is, for example, 1 µm.

[0305] The thick insulating layer 85A of the insulating layer 857 includes a second exposed side surface 85AB exposed from the second electrode side surface 202A of the second electrode plate 202 by the second recess 202CA. The second exposed side surface 85AB is a portion of the side surface 857D of the insulating layer 857 between the upper edge of the second electrode side surface 202A and the upper surface 857S of the insulating layer 857. The second exposed side surface 85AB faces the second curved surface 202CP of the second recess 202CA in a direction perpendicular to the Z direction. In one example, the length of the second exposed side surface 85AB is equal to the radius of curvature of the second curved surface 202CP. Here, the length of the second exposed side surface 85AB can be defined as the distance between the upper edge of the second electrode side surface 202A and the upper surface 857S of the insulating layer 857.

[0306] The second electrode plate 202 is covered by the thin insulating layer 85B of the uppermost insulating layer 85U. The portion of the thin insulating layer 85B of the uppermost insulating layer 85U corresponding to the second electrode plate 202 includes a second upper surface portion 85DA, a second side surface portion 85DB, a second curved portion 85DC, and a second electrode upper surface portion 85KD. The second upper surface portion 85DA, the second side surface portion 85DB, the second curved portion 85DC, and the second electrode upper surface portion 85KD are integrated. The second upper surface portion 85DA contacts the upper surface 857S of the insulating layer 857, as in the first embodiment. The second side surface portion 85DB contacts along the second exposed side surface 85AB, as in the first embodiment. The second side surface portion 85DB is connected to the second upper surface portion 85DA. The second curved portion 85DC contacts the second curved surface 202CP, as in the first embodiment. The second curved portion 85DC is connected to the second side surface portion 85DB. The second electrode upper surface portion 85KD covers the second electrode upper surface 202S of the second electrode plate 202. The second electrode upper surface portion 85KD is in contact with the second electrode upper surface 202S. The second electrode upper surface portion 85KD is connected to the second curved portion 85DC.

[0307] The thick insulating layer 85A of the uppermost insulating layer 85U is embedded in the second recess 202CA. More specifically, the thick insulating layer 85A of the uppermost insulating layer 85U is embedded in the recess space formed by the second side surface portion 85DB and the second curved portion 85DC of the thin insulating layer 85B of the uppermost insulating layer 85U. In this way, it can be said that the uppermost insulating layer 85U is embedded in the second recess 202CA. According to the fourth embodiment, the same effects as those of the first embodiment can be obtained.

[0308] <Example of change> The above-described embodiments can be modified, for example, as follows: The above-described embodiments and the following modified examples can be combined with each other as long as no technical contradiction occurs. In the following modified examples, parts common to the above-described embodiments are designated by the same reference numerals as the above-described embodiments, and their description will be omitted.

[0309] The first to third embodiments can be combined with each other. The fourth embodiment can be combined with the second and third embodiments. In the second and third embodiments, the first recess 43 may be omitted from the first coil 41 of the first conductor 51 .

[0310] In the second and third embodiments, the first inner recess 57AA may be omitted from the first inner end wiring 51A of the first conductor 51. In the second and third embodiments, the first outer recess may be omitted from the first outer end wiring 51B of the first conductor 51.

[0311] In the second and third embodiments, the second recess 44 may be omitted from the second coil 42 of the second conductor 52 . In the second and third embodiments, the second inner recess may be omitted from the second inner end wiring 52A of the second conductor 52.

[0312] In the second and third embodiments, the second outer recess may be omitted from the second outer end wiring 52B of the second conductor 52. In the first to third embodiments, the shape of the second recess 44 in the second coil 42 of the second conductor 52 can be changed as desired. The cross-sectional shape of the second curved surface 44P of the second recess 44 may be a shape other than an arc. In one example, as shown in FIG. 34 , the second recess 44 includes a second inclined surface 44Q. More specifically, the second inner recess 44A includes a second inner inclined surface 44QA. The second outer recess 44B includes a second outer inclined surface 44QB. The second inner inclined surface 44QA connects the second inner side surface 42AA and the second top surface 42S. The second outer inclined surface 44QB connects the second outer side surface 42AB and the second top surface 42S. The second inner inclined surface 44QA is inclined upward from the second inner side surface 42AA toward the second top surface 42S. The second outer inclined surface 44QB is inclined upward from the second outer side surface 42AB toward the second upper surface 42S.

[0313] The thin insulating layer 85B of the uppermost insulating layer 85U covers the second inclined surface 44Q. More specifically, the thin insulating layer 85B of the uppermost insulating layer 85U covers both the second inner inclined surface 44QA and the second outer inclined surface 44QB. This thin insulating layer 85B includes a portion that contacts the second inner inclined surface 44QA and extends along the second inner inclined surface 44QA, and a portion that contacts the second outer inclined surface 44QB and extends along the second outer inclined surface 44QB. The thick insulating layer 85A of the uppermost insulating layer 85U is embedded in the second recess 44. More specifically, the thick insulating layer 85A of the uppermost insulating layer 85U is embedded in both the second inner recess 44A and the second outer recess 44B.

[0314] In the first to third embodiments, the shape of the first recess 43 in the first coil 41 of the first conductor 51 can be changed as desired. The cross-sectional shape of the first curved surface 43P of the first recess 43 may be a shape other than an arc. In one example, as shown in FIG. 35 , the first recess 43 includes a first inclined surface 43Q. More specifically, the first inner recess 43A includes a first inner inclined surface 43QA. The first outer recess 43B includes a first outer inclined surface 43QB. The first inner inclined surface 43QA connects the first inner side surface 41AA and the first upper surface 41S. The first outer inclined surface 43QB connects the first outer side surface 41AB and the first upper surface 41S. The first inner inclined surface 43QA is inclined upward from the first inner side surface 41AA toward the first upper surface 41S. The first outer inclined surface 43QB is inclined upward from the first outer side surface 41AB toward the first upper surface 41S.

[0315] The thin insulating layer 85B of the insulating layer 854 covers the first inclined surface 43Q. More specifically, the thin insulating layer 85B of the insulating layer 854 covers both the first inner inclined surface 43QA and the first outer inclined surface 43QB. The thin insulating layer 85B includes a portion that contacts the first inner inclined surface 43QA and extends along the first inner inclined surface 43QA, and a portion that contacts the first outer inclined surface 43QB and extends along the first outer inclined surface 43QB. The thick insulating layer 85A of the insulating layer 854 is embedded in the first recess 43. More specifically, the thick insulating layer 85A of the insulating layer 854 is embedded in both the first inner recess 43A and the first outer recess 43B.

[0316] The configuration of the second recess 44 shown in FIG. 34 may be applied to at least one of the second inner end wiring 52A and the second outer end wiring 52B. The configuration of the second recess 44 shown in FIG. 34 may be applied to at least one of the second layer wiring 63A of the first connection wiring 60A and the second layer wiring 63B of the second connection wiring 60B.

[0317] The configuration of the second recess 44 shown in FIG. 34 may be applied to the second seal portion 95 of the seal portion 93. The configuration of the second recess 44 shown in FIG.

[0318] The configuration of the second recess 44 shown in FIG. 34 may be applied to the second electrode plate 202 of the third embodiment. The configuration of the first recess 43 shown in FIG. 35 may be applied to at least one of the first inner end wiring 51A and the first outer end wiring 51B.

[0319] The configuration of the first recess 43 shown in FIG. 35 may be applied to at least one of the first layer wiring 62A of the first connection wiring 60A and the first layer wiring 62B of the second connection wiring 60B. The configuration of the first recess 43 shown in FIG. 35 may be applied to the first seal portion 94 of the seal portion 93.

[0320] The configuration of the first recess 43 shown in FIG. 35 may be applied to the first electrode plate 201 of the third embodiment. In the first to third embodiments, the arc length of the cross-sectional shape of the first inner curved surface 43PA of the first inner recess 43A of the first recess 43 of the first coil 41 may be different from the arc length of the cross-sectional shape of the first outer curved surface 43PB of the first outer recess 43B. In one example, the arc length of the cross-sectional shape of the first inner curved surface 43PA may be longer than the arc length of the cross-sectional shape of the first outer curved surface 43PB of the first outer recess 43B. In another example, the arc length of the cross-sectional shape of the first outer curved surface 43PB of the first outer recess 43B may be longer than the arc length of the cross-sectional shape of the first inner curved surface 43PA.

[0321] In the first to third embodiments, the arc length of the cross-sectional shape of the second inner curved surface 44PA of the second inner recess 44A of the second recess 44 of the second coil 42 may be different from the arc length of the cross-sectional shape of the second outer curved surface 44PB of the second outer recess 44B. In one example, the arc length of the cross-sectional shape of the second inner curved surface 44PA may be longer than the arc length of the cross-sectional shape of the second outer curved surface 44PB of the second outer recess 44B. In another example, the arc length of the cross-sectional shape of the second outer curved surface 44PB of the second outer recess 44B may be longer than the arc length of the cross-sectional shape of the second inner curved surface 44PA.

[0322] In the first to third embodiments, the arc length of the cross-sectional shape of the first curved surface 43P may be different from the arc length of the cross-sectional shape of the second curved surface 44P. In one example, the arc length of the cross-sectional shape of the first curved surface 43P may be longer than the arc length of the cross-sectional shape of the second curved surface 44P. In another example, the arc length of the cross-sectional shape of the second curved surface 44P may be longer than the arc length of the cross-sectional shape of the first curved surface 43P.

[0323] In the first to third embodiments, the arc length of the cross-sectional shape of the third curved surface 62AP may be different from the arc length of the cross-sectional shape of the first curved surface 43P. In one example, the arc length of the cross-sectional shape of the third curved surface 62AP may be longer than the arc length of the cross-sectional shape of the first curved surface 43P. In another example, the arc length of the cross-sectional shape of the first curved surface 43P may be longer than the arc length of the cross-sectional shape of the third curved surface 62AP. The arc length of the cross-sectional shape of the third curved surface 62AP may be different from the arc length of the cross-sectional shape of the second curved surface 44P. In one example, the arc length of the cross-sectional shape of the third curved surface 62AP may be longer than the arc length of the cross-sectional shape of the second curved surface 44P. In another example, the arc length of the cross-sectional shape of the second curved surface 44P may be longer than the arc length of the cross-sectional shape of the third curved surface 62AP.

[0324] In the first to third embodiments, the arc length of the cross-sectional shape of the fourth curved surface 63AP may be different from the arc length of the cross-sectional shape of the second curved surface 44P. In one example, the arc length of the cross-sectional shape of the fourth curved surface 63AP may be longer than the arc length of the cross-sectional shape of the second curved surface 44P. In another example, the arc length of the cross-sectional shape of the second curved surface 44P may be longer than the arc length of the cross-sectional shape of the fourth curved surface 63AP. The arc length of the cross-sectional shape of the fourth curved surface 63AP may be different from the arc length of the cross-sectional shape of the first curved surface 43P. In one example, the arc length of the cross-sectional shape of the fourth curved surface 63AP may be longer than the arc length of the cross-sectional shape of the first curved surface 43P. In another example, the arc length of the cross-sectional shape of the first curved surface 43P may be longer than the arc length of the cross-sectional shape of the fourth curved surface 63AP.

[0325] In the first to third embodiments, the arc length of the cross-sectional shape of the fifth curved surface 94CP may be different from the arc length of the cross-sectional shape of the first curved surface 43P. In one example, the arc length of the cross-sectional shape of the fifth curved surface 94CP may be longer than the arc length of the cross-sectional shape of the first curved surface 43P. In another example, the arc length of the cross-sectional shape of the first curved surface 43P may be longer than the arc length of the cross-sectional shape of the fifth curved surface 94CP. The arc length of the cross-sectional shape of the fifth curved surface 94CP may be different from the arc length of the cross-sectional shape of the second curved surface 44P. In one example, the arc length of the cross-sectional shape of the fifth curved surface 94CP may be longer than the arc length of the cross-sectional shape of the second curved surface 44P. In another example, the arc length of the cross-sectional shape of the second curved surface 44P may be longer than the arc length of the cross-sectional shape of the fifth curved surface 94CP.

[0326] In the first to third embodiments, the arc length of the cross-sectional shape of the sixth curved surface 95CP may be different from the arc length of the cross-sectional shape of the second curved surface 44P. In one example, the arc length of the cross-sectional shape of the sixth curved surface 95CP may be longer than the arc length of the cross-sectional shape of the second curved surface 44P. In another example, the arc length of the cross-sectional shape of the second curved surface 44P may be longer than the arc length of the cross-sectional shape of the sixth curved surface 95CP. The arc length of the cross-sectional shape of the sixth curved surface 95CP may be different from the arc length of the cross-sectional shape of the first curved surface 43P. In one example, the arc length of the cross-sectional shape of the sixth curved surface 95CP may be longer than the arc length of the cross-sectional shape of the first curved surface 43P. In another example, the arc length of the cross-sectional shape of the first curved surface 43P may be longer than the arc length of the cross-sectional shape of the sixth curved surface 95CP.

[0327] In the first to third embodiments, one of the first inner recess 43A and the first outer recess 43B of the first recess 43 in the first coil 41 may be omitted. In the first to third embodiments, one of the second inner recess 44A and the second outer recess 44B of the second recess 44 in the second coil 42 may be omitted.

[0328] In the first to third embodiments, the configuration of the first coil 41 is not limited to the seed layer 45A and the plating layer 46A, and can be changed as desired. For example, the first coil 41 may be formed of a metal body embedded in the first groove 86A. The metal body may be formed of a material containing at least one of Cu and Al, for example.

[0329] In the first to third embodiments, the configuration of the second coil 42 is not limited to the seed layer 45B and the plating layer 46B, and can be changed as desired. In one example, the second coil 42 may be formed of a metal body embedded in the second groove 86B. The metal body may be formed of a material containing at least one of Cu and Al, for example.

[0330] In the first to third embodiments, the formation range of the first recesses 43 can be changed as desired. For example, the first recesses 43 may be provided in the pair of first curved portions 41E instead of the pair of first straight portions 41D. In other words, the first recesses 43 may be provided spaced apart in the direction in which the coil wiring 41P of the first coil 41 extends in a plan view.

[0331] In the first to third embodiments, the formation range of the second recesses 44 can be changed as desired. In one example, the second recesses 44 may be provided in the pair of second curved portions 42E instead of the pair of second straight portions 42D. In other words, the second recesses 44 may be provided spaced apart in the direction in which the coil wiring 41Q of the second coil 42 extends in a plan view.

[0332] In the first to third embodiments, the shape of the first coil 41 in plan view can be changed as desired. In one example, the first coil 41 may have a circular or elliptical spiral shape in plan view. In another example, the first coil 41 may have a rectangular spiral shape in plan view.

[0333] In the first to third embodiments, the shape of the second coil 42 in a plan view can be changed as desired. In one example, the second coil 42 may have a circular or elliptical spiral shape in a plan view. In another example, the second coil 42 may have a rectangular spiral shape in a plan view.

[0334] In the first to third embodiments, the configuration of the insulating chip 80 can be changed arbitrarily. For example, as shown in FIG. 36, the insulating chip 80 may include two pairs of transformers 40A, 40B. The insulating chip 80 includes a plurality of first electrode pads 81 and a plurality of second electrode pads 82 corresponding to the two pairs of transformers 40A, 40B. The transformers 40A, 40B of each pair have the same configuration as the transformers 40A, 40B of the first to third embodiments. Note that a similar change may be made in the fourth embodiment.

[0335] In the fourth embodiment, the arc length of the cross-sectional shape of the first curved surface 201CP may be different from the arc length of the cross-sectional shape of the second curved surface 202CP. In one example, the arc length of the cross-sectional shape of the second curved surface 202CP may be longer than the arc length of the cross-sectional shape of the first curved surface 201CP. In another example, the arc length of the cross-sectional shape of the first curved surface 201CP may be longer than the arc length of the cross-sectional shape of the second curved surface 202CP.

[0336] In the dummy patterns 55 of each embodiment, the recesses 55Q may be omitted from the first dummy patterns 551. In the dummy pattern 55 of each embodiment, the recess 55Q may be omitted from the second dummy pattern 552.

[0337] In the dummy patterns 55 of each embodiment, the recesses 55Q may be omitted from the third dummy patterns 553. In each embodiment, the dummy pattern 55 may be omitted from the insulating chip 80.

[0338] In each embodiment, the configuration of the uppermost insulating layer 85U of the multiple insulating layers 85 can be changed as desired. In one example, the thin insulating layer 85B may be omitted from the uppermost insulating layer 85U. In this case, the uppermost insulating layer 85U is composed of the thick insulating layer 85A.

[0339] In each embodiment, the shape of the sealing portion 93 in plan view is not limited to a rectangular frame shape and can be changed as desired. For example, the four corners of the sealing portion 93 in plan view may be curved.

[0340] In the first, second, and fourth embodiments, the seal portion 93 may be omitted from the insulating tip 80. In each embodiment, at least one of the passivation film 91 and the resin layer 92 may be omitted from the insulating chip 80.

[0341] [Example of changing the through wiring of connection wiring] In each embodiment, the configuration of the through wirings 64A, 64B of the connection wiring 60 can be changed arbitrarily. Examples include a first modified example shown in FIGS. 37 to 39 and a second modified example shown in FIGS. 40 and 41. The configuration of the through wiring 64A is the same as the configuration of the through wiring 64B. Therefore, the following description will focus on the through wiring 64A, and a description of the through wiring 64B will be omitted.

[0342] (First modified example) The through wiring 64A of the first modified example will be described with reference to FIGS. Fig. 37 schematically shows the cross-sectional structure of insulating chip 80. Fig. 38 shows an enlarged cross-sectional structure of through wiring 64A and its surroundings in insulating chip 80 shown in Fig. 37. Fig. 39 shows an enlarged cross-sectional structure of a portion of first via 70A and second via 70B (described later) of through wiring 64A and their surroundings.

[0343] 37, an insulating chip 80 including a through wiring 64A of a first modified example differs from the first to fourth embodiments in the number of insulating layers 85 of an insulator 84. The insulating layers 85 include insulating layers 851 to 859. As a result, the second conductor 52 and the second-layer wiring 63A are provided on the insulating layers 859.

[0344] Each through wiring 64A includes a first via 70A and a second via 70B provided on the first via 70A. More specifically, the insulator 84 is provided with a first through hole 88A corresponding to the first via 70A and a second through hole 88B corresponding to the second via 70B. The first through hole 88A and the second through hole 88B are in communication with each other. The first via 70A is embedded in the first through hole 88A. The second via 70B is embedded in the second through hole 88B.

[0345] The first through hole 88A penetrates the plurality of thick insulating layers 85A and the plurality of thin insulating layers 85B. Therefore, the first via 70A embedded in the first through hole 88A penetrates the plurality of thick insulating layers 85A and the plurality of thin insulating layers 85B.

[0346] In the first modified example, the first through hole 88A penetrates three insulating layers 85. Specifically, the first through hole 88A penetrates insulating layers 854 to 856. Therefore, the first through hole 88A exposes the first-layer wiring 62A provided in the insulating layer 853. As a result, the first via 70A embedded in the first through hole 88A penetrates the insulating layers 854 to 856 and is in contact with the first-layer wiring 62A.

[0347] As shown in FIG. 38 , the insulating layer 856 includes a side surface 856A that defines the first through hole 88A. The side surface 856A is inclined such that the opening area of ​​the first through hole 88A in a plan view decreases from the upper surface 856S of the insulating layer 856 toward the lower surface 856R of the insulating layer 856. The angle θA of the side surface 856A is equal to or greater than 70° and equal to or less than 90°. In one example, the angle θA is 80°. Here, the angle θA can be defined as the angle between the lower surface 856R of the insulating layer 856 and the side surface 856A. Note that, as indicated by the range of the angle θA, the side surface 856A may be a surface that extends along the Z direction. In other words, the side surface 856A does not have to be inclined.

[0348] The first via 70A has a circular shape in a plan view. In a first modified example, the first via 70A has a truncated cone shape. The first via 70A includes a first via upper surface 71A, a first via lower surface 72A, and a first via side surface 73A.

[0349] The first via upper surface 71A is disposed closer to the insulating upper surface 84S (see FIG. 37) of the insulator 84. In one example, the first via upper surface 71A is circular in a plan view. The first via lower surface 72A is a surface on the opposite side of the first via upper surface 71A in the Z direction. In one example, the first via lower surface 72A is circular in a plan view. The first via lower surface 72A is in contact with the first-layer wiring 62A. The first via side surface 73A is provided between the first via upper surface 71A and the first via lower surface 72A in the Z direction. The first via side surface 73A is tapered, tapering from the first via upper surface 71A toward the first via lower surface 72A. Note that when the side surface 856A is a surface along the Z direction, the first via 70A is cylindrical. In this case, the first via side surface 73A is a surface along the Z direction.

[0350] In the first modified example, the first via upper surface 71A is located at the same position in the Z direction as the upper surface 856S of the insulating layer 856. Here, the upper surface 856S of the insulating layer 856 is formed by the upper surface of the thick insulating layer 85A of the insulating layer 856. The upper surface 856S of the insulating layer 856 can also be said to be the boundary between the thick insulating layer 85A of the insulating layer 856 and the thin insulating layer 85B of the insulating layer 857. The position of the first via upper surface 71A in the Z direction can be changed arbitrarily. In one example, the first via upper surface 71A may be located closer to the lower surface 856R of the insulating layer 856 than the upper surface 856S of the insulating layer 856 in the Z direction.

[0351] The first via side surface 73A is in contact with the insulating layers 854 to 856. More specifically, the first via side surface 73A is in contact with both the thick insulating layer 85A and the thin insulating layer 85B of the insulating layers 854 and 855. The first via side surface 73A is in contact with the thick insulating layer 85A of the insulating layer 856, but is not in contact with the thin insulating layer 85B of the insulating layer 856. The first via side surface 73A is provided along the side surface 856A of the insulating layer 856 (the side surface constituting the first through hole 88A). Here, the insulating layer 856 is an example of a "first via insulating layer." The insulating layer 857 stacked on the insulating layer 856, which becomes the first insulating layer, is an example of a "second via insulating layer."

[0352] The first via 70A includes a seed layer 76A and a plating layer 77A provided on the seed layer 76A. The seed layer 76A is provided on the side surface (side surface 856A of the insulating layer 856) of the first through hole 88A and on the upper surface of the first-layer wiring 62A exposed by the first through hole 88A. Therefore, both the first via lower surface 72A and the first via side surface 73A are formed by the seed layer 76A. The first via upper surface 71A is formed by the plating layer 77A. The seed layer 76A is a sputtered film formed by sputtering, for example. The seed layer 76A may have a laminated structure of, for example, a Ti film and a Cu film. The plating layer 77A is formed by a material containing, for example, Cu.

[0353] The first via 70A includes a first corner portion 74A provided between the first via upper surface 71A and the first via side surface 73A. A recess 75 is provided in the first corner portion 74A. The first via upper surface 71A and the first via side surface 73A are connected by the recess 75. The recess 75 is provided around the entire periphery of the first via 70A in a planar view. Therefore, the recess 75 has an annular shape in a planar view. The recess 75 is provided in both the seed layer 76A and the plating layer 77A.

[0354] By providing the recess 75 in the first via 70A, the first via upper surface 71A is smaller than the first via lower surface 72A. That is, the area of ​​the first via upper surface 71A is smaller than the area of ​​the first via lower surface 72A. In the first modified example, the diameter of the first via upper surface 71A is smaller than the diameter of the first via lower surface 72A.

[0355] As shown in FIG. 39, the recess 75 includes a curved surface 78 that is recessed so as to be convex toward the inside of the first via 70A. In the cross-sectional view shown in FIG. 39, the curved surface 78 has an arc shape centered on a center of curvature CP. The center of curvature CP is located outward from the first via 70A. In one example, the center of curvature CP is located at the same position as the first via upper surface 71A in the Z direction. In one example, the center of curvature CP can be defined by the intersection of an imaginary line along the side surface 856A of the insulating layer 856 and an imaginary line along the upper surface 856S of the insulating layer 856. Because the first via side surface 73A is inclined with respect to the Z direction, the distance DA between the center of curvature CP and the first via upper surface 71A is slightly larger than the distance DB between the center of curvature CP and the first via side surface 73A in the Z direction. The distance DA can be considered to be the radius of curvature from the center of curvature CP to the curved surface 78. The distances DA and DB are smaller than the thickness TA of the thick insulating layer 85A (see FIG. 38). The distances DA and DB are greater than the thickness TB of the thin insulating layer 85B. The distances DA and DB are greater than twice the thickness TB of the thin insulating layer 85B. In one example, the distances DA and DB are equal to or less than the radius of the first via upper surface 71A. In one example, the distances DA and DB are 1 μm. The distances DA and DB can be changed as desired.

[0356] 38, the second through hole 88B penetrates the plurality of thick insulating layers 85A and the plurality of thin insulating layers 85B. In the first modified example, the second through hole 88B penetrates two insulating layers 85. Specifically, the second through hole 88B penetrates the insulating layers 857 and 858. Therefore, the second through hole 88B exposes the first via upper surface 71A of the first via 70A. As a result, the second via 70B embedded in the second through hole 88B penetrates the insulating layers 857 and 858 and contacts the first via upper surface 71A.

[0357] The insulating layer 857 includes a side surface 857A that defines the second through hole 88B. The side surface 857A is inclined so that the opening area of ​​the second through hole 88B in a plan view decreases from the upper surface 857S of the insulating layer 857 toward the lower surface 857R of the insulating layer 857. The angle θB of the side surface 857A is equal to or greater than 70° and equal to or less than 90°. In one example, the angle θB is 80°. Here, the angle θB can be defined as the angle between the lower surface 857R of the insulating layer 857 and the side surface 857A. Note that, as indicated by the range of the angle θB, the side surface 857A may be a surface that extends along the Z direction. In other words, the side surface 857A does not have to be inclined.

[0358] The second via 70B embedded in the second through hole 88B penetrates the insulating layers 857 and 858. Therefore, the dimension in the Z direction of the second via 70B is smaller than the dimension in the Z direction of the first via 70A that penetrates the insulating layers 854-856.

[0359] The second via 70B has a circular shape in a plan view. In a first modified example, the second via 70B has a truncated cone shape. The second via 70B includes a second via upper surface 71B, a second via lower surface 72B, and a second via side surface 73B.

[0360] The second via upper surface 71B is disposed closer to the insulating upper surface 84S (see FIG. 37) of the insulator 84. The second via upper surface 71B is in contact with the lower surface of the second-layer wiring 63A. In one example, the second via upper surface 71B is circular in plan view. The second via lower surface 72B is the surface opposite to the second via upper surface 71B in the Z direction. In one example, the second via lower surface 72B is circular in plan view. The second via lower surface 72B is smaller than the second via upper surface 71B. In other words, the area of ​​the second via lower surface 72B is smaller than the area of ​​the second via upper surface 71B. It can also be said that the diameter of the second via lower surface 72B is smaller than the diameter of the second via upper surface 71B. The second via side surface 73B is provided between the second via upper surface 71B and the second via lower surface 72B in the Z direction. The second via side surface 73B is tapered from the second via upper surface 71B to the second via lower surface 72B. When the side surface 857A is a surface along the Z direction, the second via 70B is cylindrical. In this case, the second via side surface 73B is a surface along the Z direction.

[0361] The second via lower surface 72B is in contact with the first via upper surface 71A of the first via 70A. In a first modified example, the second via lower surface 72B is located at the same position in the Z direction as the upper surface 856S of the insulating layer 856. The position of the second via lower surface 72B in the Z direction can be changed as desired depending on the position of the first via upper surface 71A. In one example, the second via lower surface 72B may be located closer to the lower surface 856R of the insulating layer 856 than the upper surface 856S of the insulating layer 856 in the Z direction.

[0362] The second via lower surface 72B is larger than the first via upper surface 71A. In other words, the area of ​​the second via lower surface 72B is larger than the area of ​​the first via upper surface 71A. It can be said that the diameter of the second via lower surface 72B is larger than the diameter of the first via upper surface 71A. Therefore, the second via lower surface 72B includes an extension portion 79 that protrudes from the first via upper surface 71A in a planar view. In one example, the extension portion 79 is annular in a planar view. In other words, the extension portion 79 is provided so as to surround the entire circumference of the first via upper surface 71A in a planar view.

[0363] As shown in FIG. 39 , the protrusion length HA of the extension portion 79 is smaller than the distance DC between the side surface 856A of the insulating layer 856 and the second via lower surface 72B in a plan view at the same position as the upper surface 856S of the insulating layer 856 in the Z direction. The protrusion length HA of the extension portion 79 is also smaller than the distance DA between the center of curvature CP of the recess 75 of the first via 70A and the first via upper surface 71A. The protrusion length HA of the extension portion 79 is also smaller than the distance DB between the center of curvature CP of the recess 75 of the first via 70A and the first via side surface 73A in the Z direction. In one example, the protrusion length HA of the extension portion 79 is larger than the thickness TB of the thin insulating layer 85B of the insulating layer 857. In one example, the protrusion length HA of the extension portion 79 is smaller than the thickness TA of the thick insulating layer 85A of the insulating layer 856. Here, the protruding length HA of the extension portion 79 can be defined as, for example, half the difference between the diameter of the second via lower surface 72B and the diameter of the first via upper surface 71A.

[0364] 38, the second via side surface 73B is in contact with the insulating layers 857 and 858. More specifically, the second via side surface 73B is in contact with both the thick insulating layer 85A and the thin insulating layer 85B of the insulating layer 858. The second via side surface 73B is in contact with the thick insulating layer 85A of the insulating layer 857, but is not in contact with the thin insulating layer 85B of the insulating layer 857.

[0365] The second via 70B includes a seed layer 76B and a plating layer 77B provided on the seed layer 76B. The seed layer 76B is provided on the side surface of the second through hole 88B and on the first via upper surface 71A exposed by the second through hole 88B. Therefore, both the second via lower surface 72B and the second via side surface 73B are formed by the seed layer 76B. The second via upper surface 71B is formed by the plating layer 77B. The seed layer 76B is a sputtered film formed by sputtering, for example. The seed layer 76B may have a laminated structure of, for example, a Ti film and a Cu film. The plating layer 77B is formed by a material containing, for example, Cu.

[0366] The second via 70B includes a second corner portion 74B defined by a second via lower surface 72B and a second via side surface 73B. The second corner portion 74B includes an extending portion 79. The second via lower surface 72B is located at the same position as the upper surface 856S of the insulating layer 856 in the Z direction. Therefore, the second corner portion 74B includes a portion located closer to the insulating layer 857 than the upper surface 856S of the insulating layer 856 in the Z direction.

[0367] As shown in FIG. 39 , the thick insulating layer 85A of the insulating layer 856 includes an exposed side surface 85AG exposed from the first via side surface 73A of the first via 70A by the recess 75. The exposed side surface 85AG is a portion of the side surface 856A of the insulating layer 856 between the upper edge of the first via side surface 73A and the upper surface 856S of the insulating layer 856. The exposed side surface 85AG faces the curved surface 78 of the recess 75 in a direction perpendicular to the Z direction. In one example, the length of the exposed side surface 85AG is equal to the radius of curvature of the curved surface 78. Here, the length of the exposed side surface 85AG can be defined by the distance between the upper edge of the first via side surface 73A and the upper surface 856S of the insulating layer 856.

[0368] The thin insulating layer 85B of the insulating layer 857 includes an upper surface portion 85LA, a side surface portion 85LB, and a curved portion 85LC. The upper surface portion 85LA, the side surface portion 85LB, and the curved portion 85LC are integrated together.

[0369] The top surface portion 85LA is laminated on the top surface 856S of the insulating layer 856. The top surface portion 85LA faces the second corner portion 74B of the second via 70B in a direction perpendicular to the Z direction. In one example, the top surface portion 85LA is provided so as to surround the second corner portion 74B in a plan view. The top surface portion 85LA is disposed at a distance from the second corner portion 74B in the direction perpendicular to the Z direction.

[0370] The side surface portion 85LB is provided along the exposed side surface 85AG. The side surface portion 85LB includes a first portion facing the second corner portion 74B of the second via 70B in a direction perpendicular to the Z direction. The side surface portion 85LB includes a second portion that is closer to the lower surface 856R (see FIG. 38) of the insulating layer 856 than the second via 70B in the Z direction. The second portion is provided within the recess 75 in a direction perpendicular to the Z direction.

[0371] The curved portion 85LC is provided along the curved surface 78 of the recess 75. The curved portion 85LC is provided inside the recess 75. The curved portion 85LC contacts a portion of the second via lower surface 72B that is more inward than the second via side surface 73B. An end face 85LD of the curved portion 85LC contacts a portion that is spaced from the outer edge of the second via lower surface 72B.

[0372] The thick insulating layer 85A of the insulating layer 857 is embedded in the recess 75. More specifically, the thick insulating layer 85A of the insulating layer 857 is embedded in a recess space formed by the side portion 85LB and the curved portion 85LC of the thin insulating layer 85B of the insulating layer 857. Therefore, the thick insulating layer 85A of the insulating layer 857 is interposed between the top surface portion 85LA of the thin insulating layer 85B of the insulating layer 857 and the second corner portion 74B of the second via 70B. In this way, it can be said that the insulating layer 857 is embedded in the recess 75.

[0373] The thick insulating layer 85A of the insulating layer 857 contacts the second corner portion 74B of the second via 70B. It can be said that the thick insulating layer 85A of the insulating layer 857 covers the second corner portion 74B. More specifically, the thick insulating layer 85A of the insulating layer 857 contacts the second via side surface 73B and the second via lower surface 72B that constitute the second corner portion 74B. It can be said that the thick insulating layer 85A of the insulating layer 857 contacts the outer edge of the second via lower surface 72B and the second via side surface 73B that continues from this outer edge. The thick insulating layer 85A of the insulating layer 857 contacts the portion of the second via lower surface 72B from the outer edge of the second via lower surface 72B to the portion where the end face 85LD of the thin insulating layer 85B contacts. Therefore, it can be said that the thick insulating layer 85A of the insulating layer 857 contacts the end of the extension portion 79. Here, the end of the extension portion 79 is a portion of the extension portion 79 that includes the outer peripheral edge of the second via lower surface 72B, and is a portion closer to the outer peripheral edge than the portion that contacts the curved portion 85LC of the thin insulating layer 85B of the insulating layer 857. In this way, the extension portion 79 contacts both the thick insulating layer 85A and the thin insulating layer 85B of the insulating layer 857.

[0374] According to the first modified example, the following effects can be obtained. (A) The second via lower surface 72B of the second via 70B includes an extension 79 that protrudes from the first via upper surface 71A in plan view. An end of the extension 79 contacts the thick insulating layer 85A of the insulating layer 857.

[0375] This configuration can alleviate stress concentration on the second via lower surface 72B of the second via 70B and suppress the occurrence of cracks in the thick insulating layer 85A caused by the thin insulating layer 85B, thereby suppressing a decrease in the withstand voltage of the insulating chip 80 caused by the cracks.

[0376] (B) The first via 70A includes a first corner portion 74A provided between the first via upper surface 71A and the first via side surface 73A. The first corner portion 74A has a recess 75. The recess 75 makes the first via upper surface 71A smaller than the second via lower surface 72B. This configuration prevents the second via 70B from becoming larger in size in a direction perpendicular to the Z direction.

[0377] (C) The recess 75 includes a curved surface 78 that is recessed so as to be convex toward the inside of the first via 70A. According to this configuration, the recess 75 creates an inverse tapered shape from the first via upper surface 71A toward the first via side surface 73A, so that stress generated in the recess 75 is applied to the inside of the first via 70A. In other words, stress is less likely to be applied to the insulating layer 857 from the recess 75. This makes it possible to prevent cracks from occurring in the insulating layers 856 and 857. In addition, even if the recess 75 is provided, it is possible to prevent the area of ​​the first via upper surface 71A from being excessively small. This makes it possible to prevent an excessive increase in the electrical resistance of the conductive path formed by the first via 70A and the second via 70B.

[0378] (D) The cross-sectional shape of the curved surface 78 is an arc. According to this configuration, the recess 75 creates an inverse tapered shape from the first via upper surface 71A toward the first via side surface 73A, so that stress generated in the recess 75 is applied to the inside of the first via 70A. In other words, stress is less likely to be applied to the insulating layer 857 from the recess 75. This makes it possible to prevent cracks from occurring in the insulating layers 856 and 857. In addition, even if the recess 75 is provided, it is possible to prevent the area of ​​the first via upper surface 71A from being excessively small. This makes it possible to prevent an excessive increase in the electrical resistance of the conductive path formed by the first via 70A and the second via 70B.

[0379] (E) The protruding length HA of the extension portion 79 is greater than the thickness TB of the thin insulating layer 85B of the insulating layer 856. The thin insulating layer 85B of the insulating layer 856 contacts a portion of the second via lower surface 72B that is more inward than the second via side surface 73B.

[0380] This configuration can prevent the thin insulating layer 85B of the insulating layer 856 from coming into contact with the connection portion between the second via bottom surface 72B and the second via side surface 73B of the second via 70B. This prevents stress from being applied to the thin insulating layer 85B due to the connection portion of the second via 70B where stress is likely to concentrate. This prevents cracks from occurring due to the thin insulating layer 85B, thereby preventing a decrease in the withstand voltage of the insulating chip 80.

[0381] (F) The thick insulating layer 85A of the insulating layer 857 contacts the outer edge of the second via lower surface 72B and the second via side surface 73B continuing from the outer edge. With this configuration, the connection portion between the second via lower surface 72B and the second via side surface 73B is covered with the thick insulating layer 85A. That is, it is possible to prevent the thin insulating layer 85B from coming into contact with the connection portion. Therefore, it is possible to prevent cracks from occurring due to the thin insulating layer 85B, and therefore it is possible to prevent a decrease in the withstand voltage of the insulating chip 80.

[0382] (G) The thick insulating layer 85A of the insulating layer 857 is embedded in the recess 75. This configuration can prevent voids from being formed in the recess 75. Therefore, it is possible to prevent cracks from occurring in the insulating layer 856 due to voids.

[0383] (H) The thick insulating layer 85A of the insulating layer 856 includes a side surface 856A that constitutes the first through hole 88A into which the first via 70A is embedded. The protruding length HA of the extension portion 79 is at the same position in the Z direction as the upper surface of the thick insulating layer 85A of the insulating layer 856 and is smaller than the distance DC between the side surface 856A and the second via lower surface 72B in a plan view.

[0384] This configuration allows a large distance to be secured between extension 79 and the portion of thin insulating layer 85B of insulating layer 856 that is stacked on thick insulating layer 85A. Therefore, thick insulating layer 85A of insulating layer 857 can be easily embedded in recess 75.

[0385] (I) The upper surface of the thick insulating layer 85A of the insulating layer 856 is at the same position as the first via upper surface 71A in the Z direction. The thin insulating layer 85B of the insulating layer 856 includes an upper surface portion 85LA laminated on the upper surface of the thick insulating layer 85A of the insulating layer 856. The upper surface portion 85LA faces a second corner portion 74B of the second via 70B, which is formed by the extension portion 79 and the second via side surface 73B. The upper surface portion 85LA is disposed apart from the second corner portion 74B. The thick insulating layer 85A of the insulating layer 857 is interposed between the upper surface portion 85LA and the second corner portion 74B.

[0386] With this configuration, thick insulating layer 85A provided between top surface portion 85LA and second corner portion 74B makes it difficult for stress from second corner portion 74B to be transmitted to top surface portion 85LA, thereby preventing top surface portion 85LA from peeling off thick insulating layer 85A of insulating layer 856.

[0387] (J) Both the first via 70A and the second via 70B are provided through the plurality of thick insulating layers 85A and the plurality of thin insulating layers 85B. Compared to a configuration in which the first via 70A penetrates one thick insulating layer 85A and one thin insulating layer 85B and a configuration in which the second via 70B penetrates one thick insulating layer 85A and one thin insulating layer 85B, the stress generated at the first corner portion 74A of the first via 70A and the second corner portion 74B of the second via 70B is greater. In other words, cracks are more likely to occur in the insulating layer 856 due to the stress. However, in the insulating chip 80 of the first modified example, the second via lower surface 72B of the second via 70B includes an extension portion 79, and the extension portion 79 contacts the thick insulating layer 85A of the insulating layer 857. This reduces stress concentration at the first corner portion 74A of the second via 70B and the second corner portion 74B of the second via 70B, thereby suppressing cracks from occurring in the insulating layer 856.

[0388] (K) The thickness dimension of the first via 70A is greater than the thickness dimension of the second via 70B. This configuration prevents the area of ​​the first via upper surface 71A from becoming excessively small even when the first via 70A has the recess 75. Therefore, the electrical resistance of the conductive paths of the first via 70A and the second via 70B can be prevented from becoming excessively large.

[0389] (Second modified example) A through wiring 64A of a second modified example will be described with reference to Figures 40 and 41. Figure 40 shows an enlarged cross-sectional structure of the through wiring 64A and its surroundings. Figure 41 shows an enlarged cross-sectional structure of a portion of the first via 70A and the second via 70B and their surroundings. Note that the through wiring 64B has the same configuration as the through wiring 64A, and therefore its description will be omitted.

[0390] As shown in Fig. 40, the first via 70A of the through wiring 64A of the second modified example does not include the recess 75 shown in Fig. 39. Therefore, the side surface 856A of the insulating layer 856 that constitutes the first through hole 88A does not include the first exposed side surface 85AA shown in Fig. 39. The thin insulating layer 85B of the insulating layer 856 does not include the side surface portion 85LB and the curved portion 85LC shown in Fig. 39.

[0391] In the second modified example, the second via lower surface 72B of the second via 70B of the through wiring 64A is larger than the first via upper surface 71A of the first via 70A. That is, the area of ​​the second via lower surface 72B is larger than the area of ​​the first via upper surface 71A. In one example, the diameter of the second via lower surface 72B is larger than the diameter of the first via upper surface 71A. Therefore, the second via lower surface 72B includes an extension portion 79 that protrudes from the first via upper surface 71A in a plan view.

[0392] In the second modified example, the first via upper surface 71A is located at the same position in the Z direction as the upper surface 856S of the insulating layer 856. Therefore, the second via lower surface 72B in contact with the first via upper surface 71A is located at the same position in the Z direction as the upper surface 856S of the insulating layer 856.

[0393] 41, the second via side surface 73B constituting the second corner portion 74B of the second via 70B is in contact with the thin insulating layer 85B of the insulating layer 857. In other words, the side surface 85LE of the thin insulating layer 85B of the insulating layer 857 is in contact with the second via side surface 73B. The extension portion 79 is in contact with the upper surface 856S of the insulating layer 856. In this way, the second corner portion 74B is in contact with both the thick insulating layer 85A and the thin insulating layer 85B of the insulating layer 857.

[0394] The second corner portion 74B includes a protrusion 74BA extending toward the first via lower surface 72A relative to the first via upper surface 71A of the first via 70A. The protrusion 74BA is annular in plan view. In the second modified example, the protrusion 74BA is annular in plan view. The extension 79 forms the lower surface of the protrusion 74BA. As shown in FIG. 41 , the protrusion 74BA is covered by the thick insulating layer 85A of the insulating layer 856. That is, the thick insulating layer 85A of the insulating layer 856 contacts the extension 79 constituting the protrusion 74BA to the second via side surface 73B. It can also be said that the end of the extension 79 contacts the thick insulating layer 85A of the insulating layer 856. Therefore, the side surface 85LE of the thin insulating layer 85B of the insulating layer 856 contacts the second via side surface 73B while being spaced apart from the extension 79 in the Z direction.

[0395] According to the second modified example, the following effects can be obtained. The second via 70B includes a second corner portion 74B that includes an extension 79 and a second via side surface 73B. The second corner portion 74B includes a protrusion 74BA that extends closer to the first via lower surface 72A than the first via upper surface 71A. The extension 79 forms the lower surface of the protrusion 74BA. A side surface 85LE of the thin insulating layer 85B of the insulating layer 856 is in contact with the second via side surface 73B while being spaced apart from the extension 79 in the Z direction.

[0396] This configuration can prevent the thin insulating layer 85B of the insulating layer 856 from coming into contact with the extending portion 79. This makes it difficult for the stress of the second corner portion 74B to be applied to the thin insulating layer 85B of the insulating layer 856. Therefore, it is possible to prevent cracks from occurring in the insulating layer 856 due to the thin insulating layer 85B.

[0397] (Other examples of through-wiring changes) In the first modified example, the configuration of the through wiring 64A (64B) can be changed arbitrarily. For example, as shown in FIG. 42, the through wiring 64A may include first to fifth vias 70P, 70Q, 70R, 70S, and 70T corresponding to the insulating layers 854 to 858. The first to fifth vias 70P to 70T have the same configuration and are similar to the first via 70A (see FIG. 39). Therefore, the first to fifth vias 70P to 70T include a common via top surface 71, a via bottom surface 72, and a via side surface 73. The fifth via 70T has a configuration in which the recess 75 is omitted from the first to fourth vias 70P to 70S. Therefore, the fifth via 70T includes a via top surface 71, a via bottom surface 72, and a via side surface 73. The area of ​​the via upper surface 71 of the fifth via 70T is larger than the areas of the via upper surfaces 71 of the first to fourth vias 70P to 70S by the amount that the recess 75 is not provided.

[0398] The first via 70P penetrates the insulating layer 854. The first via 70P is in contact with the first-layer wiring 62A. The second via 70Q penetrates the insulating layer 855. The second via 70Q is stacked on the first via 70P. Therefore, the via bottom surface 72 of the second via 70Q is in contact with the via top surface 71 of the first via 70P. The third via 70R penetrates the insulating layer 856. The third via 70R is stacked on the second via 70Q. Therefore, the via bottom surface 72 of the third via 70R is in contact with the via top surface 71 of the second via 70Q. The fourth via 70S penetrates the insulating layer 857. The fourth via 70S is stacked on the third via 70R. Therefore, the via bottom surface 72 of the fourth via 70S is in contact with the via top surface 71 of the third via 70R. The fifth via 70T penetrates the insulating layer 858. The fifth via 70T is stacked on the fourth via 70S. Therefore, the via bottom surface 72 of the fifth via 70T contacts the via top surface 71 of the fourth via 70S. The via top surface 71 of the fifth via 70T contacts the second-layer wiring 63A.

[0399] As shown in FIG. 42, the first to fifth vias 70P to 70T include recesses 75, similar to the first via 70A. The thin insulating layers 85B of the insulating layers 854 to 858 are provided along the recesses 75, similar to the recesses 75 of the first via 70A. The thick insulating layer 85A of the insulating layer 855 is embedded in the recesses 75 of the first via 70P. The thick insulating layer 85A of the insulating layer 856 is embedded in the recesses 75 of the second via 70Q. The thick insulating layer 85A of the insulating layer 857 is embedded in the recesses 75 of the third via 70R. The thick insulating layer 85A of the insulating layer 858 is embedded in the recesses 75 of the fourth via 70S.

[0400] In the second modified example, the configuration of the through wiring 64A (64B) can be changed as desired. For example, as shown in Fig. 43, the through wiring 64A may include first to fifth vias 70P, 70Q, 70R, 70S, and 70T corresponding to the insulating layers 854 to 858. The stacking arrangement of the first to fifth vias 70P to 70T is the same as that shown in Fig. 42.

[0401] The area of ​​the via bottom surface 72 of the second via 70Q is larger than the area of ​​the via top surface 71 of the first via 70P. That is, the via bottom surface 72 of the second via 70Q includes an extending portion 79 that protrudes from the via top surface 71 of the first via 70P in a plan view. The area of ​​the via bottom surface 72 of the third via 70R is larger than the area of ​​the via top surface 71 of the second via 70Q. That is, the via bottom surface 72 of the third via 70R includes an extending portion 79 that protrudes from the via top surface 71 of the second via 70Q in a plan view. The area of ​​the via bottom surface 72 of the fourth via 70S is larger than the area of ​​the via top surface 71 of the third via 70R. That is, the via bottom surface 72 of the fourth via 70S includes an extending portion 79 that protrudes from the via top surface 71 of the third via 70R in a plan view. The area of ​​the via bottom surface 72 of the fifth via 70T is larger than the area of ​​the via top surface 71 of the fourth via 70S. That is, the via bottom surface 72 of the fifth via 70T includes an extending portion 79 that protrudes from the via top surface 71 of the fourth via 70S in a plan view.

[0402] In the first and second modified examples, the number of insulating layers 85 between the first-layer wiring 62A and the second-layer wiring 63A can be changed as desired. In one example, the number of insulating layers 85 between the first-layer wiring 62A and the second-layer wiring 63A may be three. In this case, the first via 70A of the through wiring 64A penetrates two insulating layers 85. The second via 70B of the through wiring 64A penetrates one insulating layer 85.

[0403] In the first and second modified examples, the configuration of the first via 70A is not limited to the seed layer 76A and the plating layer 77A and can be changed as desired. In one example, the first via 70A may be formed by a metal body embedded in the first through hole 88A. The metal body may be formed of a material containing at least one of Cu and Al, for example.

[0404] In the first and second modified examples, the configuration of the second via 70B is not limited to the seed layer 76B and the plating layer 77B and can be changed as desired. In one example, the second via 70B may be formed by a metal body embedded in the second through hole 88B. The metal body may be formed of a material containing at least one of Cu and Al, for example.

[0405] In the first and second modified examples, the relationship between the thickness of the first via 70A and the thickness of the second via 70B can be changed as desired. For example, the thickness of the first via 70A and the thickness of the second via 70B may be equal to each other. For example, the thickness of the first via 70A may be smaller than the thickness of the second via 70B. In this case, for example, the first via 70A may penetrate through the insulating layers 855 and 856, and the second via 70B may penetrate through the insulating layers 857 to 859.

[0406] In the first modified example, the area where the thin insulating layer 85B of the insulating layer 856 is formed can be changed as desired. In one example, as shown in FIG. 44, the thin insulating layer 85B does not have to be provided along the recess 75 of the first via 70A. In this case, the thick insulating layer 85A (third insulating layer) of the insulating layer 857 is embedded so as to contact the curved surface 78 of the recess 75 of the first via 70A. Furthermore, the thin insulating layer 85B of the insulating layer 856 is spaced apart from the second via 70B. In other words, the thick insulating layer 85A of the insulating layer 857 is interposed between the thin insulating layer 85B of the insulating layer 856 and the second via 70B.

[0407] In the first modified example, the shape of the recess 75 provided in the first corner portion 74A of the first via 70A can be changed as desired. The recess 75 may be changed, for example, as shown in a first example in FIG. 45, a second example in FIG. 46, and a third example in FIG. 47.

[0408] As shown in FIG. 45, the recess 75 of the first example may have a rectangular recessed shape. The recess 75 shown in FIG. 45 includes a bottom surface 75A and a side surface 75B. The bottom surface 75A is formed by a plane perpendicular to the Z direction. In one example, the bottom surface 75A has an annular shape in a planar view. The bottom surface 75A connects the side surface 75B and the first via side surface 73A. In one example, the side surface 75B is formed by a plane along the Z direction. The side surface 75B connects the bottom surface 75A and the first via upper surface 71A. In a planar view, the side surface 75B is located more inward of the second via 70B than the second via lower surface 72B of the second via 70B.

[0409] Furthermore, thin insulating layer 85B of insulating layer 856 covers bottom surface 75A and side surface 75B. Thick insulating layer 85A of insulating layer 857 is embedded in recess 75. As a result, second corner portion 74B of second via 70B is covered with thick insulating layer 85A of insulating layer 857.

[0410] The bottom surface 75A is not limited to a plane perpendicular to the Z direction, but may be a plane intersecting the Z direction. The side surface 75B is not limited to a plane along the Z direction, but may be a plane intersecting the Z direction.

[0411] As shown in FIG. 46, the recess 75 of the second example includes an inclined surface 75C. The inclined surface 75C slopes upward from the first via side surface 73A toward the first via top surface 71A. A thin insulating layer 85B of the insulating layer 856 covers the inclined surface 75C. A thick insulating layer 85A of the insulating layer 857 is embedded in the recess 75. As a result, the second corner portion 74B of the second via 70B is covered by the thick insulating layer 85A of the insulating layer 857.

[0412] As shown in FIG. 47, the recess 75 in the third example may be located at a position spaced apart from the first via side surface 73A. That is, in the third example, the side surface 856A of the insulating layer 856 does not include the first exposed side surface 85AA shown in FIG. 39. The recess 75 shown in FIG. 47 is recessed downward from the first via side surface 73A in a curved shape. The recess 75 includes a curved surface 78. In one example, the recess 75 has an annular shape in a plan view. The recess 75 is located in the plating layer 77A of the first via 70A. On the other hand, the recess 75 is not located in the seed layer 76A of the first via 70A. The thin insulating layer 85B of the insulating layer 856 covers the curved surface 78 of the recess 75. The thick insulating layer 85A of the insulating layer 857 is embedded in the recess 75. As a result, the second corner portion 74B of the second via 70B is covered by the thick insulating layer 85A of the insulating layer 857.

[0413] In the first modified example, the configuration of the second via 70B can be changed as desired. For example, the protruding length HA of the extension 79 may be equal to or greater than the distance DC between the side surface 856A of the insulating layer 856 that forms the side surface of the first through hole 88A and the second via lower surface 72B. In this case, a step of filling the recess 75 with a thick insulating layer 85A may be performed before forming the second via 70B. For another example, the protruding length HA of the extension 79 may be equal to the film thickness of the thin insulating layer 85B of the insulating layer 856.

[0414] In the second modified example, the protrusion 74BA may be omitted from the second corner portion 74B of the second via 70B. In the first and second modified examples, the shape of the first through hole 88A can be changed as desired. In one example, the opening area of ​​the first through hole 88A may be constant in the Z direction. In other words, the side surface 856A of the insulating layer 856 may extend along the Z direction.

[0415] In the first and second modified examples, the shapes of the first via 70A and the second via 70B in a plan view can be changed as desired. For example, the first via 70A may have a rectangular shape in a plan view. For example, the second via 70B may have a rectangular shape in a plan view.

[0416] [Example of change in signal transmission device] In each embodiment, the configuration of the signal transmission device 10 can be changed arbitrarily. In one example, the signal transmission device 10 may be configured to transmit signals between the first circuit chip 160 and the second circuit chip 170 via a plurality of insulating chips 80.

[0417] FIG. 48 is a schematic plan view showing the internal structure of a signal transmission device 10 according to a modified example. The signal transmission device 10 of the modified example includes a first circuit chip 160, a second circuit chip 170, a first insulating chip 80A, and a second insulating chip 80B. In one example, the first insulating chip 80A and the second insulating chip 80B have the same configuration as the insulating chip 80. The first circuit chip 160, the second circuit chip 170, the first insulating chip 80A, and the second insulating chip 80B are arranged spaced apart from one another in the Y direction. In the example shown in FIG. 48 , the first circuit chip 160, the first insulating chip 80A, the second insulating chip 80B, and the second circuit chip 170 are arranged in this order from the first lead terminal 112 toward the second lead terminal 122.

[0418] Both the first circuit chip 160 and the first insulating chip 80A are mounted on the first die pad 111. Both the second insulating chip 80B and the second circuit chip 170 are mounted on the second die pad 121.

[0419] The first electrode pads 81 of the second insulating chip 80B are electrically connected to the second circuit chip 170 by wires W3. The second electrode pads 82 of the second insulating chip 80B are electrically connected to the second electrode pads 82 of the first insulating chip 80A by wires W5. In other words, the first insulating chip 80A and the second insulating chip 80B are connected in series between the first circuit chip 160 and the second circuit chip 170.

[0420] As described above, the second insulating chip 80B has the same configuration as the first insulating chip 80A, and therefore has the same dielectric strength voltage as the first insulating chip 80A. The signal transmission device 10 has a dielectric strength voltage corresponding to the dielectric strength voltages of the first insulating chip 80A and the second insulating chip 80B connected in series.

[0421] In each embodiment, at least one of the first circuit chip 160 and the second circuit chip 170 may be omitted from the signal transmission device 10. One or more of the various examples described herein may be combined to the extent that they are not technically inconsistent.

[0422] The term "on" as used in this disclosure includes the meanings of "on" and "above" unless the context clearly indicates otherwise. Thus, for example, the expression "a first element is disposed on a second element" means that in some embodiments, the first element may be disposed directly on the second element in contact with the second element, while in other embodiments, the first element may be disposed above the second element without contacting the second element. In other words, the term "on" does not exclude a structure in which another element is formed between the first element and the second element.

[0423] The Z direction used in this disclosure does not necessarily have to be the vertical direction, nor does it have to completely coincide with the vertical direction. Therefore, various structures according to this disclosure are not limited to the "up" and "down" of the Z direction described herein being "up" and "down" of the vertical direction. For example, the X direction may be the vertical direction, or the Y direction may be the vertical direction.

[0424] <Additional Notes> The technical ideas that can be understood from the above-described embodiments and modifications are described below. The reference numerals of the components of the embodiments corresponding to the components described in each appendix are shown in parentheses. The reference numerals are shown as examples to aid understanding, and the components described in each appendix should not be limited to the components indicated by the reference numerals.

[0425] [Appendix 1] an insulator (84) including an insulating upper surface (84S) and an insulating lower surface (84R) opposite to the insulating upper surface (84S), and configured by a plurality of insulating layers (85) stacked in a thickness direction (Z); a first conductor (51 / 41) disposed in the insulator (84) near the lower surface (84R) of the insulator; a second conductor (52 / 42) disposed within the insulator (84) closer to the insulating upper surface (84S) than the first conductor (51 / 41) and facing the first conductor (51) in the thickness direction (Z); Including, The second conductor (52 / 42) is a second upper surface (42S) disposed closer to the insulating upper surface (84S); a second lower surface (42R) opposite to the second upper surface (42S); a second side surface (42A) provided between the second upper surface (42S) and the second lower surface (42R) in the thickness direction (Z); a second corner portion (42C) between the second side surface (42A) and the second upper surface (42S); Including, The second corner portion (42C) is provided with a second recess (44) including a second curved surface (44P) that is recessed so as to be convex toward the inside of the second conductor (52 / 42). Insulating tip (80).

[0426] [Appendix 2] The cross-sectional shape of the second curved surface (44P) is an arc shape. 10. The insulated tip of claim 1.

[0427] [Appendix 3] The second conductor (52 / 42) has a predetermined width, The second side surface (42A) is a second inner side surface (42AA) on the inner side in the width direction (X) of the second conductor (52 / 42); a second outer side surface (42AB) on the outer side of the second conductor (52 / 42) in the width direction (X); Including, The second corner portion (42C) is a second inner corner portion (42CA) between the second inner side surface (42AA) and the second upper surface (42S); a second outer corner portion (42CB) between the second outer side surface (42AB) and the second upper surface (42S); Including, The second recess (44) is a second inner recess (44A) including a second inner curved surface (44PA) provided in the second inner corner portion (42CA); a second outer recess (44B) including a second outer curved surface (44PB) provided in the second outer corner portion (42CB); Contains 10. The insulated tip of claim 1 or 2.

[0428] [Appendix 4] The arc length of the cross-sectional shape of the second inner curved surface (44PA) is equal to the arc length of the cross-sectional shape of the second outer curved surface (44PB). 1. An insulated tip as described in Appendix 3.

[0429] [Appendix 5] The plurality of insulating layers (85) are a third insulating layer (857) on which the second conductor (52 / 42) is provided; a fourth insulating layer (85U) laminated on the third insulating layer (857); Including, Both the third insulating layer (857) and the fourth insulating layer (85U) a thin insulating layer (85B); a thick insulating layer (85A) provided on the thin insulating layer (85B) and having a thermal expansion coefficient smaller than that of the thin insulating layer (85B); Including, The thin insulating layer (85B) of the fourth insulating layer (85U) includes a second curved portion (85DC) that is in contact with the second curved surface (44P) along the second curved surface (44P). An insulating chip according to any one of appendices 1 to 4.

[0430] [Appendix 6] The thick insulating layer (85A) of the third insulating layer (857) includes a side surface (857A) that forms a second groove (86B) in which the second conductor (52 / 42) is embedded, the side surface (857A) of the thick insulating layer (85A) of the third insulating layer (857) includes a second exposed side surface (85AB) exposed from the second conductor (52 / 42) by the second recess (44); The thin insulating layer (85B) of the fourth insulating layer (85U) is a second side surface portion (85DB) covering the second exposed side surface (85AB) and connected to the second curved portion (85BH); a second upper surface portion (85DA) covering the upper surface (857S) of the thick insulating layer (85A) and connected to the second side surface portion (85BG); a second conductor upper surface portion (85DD) covering the second upper surface (42S) of the second conductor (52 / 42) and connected to the second curved portion (85DC); Contains 10. The insulated tip of claim 5.

[0431] [Appendix 7] The second conductor (52 / 42) has a tapered shape in which the second side surface (42A) is inclined so as to taper from the second upper surface (42S) toward the second lower surface (42R). An insulating chip according to any one of appendices 1 to 6.

[0432] [Appendix 8] The second conductor (52 / 42) is a seed layer (45B); a plating layer (46B) provided on the seed layer (45B); Including, The second recess (44) is provided across both the seed layer (45B) and the plating layer (46B). An insulating chip according to any one of appendices 1 to 7.

[0433] [Appendix 9] The first conductor (51 / 41) is A first upper surface (41S); a first lower surface (41R) opposite to the first upper surface (41S); a first side surface (41A) provided between the first upper surface (41S) and the first lower surface (41R) in the thickness direction (Z); a first corner portion (41C) between the first side surface (41A) and the first upper surface (41S); Including, The first corner portion (41C) is provided with a first recess (43) including a first curved surface (43P) that is recessed so as to be convex toward the inside of the first conductor (51 / 41). An insulating chip according to any one of appendices 1 to 8.

[0434] [Appendix 10] The cross-sectional shape of the first curved surface (43P) is an arc shape. 10. The insulated tip of claim 9.

[0435] [Appendix 11] The arc length of the cross-sectional shape of the first curved surface (43P) is equal to the arc length of the cross-sectional shape of the second curved surface (44P). 11. The insulated tip of claim 10.

[0436] [Appendix 12] The first conductor (51 / 41) has a predetermined width, The first side surface (41A) is a first inner side surface (41AA) on the inner side in the width direction (X) of the first conductor (51 / 41); a first outer side surface (41AB) on the outer side of the first conductor (51 / 41) in the width direction (X); Including, The first corner portion (41C) is a first inner corner portion (41CA) between the first inner side surface (41AA) and the first upper surface (41S); a first outer corner portion (41CB) between the first outer side surface (41AB) and the first upper surface (41S); Including, The first recess (43) is a first inner recess (43A) including a first inner curved surface (43PA) provided in the first inner corner portion (41CA); a first outer recess (43B) including a first outer curved surface (43PB) provided in the first outer corner portion (41CB); Contains An insulating chip according to any one of appendices 9 to 11.

[0437] [Appendix 13] The arc length of the cross-sectional shape of the first inner curved surface (43PA) is equal to the arc length of the cross-sectional shape of the first outer curved surface (43PB). 13. The insulated tip of claim 12.

[0438] [Appendix 14] The plurality of insulating layers (85) are a first insulating layer (853) on which the first conductor (51 / 41) is provided; a second insulating layer (854) laminated on the first insulating layer (853); Including, Both the first insulating layer (853) and the second insulating layer (854) a thin insulating layer (85B); a thick insulating layer (85A) provided on the thin insulating layer (85B) and having a thermal expansion coefficient smaller than that of the thin insulating layer (85B); Including, The thin insulating layer (85B) of the second insulating layer (854) includes a first curved portion (85CC) that contacts along the first curved surface (43P). An insulating chip according to any one of appendices 9 to 13.

[0439] [Appendix 15] The thick insulating layer (85A) of the first insulating layer (853) includes a side surface (853A) that forms a first groove (86A) into which the first conductor (51 / 41) is embedded, the side surface (853A) of the thick insulating layer (85A) of the first insulating layer (853) includes a first exposed side surface (85AA) exposed from the first conductor (51 / 41) by the first recess (43); The thin insulating layer (85B) of the second insulating layer (854) is a first side surface portion (85CB) covering the first exposed side surface (85AA) and connected to the first curved portion (85CC); a first upper surface portion (85CA) that covers an upper surface (853S) of the thick insulating layer (85A) of the first insulating layer (853) and is connected to the first side surface portion (85CB); a first conductor upper surface portion (85CD) covering the first upper surface (41S) of the first conductor (51 / 41) and connected to the first curved portion (85CC); Contains 15. The insulated tip of claim 14.

[0440] [Appendix 16] The first conductor (51 / 41) has a tapered shape in which the first side surface (41A) is inclined so as to taper from the first upper surface (41S) toward the first lower surface (41R). An insulating chip according to any one of appendices 9 to 15.

[0441] [Appendix 17] The first conductor (51 / 41) is a seed layer (45A); a plating layer (46A) provided on the seed layer (45A); Including, The first recess (43) is provided across both the seed layer (45A) and the plating layer (46A). An insulating chip according to any one of appendices 9 to 16.

[0442] [Appendix 18] The first conductor (51) and the second conductor (52) include coils (41, 42). An insulating chip according to any one of appendices 1 to 17.

[0443] [Appendix 19] the second conductor (52 / 42) includes a pair of second straight portions (42D) and a pair of second curved portions (42E) connecting both ends of the pair of second straight portions (42D), The second recesses (44) are provided continuously with both the pair of second straight portions (42D) and the pair of second curved portions (42E). 19. The insulated tip of claim 18.

[0444] [Appendix 20] the first conductor (51) and the second conductor (52) include coils (41, 42); the first conductor (51 / 41) includes a pair of first straight portions (41D) and a pair of first curved portions (41E) connecting both ends of the pair of first straight portions (41D), The first recesses (43) are provided continuously with both the pair of first straight portions (41D) and the pair of first curved portions (41E). An insulating chip according to any one of appendices 9 to 16.

[0445] [Appendix 21] The first conductor (51) and the second conductor (52) include electrode plates (201, 202). An insulating chip according to any one of appendices 1 to 17.

[0446] [Appendix 22] a first electrode pad (81) electrically connected to the first conductor (51 / 41); a second electrode pad (82) electrically connected to the second conductor (52 / 42); a connection wiring (60 / 60A) provided in the insulator (84) and connecting the first conductor (51 / 41) and the first electrode pad (81); Including, The connecting wiring (60 / 60A) a first wiring portion (61A) connected to the first electrode pad (81) and extending in the thickness direction; a second wiring portion (66A) connected to the first conductor (51 / 51A) and extending outward from the first conductor (51 / 41) in a plan view; Including, The first wiring portion (61A) is a first layer wiring (62A) provided at the same position as the first conductor (51 / 41, 51A) in the thickness direction (Z) and electrically connected to the second wiring portion (66A); a second layer wiring (63A) provided at the same position as the second conductor (52 / 42) in the thickness direction (Z); a through wiring (64A) provided between the first layer wiring (62A) and the second layer wiring (63A) in the thickness direction (Z); a surface-side via wiring (65A) connecting the second layer wiring (63A) and the first electrode pad (81); Contains An insulating chip according to any one of appendices 1 to 21.

[0447] [Appendix 23] the second wiring portion (66A) is disposed on the opposite side of the first conductor (51 / 41) to the second conductor (52 / 42) in the thickness direction (Z); The second wiring portion (66A) is A lead wiring (67A) extending in a direction perpendicular to the thickness direction (Z); a first back surface side via wiring (68A) that connects the first layer wiring (62A) and the lead wiring (67A); a second back surface side via wiring (69A) connecting the first conductor (51 / 51A) and the lead wiring (67A); Contains 23. The insulated tip of claim 22.

[0448] [Appendix 24] The second layer wiring (63A) is A second wiring upper surface (63AS), a second wiring lower surface (63AR) opposite to the second wiring upper surface (63AS); a second wiring side surface (63AA) connecting the second wiring upper surface (63AS) and the second wiring lower surface (63AR); a second wiring corner portion (63AD) between the second wiring side surface (63AA) and the second wiring upper surface (63AS); Including, The second wiring corner portion (63AD) is provided with a fourth recess (63AE) including a fourth curved surface (63AP) that is recessed so as to be convex toward the inside of the second layer wiring (63A). 24. The insulated tip of claim 22 or 23.

[0449] [Appendix 25] The cross-sectional shape of the fourth curved surface (63AP) is an arc shape. 25. The insulated tip of claim 24.

[0450] [Appendix 26] The arc length of the cross-sectional shape of the fourth curved surface (63AP) is equal to the arc length of the cross-sectional shape of the second curved surface (44P). 26. The insulated tip of claim 25.

[0451] [Appendix 27] The plurality of insulating layers (85) are a third insulating layer (857) on which both the second conductor (52 / 42) and the second layer wiring (63A) are provided; a fourth insulating layer (85U) laminated on the third insulating layer (857); Including, Both the third insulating layer (857) and the fourth insulating layer (85U) a thin insulating layer (85B); a thick insulating layer (85A) provided on the thin insulating layer (85B) and having a thermal expansion coefficient smaller than that of the thin insulating layer (85B); Including, The thin insulating layer (85B) of the fourth insulating layer (85U) includes a fourth curved portion (85FC) that is in contact with the fourth curved surface (63AP) along the fourth curved surface (63AP). An insulating chip according to any one of appendices 24 to 26.

[0452] [Appendix 28] the thick insulating layer (85A) of the third insulating layer (857) includes a side surface (857B) that forms a through hole (87B) into which the second layer wiring (63A) is embedded, the side surface (857B) of the thick insulating layer (85A) of the third insulating layer (857) includes a fourth exposed side surface (85AD) exposed from the second layer wiring (63A) by the fourth recess (63AE), The thin insulating layer (85B) of the fourth insulating layer (85U) is a fourth side surface portion (85FB) covering the fourth exposed side surface (85AD) and connected to the fourth curved portion (85FC); a fourth upper surface portion (85FA) covering an upper surface (857S) of the thick insulating layer (85A) of the third insulating layer (857) and connected to the fourth side surface portion (85FB); a second wiring upper surface portion (85FD) covering a second wiring upper surface (63AS) of the second layer wiring (63A) and connected to the fourth curved portion (85FC); Contains 28. The insulated tip of claim 27.

[0453] [Appendix 29] The second layer wiring (63A) has a tapered shape in which the second wiring side surface (63AA) is inclined so as to taper from the second wiring upper surface (63AS) toward the second wiring lower surface (63AR). An insulating tip according to any one of appendices 24 to 28.

[0454] [Appendix 30] The first layer wiring (62A) is A first wiring upper surface (62AS), a first wiring lower surface (62AR) opposite to the first wiring upper surface (62AS); a first wiring side surface (62AA) connecting the first wiring upper surface (62AS) and the first wiring lower surface (62AR); a first wiring corner portion (62AD) between the first wiring side surface (62AA) and the first wiring upper surface (62AS); Including, The first wiring corner portion (62AD) is provided with a third recess (62AE) including a third curved surface (62AP) that is recessed so as to be convex toward the inside of the first layer wiring (62A). 24. The insulated tip of claim 22 or 23.

[0455] [Appendix 31] The cross-sectional shape of the third curved surface (62AP) is an arc shape. 31. The insulated tip of claim 30.

[0456] [Appendix 32] The arc length of the cross-sectional shape of the third curved surface (62AP) is equal to the arc length of the cross-sectional shape of the second curved surface (44P). 32. The insulated tip of claim 31.

[0457] [Appendix 33] The plurality of insulating layers (85) are a first insulating layer (853) on which both the first conductor (51 / 41) and the first layer wiring (62A) are provided; a second insulating layer (854) laminated on the first insulating layer (853); Including, Both the first insulating layer (853) and the second insulating layer (854) a thin insulating layer (85B); a thick insulating layer (85A) provided on the thin insulating layer (85B) and having a thermal expansion coefficient smaller than that of the thin insulating layer (85B); Including, The thin insulating layer (85B) of the second insulating layer (854) includes a third curved portion (85EC) that contacts along the third curved surface (62AP). 33. The insulating chip according to any one of appendices 30 to 32.

[0458] [Appendix 34] the thick insulating layer (85A) of the first insulating layer (853) includes a side surface (853B) that forms a through hole (87A) into which the first layer wiring (62A) is embedded, the side surface (853B) of the thick insulating layer (85A) of the first insulating layer (853) includes a third exposed side surface (85AC) exposed from the first layer wiring (62A) by the third recess (62AE), The thin insulating layer (85B) of the second insulating layer (854) is a third side surface portion (85EB) covering the third exposed side surface (85AC) and connected to the third curved portion (85EC); a third upper surface portion (85EA) covering an upper surface (853S) of the thick insulating layer (85A) of the first insulating layer (853) and connected to the third side surface portion (85EB); a first wiring upper surface portion (85ED) covering a first wiring upper surface (62AS) of the first layer wiring (62A) and connected to the third curved portion (85EC); Contains 34. The insulated tip of claim 33.

[0459] [Appendix 35] The first layer wiring (62A) has a tapered shape in which the first wiring side surface (62AA) is inclined so as to taper from the first wiring upper surface (62AS) toward the first wiring lower surface (62AR). An insulating chip according to any one of appendices 30 to 34.

[0460] [Appendix 36] a seal portion (93) provided on the outer periphery of the insulator (84) and surrounding the first conductor (51 / 41) and the second conductor (52 / 42) in a plan view; The seal portion (93) is a first seal portion (94) provided at the same position as the first conductor (51 / 41) in the thickness direction (Z); a second seal portion (95) provided at the same position as the second conductor (52 / 42) in the thickness direction (Z); a connecting seal portion (96) that connects the first seal portion (94) and the second seal portion (95) in the thickness direction (Z); Contains An insulating chip according to any one of appendices 1 to 35.

[0461] [Appendix 37] The second seal portion (95) A second seal upper surface (95S); a second seal lower surface (95R) opposite to the second seal upper surface (95S); a second seal side surface (95A) connecting the second seal upper surface (95S) and the second seal lower surface (95R); a second seal corner portion (95C) between the second seal side surface (95A) and the second seal upper surface (95S); Including, The second seal corner portion (95C) is provided with a sixth recess (95CA) including a sixth curved surface (95CP) that is recessed so as to be convex toward the inside of the second seal portion (95). 37. The insulated tip of claim 36.

[0462] [Appendix 38] The cross-sectional shape of the sixth recess (95CA) is an arc shape. 38. The insulated tip of claim 37.

[0463] [Appendix 39] The arc length of the cross-sectional shape of the sixth curved surface (95CP) is equal to the arc length of the cross-sectional shape of the second curved surface (44P). 39. The insulated tip of claim 38.

[0464] [Appendix 40] The plurality of insulating layers (85) are a third insulating layer (857) on which both the second conductor (52 / 42) and the second sealing portion (95) are provided; a fourth insulating layer (85U) provided on the third insulating layer (857); Including, Both the third insulating layer (857) and the fourth insulating layer (85U) a thin insulating layer (85B); a thick insulating layer (85A) provided on the thin insulating layer (85B) and having a thermal expansion coefficient smaller than that of the thin insulating layer (85B); Including, The thin insulating layer (85B) of the fourth insulating layer (85U) includes a sixth curved portion (85HC) that contacts along the sixth curved surface (95CP). 40. An insulating chip according to any one of appendices 37 to 39.

[0465] [Appendix 41] the thick insulating layer (85A) of the third insulating layer (857) includes a side surface (857C) that forms a through-hole (89B) into which the second sealing portion (95) is embedded, the side surface (857C) of the thick insulating layer (85A) of the third insulating layer (857) includes a sixth exposed side surface (85AF) exposed from the second sealing portion (95) by the sixth recess (95CA), The thin insulating layer (85B) of the fourth insulating layer (857) is a sixth side portion (85HB) covering the sixth exposed side surface (85AF) and connected to the sixth curved portion (85HC); a sixth upper surface portion (85HA) covering an upper surface (857S) of the thick insulating layer (85A) of the third insulating layer (857) and connected to the sixth side surface portion (85HB); a second seal upper surface portion (85HD) that covers the second seal upper surface (95S) of the second seal portion (95) and is connected to the sixth curved portion (85HC); Contains 41. The insulated tip of claim 40.

[0466] [Appendix 42] The second seal portion (95) has a tapered shape in which the second seal side surface (95A) is inclined so as to taper from the second seal upper surface (95S) toward the second seal lower surface (95R). 42. An insulating chip according to any one of appendices 37 to 41.

[0467] [Appendix 43] The first seal portion (94) a first seal upper surface (94S); a first seal lower surface (94R) opposite to the first seal upper surface (94S); a first seal side surface (94A) connecting the first seal upper surface (94S) and the first seal lower surface (94R); a first seal corner portion (94C) between the first seal side surface (94A) and the first seal upper surface (94S); Including, The first seal corner portion (94C) is provided with a fifth recess (94CA) including a fifth curved surface (94CP) that is recessed so as to be convex toward the inside of the first seal portion (94). 43. An insulating chip according to any one of appendices 36 to 42.

[0468] [Appendix 44] The fifth recess (94CA) has an arc-shaped cross section. 44. The insulated tip of claim 43.

[0469] [Appendix 45] The arc length of the cross-sectional shape of the fifth curved surface (94CP) is equal to the arc length of the cross-sectional shape of the second curved surface (44P). 45. The insulated tip of claim 44.

[0470] [Appendix 46] The plurality of insulating layers (85) are a first insulating layer (853) on which both the first conductor (51 / 41) and the first sealing portion (94) are provided; a second insulating layer (854) laminated on the first insulating layer (853); Including, Both the first insulating layer (853) and the second insulating layer (854) a thin insulating layer (85B); a thick insulating layer (85A) provided on the thin insulating layer (85B) and having a thermal expansion coefficient smaller than that of the thin insulating layer (85B); Including, The thin insulating layer (85B) of the second insulating layer (854) includes a fifth curved portion (85GC) that contacts along the fifth curved surface (94CP). 46. ​​An insulating chip according to any one of appendices 43 to 45.

[0471] [Appendix 47] the thick insulating layer (85A) of the first insulating layer (853) includes a side surface (853C) that forms a through-hole (89A) into which the first sealing portion (94) is embedded, the side surface (853C) of the thick insulating layer (85A) of the first insulating layer (853) includes a fifth exposed side surface (85AE) exposed from the first sealing portion (94) by the fifth recess (94CA), The thin insulating layer (85B) of the second insulating layer (854) is a fifth side portion (85GB) covering the fifth exposed side surface (8...

Claims

1. an insulator including an insulating upper surface and an insulating lower surface opposite to the insulating upper surface, the insulator being composed of a plurality of insulating layers stacked in a thickness direction; a first conductor disposed in the insulator toward a lower surface of the insulator; a second conductor disposed in the insulator closer to the upper surface of the insulator than the first conductor and facing the first conductor in the thickness direction; Including, The second conductor is a second upper surface disposed near the insulating upper surface; a second lower surface opposite the second upper surface; a second side surface provided between the second upper surface and the second lower surface in the thickness direction; a second corner portion between the second side surface and the second top surface; Including, The second corner portion is provided with a second recess including a second curved surface that is recessed so as to be convex toward the inside of the second conductor. Insulated tip.

2. The cross-sectional shape of the second curved surface is an arc shape. The insulating tip of claim 1 .

3. the second conductor has a predetermined width; The second side surface is a second inner side surface on the inner side in the width direction of the second conductor; a second outer side surface of the second conductor on the outer side in the width direction; Including, The second corner portion is a second inner corner portion between the second inner side surface and the second upper surface; a second outer corner portion between the second outer side surface and the second top surface; Including, The second recess is a second inner recess including a second inner curved surface provided at the second inner corner portion; a second outer recess including a second outer curved surface provided at the second outer corner portion; Contains The insulating tip of claim 1 .

4. The arc length of the cross-sectional shape of the second inner curved surface is equal to the arc length of the cross-sectional shape of the second outer curved surface. The insulating tip of claim 3 .

5. The plurality of insulating layers are a third insulating layer on which the second conductor is provided; a fourth insulating layer stacked on the third insulating layer; Including, Both the third insulating layer and the fourth insulating layer are a thin insulating layer; a thick insulating layer provided on the thin insulating layer and having a thermal expansion coefficient smaller than that of the thin insulating layer; Including, The thin insulating layer of the fourth insulating layer includes a second curved portion that contacts along the second curved surface. The insulating tip of claim 1 .

6. the thick insulating layer of the third insulating layer includes a side surface that defines a second groove in which the second conductor is embedded, the side surface of the thick insulating layer of the third insulating layer includes a second exposed side surface exposed from the second conductor by the second recess; The thin insulating layer of the fourth insulating layer is a second side surface portion covering the second exposed side surface and connected to the second curved portion; a second upper surface portion that covers an upper surface of the thick insulating layer and is connected to the second side surface portion; a second conductor upper surface portion covering a second upper surface of the second conductor and connected to the second curved portion; Contains The insulating tip of claim 5 .

7. The second conductor has a tapered shape in which the second side surface is inclined so as to taper from the second upper surface toward the second lower surface. The insulating tip of claim 1 .

8. The first conductor is A first top surface; a first lower surface opposite the first upper surface; a first side surface provided between the first upper surface and the first lower surface in the thickness direction; a first corner portion between the first side surface and the first top surface; Including, The first corner portion is provided with a first recess including a first curved surface that is recessed so as to be convex toward the inside of the first conductor. The insulating tip of claim 1 .

9. The cross-sectional shape of the first curved surface is an arc shape. The insulating tip of claim 8.

10. The arc length of the cross-sectional shape of the first curved surface is equal to the arc length of the cross-sectional shape of the second curved surface. The insulating tip of claim 9.

11. the first conductor has a predetermined width; The first aspect is a first inner side surface on an inner side in a width direction of the first conductor; a first outer side surface of the first conductor on the outer side in the width direction; Including, The first corner portion is a first inner corner portion between the first inner side surface and the first upper surface; a first outer corner portion between the first outer side surface and the first top surface; Including, The first recess is a first inner recess including a first inner curved surface provided at the first inner corner portion; a first outer recess including a first outer curved surface provided at the first outer corner portion; Contains The insulating tip of claim 8.

12. The arc length of the cross-sectional shape of the first inner curved surface is equal to the arc length of the cross-sectional shape of the first outer curved surface. The insulating tip of claim 11.

13. The plurality of insulating layers are a first insulating layer provided with the first conductor; a second insulating layer laminated on the first insulating layer; Including, Both the first insulating layer and the second insulating layer are a thin insulating layer; a thick insulating layer provided on the thin insulating layer and having a thermal expansion coefficient smaller than that of the thin insulating layer; Including, The thin insulating layer of the second insulating layer includes a first curved portion that contacts along the first curved surface. The insulating tip of claim 8.

14. the thick insulating layer of the first insulating layer includes a side surface that defines a first groove in which the first conductor is embedded, the side surface of the thick insulating layer of the first insulating layer includes a first exposed side surface exposed from the first conductor by the first recess; The thin insulating layer of the second insulating layer is a first side surface portion covering the first exposed side surface and connected to the first curved portion; a first upper surface portion of the first insulating layer that covers an upper surface of the thick insulating layer and is connected to the first side surface portion; a first conductor upper surface portion covering a first upper surface of the first conductor and connected to the first curved portion; Contains The insulating tip of claim 13.

15. The first conductor has a tapered shape in which the first side surface is inclined so as to taper from the first upper surface toward the first lower surface. The insulating tip of claim 8.

16. The first conductor and the second conductor include a coil. The insulating tip of claim 1 .

17. the second conductor includes a pair of second straight portions and a pair of second curved portions connecting both end portions of the pair of second straight portions, The second recesses are provided continuously in both the pair of second linear portions and the pair of second curved portions.

17. The insulating tip of claim 16.

18. the first conductor and the second conductor include a coil; the first conductor includes a pair of first straight portions and a pair of first curved portions connecting both ends of the pair of first straight portions, The first recesses are provided continuously in both the pair of first linear portions and the pair of first curved portions. The insulating tip of claim 8.

19. The first conductor and the second conductor include electrode plates. The insulating tip of claim 1 .

20. The insulating tip according to any one of claims 1 to 19, a first circuit and a second circuit electrically connected to the insulating tip; Equipped with The first circuit and the second circuit are configured to transmit signals through the insulating tip. Signal transmission device.

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