Semiconductor device

Abstract

To provide a semiconductor device that can improve characteristics.SOLUTION: According to an embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, and first and second insulating members. The second electrode includes first and second electrode portions. The semiconductor member includes a first semiconductor region. The first semiconductor region includes first to fourth partial regions. The first electrode portion is in contact with the fourth partial region. The first insulating member includes first and second insulating regions. The first insulating region is between the third electrode and the fourth partial region. The second insulating region is between the first partial region and the third electrode. The second insulating member includes a first insulating portion. The first insulating portion is between the second partial region and the first electrode portion.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] It is desirable to improve the characteristics of semiconductor devices. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-132195 Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiments of the present invention provide a semiconductor device capable of improving characteristics. [Means for solving the problem]

[0005] According to an embodiment of the present invention, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, a first insulating member, and a second insulating member. A direction from the first electrode to the second electrode is along a first direction. The second electrode includes a first electrode portion and a second electrode portion connected to the first electrode portion. The semiconductor member includes a first semiconductor region. The first semiconductor region includes a first partial region, a second partial region, a third partial region, and a fourth partial region. A second direction from the first partial region to the second partial region intersects with the first direction. The third partial region is between the first partial region and the second partial region in the second direction. The first partial region is between the first electrode and the third electrode in the first direction. The second partial region is between the first electrode and the first electrode portion in the first direction. The fourth partial region is between the third partial region and the second electrode portion in the first direction. The fourth partial region is between the third electrode and the first electrode portion in the second direction. The first electrode portion is in contact with the fourth partial region. The first insulating member includes a first insulating region and a second insulating region. The first insulating region is between the third electrode and the fourth partial region in the second direction. The second insulating region is between the first partial region and the third electrode in the first direction. The second insulating member includes a first insulating portion. The first insulating portion is between the second partial region and the first electrode portion in the first direction. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 2] FIG. 2 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 3] FIG. 3 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 4] FIG. 4 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 5] FIG. 5 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 6] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 7] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. [Figure 8] FIG. 8 is a schematic perspective view illustrating the semiconductor device according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios may be different depending on the drawing. In this specification and in each drawing, elements similar to those previously described with reference to the previous drawings are designated by the same reference numerals, and detailed descriptions thereof will be omitted where appropriate.

[0008] (First embodiment) FIG. 1 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 1, the semiconductor device 110 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a semiconductor member 10M, a first insulating member 41, and a second insulating member 42. The semiconductor member 10M includes a first semiconductor region 11.

[0009] The direction from the first electrode 51 to the second electrode 52 is along the first direction D1. The first direction D1 is defined as the Z-axis direction. A direction perpendicular to the Z-axis direction is defined as the X-axis direction. A direction perpendicular to the Z-axis direction and the X-axis direction is defined as the Y-axis direction.

[0010] The second electrode 52 includes a first electrode portion 52a and a second electrode portion 52b. The second electrode portion 52b is connected to the first electrode portion 52a. The first electrode portion 52a extends in a first direction D1 and a second direction D2. In the first direction D1, the first electrode portion 52a is located between the first electrode 52 and the second electrode portion 52b.

[0011] The first semiconductor region 11 is provided, for example, in the first direction D1 between the first electrode 51 and the second electrode 52. The first semiconductor region 11 is substantially in the form of a layer along the XY plane.

[0012] The first semiconductor region 11 includes a first partial region 11a, a second partial region 11b, a third partial region 11c, and a fourth partial region 11d. A second direction D2 from the first partial region 11a to the second partial region 11b intersects with the first direction D1. The second direction D2 may be, for example, the X-axis direction.

[0013] The third partial region 11c is located between the first partial region 11a and the second partial region 11b in the second direction D2. The first partial region 11a is located between the first electrode 51 and the third electrode 53 in the first direction D1. The second partial region 11b is located between the first electrode 51 and the first electrode portion 52a in the first direction D1. For example, the portion overlapping with the third electrode 53 in the first direction D1 corresponds to the first partial region 11a. For example, the portion overlapping with the first electrode portion 52a in the first direction D1 corresponds to the second partial region 11b.

[0014] The fourth partial region 11d is located between the third partial region 11c and the second electrode portion 52b in the first direction D1. The fourth partial region 11d is located between the third electrode 53 and the first electrode portion 52a in the second direction D2. The fourth partial region 11d is located between the first insulating member 41 and the first electrode portion 52a in the second direction D2. The first electrode portion 52a is in contact with the fourth partial region 11d. For example, the fourth partial region 11d does not overlap with the first electrode portion 52a in the first direction D1.

[0015] The boundaries between the first partial region 11a, the second partial region 11b, the third partial region 11c, and the fourth partial region 11d may be clear or unclear.

[0016] In the first semiconductor region 11, the first partial region 11a, the second partial region 11b, the third partial region 11c, and the fourth partial region 11d may be of n-type (first conductivity type). These partial regions may also be of p-type (second conductivity type). In the following description, these partial regions will be referred to as n-type (first conductivity type).

[0017] The first insulating member 41 includes a first insulating region 41a and a second insulating region 41b. The first insulating region 41a is located between the third electrode 53 and the fourth partial region 11d in the second direction D2. The first insulating region 41a contacts, for example, the third electrode 53 and the fourth partial region 11d. The fourth partial region 11d is located between the first insulating region 41a and the first electrode portion 52a in the second direction D2. The second insulating region 41b is located between the first partial region 11a and the third electrode 53 in the first direction D1. The second insulating region 41b may contact, for example, the first partial region 11a and the third electrode 53. The first insulating member 41 electrically insulates, for example, the third electrode 53 from the semiconductor member 10M (first semiconductor region 11).

[0018] The second insulating member 42 includes a first insulating portion 42a. The first insulating portion 42a is located between the second partial region 11b and the first electrode portion 52a in the first direction D1.

[0019] For example, the current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The potential of the third electrode 53 may be, for example, a potential based on the potential of the second electrode 52. The first electrode 51 functions as, for example, a drain electrode. The second electrode 52 functions as, for example, a source electrode. The third electrode 53 functions as, for example, a gate electrode. The semiconductor device 110 is, for example, a transistor.

[0020] For example, the current flowing through the fourth partial region 11d is controlled by the potential of the third electrode 53. The fourth partial region 11d is at least a part of the carrier region. For example, the first electrode portion 52a and the fourth partial region 11d form a Schottky contact.

[0021] In the semiconductor device 110, the region through which current flows does not need to include a p-type region or an n-type region. High-speed recovery is obtained. For example, a short gate length can be obtained, thereby suppressing loss.

[0022] In the embodiment, the first insulating portion 42a is provided between the second partial region 11b and the first electrode portion 52a in the first direction D1. As a result, the lower surface (first surface 52F, see FIG. 1) of the first electrode portion 52a does not contact the first semiconductor region 11. On the other hand, the side surface (second surface 52G, see FIG. 1) of the first electrode portion 52a makes Schottky contact with the fourth partial region 11d. It has been found that this configuration can suppress, for example, leakage current.

[0023] For example, in the reference example, the lower surface of the first electrode portion 52a, which forms a Schottky contact, is in contact with the first semiconductor region 11. It has been found that in such a reference example, the leakage current is likely to be large. It has been found that the leakage current is large in the region including the lower surface of the first electrode portion 52a. Such leakage current occurs particularly remarkably when the work function of the first electrode portion 52a, which is related to the barrier height, is low.

[0024] In the embodiment, by providing the first insulating portion 42a, the lower surface of the first electrode portion 52a does not contact the first semiconductor region 11. This makes it possible to effectively suppress leakage current even when the work function is small, for example. According to the embodiment, it is possible to provide a semiconductor device with improved characteristics.

[0025] The barrier height depends not only on the work function of the material but also on the morphology of the surface of the first semiconductor region 11, the crystal characteristics of the first electrode portion 52a, and the film quality of the first electrode portion 52a. These characteristics may change due to variations in manufacturing conditions. These characteristics may also change over time. In the embodiment, by providing the first insulating portion 42a, leakage current caused by variations in these characteristics can be stably and effectively suppressed.

[0026] For example, in the case of the same work function, the leakage current in the embodiment can be reduced to about 1 / 50 or less of the leakage current in the reference example.

[0027] As shown in FIG. 1, the first electrode portion 52a includes a first surface 52F and a second surface 52G. The first surface 52F intersects with the second surface 52G. The first surface 52F faces the first electrode 51. The first surface 52F corresponds to the bottom surface. The first surface 52F does not contact the first semiconductor region 11. The second surface 52G contacts the fourth partial region 11d. The second surface 52G is, for example, a side surface.

[0028] In the embodiment, the width of the first surface 52F of the first electrode portion 52a along the second direction D2 may be smaller than the maximum width of the first electrode portion 52a along the second direction D2. For example, the width of the upper end of the first electrode portion 52a along the second direction D2 may be equal to or greater than the width of the first surface 52F along the second direction D2. The upper end of the first electrode portion 52a is the end on the second electrode portion 52b side in the first direction D1.

[0029] 1, the first insulating member 41 may further include a third insulating region 41c. The third insulating region 41c is located between the third electrode 53 and at least a portion of the second electrode portion 52b in the first direction D1. The third insulating region 41c contacts, for example, the third electrode 53, a portion of the second electrode portion 52b, and the fourth partial region 11d. The fourth partial region 11d is located between the first insulating region 41a and the first electrode portion 52a in the second direction D2. The length of the third insulating region 41c in the first direction D1 may be longer than the length of the third electrode 53 in the first direction D1, for example.

[0030] As shown in FIG. 1 , the semiconductor device 110 may further include a first semiconductor layer 11L. The first semiconductor layer 11L is provided between the first electrode 51 and the first semiconductor region 11. For example, the impurity concentration in the first semiconductor layer 11L is higher than the impurity concentration in the first semiconductor region 11. The first semiconductor layer 11L may be in contact with the first electrode 51. By providing the first semiconductor layer 11L, for example, a low on-resistance can be obtained. When the semiconductor device 110 does not include the first semiconductor layer 11L, the first partial region 11a, the second partial region 11b, and the third partial region 11c may be in contact with the first electrode 51.

[0031] 1, the semiconductor device 110 may further include a first conductive member 61. The first conductive member 61 is located between the second partial region 11b and the first electrode portion 52a in the first direction D1. At least a portion of the first insulating portion 42a is located between the first conductive member 61 and the first electrode portion 52a.

[0032] The first semiconductor region 11 may further include a fifth partial region 11e. The fifth partial region 11e is located between the first partial region 11a and the second insulating region 41b in the first direction D1. The fifth partial region 11e may be in contact with the second insulating region 41b. The second insulating member 42 may further include a second insulating portion 42b. The second insulating portion 42b is located between the fifth partial region 11e and the first conductive member 61 in the second direction D2.

[0033] The second insulating member 42 may further include, for example, a third insulating portion 42c. The third insulating portion 42c is located between the second partial region 11b and the first conductive member 61 in the first direction D1. The second insulating member 42 may be provided around the first conductive member 61. The second insulating member 42 electrically insulates, for example, the first conductive member 61 from the semiconductor member 10M (first semiconductor region 11).

[0034] The first conductive member 61 may function as, for example, a field plate. For example, it is possible to suppress the concentration of an electric field. Stable operation is easily achieved. For example, the first conductive member 61 may be electrically connected to the second electrode 52. The electrical connection may be achieved by, for example, a connection member 61L. The first conductive member 61 may be electrically floating.

[0035] As shown in FIG. 1, the first conductive member 61 includes a first end 61a and a second end 61b. The first end 61a is located between the second end 61b and the first insulating portion 42a in the first direction D1. The first end 61a is, for example, the upper end. The second end 61b is the lower end. The distance along the first direction D1 between the first electrode 51 and the first end 61a is defined as an upper end distance d61a. The distance along the first direction D1 between the first electrode 51 and the third electrode 53 is defined as a third electrode distance d53. For example, the upper end distance d61a may be shorter than the third electrode distance d53. For example, stable operation is more easily achieved.

[0036] 1, the distance between the first electrode 51 and the first electrode portion 52a along the first direction D1 is defined as the first electrode portion distance d52a. In this example, the first electrode portion distance d52a is longer than the third electrode distance d53 (the distance between the first electrode 51 and the third electrode 53 along the first direction D1). As will be described below, the relationship between these distances can be modified in various ways.

[0037] FIG. 2 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 2, in the semiconductor device 110a according to the embodiment, the first electrode portion distance d52a is shorter than the third electrode distance d53. Except for this, the configuration of the semiconductor device 110a may be the same as the configuration of the semiconductor device 110.

[0038] 2, the distance along the first direction D1 between the first electrode 51 and the second insulating region 41b is defined as the second insulating region distance d41b. In this example, the first electrode portion distance d52a is longer than the second insulating region distance d41b.

[0039] FIG. 3 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 3, in the semiconductor device 110b according to this embodiment, the first electrode portion distance d52a is shorter than the second insulating region distance d41b. Except for this, the configuration of the semiconductor device 110b may be similar to the configuration of the semiconductor device 110.

[0040] The leakage current can also be suppressed in the semiconductor device 110a and the semiconductor device 110b. The relationship between the first electrode portion distance d52a and other distances described for the semiconductor device 110a, the semiconductor device 110b, and the semiconductor device 110b may be applied to various semiconductor devices described below.

[0041] FIG. 4 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 4, in the semiconductor device 111 according to the embodiment, the shape of the first insulating member 41 is different from that in the semiconductor device 110. Except for this, the configuration of the semiconductor device 111 may be the same as the configuration of the semiconductor device 110.

[0042] As shown in FIG. 4, the first insulating region 41a has a first thickness t1 along the second direction D2. The second insulating region 41b has a second thickness t2 along the first direction D1. The second thickness t2 is thicker than the first thickness t1. This thickness relationship can reduce losses due to, for example, capacitance between the bottom of the gate and the drain. For example, the loss Qgd in the semiconductor device 111 can be reduced to approximately 0.61 times the loss Qgd in the semiconductor device 110.

[0043] In the embodiment, the ratio (t2 / t1) of the second thickness t2 to the first thickness t1 may be, for example, 1.1 or more. This can effectively suppress loss. The ratio (t2 / t1) may be, for example, 10 or less.

[0044] FIG. 5 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 5, a semiconductor device 112 according to the embodiment is provided with a second semiconductor region 12. Except for this, the configuration of the semiconductor device 112 may be the same as the configuration of the semiconductor device 111 or the semiconductor device 110.

[0045] In the semiconductor device 112, the semiconductor member 10M further includes a second semiconductor region 12. The second semiconductor region 12 is located between the first partial region 11a and the second insulating region 41b in the first direction D1. In this example, the second semiconductor region 12 is located between the fifth partial region 11e and the second insulating region 41b in the first direction D1.

[0046] In one example, the first semiconductor region 11 is one of the first and second conductivity types (e.g., n-type), and the second semiconductor region 12 is the other of the first and second conductivity types (e.g., p-type). By providing such a second semiconductor region 12, for example, it is possible to reduce loss caused by capacitance between the bottom of the gate and the drain.

[0047] In the embodiment, the first semiconductor region 11 and the second semiconductor region 12 may satisfy a first condition or a second condition. In the first condition, the first semiconductor region 11 is one of the first conductivity type and the second conductivity type. In the first condition, the second semiconductor region 12 is the other of the first conductivity type and the second conductivity type.

[0048] Under the second condition, the first semiconductor region 11 and the second semiconductor region 12 are of the first conductivity type (or may be of the second conductivity type). Under the second condition, the second impurity concentration in the second semiconductor region 12 is different from the first impurity concentration in the first semiconductor region 11. For example, the second impurity concentration is lower than the first impurity concentration.

[0049] For example, the semiconductor member 10M (the first semiconductor region 11 and the second semiconductor region 12) may contain silicon. In this case, the second semiconductor region 12 may contain at least one first element (p-type impurity) selected from the group consisting of boron and aluminum. The first semiconductor region 11 does not contain the first element. Alternatively, the second concentration of the first element in the second semiconductor region 12 is higher than the first concentration of the first element in the first semiconductor region 11.

[0050] For example, the first semiconductor region 11 may contain at least one (n-type impurity) selected from the group consisting of phosphorus and arsenic. The second semiconductor region 12 may also contain at least one (n-type impurity) selected from the group consisting of phosphorus and arsenic. For example, the second semiconductor region 12 may contain p-type impurities at a concentration higher than the concentration of the n-type impurity. For example, the second semiconductor region 12 may be formed by co-doping.

[0051] In the semiconductor device 112, the second semiconductor region 12 may be provided while applying the relationship between the first thickness t1 and the second thickness t2 described for the semiconductor device 111. The loss Qgd in such a semiconductor device 112 can be reduced to approximately 0.58 times the loss Qgd in the semiconductor device 110.

[0052] FIG. 6 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 6, a semiconductor device 113 according to the embodiment is provided with a second conductive member 62. Except for this, the configuration of the semiconductor device 113 may be similar to the configuration of the semiconductor device 110.

[0053] The semiconductor device 113 further includes a second conductive member 62. The second conductive member 62 is located between the first partial region 11a and the third electrode 53 in the first direction D1. In this example, the second conductive member 62 is located between the fifth partial region 11e and the third electrode 53 in the first direction D1.

[0054] The first insulating member 41 further includes a fourth insulating region 41d. The second insulating region 41b is located between the second conductive member 62 and the third electrode 53 in the first direction D1. The fourth insulating region 41d is located between the first partial region 11a and the second conductive member 62 in the first direction D1. In this example, the fourth insulating region 41d is located between the fifth partial region 11e and the second conductive member 62 in the first direction D1.

[0055] The provision of the second conductive member 62 can reduce, for example, loss due to the capacitance between the bottom of the gate and the drain. The loss Qgd in such a semiconductor device 113 can be reduced to about 0.05 times the loss Qgd in the semiconductor device 110.

[0056] The second conductive member 62 may be electrically connected to the second electrode 52. The electrical connection may be achieved by a connecting member 61L or the like.

[0057] FIG. 7 is a schematic cross-sectional view illustrating the semiconductor device according to the first embodiment. 7, in the semiconductor device 114 according to the embodiment, the shape of the second electrode 52 is different from that in the semiconductor device 110. Except for this, the configuration of the semiconductor device 114 may be the same as the configuration of the semiconductor device 110.

[0058] In the semiconductor device 114, the second electrode 52 includes a third electrode portion 52c. The third electrode portion 52c is connected to the first electrode portion 52a. The third electrode portion 52c is provided between the first insulating portion 42a and the first electrode portion 52a. The semiconductor device 114 also suppresses leakage current.

[0059] In the semiconductor device 114, the first semiconductor region 11 may further include a fifth partial region 11e. The fifth partial region 11e is located between the first partial region 11a and the second insulating region 41b in the first direction D1. The second insulating member 42 further includes a second insulating portion 42b. The second insulating portion 42b is located between the fifth partial region 11e and the third electrode portion 52c in the second direction D2. The third electrode portion 52c, for example, suppresses electric field concentration.

[0060] (Second embodiment) FIG. 8 is a schematic perspective view illustrating the semiconductor device according to the second embodiment. 8, in the semiconductor device 120 according to the embodiment, the second electrode 52 includes a plurality of first electrode portions 52a. The various configurations described in relation to the first embodiment may be applied to the semiconductor device 120.

[0061] In the semiconductor device 120, the third electrode 53 includes a first portion p1 and a second portion p2. One of the multiple first electrode portions 52a is located between the first portion p1 and the second portion p2 in the second direction D2. The third electrode 53 may include a third portion p3 and a fourth portion p4. For example, another of the multiple first electrode portions 52a is located between the third portion p3 and the fourth portion p4 in the third direction D3. The third direction D3 intersects with a plane including the first direction D1 and the second direction D2. The third direction D3 may be, for example, the Y-axis direction.

[0062] The semiconductor device 120 makes it easy to provide a plurality of first electrode portions 52a at high density. For example, at least a portion of the third electrode 53 may have a lattice shape extending along the second direction D2 and the third direction D3. The planar shape of at least a portion of the third electrode 53 may be a honeycomb shape. Electrical connection of the third electrode 53 is easy.

[0063] In an embodiment, the semiconductor member 10M may include silicon or diamond, etc. The semiconductor member 10M may include a compound semiconductor, which may include, for example, SiC, SiGe, GaN, or GaAs, etc.

[0064] The first electrode 51 may include, for example, a metal. The first electrode 51 may include, for example, at least one selected from the group consisting of Al, Au, Ag, Cu, Ni, Ti, and W. The second electrode 52 may include, for example, at least one selected from the group consisting of Ni, Ti, Pt, Ir, TiO2, and Co. The third electrode 53 may include a metal or polysilicon. At least one of the first conductive member 61 and the second conductive member 62 may include a metal or polysilicon.

[0065] In an embodiment, information about the shape of the semiconductor region can be obtained by, for example, electron microscope observation. Information about the composition and element concentration in the semiconductor region can be obtained by, for example, energy dispersive X-ray spectroscopy (EDX) or secondary ion mass spectrometry (SIMS). Information about the composition in the semiconductor region can be obtained by, for example, reciprocal space mapping.

[0066] The embodiments may include the following technical solutions. (Technical proposal 1) A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction, the second electrode including a first electrode portion and a second electrode portion connected to the first electrode portion; A third electrode; a semiconductor member including a first semiconductor region, the first semiconductor region including a first partial region, a second partial region, a third partial region, and a fourth partial region, a second direction from the first partial region to the second partial region intersects with the first direction, the third partial region is between the first partial region and the second partial region in the second direction, the first partial region is between the first electrode and the third electrode in the first direction, the second partial region is between the first electrode and the first electrode portion in the first direction, the fourth partial region is between the third partial region and the second electrode portion in the first direction, the fourth partial region is between the third electrode and the first electrode portion in the second direction, and the first electrode portion is in contact with the fourth partial region; a first insulating member including a first insulating region and a second insulating region, the first insulating region being between the third electrode and the fourth partial region in the second direction, and the second insulating region being between the first partial region and the third electrode in the first direction; a second insulating member including a first insulating portion, the first insulating portion being between the second portion region and the first electrode portion in the first direction; A semiconductor device comprising:

[0067] (Technical proposal 2) Further comprising a first conductive member; the first conductive member is located between the second partial region and the first electrode portion in the first direction; A semiconductor device described in Technical Solution 1, wherein at least a portion of the first insulating portion is between the first conductive member and the first electrode portion.

[0068] (Technical proposal 3) the first semiconductor region further includes a fifth partial region; the fifth partial region is located between the first partial region and the second insulating region in the first direction; the second insulating member further includes a second insulating portion; A semiconductor device described in Technical Proposal 2, wherein the second insulating portion is located between the fifth portion region and the first conductive member in the second direction.

[0069] (Technical proposal 4) the first conductive member includes a first end and a second end; the first end is located between the second end and the first insulating portion in the first direction; A semiconductor device described in Technical Solution 2 or 3, wherein an upper end distance along the first direction between the first electrode and the first end is shorter than a third electrode distance along the first direction between the first electrode and the third electrode.

[0070] (Technical proposal 5) The semiconductor device according to any one of Technical Solutions 2 to 4, wherein the first conductive member is electrically connected to the second electrode.

[0071] (Technical proposal 6) the second electrode further includes a third electrode portion connected to the first electrode portion; The semiconductor device described in Technical Proposal 1, wherein the third electrode portion is provided between the first insulating portion and the first electrode portion.

[0072] (Technical proposal 7) the first semiconductor region further includes a fifth partial region; the fifth partial region is located between the first partial region and the second insulating region in the first direction; the second insulating member further includes a second insulating portion; The semiconductor device described in Technical Solution 6, wherein the second insulating portion is located between the fifth portion region and the third electrode portion in the second direction.

[0073] (Technical proposal 8) A semiconductor device described in any one of technical proposals 1 to 3, wherein a first electrode portion distance along the first direction between the first electrode and the first electrode portion is longer than a third electrode distance along the first direction between the first electrode and the third electrode.

[0074] (Technical proposal 9) The semiconductor device according to any one of Technical Solutions 1 to 8, wherein the first electrode portion and the fourth partial region form a Schottky contact.

[0075] (Technical proposal 10) the first insulating region has a first thickness along the second direction; the second insulating region has a second thickness along the first direction; The semiconductor device according to any one of Technical Schemes 1 to 9, wherein the second thickness is greater than the first thickness.

[0076] (Technical proposal 11) The semiconductor device according to Technical Solution 10, wherein the ratio of the second thickness to the first thickness is 1.1 or more.

[0077] (Technical proposal 12) The semiconductor member further includes a second semiconductor region, the second semiconductor region is located between the first partial region and the second insulating region in the first direction; the semiconductor member includes silicon, the second semiconductor region includes at least one first element selected from the group consisting of boron and aluminum; The semiconductor device described in any one of Technical Proposals 1 to 11, wherein the first semiconductor region does not contain the first element, or the second concentration of the first element in the second semiconductor region is higher than the first concentration of the first element in the first semiconductor region.

[0078] (Technical proposal 13) The semiconductor device according to Technical Proposal 12, wherein the first semiconductor region contains at least one selected from the group consisting of phosphorus and arsenic.

[0079] (Technical proposal 14) The semiconductor member further includes a second semiconductor region, the second semiconductor region is located between the first partial region and the second insulating region in the first direction; the first semiconductor region and the second semiconductor region satisfy a first condition or a second condition, In the first condition, the first semiconductor region is one of a first conductivity type and a second conductivity type, and the second semiconductor region is the other of the first conductivity type and the second conductivity type; A semiconductor device described in any one of Technical Proposals 1 to 11, wherein, under the second condition, the first semiconductor region and the second semiconductor region are of the first conductivity type, and a second impurity concentration in the second semiconductor region is different from a first impurity concentration in the first semiconductor region.

[0080] (Technical proposal 15) Further comprising a second conductive member; the second conductive member is located between the first partial region and the third electrode in the first direction; the first insulating member further includes a fourth insulating region; the second insulating region is located between the second conductive member and the third electrode in the first direction, The semiconductor device according to any one of Technical Solutions 1 to 11, wherein the fourth insulating region is located between the first partial region and the second conductive member in the first direction.

[0081] (Technical proposal 16) the first insulating member further includes a third insulating region; The semiconductor device according to any one of technical proposals 1 to 15, wherein the third insulating region is located between the third electrode and at least a portion of the second electrode portion in the first direction.

[0082] (Technical proposal 17) the first electrode portion includes a first surface and a second surface; the first surface intersects with the second surface; the first surface faces the first electrode, the first surface is not in contact with the first semiconductor region, The semiconductor device according to any one of Technical Solutions 1 to 16, wherein the second surface is in contact with the fourth partial region.

[0083] (Technical proposal 18) the second electrode includes a plurality of the first electrode portions; the third electrode includes a first portion and a second portion; The semiconductor device according to any one of Technical Solutions 1 to 17, wherein one of the plurality of first electrode portions is located between the first portion and the second portion in the second direction.

[0084] (Technical proposal 19) the third electrode includes a third portion and a fourth portion; another one of the plurality of first electrode portions is located between the third portion and the fourth portion in a third direction; The semiconductor device described in Technical Proposal 18, wherein the third direction intersects with a plane including the first direction and the second direction.

[0085] (Technical proposal 20) The semiconductor device described in Technical Proposal 19, wherein at least a portion of the third electrode is in a lattice shape extending along the second direction and the third direction.

[0086] According to the embodiment, a semiconductor device with improved characteristics can be provided.

[0087] The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configurations of each element included in the semiconductor device, such as the electrodes, semiconductor members, semiconductor regions, and insulating members, are within the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain similar effects by appropriately selecting them from known ranges.

[0088] Furthermore, any combination of two or more elements of each specific example within the scope of technical feasibility is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0089] In addition, all semiconductor devices that can be implemented by a person skilled in the art by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also fall within the scope of the present invention as long as they include the gist of the present invention.

[0090] In addition, within the scope of the concept of the present invention, a person skilled in the art may come up with various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0091] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0092] 10M: semiconductor member, 11, 12: first and second semiconductor regions, 11L: first semiconductor layer, 11a-11e: first to fifth partial regions, 41, 42: first and second insulating members, 41a-41d: first to fourth insulating regions, 42a-42c: first to third insulating portions, 51-53: first to third electrodes, 52F, 52G: first and second surfaces, 52a-52c: first to third electrode portions, 61, 62: first and second conductive members, 61L: connecting member, 61a, 62b: first and second ends, 110, 110a, 110b, 111-114, 120: semiconductor device, D1-D3: first to third directions, d41b: second insulating region distance, d52a: 1st electrode part distance, d53: 3rd electrode distance, d61a: Top end distance, p1~p4: 1st~4th part, t1, t2: 1st, 2nd thickness

Claims

1. A first electrode; a second electrode, the direction from the first electrode to the second electrode being along a first direction, the second electrode including a first electrode portion and a second electrode portion connected to the first electrode portion; A third electrode; a semiconductor member including a first semiconductor region, the first semiconductor region including a first partial region, a second partial region, a third partial region, and a fourth partial region, a second direction from the first partial region to the second partial region intersects with the first direction, the third partial region is between the first partial region and the second partial region in the second direction, the first partial region is between the first electrode and the third electrode in the first direction, the second partial region is between the first electrode and the first electrode portion in the first direction, the fourth partial region is between the third partial region and the second electrode portion in the first direction, the fourth partial region is between the third electrode and the first electrode portion in the second direction, and the first electrode portion is in contact with the fourth partial region; a first insulating member including a first insulating region and a second insulating region, the first insulating region being between the third electrode and the fourth partial region in the second direction, and the second insulating region being between the first partial region and the third electrode in the first direction; a second insulating member including a first insulating portion, the first insulating portion being between the second portion region and the first electrode portion in the first direction; A semiconductor device comprising:

2. Further comprising a first conductive member; the first conductive member is located between the second partial region and the first electrode portion in the first direction; The semiconductor device according to claim 1 , wherein at least a portion of said first insulating portion is between said first conductive member and said first electrode portion.

3. the first semiconductor region further includes a fifth partial region; the fifth partial region is located between the first partial region and the second insulating region in the first direction; the second insulating member further includes a second insulating portion; The semiconductor device according to claim 2 , wherein the second insulating portion is located between the fifth region and the first conductive member in the second direction.

4. the second electrode further includes a third electrode portion connected to the first electrode portion; The semiconductor device according to claim 1 , wherein said third electrode portion is provided between said first insulating portion and said first electrode portion.

5. 5. The semiconductor device according to claim 1, wherein the first electrode portion and the fourth partial region form a Schottky contact.

6. the first insulating region has a first thickness along the second direction; the second insulating region has a second thickness along the first direction; The semiconductor device according to claim 1 , wherein the second thickness is greater than the first thickness.

7. The semiconductor member further includes a second semiconductor region, the second semiconductor region is located between the first partial region and the second insulating region in the first direction; the first semiconductor region and the second semiconductor region satisfy a first condition or a second condition, In the first condition, the first semiconductor region is one of a first conductivity type and a second conductivity type, and the second semiconductor region is the other of the first conductivity type and the second conductivity type; 2. The semiconductor device according to claim 1, wherein, under the second condition, the first semiconductor region and the second semiconductor region are of the first conductivity type, and a second impurity concentration in the second semiconductor region is different from a first impurity concentration in the first semiconductor region.

8. Further comprising a second conductive member; the second conductive member is located between the first partial region and the third electrode in the first direction; the first insulating member further includes a fourth insulating region; the second insulating region is located between the second conductive member and the third electrode in the first direction, The semiconductor device according to claim 1 , wherein the fourth insulating region is located between the first partial region and the second conductive member in the first direction.

9. the second electrode includes a plurality of the first electrode portions; the third electrode includes a first portion and a second portion; The semiconductor device according to claim 1 , wherein one of the plurality of first electrode portions is located between the first portion and the second portion in the second direction.

10. the third electrode includes a third portion and a fourth portion; another one of the plurality of first electrode portions is located between the third portion and the fourth portion in a third direction; The semiconductor device according to claim 9 , wherein the third direction intersects with a plane including the first direction and the second direction.

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