Variable Dispatch Walk for Consecutive Cache Accesses

Abstract

The processing system [100] is configured to transform a first cache access pattern of a dispatch [135] of a work item into a cache access pattern [145] that facilitates consumption of data stored in the cache [120] of the parallel processing unit [110] by subsequent accesses before the data is evicted to a more distant level of the memory hierarchy. For sequential cache accesses with read-after-read data locality, the processing system transforms the first cache access pattern into a space-filling curve [506]. For sequential accesses with read-after-write data locality, the processing system transforms a first typewriter cache access pattern [512] that proceeds in ascending order for the first access into a reverse typewriter cache access pattern [514] that proceeds in descending order for the subsequent cache accesses. By transforming the cache access pattern based on data locality, the processing system increases the hit rate of the cache.

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