Low-cost contact-passivated all-back contact solar cell and method for fabrication thereof

Abstract

The present invention discloses a low-cost contact passivation all back contact solar cell and its manufacturing method, which includes the steps of: using a P-type single crystal silicon wafer (2) as a silicon substrate, performing an alkaline polishing process S1, performing RCA cleaning and HF cleaning S2, growing a tunnel silicon oxide thin film layer, an in-situ doped amorphous silicon thin film layer, and a texturing mask layer on the back surface of the silicon wafer (2) S3, performing annealing activation on the amorphous silicon thin film layer to convert it into a polycrystalline silicon thin film layer (3) S4, laser etching the texturing mask layer S5, performing double-sided texturing on the silicon wafer (2) S6, performing HF cleaning and texturing S7, and then performing a 3D laser etching process on the texturing mask layer S8. The method includes steps S7 of removing the charring mask layer, S8 of depositing an aluminum oxide thin film on the front and back surfaces of the silicon wafer (2), S9 of depositing a silicon nitride passivation film or a silicon nitride / silicon nitride oxide laminated passivation film on the front and back surfaces of the silicon wafer (2), S10 of laser ablation of a part of the aluminum oxide thin film and a part of the silicon nitride passivation film or the silicon nitride / silicon nitride oxide laminated passivation film on the back surface of the silicon wafer (2), and S11 of screen printing on the back surface of the silicon wafer (2) and sintering, in which silver paste is used for the contact passivation region and aluminum paste is used for the back surface region.

Description

[Technical field]

[0001] The present invention relates to the technical field of crystalline silicon solar cells, and in particular to a low-cost contact-passivated all-back contact solar cell and method for its manufacture. [Background technology]

[0002] The all-back contact cell is the most efficient and most potential cell structure among current crystalline silicon solar cells, and both the positive and negative electrodes are located on the back side of the cell. Compared with traditional cells, it completely eliminates the shading loss of the front grid line and also provides more space for the back structure design. Contact passivation technology (TopCon) is considered to be the most potential next-generation passivation technology after PERC cell technology, which utilizes the passivation effect of the tunnel oxide layer and the good metal area of ​​the polycrystalline silicon thin film layer to greatly reduce the recombination under the metal grid line of the cell. In recent years, the combination of all-back contact and contact passivation technology has become an industry research hotspot, and photovoltaic power generation companies and scientific research institutes such as SunPower in the United States, Fraunhofer ISE Institute in Germany, and ISFH Institute in Germany have all made relatively good progress in mass production and laboratories, with cell conversion efficiencies exceeding 25% for large areas and 26% for small areas, showing very good prospects for industrial application.

[0003] However, the above-mentioned manufacturing methods of all back electrode batteries have complicated processes and relatively high costs, and upgrading and modifying the traditional PERC production line requires a relatively high price. "Increase efficiency and reduce costs" is a permanent theme in the photovoltaic power generation industry. In the situation where the efficiency of PERC batteries is gradually approaching the theoretical limit, it is necessary to develop a new type of battery technology that can be upgraded and changed to a new generation on the traditional PERC production line, and it is urgent to extend the use cycle of traditional PERC equipment and reduce the manufacturing cost per watt of the battery in the whole industry. In addition, with the continuous improvement of P-type silicon wafer materials, their minority carrier lifetime is becoming higher and higher, which can meet the technical requirements of the all back cell structure. Summary of the Invention

[0004] The objective of the present invention is to provide a manufacturing method for contact passivation all back contact solar cells with good process compatibility and low cost, which can upgrade new cell technologies and change generations based on traditional PERC manufacturing lines, extend the service life of traditional PERC equipment, and reduce the manufacturing cost per watt of cells in the entire industry.

[0005] The present invention is realized by the following technical solution: A method for manufacturing a low-cost contact passivation all back contact solar cell, comprising: The method comprises the following steps in sequence: S1: using a P-type single crystal silicon wafer as a silicon substrate and subjecting the silicon substrate to an alkali polishing process; S2 is where high-cleanliness RCA cleaning and HF cleaning are performed after alkaline polishing. growing a tunnel silicon oxide thin film layer, an in-situ doped amorphous silicon thin film layer, and a texturing mask layer on the back surface of the silicon wafer (S3); S4 performing an anneal activation on the amorphous silicon thin film layer, thereby converting the amorphous silicon thin film layer into a polycrystalline silicon thin film layer; S5 laser etching the texturing mask layer on the backside of the silicon wafer; S6 performing double-sided texturing on the silicon wafer; S7, which performs HF cleaning after texturing and removes the texturing mask layer; S8 depositing an aluminum oxide thin film simultaneously on the front and back surfaces of the silicon wafer; S9 deposits a silicon nitride passivation film or a silicon nitride / silicon oxynitride laminated passivation film on the front and back surfaces of the silicon wafer; S10: laser ablation of a part of the aluminum oxide thin film and a part of the silicon nitride passivation film or the silicon nitride / silicon nitride oxide stacked passivation film on the rear surface of the silicon wafer; S11: screen printing is performed on the back surface of the silicon wafer and sintered; wherein the contact passivation area uses silver paste and the backside area uses aluminum paste.

[0006] Specifically, the manufacturing method of the low-cost P-type silicon wafer contact passivation type all back electrode crystalline silicon solar cell designed by the solution of the present invention is as follows: a P-type single crystal silicon wafer is used as the silicon substrate, a polishing process is first performed, and then a tunnel silicon oxide thin film layer, a doped amorphous silicon thin film layer, and a texturing mask layer are grown on the back surface of the cell; the three kinds of film layers are deposited in the same device; after the amorphous silicon layer is annealed and activated, the mask layer in the P-type region on the back surface of the cell is laser ablated, and then a texturing process is performed; an aluminum oxide thin film is deposited on both sides; an anti-reflective passivation film is deposited on the front and back surfaces of the cell respectively; a part of the aluminum oxide / anti-reflective passivation film in the back surface field region on the back surface is laser ablated to form a local aluminum back surface field; and finally, the electrodes are printed and sintered.

[0007] The manufacturing method of the low-cost contact passivation full back electrode solar cell designed and proposed by the present invention makes full use of the characteristics of PECVD single-sided coating and the flexible growth of multiple types of thin films in a single cavity, and completes the contact passivation structure film layer and the mask film layer of the full back electrode cell in one process step, effectively reducing the process steps, reducing the consumption of silver paste, and improving the cell efficiency.

[0008] Further, there is provided a method for manufacturing a low-cost contact passivation all back electrode solar cell, in which step S1 includes using a P-type single crystal silicon wafer as a silicon substrate, the silicon wafer having a resistivity of 0.5-5 Ohmcm and a thickness of 120-200 μm, and then performing an alkaline polishing treatment on the silicon substrate at 75-85° C. using a 15-30 wt % KOH solution.

[0009] Further, there is provided a method for manufacturing a low-cost contact passivation all back electrode solar cell, in which step S3 uses a single-sided deposition PECVD tube or plate equipment to perform three-in-one multi-layer thin film deposition on the back surface of the silicon wafer to grow a tunnel silicon oxide thin film layer, an in-situ doped amorphous silicon thin film layer, and a texturing mask layer, and the thickness of the tunnel silicon oxide thin film layer is less than 2 nm, the amorphous silicon thin film layer is a thin film formed by in-situ doping, and its thickness is 50-200 nm, and the thickness of the texturing mask layer is 50-100 nm, and the material thereof may be SiONx (silicon nitride oxide), SiOx (silicon oxide) or SiNx (silicon nitride).

[0010] Further, a method for manufacturing a low-cost contact passivation all back contact solar cell, in which step S4 performs annealing activation on the amorphous silicon thin film layer, thereby converting the amorphous silicon thin film layer into a polycrystalline silicon thin film layer, and controlling the sheet resistance to 50-100 ohm / sq, in which the annealing activation can be performed using a tube oxidation furnace, the process temperature is 700-900°C, the annealing activation time is 1-2 hours, and the doping concentration after activation is between 1e18-5e20cm3.

[0011] Further, a method for manufacturing a low-cost contact passivation all back contact solar cell, in which step S6 comprises using potassium hydroxide or tetramethylammonium hydroxide solution to perform double-sided texturing on the silicon wafer to form a light-trapping texture structure.

[0012] Further, a method for manufacturing a low-cost contact passivated all back contact solar cell, in which step S7 comprises performing a 5-20 wt% HF clean after texturing to remove the deposited texturing mask layer.

[0013] Further, there is provided a method for manufacturing a low-cost contact passivation all back electrode solar cell, in which step S8 uses a double-sided deposition ALD tube-type or plate-type equipment to deposit the aluminum oxide thin film simultaneously on the front and back surfaces of the silicon wafer, and the thickness of the aluminum oxide thin film is 2 to 20 nm.

[0014] Further, there is provided a method for manufacturing a low-cost contact passivation all back electrode solar cell, in which step S9 uses tube-type or plate-type PECVD to deposit a silicon nitride passivation film or a silicon nitride / silicon oxynitride laminate passivation film on the front and back surfaces of the silicon wafer, respectively, and the thickness of the passivation film is 50-100 nm and the refractive index is 1.9-2.4.

[0015] Further, there is provided a method for producing a low-cost contact passivation all back contact solar cell, wherein the sintering temperature described in step S11 is 700 to 900°C.

[0016] A low-cost contact passivated all back contact solar cell, characterized in that the low-cost contact passivated all back contact solar cell is manufactured by the above manufacturing method, and the manufactured all back contact solar cell includes: a P-type monocrystalline silicon wafer, a front surface passivation film layer located on a front surface of the P-type monocrystalline silicon wafer, a polycrystalline silicon thin film layer located on a back surface of the P-type monocrystalline silicon wafer, an Al-BSF layer, a back surface passivation film layer, a first electrode located under the polycrystalline silicon thin film layer, and a second electrode located under the Al-BSF layer.

[0017] Specifically, the fabrication method for the low-cost contact-passivated full back contact solar cell described in the present invention includes the following specific steps:

[0018] In S1, a P-type single crystal silicon wafer is used as a silicon substrate, and the silicon substrate is subjected to an alkaline polishing process. The chemical used for the alkaline polishing is a 15 to 30 wt % KOH solution, and the process temperature is 75 to 85°C.

[0019] In S2, after alkaline polishing, high-cleanliness RCA cleaning and HF cleaning are performed.

[0020] S3 grows a three-in-one multilayer thin film on the back side of the silicon wafer, which is composed of a tunnel silicon oxide thin film layer, an in-situ doped amorphous silicon thin film layer (TopCon layer), and a texturing mask layer, of which the TopCon layer can be deposited using a deposition process with in-situ doping of phosphane+silane+hydrogen gas, and the texturing mask layer can be flexibly selected between thin films such as silicon oxide, silicon oxynitride, or silicon nitride based on the subsequent process, and the function of the texturing mask layer is to resist the corrosion of potassium hydroxide (KOH) or tetramethylammonium hydroxide (TMAH) solution during the subsequent double-sided texturing process.

[0021] S4 then performs annealing activation on the amorphous silicon thin film, the purpose of which is to activate the in-situ doped phosphorus atoms and simultaneously convert the amorphous silicon thin film layer deposited by PECVD into a polycrystalline silicon thin film layer, and in the high temperature process, hydrogen atoms in the thin film layer are converted into SiO 2 The Si / Si interface is diffused to saturate the surface dangling bonds and increase the passivation effect. This step can be carried out using a tube-type oxidation furnace, and the process temperature is 700 to 900°C.

[0022] S5 laser etches the above-mentioned texturing mask layer on the backside of the silicon wafer, using a laser to groove a certain area (the BSF area) on the backside of the cell silicon wafer, and ablate and remove a portion of the texturing mask layer deposited in step S3.

[0023] S6 then performs double-sided alkaline texturing on the silicon wafer, in which the polycrystalline silicon thin film layer deposited in step S3 is protected by a texturing mask layer to form a textured structure of front surface pyramids and back surface BSF pyramids. Before texturing, the silicon wafer needs to be pre-cleaned with HF to remove the oxide layer formed on the surface of the silicon wafer and reduce the impact on the uniformity of the texturing.

[0024] In step S7, after texturing, HF cleaning is performed to completely remove the texturing mask layer remaining on the rear surface of the silicon wafer.

[0025] S8 uses a double-sided deposition ALD tube or plate system to simultaneously deposit a thin aluminum oxide film on both the front and back sides of the silicon wafer. The negatively charged aluminum oxide (AlOx) can form a good field passivation effect on P-type Si, but the TopCon layer is not affected.

[0026] In step S9, a silicon nitride passivation film or a silicon nitride / silicon oxynitride laminated passivation film is deposited on the front and back surfaces of the silicon wafer.

[0027] S10 laser ablates a portion of the aluminum oxide thin film and a portion of the silicon nitride passivation film or silicon nitride / silicon nitride oxide stacked passivation film on the back surface of the silicon wafer, i.e., a groove cutting process is performed on a certain area (BSF area) on the back surface of the cell using a laser, and ablates a portion of the AlOx / SiNx / SiONx film layer deposited in step S9, in preparation for direct contact between the Al slurry electrode and the Si surface, forming an Al-BSF layer in the sintering process.

[0028] In step S11, the back surface of the silicon wafer is screen-printed and sintered. Silver paste is used for the contact passivation area and aluminum paste is used for the back surface area. Specifically, Ag electrodes and Al electrodes are screen-printed in the TopCon area and the BSF area, respectively. The final sintering process is performed using a general sintering furnace in the PERC production line, and the peak temperature is controlled to 700-900°C.

[0029] Beneficial Effects of the Invention: (1) The manufacturing method of the low-cost contact passivation all back contact solar cell designed by the present invention can be used to make relatively few upgrade modifications to the conventional PREC cell manufacturing line, and can produce solar cells with better cost performance and higher efficiency. The P-type all back contact solar cell of the present invention has the advantages of good process compatibility, high photoelectric conversion efficiency, and low manufacturing cost, and is of great significance for promoting the mass production of low-cost, high-performance solar cells.

[0030] (2) The present invention provides a method for manufacturing a low-cost contact passivated all back contact solar cell, which uses PECVD to deposit a tunnel oxide layer, a polysilicon thin film layer, and a texturing mask layer on one side, and utilizes conventional equipment in the PERC production line such as laser SE, laser groove and diffusion oxidation, and print sintering, thereby maximally retaining conventional PERC equipment while reducing the cost per watt and improving efficiency.

[0031] (3) The low-cost contact passivation full back electrode solar cell manufacturing method provided by the present invention makes full use of the characteristics of one-sided coating of PECVD and the flexible growth of various thin films in a single cavity, and completes the contact passivation structure film layer and the mask film layer of the full back electrode cell in one process step, effectively reducing the process steps, reducing the consumption of silver paste, and improving the cell efficiency.

[0032] (4) The process for depositing multi-layer thin film on the backside of silicon wafer designed by the present invention is a one-step method, which is superior; in the prior art, the deposition of tunnel silicon oxide thin film, intrinsic polycrystalline silicon thin film, and silicon nitride thin film needs to be completed by different equipment, so the battery needs more automated operations such as loading and unloading during the manufacturing process, which greatly affects the manufacturing yield. In addition, the prior art process is completed in stages, and the battery needs more thermal processes and heating / cooling processes, which also affects the battery efficiency; however, the present invention adopts a three-in-one multi-layer thin film deposition process, which is a one-step method, and can overcome these problems of the prior art process. [Brief description of the drawings]

[0033] In order to more clearly explain the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings used in the description of the embodiments. Of course, the drawings in the following description are only some embodiments of the present invention, and those skilled in the art can further derive other drawings based on these drawings without creative labor.

[0034] [Figure 1] FIG. 2 is a structural schematic diagram of a low-cost contact passivation full back contact solar cell manufactured according to the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0035] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention, but of course the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. The following description of at least one exemplary embodiment is merely illustrative in nature, and is not intended to limit the present invention and its application or use in any way. Any other embodiments obtained by those skilled in the art based on the embodiments of the present invention without performing any novel work are within the scope of the claims of the present invention.

[0036] Example 1 A method for manufacturing a low-cost contact-passivated full back contact solar cell includes the following specific steps:

[0037] In S1, a P-type single crystal silicon wafer is used as a silicon substrate, and the resistivity of the silicon wafer is 0.5 to 5 Ohmcm and the thickness is 120 to 200 μm. Next, the silicon substrate is subjected to an alkaline polishing treatment at 75 to 85° C. using a 15 to 30 wt % potassium hydroxide (KOH) solution.

[0038] In S2, after performing an alkaline polishing treatment, high-cleanliness RCA cleaning and HF cleaning are performed.

[0039] S3 uses tube-type (or plate-type) PECVD to perform single-sided deposition, and performs three-in-one multi-layer thin film deposition on the back side of a P-type single crystal silicon wafer to grow a tunnel silicon oxide thin film layer + an in-situ doped amorphous silicon thin film layer (TopCon layer) + a texturing mask layer, and the thickness of the tunnel silicon oxide thin film layer is less than 2 nm, the amorphous silicon thin film layer is a thin film deposited by in-situ doping, with a thickness of 50-200 nm, and the thickness of the texturing mask layer is 50-100 nm, and its material is SiNx, among which, the TopCon layer can be deposited by a deposition process of phosphane + silane + hydrogen gas with in-situ doping, and the function of the texturing mask layer is to resist the corrosion of potassium hydroxide or tetramethylammonium hydroxide solution during the subsequent double-sided texturing process.

[0040] In S4, the amorphous silicon thin film is annealed and activated using a tube-type oxidation furnace, with the aim of activating the in-situ doped phosphorus atoms and simultaneously converting the amorphous silicon thin film layer deposited by PECVD into a polycrystalline silicon thin film layer, with the sheet resistance controlled to 50-100 ohm / sq. In addition, during the high-temperature process, hydrogen atoms in the thin film layer are converted into SiO 2It can diffuse to the / Si interface to saturate the surface dangling bonds and increase the passivation effect. The annealing activation process temperature of this step is 700-900°C, the annealing activation time is 1-2 hours, and the doping concentration after activation is between 1e18-5e20cm3.

[0041] S5 laser etches the above texturing mask layer on the backside of the silicon wafer, using a laser to groove a certain area (the BSF area) on the backside of the cell silicon wafer, and ablate a portion of the texturing mask layer deposited in step S3.

[0042] S6 then uses a potassium hydroxide (KOH) or tetramethylammonium hydroxide (TMAH) solution to perform double-sided alkaline texturing on the P-type single crystal silicon wafer (the polycrystalline silicon thin film layer deposited in step S3 is protected by a texturing mask layer) to form a textured structure of front surface pyramids and back surface BSF pyramids, and before texturing, the silicon wafer is subjected to a HF pre-cleaning treatment to remove the oxide layer formed on the surface of the silicon wafer and reduce the impact on the texturing uniformity.

[0043] In step S7, after the texturing, 5 to 20 wt % HF cleaning is performed to completely remove the texturing mask layer remaining on the rear surface of the silicon wafer.

[0044] In S8, a double-sided deposition ALD tube or plate-type device is used to simultaneously deposit a 2-20 nm thick aluminum oxide thin film on both the front and back sides of the silicon wafer. The negatively charged aluminum oxide (AlOx) can form a good field passivation effect on P-type Si, but the TopCon layer is not affected by it.

[0045] S9 uses tube-type or plate-type PECVD to deposit a silicon nitride passivation film or a silicon nitride / silicon nitride oxide laminated passivation film on the front and back surfaces of a silicon wafer, respectively, and the passivation film has a thickness of 50-100 nm and a refractive index of 1.9-2.4.

[0046] S10 laser ablates a portion of the aluminum oxide thin film and a portion of the silicon nitride passivation film or silicon nitride / silicon nitride oxide stacked passivation film on the back surface of the silicon wafer, i.e., a groove cutting process is performed on a certain area (BSF area) on the back surface of the cell using a laser to ablate a portion of the AlOx / SiNx / SiONx film layer deposited in step S9, in preparation for direct contact between the Al slurry electrode and the Si surface, and forms an Al-BSF layer in the sintering process.

[0047] In step S11, Ag electrodes and Al electrodes are screen-printed in the TopCon region and the BSF region, respectively, and a final sintering process is performed using a general sintering furnace in a PERC manufacturing line. The sintering temperature is controlled to 700-900°C, completing the manufacture of the P-type full back contact solar cell.

[0048] As shown in FIG. 1 , the low-cost P-type silicon wafer contact passivation type all back electrode silicon solar cell manufactured by the present invention includes a P-type single crystal silicon wafer 2, a front surface passivation film layer 1 located on the front surface of the P-type single crystal silicon wafer 2, a polycrystalline silicon thin film layer 3 located on the back surface of the P-type single crystal silicon wafer 2, an Al-BSF layer 4, a back surface passivation film layer 5, a first electrode 6 located under the polycrystalline silicon thin film layer 3, and a second electrode 7 located under the Al-BSF layer 4.

[0049] The solution designed in the present invention can perform relatively minor upgrade modifications on existing PREC cell production lines, and can produce solar cells with better cost performance and higher efficiency. The manufactured P-type full back contact solar cells have the advantages of good process compatibility, high photoelectric conversion efficiency, and low manufacturing costs, which is of great significance for promoting the mass production of low-cost, high-performance solar cells.

[0050] The above are preferred embodiments of the present invention, which are only used to explain the present invention, and are not intended to limit the present invention. Any obvious changes or modifications introduced by the technical solutions of the present invention still fall within the protection scope of the present invention. [Explanation of symbols]

[0051] 1. Surface passivation film layer 2 P-type single crystal silicon wafer 3 Polycrystalline silicon thin film layer 4 Al-BSF layer 5 Backside passivation layer 6 1st electrode 7 Second electrode

Claims

1. A method for manufacturing a low-cost contact passivated all back contact solar cell, the method comprising the following steps in sequence: S1: a P-type single crystal silicon wafer is used as a silicon substrate, and an alkali polishing process is performed on the silicon substrate; S2, which performs RCA cleaning and HF cleaning after the alkaline polishing process; growing a tunnel silicon oxide thin film layer, an in-situ doped amorphous silicon thin film layer, and a texturing mask layer on the back surface of the silicon wafer (S3); S4 performing an anneal activation on the amorphous silicon thin film layer, thereby converting the amorphous silicon thin film layer into a polycrystalline silicon thin film layer; S5 laser etching the texturing mask layer on the backside of the silicon wafer; S6 performing double-sided texturing on the silicon wafer; S7: performing an HF clean after texturing and removing the texturing mask layer; depositing an aluminum oxide thin film on both the front and back surfaces of the silicon wafer at the same time; S9 depositing a silicon nitride passivation film or a silicon nitride / silicon oxynitride laminated passivation film on the front and back surfaces of the silicon wafer; S10: laser ablation of a part of the aluminum oxide thin film and a part of the silicon nitride passivation film or the silicon nitride / silicon oxynitride laminate passivation film on the rear surface of the silicon wafer; S11: screen printing on the back surface of the silicon wafer and sintering the same; A method of manufacturing, characterized in that the contact passivation area uses silver paste and the backside area uses aluminum paste.

2. The method for manufacturing a low-cost contact passivation all back electrode solar cell according to claim 1, characterized in that: step S1 is to use a P-type single crystal silicon wafer as the silicon substrate, and the resistivity of the silicon wafer is 0.5-5 Ohmcm and the thickness is 120-200 μm; and then use a 15-30 wt % KOH solution to carry out an alkali polishing treatment on the silicon substrate at 75-85° C.

3. Step S3 uses a single-sided deposition PECVD tube or plate equipment to perform a three-in-one multi-layer thin film deposition on the back side of the silicon wafer to grow the tunnel silicon oxide thin film layer, the in-situ doped amorphous silicon thin film layer, and the texturing mask layer; and The method for manufacturing a low-cost contact passivation full back electrode solar cell according to claim 1, characterized in that: the tunnel silicon oxide thin film layer has a thickness less than 2 nm; the amorphous silicon thin film layer is a thin film deposited by in-situ doping, and has a thickness of 50-200 nm; the texturing mask layer has a thickness of 50-100 nm, and its material is SiONx, SiOx or SiNx.

4. The method for manufacturing a low-cost contact passivation all back electrode solar cell according to claim 1, characterized in that: step S4 performs annealing activation on the amorphous silicon thin film layer, thereby transforming the amorphous silicon thin film layer into the polycrystalline silicon thin film layer, and controlling the sheet resistance to 50-100 ohm / sq, wherein the annealing activation can be performed using a tube oxidation furnace, the process temperature is 700-900°C, the annealing activation time is 1-2 hours, and the doping concentration after activation is between 1e18-5e20 cm-3.

5. 2. The method for manufacturing a low-cost contact passivated all back contact solar cell according to claim 1, wherein step S6 comprises using potassium hydroxide or tetramethylammonium hydroxide solution to perform double-sided texturing on the silicon wafer to form a textured structure for light trapping.

6. The method for manufacturing a low-cost contact passivated all back contact solar cell according to claim 1, characterized in that step S7 is to perform a 5-20 wt% HF clean after texturing to remove the deposited texturing mask layer.

7. The method for manufacturing a low-cost contact passivation all back electrode solar cell according to claim 1, characterized in that in step S8, the aluminum oxide thin film is deposited simultaneously on the front and back surfaces of the silicon wafer using a double-sided deposition ALD tube or plate type equipment, and the thickness of the aluminum oxide thin film is 2-20 nm.

8. The method for manufacturing a low-cost contact passivation all back electrode solar cell according to claim 1, characterized in that step S9 uses the tube-type or plate-type PECVD to deposit the silicon nitride passivation film or the silicon nitride / silicon nitride oxide stacked passivation film on the front surface and back surface of the silicon wafer, respectively, and the thickness of the passivation film is 50-100 nm, and the refractive index is 1.9-2.

4.

9. The method for manufacturing a low-cost contact passivation full back contact solar cell according to claim 1, characterized in that the sintering temperature in step S11 is 700-900°C.

10. A low-cost contact passivated all back electrode solar cell manufactured by the manufacturing method according to any one of claims 1 to 9, characterized in that the manufactured all back electrode solar cell includes the P-type monocrystalline silicon wafer (2), a front surface passivation film layer (1) located on the front surface of the P-type monocrystalline silicon wafer (2), the polycrystalline silicon thin film layer (3) located on the back surface of the P-type monocrystalline silicon wafer (2), an Al-BSF layer (4), a back surface passivation film layer (5), a first electrode (6) located under the polycrystalline silicon thin film layer (3), and a second electrode (7) located under the Al-BSF layer (4).

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