Joint structure

Abstract

The bonding structure can include a carrier including a first conductive contact and a second conductive contact, a first singulated element including a third conductive contact bonded directly to the first conductive contact without an adhesive, and a second singulated element including a fourth conductive contact bonded directly to the second conductive contact without an adhesive, wherein the first conductive contact and the second conductive contact are spaced apart by a contact spacing of 250 microns or less.

Description

[Technical field]

[0001] (CROSS REFERENCE TO RELATED APPLICATIONS) This application claims priority to U.S. Provisional Patent Application No. 63 / 313,639, "Joint Structure," filed February 24, 2022, the entire disclosure of which is incorporated herein by reference.

[0002] (Technical field) The present invention relates to a joint structure, and more particularly to a joint structure that improves the area efficiency of circuits and contacts. [Background technology]

[0003] Semiconductor elements, such as semiconductor wafers or integrated device dies, can be stacked and directly bonded together without adhesives. For example, non-conductive (dielectric or semiconductive) surfaces can be made extremely smooth and treated to enhance direct covalent bonding without applying more than touch pressure at room temperature. In some hybrid direct bond structures, the non-conductive field regions of the elements can be directly bonded together, and the corresponding conductive contact structures can be directly bonded together. [Brief description of the drawings]

[0004] [Figure 1A] 1 illustrates a conventional method for singulating a wafer. [Figure 1B] 1 shows various size dies with edge exclusion according to a conventional method. [Figure 1C] 1 shows various size dies with edge exclusion according to a conventional method. [Figure 1D] 1 shows various size dies with edge exclusion according to a conventional method. [Figure 2A] 1 illustrates a method for forming a die with reduced edge exclusion according to an embodiment. [Figure 2B] 1 illustrates a method for forming a die with reduced edge exclusion according to an embodiment. [Figure 2C] 1 illustrates a method for forming a die with reduced edge exclusion according to an embodiment. [Figure 2D] 1 illustrates a method for forming a die with reduced edge exclusion according to an embodiment. [Figure 2E] 1 illustrates a method for forming a die with reduced edge exclusion according to an embodiment. [Figure 2F] 1 illustrates a method for forming a die with reduced edge exclusion according to an embodiment. [Figure 2G] 1 illustrates a method for forming a die with reduced edge exclusion according to an embodiment. [Figure 2H] 1 illustrates a method for forming a die with reduced edge exclusion according to an embodiment. [Diagram 3] 1 illustrates an exemplary embodiment of a singulation element that can employ reduced edge exclusion distance. [Figure 4A] 1 shows an embodiment of a joint structure. [Figure 4B] 1 shows an embodiment of a joint structure. [Figure 4C] 1 shows an embodiment of a joint structure. [Figure 4D] 1 shows an embodiment of a joint structure. [Figure 4E] 1 shows an embodiment of a joint structure. [Figure 4F] 1 shows an embodiment of a joint structure. [Figure 4G] 1 shows an embodiment of a joint structure. [Figure 4H] 1 shows an embodiment of a joint structure. [Figure 4I] 1 shows an embodiment of a joint structure. [Figure 4J] 1 shows an embodiment of a joint structure. [Figure 4J-2] 1 shows an embodiment of a joint structure. [Figure 4K] 1 shows an embodiment of a joint structure. [Figure 5A] 1 illustrates a process for forming a direct hybrid bonded structure without the use of an adhesive according to some embodiments. [Figure 5B] 1 illustrates a process for forming a direct hybrid bonded structure without the use of an adhesive according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0005] Over the years, there has been a trend to integrate more and more functions onto a chip to form a system on a chip (SoC). More recently, there has been a trend to split circuits into multiple chips and reassemble them in an assembly process. Advantages of such splitting include potentially lower costs for some circuits, since different technologies can be used for different chips or chiplets, as well as higher yields for a given level of contamination, since more chips or chiplets can be produced from a wafer, compared to a very large SoC chip.

[0006] As shown in FIG. 1A, a substrate 101 (e.g., a wafer) is prepared on a dicing frame 102 for singulation into a number of singulated elements 103 separated by saw streets 104. Conventional device manufacturing and assembly techniques impose limitations on the overall circuit density of a system, especially when functions are divided into multiple elements and aggregated by packaging. For example, vertical connections between stacked elements, such as copper pillars or solder balls 105, require minimum spacing between pads or extension of contacts through redistribution layers (RDLs). Such minimum spacing is exacerbated at the edges of laterally adjacent devices due to conventional exclusion zones around the devices, in part due to the use of saws to singulate chips from the wafer. For example, conventional exclusion zones are utilized to space the active area and / or pads of a die away from the saw streets to reduce or minimize damage that may occur during the dicing or singulation process. Limited alignment accuracy of pick-and-place and / or bonding tools may also impose limitations on the density of devices within an assembly. Substructure damage to devices near the die edge can reduce device yield. Traditional exclusion regions around the periphery of a chip represent lost "real estate" for active circuitry. If interconnect or contact pads are provided within the exclusion region, they are typically electrically inactive or "dummy" contact pads. Thus, electrically active pads (e.g., pads that electrically connect to circuitry within the die, such as signal lines, power lines, or ground) are spaced inward from the edge of the die by the exclusion region.

[0007] 1B-1D show singulation elements of various sizes. Each singulation element 103 can comprise a substrate 101 and solder balls 105 as described in connection with FIG. 1A. As shown in FIGS. 1B-1D, the electrically active bond pads may be spaced from the die edge 106 by an edge exclusion distance 107 that represents the unused "space" of the die. The edge exclusion distance 107 (and edge exclusion area) increases significantly with decreasing die size such that for small dies (e.g., dies with a maximum width of less than 4 mm, less than 3 mm, or less than 2 mm), the edge exclusion distance becomes a relatively large percentage of the die. Thus, as the exclusion distance 107 increases, the effective area for devices within the die decreases. For structures in which the die is soldered to the carrier, the exclusion distance 107 can be significant due to the large pitch between adjacent pads that is used to prevent solder bridging that occurs at finer pitches. A large edge exclusion area reduces design flexibility regarding the number of functional pads (input / output, or I / O) on a given die and increases the distance for electrical connections between elements (passive components, chips, chiplets, etc.) in a system, leading to reduced performance of the chip or chiplet. Illustratively, when using conventional methods to singulate a die, the typical edge exclusion is about 200 μm. In one example, an 8 mm×12 mm die with an edge exclusion distance of 200 μm results in about 8.2% of the die area being unused. In another example, a 4 mm×4 mm die with an edge exclusion distance of 200 μm results in about 19% of the die area being unused. In another example, a 1 mm×1 mm die with an edge exclusion distance of 200 μm results in about 64% of the die area being unused. Thus, there remains a need to reduce the exclusion area of ​​small dies to increase die design flexibility, increase the portion of the chip or chiplet that is designed for active or passive circuits, and enable a higher number of functional I / Os.

[0008] 2A-2H illustrate an exemplary process for forming singulated elements configured for direct hybrid bonding, according to various embodiments. As shown in FIG. 2A, a substrate 201 (e.g., a wafer) can include a bulk portion 208 and a bonding layer 209 covering the bulk portion 208. The bonding layer 209 can include a dielectric material with conductive contact features at least partially embedded therein. The bonding layer 209 can include a plurality of non-conductive regions 210 and a plurality of conductive contacts 211 at least partially embedded within the bonding layer 209. Advantageously, when configured for direct hybrid bonding, the contacts 211 can be provided at a pitch 212 that is significantly smaller than the pitch used for solder bonding. In FIG. 2A, the substrate 201 can be planarized. In some embodiments, the substrate is planarized by chemical mechanical polishing (CMP). In FIG. 2B, a protective layer 213 (such as photoresist) can be provided over the substrate 201. In some embodiments, the planarized surface 214 can have conductive contacts 211 recessed a small amount (e.g., less than 20 nm, less than 10 nm, or less than 5 nm) below the surrounding non-conductive field regions 210. In FIG. 2C, the protective layer 213 can be patterned to include recesses 215 therein, and in FIG. 2D, the substrate 201 can be transferred to a dicing frame 202. In FIG. 2E, the substrate 201 can be singulated into a plurality of singulation elements 203. In the illustrated embodiment, the substrate 201 is singulated using an etching process, such as a reactive ion etching (RIE) or plasma dicing process. Advantageously, compared to saw singulation, the RIE singulation process of the illustrated embodiment reduces damage to the edge of the die, thereby reducing edge defects and allowing for a smaller exclusion distance 207. In some embodiments, RIE singulation can result in an edge exclusion distance 207 of less than 40 μm, less than 20 μm, less than 15 μm, or less than 10 μm. In FIG. 2F, the protective layer 213 can be removed, and in FIG. 2G, the bonding surface 214 can be treated by ashing (e.g., to remove foreign matter from the protective layer), cleaning, and / or a surface activation treatment (e.g., nitrogen plasma treatment), etc.In FIG. 2H, the singulated die 203 can be washed, rinsed, and dried to prepare it for direct bonding to another element, such as a carrier. In some embodiments, the patterned substrate 201 of FIG. 2C can be singulated with a combination of dry etching (e.g., RIE), wet etchants, and fine dicing blades. For example, RIE can be applied to remove the dielectric material in the areas below the gaps in the resist mask. After the dry etch, an appropriate wet etchant can be used to remove the exposed conductive material. The remaining substrate (e.g., bulk semiconductor material) can be cut with a fine dicing blade, laser dicing, or dry etching to complete the singulation.

[0009] In some embodiments, the sides of the singulated die can be further processed. In some embodiments, the side edges of the singulated die can have an etched surface (e.g., a surface free of burrs or contaminants from saw singulation). The etched surface may include patterns indicative of an etching process (e.g., an RIE or wet etching process). In some embodiments, the sidewalls can be slightly tapered. For example, the sidewalls can have an angle between 85° and 90° with respect to the horizontal. In some embodiments, the sidewalls are substantially vertical. It can be advantageous to limit the taper of the sidewalls so that the singulated die can be brought closer together.

[0010] FIG. 3 illustrates an exemplary embodiment of a singulation element that employs a reduced edge exclusion distance and allows dies to be placed closer together. As seen in FIG. 3, the singulation element 303 can have a plurality of conductive contacts 311 surrounded by a plurality of non-conductive regions 310. In some embodiments, the plurality of conductive contacts 311 can include a conductive material. In some embodiments, the conductive material can include silver, gold, indium, nickel, or copper, or various alloys thereof. In another embodiment, the conductive material is copper. The singulation element 303 can include an edge exclusion distance 307, a pitch 312, and a width 316. The reduced edge exclusion distance 307 can be employed with any die size and has advantages for any die size. Particular advantages are obtained for relatively small dies (e.g., dies with a maximum width of less than 8 mm, less than 6 mm, less than 4 mm, less than 3 mm, less than 2 mm), such as chiplets or discrete devices with specific functions (e.g., passive components). FIG. 3 illustrates how the smaller edge exclusion area provides certain proportional advantages for smaller dies, as compared to the larger exclusion areas of, for example, FIGS. 1A-1D. For example, the methods and systems described herein can provide an edge exclusion distance of about 50 μm. In one example, the methods and systems described herein can provide a 4 mm×4 mm die with an edge exclusion distance of 50 μm, resulting in only about 4.9% unused die area. In another example, the methods and systems described herein can provide an exclusion distance of about 10 μm. In one embodiment, the methods and systems described herein can provide a 1 mm×1 mm die with an edge exclusion distance of 10 μm, resulting in only about 4% unused die area. In another embodiment, the methods and systems described herein can provide an edge exclusion distance of about 5 μm. In one example, the methods and systems described herein can provide a 0.4 mm×0.4 mm die with an edge exclusion distance of 5 μm, resulting in only about 5% unused die area. In some embodiments, the edge exclusion width is less than 10 μm, less than 5 μm, or less than 3 μm.In some embodiments, the edge exclusion can be in the range of 0.5 μm to 100 μm, 0.5 μm to 50 μm, 0.5 μm to 20 μm, 0.5 μm to 10 μm, 1 μm to 10 μm, or 2 μm to 10 μm. The reduced pitch 312 made possible by the hybrid direct bonding technique (as well as by RIE singulation of the die) facilitates a reduction in the edge exclusion area 307 compared to conventional structures. Furthermore, as shown in FIGS. 4A-4K, the reduced edge exclusion area 307 allows components to be directly bonded adjacent to each other and spaced apart with very small gaps. Advantageously, placing the die close together allows for effective die stitching, where closely spaced die are electrically connected via carriers with reduced delay and reduced electrical losses. In some embodiments, the ratio of edge exclusion distance to pitch is between 10 and 50. In some embodiments, the ratio of edge exclusion distance to pitch is less than 50, less than 15, less than 10, less than 5, or less than 2. In some embodiments, the edge exclusion width 307 is equal to or smaller than the pitch of the conductive features 311 adjacent the edge of the die.

[0011] 4A-4H show various embodiments of the bonding structure. As shown in FIG. 4A, the bonding structure 417 can include a carrier 418 including a first conductive contact 419 and a second conductive contact 420. In some embodiments, the carrier 418 can be a substrate (e.g., a wafer, a package, a flat panel, or a temporary substrate with a redistribution layer) or a die. In some embodiments, the carrier 418 can include a bonding layer 409 (as seen in FIG. 4K). The bonding layer can include a dielectric material with at least partially embedded conductive contact features. In some embodiments, the first conductive contact 419 and the second conductive contact 420 can be electrically connected (as seen in FIG. 4K). The bonding structure 417 can include a first singulated element 421 including a third conductive contact 422 directly bonded to the first conductive contact 419 without an adhesive. The bonding structure can also include a second singulated element 423 including a fourth conductive contact 424 directly bonded to the second conductive contact 420. In some embodiments, the joining element 421 or 423 (or both) may comprise a singulated package. The singulated package may comprise one or more dies at least partially embedded in an embedding material. In some embodiments, the conductive contacts are made of a conductive material. In some embodiments, the conductive material comprises silver, gold, indium, nickel, or copper, or various alloys thereof. In some embodiments, the conductive material is copper. An edge exclusion distance 407 between an outer edge 438 of the first singulated element 421 and the third conductive contact 422 may be less than 100 μm, such as 50 μm or less, or 10 μm or less (e.g., in the range of 1 μm to 100 μm). In some embodiments, the first and second singulated elements comprise dies 10 mm by 10 mm or less in size.

[0012] As seen in FIG. 4B , the first singulation element 421 can have a thickness 427 and a lateral width 428. In some embodiments, the first singulation element 421 has a maximum lateral width 428 of about 8 mm or less, about 6 mm or less, about 4 mm or less, about 3 mm or less, or about 2 mm or less. The second singulation element 423 can have a thickness 429 and a width 430. In some embodiments, the maximum lateral width 430 of the second singulation element 423 is about 8 mm or less, about 6 mm or less, about 4 mm or less, about 3 mm or less, or about 2 mm or less. The first conductive contact 419 and the second conductive contact 420 can be separated by a contact spacing 425 of 250 microns or less. In various embodiments, the contact spacing 425 is 200 microns or less, 100 microns or less, 50 microns or less, 10 microns or less, 5 microns or less, or 2 microns or less. For example, in various embodiments, the contact spacing 425 can be in the range of 1 micron to 250 microns, or in the range of 1 micron to 100 microns, or in the range of 1 micron to 20 microns. In some embodiments, the contact spacing 425 is between 0.4 and 8 times the thickness 427 of the first singulated element 421. In some embodiments, the contact spacing 425 is equal to or less than the thickness 427 of the first singulated element 421. In some embodiments, the contact spacing 425 is between 0.4 and 8 times the thickness 429 of the second singulated element 423. In some embodiments, the contact spacing 425 is equal to or less than the thickness 429 of the second singulated element 423. In some embodiments, the first singulated element 421 and the second singulated element 423 can be separated by an element spacing 426 of between about 5 μm (microns) and about 60 μm, e.g., less than about 25 μm. In some embodiments, element spacing 426 can be 60 μm or less, 20 μm or less, 10 μm or less, 9 μm or less, 8 μm or less, or 5 μm or less. In some embodiments, element spacing 426 can be in the range of 1 μm to 25 μm, in the range of 1 μm to 15 μm, in the range of 1 μm to 10 μm, in the range of 1 μm to 8 μm, or in the range of 1 μm to 5 μm. In some embodiments, the ratio of maximum lateral width 428 of first singulation element 421 to edge exclusion distance 407 is between 100 and 10, or less than 50, less than 10, or less than 5, or less than 2.In some embodiments, the ratio of the maximum lateral width 430 of the second singulation elements 423 to the edge exclusion distance 407 is between 100 and 10, or less than 50, or less than 10, or less than 5, or less than 2. In some embodiments, the element spacing 426 can be equal to or less than the edge exclusion distance 407.

[0013] As seen in Figure 4C, the width 428 of the first singulated element 421 may be greater than the width 430 of the second singulated element 423. As seen in Figure 4D, the thickness 427 of the first singulated element 421 may be greater than the thickness 429 of the second singulated element 423. In various embodiments, as shown in Figure 4B, the contact spacing 425 may be less than or equal to 8 times the thickness (427 or 429) of at least one of the first singulated element 421 and the second singulated element 423, or less than or equal to 2 times the thickness (427 or 429) of at least one of the first singulated element 421 and the second singulated element 423, or less than or equal to 0.4 times the thickness (427 or 429) of at least one of the first singulated element 421 and the second singulated element 423, or less than or equal to the height of a through substrate via (TSV) through the thickness of the element.

[0014] In the illustrated embodiment, the third conductive contact 422 can comprise an electrically active contact electrically connected to the circuitry of the first singulation element 421. For example, the third conductive contact 422 can be connected to a signal line, a power line, or an electrical ground. In any of the embodiments described herein, any of the conductive contacts can be connected to a signal line, a power line, or an electrical ground. In various embodiments, at least one of the first singulation element 421 and the second singulation element 423 comprises an integrated device die having active circuitry. In various embodiments, the laterally outermost pads on the die can comprise active pads connected to a signal, power, or ground, rather than dummy pads. In some embodiments, the first singulation element 421 comprises an integrated device die having active circuitry, and the second singulation element 423 comprises passive components 432, for example as shown in FIG. 4E. As described herein, at least one of the first and second singulation elements is fully or partially singulated using reactive ion etching (RIE) techniques for clean, sharp die edges.

[0015] As discussed above, the advantages of narrow spacing between elements (dies, electrical components), especially between active contacts of adjacent elements, are applicable to elements of any size. In some embodiments, relatively small elements (chiplets, component devices) are laterally closely spaced and bonded to a common carrier, with at least one of the overlying elements having a maximum lateral width of about 8 mm or less, about 6 mm or less, about 4 mm or less, about 3 mm or less, or about 2 mm or less, although the principles and advantages taught herein are not limited to such small elements. In various embodiments, the edge exclusion distance 407 between the outer edge 438 of the first singulated element 421 and the third conductive contact 422 can be less than 100 μm, e.g., 50 μm or less, or 10 μm or less (e.g., in the range of 1 μm to 100 μm). In some embodiments, the ratio of the maximum lateral width to the edge exclusion distance is between 10 and 100. In some embodiments, the ratio of maximum lateral width to edge exclusion distance may be less than 100, less than 50, less than 25, less than 10, less than 5, or less than 2.

[0016] In some embodiments, as shown in the top view of FIG. 4F, the bonding structure 417 can include a carrier 418 and a first element 433 bonded directly to the carrier 418 without adhesive. As shown in FIG. 4F, the first element 433 can include a cut-out area 434. The second singulation element 423 can be bonded directly to the carrier 418 without adhesive. The second singulation element 423 can be disposed at least partially laterally within the cut-out area 434 of the first element 433. The cut-out area 434 can be used to allow small dies, chiplets, or components (e.g., passive components such as inductors, capacitors, resistors, etc.) having different shapes to be bonded in close proximity to adjacent dies. In some embodiments, a third singulation element (not shown) can be bonded directly to the carrier 418 without adhesive, with the second singulation element 423 disposed between the first element 433 and the third singulation element (not shown).

[0017] In some embodiments, as shown in FIG. 4G, the third singulation element 435 can be directly bonded to the second singulation element 423. In some embodiments, the third singulation element 435 is directly bonded to the second singulation element 423 without adhesive. A conductive via or TSV 431 can penetrate the second singulation element 423 and connect to the third singulation element 435. In FIG. 4G, the contact spacing 425 between the nearest active die for adjacent elements can be about four times (4×) or less than the length (or height) of the conductive via 431. In another embodiment, the contact spacing 425 can be less than about two times or less than about one time the length of the conductive via 431. As will be appreciated, the length of the conductive through via (TSV) 431 is typically approximately equal to the thickness 429 of the element. In some embodiments, the via 431 can comprise a thermal via, a passive via, or an element, and the length of the via (TSV) 431 can be less than the thickness 429 of the element.

[0018] In some embodiments, as seen in FIG. 4H, the third singulated element 435 can be directly bonded to the first singulated element 421 and the second singulated element 423. In some embodiments, the third singulated element 435 is directly bonded to the first singulated element 421 and the second singulated element 423 without adhesive. In some embodiments, the third singulated element 435 can comprise a singulated package. The singulated package can comprise one or more embedded dies at least partially embedded in an embedding material. In some embodiments, the third singulated element 435 can comprise a singulated passive element with a rewiring layer. The plane of the rewiring layer can be prepared for hybrid bonding. In some embodiments, the third singulated element 435 can comprise a singulated dielectric element with a rewiring layer. The conductive vias 431 can connect to the third singulated element 435 through the first singulated element 421 and the second singulated element 423. The third singulation element 435 effectively functions as a bridge connecting the first singulation element 421 and the second singulation element 423 (and / or is connected to the underlying carrier 418). In some embodiments, a layer of dielectric material 439 can be deposited over the first singulation element 421, the second singulation element 423, and the carrier 418 (as described below in connection with FIGS. 4I and 4J) before bonding the third singulation element 435 to the first singulation element 421 and the second singulation element 423 (as seen in FIG. 4H) or before bonding the third singulation element 435 to the second singulation element 423 (as seen in FIG. 4G). In some embodiments, the layer of dielectric material 439 can form a bonding layer 409 between the third singulation element 435 and the element to which it is bonded. In some embodiments, bonding layer 409 can include a dielectric material with conductive contact features (eg, contacts 419, 420) at least partially embedded therein.

[0019] In some embodiments, as seen in FIGS. 4I-4J-2, a dielectric layer 439 can be deposited on the bonding structures 417. As seen in FIG. 4I, a conformal coating of dielectric material 439 is deposited on the bonding structures 417. In some embodiments, the dielectric layer 439 can cover the carrier 418, the first singulated element 421, and the second singulated element 423. Additionally, the dielectric layer 439 can cover the bonding structures 417 such that a small amount 440 of the dielectric material 439 is disposed within a gap 441 between the first singulated element 421 and the second singulated element 423. In some embodiments, as seen in FIG. 41, the small amount 440 of the dielectric 439 only extends a short distance into the gap 441. In some embodiments, as seen in FIG. 4J, a dielectric layer 439 can be deposited on the bonding structure 417 such that the gap 441 between the first singulated element 421 and the second singulated element 423 is completely (or mostly) filled with the dielectric layer 439. In some embodiments, as seen in FIG. 4J-2, the dielectric layer 439 can be deposited on the carrier 418 such that the dielectric layer 439 on the carrier 418 is approximately the same thickness as one of the singulated elements. In the illustrated embodiment, the dielectric layer 439 is shown extending above the singulated elements 421, 423. In another embodiment, the dielectric layer 439 can be planarized (e.g., using a CMP process) such that the top of the dielectric layer 439 is substantially flush with the elements 421, 423. In the embodiments of FIGS. 4I-4J-2, the dielectric layer 439 can be prepared for hybrid bonding and the additional element(s) can be bonded directly to the dielectric layer 439. In some embodiments, conductive contacts can be formed in the dielectric layer 439, the top surface of which can be prepared for direct hybrid bonding. One or more additional elements can be directly hybrid bonded to a hybrid bonding layer that includes the dielectric layer 439. Thus, in various embodiments, elements 421, 423 (such as those shown in FIG. 4J-2) can be formed in the reconfigured element or wafer, and additional elements can be directly bonded to the reconfigured element or wafer.The dielectric layer 439 can include an inorganic dielectric material (e.g., silicon oxide, silicon nitride, silicon oxycarbonitride, etc.) to protect the die and / or carrier. In another embodiment, the dielectric layer 439 can include an organic dielectric material (e.g., molding compound, etc.). In various embodiments, the dielectric layer 439 can include multiple layers.

[0020] In some embodiments, as seen in FIG. 4K, the carrier 418 can include a bonding layer 409. In some embodiments, the bonding layer 409 can include a dielectric material with conductive contact features (such as contacts 419, 420) at least partially embedded therein. Although not individually shown, the dies 421, 423 can also include a non-conductive or dielectric bonding layer with contacts 422, 424 at least partially embedded therein. In some embodiments, the first conductive contact 419 and the first conductive contact 420 can be electrically connected via a connector 442, such as a conductive trace at least partially embedded (e.g., completely embedded) in the bonding layer 409. In some embodiments, the connector 442 can be configured similarly to the conductive through vias (TSVs) described above in connection with other embodiments.

[0021] Any of the embodiments described herein may incorporate features of any of the other embodiments described herein. For example, an embodiment such as that seen in Figure 4A may further include a connector 442 as seen in Figure 4K.

[0022] In one embodiment, the bonding structure can include a first singulated element with a first conductive contact and a carrier with a second conductive contact. The first and second conductive contacts can be bonded directly to one another without an adhesive. The first conductive contact can be spaced from an outer edge of the first singulated element by an edge exclusion distance of 100 μm or less. The first conductive contact can comprise an electrically active contact electrically connected to the circuitry of the first singulated element. In various embodiments, the edge exclusion distance can be 50 μm or less, or 10 μm or less. For example, the edge exclusion distance can be in the range of 1 μm to 100 μm.

[0023] In one embodiment, the bonding structure can include a first singulated element having a first plurality of conductive contacts spaced apart at a predetermined pitch. The first plurality of conductive contacts can include at least one outer conductive contact proximate an outer edge of the first singulated element. The at least one outer conductive contact can be spaced from the outer edge by an edge exclusion distance and can comprise an electrically active contact electrically connected to the circuitry of the first singulated element. The bonding structure can include a carrier comprising a second plurality of conductive contacts bonded directly to the first plurality of conductive contacts without an intervening adhesive.

[0024] In some embodiments, the ratio of the edge exclusion distance to the pitch between the contact pads for at least one element can be less than 15:1. In some embodiments, the ratio of the edge exclusion distance to the pitch of the pads adjacent to the exclusion region can be less than 10:1, less than 5:1, or less than 2:1. In some embodiments, the ratio of the maximum lateral width of the first singulated element to the edge exclusion distance can be greater than 15:1, greater than 10:1, greater than 5:1, or greater than 2:1.

[0025] In various embodiments, the bonding structure can include a carrier having a first bonding surface including a first non-conductive region and a first plurality of conductive contacts, and a singulated device die having a second bonding surface including a second non-conductive region and a second plurality of conductive contacts. The second non-conductive region can be directly bonded to the first non-conductive region of the carrier without an adhesive, and the second plurality of conductive contacts can be directly bonded to the first plurality of conductive contacts without an adhesive. The singulated device die can include an etched outer edge extending non-parallel to the second bonding surface, and the second plurality of conductive contacts can include at least one outer conductive contact proximate to the outer edge. The at least one outer conductive contact can comprise an electrically active contact electrically connected to a circuit of the singulated device die.

[0026] In some embodiments, the integrated device die may include active circuitry, a bonding surface configured for direct hybrid bonding to another element, and an outer edge extending non-parallel to the bonding surface. The first conductive contact may be spaced from the outer edge by an edge exclusion distance of 100 μm or less. The first conductive contact may comprise an electrically effective contact electrically connected to the active circuitry. In some embodiments, the edge exclusion distance is 50 μm or less. In some embodiments, the first conductive contact is electrically connected to a signal line, a power line, or an electrical ground. In some embodiments, one or more dummy pads may be disposed in an exclusion region between the first effective conductive contact and the outer edge of the die. In some configurations, the dummy pad(s) may have a maximum lateral dimension smaller than the first effective conductive contact.

[0027] In any of the above embodiments, any of the singulation elements can include an etched outer surface that extends non-parallel to the bonding surface of the singulation die. In some embodiments, the etched outer surface extends perpendicular to the bonding surface of the singulation die. In some embodiments, the etched outer surface extends at an angle of 85° to 90° to the bonding surface of the singulation die.

[0028] In various embodiments, the bonding structure can include a carrier including a first conductive contact and a second conductive contact, a first singulated element including a third conductive contact bonded directly to the first conductive contact without an adhesive, and a second singulated element including a fourth conductive contact bonded directly to the second conductive contact without an adhesive, hi some embodiments, the first and second conductive contacts are spaced apart by a contact spacing of 250 microns or less.

[0029] In some embodiments, the first and second singulated elements are spaced apart by an element spacing of 10 microns or less. In some embodiments, the first and second conductive contacts are spaced apart by a contact spacing between about 0.4 and 8 times the thickness of at least one of the first and second singulated elements. In some embodiments, the bonding structure can include a carrier and the first and second singulated elements directly hybrid bonded. In another embodiment, the contact spacing is less than about 2 times the thickness of at least one of the first and second singulated elements. In one embodiment, the first and second singulated elements included respective non-conductive regions directly bonded to corresponding non-conductive region(s) of the carrier without adhesive. In some embodiments, the contact spacing is 200 microns or less. In some embodiments, the contact spacing is 100 microns or less. In some embodiments, the contact spacing is 50 microns or less. In some embodiments, the contact spacing is 10 microns or less. In some embodiments, the contact spacing is 5 microns or less.

[0030] In some embodiments, the contact spacing is 2 microns or less. In some embodiments, the contact spacing is in the range of 1 micron to 250 microns. In some embodiments, the contact spacing is in the range of 1 micron to 100 microns. In some embodiments, the contact spacing is in the range of 1 micron to 20 microns. In some embodiments, the contact spacing is 20 microns or less. In some embodiments, the contact spacing is 10 microns or less. In some embodiments, the contact spacing is less than or equal to a thickness of at least one of the first and second singulation elements.

[0031] In various embodiments, the bonding structure can include a carrier including a first conductive contact and a second conductive contact, a first singulated element including a third conductive contact bonded directly to the first conductive contact without an adhesive, and a second singulated element including a fourth conductive contact bonded directly to the second conductive contact without an adhesive. In some embodiments, the third conductive contact comprises an electrically active contact electrically connected to a circuit of the first singulated element. In some embodiments, the third conductive contact is connected to a signal line, a power line, or an electrical ground. In some embodiments, at least one of the first and second singulated elements comprises an integrated device die having active circuitry. In some embodiments, the first singulated element comprises an integrated device die having active circuitry and the second singulated element comprises passive components. In some embodiments, at least one of the first and second singulated elements is singulated with a reactive ion etching (RIE) process. In some embodiments, at least one of the first and second singulated elements has a maximum lateral width of 4 mm or less. In some embodiments, at least one of the first and second singulation elements has a maximum lateral width of 2 mm or less. In some embodiments, the edge exclusion distance between an outer edge of the first singulation element and the third conductive contact is less than 100 microns. In some embodiments, the edge exclusion distance is 50 microns or less. In some embodiments, the edge exclusion distance is 10 microns or less. In some embodiments, the edge exclusion distance is in the range of 1 micron to 100 microns.

[0032] In various embodiments, the bonding structure can include a carrier, a first element bonded directly to the carrier without adhesive, the first element including a cutout area, and a second singulated element bonded directly to the carrier without adhesive, the second singulated element disposed at least partially laterally within the cutout area of ​​the first element. In some embodiments, the bonding structure further comprises a third singulated element bonded directly to the carrier without adhesive, the second singulated element disposed between the first element and the third singulated element. In some embodiments, the third singulated element is bonded directly to the second singulated element. In some embodiments, the bonding structure comprises a conductive via through the second singulated element for connecting to the third element. In some embodiments, the contact spacing is equal to or less than the length of the conductive via.

[0033] In various embodiments, the bonding structure can include a first singulated element comprising a first conductive contact and a carrier comprising a second contact pad. In some embodiments, the first conductive contact and the second conductive contact can be bonded directly to one another without an intervening adhesive. The first conductive contact can be spaced from an outer edge of the first singulated element by an edge exclusion distance of 200 μm or less. In some embodiments, the first conductive contact comprises an electrically active contact electrically connected to the circuitry of the first singulated element. In some embodiments, the edge exclusion distance is between about 10 microns and 100 microns.

[0034] In various embodiments, the bonding structure can include a first singulated element having a first plurality of conductive contacts spaced apart at a predetermined pitch. The first plurality of conductive contacts can include at least one outer conductive contact proximate an outer edge of the first singulated element. In some embodiments, the at least one outer conductive contact is spaced apart from the outer edge by an edge exclusion distance and comprises an electrically active contact electrically connected to the circuitry of the first singulated element, and the carrier comprises a second plurality of conductive contacts bonded directly to the first plurality of conductive contacts without an intervening adhesive. In some embodiments, the ratio of the edge exclusion distance to the pitch is between about 10:1 and 50:1. In some embodiments, the ratio of the edge exclusion distance to the pitch is less than about 15:1.

[0035] In another embodiment, the bonding structure can include a first singulation element having a maximum lateral width and including a first plurality of conductive contacts. In some embodiments, the first plurality of conductive contacts includes at least one outer conductive contact closest to an outer edge of the first singulation element. In some embodiments, the at least one outer conductive contact comprises an electrically active contact spaced an edge exclusion distance from the outer edge and electrically connected to the circuitry of the first singulation element. In some embodiments, the bonding structure can include a carrier comprising a second plurality of conductive contacts bonded directly to the first plurality of conductive contacts without an intervening adhesive. In some embodiments, the ratio of the maximum lateral width to the edge exclusion distance is between about 10:1 and 100:1. In some embodiments, the ratio of the maximum lateral width to the edge exclusion distance is less than about 50:1.

[0036] In another embodiment, the bonding structure can include a carrier having a first bonding surface including a first non-conductive region and a first plurality of conductive contacts. In some embodiments, the bonding structure can include a singulated device die having a second bonding surface including a second non-conductive region and a second plurality of conductive contacts. In some embodiments, the second non-conductive region is directly bonded to the first non-conductive region of the carrier without an adhesive, and the second plurality of conductive contacts is directly bonded to the first plurality of conductive contacts without an adhesive. In some embodiments, the singulated device die includes an etched outer edge extending non-parallel to the second bonding surface, the second plurality of conductive contacts including at least five outer conductive contacts closest to the outer edge, the at least five outer conductive contacts comprising electrically active contacts electrically connected to the circuitry of the singulated device die. In some embodiments, the edge exclusion distance is 50 microns or less. In some embodiments, the edge exclusion distance is 10 microns or less. In some embodiments, the edge exclusion distance is in the range of 1 micron to 100 microns. In some embodiments, the ratio of the edge exclusion distance to the pitch is less than 10. In some embodiments, the ratio of edge exclusion distance to pitch is less than 5. In some embodiments, the ratio of edge exclusion distance to pitch is less than 2. In some embodiments, the ratio of maximum lateral width to edge exclusion distance is less than 10. In some embodiments, the ratio of maximum lateral width to edge exclusion distance is less than 5. In some embodiments, the ratio of maximum lateral width to edge exclusion distance is less than 2. In some embodiments, the at least one outer conductive contact is electrically connected to a signal line, a power line, or an electrical ground.

[0037] In various embodiments, the integrated device die may include active circuitry, a bonding surface configured for direct hybrid bonding to another element, an outer edge extending non-parallel to the bonding surface, and a first conductive contact spaced from the outer edge by an edge exclusion distance of 100 microns or less. In some embodiments, the first conductive contact comprises an electrically active contact electrically connected to the active circuitry. In some embodiments, the edge exclusion distance is 50 microns or less. In some embodiments, the first conductive contact is electrically connected to a signal line, a power line, or an electrical ground. The integrated device die may comprise a dummy non-active contact disposed between the first conductive contact and an outer edge of the die.

[0038] In various embodiments, the integrated device die may include active circuitry, a bonding surface configured for direct hybrid bonding to another element, an outer edge extending non-parallel to the bonding surface, and a first conductive contact spaced from the outer edge by an edge exclusion distance of 100 microns or less. In some embodiments, the first conductive contact comprises an electrically active contact electrically connected to the active circuitry. In some embodiments, the edge exclusion distance is 50 microns or less. In some embodiments, the first conductive contact is electrically connected to a signal line, a power line, or an electrical ground. The integrated device die may comprise a dummy non-active contact disposed between the first conductive contact and an outer edge of the die.

[0039] In various embodiments, a method for singulating a die includes planarizing a substrate with a plurality of conductive contacts, applying a protective layer on the substrate, patterning the protective layer on the substrate, transferring the substrate to a dicing frame, and singulating the substrate into a plurality of singulated elements via an etching process. In some embodiments, the etching process includes a dry etching process, a wet etching process, or a fine dicing blade. In some embodiments, the dry etching process is reactive ion etching. In some embodiments, the singulation of the substrate is achieved by a combination of etching processes.

[0040] In various embodiments, the method of singulating the die can further include removing a protective layer from the substrate, treating the substrate with a processing method, and preparing the substrate for direct bonding to another element. In some embodiments, the processing method includes ashing, surface activation, or nitrogen plasma treatment. In some embodiments, preparing the substrate for direct bonding further includes cleaning, rinsing, and drying the substrate.

[0041] In various embodiments, a method of making a bonded structure can include singulating a first and second element, the first and second elements having an edge exclusion distance of 100 microns or less, and bonding the first and second singulated elements to a carrier, the distance between the first and second singulated elements being 10 microns or less. In some embodiments, bonding the first and second singulated elements to the carrier includes directly bonding the first and second singulated elements to the carrier without the use of an adhesive. In some embodiments, singulating the first and second elements includes singulating the first and second elements using reactive ion etching.

[0042] Those skilled in the art will appreciate that features of the above embodiments may be learned from the additional disclosure provided in U.S. Provisional Patent Application No. 63 / 313,639, the entire disclosure of which is incorporated herein by reference for all purposes, without limitation.

[0043] Examples of direct bonding methods and structures Various embodiments disclosed herein relate to direct bond structures where two or more elements can be directly bonded to each other without the use of adhesive. Figures 5A and 5B show a schematic process of forming a direct hybrid bonded structure without the use of adhesive according to some embodiments. In Figures 5A and 5B, the bond structure 517 comprises two elements 543 and 544 that can be directly bonded to each other at a bond interface 545 without the use of adhesive. Two or more microelectronic elements 543 and 544 (e.g., integrated device dies, wafers, semiconductor elements including passive devices, discrete active devices such as power switches, etc.) can be stacked or bonded to each other to form the bond structure 517. A conductive feature 546a (e.g., a contact pad, a trace, an exposed end of a via, or a through-substrate electrode) of the first element 543 can be electrically connected to a corresponding conductive feature 546b of the second element 544. Any suitable number of elements can be stacked in the bond structure 517. For example, a third element (not shown) can be stacked on top of the second element 104, a fourth element (not shown) can be stacked on top of the third element, and so on. Additionally or alternatively, one or more additional elements (not shown) can be stacked laterally adjacent to one another along the first element 543. In some embodiments, the laterally stacked additional elements can be smaller than the second element. In some embodiments, the laterally stacked additional elements can be half the size of the second element.

[0044] In some embodiments, elements 543 and 544 are directly bonded to each other without adhesive. In various embodiments, a non-conductive field region comprising a non-conductive or dielectric material can serve as the first bonding layer 509a of the first element 543, which can be directly bonded without adhesive to a corresponding non-conductive field region comprising a non-conductive or dielectric material that serves as the second bonding layer 509b of the second element 104. The non-conductive bonding layers 509a and 509b can be disposed on the front sides 547a and 547b of device portions 548a and 548b, such as semiconductor (e.g., silicon) portions of elements 543, 544, respectively, or on top of a back-end wiring (BEOL) interconnect layer covering such semiconductor portions. Active devices and / or circuits can be patterned and / or otherwise disposed in or on the device portions 548a and 548b. Active devices and / or circuits can be located on or near the surfaces 547a and 547b of the device portions 548a and 548b and / or on or near the opposite backsides 549a and 549b of the device portions 548a and 548b. The bonding layer can be provided on the front side and / or the backside of the element. The non-conductive material can be referred to as the non-conductive bonding region or bonding layer 509a of the first element 543. In some embodiments, the non-conductive bonding layer 509a of the first element 543 can be directly bonded to the corresponding non-conductive bonding layer 509b of the second element 544 using a dielectric-dielectric bonding technique. For example, the direct bonding techniques disclosed in at least U.S. Pat. No. 9,564,414, U.S. Pat. No. 9,391,143, and U.S. Pat. No. 1,043,4749 can be used to form the dielectric-dielectric bond without adhesives, the entire disclosures of which are incorporated herein by reference for all purposes. It should be appreciated that in various embodiments, bonding layers 509a and / or 509b can include a non-conductive material, such as, for example, a dielectric material, such as silicon oxide, or an undoped semiconductor material, such as undoped silicon.Suitable dielectric bonding surfaces or materials for direct bonding include, but are not limited to, inorganic dielectrics such as silicon oxide, silicon nitride, or silicon oxynitride, but may contain carbon such as silicon carbide, silicon oxycarbonitride, low-K dielectric materials, SiCOH dielectrics, silicon carbonitride, or diamond-like carbon, or materials with diamond surfaces. Such carbon-containing ceramic materials may be considered inorganic, despite containing carbon. In some embodiments, the dielectric material does not include polymeric materials such as epoxies, resins, or molding compounds.

[0045] In some embodiments, the device portions 548a and 548b can have significantly different coefficients of thermal expansion (CTE), defining a heterostructure. The difference in CTE between the device portions 548a and 548b, and in particular between the bulk semiconductor, typically single crystal portions of the device portions 548a, 548b, can be greater than 5 ppm or greater than 10 ppm. For example, the difference in CTE between the device portions 548a and 548b can range from 5 ppm to 100 ppm, 5 ppm to 40 ppm, 10 ppm to 100 ppm, or 10 ppm to 40 ppm. In some embodiments, one of the device portions 548a and 548b can include an optoelectronic single crystal material, including perovskite materials useful for optoelectronic or pyroelectric applications, and the other of the device portions 548a, 548b includes a more conventional substrate material. For example, one of the device portions 548a, 548b may include lithium tantalate (LiTaO3) or lithium niobate (LiNbO3), and the other of the device portions 548a, 548b may include silicon (Si), quartz, fused silica glass, sapphire, or glass. In another embodiment, one of the device portions 548a and 548b may include a single III-V semiconductor material, such as gallium arsenide (GaAs) or gallium nitride (GaN), and the other of the device portions 548a and 548b may include a non-III-V semiconductor material, such as silicon (Si), or may include other materials with similar CTEs, such as quartz, fused silica glass, sapphire, or glass.

[0046] In various embodiments, the hybrid bond can be formed directly without the aid of an adhesive. For example, the non-conductive bonding surfaces 550a and 550b can be polished to a high degree of smoothness. The non-conductive bonding surfaces 550a and 550b can be polished, for example, using chemical mechanical polishing (CMP). The polished bonding surfaces 550a and 550b can have a roughness of less than 30 Å (rms). For example, the roughness of the bonding surfaces 550a and 550b can range from about 0.1 Å (rms) to 15 Å (rms), 0.5 Å (rms) to 10 Å (rms), or 1 Å (rms) to 5 Å (rms). The bonding surfaces 550a and 550b can be cleaned and exposed to a plasma and / or an etchant to activate the surfaces 550a and 550b. In some embodiments, the bonding surfaces 550a and 550b can be terminated with a chemical species after or during activation (e.g., during a plasma and / or etching process). Without being bound by theory, in some embodiments, an activation process can be performed to break the chemical bonds of the bonding surfaces 550a and 550b, and a termination process can provide the bonding surfaces 550a and 550b with additional chemical species that improve the bond energy during direct bonding. In some embodiments, the activation and termination processes are provided in the same step, e.g., a plasma is applied to activate and terminate the bonding surfaces 550a and 550b. In other embodiments, the bonding surfaces 550a and 550b can be terminated in a separate process to provide additional chemical species for direct bonding. In various embodiments, the termination chemical species can include nitrogen. For example, in some embodiments, the bonding surface(s) 550a, 550b can be exposed to a nitrogen-containing plasma. Additionally, in some embodiments, the bonding surfaces 550a and 550b can be exposed to fluorine. For example, there may be one or more fluorine peaks at or near the bond interface 545 of the first and second elements 543, 544. Thus, in the direct bond structure 517, the bond interface 545 between the two non-conductive materials (e.g., bonding layers 509a and 509b) may comprise a very smooth interface with a high nitrogen content and / or fluorine peaks at the bond interface 545.Additional examples of activation and / or termination treatments can be found throughout U.S. Patent Nos. 9,564,414, 9,391,143, and 10,434,749, the entire disclosures of each of which are incorporated herein by reference for all purposes. The roughness of the polished mating surfaces 550a and 550b may be slightly rougher (e.g., about 1 Å (rms) to 30 Å (rms), 3 Å (rms) to 20 Å (rms), or in some cases rougher) after the activation process.

[0047] In various embodiments, the conductive feature 546a of the first element 543 can also be directly bonded to the corresponding conductive feature 546b of the second element 544 without adhesive (e.g., without intervening solder or other conductive adhesive between the conductive features 546a, 546b). For example, direct hybrid bonding techniques can be used to provide a direct conductor-conductor bond along a bonding interface 545 that includes covalently directly bonded non-conductive-non-conductive (e.g., dielectric-dielectric) surfaces prepared as described above. In various embodiments, direct conductor-conductor (e.g., conductive feature 546a-conductive feature 546b) bonds and hybrid dielectric-dielectric bonds can be formed using direct bonding techniques disclosed in at least U.S. Pat. Nos. 9,716,033 and 9,852,988, the entire disclosures of each of which are incorporated herein by reference for all purposes. In the direct hybrid bonding embodiments described herein, the conductive feature is provided in a non-conductive bonding layer, and both the conductive feature and the non-conductive feature are prepared for direct bonding, such as by planarizing, activating, and / or terminating processes described above. Thus, a bonding surface prepared for direct bonding includes both conductive and non-conductive features.

[0048] For example, non-conductive (e.g., dielectric) bonding surfaces 550a, 550b (e.g., inorganic dielectric surfaces) can be prepared and bonded directly to one another without an adhesive as described above. Conductive contact features (e.g., conductive features 546a and 546b that may be at least partially surrounded by a non-conductive dielectric field region within bonding layers 509a, 509b) can also be bonded directly to one another without an adhesive. In various embodiments, the conductive features 546a, 546b can comprise discrete pads or traces at least partially embedded in the non-conductive field region. In some embodiments, the conductive contact features can comprise exposed contact surfaces of through-substrate vias (e.g., through-silicon vias (TSVs)). In some embodiments, each conductive feature 546a and 546b can be recessed below the dielectric field region or outer (e.g., upper) surface of the non-conductive bonding layer 509a and 509b (non-conductive bonding surface 550a and 550b), e.g., by less than 30 nm, less than 20 nm, less than 15 nm, or less than 10 nm, e.g., in the range of 2 nm to 20 nm, or in the range of 4 nm to 10 nm. This recess can be at or near the center or center of the cavity in which the conductive features 546a, 546b are located, and can additionally or alternatively extend or be located along the side of the cavity in which the conductive features 546a, 546b are located. In various embodiments, prior to direct bonding, the recesses in the opposing elements can be sized such that the total gap between opposing contact pads is less than 15 nm, or less than 10 nm. The non-conductive bonding layers 509a and 509b can in some embodiments be bonded directly to one another at room temperature without adhesive, after which the bonded structure 517 can be annealed. Upon annealing, the conductive features 546a and 546b expand and contact one another, forming a direct metal-metal bond.Advantageously, the use of Direct Bond Interconnect, or DBI®, technology available from Adeia, Inc., San Jose, Calif., USA, allows for a high density of conductive features 546a and 546b to be connected across the direct bond interface 545 (e.g., small or fine pitch for regular arrays). In some embodiments, the pitch of the conductive features 546a and 546b, such as conductive traces embedded in one of the bonding surfaces of the bonded elements, can be less than 100 microns, or less than 10 microns, or even less than 2 microns. In some applications, the ratio of the pitch of the conductive features 546a and 546b to one of the dimensions of the bond pads (e.g., diameter) is less than 20, or less than 10, or less than 5, or less than 3, and in some cases desirably less than 2. In other applications, the width of the conductive traces embedded in one of the bonding surfaces of the bonded elements can range between 0.3 and 20 microns, such as in the range of 0.3 to 3 microns. In various embodiments, the conductive features 546a and 546b and / or the traces can include copper or a copper alloy, although other metals may also be suitable. For example, the conductive features disclosed herein, such as the conductive features 546a and 546b, can include a fine grain metal (e.g., fine grain copper).

[0049] Thus, in a direct bonding process, the first element 543 can be directly bonded to the second element 544 without the aid of an adhesive. In some configurations, the first element 543 can include a singulated element, such as a singulated integrated device die. In another configuration, the first element 543 can include a carrier or substrate (e.g., a wafer) that includes a plurality (e.g., tens, hundreds, or more) of device regions that, when singulated, form a plurality of integrated device dies. Similarly, the second element 544 can include a singulated element, such as a singulated integrated device die. In another configuration, the second element 104 can include a carrier or substrate (e.g., a wafer). Thus, the embodiments disclosed herein can be applied to wafer-to-wafer (W2W), die-to-die (D2D), or die-to-wafer (D2W) bonding processes. In a W2W process, two or more wafers can be directly bonded together (e.g., direct hybrid bonded) and singulated using a suitable singulation process. After singulation, the side edges of the singulated structures (e.g., the side edges of the two joining elements) can be substantially flat and can include patterns indicative of a common singulation process for the joining structures (e.g., saw marks when a saw singulation process is used).

[0050] As described herein, the first element 543 and the second element 544 can be directly bonded to each other without adhesive, which is different from a deposition process and results in a structurally different interface compared to deposition. In one application, the width of the first element 543 of the bonded structure is similar to the width of the second element 544. In some other embodiments, the width of the first element 543 of the bonded structure 517 is different from the width of the second element 544. Similarly, the width or area of ​​the larger element of the bonded structure may be at least 10% larger than the width or area of ​​the smaller element. Thus, the first element 543 and the second element 544 can include non-deposited elements. Furthermore, the direct bonded structure 517, unlike a deposition layer, can include defect areas with nanoscale voids (nanovoids) along the bonded interface 545. The nanovoids can be formed due to activation (e.g., exposure to plasma) of the bonded surfaces 550a and 550b. As described above, the bonded interface 545 can include material concentrations from the activation process and / or the final chemical treatment process. For example, in embodiments utilizing nitrogen plasma for activation, nitrogen peaks may form at the bonding interface 545. The nitrogen peaks may be detected using secondary ion mass spectrometry (SIMS) techniques. In various embodiments, for example, nitrogen termination (e.g., exposing the bonding surface to a nitrogen-containing plasma) may replace OH groups of a hydrolyzed (OH-terminated) surface with NH2 molecules to produce a nitrogen-terminated surface. In embodiments utilizing oxygen plasma for activation, oxygen peaks may form at the bonding interface 545. In some embodiments, the bonding interface 545 may include silicon oxynitride, silicon oxycarbonitride, or silicon carbonitride. As described herein, the direct bond may include a covalent bond that is stronger than a van der Waals bond. The bonding layers 509a and 509b may also include polished surfaces that are planarized to a high degree of smoothness.

[0051] In various embodiments, the metal-metal bond between the conductive features 546a and 546b can be bonded such that the metal grains grow into each other across the bond interface 545. In some embodiments, the metal is or includes copper, and the copper can have grains oriented along 111 crystal planes to enhance diffusion of the copper across the bond interface 545. In some embodiments, the conductive features 546a and 546b can include a nanotwinned copper grain structure, which can help fuse the conductive features during annealing. The bond interface 545 can extend substantially completely to at least a portion of the bonded conductive features 546a and 546b, such that there is substantially no gap between the non-conductive bonding layers 509a and 509b at or near the bonded conductive features 546a and 546b. In some embodiments, a barrier layer (which can include, for example, copper) can be provided under and / or laterally surrounding the conductive features 546a and 546b. However, in other embodiments, there may be no barrier layer underneath conductive features 546a and 546b, as described, for example, in U.S. Pat. No. 1,195,748, the entire disclosure of which is incorporated herein by reference for all purposes.

[0052] Advantageously, the use of the hybrid bonding techniques described herein allows for extremely fine pitches between adjacent conductive features 546a and 546b and / or small pad sizes. For example, in various embodiments, the pitch p between adjacent conductive features 546a (or 546b) (i.e., edge-to-edge or center-to-center distance as shown in FIG. 5A) can be in the range of 0.5 microns to 50 microns, 0.75 microns to 25 microns, 1 micron to 25 microns, 1 micron to 10 microns, or 1 micron to 5 microns. Additionally, the major lateral dimensions (e.g., pad diameter) can also be small, e.g., in the range of 0.25 microns to 30 microns, 0.25 microns to 5 microns, or 0.5 microns to 5 microns.

[0053] As described above, the non-conductive bonding layers 509a and 509b can be bonded directly to one another without adhesive, and then the bonded structure 517 can be annealed. Upon annealing, the conductive features 546a, 546b expand and contact one another, forming a direct metal-metal bond. In some embodiments, the materials of the conductive features 546a, 546b can interdiffuse during the annealing process.

[0054] Unless the context clearly indicates otherwise, throughout this specification and claims, the words "comprise," "comprising," "include," "including," and the like are to be construed in an inclusive sense, i.e., "including, but not limited to," and not in an exclusive or exhaustive sense. The word "coupled," as generally used herein, refers to two or more elements that are either directly coupled or coupled through one or more intermediate elements. Similarly, the word "connected," as generally used herein, refers to two or more elements that are either directly connected or connected through one or more intermediate elements. Additionally, the words "herein," "above," "below," and words of similar import, when used in this application, shall refer to this application as a whole and not to any particular portions of this application. Furthermore, as used herein, when a first element is described as being "on" or "over" a second element, the first element can be directly on or over the second element such that the first and second elements are in direct contact, or the first element can be indirectly on or over the second element such that there are one or more intervening elements between the first and second elements. Where the context permits, words using the singular or plural in the above Detailed Description can also include the plural or singular, respectively. The word "or" in connection with a list of two or more items covers all of the following interpretations of that word: any of the items in the list, all of the items in the list, and any combination of the items in the list.

[0055] Additionally, as used herein, particularly, conditional terms such as "can, could, might, may" and "eg, for example, such as" are generally intended to convey that some embodiments include and other embodiments do not include particular features, elements and / or conditions, unless otherwise specified or understood otherwise within the context in which they are used. Thus, such conditional terms are not generally intended to imply that features, elements and / or conditions are in any way required for one or more embodiments.

[0056] Although specific embodiments have been described, these embodiments are presented by way of example only and are not intended to limit the scope of the present disclosure. Indeed, the novel apparatus, methods, and systems described herein may be embodied in a variety of other forms. Furthermore, various omissions, substitutions, and changes in the form of the methods and systems described herein may be made without departing from the spirit of the present disclosure. For example, although blocks are presented in a given arrangement, alternative embodiments may perform similar functions with different components and / or circuit topologies, and some blocks may be deleted, moved, added, subdivided, combined, and / or modified. Each of these blocks may be implemented in a variety of different ways. Any suitable combination of the elements and acts of the various embodiments described above may be combined to provide further embodiments. The appended claims and their equivalents are intended to cover such forms or modifications that fall within the scope and spirit of the present disclosure. [Explanation of symbols]

[0057] 407 Edge Exclusion Distance 417 Joint structure 418 Career 419 First conductive contact 420 Second Conductive Contact 421 First singulation element 422 Third Conductive Contact 423 Second singulation element 424 4th conductive contact 438 Outer edge of first singulation element

Claims

1. a carrier including a first conductive contact and a second conductive contact; a first singulation element including a third conductive contact directly bonded to the first conductive contact without an adhesive; a second singulation element including a fourth conductive contact directly bonded to the second conductive contact without an adhesive; A joining structure comprising: The third conductive contact and the fourth conductive contact are spaced apart by a contact spacing of 250 microns or less.

2. a carrier including a first conductive contact and a second conductive contact; a first singulation element including a third conductive contact directly bonded to the first conductive contact without an adhesive; a second singulation element including a fourth conductive contact directly bonded to the second conductive contact without an adhesive; A joining structure comprising: The bonding structure, wherein the first singulation element and the second singulation element are spaced apart by an element spacing of 50 microns or less.

3. The joining structure according to claim 1 or 2, wherein the carrier and the first singulated element and the second singulated element are directly hybrid joined.

4. 3. The bonding structure of claim 1, wherein the first singulated element and the second singulated element include respective non-conductive regions bonded directly to corresponding non-conductive region(s) of the carrier without an adhesive.

5. The junction structure of claim 1 , wherein the contact spacing is 100 microns or less.

6. The junction structure of claim 1 , wherein the contact spacing is 50 microns or less.

7. The junction structure of claim 1 , wherein the contact spacing is 10 microns or less.

8. The joint structure of claim 2 , wherein the element spacing is 20 microns or less.

9. The joint structure of claim 2 , wherein the element spacing is 10 microns or less.

10. The bonding structure of claim 2 , wherein the third conductive contact comprises an electrically active contact electrically connected to a circuit of the first singulated element.

11. The joining structure of claim 10 , wherein the third conductive contact is connected to a signal line, a power line, or an electrical ground.

12. The bonding structure of claim 2 , wherein at least one of the first singulation element and the second singulation element comprises an integrated device die having active circuitry.

13. Career and a first element bonded directly to the carrier without adhesive, the first element including a cutout area; a second singulation element bonded directly to the carrier without adhesive, the second singulation element being at least partially laterally disposed within the cutout area of ​​the first element; A joint structure comprising:

14. The bonding structure of claim 13 , further comprising a third singulation element bonded directly to the carrier without adhesive, the second singulation element being disposed between the first element and the third singulation element.

15. The bonded structure of claim 2 further comprising a third element bonded directly to the second singulated element.

16. The bonding structure of claim 15 further comprising a conductive via through the second singulated element for connection to the third element.

17. The junction structure of claim 16 , wherein the contact spacing is equal to or less than the length of the conductive via.

18. A joining structure as described in claim 14, further comprising a conductive via connected through the second singulated element to the third element.

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