In situ lithography pattern enhancement by localized stress treatment tuning using heat zones

Abstract

Aspects of the present disclosure provide a method for optimizing wafer shape. For example, the method may include receiving a wafer having a processing surface for one or more devices to be fabricated thereon and a back surface opposite the processing surface, measuring the wafer to identify a bow measurement of the wafer, and forming a stress modifying film on the back surface of the wafer. The stress modifying film may be heat-responsive such that the applied heat modifies the internal stress of the stress modifying film. The method may also include applying a pattern of heat on the stress modifying film to modify the internal stress of the stress modifying film, the pattern of heat corresponding to the bow measurement.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This disclosure claims the benefit of U.S. Provisional Patent Application No. 63 / 306,588, entitled "IN-SITU LITHOGRAPHY PATTERN ENHANCEMENT WITH LOCALIZED STRESS TREATMENT TUNING USING HEAT ZONES," filed February 4, 2022, and U.S. Non-Provisional Patent Application No. 17 / 889,460, entitled "IN-SITU LITHOGRAPHY PATTERN ENHANCEMENT WITH LOCALIZED STRESS TREATMENT TUNING USING HEAT ZONES," filed August 17, 2022, which are incorporated by reference in their entireties herein.

[0002] The present disclosure relates to semiconductor manufacturing, and more specifically, to wafer bow, warpage, and overall wafer shape. [Background technology]

[0003] The description of the background art provided herein is intended to generally present the background art of the present disclosure. The inventors' work and described aspects of the present disclosure that would not otherwise be recognized as prior art at the time of filing to the extent described in this Background Art section are not expressly or implicitly admitted as prior art to the present disclosure.

[0004] Semiconductor manufacturing involves several different steps and processes. One typical manufacturing process is known as photolithography (also called microlithography). Photolithography uses radiation, such as ultraviolet or visible light, to create fine patterns in semiconductor device designs. Semiconductor manufacturing techniques, including photolithography, etching, film deposition, surface cleaning, metallization, etc., can be used to construct a variety of semiconductor devices, such as diodes, transistors, and integrated circuits.

[0005] An exposure system (also called an exposure tool) is used to implement photolithography techniques. An exposure system typically includes an illumination system, a reticle (also called a photomask) or a spatial light modulator (SLM) for creating a circuit pattern, a projection system, and a wafer alignment stage for aligning a semiconductor wafer covered with a photosensitive resist. The illumination system illuminates an area of ​​the reticle or SLM with a (preferably) rectangular slot illumination field. The projection system projects an image of the illuminated area of ​​the reticle pattern onto the wafer. For accurate projection, it is important to expose a relatively flat or planar wafer, preferably with a height deviation of less than 10 microns, to the light pattern. Summary of the Invention [Means for solving the problem]

[0006] Aspects of the present disclosure provide a method for enhancing lithographic patterns by localized stress treatment adjustment using heat zones. For example, the method may include receiving a wafer having a processing surface for one or more devices to be fabricated thereon and a back surface opposite the processing surface, measuring the wafer to determine a bow measurement of the wafer, and forming a stress modifying film on the back surface of the wafer. The stress modifying film may be heat sensitive such that the applied heat modifies the internal stress of the stress modifying film. The method may further include applying a pattern of heat on the stress modifying film to modify the internal stress of the stress modifying film, the pattern of heat corresponding to the bow measurement. In one embodiment, forming the stress modifying film may be performed before measuring the wafer to determine the bow measurement of the wafer. In another embodiment, forming the stress modifying film may be performed after measuring the wafer to determine the bow measurement of the wafer.

[0007] In one embodiment, the pattern of heat may be applied by a laser. In another embodiment, the warpage measurements may include multiple minor warpage measurements, and the pattern of heat may be applied by multiple heating units corresponding to the minor warpage measurements. For example, the heating units may be mounted on the wafer chuck.

[0008] In one embodiment, the work surface of the wafer may have one or more devices fabricated thereon, and the method may further include forming a protective film on the work surface of the wafer to protect the devices. For example, measuring the wafer to determine a wafer bow measurement may be performed after forming the protective layer. As another example, measuring the wafer to determine a wafer bow measurement may be performed before forming the protective layer.

[0009] Aspects of the present disclosure provide another method for enhancing lithographic patterns by localized stress treatment adjustment using heat zones. For example, the method may include receiving a wafer having a working surface for one or more devices to be fabricated thereon and a back surface opposite the working surface, measuring the wafer to identify a bow measurement of the wafer, forming a first stress modified film on a first front surface and a back surface of the working surface of the wafer, and forming a second stress modified film on a second front surface and a back surface of the working surface of the wafer. The first stress modified film may be heat responsive such that applied heat modifies the internal stress of the first stress modified film. The second stress modified film may be heat responsive such that applied heat modifies the internal stress of the second stress modified film. The method may further include applying a first pattern of heat on the first stress modified film to modify the internal stress of the first stress modified film, and applying a second pattern of heat on the second stress modified film to modify the internal stress of the second stress modified film. The first and second thermal patterns may correspond to a bow measurement of the wafer.

[0010] In one embodiment, forming the first stress modifying film may be performed prior to measuring the wafer to determine the wafer bow measurement. In another embodiment, forming the second stress modifying film may be performed prior to measuring the wafer to determine the wafer bow measurement. In some embodiments, forming the first stress modifying film may be performed after measuring the wafer to determine the wafer bow measurement.

[0011] Aspects of the present disclosure also provide a system for enhancing lithographic patterns by localized stress treatment adjustment using heat zones. For example, the system may include a warpage measurement device, a stress modified film forming device, a heat generator, and a controller coupled to the warpage measurement device, the stress modified film forming device, and the heat generator. The warpage measurement device may be configured to measure the wafer to determine a warpage measurement of the wafer. The wafer may have a processing surface for one or more devices to be fabricated thereon, and a back surface opposite the processing surface. The stress modified film forming device may be configured to form first and second stress modified films. The first and second stress modified films may be responsive to heat such that the applied heat modifies the internal stress of the first and second stress modified films. The heat generator may be configured to generate a pattern of heat. The controller may be configured to control the warp measurement device to measure the wafer to determine a warp measurement for the wafer, control the stress modified film forming device to form first and second stress modified films on the backside and processing side of the wafer, respectively, and control the heat generator to generate and apply a pattern of heat on the first stress modified film and / or the first and second stress modified films, wherein the pattern of heat corresponds to the warp measurement.

[0012] In one embodiment, the heat generator may include a laser. In another embodiment, the warpage measurement may include a plurality of minor warpage measurements, and the heat generator may include a plurality of heating units corresponding to the minor warpage measurements. For example, the system may further include a wafer chuck, and the heating units are disposed on the wafer chuck.

[0013] It should be noted that this summary section does not specify every embodiment and / or every inherently novel aspect of the present disclosure or claimed invention. Rather, this summary provides only a preliminary discussion of various embodiments and corresponding points of novelty over the prior art. For additional details and / or anticipated aspects of the invention and embodiments, the reader is directed to the Detailed Description section and corresponding figures of the present disclosure as further discussed below.

[0014] Various embodiments of the present disclosure, proposed by way of example, will now be described in detail with reference to the following figures, in which like numbers refer to like elements, and in which: [Brief description of the drawings]

[0015] [Figure 1A] FIG. 1 is a diagram showing primary and secondary warpage of a wafer. [Figure 1B] FIG. 1 is a diagram showing primary and secondary warpage of a wafer. [Figure 1C] FIG. 1 is a diagram showing primary and secondary warpage of a wafer. [Diagram 2] FIG. 1 is a functional block diagram of an exemplary system for achieving optimal wafer shape, in accordance with some embodiments of the present disclosure. [Diagram 3] FIG. 2 illustrates an exemplary heat pattern from a heat generator. [Figure 4] FIG. 1 illustrates a first exemplary process flow used to optimize wafer shape of a semiconductor structure in accordance with some embodiments of the present disclosure. [Diagram 5] FIG. 1 illustrates a first exemplary process flow used to optimize wafer shape of a semiconductor structure in accordance with some embodiments of the present disclosure. [Figure 6] FIG. 1 illustrates a first exemplary process flow used to optimize wafer shape of a semiconductor structure in accordance with some embodiments of the present disclosure. [Figure 7] FIG. 1 illustrates a first exemplary process flow used to optimize wafer shape of a semiconductor structure in accordance with some embodiments of the present disclosure. [Figure 8] FIG. 1 illustrates a second exemplary process flow used to optimize wafer shape of a semiconductor structure in accordance with some embodiments of the present disclosure. [Figure 9] FIG. 13 illustrates a third exemplary process flow used to optimize wafer shape of a semiconductor structure in accordance with some embodiments of the present disclosure. [Figure 10] FIG. 13 illustrates a third exemplary process flow used to optimize wafer shape of a semiconductor structure in accordance with some embodiments of the present disclosure. [Figure 11] FIG. 13 illustrates a third exemplary process flow used to optimize wafer shape of a semiconductor structure in accordance with some embodiments of the present disclosure. [Figure 12] FIG. 13 illustrates a third exemplary process flow used to optimize wafer shape of a semiconductor structure in accordance with some embodiments of the present disclosure. [Figure 13] FIG. 13 illustrates a third exemplary process flow used to optimize wafer shape of a semiconductor structure in accordance with some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] The wafer surface needs to be optimally shaped before the photo / lithography process to achieve the best resolution using a laser or EMS λ (electromagnetic spectrum wavelength) photosensitive stress deposition film as a mask to define the areas that are blocked or open for subsequent stress transfer or implantation. The present disclosure can use all types of photosensitive wavelengths / lithography types in the electromagnetic spectrum (some examples are photolithography, electron beam lithography, direct laser writing, and x-ray lithography).

[0017] The techniques disclosed herein define several inventive flows for achieving optimal wafer shape (using local stress treatment of the semiconductor wafer lattice) prior to the photo process used on the work surface of the wafer. The process flows herein include, as one option, a disposable lattice alignment film on either the backside or work surface of the wafer. Another option is to leave the lattice alignment film in place for subsequent processing steps.

[0018] By using a stress-tuning film on the backside or working surface of the wafer, it can be heated in different zones (either by the wafer chuck or laser as some examples) to modify the initial stress from the deposition state. This is possible because an accessible wafer chuck can be modified to have more than 50 micro-temperature locations (heat zones) on the backside of the wafer. One unique aspect is that the deposited backside stress-modifying film can be either compressive, neutral, or tensile in the deposition state, and then modified in various micro-temperature regions with different temperature ranges to generate localized stresses (compressive, tensile, neutral) to reduce wafer bow and improve lithography accuracy (optimum wafer shape is achieved).

[0019] Also included herein is a method to provide localized heating using a direct-write laser system with any wavelength selection available as an EM heating option. Also, the flow process can be repeated in the same step or subsequent processing steps to maintain optimal wafer shape at all process locations requiring lithography. A special feature here is that no mask is required for this in-situ pattern enhancement technique.

[0020] The microfabrication of the semiconductor structure 100 starts with a flat substrate or wafer 110 as shown in FIGS. 1A-1C. During the microfabrication of the semiconductor structure 100, multiple processing steps are performed, which may include deposition of materials on the substrate 110, removal of materials, implantation of dopants, annealing, baking, etc. The different materials and structure formations 120 thus formed may induce internal stresses in the substrate 110, resulting in warping of the semiconductor structure 100, which in turn affects the overlay, typically resulting in overlay errors of various magnitudes. For example, FIGS. 1A and 1B show how the different materials and structure formations 120 may induce compressive or tensile stresses, respectively, in the substrate 110, resulting in a primary warp with a warp measurement indicating a z-direction height deviation from a reference plane (not shown). As another example, FIG. 1C shows a secondary warp of the substrate 110, using two warp measurements to identify a positive and negative z-direction height deviation, respectively.

[0021] If a region of the substrate 110 initially contains compressive or tensile stress, an opposite type of stress can be applied in the localized nano-stress region. By using an array of heat zones or locations on the wafer chuck to modify the internal stress of the stress modifying film, optimal wafer shape can be achieved quickly and at minimal cost.

[0022] FIG. 2 is a functional block diagram of an exemplary system 200 for achieving optimal wafer shape according to some embodiments of the present disclosure. For example, the system 200 may include a metrology instrument, such as a warpage measurement device 210, configured to measure a substrate or wafer (e.g., substrate 110 shown in FIG. 1) to determine a warpage measurement of the wafer. In one embodiment, the warpage measurement device 210 may measure z-height deviations across the surface of the wafer using optical (e.g., using scanning laser techniques), acoustic, and other mechanisms to determine multiple sub-warpage measurements (x,y) of the warpage measurement, and store the height deviations with (x,y) coordinates. The z-height deviations may be mapped at various resolutions depending on the type of metrology instrument used and / or the desired resolution. The warpage measurements (and similarly the sub-warpage measurements) may include raw warpage data or may be represented as a warpage signature with relative values. In one embodiment, the wafer has a work surface and a back surface opposite the work surface. The wafer may have an amount of wafer bow as a result of one or more micro-fabrication processing steps performed to form at least a portion of a semiconductor structure on the work surface of the wafer, for example, a transistor gate may be completed or only partially completed.

[0023] The system 200 further includes a deposition module or spin-coating module, e.g., a stress-modifying film forming device 220, configured to deposit and form a stress-modifying film on the backside and / or processing side of the wafer. The stress-modifying film may have its internal stress thermally modified when it reacts to heat. The stress-modifying film forming device 220 may be configured to form two or more stress-modifying films of different, e.g., opposite, stresses.

[0024] The system 200 further includes a heat generator 230 configured to generate a pattern of heat 300, as shown in FIG 3. In one embodiment, the heat generator 230 includes a laser, such as direct laser writing. In another embodiment, the heat generator 230 may include multiple heating units mounted on the wafer chuck and may have an arrangement corresponding to the pattern of heat 300. For example, the heat generator 230 may include heating units (3,1)-(6,1), (2,2)-(7,2), (1,3)-(8,3), (1,4)-(8,4), (1,5)-(8,5), (1,6)-(8,6), (2,7)-(7,7), and (3,8)-(6,8) for a total of 52 heating units, and the warp measurement device 210 may measure the wafer to identify the wafer warp measurements including corresponding sub-warp measurements (3,1)-(6,1), (2,2)-(7,2), (1,3)-(8,3), (1,4)-(8,4), (1,5)-(8,5), (1,6)-(8,6), (2,7)-(7,7), and (3,8)-(6,8). The thermal (Poseidon) micropattern 300 herein can eliminate deflection so that high resolution lithographic patterning can be maintained throughout all processing steps for 3D stacking.

[0025] Heat generator 230 may generate heat in multiple temperature ranges. For example, heat generator 230 may generate heat in a first temperature range up to 200°C, a second temperature range from 200°C to 500°C, a third temperature range from 500°C to 800°C, and a fourth temperature range above 800°C.

[0026] 2, the system 200 further includes a controller 240 coupled to the warp measurement device 210, the stress modified film forming device 220, and the heat generator 230. The controller 240 is configured to control the warp measurement device 210 to measure the wafer to determine the warp measurement (and sub-warp measurement) of the wafer, control the stress modified film forming device 220 to form the stress modified film(s) on the backside and / or work surface of the wafer, and control the heat generator 230 to generate and apply a pattern of heat 300 on the stress modified film(s), where the pattern of heat corresponds to the warp measurement (and sub-warp measurement).

[0027] Alternatively or in addition, the controller 240 may be coupled to one or more additional controllers / computers (not shown) from which the controller 240 can obtain setting and / or configuration information. The controller 240 may be used to configure any or all of the elements of the system 200, and the controller 240 may collect, provide, process, store, and display data from any or all of the tool components. The controller 240 may include multiple applications for controlling any or all of the tool components. For example, the controller 240 may include a graphic user interface (GUI) component that may provide an easy-to-use interface that allows a user to monitor and / or control one or more tool components.

[0028] The controller 240 may include a microprocessor, memory, and digital I / O ports that may generate sufficient control voltages to communicate with, activate inputs to, and exchange information with the semiconductor processing system 200, as well as monitor outputs from the semiconductor processing system 200. For example, a program stored in the memory may be utilized to activate inputs to the warpage measurement device 210 and / or the stress modification film forming device 220 according to a process recipe to perform integrated substrate processing. The controller 240 may be implemented as a general-purpose computer system that performs some or all of the microprocessor-based processing steps of the present invention in response to the processor executing one or more sequences of one or more instructions contained in the memory. Such instructions may be read into the controller's memory from another computer-readable medium, such as a hard disk or a removable media drive. One or more processors of a multi-processing configuration may also be utilized as the controller's microprocessor to execute the sequences of instructions contained in the main memory. In alternative embodiments, hardwired circuitry may be used in place of or in combination with software instructions. Thus, the embodiments are not limited to any particular combination of hardware circuitry and software.

[0029] The controller 240 may be located locally relative to the system 200 or may be located remotely relative to the system 200. For example, the controller 240 may exchange data with the system 200 using at least one of a direct connection, an intranet, the Internet, and a wireless connection. The controller 240 may be coupled to an intranet, for example, at a customer site (i.e., device manufacturer, etc.), or may be coupled to an intranet, for example, at a vendor site (i.e., equipment manufacturer). In addition, for example, the controller 240 may be coupled to the Internet. Furthermore, another computer (i.e., controller, server, etc.) may access and exchange data with, for example, the controller 240 via at least one of a direct connection, an intranet, and the Internet. Also, as will be appreciated by those skilled in the art, the controller 240 may exchange data with the system 200 via a wireless connection.

[0030] System 200 may further include other components, such as a wafer chuck for a wafer placed thereon, a robot handler configured to flip the wafer, a wafer clamper configured to clamp the wafer, a bake device configured to bake the photoresist, an imaging device configured to expose the photoresist to an actinic radiation pattern, a developing device configured to develop a latent image in the photoresist, and an etching device configured to use plasma or gas phase etching or wet etching.

[0031] Several process flows are available herein, for example, process flows A-D. Each of process flows A-D can determine a detailed (x,y) stress map prior to backside and / or work surface stress modification film processing, for example, using scanning laser technology. It is noted that all flows and sequence combinations may be repeated in future processing steps to achieve optimal wafer shape for all lithography processing steps until the wafer has an average z-height deviation of, for example, less than 10 microns, and is flat or close to being considered flat for overlay improvement purposes herein. Process Flow A - deposit a stress modifying film on the backside of the wafer that changes the internal stress when heat is applied onto the stress modifying film. Multiple micro heat zones are provided to form a thermal wafer gradient on the stress modifying film, creating multiple stress regions to provide optimal wafer shape. Process Flow B - deposit a stress modifying film on the backside of the wafer, then use multiple laser beam pulses to form a thermal wafer gradient on the stress modifying film, creating multiple stress regions so that optimal wafer shape can be achieved. Process Flow C - deposit a first stress modifying film on the backside of the wafer and a second stress modifying film on the working side of the wafer, then form a thermal wafer gradient on the first and second stress modifying films using multiple laser beam pulses to form multiple stress regions such that optimal wafer shape may be achieved. Process Flow D - deposit a first stress modifying film on the backside of the wafer and a second stress modifying film on the working side of the wafer and then form a thermal wafer gradient on the first and second stress modifying films using laser energy to form multiple stress regions such that optimal wafer shape may be achieved.

[0032] 4-7 illustrate a process flow A used to optimize the wafer shape of a semiconductor structure 400 according to some embodiments of the present disclosure. As shown in FIG. 4, the semiconductor structure 400 is placed on a wafer chuck 490. The semiconductor structure 400 may include a substrate 410 and one or more semiconductor devices 420 microfabricated on a work surface 440 of the substrate 410 via a stack of 3D gate-all-around (GAA) nanosheets. The semiconductor devices 420 may include logic gates, memory, and / or other components. For example, the semiconductor devices 420 may include complementary field effect transistors (CFETs). To protect the semiconductor devices 420, a protective layer 430 may be formed on the work surface 440 of the wafer (including the substrate 410 and the semiconductor devices 420).

[0033] 5, scanning laser technology 510 can be used to measure z-direction height deviations across the surface of the wafer and store the height deviations by (x,y) coordinates to identify minor bow measurements of the wafer bow measurements, for example, by the bow measurement device 210. In one embodiment, the minor bow measurements have locations that correspond to the heating units (and heat patterns 300) of the heat generator 230.

[0034] As shown in FIG. 6, the wafer is flipped upside down, and then a stress modified film 610 can be formed and applied onto the backside 640 of the wafer, for example, by the stress modified film forming device 220. The stress modified film 610, such as a carbon nanotube boron nitride film, can be heat-responsive such that the applied heat modifies the internal stress of the stress modified film 610. For example, the stress modified film 610 can have a neutral internal stress and respond to the pattern of heat 300 generated by the heating units of the heat generator 230 and be modified to become compressive or tensile at various locations corresponding to the pattern of heat 300. In some embodiments, the stress modified film 610 can be initially compressive or tensile, and the scanning laser technique 510 is used to measure the z-direction height deviation across the surface of the wafer (including the stress modified film 610) and store the height deviation by (x,y) coordinates to identify the sub-bow measurement of the wafer (including the stress modified film 610).

[0035] As shown in FIG. 7, the wafer is inverted and placed on a wafer chuck 490 having multiple heat zones corresponding to the heating units of the heat generator 230. Then, a heat pattern 300 is generated, for example, by the heat generator 230 based on the secondary warpage measurements of the wafer warpage measurement, and applied on the stress modification film 610 such that the applied heat pattern 300 modifies the internal stress of the stress modification film 610 corresponding to the secondary warpage measurements. For example, the heat pattern 300 may include heat in three temperature ranges to generate three different stress values ​​in one in-situ processing step. In one embodiment, the wafer chuck 490 has two heat zones, a central zone and an edge zone, which may be used for the first warpage modification. In another embodiment, the wafer chuck 490 may have more than two heat zones, which may be used for second or more warpage modifications. The heat generator 230 may include different types of heating units. For example, the heating units located in the peripheral region may have one resistive heater type, while the heating units located in the inner region may have a different heater type. The protective layer 430 may be removed, and the semiconductor structure 400 may be completed through photolithography modules, such as coating devices, imaging devices, and developing devices. Stress memory may also be used herein. In some embodiments, the stress modifying film 610 may also be removed, and the semiconductor lattice has a memory effect because the stress of the stress modifying film 610 has been transferred to the silicon lattice.

[0036] 8 illustrates process flow B used to optimize wafer shape of semiconductor structure 800 according to some embodiments of the present disclosure. Process flow B differs from process flow A in that process flow B uses a wafer clamper 890 to clamp the wafer and uses multiple laser beam pulses 810 to apply a heat pattern 300 onto the stress modifying film 610 to modify the internal stress of the stress modifying film based on the sub-warpage measurements of the wafer bow measurement.

[0037] 9-13 show process flows C and D used to optimize the wafer shape of a semiconductor structure 900 according to some embodiments of the present disclosure. As shown in FIG. 9, the semiconductor structure 900 is placed on a wafer chuck 490. The semiconductor structure 900 may include a substrate 910 and one or more semiconductor devices 920 fabricated on the substrate 910 via stacking of 3D (GAA) nanosheets. The semiconductor devices 920 may include logic gates, memory, and / or other components. For example, the semiconductor devices 920 may be CFETs. A scanning laser technique 930 may be used to measure z-direction height deviations across the surface of the wafer (including the substrate 910 and the semiconductor devices 920) and store the height deviations by (x,y) coordinates, for example, by the warp measurement device 210, to identify minor warp measurements of the wafer warp measurements. In one embodiment, the minor warp measurements have a corresponding arrangement to the heating units (and heat patterns 300) of the heat generator 230.

[0038] 10, the wafer is transferred to a wafer clamper 890, e.g., a peripheral clamper, in a chamber in which the stress modifying film forming device 220 is located to deposit and form the stress modifying film. In one embodiment, the substrate 910 side and / or the wafer chuck 490 can have a laser zone during deposition such that the stress modifying film is modified into the deposition conditions.

[0039] As shown in Figure 11, the stress modifying film is deposited on both surfaces of the wafer. For example, the stress modifying film forming device 220 deposits and forms first and second stress modifying films 1110 and 1120 on the back surface 1130 and processing surface 1140 of the wafer, respectively.

[0040] 12, multiple laser beam pulses or laser energy 1210 can be used to apply a pattern of heat 300 onto the first and second stress modifying films 1110 and 1120 to modify the internal stress of the first and second stress modifying films 1110 and 1120 based on the sub-warpage measurements of the wafer bow measurement. For example, the pattern of heat 300 created by the multiple laser beam pulses or laser energy 1210 can include heat in four temperature ranges to generate four different stress values ​​in one in situ processing step.

[0041] As shown in FIG. 13, the wafer having the first and second stress modifying films 1110 and 1120 with their internal stresses modified can be transferred back to the wafer chuck 490 and the semiconductor structure 900 can be completed via a photolithography module (not shown).

[0042] As a non-limiting example, in one process flow, a wafer is loaded onto a wafer chuck, which may be a multi-zone heated chuck, the stress is measured, a robotic handler transfers it to a clamped wafer holder, a first stress modifying film is deposited on the work surface and back surface of the wafer, both surfaces of the wafer are exposed to a pattern of heat based on the wafer signature, the wafer handler can then flip the wafer so that the work surface is up, and photolithography can then be performed on the work surface.

[0043] In the above description, specific details have been described, such as the specific geometry of the processing system and a description of the various components and processes used. However, it should be understood that the technology described herein can be implemented in other embodiments that differ from these specific details, and such details are for the purpose of explanation, not limitation. The embodiments disclosed herein have been described with reference to the accompanying drawings. Similarly, for the purpose of explanation, specific numerical values, materials, and configurations have been shown to provide a sufficient understanding. However, the embodiments can be implemented without such specific details. Components having substantially the same functional structure are indicated by similar reference numerals, and redundant descriptions may be omitted.

[0044] It should be understood that the order of description of the various steps described herein has been presented for clarity of explanation. In general, these steps may be performed in any suitable order. Moreover, although each of the various features, techniques, configurations, etc. described herein may be described in separate parts of this disclosure, it is understood that each concept may be practiced independently of one another or in combination with one another. Thus, the present invention may be embodied and viewed in many different ways.

[0045] To aid in understanding various embodiments, various techniques have been described as multiple separate operations. The order of description should not be construed to imply that these operations are necessarily order dependent. In fact, these operations need not be performed in the order presented. The described operations may be performed in a different order than in the described embodiments. In additional embodiments, various additional operations may be performed and / or described operations may be omitted.

[0046] As used herein, "substrate" or "target substrate" generally refers to an object to be processed according to the present invention. A substrate may include any material portion or structure of a device, particularly a semiconductor or other electronic device, such as a base substrate structure, such as a semiconductor wafer, a reticle, or a layer provided on or overlying a base substrate structure, such as a thin film. Thus, substrate is not limited to any particular base structure, underlying layer, or overlying layer, whether or not patterned, but is intended to include any such layer or base structure, and any combination of layers and / or base structures. References to particular types of substrates may be made herein for illustrative purposes only.

[0047] Those skilled in the art will also appreciate that many variations are possible in the operation of the techniques described above while still achieving the same objectives of the present invention. Such variations are intended to be within the scope of the present disclosure. Thus, the above description of the embodiments of the present invention is not intended to be limiting. Rather, any limitations to the embodiments of the present invention are set forth in the following claims.

Claims

1. 1. A method comprising: receiving a wafer having a processing surface for one or more devices to be fabricated thereon and a backside opposite the processing surface; measuring the wafer to determine a bow measurement for the wafer; forming a first stress modifying film on the work surface of the wafer, the first stress modifying film being heat responsive such that applied heat modifies internal stress of the first stress modifying film; forming a second stress modifying film on the backside of the wafer, the second stress modifying film being heat responsive such that applied heat modifies internal stress of the second stress modifying film; applying a first heat pattern onto the first stress modifying film to modify the internal stress of the first stress modifying film; applying a second heat pattern onto the second stress modifying film to modify the internal stress of the second stress modifying film; Including, The method wherein the first and second thermal patterns correspond to the bow measurements of the wafer.

2. The method of claim 1 , wherein at least one of the first and second patterns of heat is applied by a laser.

3. The method of claim 1 , wherein the warp measurements include a plurality of first minor warp measurements, and the first heat pattern is applied by a plurality of heating units corresponding to the first minor warp measurements.

4. The method of claim 3 , wherein the heating unit is mounted on a wafer chuck.

5. The method of claim 1 , wherein forming the first stress modifying film is performed before measuring the wafer to determine a bow measurement for the wafer.

6. 6. The method of claim 5, wherein forming the second stress modifying film is performed before measuring the wafer to determine a bow measurement for the wafer.

7. The method of claim 1 , wherein forming the first stress modifying film is performed after measuring the wafer to determine a bow measurement of the wafer.

8. 1. A system comprising: a warpage measurement device configured to measure a wafer to determine a warpage measurement of the wafer, the wafer having a work surface for one or more devices to be fabricated thereon and a back surface opposite the work surface; a stress modifying film forming device configured to form first and second stress modifying films, the first and second stress modifying films being heat responsive such that applied heat modifies the internal stress of the first and second stress modifying films; a heat generator configured to generate a pattern of heat; a controller coupled to the warp measurement device, the stress modifying film formation device, and a thermal heat generator, the controller being configured to: control the warp measurement device to measure the wafer to determine a warp measurement value of the wafer; control the stress modifying film formation device to form the first and second stress modifying films on the backside and work side of the wafer, respectively; and control the heat generator to generate and apply the pattern of heat on the first stress modifying film and / or the first and second stress modifying films, the pattern of heat corresponding to the warp measurement value; A system comprising:

9. The system of claim 8 , wherein the heat generator comprises a laser.

10. The system of claim 8 , wherein the warp measurements include a plurality of minor warp measurements, and the heat generator includes a plurality of heating units corresponding to the minor warp measurements.

11. The system of claim 10 further comprising a wafer chuck, wherein the heating unit is mounted on the wafer chuck.

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