System and method for data communication using amplitude-encoded sine waves - Patents.com

Abstract

A system and method for data communications using amplitude-coded sine waves. The method includes encoding input digital data using a plurality of symbol waveforms, each of the plurality of symbol waveforms occupying a period of a composite coded waveform and representing at least one bit of the input digital data. A first symbol waveform of the plurality of symbol waveforms is defined by a sine wave of a first amplitude and a second symbol waveform is defined by a sine wave of a second amplitude different from the first amplitude. The method includes generating an encoded analog waveform from a representation of the composite coded waveform.

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority to and the benefit of U.S. Provisional Patent Application No. 63 / 315,853, filed March 2, 2022, entitled SYSTEM AND METHOD FOR DATA COMMUNICATION USING AMPLITUDE-ENCODED SINUSOIDS, the disclosure of which is incorporated by reference in its entirety into this specification for all purposes.

[0002] Field

[0002] The present disclosure relates generally to data communication systems, and more particularly to a method and system for data communication using sine waves. [Background technology]

[0003] background

[0003] There are various transmission channels used to transmit data or information. Telephone lines, which are made up of copper wires, have been used for over 100 years to transmit both voice and data. Wireless transmission of radio signals has been in existence for almost 100 years. Radio stations send out radio signals on the airwaves to be received by radio receivers. As is known, radio stations have programming that may include music, news or programs. A satellite is an example of another transmission channel, where a satellite antenna located at a first location is used to transmit a signal to the satellite that is beamed or transmitted from the satellite to a second satellite antenna located at a location distant from the first location. Recently, cellular communication systems are used for communication between mobile phones. A huge amount of data is transmitted using cellular communication systems. At this time, it is essential to be able to increase the data throughput on any transmission channel used. It is also important to address the problem of signal degradation during signal transmission. Some problems encountered when transmitting signals over a transmission channel include delay, interference and nonlinearity of the transmission path.

[0004]

[0004] Transmission techniques or methods that have been developed and used to increase data throughput over transmission channels include amplitude modulation (AM), frequency modulation (FM), phase modulation, QAM (quadrature amplitude modulation), QPSK (quadrature phase shift keying), PSK (phase shift keying) and APSK (amplitude and phase shift keying).

[0005]

[0005] Amplitude modulation is a modulation technique used to transmit information using a radio carrier wave. A sine wave carrier wave is amplitude modulated with a message waveform before transmission. That is, the amplitude of the carrier wave varies proportionally to the amplitude of the message waveform, which is typically a voice signal of a frequency substantially lower than that of the carrier wave. Some disadvantages associated with the use of amplitude modulated signals are that they are not efficient in terms of their power usage, they are not efficient in terms of bandwidth usage, they require a bandwidth equal to twice the highest audible frequency, and they are prone to high levels of noise.

[0006]

[0006] Frequency modulation is a modulation technique in which information is encoded within a carrier wave by varying its frequency. Frequency modulation has some advantages over amplitude modulation, but some disadvantages include the need for more complex demodulators and being less spectrally efficient than some other modulation techniques.

[0007] QAM is a form of multi-level amplitude and phase modulation that modulates a source signal into an output waveform with variable amplitude and phase. A system employing QAM modulates a source signal into an output waveform with variable amplitude and phase. A message to be transmitted is mapped into a two-dimensional, four-quadrant signal space or constellation with signal points or phasors each representing a possible transmission level. Each signal point in the constellation is called a symbol. A QAM constellation has a coordinate system defined by an I or in-phase axis and a Q or quadrature axis or an IQ plane. A symbol can be represented by both an I component and a Q component. One of the drawbacks of using QAM is that the higher the data rate, the higher the peak-to-average power ratio. For example, in a typical constellation diagram for 16QAM, it can be seen that there are four possible power levels. As the order of modulation increases, the number of power levels required also increases. All of this causes a higher peak-to-average power ratio to be experienced.

[0008]

[0008] QPSK has a synchronous data stream modulated onto a carrier frequency before being transmitted on a channel. The carrier can have four states, such as 45°, 135°, 225° or 315°. QPSK also employs quadrature modulation and can represent signal points using two orthogonal coordinate axes, such as the IQ plane. Conventional QPSK has the problem that the transition between two diagonal transmission symbol points in the complex plane passes through a zero point. At the transition between these diagonal transmission symbols, a drop in amplitude, called the envelope, can occur to practically zero. At the receiver side, this complicates the necessary synchronization and promotes nonlinearities in the transmission path, signal distortion and undesired intermodulation.

[0009]

[0009] PSK is another digital modulation process that transmits a message by modulating the phase of a carrier wave. One drawback of using PSK is that the error rate becomes too high when using high-order PSK constellations.

[0010]

[0010] As the name APSK suggests, this form of modulation uses amplitude and phase shift keying, in which a signal is conveyed by modulating both the amplitude and phase of a carrier wave. Amplitude and frequency shift keying can reduce the number of power levels required to transmit information for any given modulation order. Summary of the Invention [Means for solving the problem]

[0011] overview In one aspect, the present disclosure relates to a method of data communication using amplitude-coded sine waves. The method includes encoding input digital data using a plurality of symbol waveforms. Each of the plurality of symbol waveforms occupies a period of a composite encoded waveform and represents at least one bit of the input digital data. Additionally, each symbol waveform has a first half-sine wave of a first polarity and a second half-sine wave of a second polarity opposite to the first polarity. A first symbol waveform of the plurality of symbol waveforms is defined such that the first half-sine wave is of a first amplitude and the second half-sine wave is of a second amplitude different from the first amplitude. A second symbol waveform of the plurality of symbol waveforms is defined such that the first half-sine wave is of a second amplitude and the second half-sine wave is of the first amplitude. An encoded analog waveform is generated from a representation of the composite encoded waveform.

[0012]

[0012] The present disclosure also relates to a method of recovering input digital data encoded by symbol waveforms, each of the symbol waveforms occupying a period of an encoded composite waveform, representing at least one bit of the input digital data, and including a first half-sine wave and a second half-sine wave. The method includes receiving an encoded analog waveform generated using the plurality of symbol waveforms. Digital symbol samples representing replicas of the plurality of symbol waveforms are then generated from the received encoded analog waveform. The method includes identifying samples of the digital symbol samples that correspond to first and second maximum values ​​of the first and second half-sine waves of each of the plurality of symbol waveform replicas, respectively. The input digital data is estimated based on the first and second maximum values ​​of the first and second half-sine waves of each of the plurality of symbol waveform replicas.

[0013] In another aspect, the present disclosure is directed to a data communication system including an input buffer configured to store input digital data. A time domain modulator encodes the input digital data using a plurality of symbol waveforms, each of the plurality of symbol waveforms occupying a period of a composite encoded waveform and representing at least one bit of the input digital data. Each symbol waveform has a first half-sine wave of a first polarity and a second half-sine wave of a second polarity opposite to the first polarity. The time domain modulator defines a first symbol waveform of the plurality of symbol waveforms such that the first half-sine wave of the first symbol waveform is of a first amplitude, and the second half-sine wave of the first symbol waveform is of a second amplitude different from the first amplitude. The time domain modulator also defines a second symbol waveform of the plurality of symbol waveforms such that the first half-sine wave of the second symbol waveform is of a second amplitude, and the second half-sine wave of the second symbol waveform is of a first amplitude. One or more digital-to-analog converters generate an encoded analog waveform from the representation of the composite encoded waveform.

[0014]

[0014] The present disclosure is also directed to an alternative method for data communication using amplitude-coded sine waves. The method includes encoding input digital data using a plurality of symbol waveforms, each of the plurality of symbol waveforms occupying a period of a composite coded waveform and representing at least one bit of the input digital data. A first symbol waveform of the plurality of symbol waveforms is defined by a sine wave of a first amplitude, and a second symbol waveform is defined by a sine wave of a second amplitude different from the first amplitude. The method includes generating an encoded analog waveform from a representation of the composite coded waveform.

[0015]

[0015] In a further aspect, the disclosure relates to a method of recovering input digital data encoded by symbol waveforms, each of the symbol waveforms representing at least one bit of the input digital data and including one period of a sine wave occupying a period of an encoded composite waveform. Each period of the sine wave is of a first amplitude corresponding to a first bit value or a second amplitude corresponding to a second bit value. The method includes receiving an encoded analog waveform generated using a plurality of symbol waveforms, and generating digital symbol samples representing the plurality of symbol waveforms using the encoded analog waveform. The method further includes identifying recovered sine wave amplitudes corresponding to replicas of the plurality of symbol waveforms based on the digital symbol samples. The input digital data is then estimated based on the recovered sine wave amplitudes.

[0016]

[0016] The present disclosure also relates to a data communication system including an input buffer configured to store input digital data. A time domain modulator encodes the input digital data using a plurality of symbol waveforms, each of the plurality of symbol waveforms occupying a period of a composite encoded waveform and representing at least one bit of the input digital data. The time domain modulator defines a first symbol waveform of the plurality of symbol waveforms using a sine wave of a first amplitude and defines a second symbol waveform using a sine wave of a second amplitude different from the first amplitude. One or more digital-to-analog converters generate an encoded analog waveform from a representation of the composite encoded waveform.

[0017]

[0017] These and other advantages of the present disclosure will become apparent after considering the following detailed specification in conjunction with the accompanying drawings.

[0018] BRIEF DESCRIPTION OF THE DRAWINGS

[0018] It will be understood by those skilled in the art that the drawings are primarily for illustration purposes and are not intended to limit the scope of the inventive subject matter described herein. The drawings are not necessarily to scale, and in some cases various aspects of the inventive subject matter disclosed herein may be exaggerated or enlarged in the drawings to facilitate understanding of different features. Furthermore, common but well-understood elements that are useful or necessary in commercially feasible embodiments are often not depicted to facilitate unobstructed illustration of these various embodiments of the invention. In the figures, like reference characters generally refer to like features (e.g., functionally similar and / or structurally similar elements). [Brief description of the drawings]

[0019] [Figure 1] 1 is a block diagram of a communication system having a transmitter and a receiver constructed in accordance with the present disclosure. [Diagram 2]

[0020] 2 is a block diagram of an embodiment of the transmitter shown in FIG. 1. [Diagram 3]

[0021] FIG. 2 is a block diagram of an embodiment of the receiver shown in FIG. [Figure 4]

[0022] 1 shows three periods of an encoded waveform generated using full-wave sine wave encoding in accordance with the present disclosure. [Diagram 5]

[0023] 1 illustrates three periods of an encoded waveform generated using half-sine wave encoding in accordance with the present disclosure. [Figure 6]

[0024] FIG. 1 is a block diagram of a transmitter configured to implement sinusoidal amplitude encoding in accordance with the present disclosure. [Figure 7]

[0025] 7 is a block diagram of a receiver configured to demodulate and decode the encoded waveform generated by the transmitter of FIG. 6. [Figure 8]

[0026] FIG. 1 is a functional block diagram of one embodiment of an amplitude-coded sine wave transmitter suitable for implementation using a field programmable gate array (FPGA). [Figure 9]

[0027] 9 is a flowchart illustrating an exemplary sequence of encoding and other operations performed by the amplitude-coded sine wave transmitter of FIG. 8 in accordance with one embodiment. [Figure 10]

[0028] FIG. 10 is a functional block diagram of another embodiment of an amplitude-encoded sine wave transmitter 1000 suitable for implementation by an FPGA. [Figure 11]

[0029] 11 is a flowchart depicting an exemplary sequence of encoding and other operations performed by the transmitter of FIG. 10 in accordance with one embodiment. [Figure 12]

[0030] FIG. 11 is a functional block diagram of another embodiment of an amplitude-coded sine wave transmitter suitable for implementation by an FPGA. [Figure 13]

[0031] FIG. 2 is a functional block diagram of a receiver configured to receive and demodulate an encoded amplitude-coded sine wave transmitted by an amplitude-coded sine wave transmitter configured in accordance with the present disclosure. [Figure 14A]

[0032] 4 illustrates a first period and a second period of an encoded sinusoidal waveform according to the present disclosure. [Figure 14B]

[0033] 1 shows an encoded sinusoidal waveform that is shaped to minimize any noise associated with the transition of the waveform from a first period to a second period in the transition region. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] Detailed Description

[0034] Referring now to the drawings, where like numbers refer to like items, the number 10 identifies a communication system constructed in accordance with the present disclosure. Referring now to FIG. 1, a data transmission or communication system 10 is illustrated including a transmitter 12 for receiving input data 14 and generating a coded waveform 16 comprised of an amplitude coded sine wave representing the input data 14. In the embodiment of FIG. 1, each period of the coded waveform 16 includes one cycle of the amplitude coded sine wave representing one bit of the input data 14. A circuit 18 transmits the coded waveform 16 over a communication channel 20. The system 10 further includes a receiver 22 for receiving the coded waveform 16 and a circuit 24 for recovering a replica of the input data 14 from the coded waveform. The receiver 22 outputs the recovered input data 14', shown by way of example only, to some other device such as a monitor, a computer, an audio component, or a speaker. The communication channel 20 may be provided by a medium such as a telephone or telephone company line, such as a coaxial cable, a fiber optic cable, a copper wire, or the like, radio frequency, or open air by space or satellite. A channel 20 can carry one or many messages.

[0021]

[0035] 2, a block diagram of the transmitter 12 is depicted. The transmitter 12 includes a microcontroller 30 having a USB input 32 for receiving input data 14, which may represent, for example, music, video, text, or a combination thereof. The input data 14 is provided to the microcontroller 30 from the USB input 32 over a connection 34. The microcontroller 30 may also include a memory 36, such as a 16 MB memory, an 8 MHz input 38, and a digital-to-analog converter (DAC) output 40. The microcontroller 30 may generate sine waves or other waveforms and sine tables, read the input data 14, break down the input data 14, and modulate the amplitude of individual sine wave cycles or half cycles thereof to generate an encoded waveform 16 representing the input data 14.

[0022]

[0036] As discussed below, each period of the coded waveform 16 includes an amplitude-coded sine wave having a positive half-sine wave and a negative half-sine wave. The amplitudes of the positive half-sine wave and the negative half-sine wave may be set to define two or more different amplitude-coded sine waves or symbols, each of which may represent a bit of information. In a "full wave" implementation, the amplitudes of both half-sine waves in a given period of the coded waveform 16 are set to the same level. In a "half wave" implementation, the amplitudes of the positive half-sine wave and the negative half-sine wave in a given period of the coded waveform 16 are set to different levels. The microcontroller 30 provides the signal 16 to a DAC output 40. The DAC output 40 may be connected to other circuitry (not shown) capable of transmitting the coded waveform 16. One example of the microcontroller 30 is a device manufactured by STMicroelectronics known as the STM32F756 family of microcontrollers, or other similar microcontrollers may be used.

[0023]

[0037] 3 shows a block diagram of a receiver 22 constructed in accordance with the present disclosure. The receiver 22 includes a microcontroller 42 having an analog-to-digital converter (ADC) input 44 for receiving the full-wave or half-wave encoded signal 16 transmitted by the transmitter 12. The signal 16 from the input 44 is provided to the microcontroller 30 on a connection 46. The microcontroller 42 may also include a memory 48, such as a 16 MB memory, an 8 MHz input 50, and an RS232 or USB output 52. The output 52 is provided to another device (not shown), such as a speaker. The microcontroller 42 may generate an amplitude-coded sine wave of the type described herein. The microcontroller 42 further reads the signal 16 from the ADC input 44, reassembles the input data 14, and transmits symbols to the output 52 for use by another device (not shown). Again, one example of the microcontroller 30 is a device manufactured by STMicroelectronics known as the STM32F756 family of microcontrollers, or other similar microcontrollers may be used.

[0024]

[0038] As discussed below, each period of the coded waveform 16 includes an amplitude-coded sine wave having a positive half-sine wave and a negative half-sine wave. In a full-wave implementation of the coding scheme of the present invention, the amplitudes of both the positive and negative half-cycles of the amplitude-coded sine wave in each period of the coded waveform 16 depend on the value of the bit of the input data 14 represented by that period of the coded waveform. In a half-wave implementation of the coding scheme of the present invention, the amplitudes of the positive and negative half-cycles of the amplitude-coded sine wave in each period of the coded waveform 16 are different and depend on the value of the bit of the input data 14 represented by that period of the coded waveform. Thus, one or more aspects of the amplitude of the sine wave in a given period of the coded waveform 16 are coded to reflect the bit value of the input data associated with that period, and each such amplitude-coded sine wave is of identical duration. As a result, the frequency of the coded waveform 16 is constant, and each amplitude-coded sine wave crosses zero at the beginning and end of a period of the coded waveform 16, completely defining the bit value of the input digital data. These properties of the disclosed coding scheme, which are fundamentally different from those of conventional signal modulation techniques, are believed to contribute to the fact that nearly all of the signal energy of the coded waveform 16 generated in accordance with the present disclosure is concentrated within a very narrow bandwidth, as observed.

[0025]

[0039] Attention is now directed to FIG. 4, which illustrates three periods of an encoded waveform 410 generated using full-wave amplitude encoding according to the present disclosure. Again, in a full-wave implementation of the present encoding scheme, both the amplitude of the positive half-cycle and the amplitude of the negative half-cycle of the amplitude-encoded sine wave in each period of the encoded waveform 410 depend on the input bit value. For example, if the bit value of the input data is a "1", then both the positive half-cycle and the negative half-cycle of the amplitude-encoded sine wave in the corresponding period of the encoded waveform 410 representing this "1" are set to a first value. On the other hand, if the bit value of the input data is a "0", then both the positive half-cycle and the negative half-cycle of the amplitude-encoded sine wave in the period of the encoded waveform 410 representing this "0" may be set to a different second value. In the illustrative example of FIG. 4, the amplitudes of the sine waves 452 and 456 defined during the first period 420 and the third period 440, respectively, of the waveform 410 are both set to a level of 1.0. The amplitude of the sine wave 454 defined during the second period 430 of the waveform 410 is set to a level of approximately 0.9, as shown by the amplitudes of peaks 454a and 454b of the positive and negative half cycles of the sine wave 454. In the embodiment of Figure 4, the symbol defined by the sine wave 452 in the first waveform period 420 represents a logic "1", the symbol defined by the sine wave 454 in the second waveform period 430 represents a logic "0", and the symbol defined by the sine wave 456 in the third waveform period 440 represents a logic "1".

[0026]

[0040] 5, there is shown an illustrative diagram of three periods of an encoded waveform 510 generated using half-wave amplitude encoding in accordance with the present disclosure. Again, in a half-wave implementation of the present encoding scheme, the amplitudes of the positive and negative half cycles of the amplitude-encoded sine wave in each period of the encoded waveform 510 are different and depend on the value of the bit of input data represented by that period of the encoded waveform 510. In the illustrative example of FIG. 5, an amplitude-encoded sine wave 552 defined in a first period 520 of the waveform 510 represents a bit value of "1" of the input data. In this case, the peak 552a of the positive half cycle of the sine wave 552 is set to a first nominal amplitude (e.g., 1.0) and the peak 552b of the negative half cycle is set to a different second amplitude (e.g., 0.8). As shown, an amplitude-encoded sine wave 554 defined in a second period 530 of the waveform 510 represents a bit value of "0" of the input data. In this case, the peak 554a of the positive half cycle of the amplitude-coded sine wave 554 is set to a second amplitude (e.g., 0.8) and the peak 554b of the negative half cycle is set to a nominal amplitude (e.g., 1.0). The amplitude-coded sine wave 556 defined within the third period 540 of the waveform 510 represents a bit value of "1" of the input data. In this case, the peak 556a of the positive half cycle of the waveform 556 is set to a first amplitude (e.g., 1.0) and the peak 556b of the negative half cycle is set to a second amplitude (e.g., 0.8).

[0027]

[0041] This use of amplitude-coded sine waves or symbols, as shown in Figures 4 and 5, to represent data bits in each period of the coded waveform differs in several ways from conventional amplitude modulation. First, in conventional amplitude modulation, the frequency of the envelope formed by the message or information signal is typically much lower than the frequency of the carrier signal. In contrast, in the present system, the input data rate is equal to the inverse of the period of the coded waveform. Second, and unexpectedly, it has been found that nearly all of the signal energy of a coded waveform composed of an amplitude-coded sine wave of the type described herein is concentrated within an extremely narrow bandwidth. In particular, the bandwidth occupied by the coded waveforms of the present disclosure can be vanishingly small and may in some cases depend only on the accuracy of the equipment used (e.g., the phase noise and jitter of such equipment). As a result, adjacent coded waveforms can be spaced very closely together, resulting in an extremely efficient use of spectrum.

[0028]

[0042] As can be seen with respect to Figures 4 and 5, the sinusoidal coding described herein may be characterized as quasi-periodic coding in that it may be conceptualized as encoding the amplitude of a sine wave during and within individual periods of the sine wave, rather than across multiple periods of a sine wave carrier. That is, the beginning and end of each period of the sine wave is not modified as a result of the relatively subtle amplitude adjustments imposed within such period. This results in a series of amplitude-coded sine waves of the same period, with the amplitudes of the positive and negative half sine waves of each amplitude-coded sine wave corresponding to an associated bit value.

[0029]

[0043] 14A, a first period 1404 and a second period 1408 of an encoded sinusoidal waveform 1412 are shown. In the embodiment of FIG. 14A, the first period 1404 of the waveform 1412 may encode a logical "1" and the second period 1408 may encode a logical "0". As shown, the amplitude of the encoded waveform 1412 is 2.0 within the first period 1404 and 1.0 within the second period 1408. Although the waveform 1412 is continuous within a transition region 1420 between the first period 1404 and the second period 1408, the waveform may not be differentiable at the zero crossings within the transition region 1420. Furthermore, a significant difference in the amplitude of the encoded waveform 1412 between the first period 1408 and the second period 1408 may contribute to the generation of noise within the transition region 1420. However, given that the amplitude of the waveform 1412 is substantially zero at the transition from the first period 1404 to the second period 1408, the magnitude of such noise is not expected to be significant.

[0030]

[0044] 14B illustrates an encoded sine waveform 1450 that has been shaped to minimize any noise associated with the transition of the waveform 1450 from a first period 1454 to a second period 1458 in a transition region 1462. As shown, the amplitude of the waveform 1450 is 2.0 during the first period 1454 and 1.9 in the second period 1458. As the waveform 1450 transitions between the first period 1454 and the second period 1458 in the transition region 1462, this minimizes the change in slope of the waveform 1450 and therefore the generation of noise energy associated with the transition. It has been found that noise associated with the transition region is minimized when the amplitude of the waveform 1450 in the second period 1458 is within 10% of the amplitude of the waveform 1450 in the first period 1458, and preferably when the amplitude of the waveform 1450 in the second period 1458 is within 5% of the amplitude of the waveform 1450 in the first period 1458. More generally, the smoothness of the transition between periods of the waveform 1450 depends on both the variation in amplitude between periods and the resolution of the DAC 40. For example, using a 12-bit DAC provides 4,096 levels of granularity from +1 to -1, which will greatly attenuate any resulting transition noise. Furthermore, by pipelining the DAC, the resolution within the transition region 1462 can be made to substantially the desired accuracy.

[0031]

[0045] In one embodiment, a coded waveform consisting of an amplitude-coded sine wave is generated directly as a series of voltage points using a software-defined radio (SDR). This series of voltage points can then be provided to a digital-to-analog converter to generate a corresponding analog version of the coded waveform. As mentioned above, when generated digitally to define the amplitude-coded sine wave symbols of the kind described herein, such generation substantially avoids the generation of harmonics and sidebands. This is believed to be significantly different from prior art techniques where traditional modulation of a sine wave generates harmonics and sidebands of significant power. Such prior art techniques typically require suppressing or otherwise filtering either the sine wave carrier or the sidebands.

[0032]

[0046] Attention is now directed to FIG. 6, which is a block diagram of a transmitter 600 configured to implement sinusoidal coding in accordance with the present disclosure. As shown, the transmitter 600 includes a data optimization and forward error correction (FEC) module 610, a quasi-periodic time domain modulator 630 configured for sinusoidal coding in accordance with the present disclosure, and a digital-to-analog converter 640. The data optimization and FEC module 610 may include, for example, a BCH encoding unit 616 to which input data is provided and an AES128 module 614. The BCH block 616 facilitates detection at the receiver by pre-processing the input data to approximately equal the number of "1" values ​​in the data to the number of "0" values ​​in the data. The AES128 unit 614 also assists detection at the receiver by processing the BCH encoded input data to limit the run length of strings of the same data value.

[0033]

[0047] Consistent with the AES128 protocol, the 16-bit BCH encoded data from the BCH encoding unit 616 is provided to an AES128 module 614 and processed over multiple rounds according to an encryption key. The AES128 module 614 is not intended to encrypt data, but may be used for encryption. The resulting encrypted output generated by the AES128 module 614 is then provided to an encoder 620.

[0034]

[0048] During operation of the transmitter 600, an input data buffer is transferred to the AES128 module 614 and processed according to a known key (e.g., 0x47). Again, in one embodiment, the main task of the AES128 module 614 is to achieve an even distribution of bits to prevent a series of 0 bits following one another. At this point, the data generated by the AES128 module 614 is transferred to the sine wave modulator 630.

[0035]

[0049] The modulator 630 receives the error corrected sequence provided by the data optimization and FEC module 610 and identifies an amplitude coded sine wave stored in a symbol lookup table 634 that corresponds to each bit of the received error corrected sequence. In one embodiment, the symbol lookup table 634 stores data values ​​(e.g., 3600 data values) corresponding to a single period of each of a set of different sine wave symbols. For example, the symbol lookup table 634 may store data values ​​for the sine wave symbols corresponding to the sine wave waveforms of FIG. 4 (e.g., sine waves 452 and 454) and / or the sine wave symbols corresponding to the sine wave waveforms of FIG. 5 (e.g., sine waves 552 and 554). The data values ​​defining the sine wave symbols corresponding to each bit of the received error corrected sequence are read from the lookup table 634 and provided to the DAC 640 to generate each period of the coded analog waveform.

[0036]

[0050] Attention is now directed to Figure 7, which is a block diagram of a receiver 700 configured to demodulate and decode, for example, a coded waveform generated by the transmitter 600. As shown, the receiver 700 includes an analog-to-digital converter (ADC) 710 operable to create a multi-bit representation of the received coded waveform. Digital samples of the received signal are provided to an input buffer 718 of a zero-crossing detector 720. Upon detecting a zero crossing within the samples stored in the input buffer 718, the zero-crossing detector 720 generates a zero-crossing detection signal 724. In response to the zero-crossing detection signal 724, a sine wave subtraction circuit 730 initiates a sine wave subtraction process whereby a digital representation of an unmodulated sine wave that is in phase with the received amplitude coded sine wave signal is subtracted from the digital samples of the amplitude coded sine wave signal. The series of digital values ​​resulting from this subtraction process are then stored in a ring buffer 740, which incorporates a preamble detector 742 configured to detect a preamble inserted within the input data stream provided to the transmitter 600. Once the preamble is detected, the received data stream is provided to a decoder 750 configured to perform the inverse of the operations performed by the AES module 614 and the BCH encoding module 616. The sine wave demodulator 760 can then identify the maximum value of the sine wave present in the data stream generated by the decoder 750 and therefrom identify a replica of the amplitude-coded sine wave encoding the input data. In the case of full-wave amplitude encoding and as shown in FIG. 4, the absolute values ​​of the positive and negative half cycles of the replicated amplitude-coded sine wave within a given period of the received encoded waveform will be approximately the same. In the case of half-wave amplitude encoding and as shown in FIG. 5, the absolute values ​​of the positive and negative half cycles of the replicated amplitude-coded sine wave within a given period of the received encoded waveform will be different. Upon identifying the replica of the amplitude-coded sine wave present in the data stream generated by the decoder 750, the demodulator 760 generates a recovered data stream corresponding to an estimate of the input data provided to the transmitter 600.

[0037]

[0051] Attention is now directed to Figure 8, which is a functional block diagram of one embodiment of an amplitude-coded sine wave transmitter 800 suitable for implementation using a field programmable gate array (FPGA). As shown, the transmitter 800 includes an input buffer 804 for storing digital input data 808, a data optimization unit in the form of an AES encryption module 810, and an LDPC encoder 820.

[0038]

[0052] The sine wave modulator 840 encodes the data values ​​provided by the LDPC encoder 820 by identifying a corresponding amplitude-coded sine wave and generating a bit stream representative thereof. As shown, the sine wave modulator 840 includes an input register 844, an amplitude-coded sine wave lookup table 848, a time generator 852, and a wave buffer 856. The digital representation of the amplitude-coded sine wave generated by the modulator 840 is stored in the wave buffer 856 and is optionally predistorted or otherwise filtered by a filter 860 before being converted to an analog signal by a digital-to-analog converter 864. The resulting encoded analog signal is transmitted, for example, using a transmission line or an antenna.

[0039]

[0053] 9 is a flow chart 900 illustrating an exemplary sequence of encoding and other operations performed by an amplitude-coded sine wave transmitter 800 according to one embodiment. Once input data is stored in an input buffer 804 (step 910), it is provided to an AES encryption module 810. In one embodiment, the AES encryption module 810 processes the input data to limit run lengths of strings of the same logical value, thereby aiding in detection of the data at the receiver (step 912). The resulting output generated by the AES encryption module 810 is provided to an LDPC encoder 820, which performs a low-density parity check (LDPC) error correction encoding operation (step 916). The serial data stream generated by the LDPC encoder 820 is then provided to an input register 844 of a modulator 840 (step 920).

[0040]

[0054] During operation of the sine wave transmitter 800, bit values ​​from the input register 844 are provided to an amplitude-coded sine wave lookup table 848 (stage 924) to identify an amplitude-coded sine wave corresponding to the bit value in the register 844. In one embodiment, the lookup table 848 stores data values ​​(e.g., 3600 data values) corresponding to a single period of each of two amplitude-coded sine waves (one representing a bit value of "1" and the other representing a bit value of "0"). Data values ​​defining each successive amplitude-coded sine wave corresponding to each successive registered bit value are then read from the lookup table 848 (stage 928) and stored in the wave buffer 856 (stage 932).

[0041]

[0055] Time generator 852 provides a clocking signal to wave buffer 856 such that a relatively constant data rate is maintained into filter 860. Because the data rate of the input data provided to input buffer 804 may be somewhat bursty or otherwise irregular, time generator 852 acts to essentially remove any resulting jitter from the data stream produced by lookup table 848 before it is provided to filter 860.

[0042]

[0056] In one embodiment, the transmitter 800 includes a frequency monitor / flow control module 870 operable to control the data rate into the modulator 840. Specifically, the flow control module 870 monitors the data rate into the input register 844 and the data rate into the wave buffer 856. If the data rate into the input register 844 begins to exceed the data rate into the wave buffer 856, the flow control module 870 sends data back from the input register to the input buffer 804 until the data rates are equal (stage 936).

[0043]

[0057] The digital representation of the amplitude-encoded sine wave stored in wave buffer 856 is optionally predistorted or otherwise filtered by filter 860 to compensate for quantization errors introduced by digital-to-analog converter 864 (stage 940). In one embodiment, this filtering may include introducing a predistortion signal having a power spectrum in the frequency domain equivalent to that expected to be induced by such quantization errors and phase shifted by 180 degrees. The filtered digital signal produced by filter 860 is then converted to a coded analog signal by DAC 864 for transmission over either a wired or wireless communication medium (stage 944).

[0044]

[0058] Attention is now directed to Figure 10, which is a functional block diagram of another embodiment of an amplitude-coded sine wave transmitter 1000 suitable for implementation, for example, by an FPGA. Except as described below, the structure and functionality of transmitter 1000 is substantially identical to that of transmitter 800 of Figure 8. Accordingly, like reference numerals are used in Figures 8 and 10 to identify substantially identical transmitter components. As can be seen with respect to Figures 8 and 10, the structure of transmitter 1000 differs from that of transmitter 800 in that sine wave modulator 840' additionally includes a sine wave generator 1010 and a mode switch 1020. These additional elements are intended to enable transmitter 1000 to operate at relatively high data rates, and are discussed below.

[0045]

[0059] 11, a flowchart 1100 is provided illustrating an exemplary sequence of encoding and other operations performed by transmitter 1000, according to one embodiment. Given the structural and functional similarities between transmitter 1000 and transmitter 800 of FIG. 8, like reference numerals are used in the flowcharts of FIG. 9 and FIG. 11 to identify substantially identical operations.

[0046]

[0060] During operation of the transmitter 1000, the sine wave modulator 840' determines whether the data rate provided to the input register 844 exceeds a predefined data rate (step 1110). At relatively low data rates, i.e., data rates less than the predefined data rate known to the modulator 840', data points defining an amplitude coded sine wave corresponding to the bit values ​​registered in the input register 844 are read from the amplitude coded sine wave lookup table 848 and provided to the wave buffer 856 via the mode switch 1020 (step 928). In one embodiment, the predefined data rate is set to the data rate at which stored data defining the amplitude coded sine wave can be read from the lookup table 848. Because in one implementation a relatively large number of points (e.g., 3600) are used to define each amplitude coded sine wave, at higher data rates the I / O capabilities of certain memory implementations may be insufficient to support the desired input data rate. Thus, in one embodiment, the data points defining the amplitude-coded sine wave corresponding to the bit values ​​sequentially registered in the input register 844 are generated “on the fly” by the amplitude-coded sine wave generator 1010 rather than being read from the sine table 848.

[0047]

[0061] In this embodiment, for full-wave amplitude encoding, the amplitude-coded sine wave generator 1010 may be configured to generate a set of data points (e.g., 360 data points) for a sine wave of a desired amplitude by simply executing a processing loop that solves the equation of a sine wave at a set of phase angles (e.g., each of 360 degrees). For half-wave sine wave amplitude encoding, a half sine wave of a desired amplitude is generated by executing a processing loop that solves the equation of a sine wave at a set of phase angles (e.g., each of 180 degrees) spanned by the half sine wave. This approach allows for a lower resolution in defining the amplitude-coded sine wave, but a higher input data rate, compared to a high-resolution approach in which a large number of data points (e.g., 3600) per amplitude-coded sine wave are pre-stored in the sine table 848. Thereafter, once the data points defining each amplitude-coded sine wave are placed in the wave buffer 856, data flow control, filtering, and digital-to-analog conversion processes are performed in the manner described above with respect to Figures 8 and 9.

[0048]

[0062] It is a feature of the sine wave encoding techniques described herein that a series of amplitude-coded sine waves may be generated and transmitted as described herein without generating sidebands of significant power, allowing amplitude-coded sine waves generated in accordance with the present disclosure to be very closely spaced without significantly interfering with each other.

[0049]

[0063] Attention is now directed to FIG. 12, which is a block diagram representation of a multi-carrier transmitter 1200 for transmitting amplitude-coded sine waves at multiple frequencies. As shown, the transmitter 1200 includes an input buffer 1210 in which input data from an external source is stored. The data stored in the input buffer 1210 is allocated among multiple (N) amplitude-coded full-wave and / or half-wave sine waves of different frequencies by a controller 1220. Specifically, the controller 1220 directs the stream of input data to a set of N transmitters 1230. Each of the N transmitters 1230 generates a sequence of amplitude-coded sine waves of a particular frequency according to its own stream of input data from the input buffer 1210. In one implementation, each of the N transmitters 1230 may be substantially identical to the transmitter 800 or the transmitter 1000, for example, and may be implemented as a separate cell of an FPGA.

[0050]

[0064] In one embodiment, the controller 1220 controls the first transmitter 1230 to receive the first data rate. 1 2410 to the first one of the transmitters 1230 until the maximum data rate of 1 At this point, the controller routes the data to the first transmitter 1230. 1 and one or more other transmitters among the remaining N−1 transmitters 1230. Other data allocation strategies are possible. For example, a fixed amount of data from the input buffer 2410 can be provided to each of the N transmitters 1230 such that each transmitter 1230 operates at a data rate of R / N, where R is the data rate into the input buffer 2410. For example, the first four data bits received by the input buffer are provided to each of the N transmitters 1230, such that each transmitter 1230 operates at a data rate of R / N, where R is the data rate into the input buffer 2410. 1 The second 4 bits received by the input buffer may be routed to the transmitter 1230. 2and so on. If at any time the data rate into the input buffer 1210 exceeds the aggregate data rate of the N transmitters 1230, then one or more of the N transmitters 1230 may send back at least a portion of the 4-bit data frame that was provided to it for buffering in the input buffer 1210.

[0051]

[0065] Attention is now directed to Figure 13, which is a functional block diagram of a receiver 1300 configured to receive and demodulate encoded amplitude-coded sine waves transmitted by a transmitter configured in accordance with the present disclosure. For example, receiver 1300 may receive and demodulate encoded waveforms transmitted by transmitter 800 or transmitter 1000. As shown, one or more encoded sine waveforms are received by a filter 1310 of receiver 1300 and provided to an analog-to-digital converter (ADC) 1320.

[0052]

[0066] A time generator 1324 clocks or otherwise controls the output data rate of the ADC 1320. The amplitude values ​​of each received amplitude coded sine waveform generated by the ADC 1320 are provided to a wave buffer 1328. In one embodiment, digital samples representing replicas of the symbol waveform (i.e., the amplitude coded sine wave) within each period of the received coded sine waveform are generated by the ADC 1320. Alternatively, once the receiver 1300 achieves time synchronization with the received amplitude coded sine waveform (e.g., by detecting zero crossings of the received coded sine wave), the ADC 1320 may be gated "on" to generate sample values ​​only around the peak values ​​of the received coded sine wave. For example, the ADC 1320 may be turned on only for time periods equal to approximately 1 or 2 degrees of phase at phase angles of 90° and 270°. Thus, in one embodiment, the ADC 1320 is configured to sample only over a very narrow bandwidth, and further improves sensitivity by sampling only during approximately 2°-4° of a full 360° sine wave period. When receiving encoded amplitude-coded sine waveforms at multiple carrier frequencies, the ADC 1320 may be gated on and off to sample only during the 90° and 270° phase angles of each encoded sine waveform. Alternatively, a separate ADC may be used to sample each encoded amplitude-coded sine waveform in a narrow window around the 90° and 270° phase angles of the encoded sine waveform. The signal samples generated by the ADC 1320 are provided to a wave buffer 1328.

[0053]

[0067] The contents of the wave buffer 1328 are sequentially provided to a demodulator 1334, which generates a sequence of logic values ​​representing bit values ​​encoded by the amplitude coded sine wave occupying a period of the coded sine waveform received by the receiver 1300. In a half-wave amplitude coded sine wave implementation, the demodulator 1334 identifies samples of the digital symbol samples in the wave buffer 1328 that correspond to first and second maximum values, respectively, of a first half-sine wave (e.g., a positive half-sine wave) and a second half-sine wave (e.g., a negative half-sine wave) of each of a plurality of symbol waveform replicas defined by the symbol samples in the wave buffer 1328. Again, the symbol samples in the wave buffer 1328 may define replicas of the transmitted symbol waveform (i.e., the transmitted amplitude coded sine wave) substantially across all phase angles (i.e., 0°-360°) or only around a narrow phase angle window surrounding the peak values ​​of the symbol waveform at 90° and 270°. The demodulator 1334 then estimates the value of the bit carried by the transmitted symbol waveform based on the first and second maximum values ​​of the first and second half sine waves of each of the multiple symbol waveform replicas. For example, in a full-wave amplitude coded sine wave implementation, if the first and second maximum values ​​of the first and second half sine waves of the symbol replica are determined to be a predefined high value (e.g., 1.0), the symbol can be considered a logical "1". Conversely, if the first and second maximum values ​​of the first and second half sine waves of the symbol replica are determined to be a predefined low value (e.g., 0.8), the symbol can be considered a logical "0". A similar process can be performed in a half-wave implementation by determining different amplitudes of the first and second half-sine waves of the symbol replica and relating the determined amplitude combinations to the associated symbol value (e.g., a symbol replica having a first half-sine wave with a "high" amplitude and a second half-sine wave with a "low" amplitude corresponds to a logical "1").

[0054]

[0068] 13, in a full-wave amplitude coded sine wave implementation, the demodulator 1334 identifies a sample of the digital symbol samples in the wave buffer 1328 that corresponds to a maximum value of each of the replicas of the multiple symbol waveforms defined by the symbol samples in the wave buffer 1328. For example, in the case of FIG. 4, the demodulator would determine that the maximum value of the replica of the amplitude coded sine wave 452 is approximately equal to 1.0 and that the maximum value of the replica of the amplitude coded sine wave 454 is somewhat less than 1.0 (e.g., 0.9 or 0.8). The demodulator 1334 then estimates the value of the bit carried by the transmitted symbol waveform based on the maximum value of each of the replicas of the multiple symbol waveforms represented in the wave buffer 1328.

[0055]

[0069] The bit estimates generated by the demodulator 1334 are provided to an LDPC decoder 1340 that is configured to remove the LDPC coding applied by the transmitter from which the coded sine waveform originated (e.g., transmitter 800 or transmitter 1000). Similarly, an AES decode unit 1346 reverses the encryption applied by the corresponding AES encryption unit in the transmitter. The output of the AES decode unit 1346 may then be provided to an output buffer 1350. In one embodiment, the receiver 1300 searches the bit strings in the output buffer 1350 for a preamble data bit string (e.g., a string of 0x47) that signifies the start of a packet. In an exemplary implementation, the coded sine waveform received by the receiver 1300 carries frames of 1500 bits. Each frame begins with a predefined bit string (e.g., 0x47) followed by the data being communicated. Once the preamble is identified in the output buffer 1350, an estimate of the data being communicated may be provided to a local area network (LAN) or the like via a network interface 1354. Alternatively, the entire contents of output buffer 1350 may be provided to an external system configured to identify the preamble of each frame and recover the signaled data carried by the frame.

[0056]

[0070] The present disclosure discussed herein provides and describes some example embodiments of a system for data communication with high spectral efficiency. The designs, drawings, and descriptions are non-limiting examples of selected embodiments of the present disclosure. For example, other embodiments of the disclosed apparatus may or may not include features described herein. Furthermore, the disclosed advantages and benefits may apply only to certain embodiments of the present disclosure and should not be used to limit the various disclosures.

[0057]

[0071] As used herein, coupled means connected directly or indirectly by suitable means known to those of skill in the art. Coupled items may include intervening features, for example, A is coupled to C through B. Unless otherwise specified, the type of coupling, whether mechanical, electrical, fluid, optical, radiological, or other, will be indicated by the context in which the term is used.

[0058]

[0072] As used herein, a module may be, for example, any assembly and / or set of operably coupled electrical components related to performing a particular function, and may include, for example, memory, processors, electrical traces, optical connectors, software (stored in memory and / or executed in hardware), etc.

[0059]

[0073] As used herein, the singular forms "a," "an," and "the" include plural references unless the context clearly dictates otherwise. Thus, for example, the term "actuator" is intended to mean a single actuator or a combination of actuators.

[0060]

[0074] While various embodiments of the present invention have been described above, it should be understood that they are presented by way of example only, and not by way of limitation. Similarly, while the various figures may depict examples of architectural or other configurations of the present invention, this is done to facilitate an understanding of the features and functionality that may be included in the present invention. The present invention is not limited to the exemplary architecture or configurations shown, but may be implemented using a wide variety of alternative architectures and configurations. In addition, while the present invention has been described above with respect to various embodiments and implementations, it should be understood that the various features and functions described in one or more of the individual embodiments are not limited in their applicability to the particular embodiment for which they are described, but rather may be applied to one or more of the other embodiments of the present invention, either alone or in any combination, regardless of whether such an embodiment is described and whether such features are presented as part of the described embodiment. Thus, the breadth and scope of the present invention should not be limited by any of the above-described embodiments.

[0061]

[0075] Some embodiments described herein relate to computer storage products having a non-transitory computer-readable medium (which may also be referred to as a non-transitory processor-readable medium) having thereon instructions or computer code for performing various computer-implemented operations. The computer-readable medium (or processor-readable medium) is non-transitory in the sense that it does not itself include a transitory propagating signal (e.g., a propagating electromagnetic wave that carries information over a transmission medium such as space or a cable). The medium and computer code (which may also be referred to as code) may be designed and constructed for a specific purpose. Examples of non-transitory computer-readable media on which a KCM may reside include, without limitation, one-time programmable (OTP) memory, protected random access memory (RAM), and flash memory.

[0062]

[0076] Examples of computer code include, but are not limited to, microcode or microinstructions, machine instructions such as produced by a compiler, code used to create a web service, and files containing high-level instructions executed by a computer using an interpreter. For example, embodiments may be implemented using an imperative programming language (e.g., C, Fortran, etc.), a functional programming language (Haskell, Erlang, etc.), a logic programming language (e.g., Prolog), an object-oriented programming language (e.g., Java, C++, etc.), or other suitable programming language and / or development tools. Further examples of computer code include, but are not limited to, control signals, encryption code, and compression code.

[0063]

[0077] Although various embodiments have been described above, it should be understood that these are presented by way of example only, and not by way of limitation. Where the above method shows that certain events occur in a certain order, the order of certain events may be modified. In addition, certain of the events may be performed simultaneously in parallel processes, where possible, rather than just sequentially as described above. Although various modules in different devices are shown to be located within a processor of the device, they may also be located / stored within the memory of the device (e.g., software modules) and accessed and executed by the processor. Accordingly, this specification is intended to cover all such modifications and variations of the disclosed embodiments that fall within the spirit and scope of the appended claims.

[0064]

[0078] Moreover, various inventive concepts may be embodied as one or more methods, examples of which are provided. The acts performed as part of a method may be ordered in any suitable manner. Thus, although acts may be shown as sequential in an example embodiment, embodiments may be constructed in which acts are performed in an order different than that shown, which may include performing some acts simultaneously.

[0065]

[0079] All definitions provided and used herein are to be understood to supersede any dictionary definitions, definitions in documents incorporated by reference, and / or ordinary meanings of the defined terms.

[0066]

[0080] The indefinite articles "a" and "an," as used in the specification and claims, unless clearly indicated to the contrary, should be understood to mean "at least one."

[0067]

[0081] The term "and / or" as used herein and in the claims should be understood to mean "either or both" of the elements so conjoined, i.e., elements that are conjunctive in some cases and disjunctive in other cases. Multiple elements listed with "and / or" should be interpreted similarly, i.e., to mean "one or more" of the elements so conjoined. Other elements may optionally be present other than the elements specifically identified by the "and / or" clause, whether related to the elements specifically identified or not. Thus, as a non-limiting example, a reference to "A and / or B," when used in conjunction with open-ended language such as "comprising," may refer in one embodiment to only A (optionally including elements other than B), in another embodiment to only B (optionally including elements other than A), in yet another embodiment to both A and B (optionally including other elements), etc.

[0068]

[0082] As used herein and in the claims, "or" should be understood to have the same meaning as "and / or" as defined above. For example, when separating items in a list, "or" or "and / or" should be construed as being inclusive, i.e., at least one of, but also including a plurality of, an element or list of elements, optionally including additional items not listed. Only terms clearly indicating the contrary, such as "only one of" or "exactly one of" or, when used in the claims, "consisting of", refer to the inclusion of exactly one element of an element or list of elements. In general, the term "or" as used herein should be construed as indicating exclusive alternatives (i.e., "one or the other, but not both") only when preceded by a term of exclusivity, such as "either," "one of," "only one of," or "exactly one of." When used in the claims, "consisting essentially of" shall have its ordinary meaning as used in the field of patent law.

[0069]

[0083] As used herein and in the claims, the phrase "at least one" in reference to a list of one or more elements should be understood to mean at least one element selected from any one or more of the elements in the list of elements, but not necessarily including at least one of each and every element specifically listed in the list of elements, and not excluding any combination of elements in the list of elements. This definition also allows for the optional presence of elements other than those specifically identified in the list of elements to which the phrase "at least one" refers, whether or not related to those specifically identified elements. Thus, as a non-limiting example, "at least one of A and B" (or, equivalently, "at least one of A or B" or, equivalently, "at least one of A and / or B") can refer in one embodiment to at least one A, optionally including multiples, with no B present (and optionally including elements other than B); in another embodiment to at least one B, optionally including multiples, with no A present (and optionally including elements other than A); in yet another embodiment to at least one A, optionally including multiples, and at least one B, optionally including multiples (and optionally including other elements); etc.

[0070]

[0084] As in the specification above, in the claims, all transitional phrases such as "comprise," "include," "carry," "have," "contain," "accompany," "hold," "consisting of," and the like, are understood to be open-ended, i.e., meaning inclusive but not exclusive. Only the transitional phrases "consisting of" and "consisting essentially of" shall be closed or semi-closed transitional phrases, respectively, as set forth in the U.S. Patent Office Manual of Patent Examining Procedures, Section 2111.03.

Claims

1. 1. A method of data communication using an amplitude coded sine wave, comprising: receiving input digital data; encoding the input digital data using a plurality of symbol waveforms, each of the plurality of symbol waveforms occupying a period of a composite encoded waveform and representing at least one bit of the input digital data, each symbol waveform of the plurality of symbol waveforms having a first half-sine wave of a first polarity and a second half-sine wave of a second polarity opposite to the first polarity; encoding a first symbol waveform of the plurality of symbol waveforms defined such that the first half sine wave is of a first amplitude and the second half sine wave is of a second amplitude, and a second symbol waveform of the plurality of symbol waveforms defined such that the first half sine wave is of the second amplitude and the second half sine wave is of the first amplitude, the first amplitude being different from the second amplitude; generating an encoded analog waveform from said representation of the composite encoded waveform; The method includes:

2. storing in a memory first and second representations of the first and second symbol waveforms, respectively; reading the first and second representations from the memory upon said receipt of the input digital data. The method of claim 1 further comprising:

3. 2. The method of claim 1, wherein the first half-sine wave of the first symbol waveform is a positive half-sine wave and the second half-sine wave of the first symbol waveform is a negative half-sine wave.

4. The method of claim 1 , wherein a first period of the first symbol waveform is equal to a second period of the second symbol waveform.

5. 1. A method of recovering input digital data encoded by symbolic waveforms, each of the symbolic waveforms occupying a period of an encoded composite waveform, representing at least one bit of the input digital data, and including a first half-sine wave and a second half-sine wave, the method comprising: receiving an encoded analog waveform generated using a plurality of said symbol waveforms; generating digital symbol samples from the encoded analog waveform that represent replicas of the plurality of symbol waveforms; identifying samples of the digital symbol samples that correspond to first and second maxima of the first and second half sine waves, respectively, of each of the replicas of the plurality of symbol waveforms; estimating the input digital data based on the first and second maxima of the first and second half sine waves of each of the replicas of the plurality of symbol waveforms; A method comprising:

6. 1. A data communication system comprising: an input buffer configured to store the input digital data; 1. A time domain modulator for encoding the input digital data using a plurality of symbol waveforms, each of the plurality of symbol waveforms occupying a period of a composite encoded waveform and representing at least one bit of the input digital data, each symbol waveform of the plurality of symbol waveforms having a first half sine wave of a first polarity and a second half sine wave of a second polarity opposite to the first polarity; a time domain modulator defining a first symbol waveform of the plurality of symbol waveforms such that the first half sine wave of the first symbol waveform is of a first amplitude and the second half sine wave of the first symbol waveform is of a second amplitude, and the time domain modulator defining a second symbol waveform of the plurality of symbol waveforms such that the first half sine wave of the second symbol waveform is of the second amplitude and the second half sine wave of the second symbol waveform is of the first amplitude, the first amplitude being different from the second amplitude; one or more digital-to-analog converters for generating an encoded analog waveform from the representation of the composite encoded waveform. A data communication system comprising:

7. a memory for storing first and second digital representations of the first and second symbolic waveforms, respectively; 7. The system of claim 6, wherein the time domain modulator is configured to read the first and second digital representations from the memory upon receipt of bits corresponding to the input digital data stored in the input buffer.

8. 7. The system of claim 6, wherein the first half-sine wave of the first symbol waveform is a positive half-sine wave and the second half-sine wave of the first symbol waveform is a negative half-sine wave.

9. 7. The system of claim 6, wherein a first period of the first symbol waveform is equal to a second period of the second symbol waveform.

10. The method of claim 1 , wherein the second amplitude is within 10% of the first amplitude.

11. receiving input digital data; encoding the input digital data within a periodic waveform, each period of the waveform comprising an amplitude coded sine wave representing one bit value of the input digital data; generating an encoded analog waveform from a digital representation of the periodic waveform using a digital-to-analog converter, the encoded analog waveform being of frequency f and power P, the encoding being performed by modulating the periodic waveform such that any signal of frequency f' resulting from the encoding is of power P' at least 25 dB less than power P, and f' being offset from f by more than 0.5%. The method includes:

12. 1. A method of data communication using an amplitude coded sine wave, comprising: receiving input digital data; encoding the input digital data using a plurality of symbol waveforms, each of the plurality of symbol waveforms occupying a period of a composite encoded waveform and representing at least one bit of the input digital data, a first symbol waveform of the plurality of symbol waveforms being defined by a sine wave of a first amplitude and a second symbol waveform of the plurality of symbol waveforms being defined by a sine wave of a second amplitude, the first amplitude being different from the second amplitude; generating an encoded analog waveform from said representation of the composite encoded waveform; The method includes:

13. storing in a memory first and second representations of the first and second symbol waveforms, respectively; reading the first and second representations from the memory upon said receipt of the input digital data. The method of claim 12 further comprising:

14. The method of claim 12 , wherein a first period of the first symbol waveform is equal to a second period of the second symbol waveform.

15. 1. A method of recovering input digital data encoded by symbol waveforms, each of the symbol waveforms representing at least one bit of the input digital data and including one period of a sine wave occupying a period of an encoded composite waveform, each period of the sine wave being of a first amplitude corresponding to a first bit value or a second amplitude corresponding to a second bit value, the method comprising: receiving an encoded analog waveform generated using a plurality of said symbol waveforms; generating digital symbol samples representing the plurality of symbol waveforms using the encoded analog waveform; identifying recovered sinusoidal amplitudes corresponding to replicas of the plurality of symbol waveforms based on the digital symbol samples; estimating the input digital data based on the recovered sine wave amplitudes; A method comprising:

16. 1. A data communication system comprising: an input buffer configured to store the input digital data; a time domain modulator for encoding said input digital data using a plurality of symbol waveforms, each of said plurality of symbol waveforms occupying a period of a composite encoded waveform and representing at least one bit of said input digital data; a time domain modulator using a sine wave of a first amplitude to define a first symbol waveform of the plurality of symbol waveforms and using a sine wave of a second amplitude to define a second symbol waveform of the plurality of symbol waveforms, the first amplitude being different from the second amplitude; one or more digital-to-analog converters for generating an encoded analog waveform from the representation of the composite encoded waveform. A data communication system comprising:

17. a memory for storing first and second digital representations of the first and second symbolic waveforms, respectively; 17. The system of claim 16, wherein the time domain modulator is configured to read the first and second digital representations from the memory upon receipt of bits corresponding to the input digital data stored in the input buffer.

18. 17. The system of claim 16, wherein a first period of the first symbol waveform is equal to a second period of the second symbol waveform.

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