Adapter Device for Chip Packaging Test

Abstract

In the present disclosure, an adapter device for chip packaging testing is disclosed. The adapter device for chip packaging testing includes a connection plate with a plurality of packaging test units. Each packaging test unit includes a plate slot for receiving a microchip, a signal transmission sheet coupled to the plate slot, a signal connector coupled to the plate slot, and a chip substrate. In some embodiments, the adapter device for chip packaging testing further includes an adapter plate coupled to the connection plate through an inter-plate connection area included in the adapter plate. A method for chip packaging testing includes bonding a plurality of microchips to a chip substrate of the connection plate, coupling the connection plate to the adapter plate, inspecting the plurality of microchips, and identifying defective microchips using the identification code.

Description

[Technical field]

[0001] Technical Field The present disclosure relates generally to the technical field of testing integrated circuit packaging, and more specifically to an adapter device for chip packing testing. [Background technology]

[0002] background

[0002] Display technology is becoming increasingly important in current commercial electronic devices. These display panels are widely used in stationary large screens such as liquid crystal televisions (LCD TVs) and organic light emitting diode televisions (OLED TVs), as well as portable electronic devices such as laptops, smartphones, tablets, and wearable electronic devices.

[0003]

[0003] Light emitting diode (LED) chips generally include organic light emitting diode (OLED) chips, mini light emitting diode (submillimeter light emitting diode) chips, or micro LED (micrometer light emitting diode) chips, etc. LEDs are widely used in the field of lighting. As LED display screens gradually spread to the high-end market, the quality requirements of LED display screen devices are becoming higher.

[0004]

[0004] The quality of LED display chip packaging has a great impact on the quality of LED display screen device. When carrying out packaging test, there are currently some problems to be solved, such as how to improve the convenience of work in each process step of packaging, how to integrate the repetitive work in each process step and improve packaging efficiency, and how to quickly find unqualified packaging chip according to the feedback result in test process, so as to improve detection efficiency. Summary of the Invention [Problem to be solved by the invention]

[0005] overview

[0005] There is a need for improved display packaging designs that help ameliorate and address the problems and shortcomings of conventional display packaging systems such as those described above. In particular, there is a need for display panels that have improved stability and reliability with better images. [Means for solving the problem]

[0006]

[0006] To achieve the above objectives, in one aspect of some exemplary embodiments, the present disclosure provides an adapter device for chip packaging testing, including a connection plate with a plurality of packaging test units, each packaging test unit including: a plate slot for receiving a microchip, a signal transmission sheet coupled to the plate slot, a signal connector coupled to the plate slot, and a chip substrate.

[0007]

[0007] In some exemplary embodiments or any combination of the preceding exemplary embodiments, the adapter device for chip packaging testing further includes an adapter plate coupled to the connection plate via an inter-plate connection area included in the adapter plate.

[0008]

[0008] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the adapter plate further includes a corresponding connector for mating with the signal connector of the connection plate.

[0009] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the connection plate is a flexible printed circuit (FPC) plate.

[0010] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the connection plate has a horizontal dimension between 70 mm and 90 mm and a vertical dimension between 40 mm and 50 mm.

[0011] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the connection plate has a thickness of 0.2 mm to 0.6 mm.

[0012]

[0012] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the signal transmission sheet is an FPC board including a data transmission line.

[0013]

[0013] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the first end of the signal transmission sheet is integrally formed with the upper portion of the plate slot and clamped to the signal connector.

[0014]

[0014] In some exemplary embodiments of the adapter device for chip packaging test or any combination of the preceding exemplary embodiments, the second end of the signal transmission sheet is connected to an electrical connection end of the chip substrate.

[0015]

[0015] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the front side of the signal connector includes a flash memory chip packaged in a shielded enclosure.

[0016]

[0016] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, a surface of the shielded enclosure has a plurality of pinholes.

[0017]

[0017] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the surface of the signal connector has a convex connector.

[0018] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the surface of the chip substrate is made of an iron-nickel alloy.

[0019]

[0019] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the plate slot accommodates a micro LED chip and has a corresponding size depending on the micro LED chip.

[0020] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the diameter of the plate slot is less than 6 μm.

[0021]

[0021] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the connection plate includes an identification code on a surface of the connection plate.

[0022]

[0022] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the identification code is a two-dimensional code.

[0023]

[0023] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the corresponding connector is a concave connector.

[0024]

[0024] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the adapter plate includes a plurality of device connectors configured to attach to a vacuum suction table for packaging testing.

[0025]

[0025] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the connection plate includes a plurality of through holes and a cross mark.

[0026]

[0026] In some exemplary embodiments of the adapter device for chip packaging test or any combination of the preceding exemplary embodiments, the connection plate includes a plurality of positioning holes configured to connect to a machine table for packaging test.

[0027]

[0027] In some exemplary embodiments of the adapter device for chip packaging testing or any combination of the preceding exemplary embodiments, the adapter plate includes a plurality of positioning pin holes.

[0028]

[0028] In some exemplary embodiments of the adapter device for chip packaging test or any combination of the preceding exemplary embodiments, the micro LED display chip is integrated on the chip substrate by die bonding and wire bonding.

[0029]

[0029] In another aspect of some exemplary embodiments, the present disclosure provides a method of chip packaging testing, including providing a connection plate with an identification code and a plurality of packaging test units, bonding a plurality of microchips to a chip substrate of the connection plate, providing an adapter plate, coupling the connection plate to the adapter plate, inspecting the plurality of microchips, and identifying defective microchips using the identification code. In some embodiments, each packaging test unit includes a plate slot for receiving a microchip, a signal transmission sheet coupled to the plate slot, a signal connector coupled to the plate slot, and a chip substrate.

[0030]

[0030] In some exemplary embodiments of the method for chip packaging testing or any combination of the preceding exemplary embodiments, the microchip is a micro LED display chip.

[0031]

[0031] In some exemplary embodiments of the method for chip packaging testing or any combination of the preceding exemplary embodiments, inspecting the multiple microchips includes inspecting the light emitting state of a micro LED display chip.

[0032]

[0032] In some embodiments of the present disclosure, the systems and methods disclosed herein significantly improve the efficiency of chip packaging, in particular, the systems and methods improve the convenience of work at each processing step of packaging, consolidate repetitive work at each processing step, improve packaging efficiency, and further improve detection efficiency by quickly finding unqualified packaged chips according to feedback results in the testing process.

[0033]

[0033] It should be noted that the above various embodiments can be combined with any other embodiments described herein. The features and advantages described herein are not all-inclusive, and in particular many additional features and advantages will be apparent to those skilled in the art in view of the drawings, the specification, and the claims. Furthermore, it should be noted that the words used in this specification are primarily selected for readability and for explanatory purposes, and may not be selected to define or limit the inventive subject matter.

[0034] BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to make the present disclosure more fully understandable, a more specific description can be made by referring to the features of various embodiments, some of which are illustrated in the accompanying drawings. However, the accompanying drawings merely illustrate the relevant features of the present disclosure and are not to be considered as limiting, since the present description may admit of other useful features.

[0035]

[0035] For convenience, "up" is used to mean away from the substrate of the light-emitting structure and "down" means toward the substrate, and other directional terms such as top, bottom, above, below, under, and below are interpreted accordingly. [Brief description of the drawings]

[0036] [Figure 1]

[0036] FIG. 1 is a schematic diagram of an exemplary connection plate of a chip packaging test adapter device according to some embodiments of the present disclosure. [Diagram 2]

[0037] 1 is a schematic diagram of a rear view of an exemplary connection plate of a chip packaging test adapter device according to some embodiments of the present disclosure. [Diagram 3]

[0038] 1 is a schematic diagram of an example adapter plate of a chip packaging test adapter device according to some embodiments of the present disclosure. [Figure 4]

[0039] FIG. 1 is a schematic diagram of an exemplary adapter device for chip packaging testing according to some embodiments of the present disclosure. [Diagram 5]

[0040] 1 is a schematic diagram of a flow chart of an exemplary method of chip packaging testing according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0037]

[0041] The diagram includes identification of the following parts: 1 connection plate, 2 plate slot, 3 signal transmission sheet, 4 flash memory chip (and / or signal connector), 5 chip substrate, 6 adapter plate, 7 inter-plate connection area, 8 convex connector, 9 concave connector, 10 device connector, 11 through hole, 12 cross mark, 13 locating pin hole, 14 locating hole, 15 identification code, and 16 adapter device.

[0038]

[0042] According to common practice, the various features illustrated in the figures may not be drawn to scale. Thus, dimensions of the various features may be arbitrarily expanded or reduced for clarity. Moreover, some of the drawings may not depict all of the components of a given system, method, or device. Finally, like reference numerals may be used to denote like features throughout the specification and figures.

[0039] Detailed Description

[0043] Numerous details are described herein to provide a thorough understanding of the exemplary embodiments illustrated in the accompanying drawings. However, some embodiments may be practiced without many of the specific details, and the claims are limited only by the features and aspects specifically recited in the claims. Additionally, well-known processes, components, and materials have not been described in exhaustive detail so as not to unnecessarily obscure relevant aspects of the embodiments described herein.

[0040]

[0044] FIG. 1 is a schematic diagram of an example connection plate of a chip packaging test adapter device according to some embodiments of the present disclosure.

[0041]

[0045] In some embodiments, the systems disclosed herein, e.g., chip packaging test adapter devices, include at least a connection plate and an adapter plate. The connection plate is used to connect and support the micro LED packages. The adapter plate is used to connect the connection plate. The signal connection pads of the adapter plate are electrically connected to the signal connection pads of the connection plate, e.g., via a device connector on the adapter plate and a signal connector on the connection plate.

[0042]

[0046] In some embodiments, the micro LED package comprises a micro LED panel, a signal transmission sheet, a flash memory chip (and / or a signal connector), a convex connector, and a chip substrate. In some embodiments, the micro LED panel is disposed on an end of the signal transmission sheet opposite (or on) the chip substrate.

[0043]

[0047] In some embodiments, as shown in FIG. 1, the connection plate (1) is a FPC (flexible printed circuit) plate. The horizontal dimension of the connection plate (1) is 70mm-90mm, specifically, the size may be 70mm, 80mm, or 90mm, the vertical dimension is 40mm-50mm, specifically, the size may be 40mm, 44mm, 46mm, 48mm, or 50mm, and the thickness is 0.2mm-0.6mm, specifically, the size may be 0.2mm, 0.4mm, or 0.6mm. A plurality of plate slots (2) are formed in the connection plate (1). Generally, the plurality of plate slots (2) form a slot array. And in each plate slot (2), the signal transmission sheet (3) is usually an FPC board including a data transmission line, and the signal transmission sheet (3) has the same material as the connection plate (1). One end of the signal transmission sheet (3) is integrally formed with the upper / surface portion of the plate slot (2) and clamped to the signal connector (4). The front of the signal connector (4) is a flash memory chip packaged in a shielded enclosure. In some embodiments, the enclosure is made of cupronickel material. And multiple pinholes are formed on the surface of the shielded enclosure for hot airflow to enter during SMT (surface mount technology). The four corners of the shielded enclosure are used for heat dissipation of the flash memory chip.

[0044]

[0048] FIG. 2 is a schematic diagram of a rear view of an exemplary connecting plate of a chip packaging test adapter device according to some embodiments of the present disclosure.

[0045]

[0049] FIG. 3 is a schematic diagram of an example adapter plate of a chip packaging test adapter device according to some embodiments of the present disclosure.

[0046]

[0050] As shown in FIG. 2, the rear surface of the signal connector (4) has a convex connector (8) used for inter-plate connection with the adapter plate (6) as shown in FIG. 3. As shown in FIG. 1, the other end of the signal transmission sheet (3) is connected to the electrical connection end of the chip substrate (5). The surface of the chip substrate (5) is made of iron-nickel alloy. The size of the plate slot (2) is related to the chip size in the packaging test, and the chip in the packaging test is usually a micro LED chip, or an OLED chip, or both. When the chip in the packaging test is a micro LED chip, the diagonal dimensions of the micro LED chip are 0.13 inches, 0.22 inches, and 0.31 inches, respectively, the resolutions are 1280×720P, 1920×1080P, and 640×480P, respectively, and the pixel pitches are 5 μm, 2.5 μm, and 4 μm, respectively. The size of the plate slot (2) varies according to the above diagonal dimensions. In some embodiments, an identification code (15) is provided on one surface of the connection plate (1). The identification code (15) is used to quickly find unqualified chips according to the feedback result. The identification code (15) includes two-dimensional code, barcode, etc. Also, the connection plate (1) and the signal transmission sheet (3) may be PCB.

[0047]

[0051] As shown in FIG. 3, an adapter plate (6) of an adapter device is provided for chip packaging testing. The adapter plate (6) is a PCB (printed circuit board) plate. An opening is formed in the adapter plate (6) and matches the size of the connection plate (1). This opening area is the inter-plate connection area (7). This allows the connection plate (1) to be embedded in the adapter plate (6) through the plate connector. On both sides of the inter-plate connection area (7) are concave connectors (9) for plate connection. As shown in FIG. 2, for inter-plate connection, the concave connector (9) is used to connect with the convex connector (8) on the rear surface of the signal connector (4) to connect the connection plate (1) with the adapter plate (6). The connectors for BTB (board-to-board) connection are the convex connector (8) and the concave connector (9). In some embodiments, the connectors are not limited to the convex connector (8) and the concave connector (9), but may be other types of connector pairs to ensure the connection between the connection plate (1) and the adapter plate (6). For example, the connector (8) on the back side of the signal connector (4) may be a concave connector, and the connector (9) on the adapter plate (6) may be a convex connector. A device connector (10) is provided on the adapter plate (6), and in some cases, the device connector (10) is a through hole. The device connector (10) and the signal transmission sheet (3) in the plate slot (2) as shown in FIG. 1 attach the adapter device (16) as shown in FIG. 4 to the vacuum suction table of the packaging test device with the cutout area etched after the cutting process. In some embodiments, the connected connection plate (1) and the adapter plate (6) are held by a mechanical hand and accurately placed on the vacuum suction table for the metallurgical process. The multiple holes of the vacuum suction table are aligned with the LED package or the connected connection plate (1) and the adapter plate (6) for vacuum suction. In some embodiments, a laser is used to cut out areas along the predefined contours of several connection points on the connection plate (1).The cut-out area is the remaining area excluding the area formed by the connection points. The adapter plate (6) may be an FPC plate.

[0048]

[0052] In an optional example, as shown in Fig. 1, a plurality of through holes (11) and cross marks (12) are provided on the peripheral side of the plate slot array of the connection plate (1). The aperture of the through holes (11) is 1mm to 2mm, specifically, 1mm, 1.5mm, and 2mm. The cross marks (12) are located on the front and rear surfaces of the connection plate (1) as shown in Fig. 1 and Fig. 2, and they are used to align the plate slots (2) on the connection plate (1) in the packaging test.

[0049]

[0053] In an optional example, as shown in FIG. 1, the four corners of the connection plate (1) further include positioning holes (14). The positioning holes (14) are through holes. The diameters of the positioning holes (14) are 2 mm to 3 mm, specifically, 2 mm, 2.5 mm, and 3 mm. The connection plate (1) may be directly connected to a machine table of a packaging test device through the positioning holes (14) without using an adapter plate (6).

[0050]

[0054] In an optional example, as shown in FIG. 3, both sides of the adapter plate (6) further include positioning pin holes (13) for the packaging test device to perform rough alignment on the plate slot (2). In some embodiments, the positioning pin holes (13) are further located in the inter-plate connection area (7) of the adapter plate (6). In some embodiments, the rough alignment is to align the positioning pin holes (13) of the adapter plate (6) with the through holes (11) of the connection plate. In some examples, the positioning pin holes (13) are through holes. When the inter-plate connection is realized by pin connection through the positioning pin holes (13), the number of pins is usually 6 to 20. Usually, the number of pins is related to or corresponds to the number of data transmission lines of the signal transmission sheet (3) as shown in FIG. 1.

[0051]

[0055] FIG. 4 is a schematic diagram of an example adapter device for chip packaging testing according to some embodiments of the present disclosure.

[0052]

[0056] In some embodiments, the adapter device (16) includes a connection plate (1) as shown in FIG. 1 and FIG. 2 and an adapter plate (6) in FIG. 6. The connection plate (1) is coupled with the adapter plate (6). In one example, as shown in the schematic diagram of the adapter device (16) of the present disclosure in FIG. 4, after the micro LED display chip is bonded to the adapter device (16), the light emitting state of the micro LED display chip needs to be inspected. If the test finds that the micro LED display chip cannot adjust the color difference of the display by compensation, the test device quickly finds the tested chip by the identification code (15) on the connection plate (1) for further processing. In some embodiments, the panels / LED packages on the connection plate (1) have a certain order, and the ID and position information of each panel / LED package are related. And the relationship can be identified by the position information of the identification code (15). The adapter device (16) can arrange or integrate a certain number of micro LED display chips on the chip substrate (5) of the connection plate (1) to reduce the size of the repeated steps of putting the micro LED display chips one by one into a tester for illumination in the existing technology, which can quickly identify the target chip by the identification code (15) provided on the connection plate (1), thereby greatly improving the test efficiency.

[0053]

[0057] In one example, as shown in FIG. 1, after performing the supply detection on the connection plate (1), the packaging device first performs DB (die bonding) operation on the micro LED display chip die on the connection plate (1) pinned with 18 chip substrates (5), and then performs WB (wire bonding) operation on the micro LED display chip on the connection plate (1) after the DB operation. In some embodiments, DB is a manufacturing process used for packaging semiconductors. In the DB process, the die (or chip) is first picked up from the wafer or waffle pack, and then placed at a specific location on the substrate by attaching the die (or chip) to the substrate or package by epoxy or solder. In some embodiments, WB is a device manufacturing and packaging process that makes the interconnection between an integrated circuit (IC) or other semiconductor device and its packaging. In some examples, WB can be used to connect ICs to other electronic devices or to connect one printed circuit board (PCB) to another PCB. By integrating a certain number of chip substrates (5) onto the connection plate (1), the size of the repetitive steps is greatly reduced in the existing packaging technology, which performs one DB operation and one WB operation in the die bonding and wire bonding process, respectively. The method and system disclosed herein can quickly identify defective chips in the packaging process through the identification code (15) on the connection plate (1), thereby greatly improving the packaging efficiency.

[0054]

[0058] FIG. 5 is a schematic diagram of a flow chart of an exemplary method of chip packaging testing 500, according to some embodiments of the present disclosure.

[0055]

[0059] In some embodiments, a method of chip packaging testing includes providing a connection plate with an identification code and a plurality of packaging test units (502), bonding a plurality of microchips to a chip substrate of the connection plate (504), providing an adapter plate (506), coupling the connection plate to the adapter plate (508), testing the plurality of microchips (510), and identifying defective microchips using the identification code (512). In some embodiments, each packaging test unit includes a plate slot for receiving a microchip, a signal transmission sheet coupled to the plate slot, a signal connector coupled to the plate slot, and a chip substrate.

[0056]

[0060] In the packaging process, the convenience of work in each process step is improved, and the process of repetitive work in each process step is integrated, which significantly improves packaging efficiency. In the testing process, according to the feedback test results, unqualified / defective packaging chips can be quickly found, which greatly improves the detection efficiency.

[0057]

[0061] Those skilled in the art will appreciate that the chip packing test adapter device is not limited to the structures described above and may include more or less components than those shown, or some components may be combined, or different components may be utilized.

[0058]

[0062] It is understood by those skilled in the art that all or part of the steps for implementing the above-mentioned embodiments may be implemented by hardware, or may be implemented by a program instructing related hardware. The program may be stored in a flash memory, a conventional computer device, a central processing module, a coordinating module, etc.

[0059]

[0063] The above description is merely an embodiment of the present disclosure, and the present disclosure is not limited thereto. Any modifications, equivalent replacements, and improvements made without departing from the concept and principle of the present disclosure shall fall within the protection scope of the present disclosure.

[0060]

[0064] Further embodiments include various subsets of the above embodiments, including those embodiments as shown in FIGS. 1-5, combined or otherwise rearranged in various other embodiments.

[0061]

[0065] Although the detailed description includes many details, these should not be interpreted as limiting the scope of the present disclosure, but merely as illustrating different examples and aspects of the present disclosure. It is to be understood that the scope of the present disclosure includes other embodiments not described in detail above. For example, the above techniques can be applied to the integration of functional devices other than LEDs and OLEDs with control circuits other than pixel drivers. Examples of non-LED devices include vertical cavity surface emitting lasers (VCSELs), photodetectors, microelectromechanical systems (MEMS), silicon photonic devices, power electronic devices, and distributed feedback lasers (DFBs). Examples of other control circuits include current drivers, voltage drivers, transimpedance amplifiers, and logic circuits.

[0062]

[0066] The preceding description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the embodiments described herein and variations thereof. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the subject matter disclosed herein. Thus, the present disclosure is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the following claims and the principles and novel features disclosed herein.

[0063]

[0067] Features of the present disclosure may be implemented in, using, or with the aid of a computer program product, such as one or more storage media or one or more computer-readable storage media having instructions stored thereon, which can be used to program a processing system to perform any of the features presented herein. The storage media may include high-speed random access memory, such as, but not limited to, DRAM, SRAM, DDR RAM, or other random access solid-state memory devices, and may include non-volatile memory, such as one or more magnetic disk storage devices, optical disk storage devices, flash memory devices, or other non-volatile solid-state storage devices. The memory optionally includes one or more storage devices located remotely from the CPU. The memory or non-volatile memory devices within the memory include non-transitory computer-readable storage media.

[0064]

[0068] When stored on any one or more machine-readable media, features of the present disclosure may be embodied in software and / or firmware for controlling the hardware of a processing system and for enabling the processing system to interact with other mechanisms that utilize the results of the present disclosure. Such software or firmware may include, but is not limited to, application code, device drivers, operating systems, and execution environments / containers.

[0065]

[0069] In this specification, terms such as "first," "second," and the like may be used to describe various elements or steps, but it will be understood that these elements or steps are not limited by these terms. These terms are used only to distinguish one element or step from another element or step.

[0066]

[0070] The terms used herein are merely for the purpose of describing particular embodiments and are not intended to limit the scope of the claims. When used in the description of the embodiments and in the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms unless the context clearly indicates otherwise. Also, the term "and / or" as used herein will be understood to refer to and include any and all possible combinations of one or more of the associated listed items. Furthermore, as used herein, the terms "comprises" and / or "comprising" will be understood to specify the presence of stated features, integers, steps, operations, elements, and / or components, but not to exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0067]

[0071] As used herein, the term "if" may be interpreted to mean "when" a stated precondition is true, or "upon" a stated precondition is true, or "in response to determining" that a stated precondition is true, or "in accordance with a determination" that a stated precondition is true, or "in response to detecting" that a stated precondition is true, depending on the context. Similarly, the phrases "if [a stated precondition is determined to be true]," or "if [a stated precondition is true]," or "when [a stated precondition is true]" may be interpreted to mean "upon a determination" that a stated precondition is true, or "in response to determining" that a stated precondition is true, or "in accordance with a determination" that a stated precondition is true, or "upon detecting" that a stated precondition is true, or "in response to detecting" that a stated precondition is true, depending on the context.

[0068]

[0072] The foregoing description has been described with reference to specific embodiments for purposes of explanation. However, the above illustrative description is not intended to be exhaustive or to limit the scope of the claims to the precise form disclosed. Many modifications and variations are possible in light of the above teachings. The embodiments have been chosen and described in order to best explain the principles of operation and practical application and thereby enable others skilled in the art to best utilize the present disclosure and various embodiments.

Claims

1. A connection plate having a plurality of packaging test units, each packaging test unit comprising: a plate slot for receiving a microchip; a signal transmission sheet coupled to the plate slot; a signal connector coupled to the plate slot; A chip substrate; a connecting plate including: an adaptor plate coupled to the connection plate via an inter-plate connection region included in the adaptor plate; Adapter device for chip packaging test, comprising:

2. 2. The adapter device for chip packaging testing of claim 1, wherein said adapter plate further includes a corresponding connector for mating with said signal connector of said connection plate.

3. 2. The adapter device for chip packaging testing as claimed in claim 1, wherein the connection plate is a flexible printed circuit (FPC) plate.

4. 2. The chip packaging testing adapter device of claim 1, wherein the connecting plate has a horizontal dimension of 70 mm to 90 mm and a vertical dimension of 40 mm to 50 mm.

5. 2. The adapter device for chip packaging testing as claimed in claim 1, wherein the connecting plate has a thickness of 0.2 mm to 0.6 mm.

6. 2. The adapter device for chip packaging testing as claimed in claim 1, wherein the signal transmission sheet is an FPC board including a data transmission line.

7. 2. The adapter device for chip packaging testing as claimed in claim 1, wherein a first end of the signal transmission sheet is integrally formed with an upper portion of the plate slot and is clamped to the signal connector.

8. 2. The adapter device for chip packaging testing as claimed in claim 1, wherein the second end of the signal transmission sheet is connected to an electrical connection end of the chip substrate.

9. 10. The chip packaging test adapter device of claim 1, wherein the signal connector front face includes a flash memory chip packaged in a shielded enclosure.

10. 10. The chip packaging testing adapter device of claim 9, wherein a surface of the shielded enclosure has a plurality of pinholes.

11. 2. The adapter device for chip packaging testing as claimed in claim 1, wherein the signal connector surface has a convex connector.

12. 2. The chip packaging testing adapter device of claim 1, wherein the surface of the chip substrate is made of an iron-nickel alloy.

13. 2. The adapter device for chip packaging testing of claim 1, wherein the plate slot accommodates a micro LED chip and has a corresponding size according to the micro LED chip.

14. 2. The adapter device for chip packaging testing of claim 1, wherein the plate slot has a diameter of less than 6 μm.

15. 10. The chip packaging testing adapter device of claim 1, wherein the connecting plate includes an identification code on a surface of the connecting plate.

16. 16. The adapter device for chip packaging testing as claimed in claim 15, wherein the identification code is a two-dimensional code.

17. 3. The adapter device for chip packaging testing of claim 2, wherein said mating connector is a female connector.

18. 10. The adapter device for chip packaging testing of claim 1, wherein the adapter plate includes a plurality of device connectors configured to attach to a vacuum suction table for packaging testing.

19. 2. The adapter device for chip packaging testing as recited in claim 1, wherein the connection plate includes a plurality of through holes and a cross mark.

20. The adapter device for chip packaging testing as claimed in claim 1 , wherein the connection plate includes a plurality of locating holes configured to connect to a machine table for packaging testing.

21. The adapter device for chip packaging testing as claimed in claim 1 , wherein the adapter plate includes a plurality of positioning pin holes.

22. 2. The adapter device for chip packaging testing as claimed in claim 1, wherein a micro LED display chip is integrated on the chip substrate by die bonding and wire bonding.

23. Providing a connection plate having an identification code and a plurality of packaging test units, each packaging test unit comprising: a plate slot for receiving a microchip; a signal transmission sheet coupled to the plate slot; a signal connector coupled to the plate slot; A chip substrate; and bonding a plurality of the microchips to the chip substrate of the connection plate; Providing an adapter plate; coupling the connecting plate to the adapter plate; Inspecting the plurality of microchips; identifying defective microchips using said identification codes; A method for chip packaging testing, comprising:

24. 24. The method of chip packaging testing of claim 23, wherein the microchip is a micro LED display chip.

25. 25. The method of chip packaging testing of claim 24, wherein inspecting the plurality of microchips includes inspecting a light emitting state of the micro LED display chip.

26. The method of chip packaging testing according to claim 23, wherein the connection plate is as claimed in any one of claims 1 to 22.

27. The method of chip packaging testing according to claim 23, wherein the adapter plate is as defined in any one of claims 1 to 22.

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