Method for realizing reduction of standby power consumption of AC / DC power supply

Abstract

A standby method for a switching power supply, a switching power supply, a primary side and a secondary side control circuit, which relates to the technical field of secondary side feedback control technology. The method is applied to a switching power supply provided with an opto-coupling circuit. When a mode control signal indicating that the power supply demand of a load device is higher than a preset value is detected, the switching power supply enters the first mode, and the output of the switching power supply is controlled by the opto-coupling circuit. When a mode control signal indicating that the power supply demand of the load device is less than or equal to the preset value is detected, the switching power supply enters the second mode, and the bias current of the opto-coupling circuit is turned off, and the output of the switching power supply is controlled by a drive pulse signal, so as to reduce the bias currents on the primary side and the secondary side of the switching power supply and reduce the standby power consumption of the switching power supply. At this time, since the bias current of the opto-coupling circuit is turned off, the bias currents on both the primary side and the secondary side become 0, so the bias current decreases and the static loss is reduced, and the standby power consumption becomes even lower.

Description

Technical Field

[0001] The present invention relates to the technical field of switching power supplies, in particular to a standby method of a switching power supply, a switching power supply, a primary side and a secondary side control circuit.

Background Art

[0002] FIG. 1 is a structural diagram of a conventional switching power supply. As shown in FIG. 1, specifically, it is an Alternating Current / Direct Current Secondary Side Regulation (AC / DC SSR). A conventional AC / DC SSR generally uses a current signal flowing through an optical coupler (OC) through a voltage control loop (CV) or a current control loop (CC) to keep the switching power supply in a stable state under a constant voltage and constant current control mode. In the application of a switching power supply, generally, it is necessary to connect a load and perform corresponding operation control based on the load. When the switching power supply is in a standby state, usually, there are situations where the switching power supply is connected to the load and where the switching power supply is not connected to the load. When a conventional switching power supply is in a standby situation, regardless of whether the load is connected to the switching power supply or not, the burst mode (BM) of the switching power supply is used to reduce standby power consumption. At this time, the bias current flowing through the optical coupler on both the primary side and the secondary side of the switching power supply reaches the maximum value, so the standby power consumption of the switching power supply at this time becomes very large, and the standby power consumption cannot be further reduced by the large bias current.

[0003] In view of the above problems, how to avoid the influence of the bias current and further reduce the standby power consumption of the switching power supply is an issue that those skilled in the art should strive to solve.

Summary of the Invention

[0004] An object of the present invention is to provide a standby method for a switching power supply, a switching power supply, a primary side and a secondary side control circuit, which are used to avoid the influence of a bias current and further reduce the standby power consumption of the switching power supply.

[0005] In order to solve the above technical problems, the present invention provides a standby method for a switching power supply applied to a switching power supply in which an opto-coupling circuit is installed. When a mode control signal indicating that the power supply demand of the load device is higher than a preset value is detected, the switching power supply enters the first mode, and the output of the switching power supply is controlled by the opto-coupling circuit. When a mode control signal indicating that the power supply demand of the load device is equal to or lower than the preset value is detected, the switching power supply enters the second mode, and the bias current of the opto-coupling circuit is turned off, and the output of the switching power supply is controlled by a drive pulse signal, thereby reducing the bias currents on the primary side and the secondary side of the switching power supply and reducing the standby power consumption of the switching power supply.

[0006] Moreover, entering the second mode includes: generating a notification signal indicating that the switching power supply enters the second mode based on the bias current of the opto-coupling circuit; controlling the secondary side control chip based on the notification signal maintaining a first preset time length, and entering the second mode.

[0007] Moreover, entering the second mode includes: when the primary side control chip collects that an inversion occurs in the level signal of the voltage signal output by the opto-coupling circuit and the holding time length of the inverted level signal reaches a time threshold, controlling the primary side control chip to enter the second mode. Among them, the time threshold is larger than the maximum value of the duration of the level signal in the first mode, and the duration of the mode control signal indicating that the power supply demand of the load device controlled by the secondary side control chip is equal to or lower than the preset value is larger than the time threshold.

[0008] Also, turning off the bias current of the optical coupling circuit and controlling the output of the switching power supply by a drive pulse signal when the primary-side control chip collects an output voltage shortage signal indicating that the output voltage is in a voltage shortage state, the primary-side control chip outputs a drive pulse signal, and adjusting the output of the switching power supply based on the drive pulse signal to put the switching power supply into the second mode.

[0009] Also, when the primary-side control chip collects an output voltage shortage signal indicating that the output voltage is in a voltage shortage state, it determines whether the output voltage in the secondary-side control chip is less than a first preset output voltage, and if it is less, transmits the output voltage shortage signal to the primary-side control chip, and if it is not less, does not output the output voltage shortage signal.

[0010] Also, further, when the primary-side control chip is within a preset resonance time, it also includes blocking the detection of the primary-side control chip.

[0011] Also, after controlling the output of the switching power supply by a drive pulse signal, further, when the secondary-side control chip collects a mode control signal indicating that the power supply demand of the load device is higher than a preset value, it outputs, through a transformer, a wake-up signal indicating exiting the second mode at a preset frequency, and controls the secondary-side control chip to stop outputting the wake-up signal, and controls the secondary-side control chip based on the wake-up signal to exit the second mode.

[0012] Also, after outputting, through a transformer, a wake-up signal indicating exiting the second mode at a preset frequency, further, when it is determined that the preset frequency of the wake-up signal is less than a frequency threshold, it includes controlling the primary-side control chip to exit the second mode.

[0013] Also, turning off the bias current of the optical coupling circuit and controlling the output of the switching power supply by a drive pulse signal When adjusting so that the input voltage of the auxiliary winding on the primary side falls within a preset range, outputting a drive pulse signal in the control chip on the primary side Including switching the switching power supply to the second mode by adjusting the output of the switching power supply based on the relationship between the drive pulse signal, the input voltage, and the output voltage.

[0014] Also, adjusting the output of the switching power supply based on the relationship between the drive pulse signal, the input voltage, and the output voltage Adjusting the output voltage based on the turns ratio relationship between the input voltage and the output voltage. Among them, the turns ratio relationship is the ratio of the number of turns of the secondary winding of the transformer on the secondary side to the number of turns of the auxiliary winding on the primary side.

[0015] Also, after controlling the output of the switching power supply by the drive pulse signal, further When an inversion occurs in the level signal of the voltage signal output by the optical coupling circuit collected by the primary side control chip, and the holding time length of the inverted level signal reaches the second preset time length, controlling the secondary side control chip to stop outputting the wake-up signal, and controlling the primary side control chip based on the wake-up signal to exit the second mode.

[0016] Also, further Including the secondary side control chip exiting the second mode based on the control of a notification signal maintaining the third preset time length.

[0017] To solve the above technical problems, the present invention further provides a switching power supply in which an optical coupling circuit is coupled between the primary side and the secondary side. The switching power supply further includes A mode signal generation circuit used to detect the power supply demand of the load device of the switching power supply, and generating a second mode control signal when the power supply demand of the load device is below a preset value A photocoupling control circuit that controls to turn off the bias current of the photocoupling circuit based on a second-mode control signal, A switching power supply output control circuit that generates a first-mode control signal when the power supply demand of the load device is higher than a preset value, controls the switching power supply based on the first-mode control signal to enter the first mode, and controls the output of the switching power supply by the photocoupling circuit. The switching power supply output control circuit controls the switching power supply to enter the second mode based on the second-mode control signal, and controls the output of the switching power supply by a drive pulse signal, thereby reducing the bias currents on the primary side and the secondary side of the switching power supply and reducing the standby power consumption of the switching power supply.

[0018] When the switching power supply enters the first mode, the stability of the output of the switching power supply is controlled by adjusting the bias current of the photocoupling circuit.

[0019] The switching power supply output control circuit further includes After receiving the second-mode control signal, a notification signal is generated and used to notify the primary-side control chip of entering or exiting the second mode, so that the output of the switching power supply is controlled by a drive pulse signal in the switching power supply, reducing the bias currents on the primary side and the secondary side of the switching power supply and reducing the standby power consumption of the switching power supply. A notification signal control circuit; A primary-side mode control circuit that receives the notification signal and controls the primary-side control chip based on the notification signal to change the operating mode including the first mode or the second mode. Among them, when the power supply demand of the load device is higher than the preset value, the switching power supply enters the first mode, and the output of the switching power supply is controlled by the photocoupling circuit.

[0020] The notification signal control circuit further includes Based on the bias current of the optical coupling circuit, a notification signal indicating that the switching power supply enters the second mode is generated, and a first second-mode entry control circuit for controlling the secondary control chip to enter the second mode based on the notification signal maintaining a first preset time length is included.

[0021] Moreover, the notification signal control circuit further includes a second second-mode entry control circuit for controlling the primary control chip to enter the second mode when the primary control chip collects that an inversion occurs in the level signal of the voltage signal output by the optical coupling circuit and the holding time length of the inverted level signal reaches a time threshold, wherein the time threshold is greater than the maximum value of the duration of the level signal in the first mode, and the duration of the mode control signal indicating that the power supply demand of the load device controlled by the secondary control chip is below a preset value is greater than the time threshold.

[0022] Moreover, the primary side mode control circuit includes a first second-mode maintenance control circuit for outputting a drive pulse signal in the primary control chip and adjusting the output of the switching power supply based on the drive pulse signal when the primary control chip collects an output voltage shortage signal indicating that the output voltage is in a voltage shortage state, so as to make the switching power supply enter the second mode.

[0023] Moreover, the primary side mode control circuit further includes a first judgment circuit for judging whether the output voltage in the secondary control chip is smaller than a first preset output voltage, and when the output voltage is smaller than the first preset output voltage, transmitting the output voltage shortage signal to the primary control chip.

[0024] Moreover, further includes a first shielding circuit for blocking the detection of the primary control chip when the primary control chip is within a preset resonance time.

[0025] Moreover, the notification signal control circuit further When the secondary control chip collects a mode control signal indicating that the power supply demand of the load device is higher than a preset value, it outputs, through a transformer, a wake-up signal indicating exiting the second mode at a preset frequency, and controls the secondary control chip to stop outputting the wake-up signal, and includes a first secondary second-mode exit control circuit for controlling the secondary control chip to exit the second mode based on the wake-up signal.

[0026] Moreover, the notification signal control circuit further When it is determined that the preset frequency of the wake-up signal is smaller than a frequency threshold value, it includes a first primary second-mode exit control circuit for controlling the primary control chip to exit the second mode.

[0027] Moreover, the primary side mode control circuit further When adjusting so that the input voltage of the primary side auxiliary winding is within a preset range, it outputs a drive pulse signal in the primary control chip, and adjusts the output of the switching power supply by adjusting the output of the switching power supply based on the relationship between the drive pulse signal, the input voltage, and the output voltage, and includes a second second-mode maintenance control circuit for setting the switching power supply to the second mode.

[0028] Moreover, the primary side mode control circuit further includes a first adjustment circuit for adjusting the output voltage based on the turns ratio relationship between the input voltage and the output voltage, where the turns ratio relationship is the ratio of the number of turns of the secondary winding of the secondary side transformer to the number of turns of the primary side auxiliary winding.

[0029] Moreover, the notification signal control circuit further When an inversion occurs in the level signal of the voltage signal output by the optocoupler circuit collected by the primary control chip, and the holding time length of the inverted level signal reaches a second preset time length, it controls the secondary control chip to stop outputting the wake-up signal, and includes a second primary second-mode exit control circuit for controlling the primary side and secondary side control chips to exit the second mode based on the wake-up signal.

[0030] Furthermore, the notification signal control circuit further includes a second secondary-side second mode exit control circuit for the secondary-side control chip to exit the second mode based on the control of the notification signal maintaining the third preset time length.

[0031] Furthermore, the mode signal generation circuit includes at least a mode control signal interface and a second mode control unit. The mode control signal interface is used to transmit a mode control signal indicating that the power supply demand of the load device is higher than a preset value to the second mode control unit correspondingly.

[0032] Furthermore, the opto-coupling control circuit includes at least a secondary-side first switch tube and a secondary-side second switch tube. The first end of the secondary-side first switch tube is connected to the opto-coupling circuit, the second end of the secondary-side first switch tube is grounded, the control end of the secondary-side first switch tube is connected to the first end of the secondary-side second switch tube, the second end of the secondary-side second switch tube is grounded, and the control end of the secondary-side second switch tube is connected to the second mode unit.

[0033] To solve the above technical problems, the present invention further provides a secondary-side control circuit of a switching power supply. An opto-coupling circuit is coupled between the primary side and the secondary side of the switching power supply. The secondary-side control circuit includes: a mode signal generation circuit used to detect the power supply demand of the load device of the switching power supply and generate a second mode control signal when the power supply demand of the load device is below a preset value; an opto-coupling control circuit that controls to turn off the bias current of the opto-coupling circuit based on the second mode control signal; a notification signal control circuit that generates a notification signal after receiving the second mode control signal and uses it to notify the primary-side control chip to enter or exit the second mode, so as to control the output of the switching power supply by a driving pulse signal, reduce the bias currents of the primary side and the secondary side of the switching power supply, and reduce the standby power consumption of the switching power supply.

[0034] Further, the notification signal control circuit generates a notification signal indicating that the switching power supply enters the second mode based on the bias current of the opto-coupling circuit, and includes a third second-mode entry control circuit for controlling the secondary-side control chip to enter the second mode based on the notification signal maintaining the first preset time length.

[0035] Further, the notification signal control circuit further includes a fourth second-mode entry control circuit for controlling the primary-side control chip to enter the second mode when it collects that the level signal of the voltage signal output by the opto-coupling circuit has an inversion and the holding time length of the inverted level signal reaches the time threshold, wherein the time threshold is greater than the maximum value of the duration of the level signal in the first mode, and the duration of the mode control signal indicating that the power supply demand of the load device controlled by the secondary-side control chip is below the preset value is greater than the time threshold.

[0036] Further, the notification signal control circuit further includes a third secondary-side second-mode exit control circuit for outputting, through the transformer, a wake-up signal indicating exiting the second mode at a preset frequency when the secondary-side control chip collects a mode control signal indicating that the power supply demand of the load device is higher than the preset value, and for controlling the secondary-side control chip to stop outputting the wake-up signal and controlling the secondary-side control chip to exit the second mode based on the wake-up signal.

[0037] Further, the notification signal control circuit further includes a third primary-side second-mode exit control circuit for controlling the primary-side control chip to exit the second mode when it is determined that the preset frequency of the wake-up signal is smaller than the frequency threshold.

[0038] Further, the notification signal control circuit further When an inversion occurs in the level signal of the voltage signal output by the opto-coupling circuit collected by the primary-side control chip, and the holding time length of the inverted level signal reaches the second preset time length, the secondary-side control chip is controlled to stop outputting the wake-up signal, and a fourth primary-side second-mode exit control circuit for controlling the primary-side and secondary-side control chips based on the wake-up signal to exit the second mode is included.

[0039] Also, the notification signal control circuit further includes a fourth secondary-side second-mode exit control circuit for the secondary-side control chip to exit the second mode based on the control of the notification signal maintaining the third preset time length.

[0040] To solve the above technical problems, the present invention further provides a primary-side control circuit of a switching power supply. An opto-coupling circuit is coupled between the primary side and the secondary side of the switching power supply. The primary-side control circuit includes a drive pulse signal generation circuit coupled to the power switch of the switching power supply and generating a drive pulse signal to control the conduction and cutoff of the power switch, and a primary-side mode control circuit that receives a notification signal, controls the primary-side control chip based on the notification signal, and changes the operating mode.

[0041] Also, the primary-side mode control circuit includes a third second-mode maintenance control circuit for setting the switching power supply to the second mode by outputting a drive pulse signal in the primary-side control chip and adjusting the output voltage of the switching power supply based on the drive pulse signal when the primary-side control chip collects an output voltage shortage signal indicating that the output voltage is in a voltage shortage state.

[0042] Also, the primary-side mode control circuit further includes a second determination circuit for determining whether the output voltage in the secondary-side control chip is smaller than the first preset output voltage, and when the output voltage is smaller than the first preset output voltage, transmitting the output voltage shortage signal to the primary-side control chip.

[0043] Also, further, It includes a second shielding circuit for blocking the detection of the primary control chip when the primary control chip is within the preset resonance time.

[0044] Also, the primary side mode control circuit further When the input voltage of the primary side auxiliary winding is adjusted to be within the preset range, a drive pulse signal is output in the primary control chip, and the output of the switching power supply is adjusted based on the relationship between the drive pulse signal, the input voltage, and the output voltage, so as to include a fourth second mode maintenance control circuit for setting the switching power supply to the second mode.

[0045] Also, the primary side mode control circuit further It includes a second adjustment circuit for adjusting the output voltage based on the turns ratio relationship between the input voltage and the output voltage, where the turns ratio relationship is the ratio of the number of turns of the secondary winding of the transformer on the secondary side to the number of turns of the auxiliary winding on the primary side.

[0046] The standby method of the switching power supply provided by the present invention is applied to a switching power supply with an optocoupler circuit. When a mode control signal indicating that the power supply demand of the load device is higher than the preset value is detected, the switching power supply enters the first mode, and the output of the switching power supply is controlled by the optocoupler circuit. When a mode control signal indicating that the power supply demand of the load device is less than or equal to the preset value is detected, the switching power supply enters the second mode, and the bias current of the optocoupler circuit is turned off, and the output of the switching power supply is controlled by the drive pulse signal, thereby reducing the bias currents on the primary side and the secondary side of the switching power supply and reducing the standby power consumption of the switching power supply. At this time, since the bias current of the optocoupler circuit is turned off, the bias currents on both the primary side and the secondary side become 0, so the bias current decreases and the static loss is reduced, and the standby power consumption becomes even lower.

[0047] The present invention further provides a standby method for a switching power supply, a switching power supply, a primary-side and a secondary-side control circuit, and the effects are as described above.

[0048] To more clearly explain the embodiments of the present invention, the drawings that need to be used in the embodiments are briefly introduced below. However, the drawings in the following description are only some embodiments of the present invention. It is obvious that those skilled in the art can obtain other drawings based on these drawings on the premise of not performing creative labor.

Brief Description of the Drawings

[0049]

Figure 1

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Modes for Carrying Out the Invention

[0050] In the following, in connection with the drawings in the embodiments of the present invention, the technical means in the embodiments of the present invention are clearly and completely described. However, it is obvious that the described embodiments are only a part of the embodiments of the present invention and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained on the premise that those skilled in the art do not perform creative labor belong to the protection scope of the present invention.

[0051] The core of the present invention is to provide a standby method for a switching power supply, a switching power supply, a primary side and a secondary side control circuit, which can avoid the influence of the bias current and further reduce the standby power consumption of the switching power supply.

[0052] In order to enable those skilled in the art to better understand the method of the present invention, the present invention will be described in more detail below in connection with the drawings and specific embodiments.

[0053] Figure 1 is a structural diagram of a conventional switching power supply. As shown in Figure 1, in the switching power supply, the primary side and the secondary side of the transformer T1 are defined. Among them, the primary side of the switching power supply generally includes an AC power supply AC, a rectifier bridge DB, an input capacitor Cbulk, a start-up resistor R3, the primary coil of the transformer T1 (which can also be called the primary winding), an NMOS transistor Qp (which can also be called a power switch and is coupled to the primary winding of the transformer T1), a current sampling resistor R4, a control chip Controller, a rectifier diode D1, and the triode part of the OC device. Among them, it should be noted that as a more preferred embodiment, a voltage dividing resistor R1, a voltage dividing resistor R2, a constant voltage capacitor Cvcc, and an auxiliary winding Rf are further installed. Among them, the control chip is further provided with six pins, which are represented by DEM, HV, VCC, COMP, GATE, and CS respectively. The secondary side of the switching power supply generally includes a voltage dividing resistor R5, a voltage dividing resistor R6, a constant voltage capacitor Cout, a resistor R7 connected to the output terminal, the diode part of the OC device, a compensation capacitor Ccomp, a triode Q1, an amplifier U1, a Bais module, a rectifier diode D2, and the secondary coil of the transformer T1 (which is also called the secondary winding). Among them, the triode Q1, the amplifier U1, and the Bais module constitute the OC controller OCRDV on the secondary side. Generally, OCRDV is called the secondary side controller (secondary side control chip), and Controller is called the primary side controller (primary side control chip). Figure 2 is a structural diagram of the OC device. As shown in Figure 2, the left side of the OC device is the triode part, and the right side is the diode part. At the same time, the triode part is usually arranged on the primary side, and the diode part is usually arranged on the secondary side. When applied in actual production, the OC device is an integrated device, but it can be understood that when creating its schematic diagram in the circuit area, it is represented separately for ease of description. It should be further noted that the triode in the OC device is generally an NPN transistor. At the same time, the bias current flowing through the OC device on the primary side is represented by IOC_C, and the bias current flowing through the OC device on the secondary side is represented by IOC_LED.Since the OC device is an optical coupling device, the diode on the secondary side is an LED lamp, and when current flows, the diode emits light. The description of the OC device mentioned above is only one of many embodiments, and its specific implementation form is determined based on the implementation scenario, so it can be understood that the present invention is not limited in this regard.

[0054] Regarding the output terminal of the switching power supply in the standby state, there are usually two types of situations for the load. One is the situation where the load is connected to the switching power supply (at this time, the power supply demand of the load device is higher than the preset value). For the sake of easy understanding, this can be understood as the situation where the mobile phone is fully charged but not disconnected from the switching power supply when charging the mobile phone with the switching power supply. When the mobile phone and the switching power supply are connected, it can be further understood that there are light load (generally represented as Light Load) and heavy load (generally represented as Heavy Load) situations. Specifically, the load situation can be judged by setting the preset value related to the load. Of course, its implementation form can also be determined based on the implementation scenario. The other is the situation where the load and the switching power supply are disconnected (at this time, the power supply demand of the load device is below the preset value). For easy understanding, this can be understood as the situation where the mobile phone and the switching power supply are disconnected when the mobile phone is fully charged when charging the mobile phone with the switching power supply. In this case, the example of whether the mobile phone is connected to the switching power supply or not is used, but in the actual production process, it can be applied to other scenarios as well. Specifically, it can be determined based on the embodiments, so the present invention does not limit this. In the no-load situation, the preset value is 0. Similarly, when the preset value is 5 (or other values determined based on the specific implementation scenario), if the load is between 0 and 5, it is a light load, and if the load is 5 or more, it is a heavy load.

[0055] For a conventional switching power supply, the secondary bias current of the OC device is used for feedback to the primary side through a CV or CC control loop. For this switching power supply, as the load at the secondary output terminal decreases, the secondary bias current IOC_LED increases. In the steady state, IOC_C = CTR × IOC_LED, where CTR is the current transmission ratio of OC. At this time, no matter how the load situation changes, the switching power supply always uses the first mode (burst mode) to put the switching power supply into the standby state. At this time, both IOC_C and IOC_LED are at their maximum values, so the standby loss cannot be further reduced. It should be further explained that the burst mode can be further divided into a shallower burst mode and a deeper burst mode in the actual application process.

[0056] When using the burst mode to perform power supply standby, specifically, As the load decreases, the secondary output voltage (Vout) rises, the secondary bias current IOC_LED increases, the primary bias current IOC_C increases at the same ratio, the voltage received by the COMP pin drops, and when the COMP voltage falls below BML (the low threshold of the burst mode reference voltage), the primary side enters the burst mode, GATE does not output a drive pulse. After the energy transmission stops, the secondary output voltage (Vout) begins to drop. As the secondary output voltage (Vout) decreases, the secondary bias current IOC_LED decreases, the primary bias current IOC_C decreases at the same ratio, the primary side COMP voltage rises, and when the COMP voltage exceeds BMH (the high threshold of the burst mode reference voltage), the primary side control chip exits the burst mode, GATE outputs a periodic drive pulse signal, the energy recovers and is transmitted from the primary side to the secondary side, and the output voltage (Vout) of the secondary side begins to rise.

[0057] FIG. 3 is a waveform diagram of a conventional switching power supply in burst mode. As shown in FIG. 3, as the load at the secondary output terminal decreases, the voltage at the COMP pin of the primary control chip decreases. When the COMP voltage falls below BML, the system enters the light burst mode, and the ratio of its pulse output time increases while the ratio of the pulse-free time decreases. In the situation where the load and the power supply are cut off, the system enters the deep burst mode, the ratio of the pulse output time decreases, and the ratio of the pulse-free time increases. At this time, the corresponding maximum bias currents appear on both the primary side and the secondary side of the OC device. When COMP drops from a situation higher than BMH to between BML and BMH, GATE outputs, some modules recover and ICCP increases (ICCP at this time is 2 mA). When COMP rises from a situation lower than BML to between BML and BMH, GATE stops outputting, some modules are shut down and ICCP decreases (ICCP at this time is 300 μA). When COMP is between BML and BMH, whether GATE outputs or not is determined by the previous state of COMP.

[0058] When it is necessary to provide a bias current IOC_C of 100 μA level for OC on the primary side using burst mode, ICC generally does not fall below 300 μA. During normal operation, the DEM pin of the control chip detects the resonance waveform (the resonance waveform is generated by the capacitance between the primary coil and the Qp drain), and when Qp is driven thereby, the output voltage turns on and / or is detected at the bottom part of the resonance waveform. When entering burst mode, since GATE does not output drive pulses, at this time, any signal detected by the DEM pin is not considered, and the detection function of the DEM pin may be turned off to reduce losses.

[0059] FIG. 4 is a flowchart of a standby method for a switching power supply provided by an embodiment of the present invention. As shown in FIG. 4, the method is applied to a switching power supply provided with an optocoupler element. S40: When a mode control signal indicating that the power supply demand of the load device is higher than a preset value is detected, the switching power supply enters the first mode, and the output of the switching power supply is controlled by an opto-coupling circuit, S41: When a mode control signal indicating that the power supply demand of the load device is less than or equal to the preset value is detected, the switching power supply enters the second mode, and the bias current of the opto-coupling circuit is turned off, and the output of the switching power supply is controlled by a drive pulse signal, At this time, it is possible to reduce the bias currents on the primary side and the secondary side of the switching power supply and reduce the standby power consumption of the switching power supply.

[0060] It should be explained first that the first mode is the burst mode, the second mode is the sleep mode, and at the same time, the mode control signals representing the relationship between the power supply demand of the load device and the preset value are C1 and C2, and the mode control signal for activating the sleep mode is any combination of C1 and C2. For example, if the mode control signal indicating that the power supply demand of the load device is higher than the preset value is set to be represented by both the C1 and C2 signals being high-level signals, or both being low-level signals, or four sets of 2-bit binary data (00, 01, 10, 11), if the data after combining C1 and C2 is 00 or 01, it represents a mode control signal that the power supply demand of the load device is higher than the preset value. Of course, if the data after combining C1 and C2 is 10 or 11, the specific embodiment of the mode control signal indicating that the power supply demand of the load device is higher than the preset value can be determined based on the specific implementation scenario, so it can be understood that it is not limited in this embodiment.

[0061] From this, in this embodiment, since the bias current of the opto-coupling circuit is off, the bias currents on both the primary side and the secondary side become 0, so it can be seen that while reducing the bias current, the static loss is reduced and the standby power consumption is further reduced.

[0062] Among them, based on the standby method of the switching power supply mentioned above, the embodiment in which the secondary side enters the second mode is as follows: Generate a notification signal indicating that the switching power supply enters the second mode based on the bias current of the opto-coupling circuit, Control the secondary side control chip based on the notification signal maintaining the first preset time length, so as to enter the second mode.

[0063] Among them, the notification signal generated based on the bias current of the opto-coupling circuit and indicating that the switching power supply enters the second mode is denoted as the Iting signal. It should be noted that the Iting signal is a part of the bias current of the opto-coupling circuit, and the first preset time length maintained by the notification signal is denoted as T1. As a preferred embodiment, T1 = 240 ms.

[0064] The embodiment in which the primary side enters the second mode is as follows: When the primary side control chip collects that an inversion occurs in the level signal of the voltage signal output by the opto-coupling circuit and the holding time length of the inverted level signal reaches the time threshold, control the primary side control chip to enter the second mode. Among them, the time threshold is greater than the maximum value of the duration of the level signal in the first mode, and the duration of the mode control signal indicating that the power supply demand of the load device controlled by the secondary side control chip is below the preset value is greater than the time threshold.

[0065] In order to maintain the switching power supply in the second mode, the present invention provides two types of embodiments in total, specifically as follows.

[0066] Among them, the first embodiment for maintaining the switching power supply in the second mode is as follows: When the primary side control chip collects an output voltage shortage signal indicating that the output voltage is in a voltage shortage state, output a drive pulse signal in the primary side control chip. By adjusting the output of the switching power supply based on the drive pulse signal, the switching power supply is set to the second mode.

[0067] Furthermore, the primary - side control chip collecting an output - voltage - insufficient signal indicating that the output voltage is in a voltage - insufficient state determines whether the output voltage in the secondary - side control chip is less than the first preset output voltage, and if it is less, transmits the output - voltage - insufficient signal to the primary - side control chip, and if it is not less, does not output the output - voltage - insufficient signal.

[0068] In this embodiment, the first preset output voltage is set to 4V, the output voltage in the secondary - side control chip is Vout, and by detecting inside the secondary - side control chip, the relationship between Vout and 4V is compared in the comparator U2 to determine whether there is an output - voltage - insufficient signal. When Vout is greater than 4V, the output - voltage - insufficient signal is not issued, and there is no drive pulse signal at the GATE pin. When Vout is less than 4V, the output - voltage - insufficient signal is transmitted, and there is a drive pulse signal at the GATE pin. When the drive pulse signal is output, the output of the switching power supply is controlled by the power switch Qp and the transformer T1. In this embodiment, the drive pulse signal is denoted as Idrive.

[0069] Also, when the GATE pin outputs a drive pulse signal, it may generate a resonance signal with the internal capacitance of the power switch Qp. To avoid the self - excitation situation caused by the resonance signal, when the primary - side control chip is within the preset resonance time, the detection of the primary - side control chip is blocked.

[0070] Correspondingly, a first embodiment in which the secondary - side control chip exits the second mode is specifically after controlling the output of the switching power supply by the drive pulse signal, furthermore, When the secondary control chip collects a mode control signal indicating that the power supply demand of the load device is higher than a preset value, it outputs, through a transformer, a wake-up signal indicating the exit from the second mode at a preset frequency, and controls the secondary control chip to stop the output of the wake-up signal, and controls the secondary control chip based on the wake-up signal to exit the second mode.

[0071] Correspondingly, a first embodiment in which the primary control chip exits the second mode is specifically After outputting, through a transformer, a wake-up signal indicating the exit from the second mode at a preset frequency, further when it is determined that the preset frequency of the wake-up signal is smaller than a frequency threshold value, controlling the primary control chip to exit the second mode.

[0072] Among them, in a second embodiment of maintaining the switching power supply in the second mode, turning off the bias current of the opto-coupling circuit and controlling the output of the switching power supply by a drive pulse signal when adjusting so that the input voltage of the primary auxiliary winding is within a preset range, outputting a drive pulse signal in the primary control chip, including adjusting the output of the switching power supply based on the relationship between the drive pulse signal and the input voltage and the output voltage, so as to put the switching power supply in the second mode.

[0073] At this time, the input voltage of the primary auxiliary winding is denoted as VCC, and it is determined whether to maintain the switching power supply in the second mode based on whether VCC is within the preset range. Among them, the relationship between VCC and 7.6V and 8.1V is detected. When VCC is lower than 7.6V, the GATE pin outputs a drive pulse signal. When VCC is higher than 8.1V, no drive pulse signal is output to the GATE pin.

[0074] Also, adjusting the output of the switching power supply based on the relationship between the input voltage and the output voltage is Adjusting the output voltage based on the turns ratio relationship between the input voltage and the output voltage, where the turns ratio relationship is the ratio of the number of turns of the secondary winding of the secondary transformer to the number of turns of the primary auxiliary winding, and can be expressed by the formula Vout = VCC * Ns / Na, where Na represents the number of turns of the coil of the auxiliary winding and Ns represents the number of turns of the secondary coil.

[0075] Correspondingly, a second embodiment in which the primary control chip exits the second mode is specifically After controlling the output of the switching power supply by the drive pulse signal, further When an inversion occurs in the level signal of the voltage signal output by the opto-coupling circuit collected by the primary control chip, and the holding time length of the inverted level signal reaches the second preset time length, controlling the secondary control chip to stop outputting the wake-up signal, and controlling the primary control chip based on the wake-up signal to exit the second mode.

[0076] Among them, the second preset time length is set as T2.

[0077] Correspondingly, a second embodiment in which the secondary control chip exits the second mode is specifically Controlling the secondary control chip to exit the second mode based on a notification signal that maintains the third preset time length.

[0078] Among them, the third preset time length is set as T3.

[0079] Based on the above content, further explanation is necessary. For the switching power supply provided in the embodiments of the present invention, its operation process is generally divided into three states, specifically as follows. First, the normal operation mode, that is, according to the above embodiments regarding the charging of a mobile phone, it is the normal charging state of the mobile phone. Second, when charging the mobile phone with the switching power supply, it can be understood as a situation where the mobile phone is fully charged but the connection between the mobile phone and the switching power supply is not disconnected. Third, when charging the mobile phone with the switching power supply, it can be understood as a situation where the mobile phone and the switching power supply are disconnected when fully charged. When the relationship between the switching power supply and the load is in the second state among them, the first mode is used to reduce the power consumption of the switching power supply. At this time, two methods, magnetic coupling and optical coupling, are used. When the relationship between the switching power supply and the load is in the third state among them, the second mode is used to reduce the power consumption of the switching power supply. At this time, only the magnetic coupling method is used.

[0080] The standby method of the switching power supply provided by the present invention is applied to a switching power supply equipped with an optical coupling circuit. When a mode control signal indicating that the power supply demand of the load device is higher than a preset value is detected, the switching power supply enters the first mode, and the output of the switching power supply is controlled by the optical coupling circuit. When a mode control signal indicating that the power supply demand of the load device is less than or equal to the preset value is detected, the switching power supply enters the second mode, and the bias current of the optical coupling circuit is turned off. By controlling the output of the switching power supply with a drive pulse signal, the bias currents on the primary side and the secondary side of the switching power supply are reduced, and the standby power consumption of the switching power supply is reduced. At this time, since the bias current of the optical coupling circuit is turned off, the bias currents on both the primary side and the secondary side become 0. Therefore, the bias current decreases, the static loss is reduced, and the standby power consumption becomes even lower.

[0081] The standby method of the switching power supply is applicable to a power supply system that uses OC within a CV or CC control loop including, but not limited to, topology structures such as Flyback and LLC. Among them, the switching power supply may be an AC / DC SSR power supply. The switching power supply provided in this embodiment has an opto-coupling circuit coupled between the primary side and the secondary side. The switching power supply further a mode signal generation circuit that is used to detect the power supply demand of the load device of the switching power supply and generates a second-mode control signal when the power supply demand of the load device is below a preset value; an opto-coupling control circuit that controls to turn off the bias current of the opto-coupling circuit based on the second-mode control signal; a switching power supply output control circuit that generates a first-mode control signal when the power supply demand of the load device is higher than a preset value, controls the switching power supply based on the first-mode control signal to enter the first mode, and controls the output of the switching power supply by the opto-coupling circuit. When the switching power supply enters the second mode based on the second-mode control signal, the output of the switching power supply is controlled by a drive pulse signal, so as to reduce the bias current on the primary side and the secondary side of the switching power supply and reduce the standby power consumption of the switching power supply. When the switching power supply enters the first mode, the stability of the output of the switching power supply is controlled by adjusting the bias current of the opto-coupling circuit.

[0082] In some embodiments, the switching power supply output control circuit after receiving the second-mode control signal, generates a notification signal and uses it to notify the primary-side control chip to enter or exit the second mode, so as to control the output of the switching power supply by a drive pulse signal in the switching power supply, reduce the bias current on the primary side and the secondary side of the switching power supply, and reduce the standby power consumption of the switching power supply. A primary-side mode control circuit that receives a notification signal and controls a primary-side control chip based on the notification signal to change an operation mode including a first mode or a second mode. Among them, when the power supply demand of the load device is higher than a preset value, the switching power supply enters the first mode, and the output of the switching power supply is controlled by an opto-coupling circuit.

[0083] In some embodiments, the notification signal control circuit generates a notification signal indicating that the switching power supply enters the second mode based on the bias current of the opto-coupling circuit, and includes a first second-mode entry control circuit for controlling the secondary-side control chip to enter the second mode based on the notification signal maintaining a first preset time length.

[0084] In some embodiments, the notification signal control circuit further includes a second second-mode entry control circuit for controlling the primary-side control chip to enter the second mode when the primary-side control chip collects that an inversion occurs in the level signal of the voltage signal output by the opto-coupling circuit and the holding time length of the inverted level signal reaches a time threshold. Among them, the time threshold is greater than the maximum value of the duration of the level signal in the first mode, and the duration of the mode control signal indicating that the power supply demand of the load device controlled by the secondary-side control chip is below the preset value is greater than the time threshold.

[0085] In some embodiments, the primary-side mode control circuit includes a first second-mode maintenance control circuit for outputting a drive pulse signal in the primary-side control chip and adjusting the output of the switching power supply based on the drive pulse signal to make the switching power supply enter the second mode when the primary-side control chip collects an output voltage shortage signal indicating that the output voltage is in a voltage shortage state.

[0086] In some embodiments, the primary-side mode control circuit further A first determination circuit is included to determine whether the output voltage in the secondary control chip is less than a first preset output voltage, and when the output voltage is less than the first preset output voltage, to transmit an output voltage shortage signal to the primary control chip.

[0087] In some embodiments, a first shielding circuit is further included to block the detection of the primary control chip when the primary control chip is within a preset resonance time.

[0088] In some embodiments, the notification signal control circuit further When the secondary control chip collects a mode control signal indicating that the power supply demand of the load device is higher than a preset value, outputs a wake-up signal representing exiting a second mode at a preset frequency through a transformer, and controls the secondary control chip to stop outputting the wake-up signal, and includes a first secondary side second mode exit control circuit for controlling the secondary control chip to exit the second mode based on the wake-up signal.

[0089] In some embodiments, the notification signal control circuit further When it is determined that the preset frequency of the wake-up signal is less than a frequency threshold, includes a first primary side second mode exit control circuit for controlling the primary control chip to exit the second mode.

[0090] In some embodiments, the primary side mode control circuit further When adjusting the input voltage of the primary side auxiliary winding to be within a preset range, outputs a drive pulse signal in the primary control chip, and adjusts the output of the switching power supply based on the relationship between the drive pulse signal, the input voltage, and the output voltage, and includes a second second mode maintenance control circuit for setting the switching power supply to the second mode.

[0091] In some embodiments, the primary side mode control circuit further It includes a first adjustment circuit for adjusting the output voltage based on the turns ratio relationship between the input voltage and the output voltage, where the turns ratio relationship is the ratio of the number of turns of the secondary winding of the transformer on the secondary side to the number of turns of the auxiliary winding on the primary side.

[0092] In some embodiments, the notification signal control circuit further When an inversion occurs in the level signal of the voltage signal output by the opto-coupling circuit collected by the primary control chip, and the holding time length of the inverted level signal reaches the second preset time length, it controls the secondary control chip to stop outputting the wake-up signal, and includes a second primary-side second-mode exit control circuit for controlling the primary-side and secondary-side control chips based on the wake-up signal to exit the second mode.

[0093] In some embodiments, the notification signal control circuit further It includes a second secondary-side second-mode exit control circuit for the secondary control chip to exit the second mode based on the control of the notification signal maintaining the third preset time length.

[0094] FIG. 5 is a structural diagram of a first switching power supply provided in an embodiment of the present invention. As shown in FIG. 5, in some embodiments, the mode signal generation circuit includes at least a mode control signal interface (C1, C2) and a second mode control unit (Sleep Mode). The mode control signal interface is used to transmit a mode control signal indicating that the power supply demand of the load device is higher than a preset value to the second mode control unit correspondingly. Also, the opto-coupling control circuit includes at least a secondary-side first switch tube Q2 and a secondary-side second switch tube Q3. The first end of the secondary-side first switch tube is connected to the opto-coupling circuit, the second end of the secondary-side first switch tube is grounded, the control end of the secondary-side first switch tube is connected to the first end of the secondary-side second switch tube, the second end of the secondary-side second switch tube is grounded, and the control end of the secondary-side second switch tube is connected to the second mode unit.

[0095] Inside the secondary control chip, the following circuit structure is further included. Specifically, A second-mode control unit Sleep Mode installed inside the secondary-side control chip where a mode control signal interface (C1, C2) is installed, and Compare the relationship between Vout and 4V to determine whether there is an output voltage shortage signal. If Vout is greater than 4V, no output voltage shortage signal is transmitted, the GATE pin does not output a drive pulse signal. If Vout is less than 4V, an output voltage shortage signal is transmitted, the GATE pin outputs a drive pulse signal. When there is an output of the drive pulse signal, it is the secondary-side amplifier U2 for controlling the output of the switching power supply by the power switch Qp and the transformer T1. The output terminal of the secondary-side amplifier U2 is connected to the first terminal of the oscillator OSC. The second terminal of the oscillator OSC is connected to the control terminal of the secondary-side drive switch tube Q4. The first terminal of the secondary-side drive switch tube Q4 is connected to the secondary-side winding of the transformer T1. The second terminal of the secondary-side drive switch tube Q4 is grounded. Furthermore, a DC bias circuit Bias2 that is connected to both OSC and Sleep Mode is installed. The control terminal of the secondary-side second switch tube Q3 is connected to the DC bias circuit Bias2. The first terminal of the secondary-side second switch tube Q3 is connected to the output terminal of the comparator U6. The second terminal of the secondary-side second switch tube Q3 is grounded. The control terminal of the secondary-side first switch tube Q2 is connected to the output terminal of the comparator U6. The first terminal of the secondary-side first switch tube Q2 is connected to the opto-coupler switch tube. The second terminal of the secondary-side first switch tube Q2 is grounded. The positive-phase input terminal of the comparator U6 is connected to Ccomp. The inverting-phase input terminal (inputting a voltage of 2.5V) of the comparator U6 is connected to the DC bias circuit Bias2. The DC bias circuit Bias2 is also connected to R5.

[0096] Correspondingly, inside the primary-side control chip, the following circuit structure is further included. Specifically, The DC bias circuit Bias1 installed inside the primary-side control chip has four input / output ports, denoted as VDD, UVLO, PSL, and Vref respectively. Among them, the UVLO port is connected to the output terminal of the comparator U4. The output terminal of the comparator U5 receives the Hold signal, and the comparator U4 controls the voltage value passing through it between 18V and 6.7V. The comparator U5 controls the voltage value passing through it between 18V and 7.6V and is connected to the output pin HV of the primary-side control chip via parallel switch tubes for receiving signals corresponding to the diode D3, UVLO, and Hold respectively, and the constant current source H.First, the two input terminals of the primary-side first amplifier U3 will be described. Among them, the non-inverting input terminal inputs a voltage of 50 mV, and the inverting input terminal must be connected to the output pin DEM of the primary-side control chip. The output terminal of the primary-side first amplifier U3 is connected to the Valley Lock OSC module and further sequentially connected to the DFF module. Among them, a plurality of pins are installed on the Valley Lock OSC module, and the pins are COMP and Pulse respectively. The Pulse pin is connected to the output terminal of the primary-side first amplifier U3. Similarly, a plurality of pins are installed on the DFF module, and the pins are D (input an external power supply, and the value is VDD), CLK, RB, and Q respectively. The DFF module is connected to the Valley Lock OSC module via the CLK pin. The Q pin among them is connected to an AND gate. The output terminal of the AND gate is connected to the driver amplifier Driver. The AND gate has two input terminals. One of the input terminals is connected to the output terminal of the Valley Lock OSC module, and the other input terminal is connected to the Q pin of the DFF module. The output terminal of the driver amplifier Driver outputs a drive pulse signal as the GATE of the pin, and the drive pulse signal is used to drive Qp. Among them, the RB pin is also connected to a NAND gate. Among them, the first output terminal of the NAND gate is connected to the output terminal of the comparator U7, and the second output terminal of the NAND gate is connected to the output terminal of the comparator U8. The non-inverting input terminal of the comparator U7 is a voltage of 0.8V. The inverting input terminal of the comparator U7 is connected to the COMP pin. The non-inverting input terminal of the comparator U8 is connected to the common terminal of R9 and R10. The other end of R10 is grounded. The other end of R9 is connected to the cathode of the diode D4. The anode of the diode D4 is connected to one end of R8. The other end of R8 is connected to the second end of the switch tube PSL. The first end of the switch tube PSL is connected to the external power supply VDD. The inverting input terminal of the comparator U7 is connected to the CS pin, and a resistor R4 is externally connected to the CS pin, and the other end of R4 is grounded.Also, in the primary-side control chip, the signals for controlling the second-mode control unit Sleep Mode are Brust, Pulse, and PSL respectively. Among them, Brust is the signal at the output terminal of comparator U7, PSL is the signal at the control terminal of switch tube PSL, and Pulse is the signal at the output terminal of the primary-side first amplifier U3.

[0097] It should be noted that in this structure, the connection status between the load and the power supply is detected by signals C1 and C2 on the USB interface connected to the load (Load). As a specific embodiment, if both signals C1 and C2 are at a high level (i.e., the mode control signal is 11), it indicates that the load and the switching power supply are disconnected. At this time, the sleep mode (Sleep Mode, SM) is activated. Reconnection is performed on the peripheral circuit of OCDRV, and modules corresponding to the sleep mode, such as the OSC module and amplifier, are installed. Among them, it should be emphasized that the secondary-side amplifier U2 is applied to detect whether the output voltage is an amplifier with insufficient voltage, and the set undervoltage threshold is 4V. Of course, the undervoltage threshold includes 4V but is not limited to this, and other values may also be used, which can be determined based on the specific implementation scenario. Regarding the module corresponding to the sleep mode, it should be further explained that an Itring signal drive is also installed in this module. When the bias current on the secondary side is set to 0, the corresponding secondary-side first switch tube Q2 is also in the off state. It is also necessary to reconnect the internal circuit of the primary-side control chip. Of course, there can be various connection methods in the internal circuit of the control chip, and what is shown in Figure 5 is only one of many embodiments, so it can be understood that the implementation form can be determined based on the specific implementation scenario.

[0098] When it is determined that the load and the switching power supply are disconnected, the sleep mode is activated. Specifically, it is as follows.

[0099] By setting the OC bias current to 0 (IOC_LED = 0), the secondary-side current loss can be reduced by one digit to the 100 μA level. Vout is controlled by magnetic coupling, monitored, and when a voltage shortage occurs, an excitation pulse signal (IDrive) is output and transmitted to the primary side through the transformer. At this time, GATE outputs a drive pulse signal to transmit energy to the secondary side and maintain the stability of the output voltage. This voltage shortage signal has nothing to do with the resonance waveform and only represents the voltage shortage of Vout.

[0100] When the secondary-side OC bias current is set to 0 (IOC_LED = 0), due to the OC characteristic, the primary-side OC bias current (IOC_C) synchronously drops to 0, the CV or CC control loop based on OC feedback stops operating, and both the primary / secondary-side current losses can be reduced by one digit, and the system standby loss can be reduced to 5 mW or less.

[0101] The output voltage (Vout) can be changed to be controlled by a CV control loop based on magnetic coupling. After the secondary side enters the sleep mode, the output voltage (Vout) is detected and the OC bias current (IOC_LED) is turned off. When Vout has a voltage shortage, a voltage shortage signal IDrive is sent and transmitted to the DEM pin on the primary side by the transformer. If Vout does not have a voltage shortage, this voltage shortage signal is not sent.

[0102] After the primary side enters the sleep mode, the DEM pin signal is monitored and ICC is pulled down. When detecting the voltage shortage signal sent by the secondary side at the DEM pin, GATE outputs a drive pulse signal to maintain the secondary-side output voltage.

[0103] The output voltage Vout can also be indirectly controlled in a way that controls the primary-side VCC. After the primary side enters the sleep mode, the VCC voltage is monitored and ICC is pulled down. When detecting a voltage shortage of VCC, GATE outputs a drive pulse signal to maintain the VCC voltage within a certain range. The output voltage Vout maintains the relationship (Na / Ns) between the VCC voltage and the turns ratio.

[0104] It should be noted that if the load is attached to the power supply at this time, the standby of the power supply will continue to be maintained in burst mode. However, if the load is detached from the power supply (which can be represented by Detached), the standby of the power supply will be maintained in sleep mode. When the sleep mode is activated, the high-level drive of the SSL signal indicating the activation of the sleep mode is used.

[0105] Figure 6 is a waveform diagram of the entry into sleep mode corresponding to the first switching power supply provided in the embodiment of the present invention. As shown in Figure 6, when the secondary side enters the sleep mode (SSL = H), IOC_LED is set to 0 (at this time, this signal can also be represented by the Iopto signal). At the same time, the Itrig signal is set to 2 mA and held for a T1 time (240 ms). After the elapse of the T1 time, the Itrig signal becomes 0 A. The quiescent current at this time drops to 150 μA. When the 2 mA Itrig signal makes the primary side COMP lower than BML, the primary side enters burst mode. At this time, GATE does not output a drive pulse signal. After the burst mode on the primary side lasts for a T2 time (180 ms, T2 < T1), the primary side enters the sleep mode. After the T1 time, the bias current (IOC_C) on the primary side decreases synchronously to 0. At this time, the quiescent current drops to 30 μA.

[0106] In the sleep mode, the standby power consumption of the power supply can be reduced to 5 mW or less, and the secondary side directly monitors the output voltage Vout. When Vout < 4V, a voltage shortage signal IDrive (a 30 mA current pulse with a width of 1 μs and a period of 300 μs) is transmitted and transmitted to the primary side DEM pin through the transformer. When Vout ≥ 4V, no voltage shortage signal is transmitted.

[0107] After the primary side enters burst mode or sleep mode, the signal of the DEM pin is detected. When the DEM pin detects the voltage shortage signal transmitted by the secondary side, GATE outputs a drive pulse signal to maintain the secondary side output voltage. If the DEM pin does not detect the voltage shortage signal, GATE does not output a drive pulse signal.

[0108] During the process that the primary side enters sleep, it enters burst mode in the T2 time period. During this process, the constant voltage control loop based on OC feedback stops operating. At this time, GATE does not output a drive pulse signal. When the energy transmission stops, the output voltage Vout continues to drop and may fall below the minimum operating voltage of the secondary side, causing a voltage shortage in the secondary side chip. If a voltage shortage occurs, the secondary side stops operating, so the power supply system cannot operate normally. Therefore, in burst mode, the primary side also needs to detect and respond to the voltage shortage signal of the DEM pin.

[0109] After the primary side outputs a drive pulse signal, a resonance signal may appear at the DEM pin. Therefore, the primary side needs to block the detection of the DEM pin within the resonance time period to avoid self-excitation.

[0110] FIG. 7 is a waveform diagram of the exit from the sleep mode corresponding to the first switching power supply provided in the embodiment of the present invention. As shown in FIG. 7, when the load is reconnected, the secondary side exits the sleep mode and sends a wake-up signal IDrive (a 30 mA current pulse with a width of 1 us and a period of 200 us), which is transmitted to the DEM pin through the transformer. At this time, the quiescent current returns to normal. Specifically, it is as follows. In the sleep mode, when the primary side detects that the pulse period of the DEM pin signal is less than 250 us, the primary side exits the sleep mode, the primary side COMP returns to the normal bias, and the voltage is determined by the loop. At this time, the quiescent current returns to normal.

[0111] Based on the above embodiments, the present invention further provides the following embodiments. FIG. 8 is a structural diagram of the second switching power supply provided in the embodiment of the present invention. As shown in FIG. 8, compared with the structure shown in FIG. 5, the following circuit structure is further included inside the secondary side control chip. Specifically, There is a mode control signal interface (C1, C2), which is the second mode control unit Sleep Mode installed inside the secondary side control chip. The output terminal of the second mode control unit Sleep Mode outputs an SSL signal and is connected to the first terminal of the DC bias circuit Bias2. The control terminal of the secondary side second switch tube Q3 is connected to the DC bias circuit Bias2. The first terminal of the secondary side second switch tube Q3 is connected to the output terminal of the comparator U6. The second terminal of the secondary side second switch tube Q3 is grounded. The control terminal of the secondary side first switch tube Q2 is connected to the output terminal of the comparator U6. The first terminal of the secondary side first switch tube Q2 is connected to the opto-coupled switch tube. The second terminal of the secondary side first switch tube Q2 is grounded. The positive phase input terminal of the comparator U6 is connected to Ccomp. The inverting input terminal of the comparator U6 (inputting a voltage of 2.5V) is connected to the DC bias circuit Bias2. The DC bias circuit Bias2 is also connected to R5.

[0112] Correspondingly, the primary side control chip further includes the following circuit structure inside. Specifically, The DC bias circuit Bias1 installed inside the primary control chip has four input / output ports, denoted as VDD, UVLO, PSL, and Vref respectively. Among them, the UVLO port is connected to the output terminal of the comparator U4. The comparator U4 controls the voltage value passing through it between 18V and 6.7V and is connected to the output pin HV of the primary control chip via the diode D3, the switch tube UVLO, and the constant current source H. First, the two input terminals of the primary-side first amplifier U3 will be described. Among them, the non-inverting input terminal inputs a voltage of 50mV, and the inverting input terminal must be connected to the output pin DEM of the primary control chip. The output terminal of the primary-side first amplifier U3 is connected to the Valley Lock OSC module and is further sequentially connected to the DFF module. Among them, the Valley Lock OSC module has a plurality of pins, which are COMP and Pulse respectively. The Pulse pin is connected to the output terminal of the primary-side first amplifier U3. The DFF module also has a plurality of pins, which are D (input an external power supply, and the value is VDD), CLK, RB, and Q respectively. The DFF module is connected to the Valley Lock OSC module via the CLK pin. The Q pin among them is connected to an AND gate. The output terminal of the AND gate is connected to the drive amplifier Driver. The AND gate has two input terminals. One of the input terminals is connected to the output terminal of the Valley Lock OSC module, and the other input terminal is connected to the Q pin of the DFF module. The output terminal of the drive amplifier Driver outputs a drive pulse signal as the GATE of the pin, and the drive pulse signal is used to drive Qp. Among them, the RB pin of the DFF module is also connected to the AND gate. Among them, the first output terminal of the AND gate is connected to the input terminal of the NOR gate, and the second output terminal of the AND gate is connected to the output terminal of the comparator U8. The first output terminal of the NOR gate is connected to the output terminal of the comparator U7, and the second output terminal of the NOR gate is connected to the output terminal of the comparator U9. Among them, the comparator U9 has three input terminals installed, and the voltage values of the three input terminals are 8.1V, 7.It is 6V and VCC. The comparator U7 is provided with three input terminals. Among them, the voltage values of two input terminals are BMH and BML respectively, and the other input terminal is connected to the COMP pin. The non-inverting input terminal of the comparator U8 is connected to the common terminal of R9 and R10. The other end of R10 is grounded. The other end of R9 is connected to the second terminal of the switch tube PSL. The first terminal of the switch tube PSL is connected to the cathode of the diode D4. The anode of the diode D4 is connected to one end of R8. The other end of R8 is connected to the external power supply VDD. The inverting input terminal of the comparator U8 is connected to the CS pin, and a resistor R4 is externally connected to the CS pin, and the other end of R4 is grounded. Also, in the primary side control chip, the signals for controlling the second mode unit Sleep Mode are Brust and PSL respectively. Among them, Brust is the signal at the output terminal of the comparator U7, and PSL is the signal at the control terminal of the switch tube PSL.

[0113] It should be noted first that if a load is attached to the power supply at this time, the standby state of the power supply continues to be maintained in burst mode. Only when the load and the power supply are detached, the standby state of the power supply is maintained in sleep mode. When the sleep mode is activated, a high-level drive of the SSL signal indicating the activation of the sleep mode is used. FIG. 9 is a waveform diagram of the entry into sleep mode corresponding to the second switching power supply provided in the embodiment of the present invention. As shown in FIG. 9, when the secondary side enters the sleep mode (SSL = H), the secondary side bias current at this time is 0 A, Itrig is 2 mA, and it is maintained for a T1 time (240 ms). After the T1 time, Itrig becomes 0 A. At this time, the quiescent current drops to 150 μA. When the Itrig signal is 2 mA, if the primary side COMP is made lower than BML, the primary side enters burst mode and GATE does not output a drive pulse signal. When the primary side persists in burst mode for a T2 time (180 ms, T2 <T1), the primary side enters sleep mode. After the T1 time, the primary side COMP rises to VDD, but the bias current IOC_C is 0. At this time, the quiescent current drops to 30 μA. In sleep mode, the standby power consumption of the power supply can be reduced to 5 mW or less, and the primary side indirectly controls the output voltage by adjusting VCC. If VCC <7.6 V, GATE outputs a periodic drive pulse signal and the VCC voltage rises. If VCC> 8.1 V, GATE stops outputting the drive pulse signal and the VCC voltage drops. The output voltage Vout at this time is approximately equal to VCC * Ns / Na.

[0114] FIG. 10 is a waveform diagram of exiting the sleep mode corresponding to the second switching power supply provided in the embodiment of the present invention. As shown in FIG. 10, when the load is reconnected, the secondary side exits the sleep mode. Therefore, when the Itrig signal is set to 2 mA and held for the T3 time (1 ms), the Itrig signal after the T3 time becomes 0 A. At this time, the quiescent current returns to normal. In the sleep mode, when the primary side chip detects the falling edge of COMP and the low level of COMP lasts for the T4 time (0.5 ms, T4 < T3), the primary side exits the sleep mode. The primary side COMP after the T3 time is determined by the loop. At this time, the quiescent current returns to normal.

[0115] In addition, in the present invention, a secondary side control circuit and a primary side control circuit of the switching power supply are respectively provided. Specifically, A secondary side control circuit of the switching power supply, wherein an opto-coupling circuit is coupled between the primary side and the secondary side of the switching power supply, and the secondary side control circuit includes A mode signal generation circuit used to detect the power supply demand of the load device of the switching power supply, and generate a second mode control signal when the power supply demand of the load device is below a preset value; An opto-coupling control circuit that controls to turn off the bias current of the opto-coupling circuit based on the second mode control signal; After receiving the second mode control signal, a notification signal is generated and used to notify the primary side control chip to enter or exit the second mode, so as to control the output of the switching power supply by a drive pulse signal in the switching power supply, reduce the bias currents of the primary side and the secondary side of the switching power supply, and reduce the standby power consumption of the switching power supply. A notification signal control circuit.

[0116] In some embodiments, the notification signal control circuit includes Based on the bias current of the optical coupling circuit, a switching power supply generates a notification signal indicating entry into the second mode, and includes a third second-mode entry control circuit for controlling the secondary-side control chip to enter the second mode based on the notification signal maintaining a first preset time length.

[0117] In some embodiments, the notification signal control circuit further includes a fourth second-mode entry control circuit for controlling the primary-side control chip to enter the second mode when it is collected that an inversion occurs in the level signal of the voltage signal output by the optical coupling circuit and the holding time length of the inverted level signal reaches a time threshold, wherein the time threshold is greater than the maximum value of the duration of the level signal under the first mode, and the duration of the mode control signal indicating that the power supply demand of the load device controlled by the secondary-side control chip is below a preset value is greater than the time threshold.

[0118] In some embodiments, the notification signal control circuit further includes a third secondary-side second-mode exit control circuit for outputting, through a transformer, a wake-up signal indicating exit from the second mode at a preset frequency when the secondary-side control chip collects a mode control signal indicating that the power supply demand of the load device is higher than a preset value, and for controlling the secondary-side control chip to stop outputting the wake-up signal and controlling the secondary-side control chip based on the wake-up signal to exit the second mode.

[0119] In some embodiments, the notification signal control circuit further includes a third primary-side second-mode exit control circuit for controlling the primary-side control chip to exit the second mode when it is determined that the preset frequency of the wake-up signal is less than a frequency threshold.

[0120] In some embodiments, the notification signal control circuit further When an inversion occurs in the level signal of the voltage signal output by the opto-coupling circuit collected by the primary-side control chip, and the holding time length of the inverted level signal reaches the second preset time length, the secondary-side control chip is controlled to stop outputting the wake-up signal, and a fourth primary-side second-mode exit control circuit for controlling the primary-side and secondary-side control chips based on the wake-up signal to exit the second mode is included.

[0121] In some embodiments, the notification signal control circuit further includes a fourth secondary-side second-mode exit control circuit for the secondary-side control chip to exit the second mode based on the control of the notification signal maintaining the third preset time length.

[0122] A primary-side control circuit of a switching power supply, wherein an opto-coupling circuit is coupled between the primary side and the secondary side of the switching power supply, and the primary-side control circuit is coupled to a power switch of the switching power supply and includes a drive pulse signal generation circuit for controlling conduction and interruption of the power switch by generating a drive pulse signal; receives a notification signal and includes a primary-side mode control circuit for controlling the primary-side control chip based on the notification signal to change the operating mode.

[0123] In some embodiments, the primary-side mode control circuit includes a third second-mode maintenance control circuit for setting the switching power supply to the second mode by outputting a drive pulse signal in the primary-side control chip and adjusting the output voltage of the switching power supply based on the drive pulse signal when the primary-side control chip collects an output voltage shortage signal indicating that the output voltage is in a voltage shortage state.

[0124] In some embodiments, the primary-side mode control circuit further includes a second determination circuit for determining whether the output voltage in the secondary-side control chip is less than a first preset output voltage, and for transmitting an output voltage shortage signal to the primary-side control chip when the output voltage is less than the first preset output voltage.

[0125] In some embodiments, further, when the primary control chip is within the preset resonance time, it includes a second shielding circuit for blocking the detection of the primary control chip.

[0126] In some embodiments, the primary side mode control circuit further when adjusted so that the input voltage of the primary side auxiliary winding is within a preset range, outputs a drive pulse signal in the primary control chip, and adjusts the output of the switching power supply based on the relationship between the drive pulse signal, the input voltage, and the output voltage, thereby including a fourth second mode maintenance control circuit for setting the switching power supply to the second mode.

[0127] In some embodiments, the primary side mode control circuit further includes a second adjustment circuit for adjusting the output voltage based on the turns ratio relationship between the input voltage and the output voltage, where the turns ratio relationship is the ratio of the number of turns of the secondary winding of the transformer on the secondary side to the number of turns of the auxiliary winding on the primary side.

[0128] As described above, the standby method of the switching power supply, the switching power supply, the primary side and secondary side control circuits provided by the present invention have been introduced in detail. Each embodiment in the specification is described in a progressive manner, but what each embodiment focuses on explaining is the difference from other embodiments. For the same or similar parts between each embodiment, they can be referred to each other. For the devices disclosed in the embodiments, they correspond to the methods disclosed in the embodiments and are described relatively simply. For related points, reference may be made to the description in the method part. It should be pointed out that those skilled in the art can make some improvements and modifications to the present invention on the premise of not departing from the principle of the present invention, and these improvements and modifications are also included within the protection scope of the claims of the present invention.

[0129] It should be further noted that in this specification, relational terms such as "first", "second", etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any substantial relationship or order between these entities or operations. Also, the term "comprising", "including" or any other variation thereof covers non-exclusive inclusion, so that a process, method, article or apparatus containing a series of elements contains not only those elements but also other elements not expressly listed, or elements inherent to that kind of process, method, article or apparatus. In the situation of no further limitation, elements limited by the phrase "comprising one..." do not exclude the existence of further identical elements in the process, method, article or apparatus containing the said elements.

Claims

1. Applied to a switching power supply with an opto-coupler circuit installed in a standby method of a switching power supply, When a mode control signal indicating that the power supply demand of the load device is higher than a preset value is detected, the switching power supply enters the first mode, and the output of the switching power supply is controlled by the opto-coupler circuit; When the mode control signal indicating that the power supply demand of the load device is less than or equal to the preset value is detected, the switching power supply enters the second mode, and the bias current of the opto-coupler circuit is turned off, and the output of the switching power supply is controlled by a drive pulse signal, thereby reducing the bias currents on the primary side and the secondary side of the switching power supply and reducing the standby power consumption of the switching power supply, characterized by including A standby method of a switching power supply.

2. Entering the second mode includes Generating a notification signal indicating that the switching power supply enters the second mode based on the bias current of the opto-coupler circuit; Controlling the secondary side control chip based on the notification signal maintaining a first preset time length and entering the second mode, characterized by including The standby method of the switching power supply according to Claim 1.

3. Entering the second mode includes When the primary side control chip collects that an inversion occurs in the level signal of the voltage signal output by the opto-coupler circuit and the holding time length of the inverted level signal reaches a time threshold, controlling the primary side control chip to enter the second mode, The time threshold is greater than the maximum value of the duration of the level signal in the first mode, and the duration of the mode control signal indicating that the power supply demand of the load device controlled by the secondary side control chip is less than or equal to the preset value is greater than the time threshold, characterized by The standby method of the switching power supply according to Claim 2.

4. Turning off the bias current of the opto-coupler circuit and controlling the output of the switching power supply by a drive pulse signal includes When the primary side control chip collects an output voltage shortage signal indicating that the output voltage is in a voltage shortage state, outputting the drive pulse signal in the primary side control chip. Adjusting the output of the switching power supply based on the drive pulse signal to put the switching power supply into the second mode. The standby method of the switching power supply according to claim 1.

5. The primary control chip may collect an output voltage shortage signal indicating that the output voltage is in a voltage shortage state. Determining whether the output voltage in the secondary control chip is less than a first preset output voltage. If it is less, transmitting the output voltage shortage signal to the primary control chip. If it is not less, not outputting the output voltage shortage signal. The standby method of the switching power supply according to claim 4.

6. When the primary control chip is within a preset resonance time, further including blocking the detection of the primary control chip. The standby method of the switching power supply according to any one of claims 1 to 5.

7. After controlling the output of the switching power supply by the drive pulse signal, further, When the secondary control chip collects a mode control signal indicating that the power supply demand of the load device is higher than the preset value, outputting, through a transformer, a wake-up signal indicating exiting the second mode at a preset frequency, and controlling the secondary control chip to stop the output of the wake-up signal, and controlling the secondary control chip based on the wake-up signal to exit the second mode. The standby method of the switching power supply according to claim 1.

8. After outputting, through a transformer, the wake-up signal indicating exiting the second mode at a preset frequency, further, When it is determined that the preset frequency of the wake-up signal is less than a frequency threshold, controlling the primary control chip to exit the second mode. The standby method of the switching power supply according to claim 7.

9. Turning off the bias current of the opto-coupling circuit and controlling the output of the switching power supply by a drive pulse signal. When adjusting the input voltage of the auxiliary winding on the primary side to be within a preset range, outputting the drive pulse signal in the primary control chip. Adjusting the output of the switching power supply based on the drive pulse signal and the relationship between the input voltage and the output voltage, thereby setting the switching power supply to the second mode. The standby method of the switching power supply according to claim 1.

10. Adjusting the output of the switching power supply based on the drive pulse signal and the relationship between the input voltage and the output voltage includes Adjusting the output voltage based on the turns ratio relationship between the input voltage and the output voltage, where the turns ratio relationship is the ratio of the number of turns of the secondary winding of the transformer on the secondary side to the number of turns of the auxiliary winding on the primary side. The standby method of the switching power supply according to claim 9.

11. After controlling the output of the switching power supply with the drive pulse signal, further When an inversion occurs in the level signal of the voltage signal output by the opto-coupling circuit collected by the primary-side control chip, and the holding time length of the inverted level signal reaches a second preset time length, controlling the secondary-side control chip to stop outputting the wake-up signal, and controlling the primary-side control chip based on the wake-up signal to exit the second mode. The standby method of the switching power supply according to claim 7.

12. Further including controlling the secondary-side control chip based on the notification signal maintaining a third preset time length to exit the second mode. The standby method of the switching power supply according to claim 2.

13. In a switching power supply with an opto-coupling circuit coupled between the primary side and the secondary side, the switching power supply further includes A mode signal generation circuit used to detect the power supply demand of the load device of the switching power supply, and generating a second-mode control signal when the power supply demand of the load device is below a preset value. An opto-coupling control circuit that controls the bias current of the opto-coupling circuit to be turned off based on the second-mode control signal. A switching power supply output control circuit that generates a first-mode control signal when the power supply demand of the load device is higher than the preset value, controls the switching power supply based on the first-mode control signal to enter the first mode, and controls the output of the switching power supply by the optocoupler circuit. When the switching power supply enters the second mode based on the second-mode control signal, the output of the switching power supply is controlled by a drive pulse signal, thereby reducing the bias current on the primary side and the secondary side of the switching power supply and reducing the standby power consumption of the switching power supply, and a switching power supply.

14. The switching power supply according to claim 11, characterized in that when the switching power supply enters the first mode, the stability of the output of the switching power supply is controlled by adjusting the bias current of the optocoupler circuit.

15. The switching power supply output control circuit includes a notification signal control circuit that, after receiving the second-mode control signal, generates a notification signal and uses it to notify the primary-side control chip of entering or exiting the second mode, thereby causing the switching power supply to control the output of the switching power supply by the drive pulse signal, reducing the bias current on the primary side and the secondary side of the switching power supply, and reducing the standby power consumption of the switching power supply, and a primary-side mode control circuit that receives the notification signal and controls the primary-side control chip based on the notification signal to change the operating mode including the first mode or the second mode, and The switching power supply according to claim 11, characterized in that when the power supply demand of the load device is higher than the preset value, the switching power supply enters the first mode, and the output of the switching power supply is controlled by the optocoupler circuit. The switching power supply according to claim 11.

16. The notification signal control circuit Based on the bias current of the optical coupling circuit, a notification signal indicating that the switching power supply enters the second mode is generated, and a first second-mode entry control circuit for controlling the secondary control chip to enter the second mode based on the notification signal maintaining a first preset time length is included. The switching power supply according to claim 15.

17. The notification signal control circuit further When the primary control chip collects that an inversion occurs in the level signal of the voltage signal output by the optical coupling circuit and the holding time length of the inverted level signal reaches a time threshold, a second second-mode entry control circuit for controlling the primary control chip to enter the second mode is included. The time threshold is greater than the maximum value of the duration of the level signal in the first mode, and the duration of the mode control signal indicating that the power supply demand of the load device controlled by the secondary control chip is less than or equal to the preset value is greater than the time threshold. The switching power supply according to claim 15.

18. The primary side mode control circuit When the primary control chip collects an output voltage shortage signal indicating that the output voltage is in a voltage shortage state, the primary control chip outputs the drive pulse signal, and a first second-mode maintenance control circuit for adjusting the output of the switching power supply based on the drive pulse signal to make the switching power supply enter the second mode is included. The switching power supply according to claim 15.

19. The primary side mode control circuit further A first determination circuit for determining whether the output voltage in the secondary control chip is less than a first preset output voltage, and when the output voltage is less than the first preset output voltage, transmitting the output voltage shortage signal to the primary control chip is included. The switching power supply according to claim 18.

20. When the primary control chip is within a preset resonance time, a first shielding circuit for blocking the detection of the primary control chip is further included. The switching power supply according to claim 11.

21. The notification signal control circuit further When the secondary-side control chip collects a mode control signal indicating that the power supply demand of the load device is higher than the preset value, it outputs, through a transformer, a wake-up signal indicating exiting the second mode at a preset frequency, and controls the secondary-side control chip to stop outputting the wake-up signal, and includes a first secondary-side second-mode exit control circuit for controlling the secondary-side control chip based on the wake-up signal to exit the second mode. The switching power supply according to claim 16.

22. The notification signal control circuit further When it is determined that the preset frequency of the wake-up signal is smaller than a frequency threshold value, it includes a first primary-side second-mode exit control circuit for controlling the primary-side control chip to exit the second mode. The switching power supply according to claim 21.

23. The primary-side mode control circuit further When adjusting the input voltage of the primary-side auxiliary winding to be within a preset range, it outputs a drive pulse signal in the primary-side control chip, and adjusts the output of the switching power supply based on the relationship between the drive pulse signal, the input voltage, and the output voltage, thereby including a second second-mode maintenance control circuit for setting the switching power supply to the second mode. The switching power supply according to claim 15.

24. The primary-side mode control circuit further It includes a first adjustment circuit for adjusting the output voltage based on the turns ratio relationship between the input voltage and the output voltage, and the turns ratio relationship is the ratio of the number of turns of the secondary-side winding of the transformer on the secondary side to the number of turns of the auxiliary winding on the primary side. The switching power supply according to claim 23.

25. The notification signal control circuit further When an inversion occurs in the level signal of the voltage signal output by the opto-coupling circuit collected by the primary-side control chip, and the holding time length of the inverted level signal reaches a second preset time length, it controls the secondary-side control chip to stop outputting the wake-up signal, and includes a second primary-side second-mode exit control circuit for controlling the primary-side and secondary-side control chips based on the wake-up signal to exit the second mode. The switching power supply according to claim 21.

26. The notification signal control circuit further A second secondary-side second mode exit control circuit for the secondary-side control chip to exit the second mode based on the control of a notification signal maintaining the third preset time length, characterized in that: The switching power supply according to claim 15.

27. The mode signal generation circuit includes at least a mode control signal interface and a second mode control unit. The mode control signal interface is used to transmit the mode control signal indicating that the power supply demand of the load device is higher than the preset value to the second mode control unit correspondingly, characterized in that: The switching power supply according to claim 13.

28. The opto-coupling control circuit includes at least a secondary-side first switch tube and a secondary-side second switch tube. The first end of the secondary-side first switch tube is connected to the opto-coupling circuit, the second end of the secondary-side first switch tube is grounded, the control end of the secondary-side first switch tube is connected to the first end of the secondary-side second switch tube, the second end of the secondary-side second switch tube is grounded, and the control end of the secondary-side second switch tube is connected to the second mode unit, characterized in that: The switching power supply according to claim 13.

29. In the secondary-side control circuit of a switching power supply with an opto-coupling circuit coupled between the primary side and the secondary side, A mode signal generation circuit used to detect the power supply demand of the load device of the switching power supply and generate a second mode control signal when the power supply demand of the load device is below a preset value; An opto-coupling control circuit for controlling to turn off the bias current of the opto-coupling circuit based on the second mode control signal; After receiving the second mode control signal, a notification signal is generated and used to notify the primary-side control chip to enter or exit the second mode, so that the output of the switching power supply is controlled by a drive pulse signal in the switching power supply, and the bias currents of the primary side and the secondary side of the switching power supply are reduced, and a notification signal control circuit for reducing the standby power consumption of the switching power supply, characterized in that it includes: The secondary-side control circuit of the switching power supply.

30. The notification signal control circuit is Generate a notification signal indicating that the switching power supply enters the second mode based on the bias current of the optical coupling circuit, and control the secondary control chip based on the notification signal maintaining a first preset time length, and include a third second-mode entry control circuit for entering the second mode. The secondary control circuit of the switching power supply according to claim 29.

31. The notification signal control circuit further When the primary control chip collects that an inversion occurs in the level signal of the voltage signal output by the optical coupling circuit and the holding time length of the inverted level signal reaches a time threshold, it includes a fourth second-mode entry control circuit for controlling the primary control chip to enter the second mode. The time threshold is greater than the maximum value of the duration of the level signal in the first mode, and the duration of the mode control signal indicating that the power supply demand of the load device controlled by the secondary control chip is less than or equal to the preset value is greater than the time threshold. The secondary control circuit of the switching power supply according to claim 29.

32. The notification signal control circuit further When the secondary control chip collects a mode control signal indicating that the power supply demand of the load device is higher than the preset value, output a wake-up signal indicating exiting the second mode at a preset frequency through a transformer, control the secondary control chip to stop the output of the wake-up signal, and include a third secondary second-mode exit control circuit for controlling the secondary control chip to exit the second mode based on the wake-up signal. The secondary control circuit of the switching power supply according to claim 29.

33. The notification signal control circuit further When it is determined that the preset frequency of the wake-up signal is less than a frequency threshold, include a third primary-side second-mode exit control circuit for controlling the primary control chip to exit the second mode. The secondary control circuit of the switching power supply according to claim 32.

34. The notification signal control circuit further When an inversion occurs in the level signal of the voltage signal output by the optical coupling circuit collected by the primary-side control chip, and the holding time length of the inverted level signal reaches a second preset time length, the secondary-side control chip is controlled to stop the output of the wake-up signal, and a fourth primary-side second-mode exit control circuit for controlling the primary-side control chip based on the wake-up signal to exit the second mode is included. The secondary-side control circuit of the switching power supply according to claim 32.

35. The notification signal control circuit further includes a fourth secondary-side second-mode exit control circuit for the secondary-side control chip to exit the second mode based on the control of the notification signal maintaining a third preset time length. The secondary-side control circuit of the switching power supply according to claim 29.

36. In the primary-side control circuit of a switching power supply in which an optical coupling circuit is coupled between the primary side and the secondary side, a drive pulse signal generation circuit coupled to the power switch of the switching power supply and controlling conduction and interruption of the power switch by generating a drive pulse signal; and a primary-side mode control circuit that receives a notification signal, controls the primary-side control chip based on the notification signal, and changes an operation mode. The primary-side control circuit of the switching power supply.

37. The primary-side mode control circuit includes a third second-mode maintenance control circuit for the primary-side control chip to output the drive pulse signal in the primary-side control chip when the primary-side control chip collects an output voltage shortage signal indicating that the output voltage is in a voltage shortage state, and adjusting the output voltage of the switching power supply based on the drive pulse signal to put the switching power supply into the second mode. The switching power supply according to claim 36.

38. The primary-side mode control circuit further includes a second determination circuit for determining whether the output voltage in the secondary-side control chip is smaller than a first preset output voltage, and transmitting the output voltage shortage signal to the primary-side control chip when the output voltage is smaller than the first preset output voltage. The switching power supply according to claim 36.

39. When the primary-side control chip is within a preset resonance time, further comprising a second shielding circuit for blocking detection of the primary-side control chip, characterized in that The switching power supply according to claim 36.

40. The primary-side mode control circuit further When adjusting so that the input voltage of the auxiliary winding on the primary side is within a preset range, including a fourth second-mode maintenance control circuit for outputting the drive pulse signal in the primary-side control chip, based on the relationship between the drive pulse signal, the input voltage, and the output voltage, adjusting the output of the switching power supply to put the switching power supply in the second mode, characterized in that The switching power supply according to claim 36.

41. The primary-side mode control circuit further Including a second adjustment circuit for adjusting the output voltage based on the turns ratio relationship between the input voltage and the output voltage, the turns ratio relationship being the ratio of the number of turns of the secondary winding of the transformer on the secondary side to the number of turns of the auxiliary winding on the primary side, characterized in that The switching power supply according to claim 40.

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