Flexible circuit board, COF module, and electronic device including the same

Abstract

The COF module according to the embodiment includes a base material including a chip mounting area, a circuit pattern disposed on the base material, and a chip disposed on the chip mounting area and connected to the circuit pattern. The circuit pattern includes a first circuit pattern, a second circuit pattern, and a third circuit pattern. The third circuit pattern is disposed inside the chip mounting area. The first terminal portion of the chip is connected to the third circuit pattern, and the first terminal portion and the end portion of the third circuit pattern are spaced apart from each other.

Description

Technical Field

[0001] Embodiments relate to a flexible circuit board, a COF module, and an electronic device including the same. Specifically, the flexible circuit board may be a flexible circuit board for COF.

Background Art

[0002] Recently, various electronic products have been made thinner, smaller, and lighter. Accordingly, various studies have been conducted to mount semiconductor chips at high density in a narrow area of an electronic product.

[0003] COF (Chip On Film) uses a flexible substrate. Accordingly, the COF is applied to a flexible display. That is, the COF method is applied to various wearable electronic devices. In addition, the COF can achieve a fine pitch. Therefore, the COF can be applied to a high-resolution display.

[0004] The COF is formed by mounting a semiconductor chip on a thin film-shaped flexible circuit board. For example, the semiconductor chip may include an integrated circuit (IC) chip or a large scale integrated circuit (LSI) chip.

[0005] On the other hand, the chip is connected to an external printed circuit board and a display panel by a circuit pattern. For example, pad portions are disposed at one end and the other end of the circuit pattern, respectively. Also, one of the pad portions is electrically connected to a terminal of the chip. In addition, the other pad portion is connected to terminals of the printed circuit board and the display panel. Accordingly, the chip, the printed circuit board, and the display panel are electrically connected by the COF. Also, a signal is transmitted to the display panel by the circuit pattern.

[0006] As described above, the COF can be formed by mounting a semiconductor chip on a flexible circuit board. The step of mounting the chip is performed within a set temperature range. As a result, when connecting the chip and the pad portion of the circuit pattern, the base material can contract.

[0007] As a result, the alignment between the chip and the circuit pattern may be misaligned. Also, the electrical characteristics of the COF module may deteriorate.

[0008] To solve the above problems, solder can be disposed at a position considering that the base material contracts before joining the chip and the circuit pattern. Subsequently, the chip and the circuit pattern can be joined. However, the position of the connection region between the chip and the circuit pattern may change due to correction. As a result, the length of the pad portion can increase unnecessarily. Also, the distance between adjacent patterns may decrease.

SUMMARY OF THE INVENTION

PROBLEMS TO BE SOLVED BY THE INVENTION

[0009] An embodiment provides a COF module having improved electrical characteristics while satisfying the alignment between a chip and a circuit pattern.

MEANS FOR SOLVING THE PROBLEMS

[0010] A COF module according to an embodiment includes a base material including a chip mounting region, a circuit pattern disposed on the base material, and a chip disposed on the chip mounting region and connected to the circuit pattern. The circuit pattern includes a first circuit pattern, a second circuit pattern, and a third circuit pattern. The third circuit pattern is disposed inside the chip mounting region. A first terminal portion of the chip is connected to the third circuit pattern, and the first terminal portion and an end portion of the third circuit pattern are disposed apart from each other.

EFFECTS OF THE INVENTION

[0011] The COF module according to the embodiment has improved connection characteristics. Specifically, when connecting the chip and the pad portion of the circuit pattern, the COF module has improved connection characteristics while maintaining alignment.

[0012] That is, the terminal portion of the chip is separated from the end portion of the pad portion of the circuit pattern. Thereby, all the terminal portions of the chip are connected to the pad portion.

[0013] Also, the separation distance between the terminal portion of the chip and the end portion of the pad portion of the circuit pattern satisfies a set range. Thereby, it is possible to prevent the length of the pad portion from becoming long. Therefore, the size of the chip mounting area can be reduced. Also, a sufficient distance can be ensured between adjacent circuit patterns.

[0014] Also, the terminal portion of the chip includes an overlapping region and a non-overlapping region. The overlapping region overlaps the circuit pattern in the width direction of the circuit pattern. Also, the non-overlapping region does not overlap the circuit pattern in the width direction of the circuit pattern.

[0015] The width of the non-overlapping region satisfies a set range. That is, the width of the non-overlapping region has a set range with respect to the width of the pad portion. Also, the width of the non-overlapping region has a set range with respect to the width of the overlapping region. Thereby, the connection characteristics between the terminal portion of the chip and the pad portion are improved.

[0016] Also, the width of the non-overlapping region is smaller than the interval between the pad portions or the interval between the terminal portions. Thereby, it is possible to prevent the interval between the pad portions or the interval between the terminal portions from being reduced by the non-overlapping region. Therefore, it is possible to prevent a short circuit between adjacent pad portions. Or, it is possible to prevent a short circuit between adjacent terminal portions.

Brief Description of the Drawings

[0017]

Figure 1

Figures 2-3

Figure 4

Figure 5

Figures 6-7

Figure 8

Figure 9

Figures 10-12

Modes for Carrying Out the Invention

[0018] Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in detail. However, the technical idea of the present invention is not limited to some of the described embodiments, but is realized in various different forms, and within the scope of the technical idea of the present invention, one or more of the components can be selectively combined and replaced between the embodiments and used.

[0019] Also, the terms (including technical and scientific terms) used in the embodiments of the present invention are, unless otherwise clearly defined and described, construed to have a meaning generally understood by those having ordinary knowledge in the technical field to which the present invention pertains, and terms generally used like those defined in a dictionary can be interpreted considering their meaning in the context of the related art.

[0020] Also, the terms used in the embodiments of the present invention are for the purpose of explaining the embodiments and are not intended to limit the present invention. In this specification, the singular form can also include the plural form unless otherwise specifically stated in the text. When it is described that "at least one (or one or more) of A, B, and C" or "A and (or) B, C", it can include one or more of all combinations that can be combined with A, B, and C.

[0021] In addition, when explaining the components of the embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. can be used. Such terms are merely for distinguishing the components from other components, and the essence, order, or procedure of the components is not determined by such terms.

[0022] And when a component is described as being "connected", "coupled", or "joined" to another component, that component can include not only the case where it is directly connected, coupled, or joined to the other component, but also the case where it is "connected", "coupled", or "joined" by another component or other components intervening between that component and the other component.

[0023] Also, when it is described that something is formed or arranged "above or below" each component, above or below includes not only the case where two components are in direct contact with each other, but also the case where one or more other components are formed or arranged between the two components.

[0024] Also, when expressed as "above or below", it can include not only the upward direction but also the downward direction with respect to one component.

[0025] Hereinafter, a flexible circuit board, a COF module, and an electronic device including the same according to the embodiments will be described with reference to the drawings.

[0026] FIG. 1 is a top view of a COF module including a flexible circuit board according to an embodiment.

[0027] Referring to FIG. 1, the COF module 2000 includes the flexible printed circuit substrate 1000 and the chip CH. Specifically, the flexible printed circuit substrate 1000 includes a chip mounting area CA. The chip CH is disposed in the chip mounting area CA.

[0028] The flexible printed circuit substrate 1000 includes a base material 100 and a circuit pattern 200 disposed on the base material 100.

[0029] The base material 100 can include a flexible substrate. For example, the base material 100 can be a polyimide (PI) substrate. However, the embodiments are not limited thereto. The base material 100 can include polymer materials such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN). Thereby, the flexible circuit board including the base material 100 can be applied to various electronic devices including a curved display device. For example, the flexible circuit board has excellent flexible characteristics. Therefore, the flexible circuit board can be applied to wearable electronic devices.

[0030] The thickness of the base material 100 may be 20 μm to 100 μm. For example, the thickness of the base material 100 may be 25 μm to 50 μm. For example, the thickness of the base material 100 may be 30 μm to 40 μm. When the thickness of the base material 100 exceeds 100 μm, the thickness of the flexible circuit board can increase. Thereby, the flexible characteristics of the flexible circuit board decrease. Also, when the thickness of the base material 100 is less than 20 μm, the strength of the base material may decrease. Thereby, when mounting a chip on the base material, the base material 100 may be damaged by heat and pressure.

[0031] The base material 100 includes an effective area AA and a non-effective area UA. The effective area AA may be the central area of the base material 100. The non-effective area UA may be the edge area of the base material 100. The non-effective area UA can surround the effective area AA.

[0032] The effective area AA includes a chip mounting area CA. Specifically, the chip mounting area CA is an area where a chip CH connected to the circuit pattern is mounted.

[0033] Also, circuit patterns 210, 220, and 230 are arranged on the effective area AA. Specifically, the circuit pattern includes a plurality of circuit patterns. The plurality of circuit patterns extend in a plurality of directions. Also, the plurality of circuit patterns are spaced apart from each other.

[0034] The effective area AA is an area actually used in the flexible circuit board 1000.

[0035] The circuit pattern is not arranged in the non-effective area UA. That is, the effective area AA and the non-effective area UA are distinguished by the presence or absence of the arrangement of the circuit pattern.

[0036] The non-effective area UA includes a plurality of holes. Specifically, the non-effective area UA includes a plurality of sprocket holes H. The flexible circuit board is wound or unwound in a roll-to-roll manner by the sprocket holes.

[0037] The non-effective area UA is an area not actually used in the flexible circuit board 1000. That is, the non-effective area UA is an area to be removed after manufacturing the COF module.

[0038] Specifically, the boundary between the effective area AA and the non-effective area UA is defined as a cut line CL. After cutting the cut line CL of the flexible circuit board 1000, it is processed into a COF module. Thereby, the flexible circuit board 1000 is applied to various electronic devices.

[0039] The circuit pattern includes a wiring portion and a pad portion. Further, a plurality of circuit patterns are arranged in the effective region AA. Specifically, a first circuit pattern 210, a second circuit pattern 220, and a third circuit pattern 230 are arranged in the effective region AA.

[0040] The first circuit pattern 210 and the second circuit pattern 220 are arranged in the inner region and the outer region of the chip mounting region CA. The third circuit pattern 230 is arranged in the inner region of the chip mounting region CA.

[0041] Referring to FIGS. 1 to 3, the first circuit pattern 210 includes a first wiring portion 211, a first pad portion 212a, and a second pad portion 212b. The first pad portion 212a is arranged inside the chip mounting region CA. The second pad portion 212b is arranged outside the chip mounting region CA. The first wiring portion 211 is arranged between the first pad portion 212a and the second pad portion 212b. The first wiring portion 211 is connected to the first pad portion 212a and the second pad portion 212b.

[0042] The first wiring portion 211, the first pad portion 212a, and the second pad portion 212b are integrally formed.

[0043] Further, the first wiring portion 211 extends in a first direction 1D with respect to the chip mounting region CA.

[0044] The first pad portion 212a is electrically connected to a chip arranged in the chip mounting region. Also, the second pad portion 212b is electrically connected to a printed circuit board. Further, the first wiring portion 211 transmits signals between the chip and the printed circuit board.

[0045] A protective layer 300 is disposed on the first circuit pattern 210. Specifically, the protective layer 300 is disposed on the first wiring portion 211. The protective layer 300 is disposed so as to wrap the first wiring portion 211. Also, the protective layer 300 is not disposed on the first pad portion 212a and the second pad portion 212b. Thereby, the first pad portion 212a and the second pad portion 212b are exposed to the outside.

[0046] Referring to FIGS. 1 to 4, the second circuit pattern 220 includes a second wiring portion 221, a third pad portion 222a, and a fourth pad portion 222b. The third pad portion 222a is disposed inside the chip mounting region CA. The fourth pad portion 222b is disposed outside the chip mounting region CA. The second wiring portion 221 is disposed between the third pad portion 222a and the fourth pad portion 222b. Also, the second wiring portion 221 is connected to the third pad portion 222a and the fourth pad portion 222b.

[0047] The second wiring portion 221, the third pad portion 222a, and the fourth pad portion 222b are integrally formed.

[0048] Also, the second wiring portion 221 extends in a second direction D2 with respect to the chip mounting region CA. Specifically, the second direction D2 is opposite to the first direction D1.

[0049] The third pad portion 222a is electrically connected to a chip disposed in the chip mounting region. Also, the fourth pad portion 222b is electrically connected to a display panel. Also, the second wiring portion 221 transmits signals between the chip and the display panel.

[0050] The protective layer 300 is disposed on the second circuit pattern 220. Specifically, the protective layer 300 is disposed on the second wiring portion 221. The protective layer 300 is disposed so as to wrap the second wiring portion 221. Also, the protective layer 300 is not disposed on the third pad portion 222a and the fourth pad portion 222b. As a result, the third pad portion 222a and the fourth pad portion 222b are exposed to the outside.

[0051] The third circuit pattern 230 may include a third wiring portion and a plurality of pad portions. Specifically, the third wiring portion and the plurality of pad portions are disposed inside the chip mounting region CA.

[0052] The third circuit pattern 230 is connected to the chip CH disposed in the chip mounting region CA. Specifically, the plurality of pad portions of the third circuit pattern 230 are electrically connected to the chip CH. Specifically, the third circuit pattern 230 includes a plurality of circuit patterns. Each of the third circuit patterns 230 includes a plurality of pad portions. The pad portions of each third circuit pattern are electrically connected to the chip CH.

[0053] The third circuit pattern 230 may be a routing pattern. That is, the third circuit pattern 230 can function as one of the layers of the chip.

[0054] The third circuit pattern 230 is connected to the chip CA by the plurality of pad portions. As a result, the third circuit pattern 230 can receive and process the signal transmitted from the first circuit pattern 210. The signal transmitted from the third circuit pattern 230 via the chip CH and the second circuit pattern 220 is transmitted to the display panel.

[0055] The first circuit pattern 210 and the second circuit pattern 220 can include a metal material with excellent electrical conductivity. Specifically, the first circuit pattern 210 and the second circuit pattern 220 can include copper (Cu). However, the embodiments are not limited thereto. The first circuit pattern 210 and the second circuit pattern 220 can include at least one metal among copper (Cu), aluminum (Al), chromium (Cr), nickel (Ni), silver (Ag), molybdenum (Mo), gold (Au), titanium (Ti), and alloys thereof.

[0056] Hereinafter, with reference to FIGS. 2 and 3, the layer structure of the circuit pattern of the flexible circuit board according to the embodiment will be described. In FIGS. 2 and 3, the description will be centered on the first circuit pattern 210. However, the embodiments are not limited thereto. The following description of the layer structure is also applicable to the second circuit pattern 220.

[0057] Referring to FIG. 2, the first circuit pattern 210 is formed in multiple layers. Specifically, the first wiring portion 211 and the first pad portion 212a include a first metal layer 201 and a second metal layer 202. Also, although not shown in the drawing, the second pad portion 212b also includes the first metal layer 201 and the second metal layer 202.

[0058] The first metal layer 201 is a seed layer of the first circuit pattern 210. Specifically, the first metal layer 201 is a seed layer formed through electroless plating. The seed layer contains a metal material. For example, the seed layer can include copper.

[0059] Also, the second metal layer 202 is a plating layer. Specifically, the second metal layer 202 is a plating layer formed by electroplating using the first metal layer 201 as a seed layer.

[0060] The thickness of the first metal layer 201 is smaller than the thickness of the second metal layer 202.

[0061] For example, the thickness of the first metal layer 201 may be 0.7 μm to 2 μm. Also, the thickness of the second metal layer 202 may be 10 μm to 25 μm.

[0062] The first metal layer 201 and the second metal layer 202 can contain the same metal substance. For example, the first metal layer 201 and the second metal layer 202 can contain copper (Cu).

[0063] A bonding layer 203 can be disposed on the second metal layer 201. Specifically, the bonding layer 203 is disposed on the side surface of the first metal layer 201, the side surface of the second metal layer 202, and the upper surface of the second metal layer 202. That is, the bonding layer 203 is disposed so as to surround the first metal layer 201 and the second metal layer 202.

[0064] The bonding layer 203 contains a metal. For example, the bonding layer 203 can contain tin (Sn).

[0065] The thickness of the bonding layer 203 may be 0.3 μm to 0.7 μm. The bonding layer 203 can have an increasing tin content while extending from the lower surface to the upper surface direction. The lower surface of the bonding layer 203 is the surface that contacts the second metal layer 202.

[0066] Since the bonding layer 203 is in contact with the second metal layer 202, the bonding layer 203 has an increasing tin content while extending from the lower surface to the upper surface direction, and the copper content is low.

[0067] Thereby, only pure tin can remain in the bonding layer 203 in a thickness range of 0.1 μm to 0.3 μm on the upper surface.

[0068] Due to the bonding layer 203, the terminals of the chip, the terminals of the printed circuit board, and the terminals of the display panel are easily bonded to the first pad portion and the second pad portion. Specifically, the terminals and the pad portions are bonded by heat and pressure. That is, when heat and pressure are applied to the first pad portion and the second pad portion, the upper surface where pure tin remains in the bonding layer melts. Thereby, the terminals and the pad portions are easily bonded.

[0069] Thereby, the bonding layer 203 is not separated from the first pad portion 212a and becomes a part of the first pad portion 212a.

[0070] The thickness of the first circuit pattern 210 may be 2 μm to 25 μm. For example, the thickness of the first circuit pattern 210 may be 5 μm to 20 μm. For example, the thickness of the first circuit pattern 210 may be 7 μm to 15 μm.

[0071] The thickness of the first circuit pattern 210 may be different from the sum of the thicknesses of the first metal layer 201, the second metal layer 202, and the bonding layer 203. Specifically, a flash etching process for separating the circuit pattern is performed during the manufacturing process. Thus, the first metal layer 201 is etched. Thereby, the thickness of the finally manufactured first circuit pattern 210 is smaller than the sum of the thicknesses of the first metal layer 201, the second metal layer 202, and the bonding layer 203.

[0072] When the thicknesses of the first circuit pattern 210 and the second circuit pattern 220 are less than 2 μm, the resistance of the first circuit pattern 210 and the second circuit pattern 220 increases. When the thicknesses of the first circuit pattern 210 and the second circuit pattern 220 exceed 25 μm, it is difficult to form a fine pattern.

[0073] On the other hand, a buffer layer 205 may be further disposed between the base material 100 and the first circuit pattern 210. The buffer layer 205 improves the adhesion between the base material 100 and the first circuit pattern 210, which are different substances.

[0074] The buffer layer 205 may be formed in multiple layers. Specifically, the buffer layer 205 includes a first buffer layer 205a and a second buffer layer 205b on the first buffer layer 205a. Thereby, the first buffer layer 205a contacts the base material 100. Also, the second buffer layer 205b contacts the first circuit pattern 201.

[0075] The first buffer layer 205a can include a material with good adhesion to the base material 100. For example, the first buffer layer 205a can include nickel (Ni). Also, the second buffer layer 205b can include a material with good adhesion to the first circuit pattern 210. For example, the second buffer layer 205b can include chromium (Cr).

[0076] The buffer layer 205 can have a thin film thickness in nanometers. For example, the thickness of the buffer layer 205 may be 20 nm or less.

[0077] The buffer layer 205 improves the adhesion between the base material 100 and the first circuit pattern 210, which are different substances. Therefore, peeling of the first circuit pattern 201 is prevented.

[0078] On the other hand, referring to FIG. 3, the bonding layer 203 can include a first bonding layer 203a and a second bonding layer 203b.

[0079] Specifically, the first bonding layer 203a can be disposed on the first wiring portion 211 and the first pad portion 212a. Also, although not shown in the drawing, the first bonding layer 203a can also be disposed on the second pad portion 212b. That is, the first bonding layer 203a can be disposed on the first circuit pattern 210.

[0080] Further, the second bonding layer 203b can be disposed only on the first pad portion 212a and the second pad portion 212b. That is, the layer structure of the first wiring portion 211 and the layer structures of the first pad portion 212a and the second pad portion 212b are changed by the second bonding layer 203b.

[0081] The first bonding layer 203a and the second bonding layer 203b can contain a metal. Specifically, the first bonding layer 203a and the second bonding layer 203b can contain tin (Sn).

[0082] The first bonding layer 203a and the second bonding layer 203b can have different thicknesses from each other. Specifically, the thickness of the second bonding layer 203b may be greater than the thickness of the first bonding layer 203a.

[0083] For example, the first bonding layer 203a can have a thin film thickness of 0.02 μm to 0.06 μm. Also, the thickness of the second bonding layer 203b may be 0.2 μm to 0.6 μm.

[0084] When the bonding layer is thickly disposed between the protective layer 300 and the first wiring portion 211, cracks may occur when the flexible circuit board is bent. Accordingly, the first bonding layer 231 between the protective layer 300 and the first wiring portion 211 is formed with a thin film thickness. Therefore, it is possible to prevent cracks from occurring when the flexible circuit board is bent.

[0085] Further, the second bonding layer 203b can have an increasing tin content while extending from the lower surface to the upper surface direction. The lower surface is the surface that contacts the first bonding layer 203a.

[0086] The tin content of the second bonding layer 203b increases and the copper content decreases as it extends from the lower surface toward the upper surface. As a result, only pure tin can remain on the upper surface of the second bonding layer 203b in a thickness range of 0.1 μm to 0.3 μm.

[0087] The terminals of the chip, the terminals of the printed circuit board, and the terminals of the display panel are easily bonded to the first pad portion and the second pad portion by the second bonding layer 203b. Specifically, the terminals and the pad portions are bonded by heat and pressure. That is, when heat and pressure are applied to the first pad portion and the second pad portion, the upper surface where pure tin remains in the bonding layer melts. As a result, the terminals and the pad portions are easily bonded.

[0088] As a result, the first bonding layer 203a and the second bonding layer 203b are not separated from the first pad portion 212a and become a part of the first pad portion.

[0089] On the other hand, the protective layer 300 is disposed on the wiring portions of the first circuit pattern 210 and the wiring portions of the second circuit pattern 220. Specifically, the protective layer 300 is disposed so as to surround the first wiring portion 211 and the second wiring portion 221. That is, the protective layer 300 can be disposed on the first circuit pattern 210 and the second circuit pattern 220 excluding the first pad portion, the second pad portion, the third pad portion, and the fourth pad portion.

[0090] The protective layer 300 can contain solder paste. For example, the solder paste can contain a thermosetting resin, a thermoplastic resin, a filler, a curing agent, or a curing accelerator.

[0091] On the other hand, in the foregoing description, it has been described that the first circuit pattern 210 and the second circuit pattern 220 are disposed on the same surface of the base material 100, but the embodiments are not limited thereto.

[0092] Specifically, the first circuit pattern 210 and the second circuit pattern 220 can be disposed on other surfaces of the base material 100. For example, the first circuit pattern 210 can be disposed on one surface of the base material 100, and the second circuit pattern 220 can be disposed on the other surface opposite to one surface of the base material 100.

[0093] Thereby, the display panel is connected to the chip on one surface of the base material 100. Further, the printed circuit board is connected to the chip on the other surface of the base material 100.

[0094] On the other hand, as described above, the chip CH is disposed in the chip mounting region CA. The terminals of the chip CH are electrically connected to the pad portions of the first circuit pattern, the pad portions of the second circuit pattern, and the pad portions of the third circuit pattern disposed in the internal region of the chip mounting region CA.

[0095] At this time, if the alignment between the terminals of the chip and the pad portions of the first circuit pattern, the pad portions of the second circuit pattern, and the pad portions of the third circuit pattern is misaligned, the connection characteristics between the chip and the circuit pattern deteriorate. Further, it is difficult to achieve all the alignments between the terminals of the chip and the pad portions of the first circuit pattern, the pad portions of the second circuit pattern, and the pad portions of the third circuit pattern in terms of process.

[0096] Thereby, hereinafter, the alignment between the terminals and the pad portions that can easily perform the process while satisfying the characteristics of the COF module will be described.

[0097] FIG. 5 is a diagram for explaining the A region in FIG. 1. That is, FIG. 1 is a diagram for explaining the chip mounting region of the flexible printed circuit board.

[0098] Referring to FIG. 5, a first pad portion 212a, a second pad portion 212b, and a third circuit pattern 230 are disposed inside the chip mounting region CA.

[0099] Also, inside the chip mounting area CA, a first terminal portion 410 and a second terminal portion 420 of the chip CH are arranged. The first terminal portion 410 is connected to the pad portion of the third circuit pattern 230. The second terminal portion 420 is connected to the first pad portion 212a and the second pad portion 212b.

[0100] The terminal portion of the chip CH and the pad portion are joined by applying heat of a size set using solder. Since the base material 100 contains a resinous substance, the base material 100 can be shrunk in a third direction 3D and a fourth direction 4D by the heat. Therefore, due to the shrinkage of the base material 100, the alignment between the terminal portion of the chip and the pad portion may be displaced. Accordingly, before joining the terminal portion and the pad portion, it is possible to perform joining after setting a correction value in consideration of the shrinkage of the base material. Thereby, the terminal portion of the chip and the pad portion can be joined while satisfying the alignment within a set range.

[0101] FIG. 6 and FIG. 7 are diagrams for explaining the alignment between the third circuit pattern 230 and the first terminal portion 410.

[0102] Referring to FIG. 6, the first - 1 terminal portion 411 is separated from the first end portion E1 of the third circuit pattern 230. Specifically, the first - 1 terminal portion 411 is separated from the first end portion E1 of the third circuit pattern 230 by a first - 1 width W1 - 1. Here, the first - 1 width W1 - 1 is defined as the maximum separation distance between the first - 1 terminal portion 411 and the first end portion E1 of the third circuit pattern 230.

[0103] The first - 1 width W1 - 1 may be different from the length L1 - 1 of the first - 1 terminal portion 411. Specifically, the first - 1 width W1 - 1 may be smaller than the length L1 - 1 of the first - 1 terminal portion 411.

[0104] For example, the first-first width W1-1 may be 5 μm or more. Specifically, the first-first width W1-1 may be 5 μm to 20 μm. More specifically, the first-first width W1-1 may be 8 μm to 17 μm. Even more specifically, the first-first width W1-1 may be 10 μm to 15 μm.

[0105] Since the first-first terminal portion 411 and the first end portion E1 of the third circuit pattern 230 are arranged separately, it is possible to prevent the first-first terminal portion 411 and the pad portion of the third circuit pattern 230 from overlapping in the longitudinal direction of the third circuit pattern 230. As a result, the first-first terminal portion 411 is stably joined to the pad portion of the third circuit pattern.

[0106] Also, since the separation distance between the first-first terminal portion 411 and the first end portion E1 of the third circuit pattern 230 is smaller than the length L1-1 of the first-first terminal portion 411, it is possible to prevent an increase in the length of the third circuit pattern 230. As a result, the size of the chip mounting area CA can be reduced. Also, inside the chip mounting area CA, the first pad portion, the second pad portion, and the third circuit pattern can be arranged separately with a sufficient interval.

[0107] The first-first terminal portion 411 includes an overlapping region and a non-overlapping region. The overlapping region is defined as a region that overlaps the third circuit pattern in the width direction of the third circuit pattern 230. Also, the non-overlapping region is defined as a region that does not overlap the third circuit pattern in the width direction of the third circuit pattern 230. The non-overlapping region can include two non-overlapping regions.

[0108] The overlapping region is formed with a third-first width W3-1. The third-first width W3-1 can correspond to the width of the third circuit pattern. Also, the non-overlapping region is formed with a fourth-first a width W4-1a and a fourth-first b width W4-1b.

[0109] The width W4-1a of the fourth first width and the width W4-1b of the fourth second width may be smaller than the width W2-1 of the first first terminal portion 411. Also, the width W4-1a of the fourth first width and the width W4-1b of the fourth second width may be smaller than the width W3-1 of the third first width.

[0110] Specifically, the width W4-1a of the fourth first width and the width W4-1b of the fourth second width may be 0.3 times or less, 0.2 times or less, or 0.1 times or less of the width W2-1 of the first first terminal portion 411. When the width W4-1a of the fourth first width and the width W4-1b of the fourth second width exceed 0.3 times the width W2-1 of the first first terminal portion 411, the connection characteristics between the chip and the third circuit pattern may deteriorate due to the area where the first first terminal portion 411 and the pad portion of the third circuit pattern are not adhered.

[0111] Also, the width W4-1a of the fourth first width and the width W4-1b of the fourth second width may be 0.4 times or less, 0.3 times or less, 0.2 times or less, or 0.1 times or less of the width W3-1 of the third first width. When the width W4-1a of the fourth first width and the width W4-1b of the fourth second width exceed 0.4 times the width W3-1 of the third first width, the connection characteristics between the chip and the third circuit pattern may deteriorate due to the area where the first first terminal portion 411 and the pad portion of the third circuit pattern are not adhered.

[0112] For example, the width W2-1 of the first first terminal portion 411 may be 10 μm to 50 μm. Also, the width W3-1 of the third first width may be 5 μm to 25 μm. Also, the width W4-1a of the fourth first width and the width W4-1b of the fourth second width may be 2 μm to 10 μm. Within the above ranges, the width W2-1 of the first first terminal portion 411, the width W3-1 of the third first width, the width W4-1a of the fourth first width, and the width W4-1b of the fourth second width can satisfy the above conditions.

[0113] The fourth-1a width W4-1a and the fourth-1b width W4-1b may be the same, or the fourth-1a width W4-1a and the fourth-1b width W4-1b may be different. Also, the difference between the fourth-1a width W4-1a and the fourth-1b width W4-1b may be 10% or less, 5% or less, or 3% or less.

[0114] When the difference between the fourth-1a width W4-1a and the fourth-1b width W4-1b exceeds 10%, the first terminal portion 410 is disposed offset in one direction on the pad portion of the third circuit pattern. As a result, the overall alignment of the first terminal portion 410 may be shifted.

[0115] Referring to FIG. 7, the first-2 terminal portion 412 is separated from the second end portion E2 of the third circuit pattern 230. Specifically, the first-2 terminal portion 412 is separated from the second end portion E2 of the third circuit pattern 230 by a first-2 width W1-2. Here, the first-2 width W1-2 is defined as the maximum separation distance between the first-2 terminal portion 412 and the second end E2 of the third circuit pattern 230.

[0116] The first-2 width W1-2 may be different from the length L1-2 of the first-2 terminal portion 412. Specifically, the first-2 width W1-2 may be smaller than the length L1-2 of the first-2 terminal portion 412.

[0117] For example, the first-2 width W1-2 may be 5 μm or more. Specifically, the first-2 width W1-2 may be 5 μm to 20 μm. More specifically, the first-2 width W1-2 may be 8 μm to 17 μm. More specifically, the first-2 width W1-2 may be 10 μm to 15 μm.

[0118] Since the first to second terminal portion 412 and the second end portion E2 of the third circuit pattern 230 are arranged separately, it is possible to prevent the first to second terminal portion 412 and the pad portion of the third circuit pattern 230 from being non-overlapped in the longitudinal direction of the third circuit pattern 230. Thereby, the first to second terminal portion 412 is stably joined to the pad portion of the third circuit pattern.

[0119] Further, since the separation distance between the first to second terminal portion 412 and the second end portion E2 of the third circuit pattern 230 is smaller than the length L1-2 of the first to second terminal portion 412, it is possible to prevent an increase in the length of the third circuit pattern 230. Thereby, the size of the chip mounting area CA can be reduced. Also, inside the chip mounting area CA, the first pad portion, the second pad portion, and the third circuit pattern can be arranged separately at sufficient intervals.

[0120] The first to second terminal portion 412 includes an overlapping region and a non-overlapping region. The overlapping region is defined as a region that overlaps the third circuit pattern in the width direction of the third circuit pattern 230. Also, the non-overlapping region is defined as a region that does not overlap the third circuit pattern in the width direction of the third circuit pattern 230. The non-overlapping region can include two non-overlapping regions.

[0121] The overlapping region is formed with a third to second width W3-2. The third to second width W3-2 can correspond to the width of the third circuit pattern. Also, the non-overlapping region is formed with a fourth to second a width W4-2a and a fourth to second b width W4-2b.

[0122] The fourth to second a width W4-2a and the fourth to second b width W4-2b may be smaller than the width W2-2 of the first to second terminal portion 412. Also, the fourth to second a width W4-2a and the fourth to second b width W4-2b may be smaller than the third to second width W3-2.

[0123] Specifically, the width W4-2a of the fourth-2a and the width W4-2b of the fourth-2 may be 0.3 times or less, 0.2 times or less, or 0.1 times or less of the width W2-2 of the first-2 terminal portion 412. When the width W4-2a of the fourth-2a and the width W4-2b of the fourth-2 exceed 0.3 times the width W2-2 of the first-2 terminal portion 412, the connection characteristics between the chip and the third circuit pattern may deteriorate due to the area where the first-2 terminal portion 412 and the pad portion of the third circuit pattern do not adhere.

[0124] Also, the width W4-2a of the fourth-2a and the width W4-2b of the fourth-2 may be 0.4 times or less, 0.3 times or less, 0.2 times or less, or 0.1 times or less of the width W3-2 of the third-2. When the width W4-2a of the fourth-2a and the width W4-2b of the fourth-2 exceed 0.4 times the width W3-2 of the third-2, the connection characteristics between the chip and the third circuit pattern may deteriorate due to the area where the first-2 terminal portion 412 and the pad portion of the third circuit pattern are not adhered.

[0125] For example, the width W22- of the first-2 terminal portion 412 may be 10 μm to 50 μm. Also, the width W3-2 of the third-2 may be 5 μm to 25 μm. Also, the width W4-2a of the fourth-2a and the width W4-2b of the fourth-2 may be 2 μm to 10 μm. Within the above ranges, the width W2-2 of the first-2 terminal portion 412, the width W3-2 of the third-2, the width W4-2a of the fourth-2a, and the width W4-2b of the fourth-2 can satisfy the above conditions.

[0126] The width W4-2a of the fourth-2a and the width W4-2b of the fourth-2 may be the same. Or, the width W4-2a of the fourth-2a and the width W4-2b of the fourth-2 may be different. Also, the difference between the width W4-2a of the fourth-2a and the width W4-2b of the fourth-2 may be 10% or less, 5% or less, or 3% or less.

[0127] When the difference between the width W4-2a of the fourth-2a and the width W4-2b of the fourth-2b exceeds 10%, the first-2 terminal portion 412 is disposed biased in one direction on the pad portion of the third circuit pattern. As a result, the overall alignment of the first-2 terminal portion 412 may be shifted, which may also affect the alignment of other terminal portions.

[0128] The width W1-1 of the first-1 and the width 1-2 of the first-2 may be the same. Alternatively, the width W1-1 of the first-1 and the width 1-2 of the first-2 may be different. Further, the difference between the width W1-1 of the first-1 and the width 1-2 of the first-2 may be 10% or less, 5% or less, or 3% or less.

[0129] When the difference between the width W1-1 of the first-1 and the width 1-2 of the first-2 exceeds 10%, the first terminal portions 411, 412 are disposed biased in one direction on the pad portion of the third circuit pattern. As a result, the overall alignment of the first terminal portions 411, 412 may be shifted, which may also affect the alignment of other terminal portions.

[0130] FIG. 8 is a diagram for explaining the alignment of the first circuit pattern 210 and the second circuit pattern 220 with the second terminal portion 410. In FIG. 8, the description is centered on the first pad portion 212a of the first circuit pattern 210, but the embodiments are not limited thereto. The description of FIG. 8 may be similarly applied to the third pad portion 222a of the second circuit pattern 220.

[0131] Referring to FIG. 8, the second terminal portion 420 is separated from the end E3 of the first pad portion 212a. Specifically, the second terminal portion 420 is separated from the end E3 of the first pad portion 212a by a fifth width W5. Here, the fifth width W5 is defined as the maximum separation distance between the second terminal portion 420 and the end E3 of the first pad portion 212a.

[0132] The fifth width W5 may be different from the length L2 of the second terminal portion 420. Specifically, the fifth width W5 may be smaller than the length L2 of the second terminal portion 420.

[0133] Since the second terminal portion 420 and the third end portion E3 of the first pad portion 212a are arranged to be separated from each other, it is possible to prevent the second terminal portion 420 and the first pad portion 212a from being non-overlapped in the longitudinal direction of the first pad portion 212a. Thereby, the second terminal portion 420 is stably joined to the first pad portion 212a.

[0134] Also, since the separation distance between the second terminal portion 420 and the end portion E3 of the first pad portion 212a is smaller than the length L2 of the second terminal portion 420, it is possible to prevent the length of the first pad portion 212a from increasing. Thereby, the size of the chip mounting area CA can be reduced. Also, inside the chip mounting area CA, the first pad portion, the second pad portion, and the third circuit pattern can be arranged to be separated from each other at a sufficient interval.

[0135] The second terminal portion 420 includes an overlapping region and a non-overlapping region. The overlapping region is defined as a region that overlaps the first pad portion 212a in the width direction of the first pad portion 212a. Also, the non-overlapping region is defined as a region that does not overlap the first pad portion 212a in the width direction of the first pad portion 212a. The non-overlapping region can include two non-overlapping regions.

[0136] The overlapping region is formed with a sixth width W6. The width of the sixth width W6 can correspond to the width of the first pad portion 212a. Also, the non-overlapping region is formed with a seventh width W7.

[0137] The seventh width W7 may be smaller than the sixth width W6.

[0138] Specifically, the seventh width W7 may be 0.2 times or less, or 0.1 times or less, of the sixth width W6. When the seventh width W7 exceeds 0.2 times the sixth width W6, the connection characteristics between the chip and the third circuit pattern may deteriorate due to the area where the second terminal portion 420 and the first pad portion 212a are not adhered. Also, the distance to the adjacent first pad portion 212a may decrease, and a short circuit may occur.

[0139] Also, the seventh width W7 may be different from the interval D1 between the adjacent first pad portions 212a. Specifically, the seventh width W7 may be smaller than the interval D1 between the adjacent first pad portions 212a.

[0140] Also, the seventh width W7 may be different from the interval D2 between the adjacent second terminal portions 420. Specifically, the seventh width W7 may be smaller than the interval D2 between the adjacent second terminal portions 420.

[0141] Since the seventh width W7 is smaller than the interval D1 of the first pad portion 212a and the interval D2 of the second terminal portion 420, the interval D1 of the first pad portion 212a and the interval D2 of the second terminal portion 420 can be sufficiently ensured. Thereby, the interval between the adjacent first pad portions or the adjacent first terminal portions is sufficiently ensured. Therefore, it is possible to prevent a short circuit from occurring during the bonding process between the chip and the pad portion.

[0142] Referring to FIG. 9, the COF module 2000 according to the embodiment includes the flexible circuit board. One end of the COF module 2000 is connected to the display panel 3000. Also, the other end of the COF module 2000 is connected to the printed circuit board 4000.

[0143] The COF module 2000, the display panel 3000, and the printed circuit board 4000 may be directly or indirectly connected.

[0144] As an example, an anisotropic conductive film may be disposed between the COF module 2000 and the printed circuit board 4000. The COF module 2000 and the printed circuit board 4000 may be adhered and electrically connected by the anisotropic conductive film. The anisotropic conductive film may be a resin in which conductive particles are dispersed. Accordingly, an electrical signal connected by the printed circuit board 4000 may be transmitted to the COF module 2000 through the conductive particles contained in the anisotropic conductive film.

[0145] The COF module 1000 includes a flexible substrate. Accordingly, the COF module 1000 can have a rigid form or a bending form between the display panel 3000 and the printed circuit board 4000.

[0146] The COF module 2000 can connect the display panel 3000 and the printed circuit board 4000 disposed opposite to each other in a bent form. Accordingly, the thickness of the electronic device can be reduced. Also, the degree of freedom in design can be improved. Also, the wiring of the COF module 2000 does not break even in a bent form. Accordingly, the reliability of the electronic device including the COF module can be improved.

[0147] Since the COF module is flexible, it can be used in various electronic devices.

[0148] For example, referring to FIG. 10, the COF module may be applied to a flexible touch window that bends. Accordingly, a touch device including this may be a flexible touch device. Accordingly, a user can warp or bend it by hand. Such a flexible touch window can be applied to wearable touch and the like.

[0149] Referring to FIG. 11, the COF module may be included in various wearable touch devices including a curved display. Accordingly, the electronic device including the COF module can be slimmed or lightened.

[0150] Referring to FIG. 12, the COF module can be used in various electronic devices having display portions such as televisions, monitors, and notebooks. At this time, the COF module can also be used in an electronic device having a curved display portion.

[0151] However, the embodiments are not limited thereto. The flexible printed circuit board and the COF module including the same can be used in various electronic devices.

[0152] The features, structures, effects, etc. described in the above-described embodiments are included in at least one embodiment of the present invention and are not necessarily limited to only one embodiment. Further, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified and implemented for other embodiments by those having ordinary knowledge in the field to which the embodiments belong. Therefore, the content related to such combination and modification should be construed as being included in the scope of the present invention.

[0153] Also, although the embodiments have been mainly described above, this is merely an illustration and does not limit the present invention. It will be understood by those having ordinary knowledge in the field to which the present invention belongs that various modifications and applications not exemplified above are possible without departing from the essential characteristics of the present embodiment. For example, each component specifically shown in the embodiment can be implemented with modifications. And the differences related to such modifications and applications should be construed as being included in the scope of the present invention defined by the appended claims.

Claims

1. A base material including a chip mounting area, A circuit pattern disposed on the base material, A chip disposed on the chip mounting area and connected to the circuit pattern, including: The circuit pattern includes: A first circuit pattern, a second circuit pattern, and a third circuit pattern, The third circuit pattern is disposed inside the chip mounting area, A first terminal portion of the chip is connected to the third circuit pattern, A COF module in which the first terminal portion and an end portion of the third circuit pattern are separated from each other.

2. The COF module according to claim 1, wherein a separation distance between the first terminal portion and the end portion of the third circuit pattern is smaller than a length of the first terminal portion.

3. The COF module according to claim 1, wherein a distance between the first terminal portion and the end portion of the third circuit pattern is 5 μm to 20 μm.

4. The first terminal portion includes a superimposed area that overlaps the third circuit pattern in a width direction of the third circuit pattern, and two non-superimposed areas, and a width of each non-superimposed area is smaller than a width of the superimposed area. The COF module according to claim 1.

5. The COF module according to claim 4, wherein a width of each non-superimposed area is 0.3 times or less of a width of the first terminal portion.

6. The COF module according to claim 4, wherein a width of each non-superimposed area is 0.4 times or less of a width of the superimposed area.

7. The COF module according to claim 4, wherein a difference in width between the two non-superimposed areas is 10% or less.

8. The first circuit pattern and the second circuit pattern include a wiring portion and a pad portion, The pad portion is disposed inside the chip mounting area, A second terminal portion of the chip is connected to the pad portion, The COF module according to claim 1, wherein the second terminal portion and an end portion of the pad portion are spaced apart from each other.

9. The COF module according to claim 8, wherein a separation distance between the second terminal portion and the end portion of the pad portion is smaller than a length of the second terminal portion.

10. An electronic device including the COF module according to claim 1, A printed circuit board connected to the first circuit pattern, and A display panel connected to the second circuit pattern.

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