Method for manufacturing metal microstructure and semiconductor device

By employing a doped silicate glass layer with controlled ratios and etching rates to form a widening deposition groove, the method addresses contamination and cost issues in metal lift-off processes, ensuring clean and efficient metal microstructure production in semiconductor devices.

JP2025521952APending Publication Date: 2025-07-10GTA SEMICON CO LTD
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Patent Information

Application Number
JP2025500386
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-06-28
Filing Date
2022-06-30
Publication Date
2025-07-10

AI Technical Summary

Technical Problem

The contamination of metal deposition apparatuses by special materials and the need for dedicated photoresist materials and processes in the metal lift-off process for manufacturing metal layers in semiconductor devices, particularly for metals like copper, gold, and titanium, leads to increased costs and organic contamination issues.

Method used

A method involving the use of a doped silicate glass layer, such as borophosphosilicate or borosilicate glass, with controlled boron/phosphorus ratios and etching rates to form a deposition groove with increasing width, allowing for a metal lift-off process that avoids contamination by removing the photoresist before metal deposition and using the glass layer as a barrier.

Benefits of technology

This method effectively prevents apparatus contamination, reduces costs, and enhances process compatibility with conventional semiconductor processes, while enabling high-temperature metal deposition, improving the manufacturing window and quality of metal microstructures.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention provides a method for manufacturing a new metal microstructure. In this manufacturing method, a doped silicate glass layer is provided, and a deposition groove with a width increasing from top to bottom is formed in the doped silicate glass layer. Then, using the doped silicate glass layer as a barrier layer during metal lift-off, the doped silicate glass layer and the metal layer on the doped silicate glass layer are peeled off together, and the metal microstructure to be left is adhered to the substrate. First, in the present invention, before depositing the metal layer, the photoresist layer is completely removed, so that contamination of the metal layer and the metal layer deposition apparatus by organic materials such as photoresist can be effectively avoided. Second, since the metal lift-off process used in the present invention has good process compatibility with conventional semiconductor processes and apparatuses, there is no need to add a dedicated apparatus, and no organic contamination is brought to the main apparatus. Moreover, in the metal deposition process, since a deposition process at a high temperature (≧150°C) can be used, the manufacturing window of the metal layer can be significantly improved.
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Description

Technical Field

[0001] The present invention belongs to the field of semiconductor integrated circuit design and manufacturing, and particularly relates to metal microstructures and manufacturing methods of semiconductor devices.

Background Art

[0002] In the manufacturing processes of power semiconductors and microelectromechanical systems (MEMS), metal layers are generally used to realize lead or electrode functions. This process is mainly realized by metal deposition, spin coating, photolithography, dry or wet etching processes, etc. However, for some special metals such as copper, gold, titanium, silver, etc., it is difficult to perform wet or dry etching. Therefore, a metal lift-off process is usually used for the manufacturing of these metal layers.

[0003] In the metal lift-off process, when manufacturing a substrate, a dedicated photoresist material is uniformly coated, and exposure, development, and patterning are performed. The shape of the pattern needs to form a "T"-shaped opening. After patterning, metal is deposited on the surface. Then, after the metal deposition is completed, the photoresist is removed with a photoresist stripping solution, so that metal leads or metal electrodes remain in the opening region formed by photolithography.

[0004] In the above metal lift-off process, dedicated photoresist materials, photoresist stripping solutions, and corresponding dedicated devices are required, so the price is slightly increased. Moreover, since the silicon wafer has a photoresist on its surface, organic contamination occurs when it enters the metal deposition device, and problems of metal contact in other devices are caused.

[0005] It should be noted that the above description of the background art is only for the convenience of clearly and concisely explaining the technical means of the present application and for the convenience of those skilled in the art to understand. Just because the above technical means are detailed in the background art part of the present application, it should not be considered that the above technical means are known to those skilled in the art.

Summary of the Invention

Problems to be Solved by the Invention

[0006] In view of the drawbacks of the above-described prior art, an object of the present invention is to provide a method for manufacturing a metal microstructure and a semiconductor device in order to solve the problem of the prior art that a metal deposition apparatus is contaminated by a special material, a dedicated device, and a process to be introduced into a metal lift-off process.

Means for Solving the Problems

[0007] To achieve the above object and other related objects, the present invention provides a method for manufacturing a metal microstructure. The manufacturing method includes providing a substrate, forming a doped silicate glass layer on the substrate, the doped silicate glass layer being a borophosphosilicate glass layer, a borosilicate glass layer, or a phosphosilicate glass layer, the boron / phosphorus mass ratio at the lower part of the borophosphosilicate glass layer being larger than the boron / phosphorus mass ratio at the upper part, the boron mass ratio at the lower part of the borosilicate glass layer being smaller than the boron mass ratio at the upper part, and the phosphorus mass ratio at the lower part of the phosphosilicate glass layer being larger than the phosphorus mass ratio at the upper part in step 1; forming a photoresist layer having a pattern window on the doped silicate glass layer in step 2; performing wet etching on the doped silicate glass layer based on the pattern window to form a deposition groove in the doped silicate glass layer, the width of the lower part of the deposition groove being larger than the width of the upper part of the deposition groove in step 3; removing the photoresist layer in step 4; depositing a metal layer on the substrate in the deposition groove and on the doped silicate glass layer in step 5; and peeling off the doped silicate glass layer and the metal layer on the doped silicate glass layer to obtain a metal microstructure located on the substrate in step 6.

[0008] Optionally, the boron / phosphorus mass ratio of the borosilicate glass layer decreases linearly from the lower part to the upper part of the borosilicate glass layer. The wet etching rate of the borosilicate glass layer increases linearly from the upper part to the lower part of the borosilicate glass layer. Alternatively, the boron mass ratio of the borosilicate glass layer increases linearly from the lower part to the upper part of the borosilicate glass layer. The wet etching rate of the borosilicate glass layer increases linearly from the upper part to the lower part of the borosilicate glass layer. Alternatively, the phosphorus mass ratio of the phosphosilicate glass layer decreases linearly from the lower part to the upper part of the phosphosilicate glass layer. The wet etching rate of the phosphosilicate glass layer increases linearly from the upper part to the lower part of the phosphosilicate glass layer. After the completion of the wet etching, the side wall of the deposition groove gradually inclines in a direction away from the center of the deposition groove from the upper surface to the bottom surface of the doped silicate glass layer.

[0009] Optionally, the inclination angle of the side wall of the deposition groove is 60 to 85 degrees.

[0010] Optionally, the boron / phosophorus mass ratio of the borosilicate glass layer decreases in a stepped manner from the lower part to the upper part of the borosilicate glass layer. The wet etching rate of the borosilicate glass layer increases in a stepped manner from the upper part to the lower part of the borosilicate glass layer. Alternatively, the boron mass ratio of the borosilicate glass layer increases in a stepped manner from the lower part to the upper part of the borosilicate glass layer. The wet etching rate of the borosilicate glass layer increases in a stepped manner from the upper part to the lower part of the borosilicate glass layer. Alternatively, the phosphorus mass ratio of the phosphosilicate glass layer decreases in a stepped manner from the lower part to the upper part of the phosphosilicate glass layer. The wet etching rate of the phosphosilicate glass layer increases in a stepped manner from the upper part to the lower part of the phosphosilicate glass layer. After completion of the wet etching, the side walls of the deposition groove gradually expand in a direction away from the center of the deposition groove from the upper surface to the bottom surface of the doped silicate glass layer.

[0011] Optionally, after completion of the deposition of the metal layer, a gap is provided between the metal film layer and the side walls of the deposition groove.

[0012] Optionally, in step 6), in the wet etching process, the doped silicate glass layer and the metal layer on the doped silicate glass layer are peeled off. The wet etching solution corrodes the doped silicate glass layer from the deposition groove. At the same time, the wet etching solution also corrodes the doped silicate glass layer from the gap.

[0013] Optionally, the wet etching solution used in the wet etching process is a solution containing hydrofluoric acid.

[0014] Optionally, step 1) further includes a step of annealing the doped silicate glass layer. The annealing temperature is 900 to 1100 °C.

[0015] Optionally, the ratio of the thickness of the doped silicate glass layer to the thickness of the metal layer is 20:1 to 4:1. Also, the thickness of the doped silicate glass layer is 5000 to 20000 angstroms, and the thickness of the metal layer is 1000 to 5000 angstroms.

[0016] Optionally, step 4) and step 5) are realized by different processes and apparatuses.

[0017] Optionally, the maximum deposition temperature when depositing the metal layer is 150°C or higher.

[0018] Optionally, the metal layer is formed by an evaporation process or a sputtering process. The metal layer includes a composite layer composed of one or two or more of Cu, Al, Ni, Ti, TiN, TaN, Pt, Au, Ag, and W.

[0019] The present invention further provides a method for manufacturing a semiconductor device. The manufacturing method includes the method for manufacturing a metal microstructure described in any of the above means.

[0020] Optionally, the semiconductor device includes one of a power semiconductor device and a microelectromechanical system.

Advantages of the Invention

[0021] As described above, the method for manufacturing a metal microstructure and a semiconductor device in the present invention has the following beneficial effects. The present invention provides a method for manufacturing a new metal microstructure. In this manufacturing method, a doped silicate glass layer is provided, and a deposition groove with an increasing width from top to bottom is formed in the doped silicate glass layer. Then, using the doped silicate glass layer as a barrier layer during metal lift-off, the doped silicate glass layer and the metal layer on the doped silicate glass layer are peeled off together, and the metal microstructure to be left is adhered to the substrate. First, in the present invention, before depositing the metal layer, the photoresist layer is completely removed, so that contamination of the metal layer and the metal layer deposition apparatus by organic materials such as photoresist can be effectively avoided. Second, the metal lift-off process used in the present invention has good process compatibility with conventional semiconductor processes and apparatuses, so there is no need to add dedicated apparatuses, and the main apparatuses will not be contaminated by organic substances. Moreover, in the metal deposition process, since a deposition process at a high temperature (≥150 °C) can be used, the manufacturing window of the metal layer can be significantly improved.

[0022] The accompanying drawings are provided for a better understanding of the embodiments of the present application. The drawings form a part of the specification and are used to explain the embodiments of the present application and to elaborate in detail the principles of the present application in conjunction with the written description. Needless to say, the drawings mentioned below are only a part of the embodiments of the present application.

Brief Description of the Drawings

[0023]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8a

Figure 8b

Figure 8c

Figure 9

Figure 10

Figure 11

Figure 12a

Figure 12b

Figure 12c

Embodiments for Carrying Out the Invention

[0024] The embodiments of the present invention will be described below with reference to specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Furthermore, the present invention may be implemented or applied in other different specific embodiments. Also, with respect to each detailed matter in this specification, various supplements or modifications may be made on the premise of not departing from the spirit of the present invention based on different perspectives and applications.

[0025] As a point to be emphasized, when the term "comprising / containing" is used in the text, it means the presence of a feature, a whole, a step, or an assembly, but does not exclude the presence or addition of one or more other features, wholes, steps, or assemblies.

[0026] The features described and / or presented in one embodiment may be used in one or more other embodiments in the same or similar manner, and may be combined with the features of other embodiments or replaced with the features of other embodiments.

[0027] When detailing the embodiments of the present invention, for the sake of convenience of explanation, the cross-sectional view showing the structure of the device may be partially enlarged without following the normal ratio. And the schematic diagram is only an illustration and should not limit the protection scope of the present invention. Also, in actual manufacturing, the sizes in the three-dimensional space of length, width, and depth should be included.

[0028] For the sake of convenience of description, here, for example, when describing the relationship between one member or feature shown in the figure and other members or features, terms related to space such as "under", "below", "lower than", "lower surface", "above", "upper" may be used. However, it should be understood that these terms related to space are intended to include other directions other than the directions described in the figure in the device during use or operation. Also, when it is described that there is a layer "between" two layers, this layer may be the only layer existing between the two layers, or one or more layers intervening between them may exist.

[0029] In the context of the present application, the structure in which the first feature described is "above" the second feature may include embodiments in which the first and second features are formed to be in direct contact, or may include embodiments in which another feature is formed between the first and second features. Thus, the first and second features may not be in direct contact.

[0030] It should be noted that the drawings provided in this embodiment only schematically illustrate the basic idea of the present invention. The drawings only show the assemblies related to the present invention and are not described based on the number, shape, and size of the assemblies in actual implementation. The form, number, and ratio of each assembly in actual implementation may be arbitrarily changed, and the layout and form of the assemblies may become more complex.

Example

[0031] As shown in FIGS. 1 to 8c, this embodiment provides a method for manufacturing a metal microstructure. The manufacturing method includes the following steps.

[0032] As shown in FIGS. 1 to 2 and FIG. 8, first, step 1) is performed. In this step, a substrate 101 is provided, and a doped silicate glass layer 102 is formed on the substrate 101. The doped silicate glass layer is a borophosphosilicate glass layer, a borosilicate glass layer, or a phosphosilicate glass layer. The boron / phosphorus mass ratio at the lower part of the borophosphosilicate glass layer is larger than that at the upper part. Also, the boron mass ratio at the lower part of the borosilicate glass layer is smaller than that at the upper part. Also, the phosphorus mass ratio at the lower part of the phosphosilicate glass layer is larger than that at the upper part. Note that the side close to the substrate 101 is the lower part, and the side separated from the substrate 101 is the upper part. The distinction between the thicknesses of the upper and lower parts may be adjusted according to actual needs. For example, the thickness of the upper part may be between 10% and 90% of the thickness of the doped silicate glass layer 102, and correspondingly, the thickness of the lower part may be between 10% and 90% of the thickness of the doped silicate glass layer 102. In a specific example, the thickness of the upper part may be 50% of the thickness of the doped silicate glass layer 102, and correspondingly, the thickness of the lower part may be 50% of the thickness of the doped silicate glass layer 102.

[0033] In one embodiment, the substrate 101 may be a silicon substrate, a germanium substrate, a germanium silicon substrate, a III-V compound substrate (e.g., a gallium nitride substrate, a gallium arsenide substrate, etc.), a silicon carbide substrate, an insulator substrate (e.g., silicon dioxide, silicon nitride, etc.), or an SOI substrate, etc., but is not limited to the examples listed above.

[0034] In one embodiment, the doped silicate glass layer 102 can be formed by chemical vapor deposition technology or the like. The thickness of the doped silicate glass layer 102 is 5000 to 20000 angstroms. And the thickness of the doped silicate glass layer 102 is larger than the thickness of the metal layer 108 to be deposited thereafter. In a specific example, the thickness of the doped silicate glass layer 102 is 10000 angstroms.

[0035] In one embodiment, step 1) further includes a step of annealing the doped silicate glass layer 102. The annealing may be rapid thermal annealing on the surface. Also, the annealing temperature is set to 900 - 1100°C. By the annealing step, it is possible to effectively repair the defects of the doped silicate glass layer 102. Thereby, in the subsequent wet etching process, the final corrosion form of the doped silicate glass layer 102 can be effectively controlled.

[0036] Refer to FIGS. 8a - 8c. As shown in FIG. 8a, the boron / phosphorus mass ratio of the borosilicate glass layer decreases linearly from the lower part to the upper part of the borosilicate glass layer. In one embodiment, the boron / phosphorus mass ratio of the borosilicate glass layer is between 3 - 10%. For example, the value of the boron / phosphorus ratio at the bottom is 10%, and the value of the boron / phosphorus ratio at the upper part is 3%. Also, the wet etching rate of the borosilicate glass layer increases linearly from the upper part to the lower part of the borosilicate glass layer. Alternatively, as shown in FIG. 8c, the boron mass ratio of the borosilicate glass layer increases linearly from the lower part to the upper part of the borosilicate glass layer. For example, the mass ratio of boron changes linearly between 10 - 2%. Also, the wet etching rate of the borosilicate glass layer increases linearly from the upper part to the lower part of the borosilicate glass layer. Alternatively, as shown in FIG. 8b, the phosphorus mass ratio of the phosphosilicate glass layer decreases linearly from the lower part to the upper part of the phosphosilicate glass layer. For example, the mass ratio of phosphorus changes linearly between 2 - 10%. Also, the wet etching rate of the phosphosilicate glass layer increases linearly from the upper part to the lower part of the phosphosilicate glass layer. Thereby, after the completion of wet etching, the side wall 106 of the deposition groove 105 gradually inclines in a direction away from the center of the deposition groove 105 from the upper surface to the bottom surface of the doped silicate glass layer 102.

[0037] As shown in FIG. 3, subsequently, step 2) is performed. In this step, a photoresist layer 103 having a pattern window 104 is formed on the doped silicate glass layer 102.

[0038] In one embodiment, after forming the photoresist layer 103 on the doped silicate glass layer 102 in a spin coating process, a photoresist layer 103 having a pattern window 104 may be formed in an exposure, development, and baking process. The pattern window 104 may be set based on the layout of the metal microstructure 107 described later, and may be, for example, a matrix layout, a grid layout, or other irregular layouts.

[0039] As shown in FIG. 4, subsequently, step 3) is performed. In this step, based on the pattern window 104, wet etching is performed on the doped silicate glass layer 102 to form deposition grooves 105 in the doped silicate glass layer 102. The width of the lower part of the deposition groove 105 is larger than the width of the upper part of the deposition groove 105.

[0040] In one embodiment, the boron / phosophorus mass ratio of the borosilicate glass layer linearly decreases from the lower part to the upper part of the borosilicate glass layer. Also, the wet etching rate of the borosilicate glass layer linearly increases from the upper part to the lower part of the borosilicate glass layer. As a result, after the completion of the wet etching, the side wall 106 of the deposition groove 105 gradually inclines in a direction away from the center of the deposition groove 105 from the upper surface to the bottom surface of the borosilicate glass layer. The inclination angle of the side wall 106 of the deposition groove 105 may be 60 to 85 degrees, for example, 75 degrees. In a specific example, the cross-sectional shape of the deposition groove 105 may be, for example, a frustum of a pyramid. In this embodiment, by making the width of the lower part of the deposition groove 105 larger than the width of the upper part of the deposition groove 105, in the deposition of the metal layer 108 described later, basically the upper part of the deposition groove 105 is used as a deposition window. Therefore, when the metal layer 108 is deposited on the surface of the substrate 101, a gap exists between the entire circumference of the metal microstructure 107 and the side wall 106 of the deposition groove 105. Thereby, a situation where contact, adhesion, etc. occur between the metal microstructure 107 and the doped silicate glass layer 102, resulting in destabilization or damage to the form of the metal microstructure 107 can be effectively avoided, so that the quality of the metal microstructure 107 can be effectively improved.

[0041] In one embodiment, the wet etching solution used in the wet etching process is a hydrofluoric acid-containing solution. The hydrofluoric acid-containing solution may be, for example, a BOE solution or a diluted hydrofluoric acid solution, etc.

[0042] As shown in FIG. 5, thereafter, step 4) is performed. In this step, the photoresist layer 103 is removed.

[0043] In one embodiment, first, after the photoresist layer 103 is initially removed in the thermal oxidation process, the remaining photoresist layer 103 may be removed by a wet process. Thereby, a doped silicate glass layer 102 with a clean surface and a deposition groove 105 exposing the surface of the substrate 101 can be obtained, which is advantageous for the deposition of the metal layer 108 described later.

[0044] As shown in FIG. 6, subsequently, step 5) is performed. In this step, a metal layer 108 is deposited on the substrate 101 in the deposition groove 105 and on the doped silicate glass layer 102.

[0045] In one embodiment, the removal of the photoresist layer 103 in step 4) and the deposition of the metal layer 108 in step 5) are realized by different processes and apparatuses. For example, the removal of the photoresist layer 103 can be realized by a photoresist removal apparatus, and the deposition of the metal layer 108 can be realized by a corresponding physical vapor deposition apparatus. In the present invention, since the photoresist layer 103 is completely removed before the metal layer 108 is deposited, it is possible to effectively avoid the contamination of the metal layer 108 and the metal layer 108 deposition apparatus by organic materials such as photoresist. In addition, since there is no need to introduce a specific organic material or add a dedicated apparatus, the stability of the process can be improved while effectively saving the cost of the manufacturing apparatus.

[0046] In one embodiment, the ratio of the thickness of the doped silicate glass layer 102 to the thickness of the metal layer 108 is 20:1 to 4:1. Also, the thickness of the doped silicate glass layer 102 is 5000 to 20000 angstroms, and the thickness of the metal layer 108 is 1000 to 5000 angstroms.

[0047] In one embodiment, the maximum deposition temperature when depositing the metal layer 108 is 150 °C or higher. Also, since the metal lift-off process used in the present invention has good process compatibility with conventional semiconductor processes and apparatuses, there is no need to add a dedicated apparatus, and there is no organic contamination to the main apparatus. Moreover, in the metal deposition process, since a deposition process at a high temperature (≥150 °C) can be used, the manufacturing window of the metal layer 108 can be significantly improved.

[0048] In one embodiment, the metal layer 108 is formed in an evaporation process or a sputtering process. The metal layer 108 includes one of Cu, Al, Ni, Ti, TiN, TaN, Pt, Au, Ag, and W, or a composite layer composed of two or more thereof. This embodiment is particularly suitable for manufacturing metal microstructures 107 such as copper, gold, titanium, and silver that are difficult to pattern in a photolithography-etching process.

[0049] As shown in FIG. 7, finally, step 6) is performed. By peeling the doped silicate glass layer 102 and the metal layer 108 on the doped silicate glass layer 102, the metal microstructure 107 located on the substrate 101 is obtained.

[0050] In one embodiment, in a wet etching process, the doped silicate glass layer 102 and the metal layer 108 on the doped silicate glass layer 102 are peeled off. The wet etching solution corrodes the doped silicate glass layer 102 from the deposition groove 105. Also, at the same time, since the wet etching solution also corrodes the doped silicate glass layer 102 from the gap, the efficiency of the wet etching process is improved.

[0051] This embodiment further provides a method for manufacturing a semiconductor device. The manufacturing method includes the method for manufacturing the metal microstructure 107 described in the above embodiment.

[0052] In one embodiment, the semiconductor device includes one of a power semiconductor device and a microelectromechanical system. Of course, in other embodiments, the semiconductor device may be other devices and is not limited to the examples listed here. Also, the method for manufacturing the metal microstructure 107 is not limited to the manufacture of a single semiconductor device, and can also be used for the manufacture of a circuit structure integrating a plurality of devices, a metal connection structure of a plurality of devices, and the like.

Embodiment

[0053] As shown in FIGS. 1 to 3 and FIGS. 9 to 12, this embodiment provides a method for manufacturing a metal microstructure. The basic steps of this method are the same as those of Embodiment 1, but it is different from Embodiment 1 in the following aspects. That is, as shown in FIG. 12a, the boron / phosphorus mass ratio of the borosilicate glass layer decreases so as to form a step from the lower part to the upper part of the borosilicate glass layer. For example, the boron / phosphorus mass ratio of the bottom step is 10%, and the boron / phosphorus mass ratio of the upper step is 3%. Also, the wet etching rate of the borosilicate glass layer increases so as to form a step 206 from the upper part to the lower part of the borosilicate glass layer. Alternatively, as shown in FIG. 12c, the boron mass ratio of the borosilicate glass layer increases so as to form a step from the lower part to the upper part of the borosilicate glass layer. For example, the boron mass ratio of the bottom step is 3%, and the boron mass ratio of the upper step is 10%. Also, the wet etching rate of the borosilicate glass layer increases so as to form a step from the upper part to the lower part of the borosilicate glass layer. Alternatively, as shown in FIG. 12b, the phosphorus mass ratio of the phosphosilicate glass layer decreases so as to form a step from the lower part to the upper part of the phosphosilicate glass layer. For example, the phosphorus mass ratio of the bottom step is 10%, and the phosphorus mass ratio of the upper step is 3%. Also, the wet etching rate of the phosphosilicate glass layer increases so as to form a step from the upper part to the lower part of the phosphosilicate glass layer. Thereby, as shown in FIGS. 9 to 10, after the completion of wet etching, the side walls of the deposition groove 105 gradually expand in a direction away from the center of the deposition groove 105 from the upper surface to the bottom surface of the doped silicate glass layer. In this embodiment, since the width of the gap between the metal microstructure 107 and the side wall of the deposition groove 105 can be further guaranteed, the stability of the process is further improved.

[0054] As described above, the method for manufacturing a metal microstructure and a semiconductor device according to the present invention has the following beneficial effects.

[0055] The present invention provides a method for manufacturing a new metal microstructure 107. In this manufacturing method, a doped silicate glass layer 102 is provided, and a deposition groove 105 whose width increases from top to bottom is formed in the doped silicate glass layer 102. Then, using the doped silicate glass layer 102 as a barrier layer during metal lift-off, the doped silicate glass layer 102 and the metal layer 108 on the doped silicate glass layer 102 are peeled off together, and the metal microstructure 107 to be left is adhered onto the substrate 101. First, in the present invention, since the photoresist layer 103 is completely removed before depositing the metal layer 108, it is possible to effectively avoid the contamination of the metal layer 108 and the metal layer 108 deposition apparatus by organic materials such as photoresist. Second, the metal lift-off process used in the present invention has good process compatibility with conventional semiconductor processes and apparatuses, so there is no need to add dedicated apparatuses, and the main apparatuses will not be contaminated by organic substances. Moreover, during the metal deposition process, since a deposition process at a high temperature (≥150°C) can be used, the manufacturing window of the metal layer 108 can be significantly improved.

[0056] Therefore, the present invention effectively eliminates various drawbacks in the prior art and has high industrial utility value.

[0057] The above embodiments are only illustrative explanations of the principles and effects of the present invention and do not limit the present invention. Those skilled in the art can supplement or modify the above embodiments on the premise of not departing from the spirit and scope of the present invention. Therefore, any equivalent supplements or modifications completed by those skilled in the art without departing from the spirit and technical idea disclosed in the present invention are still included in the scope of the claims of the present invention.

Explanation of Reference Numerals

[0058] 101 Substrate 102 Doped silicate glass layer 103 Photoresist layer 104 Pattern window 105 Deposition groove 106 Side wall 107 Metal microstructure 108 Metal layer 206 Step difference

Claims

1. A method for manufacturing a metal microstructure, comprising: providing a substrate, forming a doped silicate glass layer on the substrate, the doped silicate glass layer being a borophosphosilicate glass layer, a borosilicate glass layer, or a phosphosilicate glass layer, the boron / phosphorus mass ratio at the lower part of the borophosphosilicate glass layer being greater than the boron / phosphorus mass ratio at the upper part, the boron mass ratio at the lower part of the borosilicate glass layer being smaller than the boron mass ratio at the upper part, and the phosphorus mass ratio at the lower part of the phosphosilicate glass layer being greater than the phosphorus mass ratio at the upper part (step 1); forming a photoresist layer having a pattern window on the doped silicate glass layer (step 2); performing wet etching on the doped silicate glass layer based on the pattern window to form deposition grooves in the doped silicate glass layer, the width of the lower part of the deposition grooves being greater than the width of the upper part of the deposition grooves (step 3); removing the photoresist layer (step 4); depositing a metal layer on the substrate within the deposition grooves and on the doped silicate glass layer (step 5); peeling off the doped silicate glass layer and the metal layer on the doped silicate glass layer to obtain a metal microstructure located on the substrate (step 6); A method for manufacturing a metal microstructure, characterized by including the above steps.

2. The boron / phosphorus mass ratio of the borosilicate glass layer decreases linearly from the lower part to the upper part of the borosilicate glass layer, and the wet etching rate of the borosilicate glass layer increases linearly from the upper part to the lower part of the borosilicate glass layer, or the boron mass ratio of the borosilicate glass layer increases linearly from the lower part to the upper part of the borosilicate glass layer, and the wet etching rate of the borosilicate glass layer increases linearly from the upper part to the lower part of the borosilicate glass layer, or the boron / phosphorus mass ratio of the silicate glass layer decreases linearly from the lower part to the upper part of the silicate glass layer, and the wet etching rate of the silicate glass layer increases linearly from the upper part to the lower part of the silicate glass layer. After the completion of wet etching, the side wall of the deposition groove gradually inclines in a direction away from the center of the deposition groove from the upper surface to the bottom surface of the borosilicate glass layer. The method for manufacturing a metal microstructure according to claim 1, characterized in that.

3. The method for manufacturing a metal microstructure according to claim 2, characterized in that the inclination angle of the side wall of the deposition groove is 60 to 85 degrees.

4. The boron / phosphorus mass ratio of the borosilicate glass layer decreases in a stepped manner from the lower part to the upper part of the borosilicate glass layer, and the wet etching rate of the borosilicate glass layer increases in a stepped manner from the upper part to the lower part of the borosilicate glass layer. Or, the boron / phosphorus mass ratio of the borosilicate glass layer increases in a stepped manner from the lower part to the upper part of the borosilicate glass layer, and the wet etching rate of the borosilicate glass layer increases in a stepped manner from the upper part to the lower part of the borosilicate glass layer. Or, the phosphorus mass ratio of the silicate glass layer decreases in a stepped manner from the lower part to the upper part of the silicate glass layer, and the wet etching rate of the silicate glass layer increases in a stepped manner from the upper part to the lower part of the silicate glass layer. After the completion of the wet etching, the side wall of the deposition groove gradually expands in a direction away from the center of the deposition groove from the upper surface to the bottom surface of the doped silicate glass layer. The method for manufacturing a metal microstructure according to claim 1, characterized in that.

5. After the completion of the deposition of the metal layer, a gap is provided between the metal film layer and the side wall of the deposition groove. The method for manufacturing a metal microstructure according to claim 1, characterized in that.

6. In step 6), in the wet etching process, the doped silicate glass layer and the metal layer on the doped silicate glass layer are peeled off. The wet etching solution corrodes the doped silicate glass layer from the deposition groove, and at the same time, the wet etching solution also corrodes the doped silicate glass layer from the gap. The method for manufacturing a metal microstructure according to claim 5, characterized in that.

7. The wet etching solution used in the wet etching process is a solution containing hydrofluoric acid. The method for manufacturing a metal microstructure according to claim 1, characterized in that.

8. Step 1) further includes a step of annealing the doped silicate glass layer, and the annealing temperature is 900 to 1100 °C. The method for manufacturing a metal microstructure according to claim 1, characterized in that.

9. The ratio of the thickness of the doped silicate glass layer to the thickness of the metal layer is 20:1 to 4:1, the thickness of the doped silicate glass layer is 5000 to 20000 angstroms, and the thickness of the metal layer is 1000 to 5000 angstroms. The method for manufacturing a metal microstructure according to claim 1, characterized in that.

10. The method for manufacturing a metal microstructure according to claim 1, characterized in that steps 4) and 5) are realized by different processes and apparatuses.

11. The method for manufacturing a metal microstructure according to claim 1, characterized in that the maximum deposition temperature when depositing the metal layer is 150 ° C or higher.

12. The metal layer is formed by an evaporation process or a sputtering process, and the metal layer includes a composite layer composed of one or two or more of Cu, Al, Ni, Ti, TiN, TaN, Pt, Au, Ag, and W. The method for manufacturing a metal microstructure according to claim 1, characterized in that.

13. A method for manufacturing a semiconductor device, A manufacturing method characterized by including the method for manufacturing a metal microstructure according to any one of claims 1 to 12.

14. The method for manufacturing a semiconductor device according to claim 13, characterized in that the semiconductor device includes one of a power semiconductor device and a microelectromechanical system.

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