Integrated High Aspect Ratio Etching

Abstract

A method is provided herein for etching features into a carbon material using a doped tungsten-containing mask, such as a boron-doped tungsten material, to reduce and eliminate the redeposition of silicon-containing residues. The method involves depositing a doped tungsten-containing material on the carbon material prior to etching the carbon material, patterning the doped tungsten-containing material to form a doped tungsten-containing mask, and etching the carbon material using the patterned doped tungsten-containing mask such that the use of a silicon-containing mask during the etching of the carbon material is eliminated.

Description

Background Art

[0001] [Incorporation by Reference] As part of this application, a PCT application form is filed simultaneously with this specification. Each application for which this application claims benefit or priority, as identified in the PCT application form filed simultaneously, is hereby incorporated by reference in its entirety and for all purposes into this specification.

[0002] Semiconductor fabrication processes often involve etching a carbon-containing material using a mask. However, as devices are scaled down and technology advances, it is difficult to etch a carbon-containing material using an existing hard mask without affecting the profile of the pattern to be etched in the carbon-containing material.

[0003] The description of the background art provided herein is intended to present the context of the present disclosure in general. The research of the inventors, as currently named, is not to be regarded as prior art to the present disclosure, either explicitly or implicitly, to the extent that such description is within the scope of their research described in this background art section and may not be regarded as separate from the prior art at the time of filing.

Summary of the Invention

[0004] One aspect involves providing a substrate including an amorphous carbon layer to be etched, the amorphous carbon layer having a thickness of at least about 100 nm, forming a patterned doped tungsten-containing mask on the amorphous carbon layer, and etching the amorphous carbon layer using the patterned doped tungsten-containing mask to form a patterned carbon-containing layer.

[0005] In various embodiments, the patterned doped tungsten-containing mask contains a metal dopant such as one of boron, titanium, tungsten, tantalum, tin, aluminum, and combinations thereof. In some embodiments, the metal dopant contains boron or is boron.

[0006] In various embodiments, the amorphous carbon layer does not contain a dopant.

[0007] In various embodiments, the amorphous carbon layer contains less than about 10% impurities.

[0008] In various embodiments, the method also includes depositing a direct adhesion layer on the amorphous carbon layer prior to forming the patterned doped tungsten-containing mask. In some embodiments, the adhesion layer contains tungsten and nitrogen.

[0009] In various embodiments, the patterned doped tungsten-containing mask does not contain silicon.

[0010] In various embodiments, forming the patterned doped tungsten-containing mask includes depositing a doped tungsten-containing material and etching the doped tungsten-containing material using a photoresist mask to form the patterned doped tungsten-containing mask.

[0011] In various embodiments, the metal dopant concentration in the patterned doped tungsten-containing layer is from about 20% to about 60%.

[0012] In various embodiments, when etching the amorphous carbon layer, the etching rate of the amorphous carbon layer is at least about 3 times faster than the etching rate of the patterned doped tungsten-containing layer.

[0013] In various embodiments, the ratio of the thickness of the patterned doped tungsten-containing mask to the thickness of the amorphous carbon layer is from about 1:5 to about 1:30. In some embodiments, etching the patterned doped tungsten-containing mask is performed using a bias. For example, in some embodiments, the bias power is at least about 1000 V.

[0014] In various embodiments, the ellipticity of the features formed in the amorphous carbon layer after etching the amorphous carbon layer is from about 1 to about 1.1.

[0015] In various embodiments, etching the amorphous carbon layer is performed using one or more gases that form volatile by-products with the patterned doped tungsten-containing mask and the amorphous carbon layer without redepositing material on the substrate surface.

[0016] In various embodiments, the patterned doped tungsten-containing mask is etched to form features having critical dimensions from about 50 nm to about 500 nm.

[0017] In various embodiments, the patterned doped tungsten-containing mask is doped with boron and etching the amorphous carbon layer is performed in a silicon-free environment.

[0018] These and other aspects are further described below with reference to the drawings.

Brief Description of the Drawings

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DETAILED DESCRIPTION

[0026] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail in order not to obscure the disclosed embodiments needlessly. The disclosed embodiments are described with respect to specific embodiments, but it is to be understood that the disclosed embodiments are not limited thereto.

[0027] Semiconductor fabrication processes involve the fabrication of memory and logic devices. Examples include 3D NAND and dynamic random access memory (DRAM) applications, as well as logic applications for mid-end-of-line (MEOL) and back-end-of-line (BEOL) processes. The fabrication of memory and logic devices often involves etching features such as contact holes on a substrate, which may include one material or multiple layers of materials, some of which may be semiconductor materials. A "feature" such as a via or contact hole can be characterized by one or more of a narrow and / or re-entrant opening, a constriction within the feature, and a high aspect ratio. The term "feature" as described herein refers to negative features such as holes or vias. Etching a feature often involves depositing and patterning a hard mask on the material to be etched and using the patterned hard mask as a pattern to etch the material. The patterned hard mask may ultimately be removed from the substrate.

[0028] Some fabrication methods of semiconductor devices involve etching an amorphous carbon material using a hard mask. As the devices are scaled down, some of the amorphous carbon materials etched using the hard mask become extremely thick, such as having a thickness of at least 0.1 μm, at least 0.5 μm, at least 1 μm, or at least about 2 μm, or at least about 3 μm, or at least about 4 μm, or more than 4 μm. For some applications having many NAND layers in 3D-NAND fabrication, such as at least 90 NAND layers or more, transferring a pattern to a thick layer of amorphous carbon can be difficult. Further, since the amorphous carbon materials are extremely thick, the features formed therein can have a high aspect ratio, such as at least about 25:1, or at least about 30:1, or at least about 40:1, or at least about 50:1. Other issues include maintaining etching selectivity, maintaining the etching profile (such as warping problems and critical dimension problems, which can also cause problems at the bottom of the stack), local critical dimension uniformity (LCDU), ellipticity (the major diameter of the hole divided by the minor diameter), and other problems. Due to these issues, it can be more difficult to control such properties during etching of various substrates. Such problems can lead to electrical failures at the memory string level, which is related to device performance.

[0029] When the stack is thicker, mask selectivity is a particular challenge. For example, etching memory holes, slits, contact holes, and other features can become more difficult. For example, in an ONON (oxide-nitride-oxide-nitride) stack or an OPOP (oxide-polysilicon-oxide-polysilicon) stack of at least 6 μm, the amorphous carbon layer can have a thickness of more than about 3 μm. To etch such a thick layer, the hard mask must also be thick. For example, the hard mask on the amorphous carbon layer can be at least about 250 nm thick. The thicknesses of both the hard mask and the amorphous carbon layer result in extremely high aspect ratio features to be etched, and as described below, re-deposition of the sputtered mask material and the silicon-containing material can cause clogging at the top of the features.

[0030] In some methods, a silicon-containing hard mask is used as a mask when etching amorphous carbon. For example, a hard mask of silicon oxynitride, silicon nitride, silicon, or silicon oxide can be used. An example is provided in FIG. 1A, which shows a substrate 101 having an amorphous carbon layer 103, a silicon oxynitride hard mask 105, and a patterned photoresist 107. FIG. 1A shows only, but not limited to, an amorphous carbon layer 103, a silicon oxynitride hard mask 105, and a patterned photoresist 107, and it should be understood that various other layers such as an anti-reflection coating, a spin-on film, and other barrier layers, adhesion layers, and / or intermediate layers can also be present on the substrate.

[0031] In various embodiments, the patterned photoresist 107 is formed by depositing a photoresist material such as a carbon-containing material and developing the photoresist material using photolithography techniques.

[0032] In FIG. 1B, the silicon oxynitride hard mask 105 is etched using the pattern of the patterned photoresist 107 to form a patterned silicon oxynitride hard mask 115. In FIG. 1C, the amorphous carbon layer 103 is etched using the pattern of the patterned silicon oxynitride hard mask 115. However, since the amorphous carbon layer 103 is exposed to the etchant for a long duration using etching chemistry, which can form non-volatile by-products with silicon, non-volatile etching residues 125 (such as silicon oxide residues) and silicon etching by-products can be redeposited on top of the features or near the openings of the features in the patterned silicon oxynitride hard mask 115, which reduces the critical dimension of the features between the etched amorphous carbon 113 and affects the critical dimension of the features. The redeposition can result in an increase in thickness of up to 20 nm on the sidewalls of the features, which in various embodiments can be thick enough to close the entire feature opening. This can occur while some thickness of the silicon oxynitride hard mask 115 remains on the substrate, and that thickness can be slightly reduced by some etching of the silicon oxynitride hard mask 115 by the etchant. This results in critical dimension variations of features across the wafer.

[0033] As shown, the presence of silicon in the hard mask during etching of the amorphous carbon material can cause degradation that results in an increase in local critical dimension variations. Some of these methods can result in mask faceting, feature ellipticity, linewidth roughness, spacewidth roughness, and feature twist.

[0034] The ellipticity of a feature is measured by dividing the major axis by the minor axis. A perfectly circular feature would have an ellipticity of 1. Redeposition of silicon-containing material on top of the feature can sometimes cause the ellipticity of the feature to be about 1.16 or greater. However, using some of the disclosed embodiments described herein, the ellipticity of the feature can be between about 1 and about 1.3.

[0035] Variations in the critical dimensions in a certain direction can cause twisting of the features, which can ultimately result in short circuits or etching problems later. For example, due to undesirably high critical dimension variations, after opening the mask, the ONON gate edge may not be opened, thereby causing problems related to the device.

[0036] In some methods, etching using a silicon-containing hard mask results in the redeposition of non-volatile silicon or silicon-containing etching residues, such as silicon oxide residues, at or near the feature opening, thereby degrading the profile of the feature to be etched and causing defects on the substrate. In some embodiments, the silicon oxide residue accumulation can become large enough to completely close the feature and render the substrate useless. Such processes can result in reduced or limited device performance, or yield loss of the device.

[0037] Methods and apparatuses for etching an amorphous carbon material while maintaining etching selectivity, ellipticity, critical dimension uniformity, and feature profile are provided herein. Some of the disclosed embodiments involve using a doped tungsten-containing hard mask instead of a silicon-containing hard mask on the amorphous carbon layer, and the doped tungsten-containing hard mask provides robust properties to ensure that the etching of the amorphous carbon layer is performed without redeposition at or near the feature opening and does not contain silicon.

[0038] Without being bound by a particular theory, the presence of dopants in the tungsten-containing layer is thought to help facilitate etching selectivity. When a silicon-containing hard mask is used, silicon accumulates on the sidewalls of the features and redeposits on about 30% to about 50% of the sidewall surface. When an elemental boron hard mask is used, less than about 1% of boron accumulates on the sidewall surface. However, boron has a smaller atomic number, is lightweight, and it can cause sputtering and result in a high sputtering yield. As a result, during the etching of an amorphous carbon material, boron loss is high, and the thickness of the elemental boron hard mask becomes much thicker to correspond to the etching duration for sufficiently etching a very thick amorphous carbon material. Metal-containing hard masks have the advantage of achieving high selectivity, and some can form polymers on the sidewalls, but incorporating dopants can help reduce polymerization, thereby combining the synergistic effects of both reducing redeposition onto the sidewalls of the features and having robust etching selectivity.

[0039] Doped tungsten-containing hard masks have a higher atomic number, a higher film density, and a higher coefficient than silicon in the case of tungsten. The higher atomic number can improve the etching selectivity with respect to the carbon material compared to a silicon-containing hard mask. Metal dopants enable the metal film to reduce its crystal structure, improve etching selectivity, and reduce clogging. Doped tungsten-containing hard masks can be deposited by thermal chemical vapor deposition (CVD) or thermal atomic layer deposition (ALD) or other similar techniques. The film stress of the doped tungsten-containing hard mask can be adjusted by adjusting one or more process conditions during deposition, including but not limited to gas flow, pressure, and deposition temperature. Adjusting the stress minimizes the impact of the pattern shape on etching (such as reducing line curvature), minimizes changes in the shape of the feature holes during etching, and results in better pattern transfer.

[0040] Some of the disclosed embodiments are suitable for patterning schemes including, but not limited to, self-aligned double patterning schemes and self-aligned quadruple patterning schemes. In various embodiments, the presence of tungsten in the mask can help reduce the formation of facets in the patterned mask and when patterning the underlying carbon material.

[0041] FIG. 2 is a process flow diagram showing an exemplary method for implementing operations in accordance with some of the disclosed embodiments. In operation 201, a substrate having a carbon material is provided. The substrate can be a silicon wafer, such as a 200 mm wafer, a 300 mm wafer, or a 450 mm wafer, including a wafer having one or more layers of material, such as a dielectric material, a conductive material, or a semiconductor material, deposited thereon. In various embodiments, the substrate is patterned. The patterned substrate can have "features" such as pillars, poles, trenches, vias, or contact holes, which can be characterized by one or more of narrow and / or reentrant openings, constrictions within the features, and high aspect ratios. The (one or more) features can be formed in one or more of the layers described above. In some embodiments, the features can be formed on one or more of the topmost layers of the substrate, such that the bottom of the feature is the exposed underlying layer. An example of a feature is a pillar or pole in a semiconductor substrate or a layer on a substrate. Another example is a trench in a substrate or layer. In various embodiments, the features can have an underlying layer, such as a barrier layer or an adhesion layer. Non-limiting examples of underlying layers include dielectric layers and conductive layers, such as silicon oxide, silicon nitride, silicon carbide, metal oxides, metal nitrides, metal carbides, and metal layers.

[0042] In various embodiments, the substrate is a blanket layer. In various embodiments, the substrate comprises a carbon material, such as an amorphous carbon material. The amorphous carbon material may be referred to herein as an "amorphous carbon layer" or "ACL". The amorphous carbon material can be a blanket layer having no features to be etched thereon. In many embodiments, the carbon material has a metal content of 0%. In various embodiments, the amorphous carbon material is metal-free. In various embodiments, the amorphous carbon material can be a material to be ultimately etched after forming a suitable hard mask thereon using a desired pattern. The carbon material is substantially dopant-free, which is defined such that a substantially dopant-free carbon material includes materials having a very low amount of dopants, such as less than about 1%, or about 0%, or 0% dopant concentration in the carbon material. In various embodiments, the amorphous carbon layer is tungsten-free. In various embodiments, the amorphous carbon material is boron-free. In some embodiments, the carbon material contains trace amounts of hydrogen and / or nitrogen. In various embodiments, the amorphous carbon layer contains trace amounts of hydrogen, such as less than about 1% hydrogen, or about 0% hydrogen. In various embodiments, the amorphous carbon layer contains trace amounts of nitrogen, such as less than about 1% nitrogen, or about 0% nitrogen. In some embodiments, the amorphous carbon material has less than about 40% non-carbon atoms, or less than about 30% non-carbon atoms, or less than about 15% non-carbon atoms.

[0043] The amorphous carbon material can also have a variable hardness, such as a material having a hardness between about 8 and about 12. The amorphous carbon material can also have some coefficients, such as between about 60 GPa and about 160 GPa. In some embodiments, the proportion of sp3 bonds in the amorphous carbon material can be between about 15% and about 50%.

[0044] In various embodiments, the thickness of the amorphous carbon material is at least about 50 nm, or at least about 200 nm, or at least about 300 nm, or at least about 500 nm, or at least about 1000 nm, or at least about 1500 nm, or at least about 2000 nm, or at least about 3000 nm, or at least about 5000 nm, or at least about 7000 nm, or from about 50 nm to about 1000 nm, or from about 50 nm to about 8000 nm.

[0045] The critical dimensions of the features to be etched in the amorphous carbon material depend on the application. In some embodiments, those features have critical dimensions of at least about 50 nm, or at least about 80 nm, or at least about 100 nm, or from about 50 nm to about 500 nm in the case of 3D-NAND applications. In some embodiments, those features have critical dimensions of at least about 10 nm, or at least about 15 nm, or at least about 20 nm, or from about 16 nm to about 22 nm in the case of DRAM applications.

[0046] The features on the provided substrate can have multiple different sizes. In some embodiments, the substrate can include features with large feature openings, features with small feature openings, features with high aspect ratios, features with small aspect ratios, or combinations thereof.

[0047] Returning to FIG. 2, in operation 202, optionally, an adhesion layer is deposited on the amorphous carbon material. In some embodiments, the adhesion layer can include some nitrogen atoms. In some embodiments, the nitrogen atoms in the adhesion layer can diffuse into the tungsten-containing layer that is deposited later in operation 203, which is further described below. [[ID=1,4]]

[0048] In some embodiments, the adhesion layer is a tungsten-containing layer. Exemplary compositions of the adhesion layer include, but are not limited to, tungsten nitride, titanium nitride, tungsten carbide, tungsten carbonitride, tungsten, etc. In some embodiments, the adhesion layer is doped with a dopant. In some embodiments, the dopant is boron. The adhesion layer is deposited at a temperature of at least about 325 °C.

[0049] The adhesion layer can be deposited to a thickness of at least about 2 nm. In some embodiments, the adhesion layer can be deposited to a thickness of at least about 5 nm. In some embodiments, the adhesion layer can be deposited to a thickness of about 2 nm to about 5 nm. Some thicknesses can be suitable for forming at least about 100 nm of doped tungsten material in subsequent operations. In some embodiments, the adhesion layer can be used to facilitate the nucleation of tungsten-containing film particles on the amorphous carbon material surface in subsequent embodiments. In some embodiments, the immersion operation can be performed before, in addition to, or instead of the deposition of the adhesion layer. For example, in some embodiments, the amorphous carbon layer can be exposed to diborane (B2H6) immersion before depositing the adhesion layer such that performing the immersion enables the nucleation of the tungsten-containing material in subsequent operations, or can be exposed to diborane immersion without depositing the adhesion layer. In some embodiments, the immersion and / or adhesion layer deposition can reduce or eliminate the nucleation delay when depositing the tungsten-containing material.

[0050] In some embodiments, deposition at a higher temperature can result in better adhesion. In some embodiments, deposition using an increased flow of diborane can result in better adhesion.

[0051] In some embodiments, the adhesion layer is deposited in a deposition process that does not include plasma. In some embodiments, the adhesion layer is thermally deposited. In some embodiments, the adhesion layer is deposited by CVD or ALD, or by another deposition technique.

[0052] ALD is a technique for depositing thin layers of materials using sequential self-limiting reactions. The ALD process uses surface-mediated deposition reactions to deposit the film one layer at a time in cycles. As an example, an ALD cycle can include the following operations, namely, (i) delivery / adsorption of a precursor, (ii) purging the precursor from the chamber, (iii) delivery of a second reactant and optional generation of plasma, and (iv) purging the by-products from the chamber. The reaction between the second reactant and the adsorbed precursor to form a film on the surface of the substrate affects the composition and properties of the film, such as non-uniformity, stress, wet etching rate, dry etching rate, electrical properties (e.g., breakdown voltage and leakage current). In the ALD deposition of tungsten nitride films, this reaction can involve reacting a tungsten-containing precursor gas with a nitrogen-containing gas in pulses that occur alternately in time. In the ALD deposition of tungsten nitride films, a ternary reaction can be used. For example, one non-limiting example of a ternary reaction can involve pulsing diborane, purging, pulsing tungsten hexafluoride, purging, and pulsing with ammonia.

[0053] Unlike chemical vapor deposition (CVD) techniques, the ALD process uses surface-mediated deposition reactions to deposit the film one layer at a time. In one example of the ALD process, a substrate surface containing a set of surface active sites is exposed to the gas phase distribution of a first precursor, such as a silicon-containing precursor, by a dose provided to the chamber containing the substrate. The molecules of this first precursor are adsorbed onto the substrate surface and include chemisorbed species and / or physically adsorbed molecules of the first precursor. It should be understood that when a compound is adsorbed onto the substrate surface as described herein, the adsorbed layer may include the compound as well as derivatives of the compound. For example, the adsorbed layer of a tungsten-containing precursor may include the tungsten-containing precursor as well as derivatives of the tungsten-containing precursor. After the first precursor dose, the chamber is then evacuated to remove most or all of the first precursor remaining in the gas phase so that mainly the adsorbed species or only the adsorbed species remain. In some implementations, the chamber may not be completely evacuated. For example, the reactor may be evacuated such that the partial pressure of the first precursor in the gas phase is low enough to moderate the reaction. A second reactant, such as a nitrogen-containing gas, is introduced into the chamber, and thus some of these molecules react with the first precursor adsorbed on the surface. In some processes, the second precursor reacts immediately with the adsorbed first precursor. In other embodiments, the second reactant reacts only after an activation source is temporarily applied. The chamber can then be evacuated again to remove unreacted second reactant molecules. As described above, in some embodiments, the chamber may not be completely evacuated. Additional ALD cycles can be used to build up the film thickness.

[0054] In some embodiments, the ALD process includes plasma activation. As described herein, the ALD processes and apparatuses described herein can be conformal film deposition (CFD) processes, which are generally described in U.S. Patent Application No. 13 / 084,399, filed Apr. 11, 2011, entitled "PLASMA ACTIVATED CONFORMAL FILM DEPOSITION" (now U.S. Patent No. 8,728,956), and U.S. Patent Application No. 13 / 084,305, filed Apr. 11, 2011, entitled "SILICON NITRIDE FILMS AND METHODS", which are hereby incorporated by reference in their entirety.

[0055] In operation 203, a doped tungsten-containing layer is deposited on the carbon material. The operations in FIG. 2 can be performed in any order, but in some embodiments, operation 202 can be performed prior to operation 203 such that in operation 203, the doped tungsten-containing layer is deposited on the adhesion layer deposited in operation 202. In various embodiments, the doped tungsten-containing layer is deposited directly on the carbon material without depositing an adhesion layer. In various embodiments, the doped tungsten-containing layer is deposited directly on the carbon material after the carbon material is exposed to diborane immersion. In various embodiments, the doped tungsten-containing layer is deposited directly on the adhesion layer, such that the adhesion layer is sandwiched between the doped tungsten-containing layer and the carbon material.

[0056] In various embodiments, the metal dopant of the doped tungsten-containing layer can be boron. In some embodiments, the metal dopant can be any one or more of the following metals: boron, phosphorus, nitrogen, carbon, and chlorine. In various embodiments, the metal dopant can depend on what metal is used, what precursor is used, and other process conditions. In some embodiments, the doped tungsten-containing layer is boron-doped tungsten.

[0057] The amount of metal dopant in the doped tungsten-containing layer can be at least about 15 atomic percent, or at least about 20 atomic percent, or at least about 30 atomic percent, or at least about 40 atomic percent, or at least about 50 atomic percent, or about 60% to about 70 atomic percent, or up to about 80 atomic percent, or about 20% to about 50 atomic percent. In some embodiments, the amount of boron in the doped tungsten-containing layer can be at least about 15 atomic percent, or at least about 20 atomic percent, or about 30 atomic percent, or at least about 40 atomic percent, or up to about 50 atomic percent, or about 20% to about 50 atomic percent. In some embodiments, an atomic composition of greater than 50% of boron dopant in tungsten can, in particular, cause film deformation. For example, in some embodiments, a large amount of boron can reduce wafer bow, although non-uniformity can occur, and in various embodiments, the non-uniformity can be due to hardware or other factors and can be mitigated. In some embodiments, for other metal-containing layers that can be deposited, having a boron dopant concentration of up to about 80% can result in additional benefits for improving etch selectivity and other properties. The amount of metal dopant can be varied by adjusting process conditions. For example, in some embodiments, increasing the temperature can increase the dopant concentration. In some embodiments, increasing the exposure time to the tungsten-containing precursor used to deposit the doped tungsten-containing layer in an ALD cycle can reduce the dopant concentration. In some embodiments, increasing the flow rate of one or more process gases can increase the dopant concentration. In some embodiments, the relative flow rates of the process gases being adjusted, and the partial pressures of the gases in the gas phase can be used to adjust the dopant concentration. In the case of a CVD reaction, increasing the chamber pressure can increase the deposition rate. For example, a higher chamber pressure can result in more residual gas in the processing region above the substrate surface, and thus additional metal can be deposited.

[0058] The doped tungsten-containing layer can be deposited by CVD or by ALD. In some embodiments, the doped tungsten-containing layer can be deposited in a plasma-free environment.

[0059] The doped tungsten-containing layer is amorphous. Since elemental tungsten films can have more of a crystalline structure, metal dopants are used to achieve an amorphous film.

[0060] The doped tungsten-containing layer is deposited to a thickness sufficient to withstand subsequent etching operations used to etch the carbon material. For example, in some embodiments, the doped tungsten-containing layer is deposited to a thickness of at least about 10 nm, or at least about 50 nm, or at least about 100 nm, or at least about 200 nm, or from about 10 nm to about 300 nm.

[0061] The stress of the doped tungsten-containing layer can be adjusted by adjusting various deposition process conditions during operation 203, including but not limited to gas flow, pressure, and deposition temperature.

[0062] In various embodiments, operation 203 can be performed at a substrate temperature of at least about 200 °C, or at least about 300 °C, or from about 300 °C to about 350 °C. The deposition rate of the doped tungsten-containing layer and the dopant concentration formed in the doped tungsten-containing layer can vary depending on the temperature of the substrate during deposition. For example, a higher temperature can result in a higher concentration of dopants in the doped tungsten-containing layer. In one example, a higher temperature can result in a higher concentration of boron in the doped tungsten-containing layer.

[0063] In one example where the doped tungsten-containing layer is deposited by ALD, the substrate is exposed to a "dose", whereby a tungsten-containing precursor is introduced in the gas phase to the substrate surface, thereby causing at least one tungsten-containing precursor to adsorb onto the surface of the substrate. The tungsten-containing precursor can be a halogen-containing precursor such as tungsten hexafluoride, tungsten pentafluoride, tungsten hexachloride, or tungsten pentafluoride. In some embodiments, the tungsten-containing precursor can be an organometallic tungsten precursor. The "dose" can be carried out for a duration of from about 0.1 second to about 30 seconds.

[0064] After the "dose", the tungsten-containing precursor gas flow is stopped or diverted and the process chamber is optionally purged to remove excess tungsten-containing precursor gas molecules in the processing region above the substrate surface. Purging the chamber can involve flowing a purge gas or sweep gas, which can be the carrier gas used in other operations or a different gas. In some embodiments, purging can involve evacuating the chamber. Exemplary purge gases include argon, nitrogen, hydrogen, and helium. In some embodiments, purging can include one or more evacuation sub-phases for evacuating the process chamber. Alternatively, it will be appreciated that purging can be omitted in some embodiments. Purging can have any suitable duration, such as from about 0 seconds to about 60 seconds, for example, about 0.01 second, or for example, about 100 ms.

[0065] Following an optional purge operation, a "conversion" operation may be performed, and thus a second reactant is introduced to react with the adsorbed tungsten-containing precursor to form a tungsten-containing material on the surface of the substrate. The second reactant may include a dopant. In some embodiments, the second reactant is a boron-containing reactant such as diborane. In some embodiments, the second reactant is a nitrogen-containing reactant such as ammonia. In some embodiments, the second reactant is a hydrogen-containing reactant such as ammonia. In some embodiments, the second reactant includes one or more gases such as diborane, ammonia, hydrogen, and combinations thereof. In various embodiments, the second reactant reacts with the adsorbed tungsten-containing precursor in a reaction that does not include heat and / or plasma, and thus the plasma is not ignited, or plasma species are not present in the processing region above the substrate during operation. One or more inert gases and / or carrier gases may be flowed simultaneously or with the second reactant and then split off prior to delivery to the showerhead of the process chamber.

[0066] Following the "conversion" operation, an optional second purge may be performed. The entire process, including "dose" and "conversion", may be performed in any order (e.g., a tungsten-containing precursor may be introduced followed by the second reactant, or the second reactant may be introduced followed by the tungsten-containing precursor). In some embodiments, the entire ALD cycle may include at least one dose and one conversion operation. In some embodiments, the entire ALD cycle may include a dose, a purge, a conversion, and a second purge. Multiple ALD cycles may be performed to build up the film thickness.

[0067] In some embodiments, the doped tungsten-containing layer in operation 203 is deposited by thermal CVD. In thermal CVD, the substrate is exposed to one or more tungsten-containing precursor gases and a second reactant, and thus, the tungsten-containing precursor gas and the second reactant react to form the doped tungsten-containing layer. In some embodiments, the reaction is carried out in a processing region above the substrate. In some embodiments, the reaction is carried out on the substrate surface to form a tungsten-containing material on the substrate surface.

[0068] The deposition time can also affect the dopant concentration in the doped tungsten-containing layer. For example, a longer deposition time will result in a higher dopant concentration.

[0069] The reactants used, particularly the deposition flux for the dopant-containing reactant, also affect the dopant concentration. For example, an increase in the flow rate of the dopant-containing reactant will result in a higher dopant concentration in the doped tungsten-containing layer.

[0070] The pressure can also affect the dopant concentration, or the deposition rate, or both. For example, in a CVD-based deposition process, an increase in pressure can increase the reaction rate between the tungsten-containing precursor and the dopant-containing reactant and can increase the deposition rate. Further, the relative partial pressures of the various gases used during deposition also affect the dopant concentration. In an ALD process, an increase in pressure can result in more ambient material in the processing region when the dopant-containing reactant is introduced and can result in more deposition. For example, an incomplete purge after introducing tungsten hexafluoride can result in more tungsten deposition when diborane is introduced later. In some embodiments, the flow rate ratio of the tungsten-containing precursor to the dopant-containing reactant can affect the dopant concentration.

[0071] The ratio of the thickness of the doped tungsten-containing layer to the thickness of the carbon material can be between about 1:5 and about 1:30. In various embodiments, the doped tungsten-containing layer is deposited directly on the carbon material.

[0072] The doped tungsten-containing layer does not contain silicon. The doped tungsten-containing hard mask contains tungsten atoms that can be cross-linked. In some embodiments, the doped tungsten-containing hard mask having boron contains cross-links between tungsten boride, additional tungsten, and boron atoms, or between tungsten boride and additional tungsten atoms, or between tungsten boride and additional boron atoms. The different types of cross-links observed in the doped tungsten-containing layer depend on process conditions for depositing the layer, such as deposition precursor chemistry, temperature, chamber pressure, and plasma conditions.

[0073] In one example, at least about 100 nm of boron-doped tungsten is deposited by reacting tungsten hexafluoride with diborane on an adhesion layer of about 5 nm formed on a very thick amorphous carbon layer.

[0074] Returning to FIG. 2, in operation 205, a patterned mask is formed on the doped tungsten-containing layer. In some embodiments, the patterned mask is a patterned photoresist. The patterned photoresist can be formed by depositing a photoresist layer and lithographically patterning the photoresist. In some embodiments, a bottom anti-reflective coating layer is formed on the doped tungsten-containing layer before forming the patterned mask. In some embodiments, the bottom anti-reflective coating (BARC) layer has the chemical formula C x H y O zSuch as those having , it can be a polymer material. In some embodiments, the BARC layer has a thickness of about 10 nm to about 50 nm. In some embodiments, the BARC layer can be deposited by a spin-on method. In some embodiments, the patterned mask formed on the doped tungsten-containing layer includes both a patterned BARC layer and a patterned photoresist. In a non-limiting example, the BARC layer is CF, such as CF4 x It can be patterned by using a compound such as CF4 and a plasma, and the power can be alternately pulsed at a frequency of about 200 Hz. The flow rate of CF4 can be between about 50 sccm and about 200 sccm. Other gases that can be pulsed in this step include helium (He).

[0075] Returning to FIG. 2, in operation 207, the pattern of the patterned mask is transferred to the doped tungsten-containing layer to form a patterned doped tungsten-containing mask. Transfer of the pattern to the doped tungsten-containing layer can be accomplished by etching the doped tungsten-containing layer using the patterned mask as a mask. The mask can be etched using halogen-containing etchant species. Exemplary halogen-containing gases that can be used include, but are not limited to, chlorine, fluorine, nitrogen trifluoride, and boron trifluoride. In various embodiments, the etching is selective to the underlying carbon material such that the carbon material is not etched during formation of the patterned doped tungsten-containing layer. In some embodiments, this operation also includes etching an optional adhesion layer to expose the surface of the carbon material. Those skilled in the art will recognize that the actual species present in the plasma can be a mixture of different ions, radicals, and molecules derived from the etching gas. Note that since the plasma reacts with and destroys the doped tungsten-containing material, other species, such as volatile by-products, can be present in the reaction chamber during removal of the doped tungsten-containing material. The first one or more gases introduced into the plasma can be different from the one or more gases present in the plasma and the one or more gases that contact the surface of the substrate during etching. Various types of plasma sources can be used, including RF plasma sources, DC plasma sources, and microwave-based plasma sources. In some embodiments, an RF plasma source is used. Generally, the RF plasma power for a 300 mm wafer ranges from about 500 W to about 10,000 W, or from about 3,000 W to about 10,000 W. In some embodiments, the power is about 7,000 W per station. Depending on the process chamber being used, in some embodiments, each station has a dedicated power source. In various embodiments, the plasma is generated as an inductively coupled plasma upstream of the showerhead. In various embodiments, a bias is not applied to the pedestal during etching of the metal-doped carbon-containing material. However, in some embodiments, an RF bias is used.RF bias can be used in some embodiments. Various types of RF bias can be used. For example, the RF bias can be generated at frequencies including, but not limited to, 13.56 MHz or less, 400 MHz, 2 MHz, and 1 MHz. An example of a high bias is a bias having at least about 1000 V of power applied to the pedestal during etching. The use of the bias depends on the chemical action and whether directional etching is used in the applications using some of the disclosed embodiments.

[0076] When a bias is applied, the power applied to the bias can be between about 10 V and about 3000 V, such as about 10 V. The terms "bias power" and "bias voltage" are to be understood as being used interchangeably herein to describe the voltage at which the pedestal is set when the bias is applied to the pedestal. The bias power or bias voltage described herein is measured in watts for the power applied to the pedestal. In some embodiments, a pulsed bias can be used to prevent etching of a patterned mask containing silicon. The pulsed plasma can be pulsed between a low bias and a high bias, or between a bias in an on state and a bias in an off state (0 V). Pulsing between a low bias and a high bias involves pulsing between a low bias between about 100 V and about 300 V and a high bias between about 1000 V and about 2500 V. Pulsing can be performed using a duty cycle between about 3% and about 40%, or about 3% to about 99%, or 100% (continuous bias). The duty cycle refers to the duration during which the pulse is on. It will be understood that bias pulsing can involve a repetition of periods, each of which can persist for a duration T. The duration T includes the duration for the pulse-on time (the duration during which the bias is in the on state) and the duration for the bias-off time (the duration during which the bias is in the off state) during a given period. The pulse frequency is to be understood as 1 / T. For example, when the bias pulsing period T = 100 μs, the frequency is 1 / T = 1 / 100 μs, or 10 kHz. The duty cycle or duty ratio is the portion or ratio in the period T during which the bias is in the on state, and thus the duty cycle or duty ratio is the pulse-on time divided by T.For example, when the bias pulse period T = 100 μs, the pulse-on time is 70 μs (thus, the bias is in the on state during the period and the duration is 70 μs), and the pulse-off time is 30 μs (thus, the bias is in the off state during the period and the duration is 30 μs), the duty cycle is 70%.

[0077] It should be noted that since the etching was performed using the patterned mask as a mask, the aspect ratio of the gap between the features remained the same.

[0078] Returning to FIG. 2, in operation 209, the pattern is transferred to the carbon material using a doped tungsten-containing mask. The etching can be performed using an oxygen-containing gas mixed with sulfur dioxide or carbon oxysulfide gas and one or more inert gases such as nitrogen, argon, and helium. During the etching, if the patterned mask is removed before transferring the pattern to the carbon material, there is no silicon present during the etching, and thus there is no re-deposition or formation of silicon-containing residues. The etching rate of the amorphous carbon layer can be from about 50 nm per minute to more than about 1 micron per minute. The etching rate of boron-doped tungsten can be from about 1 nm per minute to about 50 nm per minute.

[0079] In some embodiments, the etching using some of the disclosed embodiments involves etching features having a specific ellipticity, evaluated from a top view perspective of the film, for example, by directly looking at the surface of the substrate from top to bottom. In some embodiments, using a doped tungsten-containing mask to etch amorphous carbon results in amorphous carbon having features with an ellipticity of about 1 to about 1.05, or about 1 to about 1.1.

[0080] Figures 3A - 3D show exemplary schematic views of a substrate 301 having an amorphous carbon layer 303, a doped tungsten-containing layer 309, a BARC layer 305, and a developed photoresist 307. Although not shown, the deposition of the doped tungsten-containing layer 305 on the amorphous carbon layer 303 can involve depositing a direct adhesion layer (not shown) directly on the amorphous carbon layer 303, followed by depositing the doped tungsten-containing layer 305. In some embodiments, the developed photoresist 307 can represent a mask formed using lithography techniques.

[0081] Figure 3B shows a patterned BARC layer 315 after etching the BARC layer 305 in Figure 3A using the developed photoresist 307 as a mask using selective etching of the doped tungsten-containing layer 309. Such etching of the BARC layer 305 can be performed by plasma etching using the patterned resist as a mask.

[0082] FIG. 3C shows that the doped tungsten-containing layer 309 in FIG. 3B is selectively etched with respect to the patterned BARC layer 325 to form a patterned doped tungsten-containing mask 319. In some embodiments, the etching is selective only to the BARC layer and not to the amorphous carbon 303, and thus some of the amorphous carbon 303 may be etched. However, since such etching can be quite slow, such etching is not used to completely etch the entire amorphous carbon layer, and a different etching chemistry, further described below, is used to etch the thickness of the amorphous carbon layer. Note that since the etching is performed using the patterned BARC layer 325 as a mask, the aspect ratio of the gaps between the features remains the same. The etching chemistry is selective to primarily etch the doped tungsten-containing layer 309 without etching the patterned BARC layer 325 and without substantially etching the amorphous carbon 303. In some embodiments, a very small amount of the patterned BARC layer 325 may be consumed during this operation. The etching chemistry includes a halogen-containing chemistry. The etching selectivity of the metal-doped tungsten-containing layer with respect to the carbon material can be at least about 10:1, or between about 30:1 and about 40:1.

[0083] FIG. 3D shows a substrate 301 having a patterned carbon layer 313 etched using the consumed, patterned BARC layer 325 and using the doped tungsten-containing mask 329 as a mask. Since a doped tungsten-containing mask is used instead of a silicon-containing mask, the amount of silicon-containing residue left on top of the features is reduced or, in some embodiments, completely eliminated.

[0084] Some of the disclosed embodiments are also suitable for forming doped tungsten-containing spacer materials. For example, a doped tungsten-containing spacer can have better profile control, reduce line curvature or tilt, reduce core damage due to spacer deposition, and reduce spacer etching gouging into the underlying etch stop material.

[0085] Device The disclosed embodiments can be implemented in any suitable etching chamber or device available from Lam Research Corporation, Fremont, CA. Further descriptions of plasma etching chambers can be found in U.S. Pat. Nos. 6,841,943 and 8,552,334, which are hereby incorporated by reference in their entirety.

[0086] The disclosed embodiments are implemented in an inductively coupled plasma (ICP) reactor. An example is provided in FIG. 4. Such an ICP reactor is also incorporated herein by reference for the purpose of describing a suitable ICP reactor for implementation of the techniques described herein, as described in U.S. Patent No. 9,362,133, issued June 7, 2016, and filed December 10, 2013, entitled "METHOD FOR FORMING A MASK BY ETCHING CONFORMAL FILM ON PATTERNED ASHABLE HARDMASK". Although the ICP reactor is described herein, it should be understood that in some embodiments, a capacitively coupled plasma reactor may also be used. An exemplary chamber or apparatus may include a chamber having chamber walls, an electrostatic electrode for chucking and de-chucking a wafer, a chuck for holding a substrate or wafer to be processed that can be charged using a radio frequency (RF) power source, an RF power source configured to supply power to a coil to generate a plasma, and a gas inlet for introducing a gas. In some embodiments, the apparatus may include two or more chambers, each of which may be used for etching, depositing, or processing a substrate. The chamber or apparatus may include a system controller for controlling some or all of the operation of the chamber or apparatus, such as adjusting chamber pressure, inert gas flow, plasma power, plasma frequency, reactive gas flow (e.g., etching gas, etc.), bias power, temperature, vacuum settings, and other process conditions. The chamber may also be used to deposit a tungsten-containing material on a substrate.

[0087] Figure 4 schematically shows a cross-sectional view of an inductively coupled plasma integrated etching and deposition apparatus 400 suitable for implementing some embodiments of the present specification, an example of which is an inductively coupled plasma reactor produced by Lam Research Corp., Fremont, CA. The inductively coupled plasma apparatus 400 includes a processing chamber 401 structurally defined by a chamber wall and a window 411. The chamber wall can be made of stainless steel or aluminum. The window 411 can be made of quartz or other dielectric materials. An optional internal showerhead 450 divides the processing chamber 401 into an upper sub-chamber 402 and a lower sub-chamber 403. The showerhead can include one hole or a plurality of holes for delivering and distributing gas and / or plasma species to the lower sub-chamber 403. In most embodiments, the showerhead 450 is removed, whereby the chamber space created by the sub-chambers 402 and 403 can be utilized. A chuck 417 is disposed within the lower sub-chamber 403 near the bottom inner surface. The chuck 417 is configured to receive and hold a semiconductor wafer 419, and etching and deposition processes are performed on the semiconductor wafer 419. The chuck 417 can be an electrostatic chuck for supporting the wafer 419 when present. In some embodiments, an edge ring (not shown) surrounds the chuck 417 and has an upper surface that is substantially planar with the upper surface of the wafer 419 when present on the chuck 417. The chuck 417 also includes electrostatic electrodes for chucking and de-chucking the wafer. A filter and a DC clamp power supply (not shown) can be provided for this purpose. Other control systems for lifting the wafer 419 from the chuck 417 can also be provided. The chuck 417 can be movable along an axis substantially parallel to the sidewall of the chamber, whereby the surface of the chuck 417 is substantially parallel to the ground. When a showerhead is used, the distance between the wafer 419 and the showerhead (not shown) can be between about 0.5 inches and about 3.0 inches. The chuck 417 can be charged using an RF power supply 423. The RF power supply 423 is connected to a matching circuit 421 through a connection 427.Integrated circuit 421 is connected to chuck 417 through connection 425. In this way, RF power supply 423 is connected to chuck 417.

[0088] Elements for plasma generation include coil 433 disposed above window 411. In various embodiments, no coil is used in the disclosed embodiments. Coil 433 is made of a conductive material and includes at least one complete turn. The example of coil 433 shown in FIG. 4 includes three turns. The cross-section of coil 433 is indicated by symbols, where the coil with an "X" extends so as to rotate into the page, and the coil with a "●" extends so as to rotate out of the page. Elements for plasma generation also include RF power supply 441 configured to supply RF power to coil 433. Generally, RF power supply 441 is connected to matching circuit 439 through connection 445. Matching circuit 439 is connected to coil 433 through connection 443. In this way, RF power supply 441 is connected to coil 433. Optional Faraday shield 449 is disposed between coil 433 and window 411. Faraday shield 449 is maintained in a spaced relationship with respect to coil 433. Faraday shield 449 is disposed immediately above window 411. Coil 433, Faraday shield 449, and window 411 are each configured to be substantially parallel to each other. The Faraday shield can prevent metals or other species from depositing on the dielectric window of process chamber 401.

[0089] Process gas (e.g., oxygen-containing gas, halogen-containing gas, dopant tungsten-containing layer deposition precursor, etc.) can flow into the processing chamber 401 through one or more main gas inlets 460 disposed in the upper chamber 402 and / or through one or more side gas inlets 470. Similarly, although not explicitly shown, similar gas inlets can be used to supply process gas to a capacitively coupled plasma processing chamber. To draw the process gas out of the processing chamber 401 and maintain the pressure within the processing chamber 401, a vacuum pump, e.g., a single- or two-stage mechanical dry pump and / or a turbomolecular pump 440, can be used. For example, the pump can be used to evacuate the processing chamber 401 to remove volatile by-products generated from etching patterned mask materials such as dopant tungsten-containing materials, non-dopant tungsten-containing materials, and BARC materials. A valve control conduit can be used to fluidly connect the vacuum pump to the processing chamber 401 so as to selectively control the application of the vacuum environment provided by the vacuum pump. This can be done by employing a closed-loop control flow restriction device such as a throttle valve (not shown) or a pendulum valve (not shown) during the operation of the plasma processing. Similarly, a vacuum pump and valve control fluid connection to a capacitively coupled plasma processing chamber can also be employed.

[0090] During operation of the device, one or more process gases may be supplied through gas inlets 460 and / or 470. In some embodiments, the process gas may be supplied only through the main gas inlet 460 or only through the side gas inlet 470. In some cases, the gas inlets shown in the figures may be replaced, for example, with more complex gas inlets, one or more showerheads. The Faraday shield 449 and / or optional grid 450 may include internal channels and holes that allow the delivery of the process gas to the processing chamber 401. Either or both of the Faraday shield 449 and the optional grid 450 may act as a showerhead for the delivery of the process gas. In some embodiments, a liquid vaporization and delivery system may be upstream of the processing chamber 401, and thus, when a liquid reactant or precursor is vaporized, the vaporized reactant or precursor is introduced into the processing chamber 401 via the gas inlets 460 and / or 470.

[0091] Radio frequency power is supplied from the RF power source 441 to the coil 433, causing an RF current to flow through the coil 433. The RF current flowing through the coil 433 generates an electromagnetic field around the coil 433. The electromagnetic field generates an induced current within the upper subchamber 402. The physical and chemical interactions of the various generated ions and radicals with the wafer 419 selectively etch the features of the wafer and deposit a layer on the wafer.

[0092] When a plasma grid is used and thus there are both an upper subchamber 402 and a lower subchamber 403, the induced current acts on one or more gases present in the upper subchamber 402 to generate an electron-ion plasma in the upper subchamber 402. The optional internal plasma grid 450 limits the amount of hot electrons in the lower subchamber 403. In some embodiments, the device is designed and operated such that the plasma present in the lower subchamber 403 is an ion-ion plasma.

[0093] Both the upper electron-ion plasma and the lower ion-ion plasma may contain positive and negative ions, but the ion-ion plasma will have a greater ratio of negative to positive ions. Volatile etching and / or deposition by-products may be removed from the lower subchamber 403 through port 422. The chuck 417 disclosed herein may operate at a high temperature ranging from about 200°C to about 500°C. The temperature will depend on the process operation and a particular recipe.

[0094] When installed in a clean room or fabrication facility, the processing chamber 401 may be coupled to a facility (not shown). The facility includes piping that provides process gas, vacuum, temperature control, and environmental particle control. These facilities are coupled to the processing chamber 401 when installed in a target fabrication facility. Further, the processing chamber 401 may be coupled to a transfer chamber that enables robotics for transferring semiconductor wafers into and out of the processing chamber 401 using typical automation.

[0095] In some embodiments, a system controller 430 (which may include one or more physical or logical controllers) controls some or all of the operation of the processing chamber. The system controller 430 may include one or more memory devices and one or more processors. In some embodiments, the apparatus includes a switching system for controlling flow rate and duration when the disclosed embodiments are implemented. In some embodiments, the apparatus may have a switching time of up to about 500 ms, or up to about 750 ms. The switching time may depend on the chemistry of the flow, the selected recipe, the reactor architecture, and other factors.

[0096] The processing chamber 401 or apparatus may include a system controller. For example, in some embodiments, the controller 430 may be part of a system that may be part of the examples described above. Such a system may include semiconductor processing equipment including one or more processing tools for processing, one or more chambers, one or more platforms, and / or specific processing components (such as wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after the processing of semiconductor wafers or substrates. The electronics may sometimes be referred to as a "controller" which may control various components or sub-parts of one or more systems. The controller 430 may, depending on the processing specifications and / or the type of system, control any of the processes disclosed herein including delivery of processing gases, temperature settings (such as heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and motion settings, wafer transfer including tools connected to or interfaced with a particular system and other transfer tools and / or entering and exiting a load lock.

[0097] Generally, the controller 430 can be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuit can include firmware storing program instructions, a digital signal processor (DSP), a chip defined as an application specific integrated circuit (ASIC), and / or one or more microprocessors or chips in the form of a microcontroller that execute program instructions (e.g., software). The program instructions can be instructions communicated to the controller in the form of various individual settings (or program files) that define operating parameters for performing specific processes on or for a semiconductor wafer or system. The operating parameters can, in some embodiments, be part of a recipe defined by a process engineer to achieve one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of the wafer.

[0098] In some implementations, the controller 430 can be part of a computer that is integrated with, coupled to, or networked to the system, or coupled to that computer, or a combination thereof. For example, the controller 430 can be within the "cloud" or within all or part of a fab host computer system that can enable remote access to wafer processing. The computer can monitor the current progress of the fabrication operation, examine the history of past fabrication operations, and examine trends or performance metrics from multiple fabrication operations to change the parameters of the current process, set the process steps following the current process, or initiate a new process, and can enable remote access to the system. In some examples, a remote computer (e.g., a server) can provide a process recipe to the system over a network that can include a local network or the Internet. The remote computer can include a user interface that enables entry or programming of parameters and / or settings, and the parameters and / or settings are then communicated from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specify parameters for each of the process steps to be performed during one or more operations. It should be understood that the parameters can be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus, as described above, the controller can be distributed, such as by including one or more individual controllers that are networked together and function towards a common purpose such as the processes and controls described herein. An example of a distributed controller for such a purpose would be one or more integrated circuits on a chamber communicating with one or more integrated circuits remote (e.g., at the platform level or as part of a remote computer) that are combined to control the process on the chamber.

[0099] While not limiting, exemplary systems can include a plasma etching chamber or module, a deposition chamber or module, a spin rinse chamber or module, a metal plating chamber or module, a cleaning chamber or module, a bevel edge etching chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etching (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing system that can be associated with or used in the fabrication and / or manufacture of semiconductor wafers.

[0100] As described above, depending on one or more process steps to be performed by the tool, the controller 430 can communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout the factory, the main computer, another controller, or tools used in the material transport that carries the wafer container between tool locations and / or load ports in a semiconductor manufacturing facility.

[0101] The processing chamber 401 can be integrated in a multi-station tool as shown in FIG. 5. Each station can be used to process different operations. For example, one station can be used to perform a pre-oxidation, and another station can be used to perform a selective etching of a doped tungsten-containing material. The disclosed embodiments can be performed without breaking vacuum and can be performed in the same apparatus.

[0102] FIG. 5 shows a semiconductor process cluster architecture with various modules that interface with a vacuum transfer module (VTM) 538. A configuration of transfer modules for "transferring" wafers between multiple storage facilities and processing modules is sometimes referred to as a "cluster tool architecture" system. An airlock 530, also known as a load lock or transfer module, is shown in the VTM 538, along with four processing modules 520a - 520d that can be individually optimized for performing various fabrication processes. By way of example, the processing modules 520a - 520d can be implemented to perform substrate etching, deposition, ion implantation, wafer cleaning, sputtering, and / or other semiconductor processes. One or more of the substrate etching processing modules (any of 520a - 520d) can be implemented for performing pre-oxidation, selectively removing a doped tungsten-containing material, and other suitable functions according to the disclosed embodiments, as disclosed herein. The airlock 530 and the process modules 520 are sometimes referred to as "stations". Each station has a facet 536 that interfaces the station to the VTM 538. Inside each facet, sensors 1 - 18 are used to detect the passage of the wafer 526 as it is moved between the respective stations.

[0103] Robot 522 transfers wafer 526 between stations. In one embodiment, robot 522 has one arm, and in another embodiment, robot 522 has two arms, with each arm having an end effector 524 for picking up wafers such as wafer 526 for conveyance. The front-end robot 532 in the atmospheric transfer module (ATM) 540 is used to transfer wafer 526 from the cassette or front opening unified pod (FOUP) 534 in the load port module (LPM) 542 to the air lock 530. The module center 528 inside the process module 520 is one location for placing wafer 526. The aligner 544 in the ATM 540 is used to align the wafers.

[0104] In an exemplary processing method, a wafer is placed in one of the FOUPs 534 in the LPM 542. The front-end robot 532 transfers the wafer from the FOUP 534 to the aligner 544, which enables the wafer 526 to be properly centered before it is etched or processed. After being aligned, the wafer 526 is moved by the front-end robot 532 to the air lock 530. Since the air lock module has the ability to match the environment between the ATM and the VTM, the wafer 526 can move between the two pressure environments without being damaged. From the air lock module 530, the wafer 526 is moved by the robot 522 through the VTM 538 and into one of the process modules 520a - 520d. To achieve this wafer transfer, the robot 522 uses the end effector 524 on each of its arms. When the wafer 526 is processed, the wafer 526 is moved by the robot 522 from the process modules 520a - 520d to the air lock module 530. From here, the wafer 526 can be moved by the front-end robot 532 to one of the FOUPs 534 or to the aligner 544.

[0105] The computer that controls wafer movement can be local to the cluster architecture, or can be located outside of the cluster architecture on the manufacturing floor, or can be at a remote location and connected to the cluster architecture via a network. The controller described above with respect to Figure 4 can be implemented with the tools in Figure 5.

[0106] Experiment Experiment 1 An experiment was conducted to measure the etching rates of different mask materials using the same etch chemistry for etching amorphous carbon materials. Three masks contained boron-doped tungsten with varying amounts of boron dopant, and a fourth mask was a silicon nitride mask. Having a minimal amount of boron dopant in the boron-doped tungsten mask improved the selectivity by a factor of 12.9 compared to using silicon oxynitride as the mask. Using boron-doped tungsten at varying amounts of boron achieved at least a 5.8-fold improvement in selectivity over that of a SiON mask, as shown in Figure 6.

[0107] Experiment 2 An experiment was conducted to measure the etching rate of a boron-doped tungsten-containing material using a SiN etch chemistry. Boron-doped tungsten had a lower etching rate with at least a 52% reduction relative to SiON, as shown in Figure 7. Figures 6 and 7 suggest that a boron-doped tungsten-containing material can be used as a mask material for amorphous carbon materials that have a high selectivity with respect to SiN-based masks (Figure 6), and that a boron-doped tungsten-containing material can be easily etched using a SiN etch chemistry (Figure 7), thereby making it a better mask material than SiON.

[0108] Experiment 3 An experiment was conducted to test the adhesion strength when the deposition temperature of the adhesive layer and the diborane flow of the adhesive layer were fluctuating. On one substrate, an adhesive layer was deposited using 90 sccm of diborane with an apparatus having stations with temperatures of 250 °C and 325 °C. The adhesive layer was of insufficient quality and was easily peeled off. On a second substrate, an adhesive layer was deposited using 190 sccm of diborane with an apparatus having stations with temperatures of 250 °C and 325 °C. The adhesive layer was of better quality, but some of the material was peelable. On a third substrate, an adhesive layer was deposited using 190 sccm of diborane with an apparatus having a station with a temperature of 325 °C. The adhesive layer withstood peeling and showed greatly improved adhesion strength.

[0109] Conclusion The above-described embodiments have been described in some detail for purposes of clarity of understanding, but it will be apparent that some changes and modifications can be practiced within the scope of the appended claims. Note that there are many alternative ways to implement the processes, systems, and apparatuses of this embodiment. Therefore, this embodiment should be regarded as illustrative rather than restrictive, and those embodiments should not be limited to the details given herein.

Claims

1. providing a substrate comprising an amorphous carbon layer to be etched, the amorphous carbon layer having a thickness of at least about 100 nm; forming a patterned doped tungsten-containing mask on the amorphous carbon layer; etching the amorphous carbon layer using the patterned doped tungsten-containing mask to form a patterned carbon-containing layer; A method comprising:

2. 10. The method of claim 1, wherein the patterned doped tungsten-containing mask comprises a metal dopant selected from the group consisting of boron, titanium, tungsten, tantalum, tin, aluminum, and combinations thereof.

3. The method of claim 1 , wherein the amorphous carbon layer does not include a dopant.

4. 10. The method of claim 1, wherein the amorphous carbon layer comprises less than about 10% impurities.

5. 5. The method of claim 1, further comprising depositing an adhesion layer directly on the amorphous carbon layer prior to forming the patterned doped tungsten-containing mask.

6. 5. The method of claim 1, wherein the patterned doped tungsten-containing mask is silicon-free.

7. 5. The method of claim 1, wherein forming the patterned doped tungsten-containing mask comprises depositing a doped tungsten-containing material and etching the doped tungsten-containing material using a photoresist mask to form the patterned doped tungsten-containing mask.

8. 5. The method of claim 1, wherein the ellipticity of features formed in the amorphous carbon layer after etching the amorphous carbon layer is between about 1 and about 1.

1.

9. 5. The method of claim 1, wherein the etching of the amorphous carbon layer is performed using one or more gases that form volatile by-products with the patterned doped tungsten-containing mask and the amorphous carbon layer without redepositing material on a substrate surface.

10. 5. The method of claim 1, wherein the patterned doped tungsten-containing mask is doped with boron, and wherein the etching of the amorphous carbon layer is performed in a silicon-free environment.

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