Carrier for polishing a workpiece having flats or voids
The substrate carrier head with isolated pressure zones and continuous contact improves CMP system uniformity, addressing non-uniformity issues and enhancing yield and reducing costs in semiconductor manufacturing.
Patent Information
- Application Number
- JP2025504138
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-07-29
- Filing Date
- 2023-07-24
- Publication Date
- 2025-08-01
AI Technical Summary
Existing chemical mechanical planarization (CMP) systems face challenges in achieving uniformity of planarization, particularly due to non-uniform removal rates and pressure differences across the wafer, leading to issues like wafer breakage and increased costs in semiconductor manufacturing.
A substrate carrier head with a membrane having primary and secondary zones, where the secondary zone is isolated from pressure applied to the primary zone, allowing independent pressure control and continuous contact with the wafer, and includes features like an inner ridge and adhesive to prevent membrane expansion into voids formed by wafer flats.
This design enhances uniformity of planarization, reduces wafer breakage, and minimizes non-uniform removal rates, thereby improving yield and reducing the cost of ownership in semiconductor manufacturing.
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Figure 2025524933000001_ABST
Abstract
Description
Technical Field
[0001] (Incorporation by reference to any priority application) This application claims the benefit of U.S. Provisional Patent Application No. 63 / 369,490, filed Jul. 26, 2022, and U.S. Provisional Patent Application No. 63 / 639,917, filed Jul. 29, 2022, the disclosures of each of which are incorporated herein by reference in their entireties for all purposes. Any application identified in the PCT petition filed with this application as claiming foreign or domestic priority is incorporated herein by reference under 37 CFR 1.57 of the United States Patent Laws and Regulations.
[0002] The present disclosure generally relates to carriers for polishing workpieces, and more specifically, to systems and apparatuses for improving chemical mechanical planarization (CMP) performance for planarizing thin films.
Background Art
[0003] CMP systems are designed to planarize the surface of a wafer in order to provide a sufficiently flat surface when manufacturing semiconductor chips. As the processing steps for manufacturing semiconductor chips become more complex and / or as chip designs are miniaturized, the tolerances for planarizing the surface of the wafer can become more precise. Therefore, it is desirable to improve the uniformity of planarization, which may include identifying and reducing sources of non-uniform removal rates.
Summary of the Invention
[0004] For the purpose of summarizing the present disclosure and the advantages achieved over the prior art, specific objects and advantages of the present disclosure are described herein. Not all of such objects or advantages are achieved in any particular embodiment. Thus, for example, one skilled in the art will recognize that the invention may be embodied or practiced in a manner that achieves or optimizes one or more of the advantages taught herein, but need not necessarily achieve other objects or advantages that may be taught or suggested herein.
[0005] One aspect of the disclosed technology is a substrate carrier head for a chemical mechanical planarization (CMP) system, the substrate carrier head comprising a carrier body having an opening configured to receive a wafer, a membrane having a first surface configured to contact a surface of the wafer and a second surface opposite the first surface, the membrane having a primary zone and a secondary zone, a membrane cavity formed along the second surface and configured to apply pressure to the membrane within the primary zone, and a membrane support plate configured to support the secondary zone of the membrane.
[0006] In some embodiments, the secondary zone of the membrane is isolated from the pressure applied to the primary zone of the membrane.
[0007] In some embodiments, the membrane is further configured to contact the wafer in substantially continuous fashion.
[0008] In some embodiments, the primary zone of the membrane comprises a plurality of subzones, and the substrate carrier head further comprises a processor configured to independently control the pressure applied to each of the subzones.
[0009] In some embodiments, the wafer comprises a flat edge that forms a void when the wafer is held by the carrier body, and the width of the secondary zone is greater than the void to prevent the membrane from filling the void.
[0010] In some embodiments, the membrane support plate has an annular shape and is configured to control the pressure applied to the secondary zone of the membrane.
[0011] In some embodiments, the substrate carrier head is compatible with a membrane-controlled CMP system.
[0012] In some embodiments, the substrate carrier head further includes an inner plate and an outer plate, the membrane is fixed between the inner plate and the outer plate, and further includes an internal ridge configured to isolate the primary zone from the secondary zone.
[0013] In some embodiments, the substrate carrier head is disposed above the outer plate and further includes a membrane backing ring for fixing the membrane in place.
[0014] In some embodiments, the substrate carrier head further includes an adhesive for adhering the secondary zone of the membrane to the membrane support plate.
[0015] Another aspect is a chemical mechanical planarization (CMP) system, the CMP system includes a substrate carrier head including a carrier body having an opening configured to receive a wafer, a membrane having a first surface configured to contact the surface of the wafer and a second surface opposite the first surface, the membrane having a primary zone and a secondary zone, a membrane cavity formed along the second surface and configured to apply pressure to the membrane in the primary zone, and a membrane support plate configured to support the secondary zone of the membrane; and a processor configured to control the pressure applied to the membrane via the membrane cavity.
[0016] In some embodiments, the secondary zone of the membrane is isolated from the pressure applied to the primary zone of the membrane.
[0017] In some embodiments, the membrane is further configured to be in substantially continuous contact with the wafer.
[0018] In some embodiments, the primary zone of the membrane comprises a plurality of sub - zones, and the substrate carrier head further comprises a processor configured to independently control the pressure applied to each of the sub - zones.
[0019] In some embodiments, the wafer comprises a flat edge that forms a void when the wafer is held by the carrier body, and the width of the secondary zone is larger than the void to prevent the membrane from filling the void.
[0020] In some embodiments, the membrane support plate has an annular shape and is configured to control the pressure applied to the secondary zone of the membrane.
[0021] In some embodiments, the substrate carrier head is compatible with a membrane - controlled CMP system.
[0022] In some embodiments, the substrate carrier head further comprises an inner plate and an outer plate, the membrane is fixed between the inner plate and the outer plate, and further comprises an internal ridge configured to isolate the primary zone from the secondary zone.
[0023] In some embodiments, the substrate carrier head is disposed above the outer plate and further comprises a membrane backing ring for fixing the membrane in place.
[0024] In some embodiments, the substrate carrier head further comprises an adhesive for bonding the secondary zone of the membrane to the membrane support plate.
[0025] Yet another aspect is a method of isolating a primary zone of a membrane from a secondary zone of the membrane, the method comprising: receiving a wafer into an opening of a carrier body, the carrier body comprising a membrane having a first surface configured to contact a surface of the wafer and a second surface opposite the first surface, the membrane comprising a primary zone and a secondary zone; applying pressure to the primary zone of the membrane via a membrane cavity formed along the second surface of the membrane; and supporting the secondary zone of the membrane with a support plate.
[0026] In some embodiments, the method further comprises isolating the secondary zone of the membrane from the pressure applied to the primary zone of the membrane.
[0027] In some embodiments, the membrane is further configured to contact the wafer substantially continuously.
[0028] All of these embodiments are intended to be within the scope of the invention disclosed herein. These and other embodiments will be readily apparent to those skilled in the art from the following detailed description of the preferred embodiments, with reference to the accompanying drawings, and the invention is not limited to any particular preferred embodiment disclosed.
Brief Description of the Drawings
[0029] The above and additional objects, features, and advantages of the concepts of the present invention will be better understood through the following illustrative and non-limiting detailed description of embodiments of the present invention, with reference to the accompanying drawings. In the drawings, like reference numerals are used for like elements unless otherwise specified.
[0030]
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Best Mode for Carrying Out the Invention
[0031] The following text describes detailed descriptions of many different embodiments of the present invention, but it should be understood that the legal scope of the present invention is defined by the language of the claims described at the end of the patent application. The detailed description should be construed as merely illustrative, and it is not possible, let alone realistic, to describe all possible embodiments of the present invention. Many alternative embodiments can be implemented using either current technology or technology developed after the filing date of the present patent application, but they still fall within the scope of the claims defining the present invention.
[0032] (Chemical Mechanical Planarization (CMP)) The adoption and use of Chemical Mechanical Planarization (CMP) for the planarization of thin films in the manufacture of semiconductor ICs, MEMS devices, and LEDs is common among companies manufacturing the "chips" of these types of devices, among many other similar applications. This adoption includes the manufacture of chips for mobile phones, tablets, and other portable devices, as well as for desktop and laptop computers. The growth of ultra-fine technology and microfabrication is very promising for the unprecedented wide use and adaptation of digital devices in the medical field, automotive field, and Internet of Things ("IoT"). Chemical Mechanical Planarization for the planarization of thin films was invented and developed by scientists and engineers at IBM in the early 1980s. Today, this process has spread worldwide and is one of the technologies that truly enables the manufacture of many digital devices.
[0033] Integrated circuits are fabricated from multiple and alternating layers of conductive materials (e.g., copper, tungsten, aluminum, etc.), insulating layers (e.g., silicon dioxide, silicon nitride, etc.), and semiconductor materials (e.g., polysilicon). These successive combinations of layers are sequentially applied to the wafer surface, but due to the devices being embedded in the surface, topographical irregularities occur in the device structure. This is common in silicon dioxide insulator layers. These unwanted topographical irregularities are flattened or "planarized" using CMP before the next layer can be deposited, enabling proper interconnects between device structures that are getting smaller and smaller. In the case of copper layers, copper is deposited on the surface to fill contact vias and create effective vertical paths for the movement of electrons between devices and between layers. This procedure is continued for each layer applied (usually by a deposition process). In the case of multiple conductive material layers (multiple metal layers), this can result in many polishing procedures (one for each layer of conductor, insulator, and semiconductor material) to successfully route and interconnect the circuitry between device structures.
[0034] In the CMP process, the substrate or wafer is held by a wafer carrier that is rotating and is typically pressed against a platen for a specified time of polishing, usually via an elastic membrane within the wafer carrier. CMP wafer carriers typically incorporate components for precision polishing of generally flat and round workpieces such as silicon wafers in the process head and / or films deposited thereon. These components include 1) an elastic membrane with compressed gas applied to the top or back side, where the pressure is transmitted through the membrane to the top or back side of the workpiece to remove material during CMP, and 2) one or more rigid support components that secure the membrane to its mating parts, hold the membrane in its desired shape and dimensions, and / or clamp the membrane to provide a sealed volume for containing and confining a controlled gas pressure.
[0035] During the process, the slurry is applied to the rotating polishing pad via a fluid control device such as a metering pump or a mass flow control regulator system. The slurry can be conveyed to the polishing platen by a single-pass distribution system. To improve performance, it is necessary to evenly distribute the slurry particles in the medium between the rotating wafer and the rotating polishing pad / platen.
[0036] A force may be applied to the back side of the wafer by the wafer carrier film, causing the wafer to be pressed into the pad, and both to move to generate a relative speed. Due to this movement and force, when the abrasive moves across the wafer surface, the abrasive is pressed against the substrate, causing wear on a part of the pad. The corrosive chemicals in the slurry change the material being polished on the wafer surface. The combination of this mechanical effect of wear and chemical change is called chemical mechanical planarization or polishing (CMP). The material removal rate can be easily made one order of magnitude higher when both the chemical effect and the mechanical effect are used simultaneously compared to using either one alone. Similarly, by using the chemical effect and the mechanical effect in combination, the smoothness of the surface after polishing is improved.
[0037] During the polishing process, materials such as copper, dielectrics, and polysilicon are removed from the surface of the wafer. These fine particles remain suspended in the slurry, are embedded in the polishing pad, or both. These particles can cause scratches on the surface of the film being polished, leading to catastrophic failures in the circuit, rendering the chip useless, and having a significant negative impact on the yield.
[0038] Yield is a driving force that determines success at the manufacturing level of many products, such as integrated circuits, MEMS, and LEDs. The surface quality tolerances of CMP processes in semiconductor manufacturing facilities ("fabs") and foundries are measured in nanometers and even in angstroms. The ability to remove material as uniformly as possible from the surface of a wafer or film during CMP is important. Therefore, carrier design technology is constantly evolving towards improving this ability. Small non-uniformities in the flatness of wafers processed in a CMP system can lead to a decrease in yield and an increase in waste. Non-uniformities or pressure differences across the diameter of a wafer carrier and a processing pad can cause wafer breakage. The cumulative costs associated with the manufacture of solid-state devices are collectively referred to as the "cost of ownership" (CoO), and this term also applies to each required manufacturing step. The CoO of the CMP process is one of the highest among the 500 - 800 individual manufacturing steps required to manufacture a semiconductor "chip" and related digital devices.
[0039] The disclosed technology is described with reference to specific drawings with respect to specific embodiments. The present disclosure is not limited thereto, but is limited only by the claims. The described drawings are merely schematic and not limiting. In the drawings, the sizes of some elements are exaggerated for illustrative purposes and may not be drawn to scale. Dimensions and relative dimensions do not necessarily correspond to actual reductions for the practice of the present disclosure.
[0040] (CMP System) FIG. 1 is a schematic view of a chemical mechanical planarization system 100 for processing a polishing pad 110. The system 100 can include a wafer carrier 150 configured to hold and process a wafer. As used herein, the term "wafer" may refer to a semiconductor wafer (e.g., circular), but it will be understood that it can more broadly encompass other types of substrates of different shapes that are processed by polishing or planarization equipment such as CMP equipment. Thus, in the following description, the terms "wafer" and "substrate" can be used interchangeably unless the context clearly relates to only one of "substrate" or "wafer". In the illustrated embodiment, the substrate carrier 150 is in a processing (e.g., lower) position and holds a substrate (not shown) against a polishing pad 110 having a film (not shown). The polishing pad 110 can be disposed on a support surface such as the surface of a platen 120.
[0041] FIG. 2 is a view of the chemical mechanical planarization system of FIG. 1, showing a substrate 155 held at a loading (e.g., upper) position by a substrate carrier 150. The substrate 155 can be held, for example, by the force of a vacuum. Referring to both FIGS. 1 and 2, the system 100 can include a slurry delivery system 140 configured to deliver a processing slurry to the substrate 155 and chemically / mechanically planarize it against the polishing pad 110. The system 100 can include a pad conditioning arm 160 that includes a pad conditioner at its end, and the pad conditioner can be configured to treat or "refresh" the surface roughness or other processing characteristics of the pad during or between processing cycles.
[0042] In the system 100 of FIGS. 1 and 2, the polishing pad 110 is on the upper surface of a platen 120 that rotates counterclockwise about a vertical axis. Other orientations and movement directions can also be achieved.
[0043] The slurry feeding system 140 can feed a slurry containing abrasive and corrosive particles onto the surface of the treated polishing pad 130. The polishing slurry is typically a colloidal suspension of abrasive particles, such as colloidal silica, colloidal alumina, or colloidal ceria in an aqueous medium. In various embodiments, the slurry feeding system 140 includes a metering pump, a mass flow control regulator system, or other suitable fluid feeding components.
[0044] The substrate carrier 150 can hold the substrate 155 in a vacuum, for example, such that the surface of the substrate 155 to be polished faces the polishing pad 110. The abrasive particles and corrosive chemicals in the slurry deposited by the slurry feeding system 140 onto the polishing pad 110 mechanically and chemically polish the substrate by abrasion and corrosion, respectively. The substrate carrier 155 and the polishing pad 110 can move relative to each other in any of several different ways to provide polishing. For example, the substrate carrier 150 can apply a downward force to the platen 120 such that the substrate 155 is pressed against the polishing pad 110. As further described herein, the substrate 155 can be pressed against the polishing pad 110 using a pressure membrane (not shown). The abrasive particles and corrosive chemicals of the slurry between the substrate 155 and the polishing pad 110 can provide chemical and mechanical polishing as the polishing pad 110 and the substrate carrier 155 move relative to each other. The relative movement between the polishing pad and the substrate carrier can be configured in various ways, either or both can be configured to vibrate, move linearly, and / or rotate counterclockwise and / or clockwise relative to each other.
[0045] The pad conditioning arm 160 can condition the surface of the polishing pad 110 with respect to the polishing pad and the substrate carrier 150, with their relative movement such as the relative movement described above, by pressing on the polishing pad 110 with a force. The pad conditioning arm 160 of the illustrated embodiment can vibrate and includes a rotating pad conditioner at its end that contacts the polishing pad 110.
[0046] Figure 3 is a partial cross-sectional view of a substrate carrier head 300 that can be included as part of the substrate carrier 150 shown in FIGS. 1 and 2. The substrate carrier head 300 includes a membrane assembly 305 for a chemical mechanical planarization (CMP) system. In some embodiments, the substrate carrier head 300 (also referred to herein as the carrier head or simply the carrier) can include a support base 380 to which the membrane assembly 305 is attached. The support base 380 can be of any suitable configuration for providing support to the membrane assembly. The support base 380 can be attached and connected to the remainder of the substrate carrier head 300 to a CMP system (not shown). The support base 380 can include a carrier body, a substrate holder, a support plate, and / or other components described elsewhere herein that support a wafer (e.g., the membrane assembly 305) and / or connect the remainder of the carrier head 300 to the CMP system. The support base 380 can also form an opening in which a membrane 320 can be disposed so as to be held by the substrate carrier head 300.
[0047] As shown, the membrane assembly 305 can include a support plate 310, an elastic membrane 320, a membrane holder such as a membrane clamp 330, and an optional external pressure ring 340. The support plate 310 can be of any suitable configuration for supporting the wafer during processing and, for example, attaching the membrane assembly 305 to the support base 380. For example, the support plate 310 can be attached to the support base 380 using one or more bolts or other suitable attachment elements. The support plate 310 can be attached to the support base 380 at various locations, such as along the outer periphery of the support base 380.
[0048] The support plate 310 can be of any suitable configuration for supporting the wafer, for example, through the elastic membrane 320. The elastic membrane 320 can be fixed to the support plate 310 in several different ways. The elastic membrane 320 can be fixed to the support plate 310 before or after the support plate 310 is fixed to the support base 380. The elastic membrane 320 can be fixed to the support plate 310 by using any of several suitable different membrane holder retaining elements such as the membrane clamp 330. In some embodiments, the membrane clamp 330 can be spring-loaded. In other embodiments, the membrane clamp 330 can be securely tightened by using a fastening mechanism (e.g., nuts and bolts, etc.). The membrane clamp 330 can fix the outer portion (e.g., the outer edge) of the membrane 320 to the corresponding portion of the support plate 310 and / or the support base 380. The membrane holder can be of any suitable configuration for fixing at least a portion of the membrane 320 to the support plate 310 and / or the support base 380.
[0049] The elastic membrane 320 can be fixed to the support plate 310 such that, as described above with reference to FIGS. 1 and 2, the membrane 320 holds the substrate 370 against the polishing pad and the substrate can be processed. The membrane can include a first surface (e.g., downward-facing) configured to contact the (e.g., upward-facing) surface of the substrate. The membrane 320 can have sufficient elasticity and flexibility such that, in combination with the polishing pad material and process parameters, the membrane 320 can apply a more uniform pressure across the substrate 370. In some embodiments, the elasticity and flexibility of the membrane 320 can also help reduce breakage of the substrate. The support plate 310 can be spaced apart from the membrane 320 to form a gap or membrane cavity 360 therebetween. In some embodiments, the membrane cavity 360 can be formed when the membrane 320 is in a stationary (e.g., unpressurized) state. A fluid can be supplied to the membrane cavity 360 and this fluid can be pressurized to press the membrane 320 against the substrate 370 during planarization. For example, the membrane 320 can be configured to allow a fluid to contact a second surface of the membrane 320 that faces the aforementioned first membrane surface, e.g., an upward-facing surface. Depending on the embodiment, the fluid can include a gas and / or a liquid. For example, a gas can be used to provide a static pressure to the second surface of the membrane 330. In another application, a liquid can be used to provide pressure while flowing along the membrane 330 and flowing across the membrane to heat or cool the membrane 330.
[0050] The membrane cavity 360 can be sealed. In some embodiments, the fluid seal can be formed within the membrane cavity 360 to prevent fluid from leaking out of the membrane cavity 360 when the fluid is pressurized. Thus, the membrane cavity 360 can form a fluid cavity through which the fluid can circulate. The seal can be formed, for example, at the membrane clamp 330 between a portion of the membrane 320 and a portion of the carrier body (e.g., the plate 310 and / or the base 380). As used herein, a sealed membrane cavity includes a membrane cavity that is in fluid communication with an inlet and / or an outlet that can be selectively sealed (e.g., opened and closed with a valve).
[0051] In some embodiments, when the membrane 320 is in a stationary state, a portion of the membrane 320, e.g., its upward-facing surface, is on or proximate to a corresponding portion of the plate 310, e.g., its downward-facing surface, etc. And the membrane cavity 360 is formed when the membrane 320 is expanded (e.g., pressurized via a fluid). The membrane cavity 360 can redistribute and account for fluid pressure fluctuations with respect to the membrane 320 and thus with respect to the substrate 370 during planarization. The fluid can enter the membrane cavity 360 by being provided to the back side of the membrane 320 via the inlet 350 as shown. The inlet 350 can be disposed within the support plate 310 or supply the fluid via other configurations. In some embodiments, a vacuum can be provided to the cavity 360 via the inlet and / or outlet to hold the wafer 370 under the membrane assembly as further described herein.
[0052] In some embodiments, the membrane cavity 360 can be formed by separating the membrane 320 from the support plate 310. For example, the support plate 310 can include an internal portion that is recessed to form a cavity. In the illustrated embodiment, the membrane assembly 305 can include an optional external pressure ring 340 to form the membrane cavity 360. In other embodiments, the membrane assembly 305 can be assembled without a pressure ring. For example, the elastic membrane 320 can rest directly against the support plate 310 without a membrane cavity 360 that separates the membrane 320 from the support plate 310, e.g., when no fluid is present in the membrane cavity 360. In some embodiments, the membrane assembly 305 can include one or more concentrically arranged pressure rings 340.
[0053] In another embodiment, the wafer carrier can include a multi-zone carrier. For example, membrane 320 can be a multi-zone membrane. Each zone of the multi-zone membrane can include a corresponding membrane cavity configured to receive fluid and / or to be similarly (e.g., separately) controlled as described herein for a single-zone carrier having a single-zone cavity. For example, membrane 320 can have grooves (e.g., indentations) and / or raised portions of membrane 320 that effectively isolate the various zones of membrane 320. In a non-limiting example, the grooves can be arranged in a series of concentric circles originating from the center of the membrane. In another example, the grooves and raised portions can be of an irregular shape (e.g., interconnected circles, non-circular indentations, circular patterns scattered across the surface of the membrane) to improve the distribution of pressure applied across substrate 370 when attached to membrane assembly 305. In some embodiments, the system can apply different pressures to one or more zones of the multi-zone membrane to adjust the removal rate of each zone. For example, in the zone where a higher pressure is applied, the removal rate may be higher.
[0054] Membrane 320 can be flexible to conform to the structure it surrounds. In some cases, membrane 320 can be convex. For example, membrane 320 can be slack at the center. Membrane 320 can also be conical in shape such that a small region of membrane 320 contacts the substrate surface for more precise polishing.
[0055] The membrane material, as described herein, can be any elastic material suitable for planarization, for example, suitable for use within a carrier head for a CMP process. In some embodiments, the membrane material can be one of a rubber or synthetic rubber material. The membrane material can also be one of ethylene propylene diene monomer (M-class) (EPDM) rubber or silicone. Alternatively, the membrane material can be one or more combinations of vinyl, rubber, silicone rubber, synthetic rubber, nitrile, thermoplastic elastomer, fluoroelastomer, hydrated acrylonitrile butadiene rubber, or urethane and polyurethane forms. In certain embodiments, the material of the elastic membrane 320 can be selected based on the thermal transfer properties of the material to effectively cool (or heat, or control the temperature of) the substrate. Thus, when cooling a substrate such as a silicon carbide substrate, a material with a higher thermal conductivity may be desirable. For example, in some embodiments, the membrane material can be an elastomer such as silicone available under Arlon® owned by Rogers Corporation, which has a thermal conductivity that can assist in cooling the substrate. In some embodiments, the elastic membrane 320 can include an inorganic additive that increases the thermal conductivity of the elastic membrane 320 to improve heat transfer between the temperature-controlled fluid and the substrate. Examples of inorganic additives that increase thermal conductivity may include a series of additives manufactured under Martoxid® owned by Martinswerk GMBH.
[0056] One or more membrane assemblies can be implemented within a single CMP system. The CMP system may have a control unit (e.g., a variable speed motor control unit, etc.) that utilizes feedback from the system during operation to more accurately control the CMP process.
[0057] In an exemplary embodiment, the film 320 can be planarized. For example, the film 320 can be made flat within a desired tolerance range and / or to match the surface roughness within a desired tolerance range. For example, the film 320 can undergo a planarization procedure where the film is applied to a polishing pad. Also, the film 320 can be introduced into a chemical slurry that planarizes the film 320. Further, the surface roughness of the film 320 can be improved throughout this planarization process. Surface roughness can be important for films used in the context of a CMP process for at least two reasons: sealing and stiction. The planarization process can reduce the surface roughness to improve the seal between the substrate 370 and the film 320 for handling purposes. At the same time, the surface roughness can be increased to prevent stiction (i.e., the film adhering to the substrate due to surface tension) and to improve the release of the substrate from the film after processing. To achieve the desired balance between low and high surface roughness, a control mechanism can be used during the planarization process (described below). The control mechanism can be external to the device used to planarize the film.
[0058] (Example of a CMP system configured to planarize a substrate with flats or voids) Many wafers can have one or more "flats" or "voids" formed along the edge of the wafer. FIGS. 4A - 4D show embodiments of a wafer 370 that can experience non-uniform planarization according to aspects of the present disclosure. In particular, FIG. 4A shows an embodiment of a wafer 370 according to aspects of the present disclosure. FIG. 4B shows a carrier 300 configured to hold the wafer 370. FIGS. 4C and 4D show enlarged views of a portion of the non-uniformly planarized wafer 370.
[0059] Since the wafer can be substantially circular, as shown in FIG. 4A, the wafer 370 can have a flat 402 edge that provides a reference edge, and the reference edge provides a mechanical indication of the orientation of the crystal structure of the silicon on the wafer 370. For example, the flat 402 can form a reference that is aligned with the crystal structure of the silicon on the wafer. In contrast, in the case of a circular wafer that does not include the flat 402 or other characteristic features in its shape, it can be difficult to determine the orientation of the silicon crystal structure of the wafer due to its angular symmetry. Thus, the flat 402 can serve to provide a prominent feature that enables visual determination of the orientation of the wafer.
[0060] In some implementations, the wafer 370 can include a primary flat 402 and a secondary flat (not shown). Aspects of the present disclosure can be applied to improving the planarization of the wafer 370 including one or more flats 402.
[0061] One problem that can occur when planarizing the wafer 370 having the flat 402 using a CMP system is a phenomenon called "flat burn-in". Flat burn-in generally refers to a very high removal rate in a portion of the flat 402 region of the wafer 370 due to voids in the carrier 300. FIG. 4B shows the wafer 370 held by the carrier 300 after planarization. For example, the wafer 370 may be held within an opening formed in the substrate carrier head 300. The film 320 (e.g., the film 320 of FIG. 3, etc.) can be seen within voids formed by the flat 402 in the wafer 370. FIGS. 4C and 4D show portions 404 of the wafer 370 that may have experienced a higher removal rate than other portions 404 of the wafer 370 due to the flat 402.
[0062] FIG. 5A provides a cross-section of the carrier 300 and the wafer 370 to show the film 320 that fills the void 502 formed by the flat 402 of the wafer 370 according to an aspect of the present disclosure. FIG. 5B is an enlarged view of the region surrounding the void 502 shown in FIG. 5A.
[0063] Referring to FIGS. 5A and 5B, the substrate carrier head 300 holds the wafer 370 adjacent to the membrane 320. The flat 402 in the wafer 370 can be disposed adjacent to the outermost zone of the substrate carrier head 300, which can be called the inner tube (IT) zone 504 (also referred to as the secondary zone). The flat 402 of the wafer 370 forms a void 502, and the membrane 320 fills the void 502 by the pressure applied to the membrane 320 through the membrane cavity 360 (see FIG. 3). When the membrane 320 fills the void, additional pressure is applied to the wafer 370 near the flat 402. Further, the membrane 320 rolls on the edge of the wafer 370 at the flat 402 and removes the portion 404 of the wafer 370 within that region at a different (higher) speed than the rest of the wafer 370.
[0064] FIG. 6A shows the process results with effects seen in a large range of numerical values of non-uniformity due to the flat baking phenomenon. FIG. 6B shows the range of numerical values regarding the process results when the influence of flat baking is reduced or eliminated.
[0065] One technique for reducing or eliminating the membrane roll is to prevent the air pressure from filling the void 502 in the flat 402 region. As described above, the flat 402 can be located below the IT zone 504. In a particular implementation, the membrane 320 can be wound around the IT zone 504 to provide a substantially continuous contact surface across the wafer 370. This feature can provide good process results outside the flat 402 region.
[0066] FIG. 7 provides another view of the substrate carrier head 300 including the membrane 320 and the IT zone 504. The substrate carrier head 300 of FIG. 7 can provide a substantially continuous contact surface between the membrane 320 and the wafer 370 (not shown in FIG. 7).
[0067] Another technique for reducing or eliminating the membrane roll is to use a rigid back carrier instead of the membrane 320. FIG. 8 is a cross-sectional view of a rigid back style substrate carrier head 800 according to an aspect of the present disclosure. The substrate carrier head 800 includes a rigid wafer backing plate 802 configured to hold a wafer 370 having a flat 402, and a chamber flexible membrane seal 804. The substrate carrier head 800 is configured to provide a pressure / vacuum 806 that pushes and pulls on the rigid wafer backing plate 802. Since the substrate carrier head 800 does not have a membrane 320 for filling the void 502 formed by the flat 402, it can at least partially address the flat baking problem. However, one drawback of this approach is that such a rigid back carrier system is designed for a rigid back carrier only and cannot be modified for other applications (including, for example, membrane-based carriers or hybrid carriers).
[0068] Aspects of the present disclosure are configured to address one or more of the above drawbacks using a single piece 2-zone control membrane. FIGS. 9A and 9B show a substrate carrier head 300 having a sealed IT zone 504 according to an aspect of the present disclosure. Specifically, FIG. 9A provides a cross-sectional view of the substrate carrier head 300, and FIG. 9B provides an enlarged view of the IT zone 504.
[0069] Referring to FIGS. 9A and 9B, the substrate carrier head 300 includes an inner IT plate 902, an outer IT plate 904, and a membrane backing ring 906. The membrane 320 is held in place by the inner IT plate 902, the outer IT plate 904, and the membrane backing ring 906. In particular, the inner ridge 908 of the membrane 320 extends between and is fixed between the inner IT plate 902 and the outer IT plate 904. The inner ridge 908 can be formed as a ring that separates the IT zone 504 from the primary zone 910 of the membrane 320. The inner ridge 908 provides a seal between the inner IT plate 902 and the outer IT plate 904, thereby sealing the primary zone 910 from the IT zone 504. That is, the inner ridge 908 can be configured to seal the membrane cavity 360 such that the pressure applied within the membrane cavity 360 is applied to the primary zone 910 and not to the portion of the membrane 320 outside the inner ridge 908 that forms the IT zone 504. The membrane 320 continues to pass through the inner ridge 908, wrap around the outer IT plate 904, and is fixed in place via the membrane backing ring 906. In some embodiments, the IT zone 504 may have a width greater than the width of the void 502, thereby preventing the membrane 320 from filling the void 502.
[0070] By using the inner ridge 908 to seal the membrane cavity 360 from the edge of the IT zone 504, the portion of the membrane 320 supported by the outer IT plate 904 can be prevented from expanding into the void 502 formed by the flat 402. Since the membrane 320 can be prevented from expanding into the void 502, this configuration can reduce or eliminate flat burn-in. Further, the outer IT plate 904 can have an annular shape that overlaps the IT zone 504. Thus, the outer IT plate 904 can provide mechanical support to the portion of the membrane 320 formed in the IT zone 504, thereby reducing or preventing pressurization, expansion, and / or bulging of the membrane 320 within the void 502. Thus, the outer IT plate 904 can help reduce and / or eliminate wafer burn-in.
[0071] Furthermore, the membrane 320 can still be configured for substantially continuous contact across substantially the entire wafer surface while maintaining the separation between the two zones. Using this design, the process for controlling the membrane 320 zones (e.g., providing pressure through the membrane cavities 360) can be substantially the same as in other CMP systems while also providing isolation of the void 502 / flat 402 regions to prevent flat burnishing. Although not shown, the primary zone 910 can be divided into a plurality of sub-zones, each of which can be pressurized independently, e.g., through a corresponding membrane cavity 360. The substrate carrier head 300 can include a processor (which may be located in another part of the CMP system) configured to control the pressure applied to each of the sub-zones.
[0072] Embodiments of the present disclosure provide a control membrane (e.g., membrane 320) that can be formed as a single piece with two or more control zones, including a primary zone 910 and an IT zone 504 (or secondary zone). By isolating the primary zone 910 from the IT zone 504, the substrate carrier head 300 can provide substantially continuous contact between the membrane 320 and the wafer 370, while also enabling individual zone control (e.g., applying different pressures to the membrane 320 in the primary zone 910 and the IT zone 504). Further, the annular outer IT plate 904 can provide a rigid mechanical support to the portion of the membrane 320 within the IT zone 504, enabling this portion of the membrane 320 to be supported without using pneumatic pressure. Further, the outer IT plate 904 can also provide support in this region while providing substantially continuous contact between the portion of the membrane 320 within the IT zone 504 and the wafer 370. The outer IT plate 904 is also configured to provide and control the pressure applied to the membrane 320 in the IT zone 504, which is then applied to the corresponding portion of the wafer 370. By replacing pneumatic pressure with mechanical support, it is possible to prevent the portion of the membrane 320 within the IT zone 504 from expanding into the void 502. Thus, the substrate carrier head 300 can reduce or eliminate the high removal rate in the void 502 region of the wafer 370 due to the asymmetric pressure caused by the membrane roll.
[0073] Further, as described herein, by isolating the pressures applied to the primary zone 910 and the IT zone 504, it is possible to prevent pressurization, expansion, and bulging of the membrane 320 in the IT zone 504. Thereby, the pressure applied to the flat 402 region of the wafer 370 can be reduced.
[0074] In some embodiments, the membrane backing ring 906 can be split into two or more parts that can be attached using fasteners to form a continuous ring. For example, in certain implementations, the membrane backing ring 906 may include two semi-circular parts. Forming the membrane backing ring 906 from multiple parts that can be assembled to the membrane backing ring 906 can simplify the assembly of the substrate carrier head 300, including attaching the membrane 320 to the membrane backing ring 906. This can make it easier to assemble the substrate carrier head 300 and also simplify the application of tension to the membrane 320.
[0075] Figures 10A and 10B show a substrate carrier head 300 having a gimbal device 1002 according to aspects of the present disclosure. In particular, FIG. 10A provides a cross-sectional view of the substrate carrier head 300 having the gimbal device 1002, and FIG. 10B provides an enlarged view of the gimbal device 1002.
[0076] Referring to FIGS. 10A and 10B, the gimbal device 1002 includes a rigid shaft 1004, a compliant material 1006, and a gimbal section 1008. Generally, a gimbal device can allow the body to tilt freely in any direction or to suspend the body, such that the body remains horizontal when its support is tilted. In the context of the substrate carrier head 300, the gimbal device 1002 is configured to allow the substrate carrier head 300 to tilt freely in any direction or to suspend the substrate carrier head 300, such that the substrate carrier head 300 remains horizontal when the rigid shaft 1004 is tilted.
[0077] Figures 11A and 11B show another embodiment of a substrate carrier head 800 according to aspects of the present disclosure. FIG. 11A shows a cross-section of the substrate carrier head 800, and FIG. 11B shows a perspective view of the substrate carrier head 800.
[0078] The substrate carrier heads 800 of FIGS. 11A and 11B are embodied as a hybrid film-controlled rigid back carrier. The substrate carrier head 800 includes a rigid wafer backing plate 802 configured to hold a wafer 370 having a flat 402, and a chamber flexible membrane seal 804. The substrate carrier head 800 is configured to provide a pressure / vacuum 806 that pushes and pulls on the rigid wafer backing plate 802. The substrate carrier head 800 also includes a plurality of vacuum through holes coupled to a wafer chuck vacuum manifold and plumbing 1102.
[0079] Advantageously, the substrate carrier head 800 can directly replace a membrane-based carrier head and can be implemented on a membrane carrier-based CMP system. For example, compatible systems include Axus Surface™, Applied Material Mirra™, etc. Standard rigid back carriers such as Strausbaugh Viprr™, Speedfam / IPEC Rigidback, etc. cannot be implemented on these membrane systems that dominate most of the CMP systems worldwide.
[0080] One aspect of the substrate carrier head 800 is that it integrates a membrane for controlling the pressure on the wafer as compared to using a carrier rigidly attached to a spindle or arm to control the wafer pressure.
[0081] In certain implementations, providing the substrate carrier head 800 with a hybrid film-controlled rigid back carrier enables membrane pressure control and also reduces wafer sticking due to the rigid back portion of the carrier within the IT zone 504. In some embodiments, the substrate carrier head 800 having a hybrid film-controlled rigid back carrier is compatible with a number of membrane-controlled CMP systems.
[0082] FIG. 12 is another embodiment of the substrate carrier head 300 according to an aspect of the present disclosure. Referring to FIG. 12, the substrate carrier head 300 includes a film 320 including a primary zone 910 and an IT zone 504. In contrast to the embodiment of FIGS. 9A and 9B, the film of FIG. 12 can be attached to the IT plate 1202 via an adhesive 1204. Since the adhesive 1204 attaches (or adheres) the film 320 to the underlying IT plate 1202, the adhesive 1204 constrains the film 320 in the region where the adhesive 1204 adheres the film 320 to the IT plate 1202.
[0083] That is, the adhesive 1204 prevents any pressure applied to 360 from being applied to the IT zone 504 of the film 320 while still allowing pressure to be applied to the primary zone 910 of the film 320. Thus, by preventing the IT zone 504 of the film 320 from spreading into the void 502 formed by the flat 402, the substrate carrier head 300 can help reduce or eliminate wafer baking.
[0084] Depending on the implementation, the IT plate 1202 can include various methods and means, including the application of various adhesive materials, for such adhesion and / or bonding. For example, the adhesive material can include one or more of adhesives, epoxies, chemicals, heat, molding, vulcanization, etc.
[0085] As described herein, for example, by using a pressure barrier, isolation, and / or constraint (e.g., via an adhesive contact layer), the pressure applied to the primary zone 910 of the film 320 can be prevented from reaching the IT zone 504, thereby reducing or preventing pressurization, expansion, and inflation of the IT zone 504. Thereby, the excessive pressure applied to the flat 402 of the wafer 370 can be reduced, and wafer baking can be reduced. These techniques can be particularly advantageous when processing relatively hard materials (e.g., silicon carbide, sapphire, etc.) that can be processed using higher pressures than relatively soft materials.
[0086] (Summary) The term "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any aspect or embodiment described herein as "exemplary" should not necessarily be construed as preferred or advantageous over other aspects or embodiments. The various aspects of the novel systems, devices, and methods are described in more detail below with reference to the accompanying drawings. However, the present disclosure can be embodied in many different forms and should not be construed as limited to the specific structure or function presented throughout the present disclosure. Rather, these aspects are provided so that the present disclosure will be thorough and complete and will fully convey the scope of the present disclosure to those skilled in the art. Based on the teachings herein, those skilled in the art should understand that the scope of the present disclosure is intended to cover any aspect of the novel systems, devices, and methods disclosed herein, whether implemented independently of or in combination with the other aspects described. For example, an apparatus can be implemented or a method can be carried out using any number of the aspects described herein. Further, the scope of the present disclosure is intended to cover such apparatus or methods implemented using, in addition to or other than the various aspects of the present disclosure described herein, other structures, functions, or a combination of structures and functions. It should be understood that any aspect disclosed herein can be embodied by one or more elements of the claims.
[0087] Also, unless a term is explicitly defined in this patent using a statement such as "as used herein, the term... is defined herein to mean..." or a similar statement, there is no intent to explicitly or implicitly limit the meaning of the term beyond its plain or ordinary meaning, and it should be understood that such terms should not be construed as being limited in scope based on statements made in any section of this patent (except for the language of the claims). The terms recited in the last claims of this patent are referred to in this patent in a form consistent with a single meaning only for the purpose of clarity so as not to confuse the reader, and such claim terms are not intended to be limited, either implicitly or otherwise, to that single meaning.
[0088] Conditional words such as "can", "is possible", "may", or "may be" generally intend to convey that a particular feature, element, and / or step is included in a particular embodiment but not in other embodiments, unless otherwise specified or unless there is no other interpretation in the context in which they are used. Thus, such conditional words generally do not intend to imply that a feature, element, and / or step is essential in some form in one or more embodiments, or that one or more embodiments include logic for determining whether these features, elements, and / or steps are included in or performed in any particular embodiment, regardless of the presence or absence of user input or prompts.
[0089] Conjunctive expressions such as the phrase "at least one of X, Y, and Z" are understood in the context in which they are generally used to convey that an item, term, etc. can be any of X, Y, or Z, unless otherwise specified. Thus, such conjunctive expressions generally do not intend to mean that a particular embodiment requires the presence of at least one X, at least one Y, and at least one Z.
[0090] As used herein, language of degree such as the terms "about", "approximately", "generally", and "substantially" still perform the desired function and / or represent a value, quantity, or characteristic that is close to the recited value, quantity, or characteristic to achieve the desired result. For example, the terms "about", "approximately", "generally", and "substantially" may mean an amount within less than 10%, less than 5%, less than 1%, less than 0.1%, and / or less than 0.01% of the recited amount, depending on the desired function or objective result.
[0091] While particular embodiments have been described, these embodiments are presented by way of example only and are not intended to limit the scope of the disclosure. In fact, the novel methods and systems described herein can be embodied in various other forms. Furthermore, various omissions, substitutions, and changes to the systems and methods described herein can be made without departing from the spirit of the disclosure. The appended claims and their equivalents are intended to cover such forms or modifications as fall within the scope and spirit of the disclosure.
[0092] Features, materials, characteristics, or groups described in connection with a particular aspect, embodiment, or example are to be understood to be applicable to any other aspect, embodiment, or example described in this section or any other section of this specification, unless incompatible. All features (including the appended claims, abstract, and drawings) disclosed herein, and / or all steps of any method or process so disclosed, can be combined in any combination, except combinations where at least some of such functions and / or steps are mutually exclusive. Protection is not limited to the details of any of the foregoing embodiments. Protection extends to any novel one, or any novel combination, of the features disclosed herein (including the appended claims, abstract, and drawings), and / or to any novel one, or any novel combination, of the steps of any method or process so disclosed.
[0093] Furthermore, the specific features described in the context of individual embodiments in this disclosure can also be implemented in combination in a single embodiment. Conversely, the various features described in the context of a single embodiment can also be implemented individually in multiple embodiments, or in any suitable partial combination. Additionally, although features may be described as functioning in a particular combination, one or more features from the claimed combination can, in some cases, be removed from the combination, and the combination can be claimed as a partial combination or a variation of a partial combination.
[0094] Furthermore, operations may be depicted in the drawings or described in the specification in a particular order, but to achieve a desired result, such operations need not be performed in the specific order or sequence shown, nor is it necessary to perform all the operations. Other operations not shown or described can be incorporated into the exemplary methods and processes. For example, one or more additional operations can be performed before, after, simultaneously with, or between the operations described. Additionally, in other embodiments, the operations can be rearranged or reordered. Those skilled in the art will understand that in some embodiments, the actual steps taken in the processes illustrated and / or disclosed may differ from those shown in the figures. Depending on the embodiment, certain steps described above can also be removed, and other steps can be added. Moreover, the features and attributes of the specific embodiments disclosed above can be combined in different ways to form additional embodiments, all of which fall within the scope of this disclosure. Also, the separation of the various system components in the embodiments described above should not be understood as requiring such separation in all embodiments, and it should be understood that the components and systems described above can typically be integrated into a single product or packaged into multiple products. For example, any component of the energy storage system described herein can be provided separately or integrated together (e.g., packaged together or attached together) to form an energy storage system.
[0095] For the purposes of the present disclosure, certain aspects, advantages, and novel features are described herein. It is not necessarily the case that all such advantages can be achieved in accordance with a particular embodiment. Thus, for example, one skilled in the art will recognize that the present disclosure may be embodied or practiced in a manner that achieves one or a group of the advantages taught herein, but need not necessarily achieve other advantages that may be taught or suggested herein.
[0096] The headings provided herein, if any, are for convenience only and do not necessarily affect the scope or meaning of the apparatus and methods disclosed herein.
[0097] The scope of the present disclosure is not intended to be limited by the specific disclosure of the preferred embodiments in this section or other sections of this specification, but may be defined by the claims, as presented in this section or other sections of this specification, or as may be presented in the future. The language of the claims should be interpreted broadly based on the language used in the claims and not limited to the examples described herein or the examples during the examination of this application, and these examples should be construed as non-exclusive.
Claims
1. A substrate carrier head for a chemical mechanical planarization (CMP) system, comprising: a carrier body having an opening configured to receive a wafer; a film having a first surface configured to contact the surface of the wafer and a second surface opposite the first surface, the film having a primary zone and a secondary zone; a film cavity formed along the second surface and configured to apply pressure to the film within the primary zone; a film support plate configured to support the secondary zone of the film; The substrate carrier head comprising the above.
2. The substrate carrier head according to claim 1, wherein the secondary zone of the film is isolated from the pressure applied to the primary zone of the film.
3. The substrate carrier head according to claim 1, wherein the film is further configured to contact the wafer substantially continuously.
4. The primary zone of the film comprises a plurality of sub-zones, and the substrate carrier head further comprises a processor configured to independently control the pressure applied to each of the sub-zones, according to claim 1.
5. The wafer has a flat edge that forms a void when the wafer is held by the carrier body, and the width of the secondary zone is greater than the void to prevent the film from filling the void, according to claim 1.
6. The substrate carrier head according to claim 1, wherein the film support plate has an annular shape and is configured to control the pressure applied to the secondary zone of the film.
7. The substrate carrier head according to claim 6, wherein the substrate carrier head is compatible with a film control CMP system.
8. An inner plate; An outer plate; Further comprising: The substrate carrier head according to claim 1, wherein the film is fixed between the inner plate and the outer plate and further comprises an internal ridge configured to isolate the primary zone from the secondary zone.
9. A film backing ring disposed above the outer plate and configured to fix the film in place; The substrate carrier head according to claim 8, further comprising the above.
10. An adhesive for adhering the secondary zone of the film to the film support plate; The substrate carrier head according to claim 1, further comprising the above.
11. A chemical mechanical planarization (CMP) system, A substrate carrier head, A carrier body having an opening configured to receive a wafer, A film having a first surface configured to contact the surface of the wafer and a second surface opposite the first surface, the film having a primary zone and a secondary zone, A film cavity formed along the second surface and configured to apply pressure to the film within the primary zone, A film support plate configured to support the secondary zone of the film, A substrate carrier head comprising: A processor configured to control the pressure applied to the film via the film cavity, A CMP system comprising:
12. The CMP system according to claim 11, wherein the secondary zone of the film is isolated from the pressure applied to the primary zone of the film.
13. The CMP system according to claim 11, wherein the film is further configured to contact the wafer substantially continuously.
14. The primary zone of the film comprises a plurality of sub-zones, and the substrate carrier head further comprises a processor configured to independently control the pressure applied to each of the sub-zones. The CMP system according to claim 11.
15. The wafer comprises a flat edge that forms a void when the wafer is held by the carrier body, and the width of the secondary zone is greater than the void to prevent the film from filling the void. The CMP system according to claim 11.
16. The film support plate has an annular shape and is configured to control the pressure applied to the secondary zone of the film. The CMP system according to claim 11.
17. The substrate carrier head is compatible with a film control CMP system. The CMP system according to claim 16.
18. The substrate carrier head, An inner plate, An outer plate, Further comprising, The film is fixed between the inner plate and the outer plate and further comprises an internal ridge configured to isolate the primary zone from the secondary zone. The CMP system according to claim 11.
19. The substrate carrier head, A film backing ring disposed above the outer plate and configured to fix the film in place, Further comprising. The CMP system according to claim 18.
20. The substrate carrier head further comprises an adhesive for adhering the secondary zone of the film to the film support plate, the CMP system according to claim 11.
21. A method of isolating a primary zone of a film from a secondary zone of the film, the method comprising: receiving a wafer into an opening of a carrier body, the carrier body having a film with a first surface configured to contact a surface of the wafer and a second surface opposite the first surface, the film having a primary zone and a secondary zone; applying pressure to the primary zone of the film through a film cavity formed along the second surface of the film; and supporting the secondary zone of the film with a support plate.
22. The method according to claim 21, further comprising isolating the secondary zone of the film from the pressure applied to the primary zone of the film.
23. The method according to claim 21, wherein the film is further configured to contact the wafer substantially continuously.