Rapid Thermal Processing (RTP) Chamber Outgassing Removal
Automated chamber monitoring and AI/ML-driven cleaning in semiconductor processing chambers address the issue of material outgassing deposits by predicting cleanliness and performing self-cleaning, enhancing efficiency and reducing downtime.
Patent Information
- Application Number
- JP2025519944
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-08-28
- Filing Date
- 2023-09-15
- Publication Date
- 2025-10-03
AI Technical Summary
Material outgassing in semiconductor processing chambers leads to deposits on interior surfaces, affecting process control and yield, necessitating frequent manual cleaning and requalification, which is time-consuming and disruptive.
Implement automated chamber monitoring using AI or ML models to predict cleanliness levels and trigger self-cleaning operations when thresholds are exceeded, allowing for waferless cleaning without opening the chamber.
Reduces the frequency and duration of chamber cleaning, minimizing downtime and requalification processes while maintaining process performance and yield.
Smart Images

Figure 2025533148000001_ABST
Abstract
Description
[Technical Field]
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Patent Application No. 18 / 238,891, filed August 28, 2023, which claims the benefit of U.S. Provisional Application No. 63 / 415,817, filed October 13, 2022, the entire contents of which are incorporated herein by reference.
[0002] Embodiments relate to the field of semiconductor manufacturing, and in particular to preventive maintenance (PM) chambers with one or more algorithms for identifying when PM is required and when the RTP chamber should be cleaned. [Background technology]
[0003] Material outgassing in semiconductor processing chambers can result in deposits on the chamber's interior surfaces. In the case of rapid thermal processing (RTP) tools, cold wall surfaces are particularly susceptible to collecting deposits. For example, misreading of temperature sensors (e.g., pyrometers) due to surface contamination can adversely affect process control and result in yield issues. That is, the temperature sensor may not read the true temperature of the surface, and the feedback loop for controlling the voltage supplied to lamps in the RTP tool may operate based on this incorrect information. This can, in some cases, cause the RTP tool to become too hot.
[0004] Therefore, it is necessary to clean RTP tools at regular intervals or when yield issues are discovered. Current cleaning solutions rely on daily test wafer monitoring to trigger tool shutdowns for preventive maintenance (PM). Cleaning can involve manual wet cleaning, which requires the chamber to be opened and reconditioned after cleaning. Additionally, process requalification is also required. Removing trace metals after chamber integrity is compromised can require thousands of seasoning wafers to be run. Summary of the Invention
[0005] Embodiments disclosed herein include a method for monitoring chamber conditions. In one embodiment, the method includes processing a substrate in a chamber, providing substrate history and chamber data to a chamber model, where the chamber model is configured to predict chamber cleanliness, comparing the predicted chamber cleanliness to a performance limit, and flagging the chamber for preventive maintenance (PM) when the predicted chamber cleanliness exceeds the performance limit.
[0006] Embodiments may also include a method of cleaning a chamber. The method may include providing substrate history and chamber data to a chamber model, where the chamber model is configured to predict chamber cleanliness, comparing the predicted chamber cleanliness to a performance limit, and cleaning the chamber when the predicted chamber cleanliness does not exceed the performance limit.
[0007] Embodiments may also include a rapid thermal processing (RTP) tool. In one embodiment, the RTP tool includes a chamber, a reflector plate, a substrate support, an edge ring around the substrate support, a plurality of lamps above the reflector plate, and a tool model. In one embodiment, the tool model is configured to predict chamber cleanliness by comparing the predicted chamber cleanliness to a performance limit, and to flag the chamber for preventive maintenance (PM) when the predicted chamber cleanliness exceeds the performance limit. [Brief explanation of the drawings]
[0008] [Figure 1] 1 illustrates a cross-sectional view of a rapid thermal processing (RTP) tool, according to one embodiment. [Figure 2A]FIG. 1 illustrates a plan view of a dirty RTP tool looking down on the reflector and edge ring, according to one embodiment. [Figure 2B] FIG. 1 illustrates a top view of a clean RTP tool looking down on the reflector and edge ring, according to one embodiment. [Figure 3A] 1 is a graph of sheet resistance for substrates processed in a clean chamber, a chamber with a first level coating, and a chamber with a second level coating, according to one embodiment. [Figure 3B] 10 is a graph of the resulting temperature variation and standard deviation for an RTP tool with a first level coating and a second level coating, according to one embodiment. [Figure 4A] 10 is a graph of wafer-by-wafer modeling of an RTP tool with a first level of coverage and a second level of coverage, according to one embodiment. [Figure 4B] 10 is a graph of wafer-by-wafer modeling of an RTP tool after a cleaning process, according to one embodiment. [Figure 5A] 10 is a graph of radiation sensor data per wafer for an RTP tool with a first level of coating and a second level of coating, according to one embodiment. [Figure 5B] 10 is a graph of radiation sensor data per wafer for an RTP tool after a cleaning process, according to one embodiment. [Figure 6] FIG. 1 is a process flow diagram of a process for identifying when preventive maintenance (PM) operations are needed for an RTP tool, according to one embodiment. [Figure 7] FIG. 1 is a process flow diagram of a process for identifying when cleaning of an RTP tool is complete, according to one embodiment. [Figure 8] FIG. 1 is a block diagram of an exemplary computer system that may be used with a processing tool, according to one embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0009] The systems described herein include a rapid thermal processing (RTP) chamber with one or more algorithms for identifying when preventive maintenance (PM) is needed and when the RTP chamber should be cleaned. In the following description, numerous specific details are set forth to provide a thorough understanding of the embodiments. It will be apparent to those skilled in the art that the embodiments may be practiced without these specific details. In other instances, well-known aspects are not described in detail so as not to unnecessarily obscure the embodiments. Furthermore, it should be understood that the various embodiments illustrated in the accompanying drawings are illustrative representations and are not necessarily drawn to scale.
[0010] As mentioned above, deposits on the interior surfaces of the chamber adversely affect process performance. This can lead to yield issues and require frequent cleaning. Cleaning can involve opening the chamber and implementing a manual wet clean, which requires time and expertise. Furthermore, after cleaning, the chamber must be reconditioned and the process requalified.
[0011] Accordingly, embodiments disclosed herein include automated chamber monitoring and cleaning processes. The chamber condition (i.e., chamber cleanliness) can be monitored using one or more algorithms that map the condition of the internal surfaces. When the surface coverage exceeds a threshold level that adversely affects process performance, an alert is triggered. The alert can then be used to initiate a self-cleaning operation. In certain embodiments, the self-cleaning operation is a waferless cleaning process. That is, the cleaning is implemented without a wafer present in the chamber. An algorithm can also be used to monitor the cleaning and provide an indication of when the cleaning is complete. Thus, the cleaning process can be implemented without opening the chamber. Thus, calibration and recertification processes can be reduced in duration or eliminated.
[0012] 1 , a cross-sectional view of a semiconductor processing tool 100 is shown, according to one embodiment. In one embodiment, the semiconductor processing tool 100 may be an RTP tool. That is, the semiconductor processing tool 100 may be configured to rapidly heat the substrate 140 to modify the surface of the substrate 140. For example, a rapid thermal oxidation process may be implemented on the substrate 140.
[0013] In one embodiment, substrate 140 may be a semiconductor substrate. For example, substrate 140 may be a silicon wafer, etc. Substrate 140 may have any standard wafer form factor (e.g., 150 mm, 200 mm, 300 mm, 450 mm, etc.). Furthermore, substrate 140 may have other form factors besides a circular shape in some embodiments.
[0014] In one embodiment, the semiconductor processing tool 100 may include a chamber 105. The chamber 105 may be of any suitable material, such as stainless steel. In some embodiments, the interior surfaces of the chamber 105 may have a coating to protect the surfaces of the chamber 105.
[0015] In one embodiment, the semiconductor processing tool 100 may have a substrate support structure. The substrate support structure may include a base 120. An insert 126 may be provided on the base 120. In one embodiment, a reflector 125 may be provided on the insert 126. The reflector 125 may be used to reflect radiation onto the substrate 140 to improve heating of the substrate 140. The reflector 125 may be any reflective material. The support structure may further include a substrate support 122. The substrate support 122 may support the substrate 140 on the reflector 125. There may be space provided between the reflector 125 and the substrate 140. In one embodiment, the substrate support 122 may be coupled to a lift mechanism 121 for raising or lowering the substrate 140. In one embodiment, an edge ring 127 may be provided around the periphery of the substrate support 122 and the substrate 140.
[0016] In one embodiment, a fluid path through chamber 105 may be provided. As indicated by the arrows, gas may flow into chamber 105 through opening 106, over substrate 140, and exit chamber 105 through outlet 107. Outlet 107 may be coupled to a pump (not shown). The pump may be used to evacuate species from chamber 105.
[0017] In one embodiment, a lamp housing 110 may be provided above the substrate 140. The lamp housing 110 may include multiple lamps 115. The lamps 115 may be distributed across the surface of the substrate 140. The lamps 115 may be individually controllable to provide a desired heating profile above the substrate 140. In one embodiment, any suitable lamp architecture may be used. The lamps 140 may be separated from the main chamber volume by a window 117. For example, the window 117 may be a quartz window 117 or the like. Thus, thermal energy from the lamps 140 passes through the window 117 to reach the substrate 140. The thermal energy that passes through the substrate 140 may be reflected back to the substrate 140 by a reflector 125.
[0018] In one embodiment, one or more sensors may be provided in the semiconductor processing tool 100 to provide feedback control to the lamps 115. For example, one or more pyrometers 130 may be included in the chamber 105. The pyrometers 130 may pass through the base 120 and detect the temperature of the backside of the substrate 140. The pyrometers 130 may be distributed across the backside of the substrate 140 to provide a spatial temperature measurement.
[0019] In one embodiment, the interior surfaces of the chamber 105 (e.g., chamber sidewalls, reflector 125, edge ring 127, etc.) may become coated during use of the semiconductor processing tool 100. For example, outgassed species from the substrate 140 may deposit on those surfaces. This deposition may be further amplified by the fact that some of those surfaces are considered cold-wall surfaces; that is, some of those surfaces may be actively cooled. The deposition of layers on the interior surfaces of the semiconductor processing tool 100 may adversely affect process performance and device yield. For example, as a coating is applied onto the pyrometer 130, the measured temperature may deviate from the actual temperature of the system. This may result in inadequate feedback to the voltage control of the lamps 115, which may result in temperature overshoot.
[0020] 2A and 2B, a plan view of the interior of a semiconductor processing tool 200 is shown, according to one embodiment. In FIG. 2A, coatings are provided on the reflector 225, the substrate support 222, and the edge ring 227. The coated surfaces are designated 225′, 222′, and 227′ to indicate that the reflector 225, the substrate support 222, and the edge ring 227 have coatings thereon. The coatings may be carbon-based coatings. For example, as described in more detail below, carbon may outgas from the surface of the substrate and redeposit on the interior surfaces of the chamber. Referring now to FIG. 2B, a plan view of a clean semiconductor processing tool 200 is shown, according to one embodiment. As shown, the reflector 225, the substrate support 222, and the edge ring 227 are clean, without any carbon coatings.
[0021] 3A, a graph of sheet resistance for various substrates is shown, according to one embodiment. A first line 361 is a graph of sheet resistance across the surface of the substrate when the chamber used is clean. A second line 362 is a graph of sheet resistance across the surface of the substrate when the chamber has a first level of coating on the chamber's interior surfaces. A third line 362 is a graph of sheet resistance across the surface of the substrate when the chamber has a second level of coating on the chamber's interior surfaces. The thickness of the second level of coating is greater than the thickness of the first level of coating. As shown, the sheet resistance decreases as a result of increasing chamber coating.
[0022] In the embodiment shown in Figure 3A, chamber coating is provided through a controlled outgassing process. For a first level coating, a substrate with an amorphous carbon film is provided in the chamber for a first duration at an elevated temperature (e.g., 500 degrees Celsius) to outgas carbon on the interior surfaces. For a second level coating, a pair of substrates with an amorphous carbon film are outgassed into the chamber. As used herein, a first level coating may be referred to as a first dusting, and a second level coating may be referred to as undergoing a two-dusting process.
[0023] 3B, a graph of the temperature change for the first dusting (left) and the dusting pair (right) is shown. As shown by bar 150, the first dusting produces an average increase in temperature of about 3.5 degrees Celsius, with a standard deviation 151 of approximately 1 degree Celsius. The dusting pair produces a temperature increase 152 of approximately 7 degrees Celsius, with a standard deviation 153 of approximately 1.5 degrees Celsius. Thus, the presence of a carbon film on the interior surfaces of the chamber significantly alters the outcome of the processing operation.
[0024] Referring now to FIG. 4A, a graph of a model of semiconductor processing performance is shown, according to one embodiment. The model may be an artificial intelligence (AI) or machine learning (ML) model of chamber conditions. The model may represent the expected outcome of wafers processed in the chamber. That is, the graph in FIG. 4A may be modeled data; actual wafers do not need to be processed to generate the graph shown in FIG. 4A.
[0025] The X-axis is the number of wafers being processed. For example, in region 464, the first set of wafers is processed. Region 464 represents a clean chamber. In region 465, a first dusting occurs. As shown, the values in the first dusting region 465 decrease to generally between -5 and -10. Region 466 is after a second dusting occurs in the chamber. As shown, the second dusting region 466 has a decreased value between -10 and -15.
[0026] Referring now to FIG. 4B, a model is shown with a graph of wafer performance after cleaning is implemented in the chamber. As shown, the values in region 467 return to approximately the same state shown in region 464 (i.e., a clean chamber). Thus, after the cleaning operation, the chamber's performance can be expected to reset and become within specifications again. In one embodiment, the cleaning operation can be any suitable cleaning process depending on the particular coverage provided by the dusting. In some embodiments, the cleaning process can be a waferless cleaning process. That is, the cleaning process is performed without a substrate or wafer in the chamber.
[0027] Referring now to FIG. 5A, a graph of a chamber's wafer-by-wafer performance is shown, according to one embodiment. The data provided in FIG. 5A can be actual sensor data from multiple substrates processed in the chamber. For example, the data can be from one or more pyrometers in some embodiments. In region 564, the substrate is processed in a substantially clean chamber. In region 565, the substrate is processed in a chamber that has received a first dusting. In region 566, the substrate is processed in a chamber that has received a second dusting. The data shown in FIG. 5A substantially follows the model data shown in FIG. 4A. That is, the modeled process accurately matches the actual results of processing in the chamber. A more detailed description of the model is provided in more detail below.
[0028] As shown in Figure 5B, region 567 is a measurement of performance after a chamber clean. Similar to Figure 4B, the chamber clean resets the performance, so the performance is similar to region 564 of a clean chamber. The cleaning process can be any cleaning process used to clean a particular type of coating. In one embodiment, the chamber cleaning process can be a waferless cleaning process.
[0029] 6, a process flow diagram of a process 670 for monitoring chamber cleanliness is shown, according to one embodiment. In one embodiment, the process is implemented on a fabrication facility (FAB) computer 671 and may be implemented directly on a tool 672. In other embodiments, the entire process 670 may be performed locally on the tool 672, which may be an RTP tool 672 in some embodiments. In one embodiment, recipe and / or lot information 673 may be provided to the tool 672. The recipe and / or lot information 673 may inform a run library 676. The run library 676 may include substrate history (e.g., processes implemented on the substrate, metrology performed on the substrate, etc.). The run library 676 may provide wafer history to a model 678. The run library 676 and model 678 may also have system data 674 inputs. The system data 674 may include sensor data from the tool 672. For example, system data 674 may include voltage values of one or more lamps in the chamber, pyrometer readings of one or more pyrometers in the chamber, pumping data, and data from one or more witness sensors.
[0030] In one embodiment, model 678 can be an AI or ML model. Data obtained from one or more sensors in tool 672 can be used to inform model 678. Model 678 can map chamber conditions. For example, the model can determine the cleanliness state of the chamber. In certain embodiments, a graph similar to the graph in FIG. 4A can be generated by the model to predict the performance of processing a substrate in tool 672. In one embodiment, model 678 can be considered a digital twin of tool 672. As a digital twin, model 678 uses inputs such as system data 674, physics-based equations to model the physics of the tool, etc. to accurately map the performance of tool 672.
[0031] In one embodiment, model 678 may output a performance prediction. The performance prediction may be an estimated wafer outcome from implementing a process in the chamber, such as an oxidation process. In one embodiment, the performance prediction may be sent to performance information block 675 in FAB 671. The performance prediction is then sent to decision block 680. In block 680, the performance prediction is compared to performance limits 677. Performance limits 677 may be an acceptable, worst-case outcome. If the performance prediction is outside performance limits 677 (yes branch), a predicted maintenance message 679 is generated, which is a flag indicating that a cleaning process is needed in the chamber. If the performance prediction is within performance limits 677 (no branch), the next wafer is processed in block 681.
[0032] After the predicted maintenance message 679 is generated, an embodiment may include implementing a cleaning process in the chamber. In one embodiment, the cleaning process may be a waferless cleaning process. For example, a cleaning gas may be flowed into the chamber to etch a coating on the chamber. The cleaning gas may depend on the type of coating on the chamber. In a particular embodiment, the cleaning gas may include hydrogen (H) and oxygen (O). The chamber pressure may be provided at approximately 50 Torr or less. In a particular embodiment, the pressure may be approximately 10 Torr. The duration of the cleaning may depend on the thickness of the coating. For example, a longer duration of the cleaning may be required for a thicker coating. In a particular embodiment, the duration of the cleaning process may be approximately 10 minutes or more.
[0033] In one embodiment, the model may also be used to monitor the cleaning process. For example, the model may be used to indicate when the cleaning process has sufficiently cleaned the chamber so that production substrates can continue to run on the tool. An example of a process for monitoring a chamber cleaning process is shown in FIG. 7.
[0034] Similar to the embodiment in FIG. 6 , process 780 may be implemented both on FAB 781 and locally on tool 782. In other embodiments, process 780 may be performed entirely on tool 782. In one embodiment, recipe and / or lot information 783 may be provided to tool 782. Recipe and / or lot information 783 may inform run library 786. Run library 786 may include substrate history (e.g., processes implemented on the substrate, metrology performed on the substrate, etc.). Run library 786 may provide wafer history to model 788. Run library 786 and model 788 may also have system data 784 inputs. System data 784 may include sensor data from tool 782. For example, system data 784 may include voltage values of one or more lamps in the chamber, pyrometer readings of one or more pyrometers in the chamber, pumping data, and data from one or more witness sensors.
[0035] In one embodiment, model 788 may be an AI or ML model. Model 788 may be substantially similar to model 678, described in more detail above. In one embodiment, model 788 may be a digital twin to model the performance of tool 782.
[0036] In one embodiment, model 788 may output a performance prediction. The performance prediction may be an estimated wafer outcome from implementing a process in the chamber, such as an oxidation process. In one embodiment, the performance prediction may be sent to performance information block 785 in FAB 781. The performance prediction is then sent to decision block 790. In block 790, the performance prediction is compared to performance limits 787. Performance limits 787 may be a best-case outcome indicating a clean chamber. If the performance prediction is within performance limits 787 (yes branch), a maintenance complete message 789 is generated and the cleaning process is complete. If the performance prediction is outside performance limits 787 (no branch), cleaning 791 continues before the next wafer 792 is processed.
[0037] Referring now to FIG. 8 , a block diagram of an exemplary computer system 800 of a processing tool is shown, according to one embodiment. In one embodiment, the computer system 800 is coupled to the processing tool and controls processing in the processing tool. The computer system 800 may be connected to (e.g., networked with) other machines in a local area network (LAN), an intranet, an extranet, or the Internet. The computer system 800 may operate in the capacity of a server machine or a client machine in a client-server network environment, or as a peer machine in a peer-to-peer (or distributed) network environment. The computer system 800 may be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a cellular phone, a web appliance, a server, a network router, switch, or bridge, or any machine capable of executing a set of instructions (sequential or otherwise) that specify actions to be taken by the machine. Furthermore, although only a single machine is shown for computer system 800, the term "machine" is also intended to include any collection of machines (e.g., computers) that individually or together execute a set (or sets) of instructions to perform any one or more of the methodologies described herein.
[0038] Computer system 800 may include a computer program product, or software 822, having a non-transitory machine-readable medium having instructions stored thereon, which can be used to program computer system 800 (or other electronic devices) to perform a process according to an embodiment. A machine-readable medium includes any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer). For example, machine-readable (e.g., computer-readable) media include machine- (e.g., computer) readable storage media (e.g., read-only memory (“ROM”), random-access memory (“RAM”), magnetic disk storage media, optical storage media, flash memory devices, etc.), machine- (e.g., computer) readable transmission media (electrical, optical, acoustic, or other forms of propagated signals (e.g., infrared signals, digital signals, etc.)), etc.
[0039] In one embodiment, computer system 800 includes a system processor 802, a main memory 804 (e.g., read only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM)), a static memory 806 (e.g., flash memory, static random access memory (SRAM)), and a secondary memory 818 (e.g., a data storage device), which communicate with each other via a bus 830.
[0040] The system processor 802 represents one or more general-purpose processing devices, such as a microsystem processor, a central processing unit, etc. More specifically, the system processor may be a complex instruction set computing (CISC) microsystem processor, a reduced instruction set computing (RISC) microsystem processor, a very long instruction word (VLIW) microsystem processor, a system processor implementing other instruction sets, or a system processor implementing a combination of instruction sets. The system processor 802 may also be one or more special-purpose processing devices, such as an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a digital signal system processor (DSP), a network system processor, etc. The system processor 802 is configured to execute processing logic 826 for performing the operations described herein.
[0041] The computer system 800 may further include a system network interface device 808 for communicating with other devices or machines. The computer system 800 may also include a video display unit 810 (e.g., a liquid crystal display (LCD), a light emitting diode display (LED), or a cathode ray tube (CRT)), an alphanumeric input device 812 (e.g., a keyboard), a cursor control device 814 (e.g., a mouse), and a signal generation device 816 (e.g., a speaker).
[0042] The secondary memory 818 may include a machine-accessible storage medium 832 (or more specifically, a computer-readable storage medium) having stored thereon one or more sets of instructions (e.g., software 822) embodying any one or more of the methodologies or functions described herein. The software 822 may also reside, completely or at least partially, within the main memory 804 and / or within the system processor 802 during execution of the software 822 by the computer system 800, with the main memory 804 and the system processor 802 also comprising machine-readable storage media. The software 822 may further be transmitted or received over the network 820 via the system network interface device 808. In one embodiment, the network interface device 808 may operate using RF, optical, acoustic, or inductive coupling.
[0043] While machine-accessible storage medium 832 is shown to be a single medium in the exemplary embodiment, the term "machine-readable storage medium" should be interpreted to include a single medium or multiple media (e.g., centralized or distributed databases, and / or associated caches and servers) that store one or more sets of instructions. The term "machine-readable storage medium" should also be interpreted to include any medium that is capable of storing or encoding a set of instructions for execution by a machine, causing the machine to perform any one or more of the methodologies. The term "machine-readable storage medium" should therefore be interpreted to include, but is not limited to, solid-state memories and optical and magnetic media.
[0044] In the foregoing specification, certain exemplary embodiments have been described. It will be apparent that various modifications may be made thereto without departing from the scope of the following claims. The specification and drawings are, therefore, to be regarded in an illustrative rather than a restrictive sense.
Claims
1. 1. A method for monitoring a chamber condition, comprising: processing a substrate in the chamber; providing substrate history and chamber data to a model of the chamber, wherein the model of the chamber is configured to predict chamber cleanliness; comparing the predicted chamber cleanliness to a performance limit; flagging the chamber for preventative maintenance (PM) when the predicted chamber cleanliness exceeds the performance limit; A method comprising:
2. The method of claim 1 , wherein the substrate history includes a material characterization of a surface of the substrate.
3. The method of claim 2 , wherein the material characterization comprises outgassing potential of the substrate.
4. The method of claim 1 , wherein the chamber data includes voltage values for one or more lamps in the chamber.
5. The method of claim 1 , wherein the chamber data includes pyrometer readings for one or more pyrometers in the chamber.
6. The method of claim 1 , wherein the chamber data includes pumping data.
7. The method of claim 1 , wherein the chamber data includes data from one or more witness sensors.
8. The method of claim 1 , wherein the model of the chamber is a digital twin of the chamber.
9. The method of claim 1 , wherein the chamber is part of a rapid thermal processing (RTP) tool.
10. The method of claim 1 , wherein the PM comprises a chamber cleaning operation.
11. The method of claim 10 , wherein the chamber cleaning operation is a waferless chamber cleaning.
12. The method of claim 10 , wherein the model of the chamber determines when the chamber clean operation is complete.
13. 1. A method for cleaning a chamber, comprising: providing substrate history and chamber data to a model of the chamber, wherein the model of the chamber is configured to predict chamber cleanliness; comparing the predicted chamber cleanliness to a performance limit; cleaning the chamber when the predicted chamber cleanliness does not exceed the performance limit; A method comprising:
14. The method of claim 13 , wherein the model of the chamber is a digital twin.
15. 14. The method of claim 13, wherein the chamber data includes one or more of: voltage values of one or more lamps in the chamber; pyrometer readings of one or more pyrometers in the chamber; pumping data; and data from one or more witness sensors.
16. The method of claim 13 , wherein a maintenance completion message is generated when the predicted chamber cleanliness exceeds the performance limit.
17. The method of claim 13 , wherein the chamber is part of a rapid thermal processing (RTP) tool.
18. The method of claim 13 , wherein cleaning the chamber is a waferless chamber cleaning process.
19. 1. A rapid thermal processing (RTP) tool comprising: a chamber; A reflector plate, a substrate support; an edge ring around the substrate support; a plurality of lamps above the reflector plate; A model of the tool and 1. A rapid thermal processing (RTP) tool comprising: a model of the tool configured to predict chamber cleanliness by comparing the predicted chamber cleanliness to a performance limit; and flagging the chamber for preventive maintenance (PM) when the predicted chamber cleanliness exceeds the performance limit.
20. 20. The RTP tool of claim 19, wherein the model of the tool is a digital twin that includes inputs from at least the plurality of lamps and a plurality of pyrometers.
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