capacitor

The capacitor design with overlapping busbars and alternating polarity winding elements addresses parasitic inductance and resistance issues, ensuring stable performance at high frequencies and voltages by minimizing losses and resonance.

JP2025534709APending Publication Date: 2025-10-17TDK ELECTRONICS AG
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Patent Information

Application Number
JP2025521200
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-10-19
Filing Date
2023-10-12
Publication Date
2025-10-17

AI Technical Summary

Technical Problem

Metallized DC link film capacitors face challenges in operating at high frequencies above 10 kHz due to parasitic inductance and resistance, leading to significant losses and resonance effects.

Method used

The capacitor design incorporates overlapping busbars and alternating polarity winding elements to minimize parasitic inductance and resistance, ensuring uniform current distribution and magnetic flux compensation, resulting in low equivalent series resistance (ESR) and inductance (ESL).

Benefits of technology

The design achieves stable ESR and ESL across frequencies, preventing internal resonance and enhancing performance at high switching frequencies and voltages, making it suitable for power electronics applications.

✦ Generated by Eureka AI based on patent content.

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Abstract

A capacitor including a capacitor unit, the capacitor unit including at least two winding elements (1a, 1b) and first to fourth bus bars (7, 8, 107, 108), the winding elements (1a, 1b) are arranged as a single laminate, the first and second bus bars (7, 8) are arranged on top of each other, the first and second bus bars (7, 8) are arranged on a first side (6a) of the laminate having a surface normal perpendicular to the lamination direction (S), any of the first and second bus bars (7, 8) are connected to the top surfaces of the winding elements (1a, 1b) alternately in the lamination direction (S), and the third, The four bus bars (107, 108) are arranged on top of each other, the third and fourth bus bars (107, 108) are arranged on the second side (6b) of the laminate opposite the first side (6a), and either the third or fourth bus bars (107, 108) are connected to the bottom surfaces of the winding elements (1a, 1b) alternately in the stacking direction (S), the third bus bar (107) is connected to the bottom surface of the winding element (1a, 1b) whose top surface is connected to the second bus bar (8), and the fourth bus bar (108) is connected to the bottom surface of the winding element (1a, 1b) whose top surface is connected to the first bus bar (7).
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Description

[Technical Field]

[0001] The present invention relates to a capacitor, which may in particular be a metallized DC link film capacitor. [Background technology]

[0002] Metallized DC link film capacitors are critical components for many power electronics applications such as renewable energy, electric vehicles, traction equipment, motor drives, uninterruptible power supplies, and energy transmission equipment.

[0003] The requirements for the DC link capacitor depend heavily on the parameters of the semiconductors implemented in the converter connected to the capacitor and the modulation scheme of the converter.

[0004] The development of wide bandgap semiconductors (WBGS) has enabled increased on-state voltages, changing the characteristics of high power converters, for example, allowing higher switching frequencies, higher harmonic frequencies, lighter cooling systems, increased power density, and more compact designs. Summary of the Invention [Problem to be solved by the invention]

[0005] As a result, to operate properly in such applications, capacitors must be able to operate at high frequencies, such as frequencies above 10 kHz, without incurring too many losses due to parasitic inductance and resistance. [Means for solving the problem]

[0006] Provided is a capacitor including at least one capacitor unit, the capacitor unit including at least two winding elements, a first busbar, a second busbar, a third busbar, and a fourth busbar, all of the winding elements of the capacitor unit arranged as a single laminate, the first busbar and the second busbar arranged to overlap each other, the first busbar and the second busbar arranged on a side of the laminate having a plane normal perpendicular to the lamination direction of the laminate, and either the first busbar or the second busbar connected to the top surface of the winding element alternately in the lamination direction, the third busbar and the fourth busbar arranged to overlap each other, the third busbar and the fourth busbar arranged on a side of the laminate opposite to the side on which the first busbar and the second busbar are arranged, and either the third busbar and the fourth busbar connected to the bottom surface of the winding element alternately in the lamination direction, such that the third busbar is connected to the bottom surface of the winding element whose top surface is connected to the second busbar, and the fourth busbar is connected to the bottom surface of the winding element whose top surface is connected to the first busbar. For example, the capacitor unit may include four winding elements.

[0007] Embodiments provide improved capacitors, eg, capacitors with low losses and internal uniformity at high switching frequencies.

[0008] The winding elements may be capacitance units. Each winding element of the capacitor may have the same capacitance. Each winding element may have a first pole of a first polarity (e.g., positive polarity) and a second pole of a second polarity (e.g., negative polarity). Energy can be stored in the winding elements by applying a voltage between the first pole and the second pole.

[0009] Busbars are metal strips or bars configured for localized high current electrical distribution.

[0010] For power capacitors, low inductance between the winding elements is important because high inductance leads to resonance effects and high losses due to parasitic inductance and resistance.

[0011] Overall, uniform inductance can be achieved by ensuring that each winding element has the same capacitance and that each connection from the terminal to the winding element has the same inductance. However, due to design requirements, it is not always possible to provide each winding element with the same inductance. Therefore, rather than matching the inductances, it is proposed to reduce the inductance to a minimum by canceling or weakening the magnetic fields.

[0012] A capacitor in which the first bus bar and the second bus bar overlap each other can have a low equivalent series resistance (ESR), a stable ESR over frequency, a low equivalent series inductance (ESL), and a uniform internal current distribution, thereby avoiding internal resonance.

[0013] The first bus bar and the second bus bar may be arranged such that at least 20% of the area of ​​the first bus bar overlaps with the second bus bar. A thin isolator may be arranged between the bus bars in the overlapping area to prevent short circuits between the bus bars. The thin isolator does not significantly affect the magnetic field.

[0014] The at least two winding elements may be arranged as a stack, with the first bus bar and the second bus bar arranged on a side of the stack. This side of the stack may be perpendicular to the top and bottom surfaces of the stack, and metallizations and connection elements in contact with the winding elements may be arranged on the top and bottom surfaces of the winding elements. The top surface of the stack may be formed by the top surfaces of the winding elements. The bottom surface of the stack may be formed by the bottom surfaces of the winding elements.

[0015] The at least two winding elements may be arranged as a stack, and the first and second busbars may be arranged on at least two sides of the stack, in particular the first and second busbars may completely or partially cover one or more side and / or top and / or bottom surfaces of the stack.

[0016] All winding elements may be arranged in a single stack, or a stack may include two or more winding elements.

[0017] In the stack, the top surface of each winding element may face in the same direction. The bottom surface of each winding element may be opposite the top surface of the winding element. The top surface of the winding element may form the top surface of the stack. The bottom surface of the winding element may form the bottom surface of the stack opposite the top surface of the stack.

[0018] In this embodiment, the windings are alternately connected to both bus bars, so that the polarity of the winding elements alternates along the stacking direction, i.e., each winding element has an opposite polarity compared to its neighboring winding elements in the stacking direction.

[0019] As a result, magnetic flux can be compensated at all connections, including those between winding elements. This results in extremely small parasitic inductance and resistance between winding elements and between winding elements and terminals. By reducing parasitic inductance and resistance, the impedance from the terminals to each winding becomes more uniform between winding elements at each frequency within the capacitor's operating band. This results in low, frequency-stable ESR, low ESL from each terminal pair, uniform internal current distribution, and avoidance of internal resonance, improving the capacitor's performance across the entire band.

[0020] The first busbar may be folded between the laminations and / or the second busbar may be folded between the laminations, and the folds may be formed by rotating each busbar by 180°.

[0021] The winding elements may have a non-circular diameter. In particular, the winding elements may be flat. The flat winding elements may be arranged in a stack so that no dead space exists between the winding elements.

[0022] The capacitor may be a DC link capacitor. The capacitor may be any type of capacitor. For example, the capacitor may be a film capacitor. The capacitor may be a power capacitor.

[0023] The film capacitor may include a metallized film.

[0024] In one embodiment, the first busbar and the second busbar are arranged such that at least 20% of the area of ​​the first busbar overlaps with the second busbar, and the third busbar and the fourth busbar are arranged such that at least 20% of the area of ​​the third busbar overlaps with the fourth busbar.

[0025] In one embodiment, the first busbar and the second busbar are arranged such that current flowing through the first busbar generates a first magnetic field and current flowing through the second busbar generates a second magnetic field, the first and second magnetic fields compensating each other. In one embodiment, the third busbar and the fourth busbar are arranged such that current flowing through the third busbar generates a third magnetic field and current flowing through the fourth busbar generates a fourth magnetic field, the third and fourth magnetic fields compensating each other.

[0026] In one embodiment, each winding element has an "A" pole and a "B" pole, with the "A" pole of each winding element connected to either the first bus bar or the third bus bar, and the "B" pole of each winding element connected to either the second bus bar or the fourth bus bar.

[0027] In one embodiment, each bus bar is directly connected to a winding element, for example by welding or soldering.

[0028] In one embodiment, each busbar of the capacitor unit is connected to the top or bottom surface of a respective winding element.

[0029] In one embodiment, each busbar includes a terminal configured to connect to an external connection, resulting in a unique capacitance element that operates at high performance and avoids the use of internal connections. In particular, there is no need for an internal busbar in addition to the four busbars and terminals of the capacitor unit. Avoiding internal connections, particularly internal busbars, allows for a simple and cost-effective capacitor design and minimizes the number of internal elements. Avoiding internal connections, such as internal busbars, prevents undesirable interactions that may occur between internal and external connections.

[0030] Each bus bar may include a substantially flat metal plate having a tab disposed at a lower end and a terminal disposed at an upper end.

[0031] In one embodiment, each winding element has an opposite polarity compared to adjacent winding elements in the stacking direction of the stack.

[0032] In one embodiment, the winding elements are arranged in a stack such that the top surfaces of the winding elements are located on a first side of the stack and the bottom surfaces of the winding elements are located on a second side of the stack.

[0033] In one embodiment, the winding elements have a non-circular diameter.

[0034] In one embodiment, the capacitor may be a DC link capacitor.

[0035] In another aspect, the capacitor includes two or more capacitor units, each capacitor unit including at least two winding elements, for example, four winding elements, a first bus bar, a second bus bar, a third bus bar, and a fourth bus bar, all of the winding elements of each capacitor unit are arranged as a single laminate, the first bus bar and the second bus bar are arranged to overlap each other, the first bus bar and the second bus bar are arranged on a side of the laminate having a surface normal perpendicular to the lamination direction of the laminate, and either the first bus bar or the second bus bar is The third busbar and the fourth busbar are alternately connected to the top surfaces of the winding elements in the stacking direction, the third busbar and the fourth busbar are arranged so as to overlap each other, the third busbar and the fourth busbar are arranged on a side of the stack opposite to the side on which the first busbar and the second busbar are arranged, and either the third busbar or the fourth busbar is alternately connected to the bottom surfaces of the winding elements in the stacking direction, so that the third busbar is connected to the bottom surface of the winding element whose top surface is connected to the second busbar, and the fourth busbar is connected to the bottom surface of the winding element whose top surface is connected to the first busbar.

[0036] In one embodiment, two or more capacitor units are arranged such that the stacks of the winding elements of each of the two or more capacitor units are arranged in a row, with the stacking directions of the stacks parallel to each other. Alternatively, the capacitor units may be arranged in multiple rows. For example, a capacitor may include four capacitor units, with two units arranged in a first row and two units arranged in a second row parallel to the first row. As another example, a capacitor may include six capacitor units, with three units arranged in a first row and two units arranged in a second row parallel to the first row. Additionally, other numbers of rows and capacitor units are possible.

[0037] In one embodiment, the capacitor includes an encapsulation that surrounds the capacitor unit.

[0038] In one embodiment, in each capacitor unit, each bus bar of the capacitor unit is connected to the top or bottom surface of a respective winding element.

[0039] In one embodiment, each busbar includes a terminal configured to connect to an external connection, resulting in a unique capacitance element that operates at high performance and avoids the use of internal connections. In particular, there is no need for internal busbars in addition to the four busbars and terminals of each capacitor unit. Avoiding internal connections, particularly internal busbars, simplifies and costs the capacitor design, minimizing the number of internal elements. Avoiding internal connections, such as internal busbars, can prevent undesirable interactions that may occur between internal and external connections.

[0040] Each bus bar may include a substantially flat metal plate having a tab disposed at a lower end and a terminal disposed at an upper end.

[0041] In one embodiment, the capacitor may be a DC link capacitor. [Brief explanation of the drawings]

[0042] The present invention will now be described with reference to the drawings.

[0043] [Figure 1] FIG. 1 is a diagram showing a comparison between the ESR of the capacitor of the seventh embodiment and the ESR of a reference capacitor. [Figure 2] FIG. 2 is a diagram showing a reference capacitor. [Figure 3] FIG. 3 shows a capacitor according to a different embodiment. [Figure 4] FIG. 4 further illustrates a capacitor according to a different embodiment. [Figure 5] FIG. 5 further illustrates a capacitor according to a different embodiment. [Figure 6] FIG. 6 further illustrates a capacitor according to a different embodiment. [Figure 7] FIG. 7 further illustrates a capacitor according to a different embodiment. [Figure 8] FIG. 8 further illustrates a capacitor according to a different embodiment. [Figure 9] FIG. 9 further illustrates a capacitor according to a different embodiment. [Figure 10] FIG. 10 further illustrates a capacitor according to a different embodiment. [Figure 11] FIG. 11 further illustrates a capacitor according to a different embodiment. [Figure 12] FIG. 12 further illustrates a capacitor according to a different embodiment. [Figure 13] FIG. 13 further illustrates a capacitor according to a different embodiment. [Figure 14] FIG. 14 further illustrates a capacitor according to a different embodiment. [Figure 15] FIG. 15 further illustrates a capacitor according to a different embodiment. [Figure 16] FIG. 16 further illustrates a capacitor according to a different embodiment. [Figure 17] FIG. 17 further illustrates a capacitor according to a different embodiment. [Figure 18] FIG. 18 further illustrates a capacitor according to a different embodiment. [Figure 19] FIG. 19 further illustrates a capacitor according to a different embodiment. [Figure 20] FIG. 20 further illustrates a capacitor according to a different embodiment. [Figure 21] FIG. 21 further illustrates a capacitor according to a different embodiment. [Figure 22] FIG. 22 further illustrates a capacitor according to a different embodiment. [Figure 23] FIG. 23 further illustrates a capacitor according to a different embodiment. [Figure 24] FIG. 24 further illustrates a capacitor according to a different embodiment. [Figure 25]FIG. 25 further illustrates a capacitor according to a different embodiment. [Figure 26] FIG. 26 further illustrates a capacitor according to a different embodiment. [Figure 27] FIG. 27 further illustrates a capacitor according to a different embodiment. [Figure 28] FIG. 28 further illustrates a capacitor according to a different embodiment. [Figure 29] FIG. 29 further illustrates a capacitor according to a different embodiment. [Figure 30] FIG. 30 further illustrates a capacitor according to a different embodiment. [Figure 31] FIG. 31 further illustrates a capacitor according to a different embodiment. [Figure 32] FIG. 32 further illustrates a capacitor according to a different embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0044] The present invention relates to a capacitor, for example a DC link capacitor, designed for voltages above 600V and switching frequencies above 10kHz.

[0045] The capacitor includes a plurality of winding elements 1. The capacitor may include any number of winding elements 1.

[0046] Each winding element 1 is wound around an axis. The axis extends from the bottom surface 2 of the winding element 1 to the top surface 3 of the winding element 1. The top surface 3 of each winding element 1 is covered with a metallization 4, also known as a Schoop layer. The metallization 4 on the top surface 3 is connected to the first electrode or first group of electrodes of the winding element. The bottom surface 2 of each winding element 1 is also covered with a metallization 4, i.e., a Schoop layer. The metallization 4 on the bottom surface 3 is connected to the second electrode or second group of electrodes of the winding element 1. The metallization 4 on the first electrode and the top surface 3, or the metallization 4 on the first group of electrodes and the top surface 3, forms the first pole of the winding element 1. The metallization 4 on the second electrode and the bottom surface 2, or the metallization 4 on the second group of electrodes and the bottom surface 2, forms the second pole of the winding element 1. During operation of the capacitor 1, a voltage is applied between the first and second poles.

[0047] For ease of visualization, the diagram shows the first pole as "positive" and the second pole as "negative." When an alternating current is applied, the polarization changes continuously.

[0048] On the top surface 3 and bottom surface 2 of each winding element 1, connection elements such as connection stripes or bonding wires may be arranged.

[0049] The winding element 1 has a non-circular cross section, in particular the winding element 1 is flat.

[0050] FIG. 1 is a plot of ESR versus frequency for a capacitor according to an embodiment of the present invention, represented by curve C1, compared to a reference capacitor (represented by curve C2) as shown in FIG. 2, in which the busbars of opposite polarity do not overlap each other. From FIG. 1, it can be seen that the ESR of the reference capacitor is higher than that of the capacitor according to the present embodiment, and that the frequency stability is lower due to non-uniformity of the internal current distribution and internal resonance. In particular, it can be seen that the ESR of the capacitor according to embodiment 7 is significantly lower at frequencies above 10 KHz.

[0051] Figures 3 to 6 show the capacitor according to embodiment 1. Figures 3, 4, and 5 are perspective views of the capacitor according to embodiment 1. Figure 3 shows a first bus bar 7 and a second bus bar 8 of the capacitor. Also, Figure 4 shows an isolator plate 12 disposed between the bus bars 7 and 8.

[0052] The capacitor includes a first busbar 7 and a second busbar 8 that enable contact with the laminations 6 of the winding elements 1. In particular, the first busbar 7 is configured to apply a voltage to a first electrode or a first group of electrodes of each winding element 1. The second busbar 8 is configured to apply a voltage to a second electrode or a second group of electrodes of each winding element 1. The first busbar 7 includes at least one terminal 9. The first busbar 7 is configured to be connected to a pole of an external power supply, such as an insulated gate bipolar transistor (IGBT), via the at least one terminal 9. The second busbar 8 also includes at least one terminal 9. The second busbar 8 is configured to be connected to another pole of an external power supply, such as an insulated gate bipolar transistor (IGBT), via the at least one terminal 9. The first busbar 7 and the second busbar 8 may each include multiple terminals 9.

[0053] A current flowing through the first busbar 7 generates a first magnetic field. A current flowing through the second busbar 8 generates a second magnetic field. Because the first busbar 7 and the second busbar 8 overlap each other and the currents in the first busbar 7 and the second busbar 8 flow in opposite directions, the magnetic fields generated by the first busbar 7 and the second busbar 8 cancel each other out or at least weaken each other. Arranging the busbars 7 and 8 so that they overlap each other reduces the magnetic fields of the busbars 7 and 8. This reduces the inductance of the busbars 7 and 8. Because the inductance from the busbars 7 and 8 to each winding element 1 is very low and uniform and the capacitance of each winding element 1 is equal, the impedance of each winding element 1 is approximately equal. If the impedances of the winding elements 1 were different, a capacitor resonance effect would be unavoidable, especially when applying a high switching frequency exceeding 10 kHz. Because the busbars 7 and 8 overlap, the impedances of each winding element 1 are approximately the same, which prevents a significant resonance effect. This reduces capacitor loss. In particular, parasitic inductance and parasitic resistance are significantly reduced. The impedance from terminal 9 to each winding element 1 is uniform across the entire frequency band. This results in low equivalent series resistance (ESR), stable ESR over frequency, low equivalent series inductance (ESL), and avoidance of internal resonance. This allows the capacitor to operate at voltages exceeding 600 V and switching frequencies exceeding 10 kHz.

[0054] The first busbar 7 is arranged on a first side surface 6a of the laminate 6 and on a second side surface 6b of the laminate 6 opposite the first side surface 6a. The second busbar 8 is also arranged on the first side surface 6a of the laminate 6 and on the second side surface 6b of the laminate 6. The first busbar 7 and the second busbar 8 overlap each other on both sides 6a, 6b. The top surfaces 3 of the winding elements 1 on the first side surface 6a are connected to either the first busbar 7 or the second busbar 8 alternately in the stacking direction. The bottom surfaces 3 of the winding elements 1 on the second side surface 6b are connected to either the first busbar 7 or the second busbar 8 alternately in the stacking direction such that the winding elements 1 whose top surfaces 3 are connected to the first busbar 7 are connected to the second busbar 8 by their bottom surfaces 2, and conversely, the winding elements 1 whose top surfaces 3 are connected to the second busbar 8 are connected to the first busbar 7 by their bottom surfaces 2. By alternately connecting the two bus bars 7, 8 to the winding elements 1, the winding elements 1 have alternate polarities along the lamination direction S. This allows the magnetic fluxes of adjacent winding elements 1 to compensate for each other. The magnetic flux compensation reduces parasitic inductance, parasitic resistance, and negative electromagnetic interaction.

[0055] 7 to 11 show bus bars of a capacitor according to embodiment 2. Fig. 7 shows a first bus bar 7, a second bus bar 8, a third bus bar 107, and a fourth bus bar 108. Fig. 8 shows the first bus bar 7. Fig. 9 shows the third bus bar 107. Fig. 10 shows the second bus bar 8. Fig. 12 shows the fourth bus bar 108.

[0056] The winding elements 1 of the capacitor are arranged in a single stack 6. In the stacking direction S, the polarities of the winding elements 1 alternate.

[0057] The first bus bar 7 and the second bus bar 8 are both arranged on the side surface 6c of the laminate 6. The first bus bar 7 and the second bus bar 8 overlap each other on the first side surface 6a of the laminate.

[0058] When AC current is passed through the capacitor, the direction of the current is reversed in the overlapping portion of the first bus bar 7 and the second bus bar 8. Therefore, the parasitic inductance, parasitic resistance, and negative electromagnetic interaction are low.

[0059] In the stacking direction S, the top surfaces 3 of the winding elements 1 on the first side surface 6a are alternately connected to the first bus bar 7 and the second bus bar 8. In the stacking direction S, the bottom surfaces 3 of the winding elements 1 on the second side surface 6b are alternately connected to the third bus bar 7 and the fourth bus bar 108. The first bus bar 7 and the third bus bar 107 have the same polarity. The second bus bar 8 and the fourth bus bar 108 have the same polarity. The top surface of the winding element 1 of the first group is connected to the first bus bar 7 and the bottom surface is connected to the fourth bus bar 108. The top surface of the winding element 1 of the second group is connected to the second bus bar 8 and the bottom surface is connected to the third bus bar 107. In the stacking direction S, the winding elements of the first group and the winding elements of the second group are alternately arranged.

[0060] By alternately connecting the bus bars to the winding elements 1, the winding elements 1 have alternate polarities along the lamination direction S. This allows the magnetic fluxes of adjacent winding elements 1 to compensate for each other. The magnetic flux compensation reduces parasitic inductance, parasitic resistance, and negative electromagnetic interaction.

[0061] Flux compensation reduces parasitic inductance and resistance between the winding elements 1 and between the winding elements 1 and the terminals. This makes the impedance from the terminals 9 to each winding element 1 more uniform across the entire frequency range, thereby improving the performance of the capacitor across the entire frequency range. In particular, the capacitor has a low and frequency-stable ESR, low ESL from each terminal pair, uniform internal current distribution, and avoidance of internal resonance.

[0062] The bus bars 7, 8, 107, and 108 each have a Z-shaped cross section.

[0063] The first busbar 7 includes a first portion 18, a second portion 19, and a third portion 20. The second portion 19 is disposed between the first portion 18 and the third portion 20. The second portion 19 is perpendicular to each of the first portion 18 and the third portion 20. The first portion 18 and the third portion 20 are parallel to each other. Due to the design of the first portion 18, the second portion 19, and the third portion 20, the cross section of the first busbar 7 is Z-shaped.

[0064] The first portion 18 of the first busbar 7 is a part of the terminal 9 of the first busbar 7. The second portion 19 of the first busbar 7 is arranged on the side surface 6c of the laminate 6. The third portion 20 of the first busbar 7 is arranged on the first side surface 6a of the laminate 6. The third portion 20 includes a pair of two protrusions 21 electrically and mechanically connected to the top surface 3 of the winding element 1. In particular, the third portion 20 includes multiple pairs of two protrusions 21 electrically and mechanically connected to the top surface 3 of every third winding element 1 in the stacking direction S.

[0065] The third busbar 107 is designed similarly to the first busbar 7. In particular, the third busbar 107 also comprises a first portion 18, a second portion 19 and a third portion 20. The third busbar 107 also has a Z-shaped cross section.

[0066] The first portion 18 of the third busbar 107 is a part of the terminal 9 of the third busbar 107. In particular, the terminal 9 is formed by the two first portions 18 of the first busbar 7 and the third busbar 107. The second portion 19 of the third busbar 107 is perpendicular to the first portion 18 and is arranged on the side surface 6c of the laminate 6. The third portion 20 of the third busbar 107 is perpendicular to the second portion 19 and is arranged on the second side surface 6b of the laminate 6. The third portion 20 includes a pair of two protrusions 21 that are electrically and mechanically connected to the bottom surface 2 of the winding element 1. In particular, the third portion 20 includes multiple pairs of two protrusions 21 that are electrically and mechanically connected to the bottom surface 2 of the winding element 1, the top surface 3 of which is not connected to the first busbar 7.

[0067] The second bus bar 8 and the fourth bus bar 108 are formed in the same manner as the first bus bar 7 and the third bus bar 107, and therefore a detailed description thereof will be omitted.

[0068] The first busbar 7 and the second busbar 8 completely overlap each other, except for the protrusions 21 connected to the top surfaces 3 of the winding elements 1. The third busbar 107 and the fourth busbar 108 completely overlap each other, except for the protrusions 21 connected to the bottom surfaces 2 of the winding elements 1. The protrusions 21 are therefore the only parts of the busbars 7, 8, 107, 108 where the electromagnetic flux of each busbar is not compensated by the other busbars. Overall, this results in a very high compensation of the electromagnetic flux within the busbars 7, 8, 107, 108.

[0069] Each busbar includes a number of terminals 9. The terminals 9 are symmetrically distributed along the busbar with respect to the winding elements 1. A symmetrical arrangement of the terminals 9 optimizes the current balance between the winding elements 1. An asymmetrical arrangement of the terminals 9 will result in an imbalance in the current between the winding elements 1, which will degrade the performance of the capacitor.

[0070] When an AC current is applied to the terminals 9 of the bus bars, the AC current flows through each bus bar.

[0071] The Z-shaped cross section of each busbar allows for a large overlap area of ​​the busbars, therefore resulting in very low parasitic inductance, very low parasitic resistance and avoidance of negative electromagnetic interactions.

[0072] The busbars are electrically connected to the midpoint of the top face 3 or bottom face 2 of the winding element 1. The busbars can be adapted to the dimensions of the winding element 1, and in particular can be dimensioned such that they are connected to the midpoint of the top face 3 or bottom face 2, respectively, of the winding element 1, regardless of the dimensions of the winding element 1. This increases the current carrying capacity and the maximum permissible winding size.

[0073] Figures 12 and 13 show a capacitor according to embodiment 3. Figure 14 is a perspective view showing busbars 7 and 8 of the capacitor according to embodiment 3. Figure 15 shows the first busbar 7. Figure 16 shows the third busbar 107. Figure 17 shows the second busbar 8. Figure 18 shows the fourth busbar 108. Figure 19 is a cross-sectional view showing the four busbars 7, 8, 107, and 108.

[0074] The capacitor of embodiment 3 is substantially the same as the capacitor of embodiment 2, and differs from the capacitor of embodiment 2 only in the shape and number of terminals 9. In embodiment 3, the first bus bar 7 and the second bus bar 8 each have only one terminal 9. The terminal 9 is formed by a first portion 18 of each first part 7a, 8a of the bus bars 7, 8 and a first portion 18 of each second part 7b, 8b. Each first portion 18 includes sub-portions that are perpendicular to each other. This forms a bent terminal 9. The bent terminal 9 has a sub-portion that is perpendicular to the side surface 6c of the laminate 6 and a sub-portion that is parallel to the side surface 6c.

[0075] The capacitor of the third embodiment has the same advantages as the capacitor of the second embodiment because the bus bars 7, 8 overlap significantly and the polarities of the winding elements 1 alternate.

[0076] Fig. 20 and Fig. 21 show a capacitor according to embodiment 4. Fig. 22 is a perspective view showing busbars 7, 8, 107, and 108 of the capacitor according to embodiment 4. Fig. 23 is a cross-sectional view showing busbars 7, 8, 107, and 108. Fig. 24 is an enlarged view of a portion of Fig. 23. Fig. 25 shows the first busbar 7. Fig. 26 shows the third busbar 107. Fig. 27 shows the second busbar 8. Fig. 28 shows the fourth busbar 108.

[0077] The capacitor according to embodiment 4 differs from the capacitor according to embodiment 3 in that the terminals 9 are arranged on different side surfaces 6d, i.e., the side surfaces 6d having a surface normal parallel to the stacking direction S, whereas the terminals 9 of the capacitor according to embodiment 3 are arranged on the side surfaces 6c having a surface normal perpendicular to the stacking direction S. The other features of the capacitor according to embodiment 4 are the same as those of the capacitor according to embodiment 3. The capacitor according to embodiment 4 has the same advantages as the capacitors according to embodiments 2 and 3 because the bus bars 7, 8 overlap significantly and the polarities of the winding elements 1 alternate.

[0078] Figure 29 is a perspective view of a fifth embodiment of the capacitor. Figure 30 is a side view of the capacitor according to the fifth embodiment. Figure 31 is a top view of the capacitor according to the fifth embodiment. Figure 32 shows the fifth embodiment of the capacitor, in which the capacitor unit is enclosed within an encapsulation. In Figures 29, 30, and 31, the encapsulation is not shown to better illustrate other features.

[0079] The capacitor according to the fifth embodiment includes two capacitor units 101 and 102. The first capacitor unit 101 will be described below. The second capacitor unit 102 is similarly configured. Each of the capacitor units 101 and 102 includes four winding elements, namely, a first winding element 1a, a second winding element 1b, a third winding element 1c, and a fourth winding element 1d, arranged as a single laminate 6. The winding elements 1a to 1d in the laminate 6 are arranged such that the top surfaces 3 of the winding elements form a first side surface 6a of the laminate 6, and the bottom surfaces 2 of the winding elements 1a to 1d form a second side surface 6b of the laminate 6. The second side surface 6b is located on the opposite side of the first side surface 6a. The stacking direction S of the laminate 6 is perpendicular to the surface normal to the first side surface 6a, and the stacking direction S of the laminate 6 is perpendicular to the surface normal to the second side surface 6b.

[0080] Each capacitor unit includes a first busbar 7, a second busbar 8, a third busbar 107, and a fourth busbar 108. The first busbar 7 and the second busbar 8 are disposed on the first side 6a of the laminate. The first busbar 7 and the second busbar 8 overlap each other. The third busbar 107 and the fourth busbar 108 are disposed on the second side 6b of the laminate. The third busbar 107 and the fourth busbar 108 overlap each other. In the overlapping regions of the busbars 7, 8, 107, and 108, thin isolators are disposed between the busbars to prevent short circuits between the busbars. The overlap between the first busbar 7 and the second busbar 8, and the overlap between the third busbar 107 and the fourth busbar 108, provides a capacitor unit with characteristics suitable for power applications. When a current flows through the first busbar 7, a magnetic field is generated by the current. Furthermore, when a current flows through the second busbar 8, another magnetic field is generated by the current. The overlap of the first busbar 7 and the second busbar 8 causes the magnetic fields to oppose each other, thereby weakening or canceling each other out. Similarly, the overlap of the third busbar 107 and the fourth busbar 108 causes the magnetic fields generated by currents flowing through the third and fourth busbars to oppose each other, thereby weakening or canceling each other out. Therefore, overall, the magnetic field generated when current flows through the busbars is very weak. This reduces the inductance between the connections of the busbars 7, 8, 107, and 108 and the winding elements 1a to 1d. The inductance of the capacitor unit is therefore very small.

[0081]

[0081] The capacitor with overlapping bus bars has low equivalent series resistance (ESR), stable ESR over frequency, low equivalent series inductance (ESL), and uniform internal current distribution, which can avoid internal resonance.

[0082] The first winding element 1a is the outermost winding element of the laminate 6. The second winding element 1b is adjacent to the first winding element 1a in the stacking direction S. The third winding element 1c is adjacent to the second winding element 1b in the stacking direction S. The fourth winding element 1d is adjacent to the third winding element 1c in the stacking direction S. The fourth winding element 1d is the last winding element of the laminate 6 of the first capacitor unit 101.

[0083] The first busbar 7 is connected to the top surface 2 of the first winding element 1a, and the fourth busbar 108 is connected to the bottom surface 3 of the first winding element 1a. The second busbar 8 is connected to the top surface 2 of the second winding element 1b, and the third busbar 107 is connected to the bottom surface 3 of the second winding element 1b. The first busbar 7 is connected to the top surface 2 of the third winding element 1c, and the fourth busbar 108 is connected to the bottom surface 3 of the third winding element 1c. The second busbar 8 is connected to the top surface 2 of the fourth winding element 1d, and the third busbar 107 is connected to the bottom surface 3 of the fourth winding element 1d.

[0084] Each bus bar includes a terminal 9 configured to be connected to an external connection. Thus, each of the capacitor units 101 and 102 includes four terminals 9. Because there are a relatively large number of terminals 9 per capacitor unit (four), the self-inductance of the capacitor unit is very small, which in turn makes the self-inductance of the entire capacitor very small.

[0085] External connections allow a first potential to be applied to the first busbar 7 and the third busbar 107. External connections allow an opposite potential to be applied to the second busbar 8 and the fourth busbar 108. In this case, current flows in opposite directions through adjacent winding elements.

[0086] As a result, the polarities of the winding elements 1a to 1d alternate along the stacking direction S. In other words, in the stacking direction, each winding element has an opposite polarity compared to its adjacent winding elements.

[0087] As a result, magnetic flux is compensated at all connections, including those between the winding elements 1a-1d. This significantly reduces the parasitic inductance and resistance between the winding elements 1a-1d and between the winding elements 1a-1d and the terminal 9. By reducing the parasitic inductance and resistance, the impedance from the terminals to each winding becomes more uniform between the winding elements at each frequency in the capacitor's operating band. This results in improved capacitor performance across the entire band due to low and frequency-stable ESR, low ESL from each terminal pair, uniform internal current distribution, and avoidance of internal resonance.

[0088] Each of the busbars 7, 8, 107, and 108 includes at least two tabs 103. Each busbar is connected to the top surface 2 or bottom surface 3 of a respective winding element 1a-1d via at least one tab 103. Each tab 103 defines a connection point between the winding element 1a-1d and the busbar 7, 8, 107, or 108. Thus, the busbars 7, 8, 107, and 108 are connected to the respective top surface 2 or bottom surface 3. For example, the first busbar 7 is connected to the top surface 2 of the first winding element 1a via at least one tab 103 at at least one connection point, and is further connected to the top surface 2 of the third winding element 1c via at least one tab 103 at at least one connection point.

[0089] The bus bars 7, 8, 107, 108 each comprise a substantially flat metal plate having a tab 103 located at a lower end and a terminal 9 located at an upper end, the terminal 9 being bent at 90° relative to the flat metal plate.

[0090] 29-32, the capacitor includes two identical capacitor units 101, 102. In alternative embodiments, the number of capacitor units may be different. For example, the capacitor may include only one capacitor unit 101. Alternatively, the capacitor may include three or more capacitor units.

[0091] The capacitor further comprises an encapsulation 104 which surrounds all capacitor units 101, 102 of the capacitor such that only the terminals 9 protrude from the encapsulation 104.

[0092] In all the above-described embodiments, the number of winding elements 1 per capacitor can be changed. Also, in all the above-described embodiments, the shape and dimensions of the winding elements 1 can be changed. Furthermore, in each embodiment, the layout of the terminals 9 can be changed. [Explanation of symbols]

[0093] 1 Wire-wound element 1a Wire-wound element 1b Wire-wound element 1c Wire-wound element 1d Wirewound element 2 Bottom 3 Top surface 4 Metallized part 6 Laminate 6a 1st side 6b Second side 6c side 6d Side 7 No. 1 bus bar 7a 1st part 7b 2nd part 8 Second bus bar 8a First part 8b Second part 9 terminals 12 Isolator plate 18 Part 1 19 Part 2 20 Part 3 21 Protrusion 101 Capacitor Unit 102 Capacitor Unit 103 tabs 107 3rd bus bar 108 4th bus bar

Claims

1. at least one capacitor unit; The capacitor unit includes at least two winding elements (1a, 1b), a first busbar (7), a second busbar (8), a third busbar (107), and a fourth busbar (108); all the winding elements (1a, 1b) of the capacitor unit are arranged in a single stack, The first bus bar (7) and the second bus bar (8) are arranged to overlap each other, the first bus bar (7) and the second bus bar (8) are arranged on a first side surface (6a) of the laminate having a surface normal perpendicular to a stacking direction (S) of the laminate, Either the first bus bar (7) or the second bus bar (8) is alternately connected to the top surface of the winding elements (1a, 1b) in the stacking direction (S), The third bus bar (107) and the fourth bus bar (108) are arranged to overlap each other, the third busbar and the fourth busbar (108) are disposed on a second side (6b) of the laminate opposite the first side (6a); A capacitor in which either the third bus bar (107) or the fourth bus bar (108) is connected to the bottom surfaces of the winding elements (1a, 1b) alternately in the stacking direction (S), so that the third bus bar (107) is connected to the bottom surfaces of the winding elements (1a, 1b) whose top surfaces are connected to the second bus bar (8), and the fourth bus bar (108) is connected to the bottom surfaces of the winding elements (1a, 1b) whose top surfaces are connected to the first bus bar (7).

2. The first busbar (7) and the second busbar (8) are arranged such that at least 20% of the area of ​​the first busbar (7) overlaps with the second busbar (8); 2. The capacitor of claim 1, wherein the third busbar (107) and the fourth busbar (108) are arranged such that at least 20% of the area of ​​the third busbar (107) overlaps with the fourth busbar (108).

3. the first busbar (7) and the second busbar (8) are arranged such that a current flowing through the first busbar (7) generates a first magnetic field and a current flowing through the second busbar (8) generates a second magnetic field, the first magnetic field and the second magnetic field compensating each other; 3. The capacitor of claim 1, wherein the third busbar (107) and the fourth busbar (108) are arranged such that a current flowing through the third busbar (107) generates a third magnetic field and a current flowing through the fourth busbar (108) generates a fourth magnetic field, and the third magnetic field and the fourth magnetic field compensate each other.

4. Each of said winding elements has an "A" pole and a "B" pole; The "A" pole of each of the winding elements is connected to the first busbar (7) or the third busbar (107); A capacitor according to any one of claims 1 to 3, wherein the "B" pole of each of the winding elements is connected to the second busbar (8) or the fourth busbar (108).

5. A capacitor according to any one of claims 1 to 4, wherein each busbar is directly connected to the winding element (1a, 1b), for example by welding or soldering.

6. A capacitor according to any one of claims 1 to 5, wherein each busbar (7, 8, 107, 108) of the capacitor unit is connected to the top or bottom surface of a respective winding element.

7. A capacitor according to any one of the preceding claims, wherein each busbar (7, 8, 107, 108) comprises a terminal (9) adapted to be connected to an external connection.

8. 8. The capacitor of claim 1, wherein each busbar (7, 8, 107, 108) comprises a substantially flat metal plate having a tab (103) located at a lower end and the terminal (9) located at an upper end.

9. The capacitor of any one of claims 1 to 8, which does not include any internal connections.

10. 10. The capacitor according to claim 1, wherein each of the winding elements (1a, 1b) has an opposite polarity compared to the adjacent winding elements (1a, 1b) in the stacking direction (S) of the stack.

11. 11. The capacitor according to claim 1, wherein the winding elements (1a, 1b) are arranged in the stack such that the top surfaces of the winding elements (1a, 1b) are arranged on the first side (6a) of the stack and the bottom surfaces of the winding elements (1a, 1b) are arranged on the second side (6b) of the stack.

12. Capacitor according to any one of the preceding claims, wherein the winding elements (1a, 1b) have a non-circular diameter.

13. A capacitor according to any preceding claim, comprising an encapsulation surrounding the capacitor unit.

14. two or more capacitor units; Each of the capacitor units includes at least two winding elements (1a, 1b), a first busbar (7), a second busbar (8), a third busbar (107), and a fourth busbar (108); all winding elements (1a, 1b) of each of said capacitor units are arranged in a single stack; The first bus bar (7) and the second bus bar (8) are arranged to overlap each other, the first bus bar (7) and the second bus bar (8) are arranged on a first side surface (6a) of the laminate having a surface normal perpendicular to a stacking direction (S) of the laminate, Either the first bus bar (7) or the second bus bar (8) is alternately connected to the top surface of the winding elements (1a, 1b) in the stacking direction (S), The third bus bar (107) and the fourth bus bar (108) are arranged to overlap each other, the third busbar and the fourth busbar (108) are disposed on a second side (6b) of the laminate opposite the first side (6a); A capacitor in which either the third bus bar (107) or the fourth bus bar (108) is connected to the bottom surfaces of the winding elements (1a, 1b) alternately in the stacking direction (S), so that the third bus bar (107) is connected to the bottom surfaces of the winding elements (1a, 1b) whose top surfaces are connected to the second bus bar (8), and the fourth bus bar (108) is connected to the bottom surfaces of the winding elements (1a, 1b) whose top surfaces are connected to the first bus bar (7).

15. 15. The capacitor of claim 14, wherein the two or more capacitor units are arranged such that the stacks of the winding elements (1a, 1b) of each of the two or more capacitor units are arranged in one or more rows, and the stacking directions (S) of the stacks are parallel to each other.

16. 16. A capacitor according to claim 14 or 15, comprising an encapsulation surrounding the capacitor unit.

17. The capacitor of any one of claims 14 to 16, wherein in each capacitor unit, each bus bar of the capacitor unit is connected to the top surface or the bottom surface of a respective winding element.

18. A capacitor according to any one of claims 14 to 17, wherein each busbar comprises a terminal (9) adapted to be connected to an external connection.

19. 19. The capacitor of any one of claims 14 to 18, wherein each busbar (7, 8, 107, 108) comprises a substantially flat metal plate having a tab (103) located at a lower end and the terminal (9) located at an upper end.

20. The capacitor of any one of claims 14 to 19, which does not include any internal connections.

Citation Information

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