Secure Data Wiping of Solid State Drives for Reuse and Recycling

Abstract

The process for securely erasing data from a solid-state drive (SSD) involves first generating a restoration image of the information stored on the drive, such as a factory image, that characterizes the restored state of the drive before user data is stored on the drive. Next, energy is applied to the drive, such as by applying thermal energy or high-energy electromagnetic radiation, to encourage electrons representing bits in corresponding memory cells to leave the cells. Generating a set of quantitative data to present to the user to verify the erasure of the data also helps ensure confidence in the data wipe process. The drive may also be electrically erased before energizing the SSD to provide another level of confidence in the data wipe process. The restoration image may then be loaded into the desired location on the wiped drive to restore drive functionality.

Description

[Technical Field]

[0001] (CROSS-REFERENCE TO RELATED APPLICATIONS) This application claims priority to U.S. Provisional Patent Application No. 63 / 523,889, filed June 28, 2023, the entire contents of which are incorporated herein by reference for all purposes, including U.S. Non-Provisional Patent Application No. 18 / 230,145, entitled "SOLID-STATE DRIVE SECURE DATA WIPING FOR REUSE AND RECYCLING," filed with the U.S. Patent and Trademark Office on August 3, 2023.

[0002] FIELD OF THE INVENTION Embodiments of the present invention may relate generally to data storage systems and, more particularly, to techniques for securely wiping solid-state drives. [Background technology]

[0003] A solid-state drive (SSD) is a type of data storage device configured to persistently store data on interconnected, non-volatile, solid-state flash memory chips that can be electrically erased and reprogrammed. There are two main types of flash memory: NAND (not-and) flash and NOR flash, named after the NAND and NOR logic gates, respectively. Both types of flash generally utilize floating-gate transistors (FGTs) containing charge-trapping cells, each of which holds a charge representing a single bit of data, e.g., a "1" for a charged cell and a "0" for an uncharged cell. SSDs may typically use single-level cells, multi-level cells, and / or triple-level cells; for example, single-level cells (SLC) can hold one bit of data at a time, multi-level cells (MLC or alternatively, double-level cells) can hold two bits of data per cell, and triple-level cells (TLC) can hold three bits of data per cell.

[0004] With the proliferation of robust digital data storage, robust and reliable data erasure (or "wiping" of data storage devices) is desirable. The reliability and reliability of digital data erasure is especially important in the context of reuse and recycling of storage devices, where protecting one's data from others is paramount. In the context of magnetic recording hard disk drives (HDDs), when a customer degausses a standard HDD, the data is reliably erased from the drive. This allows recycling to occur with confidence that the drive will leave the data center without data. However, with SSDs, while this level of reliability may exist, it may not be worthwhile.

[0005] Any approach that may be described in this section is an approach that could be pursued, but not necessarily an approach that has been previously conceived or pursued. Thus, unless otherwise indicated, it should not be assumed that any approach described in this section qualifies as prior art merely by virtue of its inclusion in this section. [Brief explanation of the drawings]

[0006] Embodiments are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings, in which like reference numerals refer to similar elements and in which: [Figure 1] 1 is a block diagram illustrating a solid-state drive (SSD) according to one embodiment of the present invention. [Figure 2] FIG. 1 is a flow diagram illustrating a method for erasing data from a solid-state drive (SSD) according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0007] A technique for reliably erasing data from a solid-state drive (SSD) is described. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the embodiments of the invention described herein. It will be apparent, however, that the embodiments of the invention described herein may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring the embodiments of the invention described herein.

[0008] Introduction term References herein to "one embodiment," "one embodiment," etc. are intended to mean that the particular feature, structure, or characteristic being described is included in at least one embodiment of the invention. However, instances of such phrases do not necessarily all refer to the same embodiment.

[0009] As used herein, the term "substantially" is understood to describe features that are largely or approximately structured, configured, dimensioned, etc., although manufacturing tolerances and the like may in practice result in situations where the structure, configuration, dimensions, etc. are not always or necessarily exactly as described. For example, describing a structure as "substantially vertical" gives the term its plain meaning, i.e., the sidewalls are practically vertical, but not necessarily at exactly 90 degrees throughout.

[0010] Terms such as "optimal," "optimization," "minimum," "minimization," "maximum," and "maximization" may not have specific values ​​associated with them, and when such terms are used herein, those skilled in the art are intended to understand that such terms include influencing a value, parameter, metric, etc., in a beneficial direction consistent with the entirety of this disclosure. For example, describing a value as "minimum" should be understood in a practical sense, in that the value need not actually be equal to some theoretical minimum value (e.g., 0), but the corresponding goal is to move the value in a beneficial direction toward the theoretical minimum.

[0011] situation Recall that the reliability and reliability of digital data erasure are considered important in the context of storage device reuse and recycling, where protecting one's data from others is paramount. Known techniques for erasing or "wiping" solid-state drives (SSDs) include erasing encryption keys corresponding to data stored in encrypted form on the SSD and "electrical wiping," which electrically erases or overwrites the stored data. With regard to encryption key wiping, this methodology is declining in use and popularity as computing power advances and technologies like quantum computing emerge, as it becomes increasingly likely that wiping keys will not fully protect stored data to the desired level of reliability. With regard to electrical wiping, while this is considered a fairly secure method, one issue is that data erasure is performed by the device itself, which requires trust in the device firmware to successfully wipe all of the data, making trust in a data security context susceptible to mistakes by the other. For example, firmware erasure algorithms may also exclude certain storage areas, such as logs, bad blocks, and metadata locations, which may contain sensitive information. Furthermore, erasure may not be complete; for example, even if erasure is performed by overwriting or electrical erasure, some of the original data may remain on the device in some form. Additionally, there may be hardware issues, such as a failed NAND pump, problems with the block select gate, or other physical defects that prevent erasure from occurring. While both of these techniques maintain device functionality, they require device reliability and functionality. As a result, many facilities and users resort to destructive methods, such as drilling the ASIC and / or memory package. While this technique is very secure when performed properly, it is clearly destructive and not very effective in terms of reusing the device or its subcomponents.

[0012] Secure and reliable erasure of solid-state drives 2 is a flow diagram illustrating a method for erasing data from a solid-state drive (SSD) according to one embodiment of the present invention. Erasing data from an SSD (or "device" or "drive") may commonly be referred to as wiping the device, wiping, etc.

[0013] In block 202, a restoration image of the information stored on the SSD is generated, characterizing the restored state of the SSD before user data was stored on the SSD. According to one embodiment, the restoration image includes a "backup" factory image of essential information, i.e., generated by the manufacturer at the manufacturing facility as a snapshot for restoring the SSD to its original factory condition or state. Such an image may include, by way of non-limiting example, firmware, bad block maps, configuration data, NAND ROM, etc. Furthermore, this restoration image may have the added benefit of being able to restore functionality of the storage device that has fallen into a state from which it cannot be easily recovered.

[0014] According to one embodiment, this information, represented in the restoration image, is provided to the customer / user via a web portal so that the device can be re-imaged after all data has been completely wiped. For example, a simple portal can be established to allow someone to easily retrieve an image at any time by providing a request for an image based on the model number and serial number (and possibly other unique information listed on the label). Additionally and / or alternatively, if the device is formatted, this restoration image (and, for example, a recovery utility) can be stored on the device and shipped with the device. The restoration image can then be extracted by a downloadable utility in conjunction with device deployment. Furthermore, the restoration image could be sent in bulk or otherwise provided or shared with data center customers. Regardless of the means by which this information is provided to the customer, the image only needs to exist before the customer loads sensitive user data onto the device.

[0015] In optional block 204 (shown with a dashed box to indicate its optionality), the SSD is electrically erased. For example, one technique for electrically erasing an SSD is to set the voltage level on the memory cells to a level higher than the standard operating voltage (e.g., at or slightly higher than the highest NAND state), and then, once the memory cells are all at this high level / state (in a tight distribution), reduce the voltage to 0 or near 0 (e.g., an erased state where all bits read "0"). Alternatively, all bits can be set to "1," effectively erasing the stored data. Performing this electrical wipe provides confidence that if anything goes wrong in subsequent processes (e.g., thermal baking or X-ray processes), the data is likely already gone anyway. Performing this electrical wipe is expected to eliminate any remaining distributions in the NAND that may reveal, to some extent, what data was previously stored on the device. Note that the foregoing may apply more to SLC than other types of NAND (voltage) distributions.

[0016] According to one embodiment, the electrical wipe procedure may employ small gate steps and verify after each pulse (and before the first pulse) to ensure minimal spreading of the NAND distribution. Additionally, the procedure may begin with block-level or multi-block pulses to rapidly move data closer to the top of the range and accelerate the wiping process. The deeper this electrical erase (block 204) is, the more energy-efficient the subsequent wiping process can be. However, for reliability of what inputs are required in the subsequent process (block 206) (e.g., bake time and temperature for a thermal wipe, frequency / energy level and duration for an electromagnetic energy wipe), a shallower erase is more likely to be electrically achievable and easily verified.

[0017] According to one embodiment, information (e.g., quantitative data) about or regarding the electrical wipe of memory cells of an SSD (block 204) can be collected and used to provide verification of the erasure of user data from the SSD. As a non-limiting example, the number of stuck bits (e.g., bits that failed to erase) across multiple blocks (e.g., equidistant blocks) can be counted, averaged across the device, and presented as a "stuck bits" metric or signature for the device. This metric can thus provide the user with a level of confidence that the electrical wipe was effective. Furthermore, a particular density of stuck bits across some distribution of blocks can indicate areas where actual data storage was not possible / reliable in the first place.

[0018] In block 206, energy is applied to the SSD to encourage electrons representing bits in corresponding memory cells of the SSD to exit the cells. According to one embodiment, in block 206, thermal energy is applied to the SSD, e.g., thereby baking the device (generally, the device is "processed"). While applying thermal effects to NAND is known in the context of characterization processes such as to collect activation energy, sector failure rate, VT (threshold voltage) shift, etc., and data retention bake testing is known in the context of ensuring the ability of memory cell floating gates to retain data, in block 206 the SSD is effectively "over-fired" at a temperature and / or duration that exceeds temperatures and / or durations that might normally be used for device characterization and / or data retention testing.

[0019] In electrically erasable devices like NAND memory, floating cells are programmed by tunneling electrons through a tunnel oxide to a floating gate. Because the average energy of a solid and its components (atoms, electrons, etc.) is directly related to its temperature, temperature has a significant effect on the energy state of electrons in semiconductors, which in turn significantly affects the behavior of electronic devices. Generally, the higher the temperature, the more thermal energy is available for use by atoms and electrons, promoting more electrons from lower states to higher states. More specifically, on one side of the energy barrier in a floating gate memory cell, there are electrons with a distribution of energies. Some have enough energy to escape over the top of the barrier, and as the temperature increases, more electrons gain the energy necessary to overcome the tunnel oxide barrier. Here, in block 206, energy applied to the SSD is intended to intentionally promote trapped electrons to a high enough energy state to exit the memory cell by overcoming, or leaving, or essentially "jumping over," the tunnel oxide barrier, thereby effectively erasing the memory cell. Further, the SSD may be (iteratively) processed as in block 206 to determine or verify or confirm the current erasure level, and then, in response to the SSD not having reached the desired erasure level, the processing in block 206 may be repeated as necessary until the desired (particular) erasure level is achieved.

[0020] Another form of non-volatile memory is phase change memory (PCM), which stores data by changing the state of the material used between an amorphous state and a crystalline state. The amorphous state corresponds to a disordered phase, whereby the material has a relatively high electrical resistance, and the crystalline state corresponds to an ordered phase, whereby the material has a relatively low resistance. Accordingly, techniques described throughout this specification are further contemplated for heat treating data storage devices that include and utilize phase change memory and for erasing such memory.

[0021] According to one embodiment, a thermal profile corresponding to the SSD is provided (e.g., to a party performing the process of FIG. 2 ), the thermal profile characterizing or specifying the temperature versus duration (e.g., ranges of each) at which electrons are promoted to leave the cells for thermal erasure purposes. For example, based on which temperature a user desires to utilize, the activation energy for that corresponding temperature range can be selected and the duration required for firing can be predicted. Such a thermal profile can allow for input or correlation of various factors, such as NAND age, electrical wipe conditions, previous firings, and the desired erase level up to and including the minimum threshold voltage to which the flash device can advance.

[0022] In practical situations, users may prefer to process multiple SSDs at once rather than individually. As a non-limiting example, multiple devices may be placed in a chamber in the exhaust path of a data center (e.g., for environmental impact efficiency purposes), in which case the amount of thermal bake each device receives may vary significantly, and therefore the amount of time it is treated may vary. Additional variables include the possibility that each NAND may have different inherent characteristics, and that different devices may have different wear levels associated with them, all of which may affect treatment time. Therefore, the iterative treatment approach described above may be particularly beneficial in such SSD group treatment situations.

[0023] According to another embodiment, in block 206, high-energy electromagnetic radiation is applied to the SSD to promote the exit of electrons representing bits in corresponding memory cells of the SSD. According to one embodiment, X-rays are applied to the SSD for this purpose. One way to characterize the electromagnetic (EM) spectrum is based on corresponding photon energies measured in electron volts (eV), with X-ray photons generally considered to have energies ranging from 100 eV to 100,000 eV (or 100 keV), or wavelengths ranging from 0.01 to 10 nm (nanometers), and thus frequencies ranging from 3×10 19 to 3×10 16 Hz (hertz) (i.e., 30 petahertz to 30 exahertz). Like thermal energy, X-rays significantly affect the energy state of electrons in the semiconductor, thereby promoting them to higher energy states and providing the energy necessary to overcome the tunnel oxide barrier and effectively erase the memory cell. Similar to the thermal profile, according to one embodiment, an electromagnetic (EM) radiation profile corresponding to the SSD is provided, which characterizes or specifies EM energy levels versus durations (e.g., ranges of each) for promoting electrons to exit the cells for EM erasure purposes.

[0024] In both types of processing (e.g., thermal and high-energy EM), there are certain cells that you may not want to erase, such as cells containing NAND parameters, manufacturing dates, etc. (non-user data). While the recovery information (block 202) corresponding to the restored image can help with the NAND parameters, according to one embodiment, these cells may be preconditioned or boosted to a higher voltage so that they are more likely to survive further processing while still retaining information (e.g., not being cycled), as opposed to being completely wiped of user data. This may serve as an alternative implementation to generating the restored image in block 202. Furthermore, in response to using the aforementioned iterative process, these cells may be “touched up” at each erase verify activity. Touch-up generally involves reading (i.e., sensing) their threshold voltages and then applying the appropriate voltages to program them to the target verify, which is substantially similar to normal programming but with stricter requirements and finer stepping. Similarly, select gates exist on every block that do not contain information but have a threshold set by the charge in the NAND charge trapping layer (e.g., these are effectively NAND cells that have a different voltage but do not carry information) and these need to be restored to the appropriate threshold voltage to function properly.

[0025] In block 208, a set of quantitative data (generally, information) for verifying the erasure of user data from the SSD is generated. As described, reliability of digital data erasure is considered important, especially in the context of reuse and recycling of storage devices (e.g., SSDs). Therefore, robust statistical verification of data erasure can help instill confidence that the erasure process was properly successful. For example, as described elsewhere herein, according to one embodiment, quantitative data is collected for or regarding an optional electrical wipe of memory cells of the SSD (block 204) and can be used to provide verification of the erasure of user data from the SSD. Further herein, according to one embodiment, quantitative data is collected for or regarding a thermal and / or high-energy radiation wipe of memory cells of the SSD (block 206) and can be used to provide verification of the erasure of user data from the SSD. In each case, generating quantitative data for verifying erasure in block 208 may include generating such quantitative data for either or both the electronic wipe and the thermal and / or high-energy radiation wipe, if implemented.

[0026] According to embodiments, such quantitative data may include, by way of non-limiting example, (i) how many cells out of all cells failed to read erased (the number of “stuck bits” that were very likely also stuck during data programming and therefore do not tell us anything about their intended value); (ii) the distribution of sectors with cells containing non-erased data; (iii) a count of stuck cells / columns, which can be detected by looking for the same cell stuck in multiple word lines / columns; (iv) a count of stuck word lines / blocks, which can be detected by looking at word lines or blocks that were not erased; (v) a distinction between cells in factory bad blocks that never held user data and blocks that did hold user data; and (vi) a distinction between cells that failed to read as erased due to block / column / word line failures, where such cells are actually erased in response to being properly fired / zapped but are not capable of being read as erased. Additionally, "before and after" data (e.g., bitmaps representing the distribution of stuck bits) for either or both the electrical erase (block 204) and thermal / EM erase (block 206) can be valuable in convincing a customer of the success of the erase, such as if a user desires additional data to determine for themselves whether the data was sufficiently erased because a user-specified threshold was exceeded. For example, if statistics about the bits are collected at the beginning of the process, after moving all bits electrically to the high state, after moving all bits to the low state, and / or after thermal / X-ray wiping the drive, the user can gain confidence by seeing that the actual programmed data (e.g., excluding stuck bits) was indeed erased by the process.

[0027] Finally, after the aforementioned data wipe process is complete, the restored image from block 202 may be loaded into the required location on the wiped SSD to restore functionality.

[0028] Because secure and reliable SSD data erasure is largely assured through the aforementioned process, the wiped SSD may be reused / repurposed / refurbished by the same user, or by additional users if the device is resold or otherwise transferred. Additionally, such wiped SSDs may be recycled so that valuable components such as NAND and DRAM can find new use in other products.

[0029] Solid State Drive Configuration As described, embodiments may be used in the context of solid-state drives (SSDs). Accordingly, FIG. 1 is a block diagram illustrating an exemplary operating context in which embodiments of the present invention may be implemented. FIG. 1 illustrates a generic SSD architecture 150 having an SSD 152 communicatively coupled to a host 154 via a primary communication interface 156 ("primary interface 156"). Embodiments are not limited to the configuration illustrated in FIG. 1; rather, embodiments may be implemented using SSD configurations other than those illustrated in FIG. 1. For example, embodiments may be implemented to operate in other environments that rely on non-volatile memory storage components for writing and reading data.

[0030] Host 154 broadly represents any type of computing hardware, software, or firmware (or any combination of the above) that makes data I / O requests or calls to, among other things, one or more memory devices. For example, host 154 may be embodied in a hardware machine (such as, by way of non-limiting example, a computer or hardware server) on which executable code is executed, or as software instructions executable by one or more processors (such as, by way of non-limiting example, a software server, such as a database server, application server, media server, etc.). Host 154 interacts with SSD 152 through a primary interface 156 (e.g., a physical and electrical I / O interface) to transfer data to and from SSD 152, such as, by way of non-limiting example, via a network such as Ethernet or Wi-Fi, or a communications bus standard such as Serial Advanced Technology Attachment (SATA), Peripheral Component Interconnect (PCIe), Small Computer System Interface (SCSI), or Serial Attached SCSI (SAS). Host 154 may be an operating system running on a computer, tablet, mobile phone, or generally any type of computing device that includes or interacts with memory, in which case primary interface 156 coupling host 154 to SSD 152 may be, for example, an internal bus of the storage system, or a communications cable, or a wireless communications link, etc.

[0031] The exemplary SSD 152 shown in FIG. 1 includes an interface 160, a controller 162 (e.g., a controller having firmware logic therein), an addressing 164 functional block, a data buffer cache 166, and one or more non-volatile memory components 170a, 170b-170n.

[0032] Interface 160 is a point of interaction between components—in this case, SSD 152 and host 154—and is applicable at both the hardware and software levels. It allows components to communicate with other components via input / output (I / O) systems and associated protocols. Hardware interfaces are typically described by the mechanical, electrical, and logical signals at the interface and the protocols for sequencing them, such as the aforementioned common and standard interfaces, including SATA, PCIe, SCSI, and SAS.

[0033] SSD 152 includes controller 162, which incorporates electronics that connect nonvolatile memory components to a host, such as connecting nonvolatile memories 170a, 170b, and 170n to host 154. Controllers are typically embedded processors that execute firmware-level code and are a critical element in SSD performance. Processes, functions, procedures, acts, method steps, etc., performed or described herein as executable by a storage device controller, such as controller 162, include implementation through the execution of one or more instruction sequences stored in one or more memory units, which, when performed by one or more processors, cause such execution. For example, according to one embodiment, controller 162 may comprise an application-specific integrated circuit (ASIC) that includes at least one memory unit for storing such instructions (such as, by way of non-limiting example, firmware) and at least one processor for executing such instructions. More broadly, SSD controller 162 may be embodied in any form and / or combination of software, hardware, and firmware. An electronic controller in this context typically includes circuitry such as one or more processors for carrying out instructions and may be implemented as a system-on-chip (SoC) electronic circuitry that may include, by way of non-limiting example, memory, a microcontroller, a digital signal processor (DSP), an ASIC, a field programmable gate array (FPGA), hardwired logic, analog circuitry, and / or combinations thereof. Firmware, i.e., executable logic (e.g., programming code) that may be stored in or loaded into SSD volatile memory 171, includes machine-executable instructions that are carried out by controller 162 in operating each SSD 152.

[0034] Controller 162 interfaces with non-volatile memory 170a, 170b, 170n via addressing 164 function block. Addressing 164 function operates, for example, to manage mapping between logical block addresses (LBAs) from host 154 and corresponding physical block addresses on SSD 152, i.e., in non-volatile memory 170a, 170b, 170n of SSD 152. Because non-volatile memory pages and host sectors are different sizes, the SSD must build and maintain a data structure that allows it to translate between the host writing data to or reading data from a sector and the physical non-volatile memory page where that data is actually located. This table structure or "mapping" may be built and maintained for a session in the SSD's volatile memory 171, such as DRAM (dynamic random access memory), or some other local volatile memory component accessible to controller 162 and addressing 164. Alternatively, the table structure may be maintained more persistently across sessions in non-volatile memory of an SSD, such as non-volatile memories 170a, 170b-170n.

[0035] Addressing 164 interacts with non-volatile memory 170a, 170b-170n as well as data buffer cache 166. Data buffer cache 166 of SSD 152 typically uses DRAM as a cache, similar to the cache in a hard disk drive. Data buffer cache 166 acts as a buffer or staging area for data transmission between non-volatile memory 170a, 170b-170n components, as well as a cache to speed up future requests for cached data. Data buffer cache 166 is typically implemented using volatile memory, so data stored therein is not permanently stored in the cache, i.e., the data is not persistent.

[0036] Finally, SSD 152 includes one or more non-volatile memory components 170a, 170b, 170n. As a non-limiting example, non-volatile memory components 170a, 170b, 170n may be implemented as flash memory (e.g., NAND (NOT-AND) or NOR flash) or other types of solid-state memory available now or in the future. Non-volatile memory components 170a, 170b, 170n are the actual memory electronic components where data is persistently stored. Non-volatile memory components 170a, 170b, 170n of SSD 152 can be thought of as analogous to magnetic recording media disks in a hard disk drive (HDD) storage device.

[0037] Furthermore, references to data storage devices herein may encompass multimedia storage devices (or "multimedia devices," sometimes referred to as "multi-layer devices" or "hybrid drives"). A multimedia storage device generally refers to a storage device having the functionality of both a traditional HDD combined with an SSD (see, e.g., SSD 152) that uses non-volatile memory such as electrically erasable and programmable flash or other solid-state (e.g., integrated circuit) memory. Because the operation, management, and control of different types of storage media generally differ, the solid-state portion of a hybrid drive may include its own corresponding controller functionality or may be integrated with the HDD functionality into a single controller. A multimedia storage device may be designed and configured to operate and utilize the solid-state portion in many ways, such as, by using the solid-state memory as cache memory, to store frequently accessed data, to store I / O-intensive data, or to store metadata corresponding to payload data (e.g., to assist in decoding the payload data), as non-limiting examples. Furthermore, a multimedia storage device may be designed and configured essentially as two storage devices in a single enclosure, i.e., a traditional HDD and an SSD, with either one or more interfaces for host connection.

[0038] Extensions and Alternatives In the foregoing description, embodiments of the present invention have been described with reference to numerous specific details that may vary from implementation to implementation. Accordingly, various modifications and changes may be made without departing from the broader spirit and scope of the embodiments. Accordingly, the sole and exclusive indication of what the invention is and what the applicant intends the invention to be is the set of claims issuing from this application, having the specific form in which such claims issue, including any subsequent amendments. Any definitions expressly set forth in this specification for terms contained in the claims shall control the meaning of such terms used in the claims. Accordingly, no limitation, element, characteristic, feature, advantage, or attribute not expressly recited in a claim should limit the scope of the claim in any respect. Accordingly, the specification and drawings are to be regarded in an illustrative and not a restrictive sense.

[0039] Additionally, this description may describe certain process steps in a particular order and may use alphabetic and alphanumeric labels to identify certain steps. Unless specifically stated in the description, embodiments are not necessarily limited to a particular order for performing such steps. In particular, labels are used merely to conveniently identify steps and are not intended to specify or require a particular order for performing such steps.

Claims

1. 1. A method for erasing data from a solid state drive (SSD), comprising: generating a restored image of information stored on the SSD, the restored image characterizing a restored state of the SSD before user data was stored on the SSD; providing energy to the SSD to encourage electrons representing bits in corresponding memory cells of the SSD to exit the cells; generating a set of quantitative data for verifying erasure of user data from the SSD; A method comprising:

2. Prior to energizing the SSD, electrically erasing the SSD by setting the voltage level of the memory cells to a level higher than a standard operating voltage and then bringing the voltage to approximately zero. The method of claim 1 further comprising:

3. collecting quantitative data regarding the electrical erasure of the memory cells; generating the set of quantitative data includes including the quantitative data regarding the electrical erasure in the set of quantitative data. The method of claim 2 further comprising:

4. Providing the restored image to a user of the SSD. The method of claim 1 further comprising:

5. 10. The method of claim 1, wherein applying energy to the SSD to promote the electrons comprises applying thermal energy to the SSD.

6. providing a thermal profile corresponding to the SSD that characterizes temperature versus duration for promoting the electrons to exit the cells; The method of claim 5 further comprising:

7. 10. The method of claim 1, wherein applying energy to the SSD to promote the electrons comprises applying high energy electromagnetic radiation to the SSD.

8. providing an electromagnetic radiation profile corresponding to the SSD, characterizing an electromagnetic energy level versus duration for promoting the electrons from the cell; The method of claim 7 further comprising:

9. collecting quantitative data regarding the application of energy to the memory cells of the SSD; generating the set of quantitative data includes including the quantitative data related to the application of energy in the set of quantitative data. The method of claim 1 further comprising:

10. Providing energy to the SSD to promote the electrons includes: applying energy to a group of a plurality of SSDs to encourage the electrons representing bits in corresponding memory cells of the SSDs to exit the cells; identifying a subset of the group of SSDs that have not reached a particular erasure level; providing increased energy to the subset of SSDs; The method of claim 1 , comprising:

11. Prior to energizing the SSD, preconditioning specific cells of the SSD by raising the voltage to a higher level to make it more difficult for the electrons corresponding to those specific cells to escape; Returning the particular cell to a desired threshold voltage after energizing the SSD; The method of claim 1 further comprising:

12. 1. A method for erasing data from a solid state drive (SSD), comprising: generating a restored image of information stored on the SSD, the restored image characterizing a restored state of the SSD before user data was stored on the SSD; electrically erasing memory cells of the SSD; collecting quantitative data regarding the electrical erasure of memory cells of the SSD; applying thermal energy to the SSD to encourage electrons between the insulator layers and electrons representing bits in corresponding memory cells of the SSD to exit the cells; collecting quantitative data regarding the application of the thermal energy to the memory cells of the SSD; generating a set of quantitative data for verifying erasure of user data from the SSD; A method comprising:

13. 13. The method of claim 12, wherein generating the set of quantitative data includes including the quantitative data regarding the electrical erasure and the quantitative data regarding the application of thermal energy in the set of quantitative data.

14. providing a thermal profile corresponding to the SSD that characterizes temperature versus duration for promoting the electrons to exit the cells; The method of claim 12 further comprising:

15. The method of claim 12 , wherein generating the set of quantitative data includes generating a number of cells whose bit values ​​did not change from the application of thermal energy.

16. 1. A method for erasing data from a solid state drive (SSD), comprising: generating a restored image of information stored on the SSD, the restored image characterizing a restored state of the SSD before user data was stored on the SSD; electrically erasing memory cells of the SSD; collecting quantitative data regarding the electrical erasure of memory cells of the SSD; applying high energy electromagnetic radiation to the SSD to encourage electrons between the insulator layers and electrons representing bits in corresponding memory cells of the SSD to exit the cells; collecting quantitative data regarding the application of the high-energy electromagnetic radiation to the memory cells of the SSD; generating a means for verifying erasure of user data from said SSD; A method comprising:

17. 17. The method of claim 16, wherein generating the set of quantitative data includes including the quantitative data regarding the electrical erasure and the quantitative data regarding the application of high-energy electromagnetic radiation in the set of quantitative data.

18. 17. The method of claim 16, wherein the applying high-energy electromagnetic radiation comprises applying X-rays to the SSD.

19. providing an electromagnetic radiation profile corresponding to the SSD, characterizing an electromagnetic energy level versus duration for promoting the electrons from the cell; 17. The method of claim 16, further comprising:

20. 17. The method of claim 16, wherein generating the set of quantitative data comprises generating a number of cells whose bit values ​​have not changed since the application of high-energy electromagnetic radiation.

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